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# A command that, given a newline-separated list of test names on the
# standard input, print the name of the tests that are to be re-run
# upon "make recheck".
am__list_recheck_tests = $(AWK) '{ \
  recheck = 1; \
  while ((rc = (getline line < ($$0 ".trs"))) != 0) \
    { \
      if (rc < 0) \
        { \
          if ((getline line2 < ($$0 ".log")) < 0) \
	    recheck = 0; \
          break; \
        } \
      else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
        { \
          recheck = 0; \
          break; \
        } \
      else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
        { \
          break; \
        } \
    }; \
  if (recheck) \
    print $$0; \
  close ($$0 ".trs"); \
  close ($$0 ".log"); \
}'
# A command that, given a newline-separated list of test names on the
# standard input, create the global log from their .trs and .log files.
am__create_global_log = $(AWK) ' \
function fatal(msg) \
{ \
  print "fatal: making $@: " msg | "cat >&2"; \
  exit 1; \
} \
function rst_section(header) \
{ \
  print header; \
  len = length(header); \
  for (i = 1; i <= len; i = i + 1) \
    printf "="; \
  printf "\n\n"; \
} \
{ \
  copy_in_global_log = 1; \
  global_test_result = "RUN"; \
  while ((rc = (getline line < ($$0 ".trs"))) != 0) \
    { \
      if (rc < 0) \
         fatal("failed to read from " $$0 ".trs"); \
      if (line ~ /$(am__global_test_result_rx)/) \
        { \
          sub("$(am__global_test_result_rx)", "", line); \
          sub("[ 	]*$$", "", line); \
          global_test_result = line; \
        } \
      else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
        copy_in_global_log = 0; \
    }; \
  if (copy_in_global_log) \
    { \
      rst_section(global_test_result ": " $$0); \
      while ((rc = (getline line < ($$0 ".log"))) != 0) \
      { \
        if (rc < 0) \
          fatal("failed to read from " $$0 ".log"); \
        print line; \
      }; \
      printf "\n"; \
    }; \
  close ($$0 ".trs"); \
  close ($$0 ".log"); \
}'
# Restructured Text title.
am__rst_title = { sed 's/.*/   &   /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
# Solaris 10 'make', and several other traditional 'make' implementations,
# pass "-e" to $(SHELL), and POSIX 2008 even requires this.  Work around it
# by disabling -e (using the XSI extension "set +e") if it's set.
am__sh_e_setup = case $$- in *e*) set +e;; esac
# Default flags passed to test drivers.
am__common_driver_flags = \
  --color-tests "$$am__color_tests" \
  --enable-hard-errors "$$am__enable_hard_errors" \
  --expect-failure "$$am__expect_failure"
# To be inserted before the command running the test.  Creates the
# directory for the log if needed.  Stores in $dir the directory
# containing $f, in $tst the test, in $log the log.  Executes the
# developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
# passes TESTS_ENVIRONMENT.  Set up options for the wrapper that
# will run the test scripts (or their associated LOG_COMPILER, if
# thy have one).
am__check_pre = \
$(am__sh_e_setup);					\
$(am__vpath_adj_setup) $(am__vpath_adj)			\
$(am__tty_colors);					\
srcdir=$(srcdir); export srcdir;			\
case "$@" in						\
  */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;;	\
    *) am__odir=.;; 					\
esac;							\
test "x$$am__odir" = x"." || test -d "$$am__odir" 	\
  || $(MKDIR_P) "$$am__odir" || exit $$?;		\
if test -f "./$$f"; then dir=./;			\
elif test -f "$$f"; then dir=;				\
else dir="$(srcdir)/"; fi;				\
tst=$$dir$$f; log='$@'; 				\
if test -n '$(DISABLE_HARD_ERRORS)'; then		\
  am__enable_hard_errors=no; 				\
else							\
  am__enable_hard_errors=yes; 				\
fi; 							\
case " $(XFAIL_TESTS) " in				\
  *[\ \	]$$f[\ \	]* | *[\ \	]$$dir$$f[\ \	]*) \
    am__expect_failure=yes;;				\
  *)							\
    am__expect_failure=no;;				\
esac; 							\
$(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
# A shell command to get the names of the tests scripts with any registered
# extension removed (i.e., equivalently, the names of the test logs, with
# the '.log' extension removed).  The result is saved in the shell variable
# '$bases'.  This honors runtime overriding of TESTS and TEST_LOGS.  Sadly,
# we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
# since that might cause problem with VPATH rewrites for suffix-less tests.
# See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
am__set_TESTS_bases = \
  bases='$(TEST_LOGS)'; \
  bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
  bases=`echo $$bases`
RECHECK_LOGS = $(TEST_LOGS)
TEST_SUITE_LOG = test-suite.log
TEST_EXTENSIONS = @EXEEXT@ .test
LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
am__set_b = \
  case '$@' in \
    */*) \
      case '$*' in \
        */*) b='$*';; \
          *) b=`echo '$@' | sed 's/\.log$$//'`; \
       esac;; \
    *) \
      b='$*';; \
  esac
am__test_logs1 = $(TESTS:=.log)
am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
TEST_LOGS = $(am__test_logs2:.test.log=.log)
TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
	$(TEST_LOG_FLAGS)
DIST_SUBDIRS = $(SUBDIRS)
ACLOCAL = @ACLOCAL@
AMTAR = @AMTAR@
AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
AR = @AR@
AR_FOR_BUILD = @AR_FOR_BUILD@
AS_FOR_TARGET = @AS_FOR_TARGET@
AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
AUTOCONF = @AUTOCONF@
AUTOHEADER = @AUTOHEADER@
AUTOMAKE = @AUTOMAKE@
AWK = @AWK@
CC = @CC@
CCDEPMODE = @CCDEPMODE@
CC_FOR_BUILD = @CC_FOR_BUILD@
CC_FOR_TARGET = @CC_FOR_TARGET@
CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
CFLAGS = @CFLAGS@
CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
CGEN_MAINT = @CGEN_MAINT@
CPP = @CPP@
CPPFLAGS = @CPPFLAGS@
CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
CYGPATH_W = @CYGPATH_W@
C_DIALECT = @C_DIALECT@
DEFS = @DEFS@
DEPDIR = @DEPDIR@
DSYMUTIL = @DSYMUTIL@
DTC = @DTC@
DUMPBIN = @DUMPBIN@
ECHO_C = @ECHO_C@
ECHO_N = @ECHO_N@
ECHO_T = @ECHO_T@
EGREP = @EGREP@
EXEEXT = @EXEEXT@
FGREP = @FGREP@
GREP = @GREP@
INSTALL = @INSTALL@
INSTALL_DATA = @INSTALL_DATA@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_SCRIPT = @INSTALL_SCRIPT@
INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
LD = @LD@
LDFLAGS = @LDFLAGS@
LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
LD_FOR_TARGET = @LD_FOR_TARGET@
LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
LIBOBJS = @LIBOBJS@
LIBS = @LIBS@
LIBTOOL = @LIBTOOL@
LIPO = @LIPO@
LN_S = @LN_S@
LTLIBOBJS = @LTLIBOBJS@
MAINT = @MAINT@
MAKEINFO = @MAKEINFO@
MKDIR_P = @MKDIR_P@
NM = @NM@
NMEDIT = @NMEDIT@
OBJDUMP = @OBJDUMP@
OBJEXT = @OBJEXT@
OTOOL = @OTOOL@
OTOOL64 = @OTOOL64@
PACKAGE = @PACKAGE@
PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
PACKAGE_NAME = @PACKAGE_NAME@
PACKAGE_STRING = @PACKAGE_STRING@
PACKAGE_TARNAME = @PACKAGE_TARNAME@
PACKAGE_URL = @PACKAGE_URL@
PACKAGE_VERSION = @PACKAGE_VERSION@
PATH_SEPARATOR = @PATH_SEPARATOR@
PKGVERSION = @PKGVERSION@
PKG_CONFIG = @PKG_CONFIG@
PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
RANLIB = @RANLIB@
RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
READLINE_CFLAGS = @READLINE_CFLAGS@
READLINE_LIB = @READLINE_LIB@
REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
REPORT_BUGS_TO = @REPORT_BUGS_TO@
SDL_CFLAGS = @SDL_CFLAGS@
SDL_LIBS = @SDL_LIBS@
SED = @SED@
SET_MAKE = @SET_MAKE@
SHELL = @SHELL@
SIM_COMMON_BUILD_FALSE = @SIM_COMMON_BUILD_FALSE@
SIM_COMMON_BUILD_TRUE = @SIM_COMMON_BUILD_TRUE@
SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
SIM_INLINE = @SIM_INLINE@
SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
SIM_SUBDIRS = @SIM_SUBDIRS@
SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
STRIP = @STRIP@
TERMCAP_LIB = @TERMCAP_LIB@
VERSION = @VERSION@
WARN_CFLAGS = @WARN_CFLAGS@
WERROR_CFLAGS = @WERROR_CFLAGS@
abs_builddir = @abs_builddir@
abs_srcdir = @abs_srcdir@
abs_top_builddir = @abs_top_builddir@
abs_top_srcdir = @abs_top_srcdir@
ac_ct_CC = @ac_ct_CC@
ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
am__include = @am__include@
am__leading_dot = @am__leading_dot@
am__quote = @am__quote@
am__tar = @am__tar@
am__untar = @am__untar@
bindir = @bindir@
build = @build@
build_alias = @build_alias@
build_cpu = @build_cpu@
build_os = @build_os@
build_vendor = @build_vendor@
builddir = @builddir@
cgen = @cgen@
cgendir = @cgendir@
datadir = @datadir@
datarootdir = @datarootdir@
docdir = @docdir@
dvidir = @dvidir@
exec_prefix = @exec_prefix@
host = @host@
host_alias = @host_alias@
host_cpu = @host_cpu@
host_os = @host_os@
host_vendor = @host_vendor@
htmldir = @htmldir@
include_makefile = @include_makefile@
includedir = @includedir@
infodir = @infodir@
install_sh = @install_sh@
libdir = @libdir@
libexecdir = @libexecdir@
localedir = @localedir@
localstatedir = @localstatedir@
mandir = @mandir@
mkdir_p = @mkdir_p@
oldincludedir = @oldincludedir@
pdfdir = @pdfdir@
prefix = @prefix@
program_transform_name = @program_transform_name@
psdir = @psdir@
sbindir = @sbindir@
sharedstatedir = @sharedstatedir@
sim_bitsize = @sim_bitsize@
sim_float = @sim_float@
srcdir = @srcdir@
subdirs = @subdirs@
sysconfdir = @sysconfdir@
target = @target@
target_alias = @target_alias@
target_cpu = @target_cpu@
target_os = @target_os@
target_vendor = @target_vendor@
top_build_prefix = @top_build_prefix@
top_builddir = @top_builddir@
top_srcdir = @top_srcdir@
AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
GNULIB_PARENT_DIR = ..
srccom = $(srcdir)/common
srcroot = $(srcdir)/..
SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
AM_MAKEFLAGS = 
pkginclude_HEADERS = $(am__append_1)
noinst_LIBRARIES = $(SIM_COMMON_LIB) $(am__append_3)
CLEANFILES = common/version.c common/version.c-stamp \
	testsuite/common/bits-gen testsuite/common/bits32m0.c \
	testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
	testsuite/common/bits64m63.c
DISTCLEANFILES = 
MOSTLYCLEANFILES = core $(am__append_5) site-sim-config.exp \
	testrun.log testrun.sum $(am__append_12) $(am__append_16) \
	$(am__append_20) $(am__append_24) $(am__append_31) \
	$(am__append_36) $(am__append_39) $(am__append_43) \
	$(am__append_46) $(am__append_50) $(am__append_56) \
	$(am__append_61) $(am__append_70) $(am__append_73)
AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
	$(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
	-DSIM_COMMON_BUILD
AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
	$(SIM_INLINE) -I$(srcdir)/common
COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
SIM_ALL_RECURSIVE_DEPS = common/libcommon.a $(am__append_2) \
	$(am__append_11) $(am__append_14) $(am__append_19) \
	$(am__append_22) $(am__append_30) $(am__append_35) \
	$(am__append_38) $(am__append_41) $(am__append_45) \
	$(am__append_48) $(am__append_55) $(am__append_60) \
	$(am__append_68) $(am__append_72)
SIM_INSTALL_DATA_LOCAL_DEPS = 
SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_26)
SIM_UNINSTALL_LOCAL_DEPS = $(am__append_27)
SIM_COMMON_LIB = common/libcommon.a
common_libcommon_a_SOURCES = \
	common/callback.c \
	common/portability.c \
	common/sim-load.c \
	common/syscall.c \
	common/target-newlib-errno.c \
	common/target-newlib-open.c \
	common/target-newlib-signal.c \
	common/target-newlib-syscall.c \
	common/version.c

LIBIBERTY_LIB = ../libiberty/libiberty.a
BFD_LIB = ../bfd/libbfd.la
OPCODES_LIB = ../opcodes/libopcodes.la
SIM_COMMON_LIBS = \
	$(SIM_COMMON_LIB) \
	$(BFD_LIB) \
	$(OPCODES_LIB) \
	$(LIBIBERTY_LIB) \
	$(LIBGNU) \
	$(LIBGNU_EXTRA_LIBS)


# igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
# leak detection while running it.
@SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
@SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN)
@SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
@SIM_ENABLE_IGEN_TRUE@	igen/table.c \
@SIM_ENABLE_IGEN_TRUE@	igen/lf.c \
@SIM_ENABLE_IGEN_TRUE@	igen/misc.c \
@SIM_ENABLE_IGEN_TRUE@	igen/filter_host.c \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-decode.c \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-cache.c \
@SIM_ENABLE_IGEN_TRUE@	igen/filter.c \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-insn.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-model.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-itable.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-icache.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-semantics.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-idecode.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-support.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen-engine.c \
@SIM_ENABLE_IGEN_TRUE@	igen/gen.c

@SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
@SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES = 
@SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
@SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
@SIM_ENABLE_IGEN_TRUE@	$(IGEN) \
@SIM_ENABLE_IGEN_TRUE@	igen/filter \
@SIM_ENABLE_IGEN_TRUE@	igen/gen \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-cache \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-decode \
@SIM_ENABLE_IGEN_TRUE@	igen/ld-insn \
@SIM_ENABLE_IGEN_TRUE@	igen/table

EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp

# Custom verbose test variables that automake doesn't provide (yet?).
AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
AM_V_RUNTEST_0 = @echo "  RUNTEST  $(RUNTESTFLAGS) $*";
AM_V_RUNTEST_1 = 
DO_RUNTEST = \
	LC_ALL=C; export LC_ALL; \
	EXPECT=${EXPECT} ; export EXPECT ; \
	runtest=$(RUNTEST); \
	$$runtest $(RUNTESTFLAGS)

testsuite_common_CPPFLAGS = \
	-I$(srcdir)/common \
	-I$(srcroot)/include \
	-I../bfd

@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES = 
@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
@SIM_ENABLE_ARCH_aarch64_TRUE@	aarch64/nrun.o \
@SIM_ENABLE_ARCH_aarch64_TRUE@	aarch64/libsim.a \
@SIM_ENABLE_ARCH_aarch64_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES = 
@SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
@SIM_ENABLE_ARCH_arm_TRUE@	arm/nrun.o \
@SIM_ENABLE_ARCH_arm_TRUE@	arm/libsim.a \
@SIM_ENABLE_ARCH_arm_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
@SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
@SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES = 
@SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
@SIM_ENABLE_ARCH_avr_TRUE@	avr/nrun.o \
@SIM_ENABLE_ARCH_avr_TRUE@	avr/libsim.a \
@SIM_ENABLE_ARCH_avr_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES = 
@SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin/nrun.o \
@SIM_ENABLE_ARCH_bfin_TRUE@	bfin/libsim.a \
@SIM_ENABLE_ARCH_bfin_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES = 
@SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/nrun.o \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/libsim.a \
@SIM_ENABLE_ARCH_bpf_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/eng-le.h \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/mloop-le.c \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/stamp-mloop-le \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/eng-be.h \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/mloop-be.c \
@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/stamp-mloop-be

@SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES = 
@SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
@SIM_ENABLE_ARCH_cr16_TRUE@	cr16/nrun.o \
@SIM_ENABLE_ARCH_cr16_TRUE@	cr16/libsim.a \
@SIM_ENABLE_ARCH_cr16_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_cr16_TRUE@	cr16/gencode$(EXEEXT) \
@SIM_ENABLE_ARCH_cr16_TRUE@	cr16/simops.h \
@SIM_ENABLE_ARCH_cr16_TRUE@	cr16/table.c

@SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
@SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
@SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES = 
@SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/nrun.o \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/libsim.a \
@SIM_ENABLE_ARCH_cris_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
@SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/engv10.h \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/mloopv10f.c \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/stamp-mloop-v10f \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/engv32.h \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/mloopv32f.c \
@SIM_ENABLE_ARCH_cris_TRUE@	cris/stamp-mloop-v32f

@SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES = 
@SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
@SIM_ENABLE_ARCH_d10v_TRUE@	d10v/nrun.o \
@SIM_ENABLE_ARCH_d10v_TRUE@	d10v/libsim.a \
@SIM_ENABLE_ARCH_d10v_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_d10v_TRUE@	d10v/gencode$(EXEEXT) \
@SIM_ENABLE_ARCH_d10v_TRUE@	d10v/simops.h \
@SIM_ENABLE_ARCH_d10v_TRUE@	d10v/table.c

@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
@SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES = 
@SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
@SIM_ENABLE_ARCH_erc32_TRUE@	erc32/sis.o \
@SIM_ENABLE_ARCH_erc32_TRUE@	erc32/libsim.a \
@SIM_ENABLE_ARCH_erc32_TRUE@	$(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)

@SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
@SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES = 
@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
@SIM_ENABLE_ARCH_examples_TRUE@	example-synacor/nrun.o \
@SIM_ENABLE_ARCH_examples_TRUE@	example-synacor/libsim.a \
@SIM_ENABLE_ARCH_examples_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES = 
@SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
@SIM_ENABLE_ARCH_frv_TRUE@	frv/nrun.o \
@SIM_ENABLE_ARCH_frv_TRUE@	frv/libsim.a \
@SIM_ENABLE_ARCH_frv_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
@SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
@SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_frv_TRUE@	frv/eng.h \
@SIM_ENABLE_ARCH_frv_TRUE@	frv/mloop.c \
@SIM_ENABLE_ARCH_frv_TRUE@	frv/stamp-mloop

@SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES = 
@SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
@SIM_ENABLE_ARCH_ft32_TRUE@	ft32/nrun.o \
@SIM_ENABLE_ARCH_ft32_TRUE@	ft32/libsim.a \
@SIM_ENABLE_ARCH_ft32_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES = 
@SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
@SIM_ENABLE_ARCH_h8300_TRUE@	h8300/nrun.o \
@SIM_ENABLE_ARCH_h8300_TRUE@	h8300/libsim.a \
@SIM_ENABLE_ARCH_h8300_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES = 
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/nrun.o \
@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/libsim.a \
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/eng.h \
@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/mloop.c \
@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/stamp-mloop

@SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES = 
@SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/nrun.o \
@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/libsim.a \
@SIM_ENABLE_ARCH_lm32_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/eng.h \
@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/mloop.c \
@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/stamp-mloop

@SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES = 
@SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
@SIM_ENABLE_ARCH_m32c_TRUE@	m32c/main.o \
@SIM_ENABLE_ARCH_m32c_TRUE@	m32c/libsim.a \
@SIM_ENABLE_ARCH_m32c_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_m32c_TRUE@	m32c/opc2c$(EXEEXT) \
@SIM_ENABLE_ARCH_m32c_TRUE@	m32c/m32c.c \
@SIM_ENABLE_ARCH_m32c_TRUE@	m32c/r8c.c

@SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c

# opc2c leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
# leak detection while running it.
@SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
@SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES = 
@SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/nrun.o \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/libsim.a \
@SIM_ENABLE_ARCH_m32r_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/eng.h \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/mloop.c \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/stamp-mloop \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/engx.h \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/mloopx.c \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/stamp-mloop-x \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/eng2.h \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/mloop2.c \
@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/stamp-mloop-2

@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES = 
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/nrun.o \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/libsim.a \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/gencode$(EXEEXT) \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/m68hc11int.c \
@SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/m68hc12int.c

@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES = 
@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
@SIM_ENABLE_ARCH_mcore_TRUE@	mcore/nrun.o \
@SIM_ENABLE_ARCH_mcore_TRUE@	mcore/libsim.a \
@SIM_ENABLE_ARCH_mcore_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES = 
@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
@SIM_ENABLE_ARCH_microblaze_TRUE@	microblaze/nrun.o \
@SIM_ENABLE_ARCH_microblaze_TRUE@	microblaze/libsim.a \
@SIM_ENABLE_ARCH_microblaze_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES = 
@SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/nrun.o \
@SIM_ENABLE_ARCH_mips_TRUE@	mips/libsim.a \
@SIM_ENABLE_ARCH_mips_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES = 
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/nrun.o \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/libsim.a \
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/icache.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/icache.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/idecode.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/idecode.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/semantics.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/semantics.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/model.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/model.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/support.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/support.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/itable.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/itable.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/engine.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/engine.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/irun.c

@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(mn10300_BUILT_SRC_FROM_IGEN) \
@SIM_ENABLE_ARCH_mn10300_TRUE@	mn10300/stamp-igen

@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
@SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES = 
@SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
@SIM_ENABLE_ARCH_moxie_TRUE@	moxie/nrun.o \
@SIM_ENABLE_ARCH_moxie_TRUE@	moxie/libsim.a \
@SIM_ENABLE_ARCH_moxie_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
@SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
@SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES = 
@SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
@SIM_ENABLE_ARCH_msp430_TRUE@	msp430/nrun.o \
@SIM_ENABLE_ARCH_msp430_TRUE@	msp430/libsim.a \
@SIM_ENABLE_ARCH_msp430_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES = 
@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/nrun.o \
@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/libsim.a \
@SIM_ENABLE_ARCH_or1k_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
@SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
@SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/eng.h \
@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/mloop.c \
@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/stamp-mloop

@SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES = 
@SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
@SIM_ENABLE_ARCH_ppc_TRUE@	ppc/main.o \
@SIM_ENABLE_ARCH_ppc_TRUE@	ppc/libsim.a \
@SIM_ENABLE_ARCH_ppc_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
@SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
@SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES = 
@SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
@SIM_ENABLE_ARCH_pru_TRUE@	pru/nrun.o \
@SIM_ENABLE_ARCH_pru_TRUE@	pru/libsim.a \
@SIM_ENABLE_ARCH_pru_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES = 
@SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
@SIM_ENABLE_ARCH_riscv_TRUE@	riscv/nrun.o \
@SIM_ENABLE_ARCH_riscv_TRUE@	riscv/libsim.a \
@SIM_ENABLE_ARCH_riscv_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES = 
@SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
@SIM_ENABLE_ARCH_rl78_TRUE@	rl78/main.o \
@SIM_ENABLE_ARCH_rl78_TRUE@	rl78/libsim.a \
@SIM_ENABLE_ARCH_rl78_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES = 
@SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
@SIM_ENABLE_ARCH_rx_TRUE@	rx/main.o \
@SIM_ENABLE_ARCH_rx_TRUE@	rx/libsim.a \
@SIM_ENABLE_ARCH_rx_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
@SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
@SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES = 
@SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/nrun.o \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/libsim.a \
@SIM_ENABLE_ARCH_sh_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/gencode$(EXEEXT) \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/code.c \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/ppi.c \
@SIM_ENABLE_ARCH_sh_TRUE@	sh/table.c

@SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
@SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES = 
@SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/nrun.o \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/libsim.a \
@SIM_ENABLE_ARCH_v850_TRUE@	$(SIM_COMMON_LIBS)

@SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/icache.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/icache.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/idecode.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/idecode.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/semantics.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/semantics.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/model.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/model.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/support.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/support.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/itable.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/itable.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/engine.h \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/engine.c \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/irun.c

@SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
@SIM_ENABLE_ARCH_v850_TRUE@	$(v850_BUILT_SRC_FROM_IGEN) \
@SIM_ENABLE_ARCH_v850_TRUE@	v850/stamp-igen

@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
all: config.h
	$(MAKE) $(AM_MAKEFLAGS) all-recursive

.SUFFIXES:
.SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
am--refresh: Makefile
	@:
$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
	@for dep in $?; do \
	  case '$(am__configure_deps)' in \
	    *$$dep*) \
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@include_makefile@ $(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc

# Generate target constants for newlib/libgloss from its source tree.
# This file is shipped with distributions so we build in the source dir.
# Use `make nltvals' to rebuild.
.PHONY: nltvals
nltvals:
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common/version.c: common/version.c-stamp ; @true
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# Alias for developers.
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# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
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site-sim-config.exp: Makefile
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# Ignore dirs that only contain configuration settings.
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testsuite/common/%.o: testsuite/common/%.c
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testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
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	$(AM_V_at)mv $@.tmp $@

testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
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testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
	$(AM_V_GEN)$< 64 0 big > $@.tmp
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testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)

testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
	$(AM_V_GEN)$< 64 63 little > $@.tmp
	$(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
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@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_bpf_TRUE@		-mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
@SIM_ENABLE_ARCH_bpf_TRUE@		-infile $(srcdir)/bpf/mloop.in \
@SIM_ENABLE_ARCH_bpf_TRUE@		-outfile-prefix bpf/ -outfile-suffix -le
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_bpf_TRUE@		-mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
@SIM_ENABLE_ARCH_bpf_TRUE@		-infile $(srcdir)/bpf/mloop.in \
@SIM_ENABLE_ARCH_bpf_TRUE@		-outfile-prefix bpf/ -outfile-suffix -be
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)touch $@

# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
@SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)

# gencode is a build-time only tool.  Override the default rules for it.
@SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
@SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
@SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
@SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@

@SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_GEN)$< -h >$@

@SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_GEN)$< >$@

@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_cris_TRUE@		-mono -no-fast -pbb -switch semcrisv10f-switch.c \
@SIM_ENABLE_ARCH_cris_TRUE@		-cpu crisv10f \
@SIM_ENABLE_ARCH_cris_TRUE@		-infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_cris_TRUE@		-mono -no-fast -pbb -switch semcrisv32f-switch.c \
@SIM_ENABLE_ARCH_cris_TRUE@		-cpu crisv32f \
@SIM_ENABLE_ARCH_cris_TRUE@		-infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)touch $@

# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
@SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)

# gencode is a build-time only tool.  Override the default rules for it.
@SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
@SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
@SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
@SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@

@SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_GEN)$< -h >$@

@SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_GEN)$< >$@

@SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
@SIM_ENABLE_ARCH_erc32_TRUE@	$(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@

@SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: erc32/%.c | erc32/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
@SIM_ENABLE_ARCH_erc32_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
@SIM_ENABLE_ARCH_erc32_TRUE@	$(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
@SIM_ENABLE_ARCH_erc32_TRUE@	n=`echo sis | sed '$(program_transform_name)'`; \
@SIM_ENABLE_ARCH_erc32_TRUE@	$(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
@SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
@SIM_ENABLE_ARCH_erc32_TRUE@	rm -f $(DESTDIR)$(bindir)/sis

@SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
@SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_frv_TRUE@		-mono -scache -parallel-generic-write -parallel-only \
@SIM_ENABLE_ARCH_frv_TRUE@		-cpu frvbf \
@SIM_ENABLE_ARCH_frv_TRUE@		-infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_iq2000_TRUE@		-mono -fast -pbb -switch sem-switch.c \
@SIM_ENABLE_ARCH_iq2000_TRUE@		-cpu iq2000bf \
@SIM_ENABLE_ARCH_iq2000_TRUE@		-infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
@SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_lm32_TRUE@		-mono -fast -pbb -switch sem-switch.c \
@SIM_ENABLE_ARCH_lm32_TRUE@		-cpu lm32bf \
@SIM_ENABLE_ARCH_lm32_TRUE@		-infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c | m32c/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
@SIM_ENABLE_ARCH_m32c_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)

# opc2c is a build-time only tool.  Override the default rules for it.
@SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@

@SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_at)mv $@.tmp $@

@SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
@SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_at)mv $@.tmp $@

@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_m32r_TRUE@		-mono -fast -pbb -switch sem-switch.c \
@SIM_ENABLE_ARCH_m32r_TRUE@		-cpu m32rbf \
@SIM_ENABLE_ARCH_m32r_TRUE@		-infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_m32r_TRUE@		-mono -no-fast -pbb -parallel-write -switch semx-switch.c \
@SIM_ENABLE_ARCH_m32r_TRUE@		-cpu m32rxf \
@SIM_ENABLE_ARCH_m32r_TRUE@		-infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_m32r_TRUE@		-mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
@SIM_ENABLE_ARCH_m32r_TRUE@		-cpu m32r2f \
@SIM_ENABLE_ARCH_m32r_TRUE@		-infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)touch $@

# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
@SIM_ENABLE_ARCH_m68hc11_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)

# gencode is a build-time only tool.  Override the default rules for it.
@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
@SIM_ENABLE_ARCH_m68hc11_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@

@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_m68hc11_TRUE@	$(AM_V_GEN)$< -m6811 >$@

@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_m68hc11_TRUE@	$(AM_V_GEN)$< -m6812 >$@

@SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_GEN)$(IGEN_RUN) \
@SIM_ENABLE_ARCH_mn10300_TRUE@		$(mn10300_IGEN_TRACE) \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-G gen-direct-access \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-M mn10300,am33 -G gen-multi-sim=am33 \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-M am33_2 \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-I $(srcdir)/mn10300 \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-i $(mn10300_IGEN_INSN) \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-o $(mn10300_IGEN_DC) \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-x \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n icache.h    -hc mn10300/tmp-icache.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n icache.c    -c  mn10300/tmp-icache.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n semantics.h -hs mn10300/tmp-semantics.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n semantics.c -s  mn10300/tmp-semantics.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n idecode.h   -hd mn10300/tmp-idecode.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n idecode.c   -d  mn10300/tmp-idecode.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n model.h     -hm mn10300/tmp-model.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n model.c     -m  mn10300/tmp-model.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n support.h   -hf mn10300/tmp-support.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n support.c   -f  mn10300/tmp-support.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n itable.h    -ht mn10300/tmp-itable.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n itable.c    -t  mn10300/tmp-itable.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n engine.h    -he mn10300/tmp-engine.h \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n engine.c    -e  mn10300/tmp-engine.c \
@SIM_ENABLE_ARCH_mn10300_TRUE@		-n irun.c      -r  mn10300/tmp-irun.c
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-icache.h mn10300/icache.h
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-icache.c mn10300/icache.c
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-idecode.h mn10300/idecode.h
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-idecode.c mn10300/idecode.c
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-semantics.h mn10300/semantics.h
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-semantics.c mn10300/semantics.c
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-model.h mn10300/model.h
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-model.c mn10300/model.c
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-support.h mn10300/support.h
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-support.c mn10300/support.c
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-itable.h mn10300/itable.h
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-itable.c mn10300/itable.c
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-engine.h mn10300/engine.h
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-engine.c mn10300/engine.c
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-irun.c mn10300/irun.c
@SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
@SIM_ENABLE_ARCH_moxie_TRUE@	$(AM_V_GEN) \
@SIM_ENABLE_ARCH_moxie_TRUE@	if test "x$(DTC)" != x; then \
@SIM_ENABLE_ARCH_moxie_TRUE@	  $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
@SIM_ENABLE_ARCH_moxie_TRUE@	  $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
@SIM_ENABLE_ARCH_moxie_TRUE@	  touch ${srcdir}/moxie/moxie-gdb.dtb; \
@SIM_ENABLE_ARCH_moxie_TRUE@	else \
@SIM_ENABLE_ARCH_moxie_TRUE@	  echo "Could not update the moxie-gdb.dtb file because the device "; \
@SIM_ENABLE_ARCH_moxie_TRUE@	  echo "tree compiler tool (dtc) is missing.  Install the tool to "; \
@SIM_ENABLE_ARCH_moxie_TRUE@	  echo "update the device tree blob."; \
@SIM_ENABLE_ARCH_moxie_TRUE@	fi

@SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
@SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
@SIM_ENABLE_ARCH_or1k_TRUE@		-mono -fast -pbb -switch sem-switch.c \
@SIM_ENABLE_ARCH_or1k_TRUE@		-cpu or1k32bf \
@SIM_ENABLE_ARCH_or1k_TRUE@		-infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_at)touch $@

@SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
@SIM_ENABLE_ARCH_ppc_TRUE@	$(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@

@SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
@SIM_ENABLE_ARCH_ppc_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

@SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c | rl78/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
@SIM_ENABLE_ARCH_rl78_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

@SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c | rx/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
@SIM_ENABLE_ARCH_rx_TRUE@	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
@SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
@SIM_ENABLE_ARCH_sh_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)

# gencode is a build-time only tool.  Override the default rules for it.
@SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
@SIM_ENABLE_ARCH_sh_TRUE@	$(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@

@SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_sh_TRUE@	$(AM_V_GEN)$< -x >$@

@SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_sh_TRUE@	$(AM_V_GEN)$< -p >$@

@SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
@SIM_ENABLE_ARCH_sh_TRUE@	$(AM_V_GEN)$< -s >$@

@SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
@SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_GEN)$(IGEN_RUN) \
@SIM_ENABLE_ARCH_v850_TRUE@		$(v850_IGEN_TRACE) \
@SIM_ENABLE_ARCH_v850_TRUE@		-G gen-direct-access \
@SIM_ENABLE_ARCH_v850_TRUE@		-G gen-zero-r0 \
@SIM_ENABLE_ARCH_v850_TRUE@		-i $(v850_IGEN_INSN) \
@SIM_ENABLE_ARCH_v850_TRUE@		-o $(v850_IGEN_DC) \
@SIM_ENABLE_ARCH_v850_TRUE@		-x \
@SIM_ENABLE_ARCH_v850_TRUE@		-n icache.h    -hc v850/tmp-icache.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n icache.c    -c  v850/tmp-icache.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n semantics.h -hs v850/tmp-semantics.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n semantics.c -s  v850/tmp-semantics.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n idecode.h   -hd v850/tmp-idecode.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n idecode.c   -d  v850/tmp-idecode.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n model.h     -hm v850/tmp-model.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n model.c     -m  v850/tmp-model.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n support.h   -hf v850/tmp-support.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n support.c   -f  v850/tmp-support.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n itable.h    -ht v850/tmp-itable.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n itable.c    -t  v850/tmp-itable.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n engine.h    -he v850/tmp-engine.h \
@SIM_ENABLE_ARCH_v850_TRUE@		-n engine.c    -e  v850/tmp-engine.c \
@SIM_ENABLE_ARCH_v850_TRUE@		-n irun.c      -r  v850/tmp-irun.c
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-icache.h v850/icache.h
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-icache.c v850/icache.c
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-idecode.h v850/idecode.h
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-idecode.c v850/idecode.c
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-semantics.h v850/semantics.h
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-semantics.c v850/semantics.c
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-model.h v850/model.h
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-model.c v850/model.c
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-support.h v850/support.h
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-support.c v850/support.c
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-itable.h v850/itable.h
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-itable.c v850/itable.c
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-engine.h v850/engine.h
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-engine.c v850/engine.c
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-irun.c v850/irun.c
@SIM_ENABLE_ARCH_v850_TRUE@	$(AM_V_at)touch $@

%/libsim.a: | $(SIM_ALL_RECURSIVE_DEPS)
	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

%/nrun.o: common/nrun.c | %/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
	$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)

all-recursive: $(SIM_ALL_RECURSIVE_DEPS)

install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
	$(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
	lib=`echo sim | sed '$(program_transform_name)'`; \
	for d in $(SIM_ENABLED_ARCHES); do \
		n="$$lib"; \
		[ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
		n="lib$$n.a"; \
		$(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
	done

install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
	$(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
	run=`echo run | sed '$(program_transform_name)'`; \
	for d in $(SIM_ENABLED_ARCHES); do \
		n="$$run"; \
		[ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
		$(LIBTOOL) --mode=install \
			$(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
	done

uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
	rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
	for d in $(SIM_ENABLED_ARCHES); do \
		rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
	done

# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
.NOEXPORT: