patch-2.4.9 linux/include/asm-arm/arch-sa1100/assabet.h

• Lines: 66
• Date: Sun Aug 12 17:36:24 2001
• Orig file: v2.4.8/linux/include/asm-arm/arch-sa1100/assabet.h
• Orig date: Thu Apr 12 12:20:31 2001

diff -u --recursive --new-file v2.4.8/linux/include/asm-arm/arch-sa1100/assabet.h linux/include/asm-arm/arch-sa1100/assabet.h
@@ -31,8 +31,14 @@
 #define BCR_BASE  0xf1000000
 #define BCR (*(volatile unsigned int *)(BCR_BASE))
 
-#define BCR_DB1110	(0x00A07410)
-#define BCR_DB1111	(0x00A074E2)
+#define BCR_DB1110 \
+	(BCR_SPK_OFF  | BCR_QMUTE     | BCR_LED_GREEN  | BCR_LED_RED   | \
+	 BCR_RS232EN  | BCR_LCD_12RGB | BCR_IRDA_MD0)
+
+#define BCR_DB1111 \
+	(BCR_SPK_OFF  | BCR_QMUTE     | BCR_LED_GREEN  | BCR_LED_RED   | \
+	 BCR_RS232EN  | BCR_LCD_12RGB | BCR_CF_BUS_OFF | BCR_STEREO_LB | \
+	 BCR_IRDA_MD1 | BCR_CF_RST)
 
 #define BCR_CF_PWR	(1<<0)	/* Compact Flash Power (1 = 3.3v, 0 = off) */
 #define BCR_CF_RST	(1<<1)	/* Compact Flash Reset (1 = power up reset) */
@@ -67,6 +73,18 @@
 #define BCR_clear( x )	BCR = (BCR_value &= ~(x))
 #endif
 
+#define BSR_BASE	0xf1000000
+#define BSR (*(volatile unsigned int*)(BSR_BASE))
+
+#define BSR_RS232_VALID	(1 << 24)
+#define BSR_COM_DCD	(1 << 25)
+#define BSR_COM_CTS	(1 << 26)
+#define BSR_COM_DSR	(1 << 27)
+#define BSR_RAD_CTS	(1 << 28)
+#define BSR_RAD_DSR	(1 << 29)
+#define BSR_RAD_DCD	(1 << 30)
+#define BSR_RAD_RI	(1 << 31)
+
 
 /* GPIOs for which the generic definition doesn't say much */
 #define GPIO_RADIO_IRQ		GPIO_GPIO (14)	/* Radio interrupt request  */
@@ -106,8 +124,8 @@
 #define NEPONSET_USAR_IRQ	MISC_IRQ1
 
 #define NEPONSET_CPLD_BASE      (0x10000000)
-#define Nep_p2v( x )            ((x) - NEPONSET_CPLD_BASE + 0xf0000000)
-#define Nep_v2p( x )            ((x) - 0xf0000000 + NEPONSET_CPLD_BASE)
+#define Nep_p2v( x )            ((x) - NEPONSET_CPLD_BASE + 0xf3000000)
+#define Nep_v2p( x )            ((x) - 0xf3000000 + NEPONSET_CPLD_BASE)
 
 #define _IRR                    0x10000024      /* Interrupt Reason Register */
 #define _AUD_CTL                0x100000c0      /* Audio controls (RW)       */
@@ -143,6 +161,18 @@
 
 #define AUD_SEL_1341            (1<<0)
 #define AUD_MUTE_1341           (1<<1)
+
+#define MDM_CTL0_RTS1		(1 << 0)
+#define MDM_CTL0_DTR1		(1 << 1)
+#define MDM_CTL0_RTS2		(1 << 2)
+#define MDM_CTL0_DTR2		(1 << 3)
+
+#define MDM_CTL1_CTS1		(1 << 0)
+#define MDM_CTL1_DSR1		(1 << 1)
+#define MDM_CTL1_DCD1		(1 << 2)
+#define MDM_CTL1_CTS2		(1 << 3)
+#define MDM_CTL1_DSR2		(1 << 4)
+#define MDM_CTL1_DCD2		(1 << 5)
 
 #define NCR_GP01_OFF		(1<<0)
 #define NCR_TP_PWR_EN		(1<<1)