patch-2.4.7 linux/include/asm-mips64/mipsregs.h
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- Lines: 18
- Date:
Wed Jul 4 11:50:39 2001
- Orig file:
v2.4.6/linux/include/asm-mips64/mipsregs.h
- Orig date:
Fri Apr 13 20:26:07 2001
diff -u --recursive --new-file v2.4.6/linux/include/asm-mips64/mipsregs.h linux/include/asm-mips64/mipsregs.h
@@ -246,7 +246,7 @@
#define CAUSEF_BD (1 << 31)
/*
- * Bits in the coprozessor 0 config register.
+ * Bits in the coprocessor 0 config register.
*/
#define CONF_CM_CACHABLE_NO_WA 0
#define CONF_CM_CACHABLE_WA 1
@@ -265,7 +265,7 @@
* R10000 performance counter definitions.
*
* FIXME: The R10000 performance counter opens a nice way to implement CPU
- * time accounting with a precission of one cycle. I don't have
+ * time accounting with a precision of one cycle. I don't have
* R10000 silicon but just a manual, so ...
*/
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