patch-2.4.5 linux/include/asm-ppc/fads.h
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- Lines: 78
- Date:
Mon May 21 15:02:06 2001
- Orig file:
v2.4.4/linux/include/asm-ppc/fads.h
- Orig date:
Sat Nov 27 15:42:33 1999
diff -u --recursive --new-file v2.4.4/linux/include/asm-ppc/fads.h linux/include/asm-ppc/fads.h
@@ -1,3 +1,6 @@
+/*
+ * BK Id: SCCS/s.fads.h 1.8 05/17/01 18:14:24 cort
+ */
/*
* A collection of structures, addresses, and values associated with
@@ -8,6 +11,7 @@
#ifndef __MACH_FADS_DEFS
#define __MACH_FADS_DEFS
+#ifndef __ASSEMBLY__
/* A Board Information structure that is given to a program when
* prom starts it up.
*/
@@ -16,24 +20,54 @@
unsigned int bi_memsize; /* Memory (end) size in bytes */
unsigned int bi_intfreq; /* Internal Freq, in Hz */
unsigned int bi_busfreq; /* Bus Freq, in Hz */
+ unsigned char bi_enetaddr[6];
+ unsigned int bi_baudrate;
} bd_t;
extern bd_t m8xx_board_info;
/* Memory map is configured by the PROM startup.
* I tried to follow the FADS manual, although the startup PROM
- * dictates this.
+ * dictates this and we simply have to move some of the physical
+ * addresses for Linux.
*/
-#define BCSR_ADDR ((uint)0x02100000)
+#define BCSR_ADDR ((uint)0xfe000000)
#define BCSR_SIZE ((uint)(64 * 1024))
-#define BCSR0 ((uint)0x02100000)
-#define BCSR1 ((uint)0x02100004)
-#define BCSR2 ((uint)0x02100008)
-#define BCSR3 ((uint)0x0210000c)
-#define BCSR4 ((uint)0x02100010)
-#define IMAP_ADDR ((uint)0x02200000)
+#define BCSR0 ((uint)0xfe000000)
+#define BCSR1 ((uint)0xfe000004)
+#define BCSR2 ((uint)0xfe000008)
+#define BCSR3 ((uint)0xfe00000c)
+#define BCSR4 ((uint)0xfe000010)
+#define IMAP_ADDR ((uint)0xf0000000)
#define IMAP_SIZE ((uint)(64 * 1024))
#define PCMCIA_MEM_ADDR ((uint)0x04000000)
#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
+
+/* Bits of interest in the BCSRs.
+ */
+#define BCSR1_ETHEN ((uint)0x20000000)
+#define BCSR1_RS232EN_1 ((uint)0x01000000)
+#define BCSR1_RS232EN_2 ((uint)0x00040000)
+#define BCSR4_ETHLOOP ((uint)0x80000000) /* EEST Loopback */
+#define BCSR4_EEFDX ((uint)0x40000000) /* EEST FDX enable */
+#define BCSR4_FETH_EN ((uint)0x08000000) /* PHY enable */
+#define BCSR4_FETHCFG0 ((uint)0x04000000) /* PHY autoneg mode */
+#define BCSR4_FETHCFG1 ((uint)0x00400000) /* PHY autoneg mode */
+#define BCSR4_FETHFDE ((uint)0x02000000) /* PHY FDX advertise */
+#define BCSR4_FETHRST ((uint)0x00200000) /* PHY Reset */
+#endif /* !__ASSEMBLY__ */
+
+/* Interrupt level assignments.
+ */
+#define FEC_INTERRUPT SIU_LEVEL1 /* FEC interrupt */
+#define PHY_INTERRUPT SIU_IRQ2 /* PHY link change interrupt */
+
+/* We don't use the 8259.
+ */
+#define NR_8259_INTS 0
+
+/* Machine type
+ */
+#define _MACH_8xx (_MACH_fads)
#endif
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