patch-2.4.5 linux/include/asm-ppc/elf.h

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diff -u --recursive --new-file v2.4.4/linux/include/asm-ppc/elf.h linux/include/asm-ppc/elf.h
@@ -1,3 +1,6 @@
+/*
+ * BK Id: SCCS/s.elf.h 1.10 05/17/01 18:14:24 cort
+ */
 #ifndef __PPC_ELF_H
 #define __PPC_ELF_H
 
@@ -74,20 +77,39 @@
  * We need to put in some extra aux table entries to tell glibc what
  * the cache block size is, so it can use the dcbz instruction safely.
  */
-#define AT_DCACHEBSIZE		17
-#define AT_ICACHEBSIZE		18
-#define AT_UCACHEBSIZE		19
+#define AT_DCACHEBSIZE		19
+#define AT_ICACHEBSIZE		20
+#define AT_UCACHEBSIZE		21
+/* A special ignored type value for PPC, for glibc compatibility.  */
+#define AT_IGNOREPPC		22
 
 extern int dcache_bsize;
 extern int icache_bsize;
 extern int ucache_bsize;
 
-#define DLINFO_EXTRA_ITEMS	3
-#define EXTRA_DLINFO		do {			\
-	NEW_AUX_ENT(0, AT_DCACHEBSIZE, dcache_bsize);	\
-	NEW_AUX_ENT(1, AT_ICACHEBSIZE, icache_bsize);	\
-	NEW_AUX_ENT(2, AT_UCACHEBSIZE, ucache_bsize);	\
-} while (0)
+/*
+ * The requirements here are:
+ * - keep the final alignment of sp (sp & 0xf)
+ * - make sure the 32-bit value at the first 16 byte aligned position of
+ *   AUXV is greater than 16 for glibc compatibility.
+ *   AT_IGNOREPPC is used for that.
+ * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
+ *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
+ */
+#define DLINFO_ARCH_ITEMS	3
+#define ARCH_DLINFO							\
+do {									\
+	sp -= DLINFO_ARCH_ITEMS * 2;					\
+	NEW_AUX_ENT(0, AT_DCACHEBSIZE, dcache_bsize);			\
+	NEW_AUX_ENT(1, AT_ICACHEBSIZE, icache_bsize);			\
+	NEW_AUX_ENT(2, AT_UCACHEBSIZE, ucache_bsize);			\
+	/*								\
+	 * Now handle glibc compatibility.				\
+	 */								\
+	sp -= 2*2;							\
+	NEW_AUX_ENT(0, AT_IGNOREPPC, AT_IGNOREPPC);			\
+	NEW_AUX_ENT(1, AT_IGNOREPPC, AT_IGNOREPPC);			\
+ } while (0)
 
 #endif /* __KERNEL__ */
 #endif

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