patch-2.4.5 linux/drivers/pci/quirks.c
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- Lines: 126
- Date:
Sat May 19 17:43:06 2001
- Orig file:
v2.4.4/linux/drivers/pci/quirks.c
- Orig date:
Thu Apr 19 22:57:06 2001
diff -u --recursive --new-file v2.4.4/linux/drivers/pci/quirks.c linux/drivers/pci/quirks.c
@@ -12,6 +12,7 @@
* use the PowerTweak utility (see http://powertweak.sourceforge.net).
*/
+#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/pci.h>
@@ -31,7 +32,7 @@
while ((d = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, d))) {
pci_read_config_byte(d, 0x82, &dlc);
if (!(dlc & 1<<1)) {
- printk("PCI: PIIX3: Enabling Passive Release on %s\n", d->slot_name);
+ printk(KERN_ERR "PCI: PIIX3: Enabling Passive Release on %s\n", d->slot_name);
dlc |= 1<<1;
pci_write_config_byte(d, 0x82, dlc);
}
@@ -88,23 +89,44 @@
* VIA Apollo KT133 needs PCI latency patch
* Made according to a windows driver based patch by George E. Breese
* see PCI Latency Adjust on http://www.viahardware.com/download/viatweak.shtm
+ * Also see http://home.tiscalinet.de/au-ja/review-kt133a-1-en.html for
+ * the info on which Mr Breese based his work.
*/
static void __init quirk_vialatency(struct pci_dev *dev)
{
u8 r70;
-
- printk(KERN_INFO "Applying VIA PCI latency patch.\n");
- /*
- * In register 0x70, mask off bit 2 (PCI Master read caching)
- * and 1 (Delay Transaction)
- */
- pci_read_config_byte(dev, 0x70, &r70);
- r70 &= 0xf9;
- pci_write_config_byte(dev, 0x70, r70);
- /*
- * Turn off PCI Latency timeout (set to 0 clocks)
+ u8 rev;
+ struct pci_dev *vt82c686;
+
+
+ /* we want to look for a VT82C686 south bridge, and then apply the via latency
+ * patch if we find that it's a 686B (by revision) <cpbotha@ieee.org>
*/
- pci_write_config_byte(dev, 0x75, 0x80);
+ vt82c686 = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, NULL);
+ if (vt82c686)
+ {
+ pci_read_config_byte(vt82c686, PCI_CLASS_REVISION, &rev);
+ /* 0x40 - 0x4f == 686B, 0x10 - 0x2f == 686A; thanks Dan Hollis */
+ if (rev >= 0x40 && rev <= 0x4f)
+ {
+ printk(KERN_INFO "Applying VIA PCI latency patch (found VT82C686B).\n");
+ /*
+ * In register 0x70, mask off bit 2 (PCI Master read caching)
+ * and 1 (Delay Transaction)
+ */
+ pci_read_config_byte(dev, 0x70, &r70);
+ r70 &= 0xf9;
+ pci_write_config_byte(dev, 0x70, r70);
+ /*
+ * Turn off PCI Latency timeout (set to 0 clocks)
+ */
+ pci_write_config_byte(dev, 0x75, 0x80);
+ }
+ else
+ {
+ printk(KERN_INFO "Found VT82C686A, not applying VIA latency patch.\n");
+ }
+ } /* if (vt82c686) ... */
}
/*
@@ -238,6 +260,30 @@
quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 2);
}
+
+#ifdef CONFIG_X86_IO_APIC
+extern int nr_ioapics;
+
+/*
+ * VIA 686A/B: If an IO-APIC is active, we need to route all on-chip
+ * devices to the external APIC.
+ */
+static void __init quirk_via_ioapic(struct pci_dev *dev)
+{
+ u8 tmp;
+
+ if (nr_ioapics < 1)
+ tmp = 0; /* nothing routed to external APIC */
+ else
+ tmp = 0x1f; /* all known bits (4-0) routed to external APIC */
+
+ /* Offset 0x58: External APIC IRQ output control */
+ pci_write_config_byte (dev, 0x58, tmp);
+}
+
+#endif /* CONFIG_X86_IO_APIC */
+
+
/*
* PIIX3 USB: We have to disable USB interrupts that are
* hardwired to PIRQD# and may be shared with an
@@ -322,6 +368,11 @@
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_2, quirk_piix3_usb },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_2, quirk_piix3_usb },
{ PCI_FIXUP_FINAL, PCI_ANY_ID, PCI_ANY_ID, quirk_cardbus_legacy },
+
+#ifdef CONFIG_X86_IO_APIC
+ { PCI_FIXUP_FINAL, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic },
+#endif
+
{ 0 }
};
@@ -333,7 +384,7 @@
(f->vendor == dev->vendor || f->vendor == (u16) PCI_ANY_ID) &&
(f->device == dev->device || f->device == (u16) PCI_ANY_ID)) {
#ifdef DEBUG
- printk("PCI: Calling quirk %p for %s\n", f->hook, dev->slot_name);
+ printk(KERN_INFO "PCI: Calling quirk %p for %s\n", f->hook, dev->slot_name);
#endif
f->hook(dev);
}
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