patch-2.4.4 linux/include/asm-ia64/system.h

• Lines: 125
• Date: Thu Apr 5 12:51:47 2001
• Orig file: v2.4.3/linux/include/asm-ia64/system.h
• Orig date: Tue Mar 6 19:44:34 2001

diff -u --recursive --new-file v2.4.3/linux/include/asm-ia64/system.h linux/include/asm-ia64/system.h
@@ -7,8 +7,8 @@
  * on information published in the Processor Abstraction Layer
  * and the System Abstraction Layer manual.
  *
- * Copyright (C) 1998-2000 Hewlett-Packard Co
- * Copyright (C) 1998-2000 David Mosberger-Tang <davidm@hpl.hp.com>
+ * Copyright (C) 1998-2001 Hewlett-Packard Co
+ * Copyright (C) 1998-2001 David Mosberger-Tang <davidm@hpl.hp.com>
  * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
  * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
  */
@@ -16,16 +16,18 @@
 
 #include <asm/page.h>
 
-#define KERNEL_START		(PAGE_OFFSET + 0x500000)
+#define KERNEL_START		(PAGE_OFFSET + 68*1024*1024)
 
 /*
  * The following #defines must match with vmlinux.lds.S:
  */
+#define IVT_ADDR		(KERNEL_START)
 #define IVT_END_ADDR		(KERNEL_START + 0x8000)
-#define ZERO_PAGE_ADDR		(IVT_END_ADDR + 0*PAGE_SIZE)
-#define SWAPPER_PGD_ADDR	(IVT_END_ADDR + 1*PAGE_SIZE)
+#define ZERO_PAGE_ADDR		PAGE_ALIGN(IVT_END_ADDR)
+#define SWAPPER_PGD_ADDR	(ZERO_PAGE_ADDR + 1*PAGE_SIZE)
 
 #define GATE_ADDR		(0xa000000000000000 + PAGE_SIZE)
+#define PERCPU_ADDR		(0xa000000000000000 + 2*PAGE_SIZE)
 
 #if defined(CONFIG_ITANIUM_ASTEP_SPECIFIC) \
     || defined(CONFIG_ITANIUM_B0_SPECIFIC) || defined(CONFIG_ITANIUM_B1_SPECIFIC)
@@ -62,12 +64,10 @@
 		__u16 orig_x;	/* cursor's x position */
 		__u16 orig_y;	/* cursor's y position */
 	} console_info;
-	__u16 num_pci_vectors;	/* number of ACPI derived PCI IRQ's*/
-	__u64 pci_vectors;	/* physical address of PCI data (pci_vector_struct)*/
 	__u64 fpswa;		/* physical address of the fpswa interface */
 	__u64 initrd_start;
 	__u64 initrd_size;
-} ia64_boot_param;
+} *ia64_boot_param;
 
 static inline void
 ia64_insn_group_barrier (void)
@@ -181,50 +181,9 @@
 #define __save_flags(flags)	__asm__ __volatile__ ("mov %0=psr" : "=r" (flags) :: "memory")
 #define __save_and_cli(flags)	local_irq_save(flags)
 #define save_and_cli(flags)	__save_and_cli(flags)
-
-
-#ifdef CONFIG_IA64_SOFTSDV_HACKS
-/*
- * Yech.  SoftSDV has a slight probem with psr.i and itc/itm.  If
- * PSR.i = 0 and ITC == ITM, you don't get the timer tick posted.  So,
- * I'll check if ITC is larger than ITM here and reset if neccessary.
- * I may miss a tick to two.
- * 
- * Don't include asm/delay.h; it causes include loops that are
- * mind-numbingly hard to follow.
- */
-
-#define get_itc(x) __asm__ __volatile__("mov %0=ar.itc" : "=r"((x)) :: "memory")
-#define get_itm(x) __asm__ __volatile__("mov %0=cr.itm" : "=r"((x)) :: "memory")
-#define set_itm(x) __asm__ __volatile__("mov cr.itm=%0" :: "r"((x)) : "memory")
-
-#define __restore_flags(x)			\
-do {						\
-        unsigned long itc, itm;			\
-	local_irq_restore(x);			\
-        get_itc(itc);				\
-        get_itm(itm);				\
-        if (itc > itm)				\
-		set_itm(itc + 10);		\
-} while (0)
-
-#define __sti()					\
-do {						\
-	unsigned long itc, itm;			\
-	local_irq_enable();			\
-	get_itc(itc);				\
-	get_itm(itm);				\
-	if (itc > itm)				\
-		set_itm(itc + 10);		\
-} while (0)
-
-#else /* !CONFIG_IA64_SOFTSDV_HACKS */
-
 #define __sti()			local_irq_enable ()
 #define __restore_flags(flags)	local_irq_restore(flags)
 
-#endif /* !CONFIG_IA64_SOFTSDV_HACKS */
-
 #ifdef CONFIG_SMP
   extern void __global_cli (void);
   extern void __global_sti (void);
@@ -325,7 +284,7 @@
 #define xchg(ptr,x)							     \
   ((__typeof__(*(ptr))) __xchg ((unsigned long) (x), (ptr), sizeof(*(ptr))))
 
-/* 
+/*
  * Atomic compare and exchange.  Compare OLD with MEM, if identical,
  * store NEW in MEM.  Return the initial value in MEM.  Success is
  * indicated by comparing RETURN with OLD.
@@ -350,7 +309,7 @@
 	      case 2: _o_ = (__u16) (long) (old); break;				\
 	      case 4: _o_ = (__u32) (long) (old); break;				\
 	      case 8: _o_ = (__u64) (long) (old); break;				\
-	      default:									\
+	      default: break;								\
 	}										\
 	 __asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(_o_));				\
 	switch (size) {									\
@@ -439,7 +398,7 @@
 	(last) = ia64_switch_to((next));						\
 } while (0)
 
-#ifdef CONFIG_SMP 
+#ifdef CONFIG_SMP
   /*
    * In the SMP case, we save the fph state when context-switching
    * away from a thread that modified fph.  This way, when the thread