patch-2.4.4 linux/arch/mips/ddb5074/setup.c

• Lines: 291
• Date: Fri Apr 13 20:26:07 2001
• Orig file: v2.4.3/linux/arch/mips/ddb5074/setup.c
• Orig date: Sun Jul 9 22:18:15 2000

diff -u --recursive --new-file v2.4.3/linux/arch/mips/ddb5074/setup.c linux/arch/mips/ddb5074/setup.c
@@ -3,10 +3,7 @@
  *
  *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
  *                     Sony Software Development Center Europe (SDCE), Brussels
- *
- *  $Id: setup.c,v 1.1 2000/01/26 00:07:44 ralf Exp $
  */
-
 #include <linux/config.h>
 #include <linux/init.h>
 #include <linux/kbd_ll.h>
@@ -42,85 +39,83 @@
 extern struct ide_ops std_ide_ops;
 extern struct rtc_ops ddb_rtc_ops;
 
-static void (*back_to_prom)(void) = (void (*)(void))0xbfc00000;
+static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
 
 static void ddb_machine_restart(char *command)
 {
-    u32 t;
+	u32 t;
 
-    /* PCI cold reset */
-    t = nile4_in32(NILE4_PCICTRL+4);
-    t |= 0x40000000;
-    nile4_out32(NILE4_PCICTRL+4, t);
-    /* CPU cold reset */
-    t = nile4_in32(NILE4_CPUSTAT);
-    t |= 1;
-    nile4_out32(NILE4_CPUSTAT, t);
-    /* Call the PROM */
-    back_to_prom();
+	/* PCI cold reset */
+	t = nile4_in32(NILE4_PCICTRL + 4);
+	t |= 0x40000000;
+	nile4_out32(NILE4_PCICTRL + 4, t);
+	/* CPU cold reset */
+	t = nile4_in32(NILE4_CPUSTAT);
+	t |= 1;
+	nile4_out32(NILE4_CPUSTAT, t);
+	/* Call the PROM */
+	back_to_prom();
 }
 
 static void ddb_machine_halt(void)
 {
-    printk("DDB Vrc-5074 halted.\n");
-    do {} while (1);
+	printk("DDB Vrc-5074 halted.\n");
+	do {
+	} while (1);
 }
 
 static void ddb_machine_power_off(void)
 {
-    printk("DDB Vrc-5074 halted. Please turn off the power.\n");
-    do {} while (1);
+	printk("DDB Vrc-5074 halted. Please turn off the power.\n");
+	do {
+	} while (1);
 }
 
 extern void ddb_irq_setup(void);
 
-void (*board_time_init)(struct irqaction *irq);
+void (*board_time_init) (struct irqaction * irq);
 
 
 static void __init ddb_time_init(struct irqaction *irq)
 {
-    /* set the clock to 1 Hz */
-    nile4_out32(NILE4_T2CTRL, 1000000);
-    /* enable the General-Purpose Timer */
-    nile4_out32(NILE4_T2CTRL+4, 0x00000001);
-    /* reset timer */
-    nile4_out32(NILE4_T2CNTR, 0);
-    /* enable interrupt */
-    nile4_enable_irq(NILE4_INT_GPT);
-    i8259_setup_irq(nile4_to_irq(NILE4_INT_GPT), irq);
-    set_cp0_status(ST0_IM, IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4);
+	/* set the clock to 1 Hz */
+	nile4_out32(NILE4_T2CTRL, 1000000);
+	/* enable the General-Purpose Timer */
+	nile4_out32(NILE4_T2CTRL + 4, 0x00000001);
+	/* reset timer */
+	nile4_out32(NILE4_T2CNTR, 0);
+	/* enable interrupt */
+	nile4_enable_irq(NILE4_INT_GPT);
+	i8259_setup_irq(nile4_to_irq(NILE4_INT_GPT), irq);
+	change_cp0_status(ST0_IM,
+		          IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4);
 }
 
 void __init ddb_setup(void)
 {
-    extern int panic_timeout;
+	extern int panic_timeout;
 
-    irq_setup = ddb_irq_setup;
-    mips_io_port_base = NILE4_PCI_IO_BASE;
-    isa_slot_offset = NILE4_PCI_MEM_BASE;
-    request_region(0x00, 0x20, "dma1");
-    request_region(0x40, 0x20, "timer");
-    request_region(0x70, 0x10, "rtc");
-    request_region(0x80, 0x10, "dma page reg");
-    request_region(0xc0, 0x20, "dma2");
-    board_time_init = ddb_time_init;
-
-    _machine_restart = ddb_machine_restart;
-    _machine_halt = ddb_machine_halt;
-    _machine_power_off = ddb_machine_power_off;
+	irq_setup = ddb_irq_setup;
+	mips_io_port_base = NILE4_PCI_IO_BASE;
+	isa_slot_offset = NILE4_PCI_MEM_BASE;
+	request_region(0x00, 0x20, "dma1");
+	request_region(0x40, 0x20, "timer");
+	request_region(0x70, 0x10, "rtc");
+	request_region(0x80, 0x10, "dma page reg");
+	request_region(0xc0, 0x20, "dma2");
+	board_time_init = ddb_time_init;
+
+	_machine_restart = ddb_machine_restart;
+	_machine_halt = ddb_machine_halt;
+	_machine_power_off = ddb_machine_power_off;
 
 #ifdef CONFIG_BLK_DEV_IDE
-    ide_ops = &std_ide_ops;
+	ide_ops = &std_ide_ops;
 #endif
-    rtc_ops = &ddb_rtc_ops;
+	rtc_ops = &ddb_rtc_ops;
 
-    /* Reboot on panic */
-    panic_timeout = 180;
-}
-
-int __init page_is_ram(unsigned long pagenr)
-{
-    return 1;
+	/* Reboot on panic */
+	panic_timeout = 180;
 }
 
 
@@ -133,12 +128,12 @@
 #define NS16550_BASE		(NILE4_PCI_IO_BASE+0x03f8)
 static inline u8 ns16550_in(u32 reg)
 {
-    return *(volatile u8 *)(NS16550_BASE+reg);
+	return *(volatile u8 *) (NS16550_BASE + reg);
 }
 
 static inline void ns16550_out(u32 reg, u8 val)
 {
-    *(volatile u8 *)(NS16550_BASE+reg) = val;
+	*(volatile u8 *) (NS16550_BASE + reg) = val;
 }
 #endif
 
@@ -168,87 +163,84 @@
 void _serinit(void)
 {
 #if USE_NILE4_SERIAL
-    ns16550_out(NS16550_LCR, 0x80);
-    ns16550_out(NS16550_DLM, 0x00);
-    ns16550_out(NS16550_DLL, 0x36);	/* 9600 baud */
-    ns16550_out(NS16550_LCR, 0x00);
-    ns16550_out(NS16550_LCR, 0x03);
-    ns16550_out(NS16550_FCR, 0x47);
+	ns16550_out(NS16550_LCR, 0x80);
+	ns16550_out(NS16550_DLM, 0x00);
+	ns16550_out(NS16550_DLL, 0x36);	/* 9600 baud */
+	ns16550_out(NS16550_LCR, 0x00);
+	ns16550_out(NS16550_LCR, 0x03);
+	ns16550_out(NS16550_FCR, 0x47);
 #else
-    /* done by PMON */
+	/* done by PMON */
 #endif
 }
 
 void _putc(char c)
 {
-    while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
-    ns16550_out(NS16550_THR, c);
-    if (c == '\n') {
 	while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
-	ns16550_out(NS16550_THR, '\r');
-    }
+	ns16550_out(NS16550_THR, c);
+	if (c == '\n') {
+		while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
+		ns16550_out(NS16550_THR, '\r');
+	}
 }
 
 void _puts(const char *s)
 {
-    char c;
-    while ((c = *s++))
-	_putc(c);
+	char c;
+	while ((c = *s++))
+		_putc(c);
 }
 
 char _getc(void)
 {
-    while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_DR));
-    return ns16550_in(NS16550_RBR);
+	while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_DR));
+	return ns16550_in(NS16550_RBR);
 }
 
 int _testc(void)
 {
-    return (ns16550_in(NS16550_LSR) & NS16550_LSR_DR) != 0;
+	return (ns16550_in(NS16550_LSR) & NS16550_LSR_DR) != 0;
 }
 
 
-    /*
-     *  Hexadecimal 7-segment LED
-     */
-
+/*
+ *  Hexadecimal 7-segment LED
+ */
 void ddb5074_led_hex(int hex)
 {
-    outb(hex, 0x80);
+	outb(hex, 0x80);
 }
 
 
-    /*
-     *  LEDs D2 and D3, connected to the GPIO pins of the PMU in the ALi M1543
-     */
-
+/*
+ *  LEDs D2 and D3, connected to the GPIO pins of the PMU in the ALi M1543
+ */
 struct pci_dev *pci_pmu = NULL;
 
 void ddb5074_led_d2(int on)
 {
-    u8 t;
+	u8 t;
 
-    if (pci_pmu) {
-	pci_read_config_byte(pci_pmu, 0x7e, &t);
-	if (on)
-	    t &= 0x7f;
-	else
-	    t |= 0x80;
-	pci_write_config_byte(pci_pmu, 0x7e, t);
-    }
+	if (pci_pmu) {
+		pci_read_config_byte(pci_pmu, 0x7e, &t);
+		if (on)
+			t &= 0x7f;
+		else
+			t |= 0x80;
+		pci_write_config_byte(pci_pmu, 0x7e, t);
+	}
 }
 
 void ddb5074_led_d3(int on)
 {
-    u8 t;
+	u8 t;
 
-    if (pci_pmu) {
-	pci_read_config_byte(pci_pmu, 0x7e, &t);
-	if (on)
-	    t &= 0xbf;
-	else
-	    t |= 0x40;
-	pci_write_config_byte(pci_pmu, 0x7e, t);
-    }
+	if (pci_pmu) {
+		pci_read_config_byte(pci_pmu, 0x7e, &t);
+		if (on)
+			t &= 0xbf;
+		else
+			t |= 0x40;
+		pci_write_config_byte(pci_pmu, 0x7e, t);
+	}
 }
-