patch-2.4.3 linux/arch/alpha/kernel/core_cia.c

• Lines: 54
• Date: Fri Mar 2 11:12:07 2001
• Orig file: v2.4.2/linux/arch/alpha/kernel/core_cia.c
• Orig date: Mon Dec 11 13:46:26 2000

diff -u --recursive --new-file v2.4.2/linux/arch/alpha/kernel/core_cia.c linux/arch/alpha/kernel/core_cia.c
@@ -299,7 +299,7 @@
  */
 
 void
-cia_pci_tbi(struct pci_controler *hose, dma_addr_t start, dma_addr_t end)
+cia_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)
 {
 	wmb();
 	*(vip)CIA_IOC_PCI_TBIA = 3;	/* Flush all locked and unlocked.  */
@@ -314,7 +314,7 @@
  */
 
 static void
-cia_pci_tbi_try1(struct pci_controler *hose,
+cia_pci_tbi_try1(struct pci_controller *hose,
 		 dma_addr_t start, dma_addr_t end)
 {
 	wmb();
@@ -359,7 +359,7 @@
 }
 
 static void
-cia_pci_tbi_try2(struct pci_controler *hose,
+cia_pci_tbi_try2(struct pci_controller *hose,
 		 dma_addr_t start, dma_addr_t end)
 {
 	unsigned long flags;
@@ -595,7 +595,7 @@
 static void __init
 do_init_arch(int is_pyxis)
 {
-	struct pci_controler *hose;
+	struct pci_controller *hose;
 	int temp;
 	int cia_rev;
 
@@ -628,7 +628,7 @@
 	*(vip)CIA_IOC_HAE_IO = 0;
 
 	/* For PYXIS, we always use BWX bus and i/o accesses.  To that end,
-	   make sure they're enabled on the controler.  */
+	   make sure they're enabled on the controller.  */
 	if (is_pyxis) {
 		temp = *(vip)CIA_IOC_CIA_CNFG;
 		temp |= CIA_CNFG_IOA_BWEN;
@@ -643,7 +643,7 @@
 	 * Create our single hose.
 	 */
 
-	pci_isa_hose = hose = alloc_pci_controler();
+	pci_isa_hose = hose = alloc_pci_controller();
 	hose->io_space = &ioport_resource;
 	hose->mem_space = &iomem_resource;
 	hose->index = 0;