patch-2.4.26 linux-2.4.26/arch/x86_64/kernel/mpparse.c
Next file: linux-2.4.26/arch/x86_64/kernel/mtrr.c
Previous file: linux-2.4.26/arch/x86_64/kernel/io_apic.c
Back to the patch index
Back to the overall index
- Lines: 135
- Date:
2004-04-14 06:05:28.000000000 -0700
- Orig file:
linux-2.4.25/arch/x86_64/kernel/mpparse.c
- Orig date:
2003-11-28 10:26:19.000000000 -0800
diff -urN linux-2.4.25/arch/x86_64/kernel/mpparse.c linux-2.4.26/arch/x86_64/kernel/mpparse.c
@@ -35,6 +35,9 @@
/* Have we found an MP table */
int smp_found_config = 0;
+#ifdef CONFIG_SMP
+extern unsigned int max_cpus;
+#endif
/*
* Various Linux-internal data structures created from the
@@ -111,6 +114,20 @@
Dprintk(" Bootup CPU\n");
boot_cpu_id = m->mpc_apicid;
}
+
+#ifdef CONFIG_SMP
+ if (num_processors >= NR_CPUS) {
+ printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
+ " Processor ignored.\n", NR_CPUS);
+ return;
+ }
+ if (num_processors >= max_cpus) {
+ printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
+ " Processor ignored.\n", max_cpus);
+ return;
+ }
+#endif
+
num_processors++;
if (m->mpc_apicid > MAX_APICS) {
@@ -794,7 +811,7 @@
* erroneously sets the trigger to level, resulting in a HUGE
* increase of timer interrupts!
*/
- if ((bus_irq == 0) && (global_irq == 2) && (trigger == 3))
+ if ((bus_irq == 0) && (trigger == 3))
trigger = 1;
intsrc.mpc_type = MP_INTSRC;
@@ -815,7 +832,7 @@
* Otherwise create a new entry (e.g. global_irq == 2).
*/
for (i = 0; i < mp_irq_entries; i++) {
- if ((mp_irqs[i].mpc_dstapic == intsrc.mpc_dstapic)
+ if ((mp_irqs[i].mpc_srcbus == intsrc.mpc_srcbus)
&& (mp_irqs[i].mpc_dstirq == intsrc.mpc_dstirq)) {
mp_irqs[i] = intsrc;
found = 1;
@@ -862,9 +879,10 @@
*/
for (i = 0; i < 16; i++) {
- if (i == 2) continue; /* Don't connect IRQ2 */
+ if (i == 2)
+ continue; /* Don't connect IRQ2 */
- intsrc.mpc_irqtype = i ? mp_INT : mp_ExtINT; /* 8259A to #0 */
+ intsrc.mpc_irqtype = mp_INT;
intsrc.mpc_srcbusirq = i; /* Identity mapped */
intsrc.mpc_dstirq = i;
@@ -888,63 +906,6 @@
extern FADT_DESCRIPTOR acpi_fadt;
-void __init mp_config_ioapic_for_sci(int irq)
-{
- int ioapic;
- int ioapic_pin;
- struct acpi_table_madt* madt;
- struct acpi_table_int_src_ovr *entry = NULL;
- acpi_interrupt_flags flags;
- void *madt_end;
- acpi_status status;
-
- /*
- * Ensure that if there is an interrupt source override entry
- * for the ACPI SCI, we leave it as is. Unfortunately this involves
- * walking the MADT again.
- */
- status = acpi_get_firmware_table("APIC", 1, ACPI_LOGICAL_ADDRESSING,
- (struct acpi_table_header **) &madt);
- if (ACPI_SUCCESS(status)) {
- madt_end = (void *) (unsigned long)madt + madt->header.length;
-
- entry = (struct acpi_table_int_src_ovr *)
- ((unsigned long) madt + sizeof(struct acpi_table_madt));
-
- while ((void *) entry < madt_end) {
- if (entry->header.type == ACPI_MADT_INT_SRC_OVR &&
- acpi_fadt.sci_int == entry->bus_irq)
- goto found;
-
- entry = (struct acpi_table_int_src_ovr *)
- ((unsigned long) entry + entry->header.length);
- }
- }
- /*
- * Although the ACPI spec says that the SCI should be level/low
- * don't reprogram it unless there is an explicit MADT OVR entry
- * instructing us to do so -- otherwise we break Tyan boards which
- * have the SCI wired edge/high but no MADT OVR.
- */
- return;
-
-found:
- /*
- * See the note at the end of ACPI 2.0b section
- * 5.2.10.8 for what this is about.
- */
- flags = entry->flags;
- acpi_fadt.sci_int = entry->global_irq;
- irq = entry->global_irq;
-
- ioapic = mp_find_ioapic(irq);
-
- ioapic_pin = irq - mp_ioapic_routing[ioapic].irq_start;
-
- io_apic_set_pci_routing(ioapic, ioapic_pin, irq,
- (flags.trigger >> 1) , (flags.polarity >> 1));
-}
-
#endif /*CONFIG_ACPI_HT_ONLY*/
int acpi_tolerant;
@@ -1008,7 +969,7 @@
continue;
}
if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
- printk(KERN_DEBUG "Pin %d-%d already programmed\n",
+ Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
entry->irq = irq;
continue;
FUNET's LINUX-ADM group, linux-adm@nic.funet.fi
TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)