patch-2.4.23 linux-2.4.23/include/asm-sparc/bitops.h

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diff -urN linux-2.4.22/include/asm-sparc/bitops.h linux-2.4.23/include/asm-sparc/bitops.h
@@ -21,10 +21,14 @@
  * within the first byte. Sparc is BIG-Endian. Unless noted otherwise
  * all bit-ops return 0 if bit was previously clear and != 0 otherwise.
  */
-static __inline__ int test_and_set_bit(unsigned long nr, volatile void *addr)
+static inline int test_and_set_bit(unsigned long nr, volatile void *addr)
 {
 	register unsigned long mask asm("g2");
 	register unsigned long *ADDR asm("g1");
+	register int tmp1 asm("g3");
+	register int tmp2 asm("g4");
+	register int tmp3 asm("g5");
+	register int tmp4 asm("g7");
 
 	ADDR = ((unsigned long *) addr) + (nr >> 5);
 	mask = 1 << (nr & 31);
@@ -33,17 +37,21 @@
 	"mov	%%o7, %%g4\n\t"
 	"call	___set_bit\n\t"
 	" add	%%o7, 8, %%o7\n"
-	: "=&r" (mask)
+	: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
 	: "0" (mask), "r" (ADDR)
-	: "g3", "g4", "g5", "g7", "memory", "cc");
+	: "memory", "cc");
 
 	return mask != 0;
 }
 
-static __inline__ void set_bit(unsigned long nr, volatile void *addr)
+static inline void set_bit(unsigned long nr, volatile void *addr)
 {
 	register unsigned long mask asm("g2");
 	register unsigned long *ADDR asm("g1");
+	register int tmp1 asm("g3");
+	register int tmp2 asm("g4");
+	register int tmp3 asm("g5");
+	register int tmp4 asm("g7");
 
 	ADDR = ((unsigned long *) addr) + (nr >> 5);
 	mask = 1 << (nr & 31);
@@ -52,15 +60,19 @@
 	"mov	%%o7, %%g4\n\t"
 	"call	___set_bit\n\t"
 	" add	%%o7, 8, %%o7\n"
-	: "=&r" (mask)
+	: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
 	: "0" (mask), "r" (ADDR)
-	: "g3", "g4", "g5", "g7", "cc");
+	: "memory", "cc");
 }
 
-static __inline__ int test_and_clear_bit(unsigned long nr, volatile void *addr)
+static inline int test_and_clear_bit(unsigned long nr, volatile void *addr)
 {
 	register unsigned long mask asm("g2");
 	register unsigned long *ADDR asm("g1");
+	register int tmp1 asm("g3");
+	register int tmp2 asm("g4");
+	register int tmp3 asm("g5");
+	register int tmp4 asm("g7");
 
 	ADDR = ((unsigned long *) addr) + (nr >> 5);
 	mask = 1 << (nr & 31);
@@ -69,17 +81,21 @@
 	"mov	%%o7, %%g4\n\t"
 	"call	___clear_bit\n\t"
 	" add	%%o7, 8, %%o7\n"
-	: "=&r" (mask)
+	: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
 	: "0" (mask), "r" (ADDR)
-	: "g3", "g4", "g5", "g7", "memory", "cc");
+	: "memory", "cc");
 
 	return mask != 0;
 }
 
-static __inline__ void clear_bit(unsigned long nr, volatile void *addr)
+static inline void clear_bit(unsigned long nr, volatile void *addr)
 {
 	register unsigned long mask asm("g2");
 	register unsigned long *ADDR asm("g1");
+	register int tmp1 asm("g3");
+	register int tmp2 asm("g4");
+	register int tmp3 asm("g5");
+	register int tmp4 asm("g7");
 
 	ADDR = ((unsigned long *) addr) + (nr >> 5);
 	mask = 1 << (nr & 31);
@@ -88,15 +104,19 @@
 	"mov	%%o7, %%g4\n\t"
 	"call	___clear_bit\n\t"
 	" add	%%o7, 8, %%o7\n"
-	: "=&r" (mask)
+	: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
 	: "0" (mask), "r" (ADDR)
-	: "g3", "g4", "g5", "g7", "cc");
+	: "memory", "cc");
 }
 
-static __inline__ int test_and_change_bit(unsigned long nr, volatile void *addr)
+static inline int test_and_change_bit(unsigned long nr, volatile void *addr)
 {
 	register unsigned long mask asm("g2");
 	register unsigned long *ADDR asm("g1");
+	register int tmp1 asm("g3");
+	register int tmp2 asm("g4");
+	register int tmp3 asm("g5");
+	register int tmp4 asm("g7");
 
 	ADDR = ((unsigned long *) addr) + (nr >> 5);
 	mask = 1 << (nr & 31);
@@ -105,17 +125,21 @@
 	"mov	%%o7, %%g4\n\t"
 	"call	___change_bit\n\t"
 	" add	%%o7, 8, %%o7\n"
-	: "=&r" (mask)
+	: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
 	: "0" (mask), "r" (ADDR)
-	: "g3", "g4", "g5", "g7", "memory", "cc");
+	: "memory", "cc");
 
 	return mask != 0;
 }
 
-static __inline__ void change_bit(unsigned long nr, volatile void *addr)
+static inline void change_bit(unsigned long nr, volatile void *addr)
 {
 	register unsigned long mask asm("g2");
 	register unsigned long *ADDR asm("g1");
+	register int tmp1 asm("g3");
+	register int tmp2 asm("g4");
+	register int tmp3 asm("g5");
+	register int tmp4 asm("g7");
 
 	ADDR = ((unsigned long *) addr) + (nr >> 5);
 	mask = 1 << (nr & 31);
@@ -124,15 +148,15 @@
 	"mov	%%o7, %%g4\n\t"
 	"call	___change_bit\n\t"
 	" add	%%o7, 8, %%o7\n"
-	: "=&r" (mask)
+	: "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
 	: "0" (mask), "r" (ADDR)
-	: "g3", "g4", "g5", "g7", "cc");
+	: "memory", "cc");
 }
 
 /*
  * non-atomic versions
  */
-static __inline__ void __set_bit(int nr, volatile void *addr)
+static inline void __set_bit(int nr, volatile void *addr)
 {
 	unsigned long mask = 1UL << (nr & 0x1f);
 	unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
@@ -140,7 +164,7 @@
 	*p |= mask;
 }
 
-static __inline__ void __clear_bit(int nr, volatile void *addr)
+static inline void __clear_bit(int nr, volatile void *addr)
 {
 	unsigned long mask = 1UL << (nr & 0x1f);
 	unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
@@ -148,7 +172,7 @@
 	*p &= ~mask;
 }
 
-static __inline__ void __change_bit(int nr, volatile void *addr)
+static inline void __change_bit(int nr, volatile void *addr)
 {
 	unsigned long mask = 1UL << (nr & 0x1f);
 	unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
@@ -156,7 +180,7 @@
 	*p ^= mask;
 }
 
-static __inline__ int __test_and_set_bit(int nr, volatile void *addr)
+static inline int __test_and_set_bit(int nr, volatile void *addr)
 {
 	unsigned long mask = 1UL << (nr & 0x1f);
 	unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
@@ -166,7 +190,7 @@
 	return (old & mask) != 0;
 }
 
-static __inline__ int __test_and_clear_bit(int nr, volatile void *addr)
+static inline int __test_and_clear_bit(int nr, volatile void *addr)
 {
 	unsigned long mask = 1UL << (nr & 0x1f);
 	unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
@@ -176,7 +200,7 @@
 	return (old & mask) != 0;
 }
 
-static __inline__ int __test_and_change_bit(int nr, volatile void *addr)
+static inline int __test_and_change_bit(int nr, volatile void *addr)
 {
 	unsigned long mask = 1UL << (nr & 0x1f);
 	unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
@@ -190,13 +214,13 @@
 #define smp_mb__after_clear_bit()	do { } while(0)
 
 /* The following routine need not be atomic. */
-static __inline__ int test_bit(int nr, __const__ void *addr)
+static inline int test_bit(int nr, __const__ void *addr)
 {
 	return (1 & (((__const__ unsigned int *) addr)[nr >> 5] >> (nr & 31))) != 0;
 }
 
 /* The easy/cheese version for now. */
-static __inline__ unsigned long ffz(unsigned long word)
+static inline unsigned long ffz(unsigned long word)
 {
 	unsigned long result = 0;
 
@@ -227,7 +251,7 @@
  * 'size' bits, starting the search at bit 'offset'. This is largely based
  * on Linus's ALPHA routines, which are pretty portable BTW.
  */
-static __inline__ unsigned long find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
+static inline unsigned long find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
 {
 	unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
 	unsigned long result = offset & ~31UL;
@@ -272,7 +296,7 @@
 #define find_first_zero_bit(addr, size) \
         find_next_zero_bit((addr), (size), 0)
 
-static __inline__ int test_le_bit(int nr, __const__ void * addr)
+static inline int test_le_bit(int nr, __const__ void * addr)
 {
 	__const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
 	return (ADDR[nr >> 3] >> (nr & 7)) & 1;
@@ -281,7 +305,7 @@
 /*
  * non-atomic versions
  */
-static __inline__ void __set_le_bit(int nr, void *addr)
+static inline void __set_le_bit(int nr, void *addr)
 {
 	unsigned char *ADDR = (unsigned char *)addr;
 
@@ -289,7 +313,7 @@
 	*ADDR |= 1 << (nr & 0x07);
 }
 
-static __inline__ void __clear_le_bit(int nr, void *addr)
+static inline void __clear_le_bit(int nr, void *addr)
 {
 	unsigned char *ADDR = (unsigned char *)addr;
 
@@ -297,7 +321,7 @@
 	*ADDR &= ~(1 << (nr & 0x07));
 }
 
-static __inline__ int __test_and_set_le_bit(int nr, void *addr)
+static inline int __test_and_set_le_bit(int nr, void *addr)
 {
 	int mask, retval;
 	unsigned char *ADDR = (unsigned char *)addr;
@@ -309,7 +333,7 @@
 	return retval;
 }
 
-static __inline__ int __test_and_clear_le_bit(int nr, void *addr)
+static inline int __test_and_clear_le_bit(int nr, void *addr)
 {
 	int mask, retval;
 	unsigned char *ADDR = (unsigned char *)addr;
@@ -321,7 +345,7 @@
 	return retval;
 }
 
-static __inline__ unsigned long find_next_zero_le_bit(void *addr, unsigned long size, unsigned long offset)
+static inline unsigned long find_next_zero_le_bit(void *addr, unsigned long size, unsigned long offset)
 {
 	unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
 	unsigned long result = offset & ~31UL;

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