patch-2.4.22 linux-2.4.22/include/asm-mips/dec/kn02.h

• Lines: 76
• Date: 2003-08-25 04:44:43.000000000 -0700
• Orig file: linux-2.4.21/include/asm-mips/dec/kn02.h
• Orig date: 2002-11-28 15:53:15.000000000 -0800

diff -urN linux-2.4.21/include/asm-mips/dec/kn02.h linux-2.4.22/include/asm-mips/dec/kn02.h
@@ -8,7 +8,7 @@
  *
  * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
  * are by courtesy of Chris Fraser.
- * Copyright (C) 2002  Maciej W. Rozycki
+ * Copyright (C) 2002, 2003  Maciej W. Rozycki
  */
 #ifndef __ASM_MIPS_DEC_KN02_H
 #define __ASM_MIPS_DEC_KN02_H
@@ -19,29 +19,59 @@
 #endif
 
 #include <asm/addrspace.h>
+#include <asm/dec/ecc.h>
 
 
+#define KN02_SLOT_BASE	KSEG1ADDR(0x1fc00000)
+#define KN02_SLOT_SIZE	0x00080000
+
 /*
- * Motherboard regs (kseg1 addresses)
+ * Address ranges decoded by the "system slot" logic for onboard devices.
  */
-#define KN02_CSR_ADDR	KSEG1ADDR(0x1ff00000)	/* system control & status reg */
+#define KN02_SYS_ROM	(0*KN02_SLOT_SIZE)	/* system board ROM */
+#define KN02_RES_1	(1*KN02_SLOT_SIZE)	/* unused */
+#define KN02_CHKSYN	(2*KN02_SLOT_SIZE)	/* ECC syndrome */
+#define KN02_ERRADDR	(3*KN02_SLOT_SIZE)	/* bus error address */
+#define KN02_DZ11	(4*KN02_SLOT_SIZE)	/* DZ11 (DC7085) serial */
+#define KN02_RTC	(5*KN02_SLOT_SIZE)	/* DS1287 RTC */
+#define KN02_CSR	(6*KN02_SLOT_SIZE)	/* system ctrl & status reg */
+#define KN02_SYS_ROM_7	(7*KN02_SLOT_SIZE)	/* system board ROM (alias) */
+
 
 /*
  * Some port addresses...
  */
-#define KN02_SLOT_SIZE	0x00080000
+#define KN02_DZ11_BASE	(KN02_SLOT_BASE + KN02_DZ11)	/* DZ11 */
+#define KN02_RTC_BASE	(KN02_SLOT_BASE + KN02_RTC)	/* RTC */
+#define KN02_CSR_BASE	(KN02_SLOT_BASE + KN02_CSR)	/* CSR */
 
-#define KN02_RTC_BASE	KSEG1ADDR(0x1fe80000)
-#define KN02_DZ11_BASE	KSEG1ADDR(0x1fe00000)
 
-#define KN02_CSR_BNK32M	(1<<10)			/* 32M stride */
+/*
+ * System Control & Status Register bits.
+ */
+#define KN02_CSR_RES_28		(0xf<<28)	/* unused */
+#define KN02_CSR_PSU		(1<<27)		/* power supply unit warning */
+#define KN02_CSR_NVRAM		(1<<26)		/* ~NVRAM clear jumper */
+#define KN02_CSR_REFEVEN	(1<<25)		/* mem refresh bank toggle */
+#define KN03_CSR_NRMOD		(1<<24)		/* ~NRMOD manufact. jumper */
+#define KN03_CSR_IOINTEN	(0xff<<16)	/* IRQ mask bits */
+#define KN02_CSR_DIAGCHK	(1<<15)		/* diagn/norml ECC reads */
+#define KN02_CSR_DIAGGEN	(1<<14)		/* diagn/norml ECC writes */
+#define KN02_CSR_CORRECT	(1<<13)		/* ECC correct/check */
+#define KN02_CSR_LEDIAG		(1<<12)		/* ECC diagn. latch strobe */
+#define KN02_CSR_TXDIS		(1<<11)		/* DZ11 transmit disable */
+#define KN02_CSR_BNK32M		(1<<10)		/* 32M/8M stride */
+#define KN02_CSR_DIAGDN		(1<<9)		/* DIAGDN manufact. jumper */
+#define KN02_CSR_BAUD38		(1<<8)		/* DZ11 38/19kbps ext. rate */
+#define KN03_CSR_IOINT		(0xff<<0)	/* IRQ status bits (r/o) */
+#define KN03_CSR_LEDS		(0xff<<0)	/* ~diagnostic LEDs (w/o) */
 
 
 /*
  * CPU interrupt bits.
  */
 #define KN02_CPU_INR_RES_6	6	/* unused */
-#define KN02_CPU_INR_MEMORY	5	/* memory, I/O bus write errors */
+#define KN02_CPU_INR_BUS	5	/* memory, I/O bus read/write errors */
 #define KN02_CPU_INR_RES_4	4	/* unused */
 #define KN02_CPU_INR_RTC	3	/* DS1287 RTC */
 #define KN02_CPU_INR_CASCADE	2	/* CSR cascade */