patch-2.4.22 linux-2.4.22/arch/mips/sibyte/sb1250/time.c
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- Lines: 60
- Date:
2003-08-25 04:44:40.000000000 -0700
- Orig file:
linux-2.4.21/arch/mips/sibyte/sb1250/time.c
- Orig date:
2002-11-28 15:53:10.000000000 -0800
diff -urN linux-2.4.21/arch/mips/sibyte/sb1250/time.c linux-2.4.22/arch/mips/sibyte/sb1250/time.c
@@ -52,6 +52,7 @@
void sb1250_time_init(void)
{
int cpu = smp_processor_id();
+ int irq = K_INT_TIMER_0+cpu;
/* Only have 4 general purpose timers */
if (cpu > 3) {
@@ -63,11 +64,11 @@
do_gettimeoffset = sb1250_gettimeoffset;
}
- sb1250_mask_irq(cpu, K_INT_TIMER_0 + cpu);
+ sb1250_mask_irq(cpu, irq);
/* Map the timer interrupt to ip[4] of this cpu */
out64(IMR_IP4_VAL, KSEG1 + A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE)
- + ((K_INT_TIMER_0 + cpu)<<3));
+ + (irq<<3));
/* the general purpose timer ticks at 1 Mhz independent if the rest of the system */
/* Disable the timer and set up the count */
@@ -84,8 +85,8 @@
out64(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
- sb1250_unmask_irq(cpu, K_INT_TIMER_0 + cpu);
- sb1250_steal_irq(K_INT_TIMER_0 + cpu);
+ sb1250_unmask_irq(cpu, irq);
+ sb1250_steal_irq(irq);
/*
* This interrupt is "special" in that it doesn't use the request_irq
* way to hook the irq line. The timer interrupt is initialized early
@@ -99,8 +100,9 @@
void sb1250_timer_interrupt(struct pt_regs *regs)
{
int cpu = smp_processor_id();
+ int irq = K_INT_TIMER_0+cpu;
- kstat.irqs[cpu][K_INT_TIMER_0+cpu]++;
+ kstat.irqs[cpu][irq]++;
/* Reset the timer */
out64(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
@@ -109,13 +111,13 @@
* CPU 0 handles the global timer interrupt job
*/
if (cpu == 0) {
- ll_timer_interrupt(0, regs);
+ ll_timer_interrupt(irq, regs);
}
/*
* every CPU should do profiling and process accouting
*/
- ll_local_timer_interrupt(0, regs);
+ ll_local_timer_interrupt(irq, regs);
}
/*
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TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)