patch-2.4.22 linux-2.4.22/arch/mips/kernel/irq_cpu.c
Next file: linux-2.4.22/arch/mips/kernel/mips_ksyms.c
Previous file: linux-2.4.22/arch/mips/kernel/irq.c
Back to the patch index
Back to the overall index
- Lines: 39
- Date:
2003-08-25 04:44:40.000000000 -0700
- Orig file:
linux-2.4.21/arch/mips/kernel/irq_cpu.c
- Orig date:
2002-11-28 15:53:10.000000000 -0800
diff -urN linux-2.4.21/arch/mips/kernel/irq_cpu.c linux-2.4.22/arch/mips/kernel/irq_cpu.c
@@ -31,13 +31,13 @@
static void mips_cpu_irq_enable(unsigned int irq)
{
- clear_cp0_cause( 1 << (irq - mips_cpu_irq_base + 8));
- set_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
+ clear_c0_cause( 1 << (irq - mips_cpu_irq_base + 8));
+ set_c0_status(1 << (irq - mips_cpu_irq_base + 8));
}
static void mips_cpu_irq_disable(unsigned int irq)
{
- clear_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
+ clear_c0_status(1 << (irq - mips_cpu_irq_base + 8));
}
static unsigned int mips_cpu_irq_startup(unsigned int irq)
@@ -51,10 +51,10 @@
static void mips_cpu_irq_ack(unsigned int irq)
{
- /* although we attemp to clear the IP bit in cause reigster, I think
+ /* although we attempt to clear the IP bit in cause register, I think
* usually it is cleared by device (irq source)
*/
- clear_cp0_cause(1 << (irq - mips_cpu_irq_base + 8));
+ clear_c0_cause(1 << (irq - mips_cpu_irq_base + 8));
/* disable this interrupt - so that we safe proceed to the handler */
mips_cpu_irq_disable(irq);
@@ -62,7 +62,7 @@
static void mips_cpu_irq_end(unsigned int irq)
{
- if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
mips_cpu_irq_enable(irq);
}
FUNET's LINUX-ADM group, linux-adm@nic.funet.fi
TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)