patch-2.4.22 linux-2.4.22/arch/mips/ddb5xxx/ddb5477/pci.c

• Lines: 56
• Date: 2003-08-25 04:44:39.000000000 -0700
• Orig file: linux-2.4.21/arch/mips/ddb5xxx/ddb5477/pci.c
• Orig date: 2002-11-28 15:53:09.000000000 -0800

diff -urN linux-2.4.21/arch/mips/ddb5xxx/ddb5477/pci.c linux-2.4.22/arch/mips/ddb5xxx/ddb5477/pci.c
@@ -166,10 +166,6 @@
 	}
 }
 
-#if defined(CONFIG_DEBUG)
-extern void jsun_scan_pci_bus(void);
-extern void jsun_assign_pci_resource(void);
-#endif
 void ddb_pci_reset_bus(void)
 {
 	u32 temp;
@@ -204,6 +200,33 @@
 {
 }
 
+/* 
+ * fixup baseboard AMD chip so that tx does not underflow.
+ *	bcr_18 |= 0x0800
+ * This sets NOUFLO bit which makes tx not start until whole pkt 
+ * is fetched to the chip.
+ */
+#define	PCNET32_WIO_RDP         0x10
+#define	PCNET32_WIO_RAP		0x12
+#define	PCNET32_WIO_RESET       0x14
+#define	PCNET32_WIO_BDP         0x16
+void __init fix_amd_lance(struct pci_dev *dev)
+{
+	unsigned long ioaddr;
+	u16 temp;
+
+	ioaddr=pci_resource_start(dev, 0);
+
+	inw(ioaddr + PCNET32_WIO_RESET);		/* reset chip */
+
+ 	/* bcr_18 |= 0x0800 */
+	outw (18, ioaddr + PCNET32_WIO_RAP);
+	temp = inw (ioaddr + PCNET32_WIO_BDP);
+	temp |= 0x0800;
+	outw (18, ioaddr + PCNET32_WIO_RAP);
+	outw (temp, ioaddr + PCNET32_WIO_BDP);
+}
+
 void __init pcibios_fixup(void)
 {
 	if (mips_machtype == MACH_NEC_ROCKHOPPERII) {
@@ -241,6 +264,10 @@
 				pci_read_config_byte(dev, 0x41, &old);
 				pci_write_config_byte(dev, 0x41, old | 0xd0);
 			}
+
+			if (dev->vendor == PCI_VENDOR_ID_AMD && 
+					dev->device == PCI_DEVICE_ID_AMD_LANCE) 
+				fix_amd_lance(dev);
 		}
 
 	}