patch-2.4.22 linux-2.4.22/arch/mips/baget/bagetIRQ.S

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diff -urN linux-2.4.21/arch/mips/baget/bagetIRQ.S linux-2.4.22/arch/mips/baget/bagetIRQ.S
@@ -24,28 +24,28 @@
 	.set	push
 	.set    noreorder
 	jal	a1
-	.set    pop 
-	move	a0, sp                                          
+	.set    pop
+	move	a0, sp
 
 	la      a1, ret_from_irq
 	jr	a1
 END(bagetIRQ)
-	
+
 #define DBE_HANDLER       0x1C
-	
+
 NESTED(try_read, PT_SIZE, sp)
 	mfc0	t3, CP0_STATUS		# save flags and
 	CLI				#  disable interrupts
 
 	li	t0, KSEG2
-	sltu    t1, t0, a0              # Is it KSEG2 address ?               
-	beqz	t1, mapped              # No - already mapped !    
-					 
-	move    t0, a0		        
+	sltu    t1, t0, a0              # Is it KSEG2 address ?
+	beqz	t1, mapped              # No - already mapped !
+
+	move    t0, a0
 	ori	t0, 0xfff
 	xori    t0, 0xfff               # round address to page
 
-	ori     t1, t0, 0xf00           # prepare EntryLo (N,V,D,G) 
+	ori     t1, t0, 0xf00           # prepare EntryLo (N,V,D,G)
 
 	mfc0    t2,   CP0_ENTRYHI       # save ASID value
 	mtc0	zero, CP0_INDEX
@@ -56,15 +56,15 @@
 	tlbwi				# ... and write ones
 	nop
 	nop
-	mtc0    t2,  CP0_ENTRYHI           
-	
-mapped:		
+	mtc0    t2,  CP0_ENTRYHI
+
+mapped:
 	la	t0, exception_handlers
 	lw	t1, DBE_HANDLER(t0)	# save real handler
-	la	t2, dbe_handler			
+	la	t2, dbe_handler
 	sw	t2, DBE_HANDLER(t0)	# set temporary local handler
 	li	v0, -1			# default (failure) value
-	
+
 	li	t2, 1
 	beq	t2, a1, 1f
 	li	t2, 2
@@ -80,13 +80,13 @@
 	b	out
 
 4:	lw	v0, (a0)		# word
-	
-out:		
+
+out:
 	sw	t1, DBE_HANDLER(t0)	# restore real handler
 	mtc0	t3, CP0_STATUS		# restore CPU flags
-	jr	ra			
-	
-dbe_handler:	
+	jr	ra
+
+dbe_handler:
 	li	v0, -1			# mark our failure
 	.set	push
 	.set	noreorder

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TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)