patch-2.4.21 linux-2.4.21/include/asm-ppc/cache.h

• Lines: 40
• Date: 2003-06-13 07:51:38.000000000 -0700
• Orig file: linux-2.4.20/include/asm-ppc/cache.h
• Orig date: 2001-11-02 17:43:54.000000000 -0800

diff -urN linux-2.4.20/include/asm-ppc/cache.h linux-2.4.21/include/asm-ppc/cache.h
@@ -1,7 +1,4 @@
 /*
- * BK Id: SCCS/s.cache.h 1.10 10/18/01 15:02:09 trini
- */
-/*
  * include/asm-ppc/cache.h
  */
 #ifdef __KERNEL__
@@ -15,15 +12,15 @@
 #if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
 #define	L1_CACHE_LINE_SIZE	16
 #define LG_L1_CACHE_LINE_SIZE	4
-#define MAX_L1_COPY_PREFETCH	1
+#define MAX_COPY_PREFETCH	1
 #elif defined(CONFIG_PPC64BRIDGE)
 #define L1_CACHE_LINE_SIZE	128
 #define LG_L1_CACHE_LINE_SIZE	7
-#define MAX_L1_COPY_PREFETCH	1
+#define MAX_COPY_PREFETCH	1
 #else
 #define	L1_CACHE_LINE_SIZE  32
 #define LG_L1_CACHE_LINE_SIZE	5
-#define MAX_L1_COPY_PREFETCH	4
+#define MAX_COPY_PREFETCH	4
 #endif
 
 #define	L1_CACHE_BYTES L1_CACHE_LINE_SIZE
@@ -40,9 +37,10 @@
 		 __section__(".data.cacheline_aligned")))
 #endif
 
-#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
+#ifndef __ASSEMBLY__
 extern void flush_dcache_range(unsigned long start, unsigned long stop);
-
+extern void invalidate_dcache_range(unsigned long start, unsigned long stop);
+extern void clean_dcache_range(unsigned long start, unsigned long stop);
 #endif /* __ASSEMBLY__ */
 
 /* prep registers for L2 */