patch-2.4.21 linux-2.4.21/arch/ppc/kernel/m8xx_setup.c
Next file: linux-2.4.21/arch/ppc/kernel/misc.S
Previous file: linux-2.4.21/arch/ppc/kernel/m8260_setup.c
Back to the patch index
Back to the overall index
- Lines: 158
- Date:
2003-06-13 07:51:31.000000000 -0700
- Orig file:
linux-2.4.20/arch/ppc/kernel/m8xx_setup.c
- Orig date:
2002-11-28 15:53:11.000000000 -0800
diff -urN linux-2.4.20/arch/ppc/kernel/m8xx_setup.c linux-2.4.21/arch/ppc/kernel/m8xx_setup.c
@@ -1,6 +1,4 @@
/*
- * BK Id: %F% %I% %G% %U% %#%
- *
* linux/arch/ppc/kernel/setup.c
*
* Copyright (C) 1995 Linus Torvalds
@@ -48,6 +46,8 @@
#include "ppc8xx_pic.h"
+extern int i8259_pic_irq_offset; /* defined in arch/ppc/kernel/i8259.c */
+
static int m8xx_set_rtc_time(unsigned long time);
static unsigned long m8xx_get_rtc_time(void);
void m8xx_calibrate_decr(void);
@@ -63,9 +63,9 @@
m8xx_setup_arch(void)
{
int cpm_page;
-
+
cpm_page = (int) alloc_bootmem_pages(PAGE_SIZE);
-
+
/* Reset the Communication Processor Module.
*/
m8xx_cpm_reset(cpm_page);
@@ -73,10 +73,10 @@
#ifdef notdef
ROOT_DEV = to_kdev_t(0x0301); /* hda1 */
#endif
-
+
#ifdef CONFIG_BLK_DEV_INITRD
#if 0
- ROOT_DEV = to_kdev_t(0x0200); /* floppy */
+ ROOT_DEV = to_kdev_t(0x0200); /* floppy */
rd_prompt = 1;
rd_doload = 1;
rd_image_start = 0;
@@ -106,6 +106,9 @@
xmon(0);
#endif
machine_restart(NULL);
+
+ /* not reached */
+ for (;;);
}
/* A place holder for time base interrupts, if they are ever enabled. */
@@ -178,7 +181,8 @@
((mk_int_int_mask(DEC_INTERRUPT) << 8) |
(TBSCR_TBF | TBSCR_TBE));
- if (request_8xxirq(DEC_INTERRUPT, timebase_interrupt, 0, "tbint", NULL) != 0)
+ if (request_irq(DEC_INTERRUPT, timebase_interrupt, 0, "tbint",
+ NULL) != 0)
panic("Could not allocate timer IRQ!");
}
@@ -218,7 +222,7 @@
__asm__("mtmsr %0" : : "r" (msr) );
dummy = ((immap_t *)IMAP_ADDR)->im_clkrst.res[0];
- printk("Restart failed\n");
+ printk("Restart failed\n");
while(1);
}
@@ -241,9 +245,9 @@
bd_t *bp;
bp = (bd_t *)__res;
-
- seq_printf(m, "clock\t\t: %ldMHz\n"
- "bus clock\t: %ldMHz\n",
+
+ seq_printf(m, "clock\t\t: %dMHz\n"
+ "bus clock\t: %dMHz\n",
bp->bi_intfreq / 1000000,
bp->bi_busfreq / 1000000);
@@ -262,23 +266,26 @@
int i;
void cpm_interrupt_init(void);
- for ( i = 0 ; i < NR_SIU_INTS ; i++ )
- irq_desc[i].handler = &ppc8xx_pic;
-
- /* We could probably incorporate the CPM into the multilevel
- * interrupt structure.
- */
+ for (i = SIU_IRQ_OFFSET ; i < SIU_IRQ_OFFSET + NR_SIU_INTS ; i++)
+ irq_desc[i].handler = &ppc8xx_pic;
+
cpm_interrupt_init();
- unmask_irq(CPM_INTERRUPT);
#if defined(CONFIG_PCI)
- for ( i = NR_SIU_INTS ; i < (NR_SIU_INTS + NR_8259_INTS) ; i++ )
- irq_desc[i].handler = &i8259_pic;
- i8259_pic.irq_offset = NR_SIU_INTS;
- i8259_init();
- request_8xxirq(ISA_BRIDGE_INT, mbx_i8259_action, 0, "8259 cascade", NULL);
- enable_irq(ISA_BRIDGE_INT);
-#endif
+ for (i = I8259_IRQ_OFFSET ; i < I8259_IRQ_OFFSET + NR_8259_INTS ; i++)
+ irq_desc[i].handler = &i8259_pic;
+
+ i8259_pic_irq_offset = I8259_IRQ_OFFSET;
+ i8259_init(0);
+
+ /* The i8259 cascade interrupt must be level sensitive. */
+ ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel &=
+ ~(0x80000000 >> ISA_BRIDGE_INT);
+
+ if (request_irq(ISA_BRIDGE_INT, mbx_i8259_action, 0, "i8259 cascade",
+ NULL) != 0)
+ panic("Could not allocate 8259 IRQ!");
+#endif /* CONFIG_PCI */
}
/* -------------------------------------------------------------------- */
@@ -297,7 +304,7 @@
{
bd_t *binfo;
extern unsigned char __res[];
-
+
binfo = (bd_t *)__res;
return binfo->bi_memsize;
@@ -348,7 +355,7 @@
if ( r3 )
memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) );
-
+
#ifdef CONFIG_PCI
m8xx_setup_pci_ptrs();
#endif
@@ -363,7 +370,7 @@
#endif /* CONFIG_BLK_DEV_INITRD */
/* take care of cmd line */
if ( r6 )
- {
+ {
*(char *)(r7+KERNELBASE) = 0;
strcpy(cmd_line, (char *)(r6+KERNELBASE));
}
@@ -397,5 +404,5 @@
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
m8xx_ide_init();
-#endif
+#endif
}
FUNET's LINUX-ADM group, linux-adm@nic.funet.fi
TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)