patch-2.4.21 linux-2.4.21/arch/ia64/sn/kernel/sn2/iomv.c

• Lines: 16
• Date: 2003-06-13 07:51:31.000000000 -0700
• Orig file: linux-2.4.20/arch/ia64/sn/kernel/sn2/iomv.c
• Orig date: 2002-08-02 17:39:43.000000000 -0700

diff -urN linux-2.4.20/arch/ia64/sn/kernel/sn2/iomv.c linux-2.4.21/arch/ia64/sn/kernel/sn2/iomv.c
@@ -56,10 +56,13 @@
  * a chipset register to ensure ordering.
  *
  * On SN2, we wait for the PIO_WRITE_STATUS SHub register to clear.
+ * See PV 871084 for details about the WAR about zero value.
+ *
  */
 void
 sn2_mmiob (void)
 {
-	while ( !((volatile unsigned long) (*pda.pio_write_status_addr)) & 0x8000000000000000)
-		udelay(5);
+	while ((((volatile unsigned long) (*pda.pio_write_status_addr)) & SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK) != 
+				SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK)
+		udelay(1);
 }