patch-2.4.20 linux-2.4.20/include/asm-mips/galileo-boards/ev96100.h

• Lines: 41
• Date: Thu Nov 28 15:53:15 2002
• Orig file: linux-2.4.19/include/asm-mips/galileo-boards/ev96100.h
• Orig date: Fri Aug 2 17:39:45 2002

diff -urN linux-2.4.19/include/asm-mips/galileo-boards/ev96100.h linux-2.4.20/include/asm-mips/galileo-boards/ev96100.h
@@ -11,7 +11,7 @@
  */
 #define GT64120_BASE    (KSEG1ADDR(0x14000000))
 #define MIPS_GT_BASE    GT64120_BASE
- 
+
 /*
  *   PCI Bus allocation
  */
@@ -19,12 +19,12 @@
 #define GT_PCI_MEM_SIZE    0x02000000
 #define GT_PCI_IO_BASE     0x10000000
 #define GT_PCI_IO_SIZE     0x02000000
-#define GT_ISA_IO_BASE     PCI_IO_BASE          
+#define GT_ISA_IO_BASE     PCI_IO_BASE
 
 /*
  *   Duart I/O ports.
  */
-#define EV96100_COM1_BASE_ADDR  (0xBD000000 + 0x20) 
+#define EV96100_COM1_BASE_ADDR  (0xBD000000 + 0x20)
 #define EV96100_COM2_BASE_ADDR  (0xBD000000 + 0x00)
 
 
@@ -42,7 +42,7 @@
 
 
 /*
- * Because of an error/peculiarity in the Galileo chip, we need to swap the 
+ * Because of an error/peculiarity in the Galileo chip, we need to swap the
  * bytes when running bigendian.
  */
 
@@ -50,6 +50,6 @@
              *(volatile u32 *)(MIPS_GT_BASE+ofs) = cpu_to_le32(data)
 #define GT_READ(ofs, data)   \
              data = le32_to_cpu(*(volatile u32 *)(MIPS_GT_BASE+ofs))
-    
+
 
 #endif /* !(_MIPS_EV96100_H) */