patch-2.4.20 linux-2.4.20/include/asm-mips64/mmu_context.h
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- Lines: 22
- Date:
Thu Nov 28 15:53:15 2002
- Orig file:
linux-2.4.19/include/asm-mips64/mmu_context.h
- Orig date:
Fri Aug 2 17:39:45 2002
diff -urN linux-2.4.19/include/asm-mips64/mmu_context.h linux-2.4.20/include/asm-mips64/mmu_context.h
@@ -19,7 +19,7 @@
/*
* For the fast tlb miss handlers, we currently keep a per cpu array
* of pointers to the current pgd for each processor. Also, the proc.
- * id is stuffed into the context register. This should be changed to
+ * id is stuffed into the context register. This should be changed to
* use the processor id via current->processor, where current is stored
* in watchhi/lo. The context register should be used to contiguously
* map the page tables.
@@ -76,10 +76,10 @@
#ifndef CONFIG_SMP
mm->context = 0;
#else
- mm->context = (unsigned long)kmalloc(smp_num_cpus *
+ mm->context = (unsigned long)kmalloc(smp_num_cpus *
sizeof(unsigned long), GFP_KERNEL);
/*
- * Init the "context" values so that a tlbpid allocation
+ * Init the "context" values so that a tlbpid allocation
* happens on the first switch.
*/
if (mm->context == 0)
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