patch-2.4.20 linux-2.4.20/arch/mips/mm/pg-sb1.c

• Lines: 110
• Date: Thu Nov 28 15:53:10 2002
• Orig file: linux-2.4.19/arch/mips/mm/pg-sb1.c
• Orig date: Fri Aug 2 17:39:43 2002

diff -urN linux-2.4.19/arch/mips/mm/pg-sb1.c linux-2.4.20/arch/mips/mm/pg-sb1.c
@@ -2,7 +2,7 @@
  * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
  * Copyright (C) 2000 Sibyte
- * 
+ *
  * Written by Justin Carlson (carlson@sibyte.com)
  *
  *
@@ -15,11 +15,11 @@
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
- */ 
+ */
 #include <linux/config.h>
 #include <asm/page.h>
 
@@ -39,7 +39,7 @@
 	   performance model */
 
 	/* We prefetch 4 lines ahead.  We're also "cheating" slightly here...
-	   since we know we're on an SB1, we force the assembler to take 
+	   since we know we're on an SB1, we force the assembler to take
 	   64-bit operands to speed things up */
 	__asm__ __volatile__(
 		".set push                  \n"
@@ -47,15 +47,19 @@
 		".set noat                  \n"
 		".set mips4                 \n"
 		"     addiu     $1, %0, %2  \n"  /* Calculate the end of the page to clear */
+#ifdef CONFIG_CPU_HAS_PREFETCH
 		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",  0(%0)  \n"  /* Prefetch the first 4 lines */
-		"     pref       " SB1_PREF_STORE_STREAMED_HINT ", 32(%0)  \n"  
-		"     pref       " SB1_PREF_STORE_STREAMED_HINT ", 64(%0)  \n"  
-		"     pref       " SB1_PREF_STORE_STREAMED_HINT ", 96(%0)  \n"  
+		"     pref       " SB1_PREF_STORE_STREAMED_HINT ", 32(%0)  \n"
+		"     pref       " SB1_PREF_STORE_STREAMED_HINT ", 64(%0)  \n"
+		"     pref       " SB1_PREF_STORE_STREAMED_HINT ", 96(%0)  \n"
+#endif
 		"1:   sd        $0,  0(%0)  \n"  /* Throw out a cacheline of 0's */
 		"     sd        $0,  8(%0)  \n"
 		"     sd        $0, 16(%0)  \n"
 		"     sd        $0, 24(%0)  \n"
+#ifdef CONFIG_CPU_HAS_PREFETCH
 		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",128(%0)  \n"  /* Prefetch 4 lines ahead     */
+#endif
 		"     bne       $1, %0, 1b  \n"
 		"     addiu     %0, %0, 32  \n"  /* Next cacheline (This instruction better be short piped!) */
 		".set pop                   \n"
@@ -71,7 +75,7 @@
 
 	/* This should be optimized in assembly...can't use ld/sd, though,
 	 * because the top 32 bits could be nuked if we took an interrupt
-	 * during the routine.	And this is not a good place to be cli()'ing 
+	 * during the routine.	And this is not a good place to be cli()'ing
 	 */
 
 	/* The pref's used here are using "streaming" hints, which cause the
@@ -87,12 +91,14 @@
 		".set noat                  \n"
 		".set mips4                 \n"
 		"     addiu     $1, %0, %4  \n"  /* Calculate the end of the page to copy */
+#ifdef CONFIG_CPU_HAS_PREFETCH
 		"     pref       " SB1_PREF_LOAD_STREAMED_HINT  ",  0(%0)  \n"  /* Prefetch the first 3 lines */
-		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",  0(%1)  \n"  
+		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",  0(%1)  \n"
 		"     pref       " SB1_PREF_LOAD_STREAMED_HINT  ",  32(%0) \n"
-		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",  32(%1) \n"  
+		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",  32(%1) \n"
 		"     pref       " SB1_PREF_LOAD_STREAMED_HINT  ",  64(%0) \n"
-		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",  64(%1) \n"  
+		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",  64(%1) \n"
+#endif
 		"1:   lw        $2,  0(%0)  \n"  /* Block copy a cacheline */
 		"     lw        $3,  4(%0)  \n"
 		"     lw        $4,  8(%0)  \n"
@@ -101,22 +107,24 @@
 		"     lw        $7, 20(%0)  \n"
 		"     lw        $8, 24(%0)  \n"
 		"     lw        $9, 28(%0)  \n"
+#ifdef CONFIG_CPU_HAS_PREFETCH
 		"     pref       " SB1_PREF_LOAD_STREAMED_HINT  ", 96(%0)  \n"  /* Prefetch ahead         */
 		"     pref       " SB1_PREF_STORE_STREAMED_HINT ", 96(%1)  \n"
-		"     sw        $2,  0(%1)  \n"  
+#endif
+		"     sw        $2,  0(%1)  \n"
 		"     sw        $3,  4(%1)  \n"
 		"     sw        $4,  8(%1)  \n"
 		"     sw        $5, 12(%1)  \n"
 		"     sw        $6, 16(%1)  \n"
 		"     sw        $7, 20(%1)  \n"
 		"     sw        $8, 24(%1)  \n"
-		"     sw        $9, 28(%1)  \n"		
+		"     sw        $9, 28(%1)  \n"
 		"     addiu     %1, %1, 32  \n"  /* Next cacheline */
 		"     nop                   \n"  /* Force next add to short pipe */
 		"     nop                   \n"  /* Force next add to short pipe */
 		"     bne       $1, %0, 1b  \n"
 		"     addiu     %0, %0, 32  \n"  /* Next cacheline */
-		".set pop                   \n" 
+		".set pop                   \n"
 		:"=r" (to),
 		"=r" (from)
 		: