patch-2.4.20 linux-2.4.20/arch/mips64/kernel/r4k_switch.S
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- Lines: 59
- Date:
Thu Nov 28 15:53:10 2002
- Orig file:
linux-2.4.19/arch/mips64/kernel/r4k_switch.S
- Orig date:
Fri Aug 2 17:39:43 2002
diff -urN linux-2.4.19/arch/mips64/kernel/r4k_switch.S linux-2.4.20/arch/mips64/kernel/r4k_switch.S
@@ -10,7 +10,6 @@
*/
#include <asm/asm.h>
#include <asm/cachectl.h>
-#include <asm/current.h>
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
#include <asm/offset.h>
@@ -69,6 +68,7 @@
li t3, ST0_CU1
or t0, t3
mtc0 t0, CP0_STATUS
+ FPU_ENABLE_HAZARD
beqz a0, 2f # Save floating point state
nor t3, zero, t3
@@ -88,11 +88,11 @@
sll t0, t0, 5 # load new fp state
bgez t0, 1f
- ldc1 $f0, (THREAD_FPU + 0x00)($28)
- fpu_restore_16odd $28
+ ldc1 $f0, (THREAD_FPU + 0x00)(a1)
+ fpu_restore_16odd a1
1:
.set reorder
- fpu_restore_16even $28, t0 # clobbers t0
+ fpu_restore_16even a1, t0 # clobbers t0
3:
jr ra
END(lazy_fpu_switch)
@@ -119,15 +119,15 @@
LEAF(restore_fp)
mfc0 t0, CP0_STATUS
sll t1, t0, 5
- bgez t0, 1f # 16 register mode?
+ bgez t1, 1f # 16 register mode?
nop
- fpu_restore_16odd $28
+ fpu_restore_16odd a0
1:
- .set reorder
- fpu_restore_16even $28, t0 # clobbers t0
+ fpu_restore_16even a0, t0 # clobbers t0
jr ra
+ ldc1 $f0, (THREAD_FPU + 0x00)(a0)
END(restore_fp)
/*
@@ -145,6 +145,7 @@
li t1, ST0_CU1
or t0, t1
mtc0 t0, CP0_STATUS
+ FPU_ENABLE_HAZARD
sll t0, t0, 5
li t1, FPU_DEFAULT
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TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)