patch-2.4.19 linux-2.4.19/include/asm-mips64/unistd.h

• Lines: 631
• Date: Fri Aug 2 17:39:45 2002
• Orig file: linux-2.4.18/include/asm-mips64/unistd.h
• Orig date: Tue Nov 28 21:42:04 2000

diff -urN linux-2.4.18/include/asm-mips64/unistd.h linux-2.4.19/include/asm-mips64/unistd.h
@@ -237,11 +237,31 @@
 #define __NR_Linux32_madvise		(__NR_Linux32 + 218)
 #define __NR_Linux32_getdents64		(__NR_Linux32 + 219)
 #define __NR_Linux32_fcntl64		(__NR_Linux32 + 220)
+#define __NR_Linux32_security		(__NR_Linux32 + 221)
+#define __NR_Linux32_gettid		(__NR_Linux32 + 222)
+#define __NR_Linux32_readahead		(__NR_Linux32 + 223)
+#define __NR_Linux32_setxattr		(__NR_Linux32 + 224)
+#define __NR_Linux32_lsetxattr		(__NR_Linux32 + 225)
+#define __NR_Linux32_fsetxattr		(__NR_Linux32 + 226)
+#define __NR_Linux32_getxattr		(__NR_Linux32 + 227)
+#define __NR_Linux32_lgetxattr		(__NR_Linux32 + 228)
+#define __NR_Linux32_fgetxattr		(__NR_Linux32 + 229)
+#define __NR_Linux32_listxattr		(__NR_Linux32 + 230)
+#define __NR_Linux32_llistxattr		(__NR_Linux32 + 231)
+#define __NR_Linux32_flistxattr		(__NR_Linux32 + 232)
+#define __NR_Linux32_removexattr	(__NR_Linux32 + 233)
+#define __NR_Linux32_lremovexattr	(__NR_Linux32 + 234)
+#define __NR_Linux32_fremovexattr	(__NR_Linux32 + 235)
+#define __NR_Linux32_tkill		(__NR_Linux32 + 236)
+#define __NR_Linux32_sendfile64		(__NR_Linux32 + 237)
+#define __NR_Linux32_futex		(__NR_Linux32 + 238)
+#define __NR_Linux32_sched_setaffinity	(__NR_Linux32 + 239)
+#define __NR_Linux32_sched_getaffinity	(__NR_Linux32 + 240)
 
 /*
  * Offset of the last Linux o32 flavoured syscall
  */
-#define __NR_Linux32_syscalls		220
+#define __NR_Linux32_syscalls		240
 
 /*
  * Linux 64-bit syscalls are in the range from 5000 to 5999.
@@ -461,31 +481,54 @@
 #define __NR_mincore			(__NR_Linux + 211)
 #define __NR_madvise			(__NR_Linux + 212)
 #define __NR_getdents64			(__NR_Linux + 213)
+#define __NR__security			(__NR_Linux + 214)
+#define __NR__gettid			(__NR_Linux + 215)
+#define __NR__readahead			(__NR_Linux + 216)
+#define __NR_setxattr			(__NR_Linux + 217)
+#define __NR_lsetxattr			(__NR_Linux + 218)
+#define __NR_fsetxattr			(__NR_Linux + 219)
+#define __NR_getxattr			(__NR_Linux + 220)
+#define __NR_lgetxattr			(__NR_Linux + 221)
+#define __NR_fgetxattr			(__NR_Linux + 222)
+#define __NR_listxattr			(__NR_Linux + 223)
+#define __NR_llistxattr			(__NR_Linux + 224)
+#define __NR_flistxattr			(__NR_Linux + 225)
+#define __NR_removexattr		(__NR_Linux + 226)
+#define __NR_lremovexattr		(__NR_Linux + 227)
+#define __NR_fremovexattr		(__NR_Linux + 228)
+#define __NR_tkill			(__NR_Linux + 229)
+#define __NR_sendfile64			(__NR_Linux + 230)
+#define __NR_futex			(__NR_Linux + 231)
+#define __NR_sched_setaffinity		(__NR_Linux + 232)
+#define __NR_sched_getaffinity		(__NR_Linux + 233)
 
 /*
  * Offset of the last Linux flavoured syscall
  */
-#define __NR_Linux_syscalls		213
+#define __NR_Linux_syscalls		233
 
-#ifndef _LANGUAGE_ASSEMBLY
+#ifndef __ASSEMBLY__
 
 /* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */
 #define _syscall0(type,name) \
 type name(void) \
 { \
-long __res, __err; \
-__asm__ volatile ("li\t$2, %2\n\t" \
-		  "syscall\n\t" \
-		  "move\t%0, $2\n\t" \
-		  "move\t%1, $7" \
-                  : "=r" (__res), "=r" (__err) \
-                  : "i" (__NR_##name) \
-                  : "$2", "$7","$8","$9","$10","$11","$12","$13","$14","$15", \
-		    "$24"); \
-if (__err == 0) \
-	return (type) __res; \
-errno = __res; \
-return -1; \
+	register unsigned long __v0 asm("$2") = __NR_##name; \
+	register unsigned long __a3 asm("$7"); \
+	\
+	__asm__ volatile ( \
+	".set\tnoreorder\n\t" \
+	"li\t$2, %2\t\t\t# " #name "\n\t" \
+	"syscall\n\t" \
+	".set\treorder" \
+	: "=&r" (__v0), "=r" (__a3) \
+	: "i" (__NR_##name) \
+	: "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	if (__a3 == 0) \
+		return (type) __v0; \
+	errno = __v0; \
+	return -1; \
 }
 
 /*
@@ -495,89 +538,94 @@
 #define _syscall1(type,name,atype,a) \
 type name(atype a) \
 { \
-long __res, __err; \
-__asm__ volatile ("move\t$4, %3\n\t" \
-		  "li\t$2, %2\n\t" \
-		  "syscall\n\t" \
-		  "move\t%0, $2\n\t" \
-		  "move\t%1, $7" \
-                  : "=r" (__res), "=r" (__err) \
-                  : "i" (__NR_##name),"r" ((long)(a)) \
-                  : "$2","$4","$7","$8","$9","$10","$11","$12","$13","$14", \
-		    "$15","$24"); \
-if (__err == 0) \
-	return (type) __res; \
-errno = __res; \
-return -1; \
+	register unsigned long __v0 asm("$2") = __NR_##name; \
+	register unsigned long __a0 asm("$4") = (unsigned long) a; \
+	register unsigned long __a3 asm("$7"); \
+	\
+	__asm__ volatile ( \
+	".set\tnoreorder\n\t" \
+	"li\t$2, %3\t\t\t# " #name "\n\t" \
+	"syscall\n\t" \
+	".set\treorder" \
+	: "=&r" (__v0), "=r" (__a3) \
+	: "r" (__a0), "i" (__NR_##name) \
+	: "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	if (__a3 == 0) \
+		return (type) __v0; \
+	errno = __v0; \
+	return -1; \
 }
 
 #define _syscall2(type,name,atype,a,btype,b) \
-type name(atype a,btype b) \
+type name(atype a, btype b) \
 { \
-long __res, __err; \
-__asm__ volatile ("move\t$4, %3\n\t" \
-		  "move\t$5, %4\n\t" \
-		  "li\t$2, %2\n\t" \
-		  "syscall\n\t" \
-		  "move\t%0, $2\n\t" \
-		  "move\t%1, $7" \
-		  : "=r" (__res), "=r" (__err) \
-		  : "i" (__NR_##name),"r" ((long)(a)), \
-		                      "r" ((long)(b)) \
-		  : "$2","$4","$5","$7","$8","$9","$10","$11","$12","$13","$14","$15", \
-                    "$24"); \
-if (__err == 0) \
-	return (type) __res; \
-errno = __res; \
-return -1; \
+	register unsigned long __v0 asm("$2") = __NR_##name; \
+	register unsigned long __a0 asm("$4") = (unsigned long) a; \
+	register unsigned long __a1 asm("$5") = (unsigned long) b; \
+	register unsigned long __a3 asm("$7"); \
+	\
+	__asm__ volatile ( \
+	".set\tnoreorder\n\t" \
+	"li\t$2, %4\t\t\t# " #name "\n\t" \
+	"syscall\n\t" \
+	".set\treorder" \
+	: "=&r" (__v0), "=r" (__a3) \
+	: "r" (__a0), "r" (__a1), "i" (__NR_##name) \
+	: "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	if (__a3 == 0) \
+		return (type) __v0; \
+	errno = __v0; \
+	return -1; \
 }
 
 #define _syscall3(type,name,atype,a,btype,b,ctype,c) \
-type name (atype a, btype b, ctype c) \
+type name(atype a, btype b, ctype c) \
 { \
-long __res, __err; \
-__asm__ volatile ("move\t$4, %3\n\t" \
-                  "move\t$5, %4\n\t" \
-                  "move\t$6, %5\n\t" \
-		  "li\t$2, %2\n\t" \
-		  "syscall\n\t" \
-		  "move\t%0, $2\n\t" \
-		  "move\t%1, $7" \
-                  : "=r" (__res), "=r" (__err) \
-                  : "i" (__NR_##name),"r" ((long)(a)), \
-                                      "r" ((long)(b)), \
-                                      "r" ((long)(c)) \
-		  : "$2","$4","$5","$6","$7","$8","$9","$10","$11","$12", \
-		    "$13","$14","$15","$24"); \
-if (__err == 0) \
-	return (type) __res; \
-errno = __res; \
-return -1; \
+	register unsigned long __v0 asm("$2") = __NR_##name; \
+	register unsigned long __a0 asm("$4") = (unsigned long) a; \
+	register unsigned long __a1 asm("$5") = (unsigned long) b; \
+	register unsigned long __a2 asm("$6") = (unsigned long) c; \
+	register unsigned long __a3 asm("$7"); \
+	\
+	__asm__ volatile ( \
+	".set\tnoreorder\n\t" \
+	"li\t$2, %5\t\t\t# " #name "\n\t" \
+	"syscall\n\t" \
+	".set\treorder" \
+	: "=&r" (__v0), "=r" (__a3) \
+	: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
+	: "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	if (__a3 == 0) \
+		return (type) __v0; \
+	errno = __v0; \
+	return -1; \
 }
 
 #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
-type name (atype a, btype b, ctype c, dtype d) \
+type name(atype a, btype b, ctype c, dtype d) \
 { \
-long __res, __err; \
-__asm__ volatile ("move\t$4, %3\n\t" \
-                  "move\t$5, %4\n\t" \
-                  "move\t$6, %5\n\t" \
-                  "move\t$7, %6\n\t" \
-		  "li\t$2, %2\n\t" \
-		  "syscall\n\t" \
-		  "move\t%0, $2\n\t" \
-		  "move\t%1, $7" \
-                  : "=r" (__res), "=r" (__err) \
-                  : "i" (__NR_##name),"r" ((long)(a)), \
-                                      "r" ((long)(b)), \
-                                      "r" ((long)(c)), \
-                                      "r" ((long)(d)) \
-                  : "$2","$4","$5","$6","$7","$8","$9","$10","$11","$12", \
-		    "$13","$14","$15","$24"); \
-if (__err == 0) \
-	return (type) __res; \
-errno = __res; \
-return -1; \
+	register unsigned long __v0 asm("$2") = __NR_##name; \
+	register unsigned long __a0 asm("$4") = (unsigned long) a; \
+	register unsigned long __a1 asm("$5") = (unsigned long) b; \
+	register unsigned long __a2 asm("$6") = (unsigned long) c; \
+	register unsigned long __a3 asm("$7") = (unsigned long) d; \
+	\
+	__asm__ volatile ( \
+	".set\tnoreorder\n\t" \
+	"li\t$2, %5\t\t\t# " #name "\n\t" \
+	"syscall\n\t" \
+	".set\treorder" \
+	: "=&r" (__v0), "+r" (__a3) \
+	: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
+	: "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	if (__a3 == 0) \
+		return (type) __v0; \
+	errno = __v0; \
+	return -1; \
 }
 
 #if (_MIPS_SIM == _ABIN32) || (_MIPS_SIM == _ABI64)
@@ -585,193 +633,189 @@
 #define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
 type name (atype a,btype b,ctype c,dtype d,etype e) \
 { \
-long __res, __err; \
-__asm__ volatile ("move\t$4, %3\n\t" \
-                  "move\t$5, %4\n\t" \
-                  "move\t$6, %5\n\t" \
-                  "move\t$7, %6\n\t" \
-		  "move\t$8, %7\n\t" \
-		  "sw\t$2, 16($29)\n\t" \
-		  "li\t$2, %2\n\t" \
-		  "syscall\n\t" \
-		  "move\t%0, $2\n\t" \
-		  "move\t%1, $7" \
-                  : "=r" (__res), "=r" (__err) \
-                  : "i" (__NR_##name),"r" ((long)(a)), \
-                                      "r" ((long)(b)), \
-                                      "r" ((long)(c)), \
-                                      "r" ((long)(d)), \
-                                      "r" ((long)(e)) \
-                  : "$2","$4","$5","$6","$7","$8","$9","$10","$11","$12", \
-                    "$13","$14","$15","$24"); \
-if (__err == 0) \
-	return (type) __res; \
-errno = __res; \
-return -1; \
+	register unsigned long __v0 asm("$2") = __NR_##name; \
+	register unsigned long __a0 asm("$4") = (unsigned long) a; \
+	register unsigned long __a1 asm("$5") = (unsigned long) b; \
+	register unsigned long __a2 asm("$6") = (unsigned long) c; \
+	register unsigned long __a3 asm("$7") = (unsigned long) d; \
+	register unsigned long __a4 asm("$8") = (unsigned long) e; \
+	\
+	__asm__ volatile ( \
+	".set\tnoreorder\n\t" \
+	"li\t$2, %6\t\t\t# " #name "\n\t" \
+	"syscall\n\t" \
+	".set\treorder" \
+	: "=&r" (__v0), "+r" (__a3), "+r" (__a4) \
+	: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
+	: "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	if (__a3 == 0) \
+		return (type) __v0; \
+	errno = __v0; \
+	return -1; \
 }
 
 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
 type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
 { \
-long __res, __err; \
-__asm__ volatile ("move\t$4, %3\n\t" \
-                  "move\t$5, %4\n\t" \
-                  "move\t$6, %5\n\t" \
-                  "move\t$7, %6\n\t" \
-                  "move\t$8, %7\n\t" \
-                  "move\t$9, %8\n\t" \
-		  "li\t$2, %2\n\t" \
-		  "syscall\n\t" \
-		  "move\t%0, $2\n\t" \
-		  "move\t%1, $7" \
-                  : "=r" (__res), "=r" (__err) \
-                  : "i" (__NR_##name),"r" ((long)(a)), \
-                                      "r" ((long)(b)), \
-                                      "r" ((long)(c)), \
-                                      "r" ((long)(d)), \
-                                      "m" ((long)(e)), \
-                                      "m" ((long)(f)) \
-                  : "$2","$3","$4","$5","$6","$7","$8","$9","$10","$11", \
-                    "$12","$13","$14","$15","$24"); \
-if (__err == 0) \
-	return (type) __res; \
-errno = __res; \
-return -1; \
+	register unsigned long __v0 asm("$2") = __NR_##name; \
+	register unsigned long __a0 asm("$4") = (unsigned long) a; \
+	register unsigned long __a1 asm("$5") = (unsigned long) b; \
+	register unsigned long __a2 asm("$6") = (unsigned long) c; \
+	register unsigned long __a3 asm("$7") = (unsigned long) d; \
+	register unsigned long __a4 asm("$8") = (unsigned long) e; \
+	register unsigned long __a5 asm("$9") = (unsigned long) f; \
+	\
+	__asm__ volatile ( "" \
+	: "+r" (__a5) \
+	: \
+	: "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	__asm__ volatile ( \
+	".set\tnoreorder\n\t" \
+	"li\t$2, %6\t\t\t# " #name "\n\t" \
+	"syscall\n\t" \
+	".set\treorder" \
+	: "=&r" (__v0), "+r" (__a3), "+r" (__a4) \
+	: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
+	: "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	if (__a3 == 0) \
+		return (type) __v0; \
+	errno = __v0; \
+	return -1; \
 }
 
 #define _syscall7(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f,gtype,g) \
 type name (atype a,btype b,ctype c,dtype d,etype e,ftype f,gtype g) \
 { \
-long __res, __err; \
-__asm__ volatile ("move\t$4, %3\n\t" \
-                  "move\t$5, %4\n\t" \
-                  "move\t$6, %5\n\t" \
-                  "move\t$7, %6\n\t" \
-                  "move\t$8, %7\n\t" \
-                  "move\t$9, %8\n\t" \
-                  "move\t$10, %9\n\t" \
-		  "li\t$2, %2\n\t" \
-		  "syscall\n\t" \
-		  "move\t%0, $2\n\t" \
-		  "move\t%1, $7" \
-                  : "=r" (__res), "=r" (__err) \
-                  : "i" (__NR_##name),"r" ((long)(a)), \
-                                      "r" ((long)(b)), \
-                                      "r" ((long)(c)), \
-                                      "r" ((long)(d)), \
-                                      "r" ((long)(e)), \
-                                      "r" ((long)(f)), \
-                                      "r" ((long)(g)) \
-                  : "$2","$3","$4","$5","$6","$7","$8","$9","$10","$11", \
-                    "$12","$13","$14","$15","$24"); \
-if (__err == 0) \
-	return (type) __res; \
-errno = __res; \
-return -1; \
+	register unsigned long __v0 asm("$2") = __NR_##name; \
+	register unsigned long __a0 asm("$4") = (unsigned long) a; \
+	register unsigned long __a1 asm("$5") = (unsigned long) b; \
+	register unsigned long __a2 asm("$6") = (unsigned long) c; \
+	register unsigned long __a3 asm("$7") = (unsigned long) d; \
+	register unsigned long __a4 asm("$8") = (unsigned long) e; \
+	register unsigned long __a5 asm("$9") = (unsigned long) f; \
+	register unsigned long __a6 asm("$10") = (unsigned long) g; \
+	\
+	__asm__ volatile ( "" \
+	: "+r" (__a5), "+r" (__a6) \
+	: \
+	: "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	__asm__ volatile ( \
+	".set\tnoreorder\n\t" \
+	"li\t$2, %6\t\t\t# " #name "\n\t" \
+	"syscall\n\t" \
+	".set\treorder" \
+	: "=&r" (__v0), "+r" (__a3), "+r" (__a4) \
+	: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
+	: "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	if (__a3 == 0) \
+		return (type) __v0; \
+	errno = __v0; \
+	return -1; \
 }
 
 #else /* not N32 or 64 ABI */
 
-/* These are here for sake of fucking lusercode living in the fucking believe
-   having to fuck around with the syscall interface themselfes.  */
+/*
+ * Using those means your brain needs more than an oil change ;-)
+ */
 
 #define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
-type name (atype a,btype b,ctype c,dtype d,etype e) \
+type name(atype a, btype b, ctype c, dtype d, etype e) \
 { \
-long __res, __err; \
-__asm__ volatile ("move\t$4, %3\n\t" \
-                  "move\t$5, %4\n\t" \
-                  "move\t$6, %5\n\t" \
-		  "lw\t$2, %7\n\t" \
-                  "move\t$7, %6\n\t" \
-		  "subu\t$29, 24\n\t" \
-		  "sw\t$2, 16($29)\n\t" \
-		  "li\t$2, %2\n\t" \
-		  "syscall\n\t" \
-		  "move\t%0, $2\n\t" \
-		  "move\t%1, $7" \
-		  "addiu\t$29,24" \
-                  : "=r" (__res), "=r" (__err) \
-                  : "i" (__NR_##name),"r" ((long)(a)), \
-                                      "r" ((long)(b)), \
-                                      "r" ((long)(c)), \
-                                      "r" ((long)(d)), \
-                                      "m" ((long)(e)) \
-                  : "$2","$4","$5","$6","$7","$8","$9","$10","$11","$12", \
-                    "$13","$14","$15","$24"); \
-if (__err == 0) \
-	return (type) __res; \
-errno = __res; \
-return -1; \
+	register unsigned long __v0 asm("$2") = __NR_##name; \
+	register unsigned long __a0 asm("$4") = (unsigned long) a; \
+	register unsigned long __a1 asm("$5") = (unsigned long) b; \
+	register unsigned long __a2 asm("$6") = (unsigned long) c; \
+	register unsigned long __a3 asm("$7") = (unsigned long) d; \
+	\
+	__asm__ volatile ( \
+	".set\tnoreorder\n\t" \
+	"lw\t$2, %6\n\t" \
+	"subu\t$29, 32\n\t" \
+	"sw\t$2, 16($29)\n\t" \
+	"li\t$2, %5\t\t\t# " #name "\n\t" \
+	"syscall\n\t" \
+	"addiu\t$29, 32\n\t" \
+	".set\treorder" \
+	: "=&r" (__v0), "+r" (__a3) \
+	: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
+	  "m" ((unsigned long)e) \
+	: "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	if (__a3 == 0) \
+		return (type) __v0; \
+	errno = __v0; \
+	return -1; \
 }
 
 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
-type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
+type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \
 { \
-long __res, __err; \
-__asm__ volatile ("move\t$4, %3\n\t" \
-                  "move\t$5, %4\n\t" \
-                  "move\t$6, %5\n\t" \
-		  "lw\t$2, %7\n\t" \
-		  "lw\t$3, %8\n\t" \
-                  "move\t$7, %6\n\t" \
-		  "subu\t$29, 24\n\t" \
-		  "sw\t$2, 16($29)\n\t" \
-		  "sw\t$3, 20($29)\n\t" \
-		  "li\t$2, %2\n\t" \
-                  "syscall\n\t" \
-		  "move\t%0, $2\n\t" \
-		  "move\t%1, $7" \
-		  "addiu\t$29, 24" \
-                  : "=r" (__res), "=r" (__err) \
-                  : "i" (__NR_##name),"r" ((long)(a)), \
-                                      "r" ((long)(b)), \
-                                      "r" ((long)(c)), \
-                                      "r" ((long)(d)), \
-                                      "m" ((long)(e)), \
-                                      "m" ((long)(f)) \
-                  : "$2","$3","$4","$5","$6","$7","$8","$9","$10","$11", \
-                    "$12","$13","$14","$15","$24"); \
-if (__err == 0) \
-	return (type) __res; \
-errno = __res; \
-return -1; \
+	register unsigned long __v0 asm("$2") = __NR_##name; \
+	register unsigned long __a0 asm("$4") = (unsigned long) a; \
+	register unsigned long __a1 asm("$5") = (unsigned long) b; \
+	register unsigned long __a2 asm("$6") = (unsigned long) c; \
+	register unsigned long __a3 asm("$7") = (unsigned long) d; \
+	\
+	__asm__ volatile ( \
+	".set\tnoreorder\n\t" \
+	"lw\t$2, %6\n\t" \
+	"lw\t$8, %7\n\t" \
+	"subu\t$29, 32\n\t" \
+	"sw\t$2, 16($29)\n\t" \
+	"sw\t$8, 20($29)\n\t" \
+	"li\t$2, %5\t\t\t# " #name "\n\t" \
+	"syscall\n\t" \
+	"addiu\t$29, 32\n\t" \
+	".set\treorder" \
+	: "=&r" (__v0), "+r" (__a3) \
+	: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
+	  "m" ((unsigned long)e), "m" ((unsigned long)f) \
+	: "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	if (__a3 == 0) \
+		return (type) __v0; \
+	errno = __v0; \
+	return -1; \
 }
 
 #define _syscall7(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f,gtype,g) \
-type name (atype a,btype b,ctype c,dtype d,etype e,ftype f,gtype g) \
+type name(atype a, btype b, ctype c, dtype d, etype e, ftype f, gtype g) \
 { \
-long __res, __err; \
-__asm__ volatile ("move\t$4, %3\n\t" \
-                  "move\t$5, %4\n\t" \
-                  "move\t$6, %5\n\t" \
-		  "lw\t$2, %7\n\t" \
-		  "lw\t$3, %8\n\t" \
-                  "move\t$7, %6\n\t" \
-		  "subu\t$29, 32\n\t" \
-		  "sw\t$2, 16($29)\n\t" \
-		  "lw\t$2, %9\n\t" \
-		  "sw\t$3, 20($29)\n\t" \
-		  "sw\t$2, 24($29)\n\t" \
-		  "li\t$2, %2\n\t" \
-                  "syscall\n\t" \
-		  "move\t%0, $2\n\t" \
-		  "move\t%1, $7" \
-		  "addiu\t$29, 32" \
-                  : "=r" (__res), "=r" (__err) \
-                  : "i" (__NR_##name),"r" ((long)(a)), \
-                                      "r" ((long)(b)), \
-                                      "r" ((long)(c)), \
-                                      "r" ((long)(d)), \
-                                      "m" ((long)(e)), \
-                                      "m" ((long)(f)), \
-                                      "m" ((long)(g)) \
-                  : "$2","$3","$4","$5","$6","$7","$8","$9","$10","$11", \
-                    "$12","$13","$14","$15","$24"); \
-if (__err == 0) \
-	return (type) __res; \
-errno = __res; \
-return -1; \
+	register unsigned long __v0 asm("$2") = __NR_##name; \
+	register unsigned long __a0 asm("$4") = (unsigned long) a; \
+	register unsigned long __a1 asm("$5") = (unsigned long) b; \
+	register unsigned long __a2 asm("$6") = (unsigned long) c; \
+	register unsigned long __a3 asm("$7") = (unsigned long) d; \
+	\
+	__asm__ volatile ( \
+	".set\tnoreorder\n\t" \
+	"lw\t$2, %6\n\t" \
+	"lw\t$8, %7\n\t" \
+	"lw\t$9, %8\n\t" \
+	"subu\t$29, 32\n\t" \
+	"sw\t$2, 16($29)\n\t" \
+	"sw\t$8, 20($29)\n\t" \
+	"sw\t$9, 24($29)\n\t" \
+	"li\t$2, %5\t\t\t# " #name "\n\t" \
+	"syscall\n\t" \
+	"addiu\t$29, 32\n\t" \
+	".set\treorder" \
+	: "=&r" (__v0), "+r" (__a3) \
+	: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
+	  "m" ((unsigned long)e), "m" ((unsigned long)f), \
+	  "m" ((unsigned long)g), \
+	: "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+	\
+	if (__a3 == 0) \
+		return (type) __v0; \
+	errno = __v0; \
+	return -1; \
 }
 
 #endif
@@ -809,7 +853,7 @@
 	return waitpid(-1,wait_stat,0);
 }
 
-#endif /* !defined (__KERNEL_SYSCALLS__) */
-#endif /* !defined (_LANGUAGE_ASSEMBLY) */
+#endif /* __KERNEL_SYSCALLS__ */
+#endif /* !__ASSEMBLY__ */
 
 #endif /* _ASM_UNISTD_H */