patch-2.4.19 linux-2.4.19/include/asm-arm/arch-sa1100/assabet.h

• Lines: 77
• Date: Fri Aug 2 17:39:45 2002
• Orig file: linux-2.4.18/include/asm-arm/arch-sa1100/assabet.h
• Orig date: Thu Oct 25 13:53:54 2001

diff -urN linux-2.4.18/include/asm-arm/arch-sa1100/assabet.h linux-2.4.19/include/asm-arm/arch-sa1100/assabet.h
@@ -29,19 +29,6 @@
 #define ASSABET_BCR_BASE  0xf1000000
 #define ASSABET_BCR (*(volatile unsigned int *)(ASSABET_BCR_BASE))
 
-#define ASSABET_BCR_DB1110 \
-	(ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
-	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
-	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
-	 ASSABET_BCR_IRDA_MD0)
-
-#define ASSABET_BCR_DB1111 \
-	(ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
-	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
-	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
-	 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
-	 ASSABET_BCR_IRDA_MD0   | ASSABET_BCR_CF_RST)
-
 #define ASSABET_BCR_CF_PWR	(1<<0)	/* Compact Flash Power (1 = 3.3v, 0 = off) */
 #define ASSABET_BCR_CF_RST	(1<<1)	/* Compact Flash Reset (1 = power up reset) */
 #define ASSABET_BCR_GFX_RST	(1<<1)	/* Graphics Accelerator Reset (0 = hold reset) */
@@ -70,8 +57,15 @@
 
 extern unsigned long SCR_value;
 extern unsigned long BCR_value;
-#define ASSABET_BCR_set(x)	ASSABET_BCR = (BCR_value |= (x))
-#define ASSABET_BCR_clear(x)	ASSABET_BCR = (BCR_value &= ~(x))
+
+#ifdef CONFIG_SA1100_ASSABET
+extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set);
+#else
+#define ASSABET_BCR_frob(m,s)	do { } while (0)
+#endif
+
+#define ASSABET_BCR_set(x)	ASSABET_BCR_frob((x), (x))
+#define ASSABET_BCR_clear(x)	ASSABET_BCR_frob((x), 0)
 
 #define ASSABET_BSR_BASE	0xf1000000
 #define ASSABET_BSR (*(volatile unsigned int*)(ASSABET_BSR_BASE))
@@ -88,37 +82,27 @@
 
 /* GPIOs for which the generic definition doesn't say much */
 #define ASSABET_GPIO_RADIO_IRQ		GPIO_GPIO (14)	/* Radio interrupt request  */
-#define ASSABET_GPIO_L3_I2C_SDA		GPIO_GPIO (15)	/* L3 and SMB control ports */
 #define ASSABET_GPIO_PS_MODE_SYNC	GPIO_GPIO (16)	/* Power supply mode/sync   */
-#define ASSABET_GPIO_L3_MODE		GPIO_GPIO (17)	/* L3 mode signal with LED  */
-#define ASSABET_GPIO_L3_I2C_SCL		GPIO_GPIO (18)	/* L3 and I2C control ports */
 #define ASSABET_GPIO_STEREO_64FS_CLK	GPIO_GPIO (19)	/* SSP UDA1341 clock input  */
 #define ASSABET_GPIO_CF_IRQ		GPIO_GPIO (21)	/* CF IRQ   */
 #define ASSABET_GPIO_CF_CD		GPIO_GPIO (22)	/* CF CD */
-#define ASSABET_GPIO_UCB1300_IRQ	GPIO_GPIO (23)	/* UCB GPIO and touchscreen */
 #define ASSABET_GPIO_CF_BVD2		GPIO_GPIO (24)	/* CF BVD */
 #define ASSABET_GPIO_GFX_IRQ		GPIO_GPIO (24)	/* Graphics IRQ */
 #define ASSABET_GPIO_CF_BVD1		GPIO_GPIO (25)	/* CF BVD */
-#define ASSABET_GPIO_NEP_IRQ		GPIO_GPIO (25)	/* Neponset IRQ */
 #define ASSABET_GPIO_BATT_LOW		GPIO_GPIO (26)	/* Low battery */
 #define ASSABET_GPIO_RCLK		GPIO_GPIO (26)	/* CCLK/2  */
 
 #define ASSABET_IRQ_GPIO_CF_IRQ		IRQ_GPIO21
 #define ASSABET_IRQ_GPIO_CF_CD		IRQ_GPIO22
-#define ASSABET_IRQ_GPIO_UCB1300_IRQ	IRQ_GPIO23
 #define ASSABET_IRQ_GPIO_CF_BVD2	IRQ_GPIO24
 #define ASSABET_IRQ_GPIO_CF_BVD1	IRQ_GPIO25
-#define ASSABET_IRQ_GPIO_NEP_IRQ	IRQ_GPIO25
 
 
 /*
  * Neponset definitions: 
  */
 
-#define SA1111_BASE             (0x40000000)
-
-#define NEPONSET_ETHERNET_IRQ	MISC_IRQ0
-#define NEPONSET_USAR_IRQ	MISC_IRQ1
+#define NEPONSET_SA1111_BASE	(0x40000000)
 
 #define NEPONSET_CPLD_BASE      (0x10000000)
 #define Nep_p2v( x )            ((x) - NEPONSET_CPLD_BASE + 0xf3000000)