patch-2.4.19 linux-2.4.19/arch/sparc64/kernel/smp.c

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diff -urN linux-2.4.18/arch/sparc64/kernel/smp.c linux-2.4.19/arch/sparc64/kernel/smp.c
@@ -46,8 +46,8 @@
 volatile int __cpu_logical_map[NR_CPUS] __attribute__ ((aligned (SMP_CACHE_BYTES)));
 
 /* Please don't make this stuff initdata!!!  --DaveM */
-static unsigned char boot_cpu_id = 0;
-static int smp_activated = 0;
+static unsigned char boot_cpu_id;
+static int smp_activated;
 
 /* Kernel spinlock */
 spinlock_t kernel_flag __cacheline_aligned_in_smp = SPIN_LOCK_UNLOCKED;
@@ -167,28 +167,28 @@
 	 * purposes.  Also workaround BB_ERRATA_1 by doing a dummy
 	 * read back of %tick after writing it.
 	 */
-	__asm__ __volatile__("
-	sethi	%%hi(0x80000000), %%g1
-	ba,pt	%%xcc, 1f
-	 sllx	%%g1, 32, %%g1
-	.align	64
-1:	rd	%%tick, %%g2
-	add	%%g2, 6, %%g2
-	andn	%%g2, %%g1, %%g2
-	wrpr	%%g2, 0, %%tick
-	rdpr	%%tick, %%g0"
+	__asm__ __volatile__(
+		"sethi	%%hi(0x80000000), %%g1\n\t"
+		"ba,pt	%%xcc, 1f\n\t"
+		"sllx	%%g1, 32, %%g1\n\t"
+		".align	64\n"
+	"1:	rd	%%tick, %%g2\n\t"
+		"add	%%g2, 6, %%g2\n\t"
+		"andn	%%g2, %%g1, %%g2\n\t"
+		"wrpr	%%g2, 0, %%tick\n\t"
+		"rdpr	%%tick, %%g0"
 	: /* no outputs */
 	: /* no inputs */
 	: "g1", "g2");
 
 	if (SPARC64_USE_STICK) {
 		/* Let the user get at STICK too. */
-		__asm__ __volatile__("
-			sethi	%%hi(0x80000000), %%g1
-			sllx	%%g1, 32, %%g1
-			rd	%%asr24, %%g2
-			andn	%%g2, %%g1, %%g2
-			wr	%%g2, 0, %%asr24"
+		__asm__ __volatile__(
+			"sethi	%%hi(0x80000000), %%g1\n\t"
+			"sllx	%%g1, 32, %%g1\n\t"
+			"rd	%%asr24, %%g2\n\t"
+			"andn	%%g2, %%g1, %%g2\n\t"
+			"wr	%%g2, 0, %%asr24"
 		: /* no outputs */
 		: /* no inputs */
 		: "g1", "g2");
@@ -364,18 +364,18 @@
 	 * ADDR 0x20) for the dummy read. -DaveM
 	 */
 	tmp = 0x40;
-	__asm__ __volatile__("
-	wrpr	%1, %2, %%pstate
-	stxa	%4, [%0] %3
-	stxa	%5, [%0+%8] %3
-	add	%0, %8, %0
-	stxa	%6, [%0+%8] %3
-	membar	#Sync
-	stxa	%%g0, [%7] %3
-	membar	#Sync
-	mov	0x20, %%g1
-	ldxa	[%%g1] 0x7f, %%g0
-	membar	#Sync"
+	__asm__ __volatile__(
+	"wrpr	%1, %2, %%pstate\n\t"
+	"stxa	%4, [%0] %3\n\t"
+	"stxa	%5, [%0+%8] %3\n\t"
+	"add	%0, %8, %0\n\t"
+	"stxa	%6, [%0+%8] %3\n\t"
+	"membar	#Sync\n\t"
+	"stxa	%%g0, [%7] %3\n\t"
+	"membar	#Sync\n\t"
+	"mov	0x20, %%g1\n\t"
+	"ldxa	[%%g1] 0x7f, %%g0\n\t"
+	"membar	#Sync"
 	: "=r" (tmp)
 	: "r" (pstate), "i" (PSTATE_IE), "i" (ASI_INTR_W),
 	  "r" (data0), "r" (data1), "r" (data2), "r" (target), "r" (0x10), "0" (tmp)
@@ -602,11 +602,12 @@
 	return 0;
 }
 
-void smp_call_function_client(void)
+void smp_call_function_client(int irq, struct pt_regs *regs)
 {
 	void (*func) (void *info) = call_data->func;
 	void *info = call_data->info;
 
+	clear_softint(1 << irq);
 	if (call_data->wait) {
 		/* let initiator proceed only after completion */
 		func(info);
@@ -730,6 +731,12 @@
 	}
 }
 
+void smp_receive_signal_client(int irq, struct pt_regs *regs)
+{
+	/* Just return, rtrap takes care of the rest. */
+	clear_softint(1 << irq);
+}
+
 void smp_report_regs(void)
 {
 	smp_cross_call(&xcall_report_regs, 0, 0, 0);
@@ -897,7 +904,7 @@
 
 static atomic_t smp_capture_depth = ATOMIC_INIT(0);
 static atomic_t smp_capture_registry = ATOMIC_INIT(0);
-static unsigned long penguins_are_doing_time = 0;
+static unsigned long penguins_are_doing_time;
 
 void smp_capture(void)
 {
@@ -946,10 +953,12 @@
 extern void prom_world(int);
 extern void save_alternate_globals(unsigned long *);
 extern void restore_alternate_globals(unsigned long *);
-void smp_penguin_jailcell(void)
+void smp_penguin_jailcell(int irq, struct pt_regs *regs)
 {
 	unsigned long global_save[24];
 
+	clear_softint(1 << irq);
+
 	__asm__ __volatile__("flushw");
 	save_alternate_globals(global_save);
 	prom_world(1);
@@ -1097,21 +1106,21 @@
 	 * read back from %tick_cmpr right after writing to it. -DaveM
 	 */
 	if (!SPARC64_USE_STICK) {
-	__asm__ __volatile__("
-		rd	%%tick, %%g1
-		ba,pt	%%xcc, 1f
-		 add	%%g1, %0, %%g1
-		.align	64
-	1:	wr	%%g1, 0x0, %%tick_cmpr
-		rd	%%tick_cmpr, %%g0"
+	__asm__ __volatile__(
+		"rd	%%tick, %%g1\n\t"
+		"ba,pt	%%xcc, 1f\n\t"
+		" add	%%g1, %0, %%g1\n\t"
+		".align	64\n"
+	"1:	wr	%%g1, 0x0, %%tick_cmpr\n\t"
+		"rd	%%tick_cmpr, %%g0"
 	: /* no outputs */
 	: "r" (current_tick_offset)
 	: "g1");
 	} else {
-	__asm__ __volatile__("
-		rd	%%asr24, %%g1
-		add	%%g1, %0, %%g1
-		wr	%%g1, 0x0, %%asr25"
+	__asm__ __volatile__(
+		"rd	%%asr24, %%g1\n\t"
+		"add	%%g1, %0, %%g1\n\t"
+		"wr	%%g1, 0x0, %%asr25"
 	: /* no outputs */
 	: "r" (current_tick_offset)
 	: "g1");

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