patch-2.4.19 linux-2.4.19/arch/ia64/sn/io/pci_bus_cvlink.c
Next file: linux-2.4.19/arch/ia64/sn/io/pci_dma.c
Previous file: linux-2.4.19/arch/ia64/sn/io/pci.c
Back to the patch index
Back to the overall index
- Lines: 644
- Date:
Fri Aug 2 17:39:43 2002
- Orig file:
linux-2.4.18/arch/ia64/sn/io/pci_bus_cvlink.c
- Orig date:
Thu Apr 12 12:16:35 2001
diff -urN linux-2.4.18/arch/ia64/sn/io/pci_bus_cvlink.c linux-2.4.19/arch/ia64/sn/io/pci_bus_cvlink.c
@@ -4,19 +4,21 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1992 - 1997, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2000 by Colin Ngam
+ * Copyright (C) 1992 - 1997, 2000-2002 Silicon Graphics, Inc. All rights reserved.
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/pci.h>
+#include <linux/pci_ids.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <asm/sn/types.h>
#include <asm/sn/hack.h>
#include <asm/sn/sgi.h>
-#include <asm/sn/iobus.h>
+#include <asm/sn/io.h>
+#include <asm/sn/driver.h>
#include <asm/sn/iograph.h>
#include <asm/param.h>
#include <asm/sn/pio.h>
@@ -26,20 +28,19 @@
#include <asm/sn/invent.h>
#include <asm/sn/hcl.h>
#include <asm/sn/hcl_util.h>
-#include <asm/sn/agent.h>
#include <asm/sn/intr.h>
#include <asm/sn/xtalk/xtalkaddrs.h>
#include <asm/sn/klconfig.h>
-#include <asm/sn/io.h>
-
+#include <asm/sn/nodepda.h>
#include <asm/sn/pci/pciio.h>
-// #include <sys/ql.h>
#include <asm/sn/pci/pcibr.h>
#include <asm/sn/pci/pcibr_private.h>
-extern int bridge_rev_b_data_check_disable;
#include <asm/sn/pci/pci_bus_cvlink.h>
+#include <asm/sn/simulator.h>
+#include <asm/sn/sn_cpuid.h>
+
+extern int bridge_rev_b_data_check_disable;
-#define MAX_PCI_XWIDGET 256
devfs_handle_t busnum_to_pcibr_vhdl[MAX_PCI_XWIDGET];
nasid_t busnum_to_nid[MAX_PCI_XWIDGET];
void * busnum_to_atedmamaps[MAX_PCI_XWIDGET];
@@ -49,11 +50,13 @@
static int pci_bus_map_create(devfs_handle_t xtalk);
devfs_handle_t devfn_to_vertex(unsigned char busnum, unsigned int devfn);
-#define SN1_IOPORTS_UNIT 256
+#define SN_IOPORTS_UNIT 256
#define MAX_IOPORTS 0xffff
-#define MAX_IOPORTS_CHUNKS (MAX_IOPORTS / SN1_IOPORTS_UNIT)
+#define MAX_IOPORTS_CHUNKS (MAX_IOPORTS / SN_IOPORTS_UNIT)
struct ioports_to_tlbs_s ioports_to_tlbs[MAX_IOPORTS_CHUNKS];
-unsigned long sn1_allocate_ioports(unsigned long pci_address);
+unsigned long sn_allocate_ioports(unsigned long pci_address);
+
+extern void sn_init_irq_desc(void);
@@ -104,7 +107,7 @@
int func = 0;
char name[16];
devfs_handle_t pci_bus = NULL;
- devfs_handle_t device_vertex = NULL;
+ devfs_handle_t device_vertex = (devfs_handle_t)NULL;
/*
* Go get the pci bus vertex.
@@ -112,9 +115,9 @@
pci_bus = pci_bus_to_vertex(busnum);
if (!pci_bus) {
/*
- * During probing, the Linux pci code invents non existant
+ * During probing, the Linux pci code invents non-existent
* bus numbers and pci_dev structures and tries to access
- * them to determine existance. Don't crib during probing.
+ * them to determine existence. Don't crib during probing.
*/
if (done_probing)
printk("devfn_to_vertex: Invalid bus number %d given.\n", busnum);
@@ -129,11 +132,25 @@
slot = PCI_SLOT(devfn);
func = PCI_FUNC(devfn);
- if (func == 0)
+ /*
+ * For a NON Multi-function card the name of the device looks like:
+ * ../pci/1, ../pci/2 ..
+ */
+ if (func == 0) {
sprintf(name, "%d", slot);
- else
- sprintf(name, "%d%c", slot, 'a'+func);
-
+ if (hwgraph_traverse(pci_bus, name, &device_vertex) ==
+ GRAPH_SUCCESS) {
+ if (device_vertex) {
+ return(device_vertex);
+ }
+ }
+ }
+
+ /*
+ * This maybe a multifunction card. It's names look like:
+ * ../pci/1a, ../pci/1b, etc.
+ */
+ sprintf(name, "%d%c", slot, 'a'+func);
if (hwgraph_traverse(pci_bus, name, &device_vertex) != GRAPH_SUCCESS) {
if (!device_vertex) {
return(NULL);
@@ -144,12 +161,42 @@
}
/*
+ * For the given device, initialize the addresses for both the Device(x) Flush
+ * Write Buffer register and the Xbow Flush Register for the port the PCI bus
+ * is connected.
+ */
+static void
+set_flush_addresses(struct pci_dev *device_dev,
+ struct sn_device_sysdata *device_sysdata)
+{
+ pciio_info_t pciio_info = pciio_info_get(device_sysdata->vhdl);
+ pciio_slot_t pciio_slot = pciio_info_slot_get(pciio_info);
+ pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
+ bridge_t *bridge = pcibr_soft->bs_base;
+
+ device_sysdata->dma_buf_sync = (volatile unsigned int *)
+ &(bridge->b_wr_req_buf[pciio_slot].reg);
+ device_sysdata->xbow_buf_sync = (volatile unsigned int *)
+ XBOW_PRIO_LINKREGS_PTR(NODE_SWIN_BASE(get_nasid(), 0),
+ pcibr_soft->bs_xid);
+#ifdef DEBUG
+
+ printk("set_flush_addresses: dma_buf_sync %p xbow_buf_sync %p\n",
+ device_sysdata->dma_buf_sync, device_sysdata->xbow_buf_sync);
+
+ while((volatile unsigned int )*device_sysdata->dma_buf_sync);
+ while((volatile unsigned int )*device_sysdata->xbow_buf_sync);
+#endif
+
+}
+
+/*
* Most drivers currently do not properly tell the arch specific pci dma
* interfaces whether they can handle A64. Here is where we privately
* keep track of this.
*/
static void __init
-set_sn1_pci64(struct pci_dev *dev)
+set_sn_pci64(struct pci_dev *dev)
{
unsigned short vendor = dev->vendor;
unsigned short device = dev->device;
@@ -172,7 +219,7 @@
}
/*
- * sn1_allocate_ioports() - This routine provides the allocation and
+ * sn_allocate_ioports() - This routine provides the allocation and
* mappings between Linux style IOPORTs management.
*
* For simplicity sake, SN1 will allocate IOPORTs in chunks of
@@ -189,9 +236,9 @@
* Address. This address via the tlb entries generates the PCI Address
* allocated by the SN1 IO Infrastructure Layer.
*/
-static unsigned long sn1_ioport_num = 0x100; /* Reserve room for Legacy stuff */
+static unsigned long sn_ioport_num = 0x1000; /* Reserve room for Legacy stuff */
unsigned long
-sn1_allocate_ioports(unsigned long pci_address)
+sn_allocate_ioports(unsigned long pci_address)
{
unsigned long ioport_index;
@@ -199,8 +246,8 @@
/*
* Just some idiot checking ..
*/
- if ( sn1_ioport_num > 0xffff ) {
- printk("sn1_allocate_ioports: No more IO PORTS available\n");
+ if ( sn_ioport_num > 0xffff ) {
+ printk("sn_allocate_ioports: No more IO PORTS available\n");
return(-1);
}
@@ -208,51 +255,64 @@
* See Section 4.1.1.5 of Intel IA-64 Acrchitecture Software Developer's
* Manual for details.
*/
- ioport_index = sn1_ioport_num / SN1_IOPORTS_UNIT;
- ioports_to_tlbs[ioport_index].ppn = pci_address;
+ ioport_index = sn_ioport_num / SN_IOPORTS_UNIT;
+
ioports_to_tlbs[ioport_index].p = 1; /* Present Bit */
- ioports_to_tlbs[ioport_index].ma = 5; /* Memory Attributes */
- ioports_to_tlbs[ioport_index].a = 0; /* Set Data Access Bit Fault */
- ioports_to_tlbs[ioport_index].d = 0; /* Dirty Bit */
- ioports_to_tlbs[ioport_index].pl = 3;/* Privilege Level - All levels can R/W*/
- ioports_to_tlbs[ioport_index].ar = 2; /* Access Rights - R/W only*/
+ ioports_to_tlbs[ioport_index].rv_1 = 0; /* 1 Bit */
+ ioports_to_tlbs[ioport_index].ma = 4; /* Memory Attributes 3 bits*/
+ ioports_to_tlbs[ioport_index].a = 1; /* Set Data Access Bit Fault 1 Bit*/
+ ioports_to_tlbs[ioport_index].d = 1; /* Dirty Bit */
+ ioports_to_tlbs[ioport_index].pl = 0;/* Privilege Level - All levels can R/W*/
+ ioports_to_tlbs[ioport_index].ar = 3; /* Access Rights - R/W only*/
+ ioports_to_tlbs[ioport_index].ppn = pci_address >> 12; /* 4K page size */
ioports_to_tlbs[ioport_index].ed = 0; /* Exception Deferral Bit */
ioports_to_tlbs[ioport_index].ig = 0; /* Ignored */
- printk("sn1_allocate_ioports: ioport_index 0x%x ioports_to_tlbs 0x%p\n", ioport_index, ioports_to_tlbs[ioport_index].ppn);
+ /* printk("sn_allocate_ioports: ioport_index 0x%x ioports_to_tlbs 0x%p\n", ioport_index, ioports_to_tlbs[ioport_index]); */
- sn1_ioport_num += SN1_IOPORTS_UNIT;
+ sn_ioport_num += SN_IOPORTS_UNIT;
- return(sn1_ioport_num - SN1_IOPORTS_UNIT);
+ return(sn_ioport_num - SN_IOPORTS_UNIT);
}
/*
- * sn1_pci_fixup() - This routine is called when platform_pci_fixup() is
+ * sn_pci_fixup() - This routine is called when platform_pci_fixup() is
* invoked at the end of pcibios_init() to link the Linux pci
* infrastructure to SGI IO Infrasturcture - ia64/kernel/pci.c
*
* Other platform specific fixup can also be done here.
*/
void
-sn1_pci_fixup(int arg)
+sn_pci_fixup(int arg)
{
struct list_head *ln;
struct pci_bus *pci_bus = NULL;
struct pci_dev *device_dev = NULL;
- struct sn1_widget_sysdata *widget_sysdata;
- struct sn1_device_sysdata *device_sysdata;
+ struct sn_widget_sysdata *widget_sysdata;
+ struct sn_device_sysdata *device_sysdata;
+#ifdef SN_IOPORTS
unsigned long ioport;
+#endif
pciio_intr_t intr_handle;
int cpuid, bit;
- devfs_handle_t *device_vertex;
+ devfs_handle_t device_vertex;
pciio_intr_line_t lines;
- extern void sn1_pci_find_bios(void);
-
+ extern void sn_pci_find_bios(void);
+#ifdef CONFIG_IA64_SGI_SN2
+ extern int numnodes;
+ int cnode;
+#endif /* CONFIG_IA64_SGI_SN2 */
-unsigned long res;
if (arg == 0) {
- sn1_pci_find_bios();
+ sn_init_irq_desc();
+ sn_pci_find_bios();
+#ifdef CONFIG_IA64_SGI_SN2
+ for (cnode = 0; cnode < numnodes; cnode++) {
+ extern void intr_init_vecblk(nodepda_t *npda, cnodeid_t, int);
+ intr_init_vecblk(NODEPDA(cnode), cnode, 0);
+ }
+#endif /* CONFIG_IA64_SGI_SN2 */
return;
}
@@ -274,19 +334,12 @@
#endif
done_probing = 1;
- if ( IS_RUNNING_ON_SIMULATOR() ) {
- printk("sn1_pci_fixup not supported on simulator.\n");
- return;
- }
-
-#ifdef REAL_HARDWARE
-
/*
* Initialize the pci bus vertex in the pci_bus struct.
*/
for( ln = pci_root_buses.next; ln != &pci_root_buses; ln = ln->next) {
pci_bus = pci_bus_b(ln);
- widget_sysdata = kmalloc(sizeof(struct sn1_widget_sysdata),
+ widget_sysdata = kmalloc(sizeof(struct sn_widget_sysdata),
GFP_KERNEL);
widget_sysdata->vhdl = pci_bus_to_vertex(pci_bus->number);
pci_bus->sysdata = (void *)widget_sysdata;
@@ -296,8 +349,35 @@
* set the root start and end so that drivers calling check_region()
* won't see a conflict
*/
- ioport_resource.start |= IO_SWIZ_BASE;
- ioport_resource.end |= (HSPEC_SWIZ_BASE-1);
+#ifdef SN_IOPORTS
+ ioport_resource.start = sn_ioport_num;
+ ioport_resource.end = 0xffff;
+#else
+#if defined(CONFIG_IA64_SGI_SN1)
+ if ( IS_RUNNING_ON_SIMULATOR() ) {
+ /*
+ * IDE legacy IO PORTs are supported in Medusa.
+ * Just open up IO PORTs from 0 .. ioport_resource.end.
+ */
+ ioport_resource.start = 0;
+ } else {
+ /*
+ * We do not support Legacy IO PORT numbers.
+ */
+ ioport_resource.start |= IO_SWIZ_BASE | __IA64_UNCACHED_OFFSET;
+ }
+ ioport_resource.end |= (HSPEC_SWIZ_BASE-1) | __IA64_UNCACHED_OFFSET;
+#else
+ // Need something here for sn2.... ZXZXZX
+#endif
+#endif
+
+ /*
+ * Set the root start and end for Mem Resource.
+ */
+ iomem_resource.start = 0;
+ iomem_resource.end = 0xffffffffffffffff;
+
/*
* Initialize the device vertex in the pci_dev struct.
*/
@@ -307,6 +387,7 @@
u16 cmd;
devfs_handle_t vhdl;
unsigned long size;
+ extern int bit_pos_to_irq(int);
if (device_dev->vendor == PCI_VENDOR_ID_SGI &&
device_dev->device == PCI_DEVICE_ID_SGI_IOC3) {
@@ -316,12 +397,18 @@
/* Set the device vertex */
- device_sysdata = kmalloc(sizeof(struct sn1_device_sysdata),
+ device_sysdata = kmalloc(sizeof(struct sn_device_sysdata),
GFP_KERNEL);
device_sysdata->vhdl = devfn_to_vertex(device_dev->bus->number, device_dev->devfn);
device_sysdata->isa64 = 0;
+ /*
+ * Set the xbridge Device(X) Write Buffer Flush and Xbow Flush
+ * register addresses.
+ */
+ (void) set_flush_addresses(device_dev, device_sysdata);
+
device_dev->sysdata = (void *) device_sysdata;
- set_sn1_pci64(device_dev);
+ set_sn_pci64(device_dev);
pci_read_config_word(device_dev, PCI_COMMAND, &cmd);
/*
@@ -336,11 +423,8 @@
size = device_dev->resource[idx].end -
device_dev->resource[idx].start;
if (size) {
- res = 0;
- res = pciio_config_get(vhdl, (unsigned) PCI_BASE_ADDRESS_0 + idx, 4);
device_dev->resource[idx].start = (unsigned long)pciio_pio_addr(vhdl, 0, PCIIO_SPACE_WIN(idx), 0, size, 0, PCIIO_BYTE_STREAM);
-
-/* printk("sn1_pci_fixup: Mapped Address = 0x%p size = 0x%x\n", device_dev->resource[idx].start, size); */
+ device_dev->resource[idx].start |= __IA64_UNCACHED_OFFSET;
}
else
continue;
@@ -348,6 +432,7 @@
device_dev->resource[idx].end =
device_dev->resource[idx].start + size;
+#ifdef CONFIG_IA64_SGI_SN1
/*
* Adjust the addresses to go to the SWIZZLE ..
*/
@@ -355,15 +440,25 @@
device_dev->resource[idx].start & 0xfffff7ffffffffff;
device_dev->resource[idx].end =
device_dev->resource[idx].end & 0xfffff7ffffffffff;
- res = 0;
- res = pciio_config_get(vhdl, (unsigned) PCI_BASE_ADDRESS_0 + idx, 4);
+#endif
+
if (device_dev->resource[idx].flags & IORESOURCE_IO) {
cmd |= PCI_COMMAND_IO;
- ioport = sn1_allocate_ioports(device_dev->resource[idx].start);
- /* device_dev->resource[idx].start = ioport; */
- /* device_dev->resource[idx].end = ioport + SN1_IOPORTS_UNIT */
+#ifdef SN_IOPORTS
+ ioport = sn_allocate_ioports(device_dev->resource[idx].start);
+ if (ioport < 0) {
+ printk("sn_pci_fixup: PCI Device 0x%x on PCI Bus %d not mapped to IO PORTs .. IO PORTs exhausted\n", device_dev->devfn, device_dev->bus->number);
+ continue;
+ }
+ pciio_config_set(vhdl, (unsigned) PCI_BASE_ADDRESS_0 + (idx * 4), 4, (res + (ioport & 0xfff)));
+
+printk("sn_pci_fixup: ioport number %d mapped to pci address 0x%lx\n", ioport, (res + (ioport & 0xfff)));
+
+ device_dev->resource[idx].start = ioport;
+ device_dev->resource[idx].end = ioport + SN_IOPORTS_UNIT;
+#endif
}
- else if (device_dev->resource[idx].flags & IORESOURCE_MEM)
+ if (device_dev->resource[idx].flags & IORESOURCE_MEM)
cmd |= PCI_COMMAND_MEMORY;
}
/*
@@ -371,17 +466,24 @@
*/
size = device_dev->resource[PCI_ROM_RESOURCE].end -
device_dev->resource[PCI_ROM_RESOURCE].start;
- device_dev->resource[PCI_ROM_RESOURCE].start =
+
+ if (size) {
+ device_dev->resource[PCI_ROM_RESOURCE].start =
(unsigned long) pciio_pio_addr(vhdl, 0, PCIIO_SPACE_ROM, 0,
size, 0, PCIIO_BYTE_STREAM);
- device_dev->resource[PCI_ROM_RESOURCE].end =
+ device_dev->resource[PCI_ROM_RESOURCE].start |= __IA64_UNCACHED_OFFSET;
+ device_dev->resource[PCI_ROM_RESOURCE].end =
device_dev->resource[PCI_ROM_RESOURCE].start + size;
- /*
- * go through synergy swizzled space
- */
- device_dev->resource[PCI_ROM_RESOURCE].start &= 0xfffff7ffffffffffUL;
- device_dev->resource[PCI_ROM_RESOURCE].end &= 0xfffff7ffffffffffUL;
+#ifdef CONFIG_IA64_SGI_SN1
+ /*
+ * go through synergy swizzled space
+ */
+ device_dev->resource[PCI_ROM_RESOURCE].start &= 0xfffff7ffffffffffUL;
+ device_dev->resource[PCI_ROM_RESOURCE].end &= 0xfffff7ffffffffffUL;
+#endif
+
+ }
/*
* Update the Command Word on the Card.
@@ -390,29 +492,46 @@
/* bit gets dropped .. no harm */
pci_write_config_word(device_dev, PCI_COMMAND, cmd);
- pci_read_config_byte(device_dev, PCI_INTERRUPT_PIN, &lines);
-#ifdef BRINGUP
+ pci_read_config_byte(device_dev, PCI_INTERRUPT_PIN, (unsigned char *)&lines);
if (device_dev->vendor == PCI_VENDOR_ID_SGI &&
device_dev->device == PCI_DEVICE_ID_SGI_IOC3 ) {
lines = 1;
}
-
-#endif
- device_sysdata = (struct sn1_device_sysdata *)device_dev->sysdata;
+ device_sysdata = (struct sn_device_sysdata *)device_dev->sysdata;
device_vertex = device_sysdata->vhdl;
intr_handle = pciio_intr_alloc(device_vertex, NULL, lines, device_vertex);
bit = intr_handle->pi_irq;
cpuid = intr_handle->pi_cpu;
+#ifdef CONFIG_IA64_SGI_SN1
irq = bit_pos_to_irq(bit);
+#else /* SN2 */
+ irq = bit;
+#endif
irq = irq + (cpuid << 8);
- pciio_intr_connect(intr_handle, NULL, NULL, NULL);
+ pciio_intr_connect(intr_handle);
device_dev->irq = irq;
+#ifdef ajmtestintr
+ {
+ int slot = PCI_SLOT(device_dev->devfn);
+ static int timer_set = 0;
+ pcibr_intr_t pcibr_intr = (pcibr_intr_t)intr_handle;
+ pcibr_soft_t pcibr_soft = pcibr_intr->bi_soft;
+ extern void intr_test_handle_intr(int, void*, struct pt_regs *);
+
+ if (!timer_set) {
+ intr_test_set_timer();
+ timer_set = 1;
+ }
+ intr_test_register_irq(irq, pcibr_soft, slot);
+ request_irq(irq, intr_test_handle_intr,0,NULL, NULL);
+ }
+#endif
}
-#endif /* REAL_HARDWARE */
+
#if 0
{
@@ -430,6 +549,10 @@
printk("pci_fixup_ioc3: Devreg 6 0x%x\n", bridge->b_device[6].reg);
printk("pci_fixup_ioc3: Devreg 7 0x%x\n", bridge->b_device[7].reg);
}
+
+printk("testing Big Window: 0xC0000200c0000000 %p\n", *( (volatile uint64_t *)0xc0000200a0000000));
+printk("testing Big Window: 0xC0000200c0000008 %p\n", *( (volatile uint64_t *)0xc0000200a0000008));
+
#endif
}
@@ -472,12 +595,14 @@
* Loop throught this vertex and get the Xwidgets ..
*/
for (widgetnum = HUB_WIDGET_ID_MAX; widgetnum >= HUB_WIDGET_ID_MIN; widgetnum--) {
+#if 0
{
int pos;
char dname[256];
pos = devfs_generate_path(xtalk, dname, 256);
printk("%s : path= %s\n", __FUNCTION__, &dname[pos]);
}
+#endif
sprintf(pathname, "%d", widgetnum);
xwidget = NULL;
@@ -512,12 +637,12 @@
*/
master_node_vertex = device_master_get(xwidget);
if (!master_node_vertex) {
- printk("WARNING: pci_bus_map_create: Unable to get .master for vertex 0x%p\n", xwidget);
+ printk("WARNING: pci_bus_map_create: Unable to get .master for vertex 0x%p\n", (void *)xwidget);
}
hubinfo_get(master_node_vertex, &hubinfo);
if (!hubinfo) {
- printk("WARNING: pci_bus_map_create: Unable to get hubinfo for master node vertex 0x%p\n", master_node_vertex);
+ printk("WARNING: pci_bus_map_create: Unable to get hubinfo for master node vertex 0x%p\n", (void *)master_node_vertex);
return(1);
} else {
busnum_to_nid[num_bridges - 1] = hubinfo->h_nasid;
@@ -527,12 +652,12 @@
* Pre assign DMA maps needed for 32 Bits Page Map DMA.
*/
busnum_to_atedmamaps[num_bridges - 1] = (void *) kmalloc(
- sizeof(struct sn1_dma_maps_s) * 512, GFP_KERNEL);
+ sizeof(struct sn_dma_maps_s) * MAX_ATE_MAPS, GFP_KERNEL);
if (!busnum_to_atedmamaps[num_bridges - 1])
- printk("WARNING: pci_bus_map_create: Unable to precreate ATE DMA Maps for busnum %d vertex 0x%p\n", num_bridges - 1, xwidget);
+ printk("WARNING: pci_bus_map_create: Unable to precreate ATE DMA Maps for busnum %d vertex 0x%p\n", num_bridges - 1, (void *)xwidget);
memset(busnum_to_atedmamaps[num_bridges - 1], 0x0,
- sizeof(struct sn1_dma_maps_s) * 512);
+ sizeof(struct sn_dma_maps_s) * MAX_ATE_MAPS);
}
@@ -552,14 +677,10 @@
{
devfs_handle_t devfs_hdl = NULL;
- devfs_handle_t module_comp = NULL;
- devfs_handle_t node = NULL;
devfs_handle_t xtalk = NULL;
- graph_vertex_place_t placeptr = EDGE_PLACE_WANT_REAL_EDGES;
int rv = 0;
char name[256];
int master_iobrick;
- moduleid_t iobrick_id;
int i;
/*
@@ -620,65 +741,3 @@
return(0);
}
-
-/*
- * sgi_pci_intr_support -
- */
-int
-sgi_pci_intr_support (unsigned int requested_irq, device_desc_t *dev_desc,
- devfs_handle_t *bus_vertex, pciio_intr_line_t *lines,
- devfs_handle_t *device_vertex)
-
-{
-
- unsigned int bus;
- unsigned int devfn;
- struct pci_dev *pci_dev;
- unsigned char intr_pin = 0;
- struct sn1_widget_sysdata *widget_sysdata;
- struct sn1_device_sysdata *device_sysdata;
-
- if (!dev_desc || !bus_vertex || !device_vertex) {
- printk("WARNING: sgi_pci_intr_support: Invalid parameter dev_desc 0x%p, bus_vertex 0x%p, device_vertex 0x%p\n", dev_desc, bus_vertex, device_vertex);
- return(-1);
- }
-
- devfn = (requested_irq >> 8) & 0xff;
- bus = (requested_irq >> 16) & 0xffff;
- pci_dev = pci_find_slot(bus, devfn);
- widget_sysdata = (struct sn1_widget_sysdata *)pci_dev->bus->sysdata;
- *bus_vertex = widget_sysdata->vhdl;
- device_sysdata = (struct sn1_device_sysdata *)pci_dev->sysdata;
- *device_vertex = device_sysdata->vhdl;
-#if 0
- {
- int pos;
- char dname[256];
- pos = devfs_generate_path(*device_vertex, dname, 256);
- printk("%s : path= %s pos %d\n", __FUNCTION__, &dname[pos], pos);
- }
-#endif /* BRINGUP */
-
-
- /*
- * Get the Interrupt PIN.
- */
- pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &intr_pin);
- *lines = (pciio_intr_line_t)intr_pin;
-
-#ifdef BRINGUP
- /*
- * ioc3 can't decode the PCI_INTERRUPT_PIN field of its config
- * space so we have to set it here
- */
- if (pci_dev->vendor == PCI_VENDOR_ID_SGI &&
- pci_dev->device == PCI_DEVICE_ID_SGI_IOC3 ) {
- *lines = 1;
- }
-#endif /* BRINGUP */
-
- /* Not supported currently */
- *dev_desc = NULL;
- return(0);
-
-}
FUNET's LINUX-ADM group, linux-adm@nic.funet.fi
TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)