patch-2.3.30 linux/arch/alpha/kernel/core_tsunami.c

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diff -u --recursive --new-file v2.3.29/linux/arch/alpha/kernel/core_tsunami.c linux/arch/alpha/kernel/core_tsunami.c
@@ -26,6 +26,13 @@
 
 int TSUNAMI_bootcpu;
 
+static struct 
+{
+	unsigned long wsba[4];
+	unsigned long wsm[4];
+	unsigned long tba[4];
+} saved_pchip[2];
+
 /*
  * NOTE: Herein lie back-to-back mb instructions.  They are magic. 
  * One plausible explanation is that the I/O controller does not properly
@@ -155,6 +162,7 @@
 
 	__kernel_stb(value, *(vucp)addr);
 	mb();
+	__kernel_ldbu(*(vucp)addr);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -169,6 +177,7 @@
 
 	__kernel_stw(value, *(vusp)addr);
 	mb();
+	__kernel_ldwu(*(vusp)addr);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -183,6 +192,7 @@
 
 	*(vuip)addr = value;
 	mb();
+	*(vuip)addr;
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -261,22 +271,40 @@
 	hose->index = index;
 
 	hose->io_space->start = TSUNAMI_IO(index) - TSUNAMI_IO_BIAS;
-	hose->io_space->end = hose->io_space->start + TSUNAMI_IO_SPACE;
+	hose->io_space->end = hose->io_space->start + TSUNAMI_IO_SPACE - 1;
 	hose->io_space->name = pci_io_names[index];
 	hose->io_space->flags = IORESOURCE_IO;
 
 	hose->mem_space->start = TSUNAMI_MEM(index) - TSUNAMI_MEM_BIAS;
-	/* the IOMEM address space is larger than 32bit but most pci
-	   cars doesn't support 64bit address space so we stick with
-	   32bit here (see the TSUNAMI_MEM_SPACE define). */
 	hose->mem_space->end = hose->mem_space->start + 0xffffffff;
 	hose->mem_space->name = pci_mem_names[index];
 	hose->mem_space->flags = IORESOURCE_MEM;
 
 	if (request_resource(&ioport_resource, hose->io_space) < 0)
-		printk(KERN_ERR "failed to request IO on hose %d", index);
+		printk(KERN_ERR "Failed to request IO on hose %d\n", index);
 	if (request_resource(&iomem_resource, hose->mem_space) < 0)
-		printk(KERN_ERR "failed to request IOMEM on hose %d", index);
+		printk(KERN_ERR "Failed to request MEM on hose %d\n", index);
+
+	/*
+	 * Save the existing PCI window translations.  SRM will 
+	 * need them when we go to reboot.
+	 */
+
+	saved_pchip[index].wsba[0] = pchip->wsba[0].csr;
+	saved_pchip[index].wsm[0] = pchip->wsm[0].csr;
+	saved_pchip[index].tba[0] = pchip->tba[0].csr;
+
+	saved_pchip[index].wsba[1] = pchip->wsba[1].csr;
+	saved_pchip[index].wsm[1] = pchip->wsm[1].csr;
+	saved_pchip[index].tba[1] = pchip->tba[1].csr;
+
+	saved_pchip[index].wsba[2] = pchip->wsba[2].csr;
+	saved_pchip[index].wsm[2] = pchip->wsm[2].csr;
+	saved_pchip[index].tba[2] = pchip->tba[2].csr;
+
+	saved_pchip[index].wsba[3] = pchip->wsba[3].csr;
+	saved_pchip[index].wsm[3] = pchip->wsm[3].csr;
+	saved_pchip[index].tba[3] = pchip->tba[3].csr;
 
 	/*
 	 * Set up the PCI->physical memory translation windows.
@@ -350,6 +378,34 @@
 	tsunami_init_one_pchip(TSUNAMI_pchip0, 0);
 	if (TSUNAMI_cchip->csc.csr & 1L<<14)
 		tsunami_init_one_pchip(TSUNAMI_pchip1, 1);
+}
+
+static void
+tsunami_kill_one_pchip(tsunami_pchip *pchip, int index)
+{
+	pchip->wsba[0].csr = saved_pchip[index].wsba[0];
+	pchip->wsm[0].csr = saved_pchip[index].wsm[0];
+	pchip->tba[0].csr = saved_pchip[index].tba[0];
+
+	pchip->wsba[1].csr = saved_pchip[index].wsba[1];
+	pchip->wsm[1].csr = saved_pchip[index].wsm[1];
+	pchip->tba[1].csr = saved_pchip[index].tba[1];
+
+	pchip->wsba[2].csr = saved_pchip[index].wsba[2];
+	pchip->wsm[2].csr = saved_pchip[index].wsm[2];
+	pchip->tba[2].csr = saved_pchip[index].tba[2];
+
+	pchip->wsba[3].csr = saved_pchip[index].wsba[3];
+	pchip->wsm[3].csr = saved_pchip[index].wsm[3];
+	pchip->tba[3].csr = saved_pchip[index].tba[3];
+}
+
+void
+tsunami_kill_arch(int mode)
+{
+	tsunami_kill_one_pchip(TSUNAMI_pchip0, 0);
+	if (TSUNAMI_cchip->csc.csr & 1L<<14)
+		tsunami_kill_one_pchip(TSUNAMI_pchip1, 1);
 }
 
 static inline void

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