patch-2.2.0-pre9 linux/drivers/net/irda/pc87108.c

• Lines: 68
• Date: Wed Jan 20 11:05:33 1999
• Orig file: v2.2.0-pre8/linux/drivers/net/irda/pc87108.c
• Orig date: Tue Dec 22 14:16:55 1998

diff -u --recursive --new-file v2.2.0-pre8/linux/drivers/net/irda/pc87108.c linux/drivers/net/irda/pc87108.c
@@ -6,7 +6,7 @@
  * Status:        Experimental.
  * Author:        Dag Brattli <dagb@cs.uit.no>
  * Created at:    Sat Nov  7 21:43:15 1998
- * Modified at:   Mon Dec 14 11:40:24 1998
+ * Modified at:   Mon Dec 28 08:46:16 1998
  * Modified by:   Dag Brattli <dagb@cs.uit.no>
  * 
  *     Copyright (c) 1998 Dag Brattli <dagb@cs.uit.no>
@@ -129,9 +129,6 @@
 {
 	int i;
 
-	DEBUG( 0, __FUNCTION__ "()\n");
-
-
 	for ( i=0; (io[i] < 2000) && (i < 4); i++) {
 		int ioaddr = io[i];
 		if (check_region(ioaddr, CHIP_IO_EXTENT))
@@ -369,12 +366,12 @@
 
 	/* Receiver frame length */
 	switch_bank( iobase, BANK4);
-	outb( 4000 & 0xff, iobase+6);
-	outb(( 4000 >> 8) & 0x1f, iobase+7);
+	outb( 2048 & 0xff, iobase+6);
+	outb(( 2048 >> 8) & 0x1f, iobase+7);
 
 	/* Transmitter frame length */
-	outb( 4000 & 0xff, iobase+4);
-	outb(( 4000 >> 8) & 0x1f, iobase+5);
+	outb( 2048 & 0xff, iobase+4);
+	outb(( 2048 >> 8) & 0x1f, iobase+5);
 	
 	DEBUG( 0, "PC87108 driver loaded. Version: 0x%02x\n", version);
 
@@ -676,7 +673,12 @@
 
 	/* Set FIFO threshold to TX17, RX16 */
 	switch_bank( iobase, BANK0);
-	outb( FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
+	outb( FCR_RXTH|     /* Set Rx FIFO threshold */
+	      FCR_TXTH|     /* Set Tx FIFO threshold */
+	      FCR_TXSR|     /* Reset Tx FIFO */
+	      FCR_RXSR|     /* Reset Rx FIFO */
+	      FCR_FIFO_EN,  /* Enable FIFOs */
+	      iobase+FCR);
 	/* outb( 0xa7, iobase+FCR); */
 	
 	/* Set FIFO size to 32 */
@@ -894,7 +896,7 @@
 		idev->stats.tx_errors++;
 		idev->stats.tx_fifo_errors++;
 		
-		/* Clear bit, by writing 1 to it */
+		/* Clear bit, by writing 1 into it */
 		outb( ASCR_TXUR, iobase+ASCR);
 	} else {
 		idev->stats.tx_packets++;
@@ -1049,7 +1051,7 @@
 				/* Put this entry back in fifo */
 				st_fifo->head--;
 				st_fifo->len++;
-				st_fifo->entries[ st_fifo->head].status = status;
+				st_fifo->entries[st_fifo->head].status = status;
 				st_fifo->entries[ st_fifo->head].len = len;
 
 				/* Restore bank register */