patch-2.1.96 linux/include/asm-arm/softirq.h

• Lines: 77
• Date: Sun Apr 12 11:42:16 1998
• Orig file: v2.1.95/linux/include/asm-arm/softirq.h
• Orig date: Tue Jan 20 16:39:43 1998

diff -u --recursive --new-file v2.1.95/linux/include/asm-arm/softirq.h linux/include/asm-arm/softirq.h
@@ -4,6 +4,9 @@
 #include <asm/atomic.h>
 #include <asm/hardirq.h>
 
+extern unsigned int local_bh_count[NR_CPUS];
+#define in_bh()			(local_bh_count[smp_processor_id()] != 0)
+
 #define get_active_bhs()	(bh_mask & bh_active)
 #define clear_active_bhs(x)	atomic_clear_mask((int)(x),&bh_active)
 
@@ -25,44 +28,44 @@
 	set_bit(nr, &bh_active);
 }
 
-/*
- * These use a mask count to correctly handle
- * nested disable/enable calls
- */
-extern inline void disable_bh(int nr)
-{
-	bh_mask &= ~(1 << nr);
-	bh_mask_count[nr]++;
-}
-
-extern inline void enable_bh(int nr)
-{
-	if (!--bh_mask_count[nr])
-		bh_mask |= 1 << nr;
-}
-
 #ifdef __SMP__
 #error SMP not supported
 #else
 
-extern int __arm_bh_counter;
-
 extern inline void start_bh_atomic(void)
 {
-	__arm_bh_counter++;
+	local_bh_count[smp_processor_id()]++;
 	barrier();
 }
 
 extern inline void end_bh_atomic(void)
 {
 	barrier();
-	__arm_bh_counter--;
+	local_bh_count[smp_processor_id()]--;
 }
 
 /* These are for the irq's testing the lock */
-#define softirq_trylock()	(__arm_bh_counter ? 0 : (__arm_bh_counter=1))
-#define softirq_endlock()	(__arm_bh_counter = 0)
+#define softirq_trylock(cpu)	(in_bh() ? 0 : (local_bh_count[smp_processor_id()]=1))
+#define softirq_endlock(cpu)	(local_bh_count[smp_processor_id()] = 0)
+#define synchronize_bh()	do { } while (0)
 
 #endif	/* SMP */
+
+/*
+ * These use a mask count to correctly handle
+ * nested disable/enable calls
+ */
+extern inline void disable_bh(int nr)
+{
+	bh_mask &= ~(1 << nr);
+	bh_mask_count[nr]++;
+	synchronize_bh();
+}
+
+extern inline void enable_bh(int nr)
+{
+	if (!--bh_mask_count[nr])
+		bh_mask |= 1 << nr;
+}
 
 #endif	/* __ASM_SOFTIRQ_H */