patch-2.1.53 linux/include/asm-ppc/softirq.h

• Lines: 118
• Date: Thu Sep 4 12:54:49 1997
• Orig file: v2.1.52/linux/include/asm-ppc/softirq.h
• Orig date: Mon Aug 4 16:25:39 1997

diff -u --recursive --new-file v2.1.52/linux/include/asm-ppc/softirq.h linux/include/asm-ppc/softirq.h
@@ -8,7 +8,17 @@
 #include <asm/atomic.h>
 #include <asm/hardirq.h>
 
+/*
+ * The locking mechanism for base handlers, to prevent re-entrancy,
+ * is entirely private to an implementation, it should not be
+ * referenced at all outside of this file.
+ */
 #define get_active_bhs()	(bh_mask & bh_active)
+
+#ifndef __SMP__
+
+extern int __ppc_bh_counter;
+
 #define clear_active_bhs(x)	atomic_clear_mask((x),&bh_active)
 
 extern inline void init_bh(int nr, void (*routine)(void))
@@ -45,15 +55,6 @@
 		bh_mask |= 1 << nr;
 }
 
-#ifndef __SMP__
-
-/*
- * The locking mechanism for base handlers, to prevent re-entrancy,
- * is entirely private to an implementation, it should not be
- * referenced at all outside of this file.
- */
-
-extern int __ppc_bh_counter;
 
 extern inline void start_bh_atomic(void)
 {
@@ -71,8 +72,80 @@
 #define softirq_trylock()	(__ppc_bh_counter? 0: ((__ppc_bh_counter=1),1))
 #define softirq_endlock()	(__ppc_bh_counter = 0)
 
-#else
-#error Nein, wir haben noch kein SMP
-#endif
+#else /* __SMP__ */
+
+extern atomic_t __sparc_bh_counter;
+
+#define start_bh_atomic() \
+	do { atomic_inc(&__sparc_bh_counter); synchronize_irq(); } while(0)
+
+#define end_bh_atomic()		atomic_dec(&__sparc_bh_counter)
+
+#include <asm/spinlock.h>
+
+extern spinlock_t global_bh_lock;
+
+#define init_bh(nr, routine)				\
+do {	unsigned long flags;				\
+	int ent = nr;					\
+	spin_lock_irqsave(&global_bh_lock, flags);	\
+	bh_base[ent] = routine;				\
+	bh_mask_count[ent] = 0;				\
+	bh_mask |= 1 << ent;				\
+	spin_unlock_irqrestore(&global_bh_lock, flags);	\
+} while(0)
+
+#define remove_bh(nr)					\
+do {	unsigned long flags;				\
+	int ent = nr;					\
+	spin_lock_irqsave(&global_bh_lock, flags);	\
+	bh_base[ent] = NULL;				\
+	bh_mask &= ~(1 << ent);				\
+	spin_unlock_irqrestore(&global_bh_lock, flags);	\
+} while(0)
+
+#define mark_bh(nr)					\
+do {	unsigned long flags;				\
+	spin_lock_irqsave(&global_bh_lock, flags);	\
+	bh_active |= (1 << nr);				\
+	spin_unlock_irqrestore(&global_bh_lock, flags);	\
+} while(0)
+
+#define disable_bh(nr)					\
+do {	unsigned long flags;				\
+	int ent = nr;					\
+	spin_lock_irqsave(&global_bh_lock, flags);	\
+	bh_mask &= ~(1 << ent);				\
+	bh_mask_count[ent]++;				\
+	spin_unlock_irqrestore(&global_bh_lock, flags);	\
+} while(0)
+
+#define enable_bh(nr)					\
+do {	unsigned long flags;				\
+	int ent = nr;					\
+	spin_lock_irqsave(&global_bh_lock, flags);	\
+	if (!--bh_mask_count[ent])			\
+		bh_mask |= 1 << ent;			\
+	spin_unlock_irqrestore(&global_bh_lock, flags);	\
+} while(0)
+
+#define softirq_trylock()					\
+({								\
+	int ret = 1;						\
+	if(atomic_add_return(1, &__sparc_bh_counter) != 1) {	\
+		atomic_dec(&__sparc_bh_counter);		\
+		ret = 0;					\
+	}							\
+	ret;							\
+})
+#define softirq_endlock()	atomic_dec(&__sparc_bh_counter)
+#define clear_active_bhs(mask)				\
+do {	unsigned long flags;				\
+	spin_lock_irqsave(&global_bh_lock, flags);	\
+	bh_active &= ~(mask);				\
+	spin_unlock_irqrestore(&global_bh_lock, flags);	\
+} while(0)
+
+#endif /* __SMP__ */
 
 #endif