patch-2.1.34 linux/include/asm-alpha/softirq.h

• Lines: 78
• Date: Mon Apr 14 09:31:09 1997
• Orig file: v2.1.33/linux/include/asm-alpha/softirq.h
• Orig date: Fri Apr 4 08:52:24 1997

diff -u --recursive --new-file v2.1.33/linux/include/asm-alpha/softirq.h linux/include/asm-alpha/softirq.h
@@ -1,9 +1,12 @@
 #ifndef _ALPHA_SOFTIRQ_H
 #define _ALPHA_SOFTIRQ_H
 
-/*
- * Software interrupts..
+/* The locking mechanism for base handlers, to prevent re-entrancy,
+ * is entirely private to an implementation, it should not be
+ * referenced at all outside of this file.
  */
+extern atomic_t __alpha_bh_counter;
+
 #define get_active_bhs()	(bh_mask & bh_active)
 
 static inline void clear_active_bhs(unsigned long x)
@@ -21,11 +24,60 @@
 	:"Ir" (x), "m" (bh_active));
 }
 
+extern inline void init_bh(int nr, void (*routine)(void))
+{
+	bh_base[nr] = routine;
+	bh_mask_count[nr] = 0;
+	bh_mask |= 1 << nr;
+}
+
+extern inline void mark_bh(int nr)
+{
+	set_bit(nr, &bh_active);
+}
+
+/*
+ * These use a mask count to correctly handle
+ * nested disable/enable calls
+ */
+extern inline void disable_bh(int nr)
+{
+	bh_mask &= ~(1 << nr);
+	bh_mask_count[nr]++;
+}
+
+extern inline void enable_bh(int nr)
+{
+	if (!--bh_mask_count[nr])
+		bh_mask |= 1 << nr;
+}
+
+/*
+ * start_bh_atomic/end_bh_atomic also nest
+ * naturally by using a counter
+ */
+extern inline void start_bh_atomic(void)
+{
+#ifdef __SMP__
+	atomic_inc(&__alpha_bh_counter);
+	synchronize_irq();
+#else
+	atomic_inc(&__alpha_bh_counter);
+#endif
+}
+
+extern inline void end_bh_atomic(void)
+{
+	atomic_dec(&__alpha_bh_counter);
+}
+
 #ifndef __SMP__
 
 /* These are for the irq's testing the lock */
-#define softirq_trylock()	(intr_count ? 0 : ((intr_count=1),1))
-#define softirq_endlock()	(intr_count = 0)
+#define softirq_trylock()	(atomic_read(&__alpha_bh_counter) ? \
+				0 : \
+				((atomic_set(&__alpha_bh_counter,1)),1))
+#define softirq_endlock()	(atomic_set(&__alpha_bh_counter, 0))
 
 #else