patch-2.1.34 linux/arch/sparc64/kernel/rtrap.S

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diff -u --recursive --new-file v2.1.33/linux/arch/sparc64/kernel/rtrap.S linux/arch/sparc64/kernel/rtrap.S
@@ -1,68 +1,83 @@
-/* $Id: rtrap.S,v 1.4 1997/03/13 16:24:55 jj Exp $
+/* $Id: rtrap.S,v 1.11 1997/04/03 13:03:50 davem Exp $
  * rtrap.S: Preparing for return from trap on Sparc V9.
  *
  * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
+ * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
  */
 
+#include <asm/asi.h>
 #include <asm/pstate.h>
 #include <asm/ptrace.h>
+#include <asm/spitfire.h>
+
+/* We assume here this is entered with AG, MG and IG bits in pstate clear */
 
 	.text
 	.align	4
 	.globl	rtrap
 rtrap:
-	sethi	%hi(intr_count), %l0
-	or	%l0, %lo(intr_count), %l0
-	ld	[%l0 + %g4], %l1
 	sethi	%hi(bh_active), %l2
-	brz,pt	%l1, 2f
-	 or	%l2, %lo(bh_active), %l2
+	or	%l2, %lo(bh_active), %l2
 	sethi	%hi(bh_mask), %l1
 	or	%l1, %lo(bh_mask), %l1
-1:
 	ldx	[%l2 + %g4], %l3
 	ldx	[%l1 + %g4], %l4
 	andcc	%l3, %l4, %g0
 	be,pt	%xcc, 2f
-	 mov	1, %l7
+	 nop
 	call	do_bottom_half
-	 st	%l7, [%l0 + %g4]
-	ba,pt	%xcc, 1b
-	 st	%g0, [%l0 + %g4]	
+	 nop
 2:
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_TSTATE], %l1
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_TPC], %l2
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TSTATE], %l1
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TPC], %l2
+	sethi	%hi(0xf << 20), %l4
 	andcc	%l1, TSTATE_PRIV, %l3
+	and	%l1, %l4, %l4
 	rdpr	%pstate, %l7
+	andn	%l1, %l4, %l1			/* XXX May not be needed -DaveM */
 	be,pt	%icc, to_user
 	 andn	%l7, PSTATE_IE, %l7
 3:
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_G1], %g1
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_G2], %g2
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_G3], %g3
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_G4], %g4
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_G5], %g5
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_G6], %g6
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_G7], %g7
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_I0], %i0
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_I1], %i1
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_I2], %i2
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_I3], %i3
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_I4], %i4
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_I5], %i5
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_I6], %i6
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_I7], %i7
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_Y], %o3
-	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_TNPC], %o2
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G1], %g1
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G2], %g2
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G3], %g3
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G4], %g4
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G5], %g5
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G6], %g6
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G7], %g7
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0], %i0
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1], %i1
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I2], %i2
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I3], %i3
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I4], %i4
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I5], %i5
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I6], %i6
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I7], %i7
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_Y], %o3
+	ldx	[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC], %o2
+	rdpr	%tl, %o4
 	wr	%o3, %g0, %y
+	add	%o4, 1, %o4
+
+	srl	%l4, 20, %l4
 	wrpr	%l7, %g0, %pstate
-	wrpr	%g0, 1, %tl
+	wrpr	%l4, 0x0, %pil
+	wrpr	%o4, %g0, %tl
 	wrpr	%l1, %g0, %tstate
 	wrpr	%l2, %g0, %tpc
 	brnz,pn	%l3, 1f
 	 wrpr	%o2, %g0, %tnpc
-	/* we came here from to_user, ie. we have now AG */
+
+	/* We came here from to_user, ie. we have now AG.
+	 * Also have to push user context back into primary.
+	 */
 	restore
+
+	mov	SECONDARY_CONTEXT, %g6
+	mov	PRIMARY_CONTEXT, %g7
+	ldxa	[%g6] ASI_DMMU, %g4
+	stxa	%g4, [%g7] ASI_DMMU
+
 	rdpr	%wstate, %g1
 	rdpr	%otherwin, %g2
 	srl	%g1, 3, %g1
@@ -77,7 +92,7 @@
 	sethi	%hi(need_resched), %l0
 	or	%l0, %lo(need_resched), %l0
 	ld	[%l0 + %g4], %l0
-	wrpr	%o4, PSTATE_IE, %pstate
+	wrpr	%l7, PSTATE_IE, %pstate
 	brz,pt	%l0, 1f
 	 ldx	[%g6 + AOFF_task_signal], %l0
 	call	schedule
@@ -85,7 +100,7 @@
 1:
 	ldx	[%g6 + AOFF_task_blocked], %o0
 	or	%l7, PSTATE_AG, %l7		! Will need this for setting back wstate
-	andcc	%l0, %o0, %g0
+	andncc	%l0, %o0, %g0
 	be,pt	%xcc, 3b
 	 mov	%l5, %o2  
 	mov	%l6, %o3

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