patch-2.1.34 linux/arch/sparc64/kernel/entry.S

• Lines: 170
• Date: Mon Apr 14 09:31:09 1997
• Orig file: v2.1.33/linux/arch/sparc64/kernel/entry.S
• Orig date: Thu Mar 27 14:40:00 1997

diff -u --recursive --new-file v2.1.33/linux/arch/sparc64/kernel/entry.S linux/arch/sparc64/kernel/entry.S
@@ -1,4 +1,4 @@
-/* $Id: entry.S,v 1.1 1997/03/18 17:58:59 jj Exp $
+/* $Id: entry.S,v 1.14 1997/04/14 06:56:54 davem Exp $
  * arch/sparc64/kernel/entry.S:  Sparc64 trap low-level entry points.
  *
  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
@@ -16,6 +16,7 @@
 #include <asm/ptrace.h>
 #include <asm/page.h>
 #include <asm/signal.h>
+#include <asm/pgtable.h>
 
 #define curptr      g6
 
@@ -23,6 +24,155 @@
 
 	.text
         .align  4
+/* FIXME: This is still debugging hack */
+	.globl	sparc64_dtlb_fault, sparc64_dtlb_refbit_catch, sparc64_itlb_refbit_catch
+sparc64_dtlb_fault:
+	rdpr	%pstate, %g1
+	wrpr	%g1, PSTATE_AG|PSTATE_MG, %pstate
+	ba,pt	%xcc, etrap
+	 rd	%pc, %g7
+	call	sparc64_dtlb_fault_handler
+	 nop
+
+sparc64_dtlb_refbit_catch:
+	rdpr	%pstate, %g1
+	wrpr	%g1, PSTATE_AG|PSTATE_MG, %pstate
+	ba,pt	%xcc, etrap
+	 rd	%pc, %g7
+	call	sparc64_dtlb_refbit_handler
+	 add	%sp, STACK_BIAS + REGWIN_SZ, %o0
+
+sparc64_itlb_refbit_catch:
+	rdpr	%pstate, %g1
+	wrpr	%g1, PSTATE_AG|PSTATE_MG, %pstate
+	ba,pt	%xcc, etrap
+	 rd	%pc, %g7
+	call	sparc64_dtlb_refbit_handler
+	 nop
+
+	/* Note check out head.h, this code isn't even used for UP,
+	 * for SMP things will be different.  In particular the data
+	 * registers for cross calls will be:
+	 *
+	 * DATA 0: Address of function to call
+	 * DATA 1: Argument 1, place in %g6
+	 * DATA 2: Argument 2, place in %g7
+	 *
+	 * With this method we can do most of the cross-call tlb/cache
+	 * flushing in very quickly.
+	 */
+	.align	4
+	.globl	do_ivec
+do_ivec:
+	ldxa	[%g0] ASI_INTR_RECEIVE, %g1
+	andcc	%g1, 0x20, %g0
+	be,pn	%xcc, do_ivec_return
+	 mov	0x40, %g2
+
+	/* Load up Interrupt Vector Data 0 register. */
+	sethi	%uhi(ivector_to_mask), %g4
+	ldxa	[%g2] ASI_UDB_INTR_R, %g3
+	or	%g4, %ulo(ivector_to_mask), %g4
+	and	%g3, 0x7ff, %g3
+	sllx	%g4, 32, %g4
+	sethi	%hi(ivector_to_mask), %g5
+	sllx	%g3, 3, %g3
+	or	%g5, %lo(ivector_to_mask), %g5
+	add	%g5, %g4, %g4
+	ldx	[%g4 + %g3], %g2
+	brz,pn	%g2, do_ivec_spurious
+	 nop
+
+	/* No branches, worse case we don't know about this interrupt
+	 * yet, so we would just write a zero into the softint register
+	 * which is completely harmless.
+	 */
+	wr	%g2, 0x0, %set_softint
+
+do_ivec_return:
+	/* Acknowledge the UPA */
+	stxa	%g0, [%g0] ASI_INTR_RECEIVE
+	membar	#Sync
+	retry
+
+do_ivec_spurious:
+	stxa	%g0, [%g0] ASI_INTR_RECEIVE
+	rdpr	%pstate, %g1
+	wrpr	%g1, PSTATE_IG | PSTATE_AG, %pstate
+	ba,pt	%xcc, etrap
+	 rd	%pc, %g7
+	call	report_spurious_ivec
+	 add	%sp, STACK_BIAS + REGWIN_SZ, %o0
+	ba,pt	%xcc, rtrap
+	 nop
+
+breakpoint_t:
+	.asciz	"Breakpoint Trap %lx\n"
+	.align	4
+	.globl	breakpoint_trap
+breakpoint_trap:
+	mov	%o0, %o1
+	sethi	%hi(breakpoint_t), %o0
+	or	%o0, %lo(breakpoint_t), %o0
+	call	prom_printf
+	 add	%o0, %g4, %o0
+	call	prom_cmdline
+	 nop
+	ba,a,pt	%xcc, rtrap
+
+	.globl	sys_pipe, sys_execve, sys_sigpause, sys_nis_syscall
+
+sys_pipe:
+	sethi	%hi(sparc_pipe), %g1
+	add	%g1, %g4, %g1
+	jmpl	%g1 + %lo(sparc_pipe), %g0
+	 add	%sp, STACK_BIAS + REGWIN_SZ, %o0
+
+sys_nis_syscall:
+	sethi	%hi(c_sys_nis_syscall), %g1
+	add	%g1, %g4, %g1
+	jmpl	%g1 + %lo(c_sys_nis_syscall), %g0
+	 add	%sp, STACK_BIAS + REGWIN_SZ, %o0
+
+sys_execve:
+	sethi	%hi(sparc_execve), %g1
+	add	%g1, %g4, %g1
+	jmpl	%g1 + %lo(sparc_execve), %g0
+	 add	%sp, STACK_BIAS + REGWIN_SZ, %o0
+
+sys_sigpause:
+	/* NOTE: %o0 has a correct value already */
+	call	do_sigpause
+	 add	%sp, STACK_BIAS + REGWIN_SZ, %o1
+	
+	ld	[%curptr + AOFF_task_flags], %l5
+	andcc	%l5, 0x20, %g0
+	be,pt	%icc, ret_sys_call
+	 clr	%o0
+	call	syscall_trace
+	 nop
+	ba,pt	%xcc, ret_sys_call
+	 clr	%o0
+
+	/* This is how fork() was meant to be done, 11 instruction entry. -DaveM */
+	.globl	sys_fork, sys_vfork, sys_clone
+sys_fork:
+sys_vfork:
+	mov	SIGCHLD, %o0
+	clr	%o1
+sys_clone:
+	mov	%o7, %l5
+	flushw
+	rdpr	%cwp, %o4
+	add	%sp, STACK_BIAS + REGWIN_SZ, %o2
+	brz,a	%o1, 1f
+	 mov	%fp, %o1
+1:
+	/* Don't try this at home. */
+	stx	%o4, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G0]
+	call	do_fork
+	 add	%l5, 8, %o7
+
 linux_sparc_ni_syscall:
 	sethi	%hi(sys_ni_syscall), %l7
 	or	%l7, %lo(sys_ni_syscall), %l7