patch-2.1.130 linux/arch/alpha/kernel/sys_dp264.c

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diff -u --recursive --new-file v2.1.129/linux/arch/alpha/kernel/sys_dp264.c linux/arch/alpha/kernel/sys_dp264.c
@@ -25,12 +25,24 @@
 #include <asm/pci.h>
 #include <asm/pgtable.h>
 #include <asm/core_tsunami.h>
+#include <asm/hwrpb.h>
 
 #include "proto.h"
 #include "irq.h"
 #include "bios32.h"
 #include "machvec.h"
 
+struct hwrpb_struct *hwrpb;
+
+/* hwrpb->sys_variation helpers */
+#define MEMBER_ID(x) (((x)>>10)&0x3f)
+
+#define DP264_ID	1
+#define MONET_ID	4
+#define GOLDRUSH_ID	6
+#define WEBBRICK_ID	7
+
+#define dev2hose(d) (bus2hose[(d)->bus->number]->pci_hose_index)
 
 /*
  * HACK ALERT! only CPU#0 is used currently
@@ -217,16 +229,94 @@
 	};
 	const long min_idsel = 5, max_idsel = 10, irqs_per_slot = 5;
 	int irq = COMMON_TABLE_LOOKUP;
+
 	if (irq >= 0)
-		irq += 16 * bus2hose[dev->bus->number]->pci_hose_index;
+		irq += 16 * dev2hose(dev);
+
 	return irq;
 }
 
+static int __init
+monet_map_irq(struct pci_dev *dev, int slot, int pin)
+{
+	static char irq_tab[13][5] __initlocaldata = {
+		/*INT    INTA   INTB   INTC   INTD */
+		{    45,    45,    45,    45,    45}, /* IdSel 3 21143 PCI1 */
+		{    -1,    -1,    -1,    -1,    -1}, /* IdSel 4 unused */
+		{    -1,    -1,    -1,    -1,    -1}, /* IdSel 5 unused */
+		{    47,    47,    47,    47,    47}, /* IdSel 6 SCSI PCI1 */
+		{    -1,    -1,    -1,    -1,    -1}, /* IdSel 7 ISA Bridge */
+		{    -1,    -1,    -1,    -1,    -1}, /* IdSel 8 P2P PCI1 */
+#if 1
+		{    28,    28,    29,    30,    31}, /* IdSel 14 slot 4 PCI2*/
+		{    24,    24,    25,    26,    27}, /* IdSel 15 slot 5 PCI2*/
+#else
+		{    -1,    -1,    -1,    -1,    -1}, /* IdSel 9 unused */
+		{    -1,    -1,    -1,    -1,    -1}, /* IdSel 10 unused */
+#endif
+		{    40,    40,    41,    42,    43}, /* IdSel 11 slot 1 PCI0*/
+		{    36,    36,    37,    38,    39}, /* IdSel 12 slot 2 PCI0*/
+		{    32,    32,    33,    34,    35}, /* IdSel 13 slot 3 PCI0*/
+		{    28,    28,    29,    30,    31}, /* IdSel 14 slot 4 PCI2*/
+		{    24,    24,    25,    26,    27}  /* IdSel 15 slot 5 PCI2*/
+};
+	const long min_idsel = 3, max_idsel = 15, irqs_per_slot = 5;
+	int irq = COMMON_TABLE_LOOKUP;
+
+	return irq;
+}
+
+static int __init
+monet_swizzle(struct pci_dev *dev, int *pinp)
+{
+        int slot, pin = *pinp;
+
+        /* Check first for the built-in bridge on hose 1. */
+        if (dev2hose(dev) == 1 && PCI_SLOT(dev->bus->self->devfn) == 8) {
+	  slot = PCI_SLOT(dev->devfn);
+        }
+        else
+        {
+                /* Must be a card-based bridge.  */
+                do {
+			/* Check for built-in bridge on hose 1. */
+                        if (dev2hose(dev) == 1 &&
+			    PCI_SLOT(dev->bus->self->devfn) == 8) {
+				slot = PCI_SLOT(dev->devfn);
+				break;
+                        }
+                        pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn)) ;
+
+                        /* Move up the chain of bridges.  */
+                        dev = dev->bus->self;
+                        /* Slot of the next bridge.  */
+                        slot = PCI_SLOT(dev->devfn);
+                } while (dev->bus->self);
+        }
+        *pinp = pin;
+        return slot;
+}
+
 static void __init
 dp264_pci_fixup(void)
 {
 	layout_all_busses(DEFAULT_IO_BASE, DEFAULT_MEM_BASE);
-	common_pci_fixup(dp264_map_irq, common_swizzle);
+
+	/* must do map and/or swizzle different on some */
+	switch (MEMBER_ID(hwrpb->sys_variation)) {
+	case MONET_ID:
+	    common_pci_fixup(monet_map_irq, monet_swizzle);
+	    /* es1888_init(); */ /* later? */
+	    break;
+
+	case DP264_ID:
+	case GOLDRUSH_ID:
+	case WEBBRICK_ID:
+	default:
+	    common_pci_fixup(dp264_map_irq, common_swizzle);
+	    break;
+	} /* end MEMBER_ID switch */
+
 	SMC669_Init();
 }
 

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