patch-2.1.101 linux/include/asm-mips/io.h

• Lines: 40
• Date: Fri May 8 00:13:26 1998
• Orig file: v2.1.100/linux/include/asm-mips/io.h
• Orig date: Tue Dec 16 12:46:07 1997

diff -u --recursive --new-file v2.1.100/linux/include/asm-mips/io.h linux/include/asm-mips/io.h
@@ -42,16 +42,6 @@
 extern unsigned long mips_io_port_base;
 
 /*
- * On MIPS I/O ports are memory mapped, so we access them using normal
- * load/store instructions. mips_io_port_base is the virtual address to
- * which all ports are being mapped.  For sake of efficiency some code
- * assumes that this is an address that can be loaded with a single lui
- * instruction, so the lower 16 bits must be zero.  Should be true on
- * on any sane architecture; generic code does not use this assumption.
- */
-extern unsigned long mips_io_port_base;
-
-/*
  * Thanks to James van Artsdalen for a better timing-fix than
  * the two short jumps: using outb's to a nonexistent port seems
  * to guarantee better timings even on fast machines.
@@ -381,5 +371,22 @@
 ((__builtin_constant_p((port)) && (port) < 32768) ? \
 	__inslc((port),(addr),(count)) : \
 	__insl((port),(addr),(count)))
+
+/*
+ * The caches on some architectures aren't dma-coherent and have need to
+ * handle this in software.  There are two types of operations that
+ * can be applied to dma buffers.
+ *
+ *  - dma_cache_wback_inv(start, size) makes caches and coherent by
+ *    writing the content of the caches back to memory, if necessary.
+ *    The function also invalidates the affected part of the caches as
+ *    necessary before DMA transfers from outside to memory.
+ *  - dma_cache_inv(start, size) invalidates the affected parts of the
+ *    caches.  Dirty lines of the caches may be written back or simply
+ *    be discarded.  This operation is necessary before dma operations
+ *    to the memory.
+ */
+extern void (*dma_cache_wback_inv)(unsigned long start, unsigned long size);
+extern void (*dma_cache_inv)(unsigned long start, unsigned long size);
 
 #endif /* __ASM_MIPS_IO_H */