From: Ralf Baechle <ralf@linux-mips.org>
Below following 125547 lines of patches, all to arch/mips and
include/asm-mips. I'm going to send the remaining stuff of which the one
or other bit may need to be discussed in smaller bits.
---
/dev/null |36020 -------------
arch/mips/Kconfig | 755
arch/mips/Makefile | 364
arch/mips/arc/cmdline.c | 2
arch/mips/arc/identify.c | 2
arch/mips/arc/init.c | 9
arch/mips/arc/memory.c | 17
arch/mips/arc/misc.c | 5
arch/mips/au1000/common/Makefile | 9
arch/mips/au1000/common/clocks.c | 5
arch/mips/au1000/common/dbg_io.c | 2
arch/mips/au1000/common/dma.c | 13
arch/mips/au1000/common/irq.c | 367
arch/mips/au1000/common/pci.c | 112
arch/mips/au1000/common/power.c | 219
arch/mips/au1000/common/prom.c | 8
arch/mips/au1000/common/puts.c | 6
arch/mips/au1000/common/reset.c | 21
arch/mips/au1000/common/setup.c | 194
arch/mips/au1000/common/sleeper.S | 150
arch/mips/au1000/common/time.c | 365
arch/mips/au1000/common/usbdev.c | 2
arch/mips/au1000/csb250/Makefile | 18
arch/mips/au1000/csb250/board_setup.c | 250
arch/mips/au1000/csb250/init.c | 95
arch/mips/au1000/csb250/irqmap.c | 100
arch/mips/au1000/db1x00/Makefile | 16
arch/mips/au1000/db1x00/board_setup.c | 87
arch/mips/au1000/db1x00/init.c | 23
arch/mips/au1000/db1x00/irqmap.c | 123
arch/mips/au1000/hydrogen3/Makefile | 22
arch/mips/au1000/hydrogen3/board_setup.c | 71
arch/mips/au1000/hydrogen3/init.c | 77
arch/mips/au1000/hydrogen3/irqmap.c | 90
arch/mips/au1000/mtx-1/Makefile | 14
arch/mips/au1000/mtx-1/board_setup.c | 89
arch/mips/au1000/mtx-1/init.c | 74
arch/mips/au1000/mtx-1/irqmap.c | 93
arch/mips/au1000/pb1000/Makefile | 11
arch/mips/au1000/pb1000/board_setup.c | 186
arch/mips/au1000/pb1000/init.c | 10
arch/mips/au1000/pb1000/irqmap.c | 96
arch/mips/au1000/pb1100/Makefile | 11
arch/mips/au1000/pb1100/board_setup.c | 118
arch/mips/au1000/pb1100/init.c | 19
arch/mips/au1000/pb1100/irqmap.c | 100
arch/mips/au1000/pb1500/Makefile | 7
arch/mips/au1000/pb1500/board_setup.c | 140
arch/mips/au1000/pb1500/init.c | 10
arch/mips/au1000/pb1500/irqmap.c | 100
arch/mips/au1000/pb1550/Makefile | 22
arch/mips/au1000/pb1550/board_setup.c | 67
arch/mips/au1000/pb1550/init.c | 73
arch/mips/au1000/pb1550/irqmap.c | 93
arch/mips/au1000/xxs1500/Makefile | 13
arch/mips/au1000/xxs1500/board_setup.c | 85
arch/mips/au1000/xxs1500/init.c | 68
arch/mips/au1000/xxs1500/irqmap.c | 106
arch/mips/baget/prom/init.c | 9
arch/mips/baget/setup.c | 4
arch/mips/boot/Makefile | 22
arch/mips/cobalt/Makefile | 2
arch/mips/cobalt/int-handler.S | 87
arch/mips/cobalt/irq.c | 169
arch/mips/cobalt/promcon.c | 14
arch/mips/cobalt/setup.c | 86
arch/mips/configs/atlas_defconfig | 659
arch/mips/configs/bosporus_defconfig | 673
arch/mips/configs/capcella_defconfig | 640
arch/mips/configs/cobalt_defconfig | 617
arch/mips/configs/db1000_defconfig | 696
arch/mips/configs/db1100_defconfig | 692
arch/mips/configs/db1500_defconfig | 769
arch/mips/configs/ddb5476_defconfig | 639
arch/mips/configs/ddb5477_defconfig | 616
arch/mips/configs/decstation_defconfig | 598
arch/mips/configs/e55_defconfig | 589
arch/mips/configs/eagle_defconfig | 759
arch/mips/configs/ev64120_defconfig | 608
arch/mips/configs/ev96100_defconfig | 564
arch/mips/configs/hp-lj_defconfig | 650
arch/mips/configs/ip22_defconfig | 861
arch/mips/configs/ip27_defconfig | 665
arch/mips/configs/ip32_defconfig | 671
arch/mips/configs/it8172_defconfig | 667
arch/mips/configs/ivr_defconfig | 621
arch/mips/configs/jaguar-atx_defconfig | 540
arch/mips/configs/jmr3927_defconfig | 624
arch/mips/configs/lasat200_defconfig | 715
arch/mips/configs/malta_defconfig | 628
arch/mips/configs/mirage_defconfig | 673
arch/mips/configs/mpc30x_defconfig | 583
arch/mips/configs/mtx1_defconfig | 673
arch/mips/configs/ocelot_defconfig | 563
arch/mips/configs/osprey_defconfig | 558
arch/mips/configs/pb1000_defconfig | 673
arch/mips/configs/pb1100_defconfig | 673
arch/mips/configs/pb1500_defconfig | 784
arch/mips/configs/rm200_defconfig | 1230
arch/mips/configs/sb1250-swarm_defconfig | 636
arch/mips/configs/sead_defconfig | 434
arch/mips/configs/tb0226_defconfig | 695
arch/mips/configs/tb0229_defconfig | 686
arch/mips/configs/workpad_defconfig | 593
arch/mips/configs/xxs1500_defconfig | 673
arch/mips/configs/yosemite_defconfig | 567
arch/mips/ddb5xxx/common/prom.c | 29
arch/mips/ddb5xxx/ddb5074/Makefile | 2
arch/mips/ddb5xxx/ddb5074/nile4_pic.c | 1
arch/mips/ddb5xxx/ddb5074/setup.c | 28
arch/mips/ddb5xxx/ddb5476/setup.c | 26
arch/mips/ddb5xxx/ddb5477/setup.c | 51
arch/mips/dec/Makefile | 2
arch/mips/dec/ecc-berr.c | 6
arch/mips/dec/int-handler.S | 1
arch/mips/dec/prom/Makefile | 2
arch/mips/dec/prom/cmdline.c | 5
arch/mips/dec/prom/console.c | 55
arch/mips/dec/prom/identify.c | 21
arch/mips/dec/prom/init.c | 32
arch/mips/dec/prom/memory.c | 4
arch/mips/dec/promcon.c | 1
arch/mips/dec/reset.c | 19
arch/mips/dec/setup.c | 52
arch/mips/dec/time.c | 491
arch/mips/defconfig | 495
arch/mips/galileo-boards/ev96100/Makefile | 4
arch/mips/galileo-boards/ev96100/init.c | 19
arch/mips/galileo-boards/ev96100/int-handler.S | 3
arch/mips/galileo-boards/ev96100/irq.c | 74
arch/mips/galileo-boards/ev96100/puts.c | 210
arch/mips/galileo-boards/ev96100/reset.c | 70
arch/mips/galileo-boards/ev96100/setup.c | 140
arch/mips/galileo-boards/ev96100/time.c | 200
arch/mips/gt64120/common/Makefile | 3
arch/mips/gt64120/common/pci.c | 147
arch/mips/gt64120/common/time.c | 98
arch/mips/gt64120/ev64120/Makefile | 11
arch/mips/gt64120/ev64120/int-handler.S | 113
arch/mips/gt64120/ev64120/irq.c | 145
arch/mips/gt64120/ev64120/promcon.c | 53
arch/mips/gt64120/ev64120/reset.c | 45
arch/mips/gt64120/ev64120/serialGT.c | 212
arch/mips/gt64120/ev64120/setup.c | 103
arch/mips/gt64120/momenco_ocelot/irq.c | 108
arch/mips/gt64120/momenco_ocelot/prom.c | 16
arch/mips/gt64120/momenco_ocelot/setup.c | 15
arch/mips/hp-lj/init.c | 9
arch/mips/hp-lj/setup.c | 160
arch/mips/ite-boards/generic/irq.c | 16
arch/mips/ite-boards/generic/it8172_setup.c | 47
arch/mips/ite-boards/generic/pmon_prom.c | 6
arch/mips/ite-boards/generic/time.c | 7
arch/mips/ite-boards/ivr/init.c | 13
arch/mips/ite-boards/qed-4n-s01b/Makefile | 2
arch/mips/ite-boards/qed-4n-s01b/init.c | 13
arch/mips/jaguar-atx_defconfig | 537
arch/mips/jazz/Makefile | 4
arch/mips/jazz/int-handler.S | 6
arch/mips/jazz/irq.c | 86
arch/mips/jazz/jazzdma.c | 9
arch/mips/jazz/reset.c | 48
arch/mips/jazz/setup.c | 79
arch/mips/jmr3927/common/prom.c | 6
arch/mips/jmr3927/rbhma3100/Makefile | 2
arch/mips/jmr3927/rbhma3100/init.c | 15
arch/mips/jmr3927/rbhma3100/irq.c | 51
arch/mips/jmr3927/rbhma3100/setup.c | 17
arch/mips/kernel/Makefile | 8
arch/mips/kernel/binfmt_elfn32.c | 13
arch/mips/kernel/binfmt_elfo32.c | 12
arch/mips/kernel/branch.c | 1
arch/mips/kernel/cpu-bugs64.c | 144
arch/mips/kernel/cpu-probe.c | 696
arch/mips/kernel/entry.S | 24
arch/mips/kernel/gdb-low.S | 6
arch/mips/kernel/gdb-stub.c | 56
arch/mips/kernel/genex.S | 92
arch/mips/kernel/genrtc.c | 64
arch/mips/kernel/head.S | 73
arch/mips/kernel/i8259.c | 7
arch/mips/kernel/init_task.c | 4
arch/mips/kernel/ioctl32.c | 206
arch/mips/kernel/irixsig.c | 5
arch/mips/kernel/irq-rm7000.c | 96
arch/mips/kernel/irq.c | 10
arch/mips/kernel/irq_cpu.c | 3
arch/mips/kernel/linux32.c | 406
arch/mips/kernel/mips_ksyms.c | 45
arch/mips/kernel/module-elf32.c | 321
arch/mips/kernel/module-elf64.c | 17
arch/mips/kernel/offset.c | 18
arch/mips/kernel/proc.c | 6
arch/mips/kernel/process.c | 11
arch/mips/kernel/ptrace.c | 12
arch/mips/kernel/ptrace32.c | 1
arch/mips/kernel/r2300_switch.S | 5
arch/mips/kernel/r4k_fpu.S | 1
arch/mips/kernel/r4k_switch.S | 41
arch/mips/kernel/scall32-o32.S | 25
arch/mips/kernel/scall64-64.S | 27
arch/mips/kernel/scall64-n32.S | 21
arch/mips/kernel/scall64-o32.S | 22
arch/mips/kernel/semaphore.c | 337
arch/mips/kernel/setup.c | 356
arch/mips/kernel/signal.c | 14
arch/mips/kernel/signal32.c | 17
arch/mips/kernel/signal_n32.c | 2
arch/mips/kernel/smp.c | 173
arch/mips/kernel/syscall.c | 12
arch/mips/kernel/sysirix.c | 4
arch/mips/kernel/time.c | 429
arch/mips/kernel/traps.c | 152
arch/mips/kernel/unaligned.c | 11
arch/mips/kernel/vmlinux.lds.S | 26
arch/mips/lasat/Makefile | 1
arch/mips/lasat/interrupt.c | 40
arch/mips/lasat/lasatIRQ.S | 7
arch/mips/lasat/lasat_board.c | 7
arch/mips/lasat/pci.c | 25
arch/mips/lasat/prom.c | 17
arch/mips/lasat/reset.c | 8
arch/mips/lasat/setup.c | 44
arch/mips/lib-32/Makefile | 3
arch/mips/lib-32/csum_partial.S | 4
arch/mips/lib-32/dump_tlb.c | 8
arch/mips/lib-32/r3k_dump_tlb.c | 43
arch/mips/lib-64/Makefile | 3
arch/mips/lib-64/dump_tlb.c | 8
arch/mips/lib/Makefile | 6
arch/mips/lib/dec_and_lock.c | 55
arch/mips/lib/strlen_user.S | 40
arch/mips/lib/strncpy_user.S | 58
arch/mips/lib/strnlen_user.S | 46
arch/mips/math-emu/cp1emu.c | 3
arch/mips/math-emu/dp_fint.c | 2
arch/mips/math-emu/dp_flong.c | 2
arch/mips/math-emu/kernel_linkage.c | 1
arch/mips/math-emu/sp_fint.c | 2
arch/mips/math-emu/sp_flong.c | 2
arch/mips/mips-boards/atlas/Makefile | 10
arch/mips/mips-boards/atlas/atlas_gdb.c | 97
arch/mips/mips-boards/atlas/atlas_int.c | 16
arch/mips/mips-boards/atlas/atlas_setup.c | 117
arch/mips/mips-boards/generic/Makefile | 5
arch/mips/mips-boards/generic/cmdline.c | 4
arch/mips/mips-boards/generic/display.c | 22
arch/mips/mips-boards/generic/gdb_hook.c | 93
arch/mips/mips-boards/generic/init.c | 196
arch/mips/mips-boards/generic/memory.c | 11
arch/mips/mips-boards/generic/pci.c | 162
arch/mips/mips-boards/generic/printf.c | 54
arch/mips/mips-boards/generic/reset.c | 9
arch/mips/mips-boards/generic/time.c | 113
arch/mips/mips-boards/malta/Makefile | 6
arch/mips/mips-boards/malta/malta_int.c | 66
arch/mips/mips-boards/malta/malta_setup.c | 167
arch/mips/mips-boards/sead/Makefile | 2
arch/mips/mips-boards/sead/sead_int.c | 75
arch/mips/mips-boards/sead/sead_setup.c | 61
arch/mips/mm-32/Makefile | 25
arch/mips/mm-32/tlbex-r4k.S | 11
arch/mips/mm-64/Makefile | 19
arch/mips/mm-64/tlbex-r4k.S | 18
arch/mips/mm/Makefile | 36
arch/mips/mm/c-r3k.c | 11
arch/mips/mm/c-r4k.c | 518
arch/mips/mm/c-sb1.c | 81
arch/mips/mm/c-tx39.c | 11
arch/mips/mm/cache.c | 89
arch/mips/mm/cerr-sb1.c | 16
arch/mips/mm/cex-sb1.S | 149
arch/mips/mm/dma-coherent.c | 215
arch/mips/mm/dma-ip27.c | 217
arch/mips/mm/dma-noncoherent.c | 342
arch/mips/mm/extable.c | 21
arch/mips/mm/fault.c | 55
arch/mips/mm/highmem.c | 1
arch/mips/mm/init.c | 306
arch/mips/mm/pg-r4k.c | 486
arch/mips/mm/pg-sb1.c | 47
arch/mips/mm/pgtable-32.c | 34
arch/mips/mm/pgtable-64.c | 2
arch/mips/mm/pgtable.c | 2
arch/mips/mm/sc-r5k.c | 24
arch/mips/mm/sc-rm7k.c | 8
arch/mips/mm/tlb-andes.c | 17
arch/mips/mm/tlb-r3k.c | 3
arch/mips/mm/tlb-r4k.c | 49
arch/mips/mm/tlb-sb1.c | 86
arch/mips/mm/tlbex-r3k.S | 1
arch/mips/momentum/jaguar_atx/Makefile | 12
arch/mips/momentum/jaguar_atx/dbg_io.c | 126
arch/mips/momentum/jaguar_atx/int-handler.S | 129
arch/mips/momentum/jaguar_atx/irq.c | 90
arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h | 56
arch/mips/momentum/jaguar_atx/mv-irq.c | 162
arch/mips/momentum/jaguar_atx/pci-irq.c | 70
arch/mips/momentum/jaguar_atx/pci.c | 55
arch/mips/momentum/jaguar_atx/prom.c | 248
arch/mips/momentum/jaguar_atx/reset.c | 57
arch/mips/momentum/jaguar_atx/setup.c | 360
arch/mips/momentum/ocelot_c/cpci-irq.c | 1
arch/mips/momentum/ocelot_c/int-handler.S | 2
arch/mips/momentum/ocelot_c/irq.c | 111
arch/mips/momentum/ocelot_c/mv-irq.c | 3
arch/mips/momentum/ocelot_c/ocelot_c_fpga.h | 12
arch/mips/momentum/ocelot_c/pci-irq.c | 1
arch/mips/momentum/ocelot_c/prom.c | 121
arch/mips/momentum/ocelot_c/reset.c | 11
arch/mips/momentum/ocelot_c/setup.c | 43
arch/mips/momentum/ocelot_c/uart-irq.c | 1
arch/mips/momentum/ocelot_g/gt-irq.c | 1
arch/mips/momentum/ocelot_g/int-handler.S | 2
arch/mips/momentum/ocelot_g/irq.c | 105
arch/mips/momentum/ocelot_g/pci-irq.c | 1
arch/mips/momentum/ocelot_g/prom.c | 16
arch/mips/momentum/ocelot_g/setup.c | 12
arch/mips/pci/Makefile | 56
arch/mips/pci/fixup-atlas.c | 72
arch/mips/pci/fixup-au1000.c | 98
arch/mips/pci/fixup-capcella.c | 66
arch/mips/pci/fixup-cobalt.c | 108
arch/mips/pci/fixup-ddb5074.c | 24
arch/mips/pci/fixup-ddb5477.c | 80
arch/mips/pci/fixup-eagle.c | 192
arch/mips/pci/fixup-ev64120.c | 34
arch/mips/pci/fixup-ev96100.c | 42
arch/mips/pci/fixup-ip32.c | 50
arch/mips/pci/fixup-ite8172g.c | 181
arch/mips/pci/fixup-ivr.c | 138
arch/mips/pci/fixup-jmr3927.c | 61
arch/mips/pci/fixup-malta.c | 105
arch/mips/pci/fixup-ocelot.c | 6
arch/mips/pci/fixup-rbtx4927.c | 223
arch/mips/pci/fixup-sni.c | 88
arch/mips/pci/fixup-tb0226.c | 13
arch/mips/pci/fixup-tb0229.c | 13
arch/mips/pci/fixup-victor-mpc30x.c | 70
arch/mips/pci/fixup-yosemite.c | 48
arch/mips/pci/ops-au1000.c | 58
arch/mips/pci/ops-bonito64.c | 196
arch/mips/pci/ops-ddb5074.c | 64
arch/mips/pci/ops-ddb5476.c | 64
arch/mips/pci/ops-ddb5477.c | 77
arch/mips/pci/ops-gt64111.c | 100
arch/mips/pci/ops-gt64120.c | 154
arch/mips/pci/ops-gt96100.c | 169
arch/mips/pci/ops-it8172.c | 13
arch/mips/pci/ops-mace.c | 91
arch/mips/pci/ops-msc.c | 161
arch/mips/pci/ops-mv64340.c | 145
arch/mips/pci/ops-nile4.c | 147
arch/mips/pci/ops-sni.c | 89
arch/mips/pci/ops-titan.c | 135
arch/mips/pci/ops-tx3927.c | 391
arch/mips/pci/ops-tx4927.c | 306
arch/mips/pci/pci-ddb5074.c | 83
arch/mips/pci/pci-ddb5476.c | 85
arch/mips/pci/pci-ddb5477.c | 217
arch/mips/pci/pci-ev96100.c | 63
arch/mips/pci/pci-hplj.c | 60
arch/mips/pci/pci-ip27.c | 367
arch/mips/pci/pci-ip32.c | 492
arch/mips/pci/pci-jmr3927.c | 58
arch/mips/pci/pci-ocelot-c.c | 401
arch/mips/pci/pci-ocelot-g.c | 112
arch/mips/pci/pci-ocelot.c | 107
arch/mips/pci/pci-sb1250.c | 70
arch/mips/pci/pci-vr41xx.c | 14
arch/mips/pci/pci-vr41xx.h | 3
arch/mips/pci/pci.c | 409
arch/mips/pmc-sierra/yosemite/Makefile | 8
arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c | 171
arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h | 69
arch/mips/pmc-sierra/yosemite/ht-irq.c | 53
arch/mips/pmc-sierra/yosemite/ht.c | 459
arch/mips/pmc-sierra/yosemite/i2c-yosemite.c | 186
arch/mips/pmc-sierra/yosemite/i2c-yosemite.h | 96
arch/mips/pmc-sierra/yosemite/irq-handler.S | 125
arch/mips/pmc-sierra/yosemite/irq.c | 247
arch/mips/pmc-sierra/yosemite/prom.c | 189
arch/mips/pmc-sierra/yosemite/setup.c | 170
arch/mips/pmc-sierra/yosemite/setup.h | 47
arch/mips/pmc-sierra/yosemite/smp.c | 179
arch/mips/ramdisk/Makefile | 19
arch/mips/sgi-ip22/Makefile | 3
arch/mips/sgi-ip22/ip22-berr.c | 22
arch/mips/sgi-ip22/ip22-hpc.c | 16
arch/mips/sgi-ip22/ip22-int.c | 2
arch/mips/sgi-ip22/ip22-mc.c | 15
arch/mips/sgi-ip22/ip22-nvram.c | 5
arch/mips/sgi-ip22/ip22-reset.c | 30
arch/mips/sgi-ip22/ip22-setup.c | 59
arch/mips/sgi-ip22/ip22-time.c | 10
arch/mips/sgi-ip27/Makefile | 2
arch/mips/sgi-ip27/ip27-console.c | 39
arch/mips/sgi-ip27/ip27-init.c | 618
arch/mips/sgi-ip27/ip27-irq-glue.S | 57
arch/mips/sgi-ip27/ip27-irq.c | 468
arch/mips/sgi-ip27/ip27-klnuma.c | 16
arch/mips/sgi-ip27/ip27-memory.c | 187
arch/mips/sgi-ip27/ip27-nmi.c | 118
arch/mips/sgi-ip27/ip27-setup.c | 286
arch/mips/sgi-ip27/ip27-smp.c | 227
arch/mips/sgi-ip27/ip27-timer.c | 16
arch/mips/sgi-ip32/Makefile | 4
arch/mips/sgi-ip32/crime.c | 99
arch/mips/sgi-ip32/ip32-irq-glue.S | 1
arch/mips/sgi-ip32/ip32-irq.c | 276
arch/mips/sgi-ip32/ip32-reset.c | 58
arch/mips/sgi-ip32/ip32-setup.c | 94
arch/mips/sgi-ip32/ip32-timer.c | 28
arch/mips/sibyte/cfe/console.c | 9
arch/mips/sibyte/cfe/setup.c | 28
arch/mips/sibyte/cfe/smp.c | 92
arch/mips/sibyte/sb1250/bcm1250_tbprof.c | 103
arch/mips/sibyte/sb1250/bus_watcher.c | 42
arch/mips/sibyte/sb1250/irq.c | 79
arch/mips/sibyte/sb1250/irq_handler.S | 7
arch/mips/sibyte/sb1250/prom.c | 11
arch/mips/sibyte/sb1250/setup.c | 10
arch/mips/sibyte/sb1250/smp.c | 129
arch/mips/sibyte/sb1250/time.c | 18
arch/mips/sibyte/swarm/Makefile | 2
arch/mips/sibyte/swarm/dbg_io.c | 4
arch/mips/sibyte/swarm/rtc_m41t81.c | 2
arch/mips/sibyte/swarm/rtc_xicor1241.c | 2
arch/mips/sibyte/swarm/setup.c | 25
arch/mips/sibyte/swarm/time.c | 2
arch/mips/sni/Makefile | 2
arch/mips/sni/int-handler.S | 48
arch/mips/sni/irq.c | 86
arch/mips/sni/setup.c | 154
arch/mips/tx4927/common/tx4927_irq.c | 1
arch/mips/tx4927/common/tx4927_irq_handler.S | 1
arch/mips/tx4927/common/tx4927_setup.c | 13
arch/mips/tx4927/toshiba_rbtx4927/Makefile | 3
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | 2
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c | 26
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c | 117
arch/mips/vr4181/osprey/prom.c | 17
arch/mips/vr4181/osprey/setup.c | 9
arch/mips/vr41xx/casio-e55/Makefile | 2
arch/mips/vr41xx/casio-e55/init.c | 10
arch/mips/vr41xx/casio-e55/setup.c | 51
arch/mips/vr41xx/common/Makefile | 4
arch/mips/vr41xx/common/bcu.c | 124
arch/mips/vr41xx/common/cmu.c | 179
arch/mips/vr41xx/common/giu.c | 96
arch/mips/vr41xx/common/icu.c | 378
arch/mips/vr41xx/common/int-handler.S | 64
arch/mips/vr41xx/common/ksyms.c | 35
arch/mips/vr41xx/common/pmu.c | 76
arch/mips/vr41xx/common/rtc.c | 311
arch/mips/vr41xx/common/serial.c | 31
arch/mips/vr41xx/common/vrc4171.c | 106
arch/mips/vr41xx/common/vrc4173.c | 5
arch/mips/vr41xx/ibm-workpad/Makefile | 1
arch/mips/vr41xx/ibm-workpad/init.c | 10
arch/mips/vr41xx/ibm-workpad/setup.c | 51
arch/mips/vr41xx/nec-eagle/Makefile | 1
arch/mips/vr41xx/nec-eagle/init.c | 10
arch/mips/vr41xx/nec-eagle/setup.c | 79
arch/mips/vr41xx/tanbac-tb0226/init.c | 23
arch/mips/vr41xx/tanbac-tb0226/setup.c | 56
arch/mips/vr41xx/tanbac-tb0229/Makefile | 4
arch/mips/vr41xx/tanbac-tb0229/init.c | 23
arch/mips/vr41xx/tanbac-tb0229/reboot.c | 5
arch/mips/vr41xx/tanbac-tb0229/setup.c | 64
arch/mips/vr41xx/victor-mpc30x/Makefile | 1
arch/mips/vr41xx/victor-mpc30x/init.c | 10
arch/mips/vr41xx/victor-mpc30x/setup.c | 58
arch/mips/vr41xx/zao-capcella/Makefile | 1
arch/mips/vr41xx/zao-capcella/init.c | 21
arch/mips/vr41xx/zao-capcella/setup.c | 58
include/asm-mips/addrspace.h | 23
include/asm-mips/arc/types.h | 15
include/asm-mips/asm.h | 25
include/asm-mips/asmmacro-32.h | 1
include/asm-mips/asmmacro-64.h | 1
include/asm-mips/atomic.h | 390
include/asm-mips/bitops.h | 64
include/asm-mips/bootinfo.h | 220
include/asm-mips/bug.h | 1
include/asm-mips/cache.h | 12
include/asm-mips/cacheflush.h | 13
include/asm-mips/checksum.h | 75
include/asm-mips/cobalt/cobalt.h | 78
include/asm-mips/cpu-features.h | 125
include/asm-mips/cpu.h | 33
include/asm-mips/dec/ecc.h | 6
include/asm-mips/dec/kn05.h | 1
include/asm-mips/dec/prom.h | 4
include/asm-mips/dma-mapping.h | 184
include/asm-mips/ds1286.h | 56
include/asm-mips/elf.h | 18
include/asm-mips/floppy.h | 63
include/asm-mips/fpu.h | 1
include/asm-mips/galileo-boards/ev96100.h | 36
include/asm-mips/galileo-boards/gt96100.h | 5
include/asm-mips/gdb-stub.h | 8
include/asm-mips/gt64120.h | 35
include/asm-mips/hardirq.h | 1
include/asm-mips/hazards.h | 49
include/asm-mips/highmem.h | 1
include/asm-mips/hw_irq.h | 2
include/asm-mips/i8259.h | 46
include/asm-mips/ide.h | 51
include/asm-mips/io.h | 184
include/asm-mips/ioctl.h | 17
include/asm-mips/ip32/crime.h | 97
include/asm-mips/ip32/mace.h | 572
include/asm-mips/irq.h | 39
include/asm-mips/irq_cpu.h | 1
include/asm-mips/jazz.h | 10
include/asm-mips/mach-atlas/mc146818rtc.h | 53
include/asm-mips/mach-au1x00/au1000.h | 1155
include/asm-mips/mach-au1x00/au1000_dma.h | 432
include/asm-mips/mach-au1x00/au1000_gpio.h | 56
include/asm-mips/mach-au1x00/au1000_pcmcia.h | 107
include/asm-mips/mach-au1x00/au1000_usbdev.h | 73
include/asm-mips/mach-au1x00/timex.h | 13
include/asm-mips/mach-db1x00/db1x00.h | 125
include/asm-mips/mach-ddb5074/mc146818rtc.h | 31
include/asm-mips/mach-dec/mc146818rtc.h | 46
include/asm-mips/mach-dec/param.h | 18
include/asm-mips/mach-ev64120/mach-gt64120.h | 61
include/asm-mips/mach-ev96100/mach-gt64120.h | 46
include/asm-mips/mach-generic/cpu-feature-overrides.h | 13
include/asm-mips/mach-generic/floppy.h | 140
include/asm-mips/mach-generic/ide.h | 86
include/asm-mips/mach-generic/irq.h | 13
include/asm-mips/mach-generic/mangle-port.h | 15
include/asm-mips/mach-generic/mc146818rtc.h | 36
include/asm-mips/mach-generic/param.h | 13
include/asm-mips/mach-generic/spaces.h | 41
include/asm-mips/mach-generic/timex.h | 22
include/asm-mips/mach-ip22/cpu-feature-overrides.h | 29
include/asm-mips/mach-ip22/ds1286.h | 18
include/asm-mips/mach-ip27/cpu-feature-overrides.h | 38
include/asm-mips/mach-ip27/irq.h | 22
include/asm-mips/mach-ip27/mangle-port.h | 15
include/asm-mips/mach-ip27/mmzone.h | 8
include/asm-mips/mach-ip27/spaces.h | 30
include/asm-mips/mach-ip32/mangle-port.h | 15
include/asm-mips/mach-ip32/mc146818rtc.h | 32
include/asm-mips/mach-jazz/floppy.h | 135
include/asm-mips/mach-jazz/mc146818rtc.h | 34
include/asm-mips/mach-jazz/param.h | 16
include/asm-mips/mach-jazz/timex.h | 16
include/asm-mips/mach-jmr3927/asm/ds1742.h | 16
include/asm-mips/mach-lasat/mach-gt64120.h | 27
include/asm-mips/mach-mips/mach-gt64120.h | 28
include/asm-mips/mach-mips/mc146818rtc.h | 46
include/asm-mips/mach-ocelot/mach-gt64120.h | 30
include/asm-mips/mach-pb1x00/mc146818rtc.h | 34
include/asm-mips/mach-pb1x00/pb1000.h | 172
include/asm-mips/mach-pb1x00/pb1100.h | 85
include/asm-mips/mach-pb1x00/pb1500.h | 51
include/asm-mips/mach-rm200/cpu-feature-overrides.h | 42
include/asm-mips/mach-rm200/mc146818rtc.h | 17
include/asm-mips/mach-vr41xx/timex.h | 18
include/asm-mips/mc146818-time.h | 129
include/asm-mips/mc146818rtc.h | 52
include/asm-mips/mips-boards/atlas.h | 14
include/asm-mips/mips-boards/atlasint.h | 59
include/asm-mips/mips-boards/bonito64.h | 35
include/asm-mips/mips-boards/generic.h | 97
include/asm-mips/mips-boards/malta.h | 19
include/asm-mips/mips-boards/msc01_pci.h | 40
include/asm-mips/mips-boards/piix4.h | 12
include/asm-mips/mips-boards/prom.h | 16
include/asm-mips/mips-boards/seadint.h | 11
include/asm-mips/mipsregs.h | 32
include/asm-mips/mmu_context.h | 4
include/asm-mips/mmzone.h | 110
include/asm-mips/msgbuf.h | 22
include/asm-mips/mv64340.h | 36
include/asm-mips/namei.h | 31
include/asm-mips/numnodes.h | 7
include/asm-mips/page-32.h | 3
include/asm-mips/page-64.h | 3
include/asm-mips/page.h | 29
include/asm-mips/param.h | 15
include/asm-mips/pci.h | 76
include/asm-mips/pci/bridge.h | 23
include/asm-mips/pci_channel.h | 29
include/asm-mips/pgalloc.h | 4
include/asm-mips/pgtable-32.h | 20
include/asm-mips/pgtable-64.h | 61
include/asm-mips/pgtable-bits.h | 2
include/asm-mips/pgtable.h | 8
include/asm-mips/prefetch.h | 43
include/asm-mips/processor.h | 66
include/asm-mips/ptrace.h | 20
include/asm-mips/r4kcache.h | 274
include/asm-mips/rtc.h | 37
include/asm-mips/semaphore.h | 205
include/asm-mips/serial.h | 191
include/asm-mips/sgi/ioc.h | 39
include/asm-mips/sgi/pi1.h | 71
include/asm-mips/sgialib.h | 6
include/asm-mips/sgiarcs.h | 2
include/asm-mips/sibyte/board.h | 7
include/asm-mips/sibyte/carmel.h | 2
include/asm-mips/sibyte/sb1250.h | 2
include/asm-mips/sibyte/sentosa.h | 1
include/asm-mips/sibyte/swarm.h | 32
include/asm-mips/sibyte/trace_prof.h | 5
include/asm-mips/sigcontext.h | 2
include/asm-mips/siginfo.h | 38
include/asm-mips/sim.h | 35
include/asm-mips/smp.h | 63
include/asm-mips/sn/addrs.h | 5
include/asm-mips/sn/arch.h | 11
include/asm-mips/sn/hub.h | 15
include/asm-mips/sn/intr.h | 147
include/asm-mips/sn/intr_public.h | 44
include/asm-mips/sn/klconfig.h | 6
include/asm-mips/sn/sn0/addrs.h | 18
include/asm-mips/sn/sn0/ip27.h | 7
include/asm-mips/sn/sn_private.h | 13
include/asm-mips/sni.h | 5
include/asm-mips/socket.h | 2
include/asm-mips/spinlock.h | 14
include/asm-mips/stackframe.h | 56
include/asm-mips/system.h | 140
include/asm-mips/termios.h | 2
include/asm-mips/thread_info.h | 34
include/asm-mips/time.h | 27
include/asm-mips/timex.h | 29
include/asm-mips/titan_dep.h | 68
include/asm-mips/tlb.h | 9
include/asm-mips/topology.h | 2
include/asm-mips/tx4927/toshiba_rbtx4927.h | 1
include/asm-mips/tx4927/tx4927_pci.h | 2
include/asm-mips/types.h | 9
include/asm-mips/uaccess.h | 565
include/asm-mips/unaligned.h | 16
include/asm-mips/unistd.h | 32
include/asm-mips/vr41xx/mpc30x.h | 2
include/asm-mips/vr41xx/vr41xx.h | 93
include/asm-mips/vr41xx/vrc4171.h | 43
include/asm-mips/vr41xx/vrc4173.h | 13
include/asm-mips/vr41xx/workpad.h | 2
include/asm-mips/war.h | 74
include/asm-mips/xxs1500.h | 35
648 files changed, 57511 insertions(+), 49515 deletions(-)
diff -puN arch/mips/arc/cmdline.c~mips-megapatch arch/mips/arc/cmdline.c
--- 25/arch/mips/arc/cmdline.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/arc/cmdline.c 2004-02-19 12:53:00.000000000 -0800
@@ -16,8 +16,6 @@
#undef DEBUG_CMDLINE
-char arcs_cmdline[CL_SIZE];
-
char * __init prom_getcmdline(void)
{
return arcs_cmdline;
diff -puN arch/mips/arc/identify.c~mips-megapatch arch/mips/arc/identify.c
--- 25/arch/mips/arc/identify.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/arc/identify.c 2004-02-19 12:53:00.000000000 -0800
@@ -63,7 +63,7 @@ static struct smatch mach_table[] = {
"SNI RM200_PCI",
MACH_GROUP_SNI_RM,
MACH_SNI_RM200_PCI,
- 0
+ PROM_FLAG_DONT_FREE_TEMP
}
};
diff -puN arch/mips/arc/init.c~mips-megapatch arch/mips/arc/init.c
--- 25/arch/mips/arc/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/arc/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -10,6 +10,7 @@
#include <linux/init.h>
#include <linux/kernel.h>
+#include <asm/bootinfo.h>
#include <asm/sgialib.h>
#undef DEBUG_PROM_INIT
@@ -19,13 +20,13 @@ struct linux_romvec *romvec;
int prom_argc;
LONG *_prom_argv, *_prom_envp;
-void __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+void __init prom_init(void)
{
PSYSTEM_PARAMETER_BLOCK pb = PROMBLOCK;
romvec = ROMVECTOR;
- prom_argc = argc;
- _prom_argv = (LONG *) argv;
- _prom_envp = (LONG *) envp;
+ prom_argc = fw_arg0;
+ _prom_argv = (LONG *) fw_arg1;
+ _prom_envp = (LONG *) fw_arg2;
if (pb->magic != 0x53435241) {
prom_printf("Aieee, bad prom vector magic %08lx\n", pb->magic);
diff -puN arch/mips/arc/memory.c~mips-megapatch arch/mips/arc/memory.c
--- 25/arch/mips/arc/memory.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/arc/memory.c 2004-02-19 12:53:00.000000000 -0800
@@ -26,6 +26,12 @@
#undef DEBUG
+/*
+ * For ARC firmware memory functions the unit of meassuring memory is always
+ * a 4k page of memory
+ */
+#define ARC_PAGE_SHIFT 12
+
struct linux_mdesc * __init ArcGetMemoryDescriptor(struct linux_mdesc *Current)
{
return (struct linux_mdesc *) ARC_CALL1(get_mdesc, Current);
@@ -127,20 +133,23 @@ void __init prom_meminit(void)
unsigned long base, size;
long type;
- base = p->base << PAGE_SHIFT;
- size = p->pages << PAGE_SHIFT;
+ base = p->base << ARC_PAGE_SHIFT;
+ size = p->pages << ARC_PAGE_SHIFT;
type = prom_memtype_classify(p->type);
add_memory_region(base, size, type);
}
}
-void __init prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
unsigned long freed = 0;
unsigned long addr;
int i;
+ if (prom_flags & PROM_FLAG_DONT_FREE_TEMP)
+ return 0;
+
for (i = 0; i < boot_mem_map.nr_map; i++) {
if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
continue;
@@ -156,4 +165,6 @@ void __init prom_free_prom_memory (void)
}
}
printk(KERN_INFO "Freeing prom memory: %ldkb freed\n", freed >> 10);
+
+ return freed;
}
diff -puN arch/mips/arc/misc.c~mips-megapatch arch/mips/arc/misc.c
--- 25/arch/mips/arc/misc.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/arc/misc.c 2004-02-19 12:53:00.000000000 -0800
@@ -101,3 +101,8 @@ ArcFlushAllCaches(VOID)
{
ARC_CALL0(cache_flush);
}
+
+DISPLAY_STATUS * __init ArcGetDisplayStatus(ULONG FileID)
+{
+ return ARC_CALL1(GetDisplayStatus, FileID);
+}
diff -puN arch/mips/au1000/common/clocks.c~mips-megapatch arch/mips/au1000/common/clocks.c
--- 25/arch/mips/au1000/common/clocks.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/common/clocks.c 2004-02-19 12:53:00.000000000 -0800
@@ -28,7 +28,7 @@
*/
#include <linux/module.h>
-#include <asm/au1000.h>
+#include <asm/mach-au1x00/au1000.h>
static unsigned int au1x00_clock; // Hz
static unsigned int lcd_clock; // KHz
@@ -85,8 +85,7 @@ void set_au1x00_lcd_clock(void)
lcd_clock = sys_busclk / 4;
if (lcd_clock > 50000) /* Epson MAX */
- printk("%s: warning: LCD clock too high (%d KHz)\n",
- __FUNCTION__, lcd_clock);
+ printk("warning: LCD clock too high (%d KHz)\n", lcd_clock);
}
unsigned int get_au1x00_lcd_clock(void)
diff -puN arch/mips/au1000/common/dbg_io.c~mips-megapatch arch/mips/au1000/common/dbg_io.c
--- 25/arch/mips/au1000/common/dbg_io.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/common/dbg_io.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,7 +1,7 @@
#include <linux/config.h>
#include <asm/io.h>
-#include <asm/au1000.h>
+#include <asm/mach-au1x00/au1000.h>
#ifdef CONFIG_KGDB
diff -puN arch/mips/au1000/common/dma.c~mips-megapatch arch/mips/au1000/common/dma.c
--- 25/arch/mips/au1000/common/dma.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/common/dma.c 2004-02-19 12:53:00.000000000 -0800
@@ -36,12 +36,12 @@
#include <linux/spinlock.h>
#include <linux/string.h>
#include <linux/delay.h>
-#include <asm/au1000.h>
-#include <asm/au1000_dma.h>
+#include <linux/interrupt.h>
#include <asm/system.h>
+#include <asm/mach-au1x00/au1000.h>
+#include <asm/mach-au1x00/au1000_dma.h>
-
-
+#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
/*
* A note on resource allocation:
*
@@ -95,7 +95,6 @@ static const struct {
{I2S_DATA, DMA_DR | DMA_DW32 | DMA_NC}
};
-
int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
int length, int *eof, void *data)
{
@@ -152,7 +151,7 @@ void dump_au1000_dma_channel(unsigned in
* Requests the DMA done IRQ if irqhandler != NULL.
*/
int request_au1000_dma(int dev_id, const char *dev_str,
- void (*irqhandler)(int, void *, struct pt_regs *),
+ irqreturn_t (*irqhandler)(int, void *, struct pt_regs *),
unsigned long irqflags,
void *irq_dev_id)
{
@@ -198,7 +197,6 @@ int request_au1000_dma(int dev_id, const
return i;
}
-
void free_au1000_dma(unsigned int dmanr)
{
struct dma_chan *chan = get_dma_chan(dmanr);
@@ -215,3 +213,4 @@ void free_au1000_dma(unsigned int dmanr)
chan->irq_dev = NULL;
chan->dev_id = -1;
}
+#endif // AU1000 AU1500 AU1100
diff -puN arch/mips/au1000/common/irq.c~mips-megapatch arch/mips/au1000/common/irq.c
--- 25/arch/mips/au1000/common/irq.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/common/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -26,6 +26,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
+#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
@@ -46,22 +47,9 @@
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
-#include <asm/au1000.h>
-
-#if defined(CONFIG_MIPS_PB1000)
-#include <asm/pb1000.h>
-#elif defined(CONFIG_MIPS_PB1500)
-#include <asm/pb1500.h>
-#elif defined(CONFIG_MIPS_PB1100)
-#include <asm/pb1100.h>
-#elif defined(CONFIG_MIPS_DB1000)
-#include <asm/db1x00.h>
-#elif defined(CONFIG_MIPS_DB1100)
-#include <asm/db1x00.h>
-#elif defined(CONFIG_MIPS_DB1500)
-#include <asm/db1x00.h>
-#else
-#error unsupported Alchemy board
+#include <asm/mach-au1x00/au1000.h>
+#ifdef CONFIG_MIPS_PB1000
+#include <asm/mach-pb1x00/pb1000.h>
#endif
#undef DEBUG_IRQ
@@ -85,8 +73,6 @@ extern void breakpoint(void);
extern asmlinkage void au1000_IRQ(void);
extern void set_debug_traps(void);
extern irq_cpustat_t irq_stat [NR_CPUS];
-unsigned int local_bh_count[NR_CPUS];
-unsigned int local_irq_count[NR_CPUS];
static void setup_local_irq(unsigned int irq, int type, int int_req);
static unsigned int startup_irq(unsigned int irq);
@@ -94,10 +80,12 @@ static void end_irq(unsigned int irq_nr)
static inline void mask_and_ack_level_irq(unsigned int irq_nr);
static inline void mask_and_ack_rise_edge_irq(unsigned int irq_nr);
static inline void mask_and_ack_fall_edge_irq(unsigned int irq_nr);
+static inline void mask_and_ack_either_edge_irq(unsigned int irq_nr);
inline void local_enable_irq(unsigned int irq_nr);
inline void local_disable_irq(unsigned int irq_nr);
extern void __init init_generic_irq(void);
+void (*board_init_irq)(void);
#ifdef CONFIG_PM
extern void counter0_irq(int irq, void *dev_id, struct pt_regs *regs);
@@ -121,6 +109,11 @@ static void setup_local_irq(unsigned int
au_writel(1<<(irq_nr-32), IC1_CFG1SET);
au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
break;
+ case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
+ au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
+ au_writel(1<<(irq_nr-32), IC1_CFG1SET);
+ au_writel(1<<(irq_nr-32), IC1_CFG0SET);
+ break;
case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
au_writel(1<<(irq_nr-32), IC1_CFG2SET);
au_writel(1<<(irq_nr-32), IC1_CFG1CLR);
@@ -163,6 +156,11 @@ static void setup_local_irq(unsigned int
au_writel(1<<irq_nr, IC0_CFG1SET);
au_writel(1<<irq_nr, IC0_CFG0CLR);
break;
+ case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
+ au_writel(1<<irq_nr, IC0_CFG2CLR);
+ au_writel(1<<irq_nr, IC0_CFG1SET);
+ au_writel(1<<irq_nr, IC0_CFG0SET);
+ break;
case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
au_writel(1<<irq_nr, IC0_CFG2SET);
au_writel(1<<irq_nr, IC0_CFG1CLR);
@@ -267,6 +265,25 @@ static inline void mask_and_ack_fall_edg
}
+static inline void mask_and_ack_either_edge_irq(unsigned int irq_nr)
+{
+ /* This may assume that we don't get interrupts from
+ * both edges at once, or if we do, that we don't care.
+ */
+ if (irq_nr > AU1000_LAST_INTC0_INT) {
+ au_writel(1<<(irq_nr-32), IC1_FALLINGCLR);
+ au_writel(1<<(irq_nr-32), IC1_RISINGCLR);
+ au_writel(1<<(irq_nr-32), IC1_MASKCLR);
+ }
+ else {
+ au_writel(1<<irq_nr, IC0_FALLINGCLR);
+ au_writel(1<<irq_nr, IC0_RISINGCLR);
+ au_writel(1<<irq_nr, IC0_MASKCLR);
+ }
+ au_sync();
+}
+
+
static inline void mask_and_ack_level_irq(unsigned int irq_nr)
{
@@ -352,7 +369,6 @@ static struct hw_interrupt_type rise_edg
NULL
};
-/*
static struct hw_interrupt_type fall_edge_irq_type = {
"Au1000 Fall Edge",
startup_irq,
@@ -363,7 +379,17 @@ static struct hw_interrupt_type fall_edg
end_irq,
NULL
};
-*/
+
+static struct hw_interrupt_type either_edge_irq_type = {
+ "Au1000 Rise or Fall Edge",
+ startup_irq,
+ shutdown_irq,
+ local_enable_irq,
+ local_disable_irq,
+ mask_and_ack_either_edge_irq,
+ end_irq,
+ NULL
+};
static struct hw_interrupt_type level_irq_type = {
"Au1000 Level",
@@ -388,6 +414,9 @@ void __init init_IRQ(void)
{
int i;
unsigned long cp0_status;
+ au1xxx_irq_map_t *imp;
+ extern au1xxx_irq_map_t au1xxx_irq_map[];
+ extern int au1xxx_nr_irqs;
cp0_status = read_c0_status();
memset(irq_desc, 0, sizeof(irq_desc));
@@ -396,109 +425,54 @@ void __init init_IRQ(void)
init_generic_irq();
for (i = 0; i <= AU1000_MAX_INTR; i++) {
- switch (i) {
- case AU1000_UART0_INT:
- case AU1000_UART3_INT:
-#ifdef CONFIG_MIPS_PB1000
- case AU1000_UART1_INT:
- case AU1000_UART2_INT:
+ /* default is active high, level interrupt */
+ setup_local_irq(i, INTC_INT_HIGH_LEVEL, 0);
+ irq_desc[i].handler = &level_irq_type;
+ }
- case AU1000_SSI0_INT:
- case AU1000_SSI1_INT:
-#endif
+ /* Now set up the irq mapping for the board.
+ */
+ imp = au1xxx_irq_map;
+ for (i=0; i<au1xxx_nr_irqs; i++) {
-#ifdef CONFIG_MIPS_PB1100
- case AU1000_UART1_INT:
+ setup_local_irq(imp->im_irq, imp->im_type, imp->im_request);
- case AU1000_SSI0_INT:
- case AU1000_SSI1_INT:
-#endif
- case AU1000_DMA_INT_BASE:
- case AU1000_DMA_INT_BASE+1:
- case AU1000_DMA_INT_BASE+2:
- case AU1000_DMA_INT_BASE+3:
- case AU1000_DMA_INT_BASE+4:
- case AU1000_DMA_INT_BASE+5:
- case AU1000_DMA_INT_BASE+6:
- case AU1000_DMA_INT_BASE+7:
-
- case AU1000_IRDA_TX_INT:
- case AU1000_IRDA_RX_INT:
-
- case AU1000_MAC0_DMA_INT:
-#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_DB1500)
- case AU1000_MAC1_DMA_INT:
-#endif
- case AU1500_GPIO_204:
- setup_local_irq(i, INTC_INT_HIGH_LEVEL, 0);
- irq_desc[i].handler = &level_irq_type;
- break;
+ switch (imp->im_type) {
-#ifdef CONFIG_MIPS_PB1000
- case AU1000_GPIO_15:
-#endif
- case AU1000_USB_HOST_INT:
-#if defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_DB1500)
- case AU1000_PCI_INTA:
- case AU1000_PCI_INTB:
- case AU1000_PCI_INTC:
- case AU1000_PCI_INTD:
- case AU1500_GPIO_201:
- case AU1500_GPIO_202:
- case AU1500_GPIO_203:
- case AU1500_GPIO_205:
- case AU1500_GPIO_207:
-#endif
+ case INTC_INT_HIGH_LEVEL:
+ irq_desc[imp->im_irq].handler = &level_irq_type;
+ break;
-#ifdef CONFIG_MIPS_PB1100
- case AU1000_GPIO_9: // PCMCIA Card Fully_Interted#
- case AU1000_GPIO_10: // PCMCIA_STSCHG#
- case AU1000_GPIO_11: // PCMCIA_IRQ#
- case AU1000_GPIO_13: // DC_IRQ#
- case AU1000_GPIO_23: // 2-wire SCL
-#endif
-#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500)
- case AU1000_GPIO_0: // PCMCIA Card 0 Fully_Interted#
- case AU1000_GPIO_1: // PCMCIA Card 0 STSCHG#
- case AU1000_GPIO_2: // PCMCIA Card 0 IRQ#
-
- case AU1000_GPIO_3: // PCMCIA Card 1 Fully_Interted#
- case AU1000_GPIO_4: // PCMCIA Card 1 STSCHG#
- case AU1000_GPIO_5: // PCMCIA Card 1 IRQ#
-#endif
- setup_local_irq(i, INTC_INT_LOW_LEVEL, 0);
- irq_desc[i].handler = &level_irq_type;
- break;
- case AU1000_ACSYNC_INT:
- case AU1000_AC97C_INT:
- case AU1000_TOY_INT:
- case AU1000_TOY_MATCH0_INT:
- case AU1000_TOY_MATCH1_INT:
- case AU1000_USB_DEV_SUS_INT:
- case AU1000_USB_DEV_REQ_INT:
- case AU1000_RTC_INT:
- case AU1000_RTC_MATCH0_INT:
- case AU1000_RTC_MATCH1_INT:
- case AU1000_RTC_MATCH2_INT:
- setup_local_irq(i, INTC_INT_RISE_EDGE, 0);
- irq_desc[i].handler = &rise_edge_irq_type;
- break;
-
- // Careful if you change match 2 request!
- // The interrupt handler is called directly
- // from the low level dispatch code.
- case AU1000_TOY_MATCH2_INT:
- setup_local_irq(i, INTC_INT_RISE_EDGE, 1);
- irq_desc[i].handler = &rise_edge_irq_type;
- break;
- default: /* active high, level interrupt */
- setup_local_irq(i, INTC_INT_HIGH_LEVEL, 0);
- irq_desc[i].handler = &level_irq_type;
- break;
+ case INTC_INT_LOW_LEVEL:
+ irq_desc[imp->im_irq].handler = &level_irq_type;
+ break;
+
+ case INTC_INT_RISE_EDGE:
+ irq_desc[imp->im_irq].handler = &rise_edge_irq_type;
+ break;
+
+ case INTC_INT_FALL_EDGE:
+ irq_desc[imp->im_irq].handler = &fall_edge_irq_type;
+ break;
+
+ case INTC_INT_RISE_AND_FALL_EDGE:
+ irq_desc[imp->im_irq].handler = &either_edge_irq_type;
+ break;
+
+ default:
+ panic("Unknown au1xxx irq map");
+ break;
}
+ imp++;
}
set_c0_status(ALLINTS);
+
+ /* Board specific IRQ initialization.
+ */
+ if (board_init_irq)
+ (*board_init_irq)();
+
#ifdef CONFIG_KGDB
/* If local serial I/O used for debug port, enter kgdb at once */
puts("Waiting for kgdb to connect...");
@@ -516,7 +490,7 @@ void __init init_IRQ(void)
void intc0_req0_irqdispatch(struct pt_regs *regs)
{
- int irq = 0, i;
+ int irq = 0;
static unsigned long intc0_req0 = 0;
intc0_req0 |= au_readl(IC0_REQ0INT);
@@ -534,43 +508,33 @@ void intc0_req0_irqdispatch(struct pt_re
return;
}
- for (i=0; i<32; i++) {
- if ((intc0_req0 & (1<<i))) {
- intc0_req0 &= ~(1<<i);
- do_IRQ(irq, regs);
- break;
- }
- irq++;
- }
+ irq = au_ffs(intc0_req0) - 1;
+ intc0_req0 &= ~(1<<irq);
+ do_IRQ(irq, regs);
}
void intc0_req1_irqdispatch(struct pt_regs *regs)
{
- int irq = 0, i;
+ int irq = 0;
static unsigned long intc0_req1 = 0;
- intc0_req1 = au_readl(IC0_REQ1INT);
+ intc0_req1 |= au_readl(IC0_REQ1INT);
if (!intc0_req1) return;
- for (i=0; i<32; i++) {
- if ((intc0_req1 & (1<<i))) {
- intc0_req1 &= ~(1<<i);
+ irq = au_ffs(intc0_req1) - 1;
+ intc0_req1 &= ~(1<<irq);
#ifdef CONFIG_PM
- if (i == AU1000_TOY_MATCH2_INT) {
- mask_and_ack_rise_edge_irq(irq);
- counter0_irq(irq, NULL, regs);
- local_enable_irq(irq);
- }
- else
+ if (irq == AU1000_TOY_MATCH2_INT) {
+ mask_and_ack_rise_edge_irq(irq);
+ counter0_irq(irq, NULL, regs);
+ local_enable_irq(irq);
+ }
+ else
#endif
- {
- do_IRQ(irq, regs);
- }
- break;
- }
- irq++;
+ {
+ do_IRQ(irq, regs);
}
}
@@ -581,51 +545,114 @@ void intc0_req1_irqdispatch(struct pt_re
*/
void intc1_req0_irqdispatch(struct pt_regs *regs)
{
- int irq = 0, i;
+ int irq = 0;
static unsigned long intc1_req0 = 0;
intc1_req0 |= au_readl(IC1_REQ0INT);
if (!intc1_req0) return;
-#if defined(CONFIG_MIPS_PB1000) && defined(DEBUG_IRQ)
- au_writel(1, CPLD_AUX0); /* debug led 0 */
-#endif
- for (i=0; i<32; i++) {
- if ((intc1_req0 & (1<<i))) {
- intc1_req0 &= ~(1<<i);
-#if defined(CONFIG_MIPS_PB1000) && defined(DEBUG_IRQ)
- au_writel(2, CPLD_AUX0); /* turn on debug led 1 */
- do_IRQ(irq+32, regs);
- au_writel(0, CPLD_AUX0); /* turn off debug led 1 */
-#else
- do_IRQ(irq+32, regs);
-#endif
- break;
- }
- irq++;
- }
-#if defined(CONFIG_MIPS_PB1000) && defined(DEBUG_IRQ)
- au_writel(0, CPLD_AUX0);
-#endif
+ irq = au_ffs(intc1_req0) - 1;
+ intc1_req0 &= ~(1<<irq);
+ irq += 32;
+ do_IRQ(irq, regs);
}
void intc1_req1_irqdispatch(struct pt_regs *regs)
{
- int irq = 0, i;
+ int irq = 0;
static unsigned long intc1_req1 = 0;
intc1_req1 |= au_readl(IC1_REQ1INT);
if (!intc1_req1) return;
- for (i=0; i<32; i++) {
- if ((intc1_req1 & (1<<i))) {
- intc1_req1 &= ~(1<<i);
- do_IRQ(irq+32, regs);
- break;
- }
- irq++;
- }
+ irq = au_ffs(intc1_req1) - 1;
+ intc1_req1 &= ~(1<<irq);
+ irq += 32;
+ do_IRQ(irq, regs);
+}
+
+#ifdef CONFIG_PM
+
+/* Save/restore the interrupt controller state.
+ * Called from the save/restore core registers as part of the
+ * au_sleep function in power.c.....maybe I should just pm_register()
+ * them instead?
+ */
+static uint sleep_intctl_config0[2];
+static uint sleep_intctl_config1[2];
+static uint sleep_intctl_config2[2];
+static uint sleep_intctl_src[2];
+static uint sleep_intctl_assign[2];
+static uint sleep_intctl_wake[2];
+static uint sleep_intctl_mask[2];
+
+void
+save_au1xxx_intctl(void)
+{
+ sleep_intctl_config0[0] = au_readl(IC0_CFG0RD);
+ sleep_intctl_config1[0] = au_readl(IC0_CFG1RD);
+ sleep_intctl_config2[0] = au_readl(IC0_CFG2RD);
+ sleep_intctl_src[0] = au_readl(IC0_SRCRD);
+ sleep_intctl_assign[0] = au_readl(IC0_ASSIGNRD);
+ sleep_intctl_wake[0] = au_readl(IC0_WAKERD);
+ sleep_intctl_mask[0] = au_readl(IC0_MASKRD);
+
+ sleep_intctl_config0[1] = au_readl(IC1_CFG0RD);
+ sleep_intctl_config1[1] = au_readl(IC1_CFG1RD);
+ sleep_intctl_config2[1] = au_readl(IC1_CFG2RD);
+ sleep_intctl_src[1] = au_readl(IC1_SRCRD);
+ sleep_intctl_assign[1] = au_readl(IC1_ASSIGNRD);
+ sleep_intctl_wake[1] = au_readl(IC1_WAKERD);
+ sleep_intctl_mask[1] = au_readl(IC1_MASKRD);
+}
+
+/* For most restore operations, we clear the entire register and
+ * then set the bits we found during the save.
+ */
+void
+restore_au1xxx_intctl(void)
+{
+ au_writel(0xffffffff, IC0_MASKCLR); au_sync();
+
+ au_writel(0xffffffff, IC0_CFG0CLR); au_sync();
+ au_writel(sleep_intctl_config0[0], IC0_CFG0SET); au_sync();
+ au_writel(0xffffffff, IC0_CFG1CLR); au_sync();
+ au_writel(sleep_intctl_config1[0], IC0_CFG1SET); au_sync();
+ au_writel(0xffffffff, IC0_CFG2CLR); au_sync();
+ au_writel(sleep_intctl_config2[0], IC0_CFG2SET); au_sync();
+ au_writel(0xffffffff, IC0_SRCCLR); au_sync();
+ au_writel(sleep_intctl_src[0], IC0_SRCSET); au_sync();
+ au_writel(0xffffffff, IC0_ASSIGNCLR); au_sync();
+ au_writel(sleep_intctl_assign[0], IC0_ASSIGNSET); au_sync();
+ au_writel(0xffffffff, IC0_WAKECLR); au_sync();
+ au_writel(sleep_intctl_wake[0], IC0_WAKESET); au_sync();
+ au_writel(0xffffffff, IC0_RISINGCLR); au_sync();
+ au_writel(0xffffffff, IC0_FALLINGCLR); au_sync();
+ au_writel(0x00000000, IC0_TESTBIT); au_sync();
+
+ au_writel(0xffffffff, IC1_MASKCLR); au_sync();
+
+ au_writel(0xffffffff, IC1_CFG0CLR); au_sync();
+ au_writel(sleep_intctl_config0[1], IC1_CFG0SET); au_sync();
+ au_writel(0xffffffff, IC1_CFG1CLR); au_sync();
+ au_writel(sleep_intctl_config1[1], IC1_CFG1SET); au_sync();
+ au_writel(0xffffffff, IC1_CFG2CLR); au_sync();
+ au_writel(sleep_intctl_config2[1], IC1_CFG2SET); au_sync();
+ au_writel(0xffffffff, IC1_SRCCLR); au_sync();
+ au_writel(sleep_intctl_src[1], IC1_SRCSET); au_sync();
+ au_writel(0xffffffff, IC1_ASSIGNCLR); au_sync();
+ au_writel(sleep_intctl_assign[1], IC1_ASSIGNSET); au_sync();
+ au_writel(0xffffffff, IC1_WAKECLR); au_sync();
+ au_writel(sleep_intctl_wake[1], IC1_WAKESET); au_sync();
+ au_writel(0xffffffff, IC1_RISINGCLR); au_sync();
+ au_writel(0xffffffff, IC1_FALLINGCLR); au_sync();
+ au_writel(0x00000000, IC1_TESTBIT); au_sync();
+
+ au_writel(sleep_intctl_mask[1], IC1_MASKSET); au_sync();
+
+ au_writel(sleep_intctl_mask[0], IC0_MASKSET); au_sync();
}
+#endif /* CONFIG_PM */
diff -puN arch/mips/au1000/common/Makefile~mips-megapatch arch/mips/au1000/common/Makefile
--- 25/arch/mips/au1000/common/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/common/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -5,14 +5,11 @@
#
# Makefile for the Alchemy Au1000 CPU, generic files.
#
-# Note! Dependencies are done automagically by 'make dep', which also
-# removes any old dependencies. DON'T put your own dependencies here
-# unless it's something special (ie not a .c file).
-#
obj-y += prom.o int-handler.o dma.o irq.o puts.o \
- time.o reset.o clocks.o power.o
+ time.o reset.o clocks.o power.o setup.o \
+ sleeper.o
obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o
obj-$(CONFIG_KGDB) += dbg_io.o
-obj-$(CONFIG_RTC) += rtc.o
+obj-$(CONFIG_PCI) += pci.o
diff -puN /dev/null arch/mips/au1000/common/pci.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/common/pci.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,112 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Alchemy/AMD Au1x00 pci support.
+ *
+ * Copyright 2001,2002,2003 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * Support for all devices (greater than 16) added by David Gathright.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/mach-au1x00/au1000.h>
+//#include <asm/pb1500.h>
+#ifdef CONFIG_MIPS_PB1000
+#include <asm/mach-pb1x00/pb1000.h>
+#endif
+#include <asm/pci_channel.h>
+
+/* TBD */
+static struct resource pci_io_resource = {
+ "pci IO space",
+ (u32)PCI_IO_START,
+ (u32)PCI_IO_END,
+ IORESOURCE_IO
+};
+
+static struct resource pci_mem_resource = {
+ "pci memory space",
+ (u32)PCI_MEM_START,
+ (u32)PCI_MEM_END,
+ IORESOURCE_MEM
+};
+
+extern struct pci_ops au1x_pci_ops;
+
+static struct pci_controller au1x_controller = {
+ .pci_ops = &au1x_pci_ops,
+ .io_resource = &pci_io_resource,
+ .mem_resource = &pci_mem_resource,
+};
+
+#ifdef CONFIG_SOC_AU1500
+static unsigned long virt_io_addr;
+#endif
+
+static int __init au1x_pci_setup(void)
+{
+#ifdef CONFIG_SOC_AU1500
+ int i;
+ struct pci_dev *dev;
+
+ virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START,
+ Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1);
+
+ if (!virt_io_addr) {
+ printk(KERN_ERR "Unable to ioremap pci space\n");
+ return;
+ }
+
+#ifdef CONFIG_DMA_NONCOHERENT
+ /*
+ * Set the NC bit in controller for pre-AC silicon
+ */
+ au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
+ printk("Non-coherent PCI accesses enabled\n");
+#endif
+
+ set_io_port_base(virt_io_addr);
+#endif
+
+#ifdef CONFIG_MIPS_PB1000 /* This is truly board specific */
+ unsigned long pci_mem_start = (unsigned long) PCI_MEM_START;
+
+ au_writel(0, PCI_BRIDGE_CONFIG); // set extend byte to 0
+ au_writel(0, SDRAM_MBAR); // set mbar to 0
+ au_writel(0x2, SDRAM_CMD); // enable memory accesses
+ au_sync_delay(1);
+
+ // set extend byte to mbar of ext slot
+ au_writel(((pci_mem_start >> 24) & 0xff) |
+ (1 << 8 | 1 << 9 | 1 << 10 | 1 << 27), PCI_BRIDGE_CONFIG);
+#endif
+
+ register_pci_controller(&au1x_controller);
+}
+
+arch_initcall(au1x_pci_setup);
diff -puN arch/mips/au1000/common/power.c~mips-megapatch arch/mips/au1000/common/power.c
--- 25/arch/mips/au1000/common/power.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/common/power.c 2004-02-19 12:53:00.000000000 -0800
@@ -39,7 +39,9 @@
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/system.h>
-#include <asm/au1000.h>
+#include <asm/mach-au1x00/au1000.h>
+
+#ifdef CONFIG_PM
#define DEBUG 1
#ifdef DEBUG
@@ -48,13 +50,12 @@
# define DPRINTK(fmt, args...)
#endif
-extern void au1k_wait(void);
static void calibrate_delay(void);
-extern void set_au1000_speed(unsigned int new_freq);
-extern unsigned int get_au1000_speed(void);
-extern unsigned long get_au1000_uart_baud_base(void);
-extern void set_au1000_uart_baud_base(unsigned long new_baud_base);
+extern void set_au1x00_speed(unsigned int new_freq);
+extern unsigned int get_au1x00_speed(void);
+extern unsigned long get_au1x00_uart_baud_base(void);
+extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
extern unsigned long save_local_and_disable(int controller);
extern void restore_local_and_enable(int controller, unsigned long mask);
extern void local_enable_irq(unsigned int irq_nr);
@@ -64,10 +65,144 @@ extern void local_enable_irq(unsigned in
#define ACPI_S1_SLP_TYP 19
#define ACPI_SLEEP 21
-#ifdef CONFIG_PM
static spinlock_t pm_lock = SPIN_LOCK_UNLOCKED;
+/* We need to save/restore a bunch of core registers that are
+ * either volatile or reset to some state across a processor sleep.
+ * If reading a register doesn't provide a proper result for a
+ * later restore, we have to provide a function for loading that
+ * register and save a copy.
+ *
+ * We only have to save/restore registers that aren't otherwise
+ * done as part of a driver pm_* function.
+ */
+static uint sleep_aux_pll_cntrl;
+static uint sleep_cpu_pll_cntrl;
+static uint sleep_pin_function;
+static uint sleep_uart0_inten;
+static uint sleep_uart0_fifoctl;
+static uint sleep_uart0_linectl;
+static uint sleep_uart0_clkdiv;
+static uint sleep_uart0_enable;
+static uint sleep_usbhost_enable;
+static uint sleep_usbdev_enable;
+static uint sleep_static_memctlr[4][3];
+
+/* Define this to cause the value you write to /proc/sys/pm/sleep to
+ * set the TOY timer for the amount of time you want to sleep.
+ * This is done mainly for testing, but may be useful in other cases.
+ * The value is number of 32KHz ticks to sleep.
+ */
+#define SLEEP_TEST_TIMEOUT 1
+#ifdef SLEEP_TEST_TIMEOUT
+static int sleep_ticks;
+void wakeup_counter0_set(int ticks);
+#endif
+
+static void
+save_core_regs(void)
+{
+ extern void save_au1xxx_intctl(void);
+ extern void pm_eth0_shutdown(void);
+
+ /* Do the serial ports.....these really should be a pm_*
+ * registered function by the driver......but of course the
+ * standard serial driver doesn't understand our Au1xxx
+ * unique registers.
+ */
+ sleep_uart0_inten = au_readl(UART0_ADDR + UART_IER);
+ sleep_uart0_fifoctl = au_readl(UART0_ADDR + UART_FCR);
+ sleep_uart0_linectl = au_readl(UART0_ADDR + UART_LCR);
+ sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK);
+ sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL);
+
+ /* Shutdown USB host/device.
+ */
+ sleep_usbhost_enable = au_readl(USB_HOST_CONFIG);
+
+ /* There appears to be some undocumented reset register....
+ */
+ au_writel(0, 0xb0100004); au_sync();
+ au_writel(0, USB_HOST_CONFIG); au_sync();
+
+ sleep_usbdev_enable = au_readl(USBD_ENABLE);
+ au_writel(0, USBD_ENABLE); au_sync();
+
+ /* Save interrupt controller state.
+ */
+ save_au1xxx_intctl();
+
+ /* Clocks and PLLs.
+ */
+ sleep_aux_pll_cntrl = au_readl(SYS_AUXPLL);
+
+ /* We don't really need to do this one, but unless we
+ * write it again it won't have a valid value if we
+ * happen to read it.
+ */
+ sleep_cpu_pll_cntrl = au_readl(SYS_CPUPLL);
+
+ sleep_pin_function = au_readl(SYS_PINFUNC);
+
+ /* Save the static memory controller configuration.
+ */
+ sleep_static_memctlr[0][0] = au_readl(MEM_STCFG0);
+ sleep_static_memctlr[0][1] = au_readl(MEM_STTIME0);
+ sleep_static_memctlr[0][2] = au_readl(MEM_STADDR0);
+ sleep_static_memctlr[1][0] = au_readl(MEM_STCFG1);
+ sleep_static_memctlr[1][1] = au_readl(MEM_STTIME1);
+ sleep_static_memctlr[1][2] = au_readl(MEM_STADDR1);
+ sleep_static_memctlr[2][0] = au_readl(MEM_STCFG2);
+ sleep_static_memctlr[2][1] = au_readl(MEM_STTIME2);
+ sleep_static_memctlr[2][2] = au_readl(MEM_STADDR2);
+ sleep_static_memctlr[3][0] = au_readl(MEM_STCFG3);
+ sleep_static_memctlr[3][1] = au_readl(MEM_STTIME3);
+ sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3);
+}
+
+static void
+restore_core_regs(void)
+{
+ extern void restore_au1xxx_intctl(void);
+ extern void wakeup_counter0_adjust(void);
+
+ au_writel(sleep_aux_pll_cntrl, SYS_AUXPLL); au_sync();
+ au_writel(sleep_cpu_pll_cntrl, SYS_CPUPLL); au_sync();
+ au_writel(sleep_pin_function, SYS_PINFUNC); au_sync();
+
+ /* Restore the static memory controller configuration.
+ */
+ au_writel(sleep_static_memctlr[0][0], MEM_STCFG0);
+ au_writel(sleep_static_memctlr[0][1], MEM_STTIME0);
+ au_writel(sleep_static_memctlr[0][2], MEM_STADDR0);
+ au_writel(sleep_static_memctlr[1][0], MEM_STCFG1);
+ au_writel(sleep_static_memctlr[1][1], MEM_STTIME1);
+ au_writel(sleep_static_memctlr[1][2], MEM_STADDR1);
+ au_writel(sleep_static_memctlr[2][0], MEM_STCFG2);
+ au_writel(sleep_static_memctlr[2][1], MEM_STTIME2);
+ au_writel(sleep_static_memctlr[2][2], MEM_STADDR2);
+ au_writel(sleep_static_memctlr[3][0], MEM_STCFG3);
+ au_writel(sleep_static_memctlr[3][1], MEM_STTIME3);
+ au_writel(sleep_static_memctlr[3][2], MEM_STADDR3);
+
+ /* Enable the UART if it was enabled before sleep.
+ * I guess I should define module control bits........
+ */
+ if (sleep_uart0_enable & 0x02) {
+ au_writel(0, UART0_ADDR + UART_MOD_CNTRL); au_sync();
+ au_writel(1, UART0_ADDR + UART_MOD_CNTRL); au_sync();
+ au_writel(3, UART0_ADDR + UART_MOD_CNTRL); au_sync();
+ au_writel(sleep_uart0_inten, UART0_ADDR + UART_IER); au_sync();
+ au_writel(sleep_uart0_fifoctl, UART0_ADDR + UART_FCR); au_sync();
+ au_writel(sleep_uart0_linectl, UART0_ADDR + UART_LCR); au_sync();
+ au_writel(sleep_uart0_clkdiv, UART0_ADDR + UART_CLK); au_sync();
+ }
+
+ restore_au1xxx_intctl();
+ wakeup_counter0_adjust();
+}
+
unsigned long suspend_mode;
void wakeup_from_suspend(void)
@@ -78,33 +213,48 @@ void wakeup_from_suspend(void)
int au_sleep(void)
{
unsigned long wakeup, flags;
+ extern void save_and_sleep(void);
+
spin_lock_irqsave(&pm_lock,flags);
+ save_core_regs();
+
flush_cache_all();
- /* pin 6 is gpio */
+
+ /** The code below is all system dependent and we should probably
+ ** have a function call out of here to set this up. You need
+ ** to configure the GPIO or timer interrupts that will bring
+ ** you out of sleep.
+ ** For testing, the TOY counter wakeup is useful.
+ **/
+
+#if 0
au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD);
/* gpio 6 can cause a wake up event */
wakeup = au_readl(SYS_WAKEMSK);
wakeup &= ~(1 << 8); /* turn off match20 wakeup */
wakeup |= 1 << 6; /* turn on gpio 6 wakeup */
- au_writel(wakeup, SYS_WAKEMSK);
-
+#else
+ /* For testing, allow match20 to wake us up.
+ */
+#ifdef SLEEP_TEST_TIMEOUT
+ wakeup_counter0_set(sleep_ticks);
+#endif
+ wakeup = 1 << 8; /* turn on match20 wakeup */
+ wakeup = 0;
+#endif
au_writel(1, SYS_WAKESRC); /* clear cause */
- au_writel(1, SYS_SLPPWR); /* prepare to sleep */
+ au_sync();
+ au_writel(wakeup, SYS_WAKEMSK);
+ au_sync();
- __asm__("la $4, 1f\n\t"
- "lui $5, 0xb190\n\t"
- "ori $5, 0x18\n\t"
- "sw $4, 0($5)\n\t"
- "li $4, 1\n\t"
- "lui $5, 0xb190\n\t"
- "ori $5, 0x7c\n\t"
- "sw $4, 0($5)\n\t" "sync\n\t" "1:\t\n\t" "nop\n\t");
+ save_and_sleep();
/* after a wakeup, the cpu vectors back to 0x1fc00000 so
* it's up to the boot code to get us back here.
*/
+ restore_core_regs();
spin_unlock_irqrestore(&pm_lock, flags);
return 0;
}
@@ -113,11 +263,27 @@ static int pm_do_sleep(ctl_table * ctl,
void *buffer, size_t * len)
{
int retval = 0;
+#ifdef SLEEP_TEST_TIMEOUT
+#define TMPBUFLEN2 16
+ char buf[TMPBUFLEN2], *p;
+#endif
if (!write) {
*len = 0;
} else {
+#ifdef SLEEP_TEST_TIMEOUT
+ if (*len > TMPBUFLEN2 - 1) {
+ return -EFAULT;
+ }
+ if (copy_from_user(buf, buffer, *len)) {
+ return -EFAULT;
+ }
+ buf[*len] = 0;
+ p = buf;
+ sleep_ticks = simple_strtoul(p, &p, 0);
+#endif
retval = pm_send_all(PM_SUSPEND, (void *) 2);
+
if (retval)
return retval;
@@ -131,6 +297,7 @@ static int pm_do_suspend(ctl_table * ctl
void *buffer, size_t * len)
{
int retval = 0;
+ void au1k_wait(void);
if (!write) {
*len = 0;
@@ -187,13 +354,13 @@ static int pm_do_freq(ctl_table * ctl, i
return -EFAULT;
}
- old_baud_base = get_au1000_uart_baud_base();
- old_cpu_freq = get_au1000_speed();
+ old_baud_base = get_au1x00_uart_baud_base();
+ old_cpu_freq = get_au1x00_speed();
new_cpu_freq = pll * 12 * 1000000;
new_baud_base = (new_cpu_freq / 4) / 16;
- set_au1000_speed(new_cpu_freq);
- set_au1000_uart_baud_base(new_baud_base);
+ set_au1x00_speed(new_cpu_freq);
+ set_au1x00_uart_baud_base(new_baud_base);
old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff;
new_refresh =
@@ -323,10 +490,4 @@ static void calibrate_delay(void)
loops_per_jiffy &= ~loopbit;
}
}
-
-void au1k_wait(void)
-{
- __asm__("nop\n\t" "nop\n\t");
-}
-
#endif /* CONFIG_PM */
diff -puN arch/mips/au1000/common/prom.c~mips-megapatch arch/mips/au1000/common/prom.c
--- 25/arch/mips/au1000/common/prom.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/common/prom.c 2004-02-19 12:53:00.000000000 -0800
@@ -44,7 +44,6 @@
/* #define DEBUG_CMDLINE */
-char arcs_cmdline[CL_SIZE];
extern int prom_argc;
extern char **prom_argv, **prom_envp;
@@ -153,6 +152,11 @@ int get_ethernet_addr(char *ethernet_add
return 0;
}
-void prom_free_prom_memory (void) {}
+unsigned long __init prom_free_prom_memory(void)
+{
+ return 0;
+}
+
EXPORT_SYMBOL(prom_getcmdline);
EXPORT_SYMBOL(get_ethernet_addr);
+EXPORT_SYMBOL(str2eaddr);
diff -puN arch/mips/au1000/common/puts.c~mips-megapatch arch/mips/au1000/common/puts.c
--- 25/arch/mips/au1000/common/puts.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/common/puts.c 2004-02-19 12:53:00.000000000 -0800
@@ -29,7 +29,7 @@
*/
#include <linux/types.h>
-#include <asm/au1000.h>
+#include <asm/mach-au1x00/au1000.h>
#define SERIAL_BASE UART_BASE
#define SER_CMD 0x7
@@ -40,11 +40,11 @@
#define SLOW_DOWN
static const char digits[16] = "0123456789abcdef";
-static volatile unsigned long * const com1 = (unsigned char *)SERIAL_BASE;
+static volatile unsigned long * const com1 = (unsigned long *)SERIAL_BASE;
#ifdef SLOW_DOWN
-static inline void slow_down()
+static inline void slow_down(void)
{
int k;
for (k=0; k<10000; k++);
diff -puN arch/mips/au1000/common/reset.c~mips-megapatch arch/mips/au1000/common/reset.c
--- 25/arch/mips/au1000/common/reset.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/common/reset.c 2004-02-19 12:53:00.000000000 -0800
@@ -35,9 +35,10 @@
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
-#include <asm/au1000.h>
+#include <asm/mach-au1x00/au1000.h>
extern int au_sleep(void);
+extern void (*flush_cache_all)(void);
void au1000_restart(char *command)
{
@@ -54,6 +55,10 @@ void au1000_restart(char *command)
au_writel(0x00, 0xb017fffc); /* usbh_enable */
au_writel(0x00, 0xb0200058); /* usbd_enable */
au_writel(0x00, 0xb0300040); /* ir_enable */
+ au_writel(0x00, 0xb4004104); /* mac dma */
+ au_writel(0x00, 0xb4004114); /* mac dma */
+ au_writel(0x00, 0xb4004124); /* mac dma */
+ au_writel(0x00, 0xb4004134); /* mac dma */
au_writel(0x00, 0xb0520000); /* macen0 */
au_writel(0x00, 0xb0520004); /* macen1 */
au_writel(0x00, 0xb1000008); /* i2s_enable */
@@ -66,6 +71,8 @@ void au1000_restart(char *command)
au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
au_writel(0x00, 0xb1900028); /* sys_clksrc */
+ au_writel(0x10, 0xb1900060); /* sys_cpupll */
+ au_writel(0x00, 0xb1900064); /* sys_auxpll */
au_writel(0x00, 0xb1900100); /* sys_pininputen */
break;
case 0x01000000: /* Au1500 */
@@ -74,6 +81,10 @@ void au1000_restart(char *command)
asm("sync");
au_writel(0x00, 0xb017fffc); /* usbh_enable */
au_writel(0x00, 0xb0200058); /* usbd_enable */
+ au_writel(0x00, 0xb4004104); /* mac dma */
+ au_writel(0x00, 0xb4004114); /* mac dma */
+ au_writel(0x00, 0xb4004124); /* mac dma */
+ au_writel(0x00, 0xb4004134); /* mac dma */
au_writel(0x00, 0xb1520000); /* macen0 */
au_writel(0x00, 0xb1520004); /* macen1 */
au_writel(0x00, 0xb1100100); /* uart0_enable */
@@ -81,6 +92,8 @@ void au1000_restart(char *command)
au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
au_writel(0x00, 0xb1900028); /* sys_clksrc */
+ au_writel(0x10, 0xb1900060); /* sys_cpupll */
+ au_writel(0x00, 0xb1900064); /* sys_auxpll */
au_writel(0x00, 0xb1900100); /* sys_pininputen */
break;
case 0x02000000: /* Au1100 */
@@ -90,6 +103,10 @@ void au1000_restart(char *command)
au_writel(0x00, 0xb017fffc); /* usbh_enable */
au_writel(0x00, 0xb0200058); /* usbd_enable */
au_writel(0x00, 0xb0300040); /* ir_enable */
+ au_writel(0x00, 0xb4004104); /* mac dma */
+ au_writel(0x00, 0xb4004114); /* mac dma */
+ au_writel(0x00, 0xb4004124); /* mac dma */
+ au_writel(0x00, 0xb4004134); /* mac dma */
au_writel(0x00, 0xb0520000); /* macen0 */
au_writel(0x00, 0xb1000008); /* i2s_enable */
au_writel(0x00, 0xb1100100); /* uart0_enable */
@@ -100,6 +117,8 @@ void au1000_restart(char *command)
au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
au_writel(0x00, 0xb1900028); /* sys_clksrc */
+ au_writel(0x10, 0xb1900060); /* sys_cpupll */
+ au_writel(0x00, 0xb1900064); /* sys_auxpll */
au_writel(0x00, 0xb1900100); /* sys_pininputen */
break;
diff -puN -L arch/mips/au1000/common/rtc.c arch/mips/au1000/common/rtc.c~mips-megapatch /dev/null
--- 25/arch/mips/au1000/common/rtc.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,37 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * RTC routines for PC style attached Dallas chip.
- *
- * Copyright (C) 1998, 2001 by Ralf Baechle
- */
-#include <linux/mc146818rtc.h>
-#include <asm/io.h>
-#include <asm/au1000.h>
-
-#define PB1500_RTC_ADDR 0xAC000000
-
-unsigned char std_rtc_read_data(unsigned long offset)
-{
- offset <<= 2;
- return (u8)(au_readl(offset + PB1500_RTC_ADDR) & 0xff);
-}
-
-static void std_rtc_write_data(unsigned char data, unsigned long offset)
-{
- offset <<= 2;
- au_writel(data, offset + PB1500_RTC_ADDR);
-}
-
-static int std_rtc_bcd_mode(void)
-{
- return 1;
-}
-
-struct rtc_ops pb1500_rtc_ops = {
- &std_rtc_read_data,
- &std_rtc_write_data,
- &std_rtc_bcd_mode
-};
diff -puN /dev/null arch/mips/au1000/common/setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/common/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,194 @@
+/*
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/mach-au1x00/au1000.h>
+#include <asm/time.h>
+
+#ifdef CONFIG_BLK_DEV_INITRD
+extern unsigned long initrd_start, initrd_end;
+extern void * __rd_start, * __rd_end;
+#endif
+
+extern char * __init prom_getcmdline(void);
+extern void __init board_setup(void);
+extern void au1000_restart(char *);
+extern void au1000_halt(void);
+extern void au1000_power_off(void);
+extern struct resource ioport_resource;
+extern struct resource iomem_resource;
+extern void (*board_time_init)(void);
+extern void au1x_time_init(void);
+extern void (*board_timer_setup)(struct irqaction *irq);
+extern void au1x_timer_setup(struct irqaction *irq);
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_SOC_AU1500)
+extern phys_t (*fixup_bigphys_addr)(phys_t phys_addr, phys_t size);
+static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size);
+#endif
+extern void au1xxx_time_init(void);
+extern void au1xxx_timer_setup(struct irqaction *irq);
+
+static int __init au1x00_setup(void)
+{
+ char *argptr;
+
+ /* Various early Au1000 Errata corrected by this */
+ set_c0_config(1<<19); /* Config[OD] */
+
+ board_setup(); /* board specific setup */
+
+ argptr = prom_getcmdline();
+
+#ifdef CONFIG_SERIAL_AU1X00_CONSOLE
+ if ((argptr = strstr(argptr, "console=")) == NULL) {
+ argptr = prom_getcmdline();
+ strcat(argptr, " console=ttyS0,115200");
+ }
+#endif
+
+#ifdef CONFIG_FB_AU1100
+ if ((argptr = strstr(argptr, "video=")) == NULL) {
+ argptr = prom_getcmdline();
+ /* default panel */
+ /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
+#ifdef CONFIG_MIPS_HYDROGEN3
+ strcat(argptr, " video=au1100fb:panel:Hydrogen_3_NEC_panel_320x240,nohwcursor");
+#else
+ strcat(argptr, " video=au1100fb:panel:s10,nohwcursor");
+#endif
+ }
+#endif
+
+#ifdef CONFIG_FB_E1356
+ if ((argptr = strstr(argptr, "video=")) == NULL) {
+ argptr = prom_getcmdline();
+#ifdef CONFIG_MIPS_PB1000
+ strcat(argptr, " video=e1356fb:system:pb1000,mmunalign:1");
+#else
+ strcat(argptr, " video=e1356fb:system:pb1500");
+#endif
+ }
+#endif
+
+#ifdef CONFIG_FB_XPERT98
+ if ((argptr = strstr(argptr, "video=")) == NULL) {
+ argptr = prom_getcmdline();
+ strcat(argptr, " video=atyfb:1024x768-8@70");
+ }
+#endif
+
+#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
+ /* au1000 does not support vra, au1500 and au1100 do */
+ strcat(argptr, " au1000_audio=vra");
+ argptr = prom_getcmdline();
+#endif
+ _machine_restart = au1000_restart;
+ _machine_halt = au1000_halt;
+ _machine_power_off = au1000_power_off;
+ board_time_init = au1xxx_time_init;
+ board_timer_setup = au1xxx_timer_setup;
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_SOC_AU1500)
+ fixup_bigphys_addr = au1500_fixup_bigphys_addr;
+#endif
+
+ /* IO/MEM resources. */
+ set_io_port_base(0);
+ ioport_resource.start = IOPORT_RESOURCE_START;
+ ioport_resource.end = IOPORT_RESOURCE_END;
+ iomem_resource.start = IOMEM_RESOURCE_START;
+ iomem_resource.end = IOMEM_RESOURCE_END;
+
+#ifdef CONFIG_BLK_DEV_INITRD
+ ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
+ initrd_start = (unsigned long)&__rd_start;
+ initrd_end = (unsigned long)&__rd_end;
+#endif
+
+#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+#ifdef CONFIG_USB_OHCI
+ if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
+ char usb_args[80];
+ argptr = prom_getcmdline();
+ memset(usb_args, 0, sizeof(usb_args));
+ sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
+ USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
+ strcat(argptr, usb_args);
+ }
+#endif
+
+#ifdef CONFIG_USB_OHCI
+ /* enable host controller and wait for reset done */
+ au_writel(0x08, USB_HOST_CONFIG);
+ udelay(1000);
+ au_writel(0x0E, USB_HOST_CONFIG);
+ udelay(1000);
+ au_readl(USB_HOST_CONFIG); /* throw away first read */
+ while (!(au_readl(USB_HOST_CONFIG) & 0x10))
+ au_readl(USB_HOST_CONFIG);
+#endif
+#endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
+
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
+ au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
+ au_sync();
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
+ au_writel(0, SYS_TOYTRIM);
+ return 0;
+}
+
+early_initcall(au1x00_setup);
+
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_SOC_AU1500)
+/* This routine should be valid for all Au1500 based boards */
+static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+{
+ u32 pci_start = (u32)Au1500_PCI_MEM_START;
+ u32 pci_end = (u32)Au1500_PCI_MEM_END;
+
+ /* Don't fixup 36 bit addresses */
+ if ((phys_addr >> 32) != 0) return phys_addr;
+
+ /* check for pci memory window */
+ if ((phys_addr >= pci_start) && ((phys_addr + size) < pci_end)) {
+ return (phys_t)((phys_addr - pci_start) +
+ Au1500_PCI_MEM_START);
+ }
+ else
+ return phys_addr;
+}
+#endif
diff -puN /dev/null arch/mips/au1000/common/sleeper.S
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/common/sleeper.S 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,150 @@
+/*
+ * Copyright 2002 Embedded Edge, LLC
+ * Author: dan@embeddededge.com
+ *
+ * Sleep helper for Au1xxx sleep mode.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/config.h>
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+ .text
+ .set macro
+ .set noat
+ .align 5
+
+/* Save all of the processor general registers and go to sleep.
+ * A wakeup condition will get us back here to restore the registers.
+ */
+LEAF(save_and_sleep)
+
+ subu sp, PT_SIZE
+ sw $1, PT_R1(sp)
+ sw $2, PT_R2(sp)
+ sw $3, PT_R3(sp)
+ sw $4, PT_R4(sp)
+ sw $5, PT_R5(sp)
+ sw $6, PT_R6(sp)
+ sw $7, PT_R7(sp)
+ sw $8, PT_R8(sp)
+ sw $9, PT_R9(sp)
+ sw $10, PT_R10(sp)
+ sw $11, PT_R11(sp)
+ sw $12, PT_R12(sp)
+ sw $13, PT_R13(sp)
+ sw $14, PT_R14(sp)
+ sw $15, PT_R15(sp)
+ sw $16, PT_R16(sp)
+ sw $17, PT_R17(sp)
+ sw $18, PT_R18(sp)
+ sw $19, PT_R19(sp)
+ sw $20, PT_R20(sp)
+ sw $21, PT_R21(sp)
+ sw $22, PT_R22(sp)
+ sw $23, PT_R23(sp)
+ sw $24, PT_R24(sp)
+ sw $25, PT_R25(sp)
+ sw $26, PT_R26(sp)
+ sw $27, PT_R27(sp)
+ sw $28, PT_R28(sp)
+ sw $29, PT_R29(sp)
+ sw $30, PT_R30(sp)
+ sw $31, PT_R31(sp)
+ mfc0 k0, CP0_STATUS
+ sw k0, 0x20(sp)
+ mfc0 k0, CP0_CONTEXT
+ sw k0, 0x1c(sp)
+ mfc0 k0, CP0_PAGEMASK
+ sw k0, 0x18(sp)
+ mfc0 k0, CP0_CONFIG
+ sw k0, 0x14(sp)
+
+ /* Now set up the scratch registers so the boot rom will
+ * return to this point upon wakeup.
+ */
+ la k0, 1f
+ lui k1, 0xb190
+ ori k1, 0x18
+ sw sp, 0(k1)
+ ori k1, 0x1c
+ sw k0, 0(k1)
+
+/* Put SDRAM into self refresh. Preload instructions into cache,
+ * issue a precharge, then auto refresh, then sleep commands to it.
+ */
+ la t0, sdsleep
+ .set mips3
+ cache 0x14, 0(t0)
+ cache 0x14, 32(t0)
+ cache 0x14, 64(t0)
+ cache 0x14, 96(t0)
+ .set mips0
+
+sdsleep:
+ lui k0, 0xb400
+ sw zero, 0x001c(k0) /* Precharge */
+ sw zero, 0x0020(k0) /* Auto refresh */
+ sw zero, 0x0030(k0) /* SDRAM sleep */
+ sync
+
+ lui k1, 0xb190
+ sw zero, 0x0078(k1) /* get ready to sleep */
+ sync
+ sw zero, 0x007c(k1) /* Put processor to sleep */
+ sync
+
+ /* This is where we return upon wakeup.
+ * Reload all of the registers and return.
+ */
+1: nop
+ lw k0, 0x20(sp)
+ mtc0 k0, CP0_STATUS
+ lw k0, 0x1c(sp)
+ mtc0 k0, CP0_CONTEXT
+ lw k0, 0x18(sp)
+ mtc0 k0, CP0_PAGEMASK
+ lw k0, 0x14(sp)
+ mtc0 k0, CP0_CONFIG
+ lw $1, PT_R1(sp)
+ lw $2, PT_R2(sp)
+ lw $3, PT_R3(sp)
+ lw $4, PT_R4(sp)
+ lw $5, PT_R5(sp)
+ lw $6, PT_R6(sp)
+ lw $7, PT_R7(sp)
+ lw $8, PT_R8(sp)
+ lw $9, PT_R9(sp)
+ lw $10, PT_R10(sp)
+ lw $11, PT_R11(sp)
+ lw $12, PT_R12(sp)
+ lw $13, PT_R13(sp)
+ lw $14, PT_R14(sp)
+ lw $15, PT_R15(sp)
+ lw $16, PT_R16(sp)
+ lw $17, PT_R17(sp)
+ lw $18, PT_R18(sp)
+ lw $19, PT_R19(sp)
+ lw $20, PT_R20(sp)
+ lw $21, PT_R21(sp)
+ lw $22, PT_R22(sp)
+ lw $23, PT_R23(sp)
+ lw $24, PT_R24(sp)
+ lw $25, PT_R25(sp)
+ lw $26, PT_R26(sp)
+ lw $27, PT_R27(sp)
+ lw $28, PT_R28(sp)
+ lw $29, PT_R29(sp)
+ lw $30, PT_R30(sp)
+ lw $31, PT_R31(sp)
+ addiu sp, PT_SIZE
+
+ jr ra
+END(save_and_sleep)
diff -puN arch/mips/au1000/common/time.c~mips-megapatch arch/mips/au1000/common/time.c
--- 25/arch/mips/au1000/common/time.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/common/time.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,10 +1,13 @@
/*
+ *
* Copyright (C) 2001 MontaVista Software, ppopov@mvista.com
* Copied and modified Carsten Langgaard's time.c
*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
+ * ########################################################################
+ *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -18,13 +21,21 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
+ * ########################################################################
+ *
* Setting up the clock on the MIPS boards.
+ *
+ * Update. Always configure the kernel with CONFIG_NEW_TIME_C. This
+ * will use the user interface gettimeofday() functions from the
+ * arch/mips/kernel/time.c, and we provide the clock interrupt processing
+ * and the timer offset compute functions. If CONFIG_PM is selected,
+ * we also ensure the 32KHz timer is available. -- Dan
*/
+
#include <linux/types.h>
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
-#include <linux/time.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
@@ -33,18 +44,20 @@
#include <asm/time.h>
#include <asm/hardirq.h>
#include <asm/div64.h>
-#include <asm/au1000.h>
+#include <asm/mach-au1x00/au1000.h>
#include <linux/mc146818rtc.h>
#include <linux/timex.h>
extern void startup_match20_interrupt(void);
+extern void do_softirq(void);
extern volatile unsigned long wall_jiffies;
unsigned long missed_heart_beats = 0;
static unsigned long r4k_offset; /* Amount to increment compare reg each time */
static unsigned long r4k_cur; /* What counter should be at next timer irq */
-extern unsigned int mips_counter_frequency;
+int no_au1xxx_32khz;
+void (*au1k_wait_ptr)(void);
/* Cycle counter value at the previous timer interrupt.. */
static unsigned int timerhi = 0, timerlo = 0;
@@ -72,17 +85,10 @@ void mips_timer_interrupt(struct pt_regs
{
int irq = 63;
unsigned long count;
- int cpu = smp_processor_id();
irq_enter();
kstat_this_cpu.irqs[irq]++;
-#ifdef CONFIG_PM
- printk(KERN_ERR "Unexpected CP0 interrupt\n");
- regs->cp0_status &= ~IE_IRQ5; /* disable CP0 interrupt */
- return;
-#endif
-
if (r4k_offset == 0)
goto null;
@@ -100,7 +106,6 @@ void mips_timer_interrupt(struct pt_regs
- r4k_cur) < 0x7fffffff);
irq_exit();
-
return;
null:
@@ -114,7 +119,7 @@ void counter0_irq(int irq, void *dev_id,
int time_elapsed;
static int jiffie_drift = 0;
- kstat_this_cpu.irqs[irq]++;
+ kstat.irqs[0][irq]++;
if (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20) {
/* should never happen! */
printk(KERN_WARNING "counter 0 w status eror\n");
@@ -150,119 +155,148 @@ void counter0_irq(int irq, void *dev_id,
do_timer(regs); /* increment jiffies by one */
}
}
-#endif
-/*
- * Figure out the r4k offset, the amount to increment the compare
- * register for each time tick.
- * Use the Programmable Counter 1 to do this.
+/* When we wakeup from sleep, we have to "catch up" on all of the
+ * timer ticks we have missed.
*/
-unsigned long cal_r4koff(void)
+void
+wakeup_counter0_adjust(void)
{
- unsigned long count;
- unsigned long cpu_speed;
- unsigned long start, end;
- unsigned long counter;
- int trim_divide = 16;
- unsigned long flags;
-
- spin_lock_irqsave(&time_lock, flags);
+ unsigned long pc0;
+ int time_elapsed;
- counter = au_readl(SYS_COUNTER_CNTRL);
- au_writel(counter | SYS_CNTRL_EN1, SYS_COUNTER_CNTRL);
+ pc0 = au_readl(SYS_TOYREAD);
+ if (pc0 < last_match20) {
+ /* counter overflowed */
+ time_elapsed = (0xffffffff - last_match20) + pc0;
+ }
+ else {
+ time_elapsed = pc0 - last_match20;
+ }
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
- au_writel(trim_divide-1, SYS_RTCTRIM); /* RTC now ticks at 32.768/16 kHz */
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
-
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
- au_writel (0, SYS_TOYWRITE);
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
-
- start = au_readl(SYS_RTCREAD);
- start += 2;
- /* wait for the beginning of a new tick */
- while (au_readl(SYS_RTCREAD) < start);
-
- /* Start r4k counter. */
- write_c0_count(0);
- end = start + (32768 / trim_divide)/2; /* wait 0.5 seconds */
+ while (time_elapsed > 0) {
+ time_elapsed -= MATCH20_INC;
+ last_match20 += MATCH20_INC;
+ }
- while (end > au_readl(SYS_RTCREAD));
+ last_pc0 = pc0;
+ au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
+ au_sync();
- count = read_c0_count();
- cpu_speed = count * 2;
- mips_counter_frequency = count;
- set_au1x00_uart_baud_base(((cpu_speed) / 4) / 16);
- spin_unlock_irqrestore(&time_lock, flags);
- return (cpu_speed / HZ);
}
-void __init au1x_time_init(void)
+/* This is just for debugging to set the timer for a sleep delay.
+*/
+void
+wakeup_counter0_set(int ticks)
{
- unsigned int est_freq;
-
- printk("calculating r4koff... ");
- r4k_offset = cal_r4koff();
- printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
+ unsigned long pc0;
- //est_freq = 2*r4k_offset*HZ;
- est_freq = r4k_offset*HZ;
- est_freq += 5000; /* round */
- est_freq -= est_freq%10000;
- printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
- (est_freq%1000000)*100/1000000);
- set_au1x00_speed(est_freq);
- set_au1x00_lcd_clock(); // program the LCD clock
- r4k_cur = (read_c0_count() + r4k_offset);
+ pc0 = au_readl(SYS_TOYREAD);
+ last_pc0 = pc0;
+ au_writel(last_match20 + (MATCH20_INC * ticks), SYS_TOYMATCH2);
+ au_sync();
+}
+#endif
- write_c0_compare(r4k_cur);
+/* I haven't found anyone that doesn't use a 12 MHz source clock,
+ * but just in case.....
+ */
+#ifdef CONFIG_AU1000_SRC_CLK
+#define AU1000_SRC_CLK CONFIG_AU1000_SRC_CLK
+#else
+#define AU1000_SRC_CLK 12000000
+#endif
- /* no RTC on the pb1000 */
- xtime.tv_sec = 0;
- //xtime.tv_usec = 0;
+/*
+ * We read the real processor speed from the PLL. This is important
+ * because it is more accurate than computing it from the 32KHz
+ * counter, if it exists. If we don't have an accurate processor
+ * speed, all of the peripherals that derive their clocks based on
+ * this advertised speed will introduce error and sometimes not work
+ * properly. This function is futher convoluted to still allow configurations
+ * to do that in case they have really, really old silicon with a
+ * write-only PLL register, that we need the 32KHz when power management
+ * "wait" is enabled, and we need to detect if the 32KHz isn't present
+ * but requested......got it? :-) -- Dan
+ */
+unsigned long cal_r4koff(void)
+{
+ unsigned long count;
+ unsigned long cpu_speed;
+ unsigned long flags;
+ unsigned long counter;
-#ifdef CONFIG_PM
- /*
- * setup counter 0, since it keeps ticking after a
- * 'wait' instruction has been executed. The CP0 timer and
- * counter 1 do NOT continue running after 'wait'
- *
- * It's too early to call request_irq() here, so we handle
- * counter 0 interrupt as a special irq and it doesn't show
- * up under /proc/interrupts.
- */
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
- au_writel(0, SYS_TOYWRITE);
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
+ spin_lock_irqsave(&time_lock, flags);
- au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK);
- au_writel(~0, SYS_WAKESRC);
- au_sync();
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
+ /* Power management cares if we don't have a 32KHz counter.
+ */
+ no_au1xxx_32khz = 0;
+ counter = au_readl(SYS_COUNTER_CNTRL);
+ if (counter & SYS_CNTRL_E0) {
+ int trim_divide = 16;
- /* setup match20 to interrupt once every 10ms */
- last_pc0 = last_match20 = au_readl(SYS_TOYREAD);
- au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
- au_sync();
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
- startup_match20_interrupt();
-#endif
+ au_writel(counter | SYS_CNTRL_EN1, SYS_COUNTER_CNTRL);
- //set_c0_status(ALLINTS);
- au_sync();
-}
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
+ /* RTC now ticks at 32.768/16 kHz */
+ au_writel(trim_divide-1, SYS_RTCTRIM);
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
+
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
+ au_writel (0, SYS_TOYWRITE);
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
+
+#if defined(CONFIG_AU1000_USE32K)
+ {
+ unsigned long start, end;
+
+ start = au_readl(SYS_RTCREAD);
+ start += 2;
+ /* wait for the beginning of a new tick
+ */
+ while (au_readl(SYS_RTCREAD) < start);
+
+ /* Start r4k counter.
+ */
+ write_c0_count(0);
+
+ /* Wait 0.5 seconds.
+ */
+ end = start + (32768 / trim_divide)/2;
-void __init au1x_timer_setup(struct irqaction *irq)
-{
+ while (end > au_readl(SYS_RTCREAD));
+ count = read_c0_count();
+ cpu_speed = count * 2;
+ }
+#else
+ cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *
+ AU1000_SRC_CLK;
+ count = cpu_speed / 2;
+#endif
+ }
+ else {
+ /* The 32KHz oscillator isn't running, so assume there
+ * isn't one and grab the processor speed from the PLL.
+ * NOTE: some old silicon doesn't allow reading the PLL.
+ */
+ cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
+ count = cpu_speed / 2;
+ no_au1xxx_32khz = 1;
+ }
+ mips_hpt_frequency = count;
+ // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16)
+ set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
+ spin_unlock_irqrestore(&time_lock, flags);
+ return (cpu_speed / HZ);
}
/* This is for machines which generate the exact clock. */
#define USECS_PER_JIFFY (1000000/HZ)
#define USECS_PER_JIFFY_FRAC (0x100000000*1000000/HZ&0xffffffff)
-#ifndef CONFIG_PM
+
static unsigned long
div64_32(unsigned long v1, unsigned long v2, unsigned long v3)
{
@@ -270,30 +304,9 @@ div64_32(unsigned long v1, unsigned long
do_div64_32(r0, v1, v2, v3);
return r0;
}
-#endif
-static unsigned long do_fast_gettimeoffset(void)
+static unsigned long do_fast_cp0_gettimeoffset(void)
{
-#ifdef CONFIG_PM
- unsigned long pc0;
- unsigned long offset;
-
- pc0 = au_readl(SYS_TOYREAD);
- if (pc0 < last_pc0) {
- offset = 0xffffffff - last_pc0 + pc0;
- printk("offset over: %x\n", (unsigned)offset);
- }
- else {
- offset = (unsigned long)(((pc0 - last_pc0) * 305) / 10);
- }
- if ((pc0-last_pc0) > 2*MATCH20_INC) {
- printk("huge offset %x, last_pc0 %x last_match20 %x pc0 %x\n",
- (unsigned)offset, (unsigned)last_pc0,
- (unsigned)last_match20, (unsigned)pc0);
- }
- au_sync();
- return offset;
-#else
u32 count;
unsigned long res, tmp;
unsigned long r0;
@@ -334,12 +347,118 @@ static unsigned long do_fast_gettimeoffs
"r" (quotient));
/*
- * Due to possible jiffies inconsistencies, we need to check
+ * Due to possible jiffies inconsistencies, we need to check
* the result so that we'll get a timer that is monotonic.
*/
if (res >= USECS_PER_JIFFY)
res = USECS_PER_JIFFY-1;
return res;
+}
+
+#ifdef CONFIG_PM
+static unsigned long do_fast_pm_gettimeoffset(void)
+{
+ unsigned long pc0;
+ unsigned long offset;
+
+ pc0 = au_readl(SYS_TOYREAD);
+ au_sync();
+ offset = pc0 - last_pc0;
+ if (offset > 2*MATCH20_INC) {
+ printk("huge offset %x, last_pc0 %x last_match20 %x pc0 %x\n",
+ (unsigned)offset, (unsigned)last_pc0,
+ (unsigned)last_match20, (unsigned)pc0);
+ }
+ offset = (unsigned long)((offset * 305) / 10);
+ return offset;
+}
+#endif
+
+void au1xxx_timer_setup(struct irqaction *irq)
+{
+ unsigned int est_freq;
+ extern unsigned long (*do_gettimeoffset)(void);
+ extern void au1k_wait(void);
+
+ printk("calculating r4koff... ");
+ r4k_offset = cal_r4koff();
+ printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
+
+ //est_freq = 2*r4k_offset*HZ;
+ est_freq = r4k_offset*HZ;
+ est_freq += 5000; /* round */
+ est_freq -= est_freq%10000;
+ printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
+ (est_freq%1000000)*100/1000000);
+ set_au1x00_speed(est_freq);
+ set_au1x00_lcd_clock(); // program the LCD clock
+
+ r4k_cur = (read_c0_count() + r4k_offset);
+ write_c0_compare(r4k_cur);
+
+ /* no RTC on the pb1000 */
+ xtime.tv_sec = 0;
+ //xtime.tv_usec = 0;
+
+#ifdef CONFIG_PM
+ /*
+ * setup counter 0, since it keeps ticking after a
+ * 'wait' instruction has been executed. The CP0 timer and
+ * counter 1 do NOT continue running after 'wait'
+ *
+ * It's too early to call request_irq() here, so we handle
+ * counter 0 interrupt as a special irq and it doesn't show
+ * up under /proc/interrupts.
+ *
+ * Check to ensure we really have a 32KHz oscillator before
+ * we do this.
+ */
+ if (no_au1xxx_32khz) {
+ unsigned int c0_status;
+
+ printk("WARNING: no 32KHz clock found.\n");
+ do_gettimeoffset = do_fast_cp0_gettimeoffset;
+
+ /* Ensure we get CPO_COUNTER interrupts.
+ */
+ c0_status = read_c0_status();
+ c0_status |= IE_IRQ5;
+ write_c0_status(c0_status);
+ }
+ else {
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
+ au_writel(0, SYS_TOYWRITE);
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
+
+ au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK);
+ au_writel(~0, SYS_WAKESRC);
+ au_sync();
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
+
+ /* setup match20 to interrupt once every 10ms */
+ last_pc0 = last_match20 = au_readl(SYS_TOYREAD);
+ au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
+ au_sync();
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
+ startup_match20_interrupt();
+
+ do_gettimeoffset = do_fast_pm_gettimeoffset;
+
+ /* We can use the real 'wait' instruction.
+ */
+ au1k_wait_ptr = au1k_wait;
+ }
+
+#else
+ /* We have to do this here instead of in timer_init because
+ * the generic code in arch/mips/kernel/time.c will write
+ * over our function pointer.
+ */
+ do_gettimeoffset = do_fast_cp0_gettimeoffset;
#endif
}
+
+void __init au1xxx_time_init(void)
+{
+}
diff -puN arch/mips/au1000/common/usbdev.c~mips-megapatch arch/mips/au1000/common/usbdev.c
--- 25/arch/mips/au1000/common/usbdev.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/common/usbdev.c 2004-02-19 12:53:00.000000000 -0800
@@ -26,8 +26,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <linux/sched.h>
diff -puN /dev/null arch/mips/au1000/csb250/board_setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/csb250/board_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,250 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Cogent CSB250 board setup.
+ *
+ * Copyright 2002 Cogent Computer Systems, Inc.
+ * dan@embeddededge.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/mc146818rtc.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/keyboard.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/au1000.h>
+#include <asm/csb250.h>
+
+#ifdef CONFIG_USB_OHCI
+// Enable the workaround for the OHCI DoneHead
+// register corruption problem.
+#define CONFIG_AU1000_OHCI_FIX
+#endif
+
+#ifdef CONFIG_RTC
+extern struct rtc_ops csb250_rtc_ops;
+#endif
+
+extern int (*board_pci_idsel)(unsigned int devsel, int assert);
+int csb250_pci_idsel(unsigned int devsel, int assert);
+
+void __init board_setup(void)
+{
+ u32 pin_func, pin_val;
+ u32 sys_freqctrl, sys_clksrc;
+
+
+ // set AUX clock to 12MHz * 8 = 96 MHz
+ au_writel(8, SYS_AUXPLL);
+ au_writel(0, SYS_PINSTATERD);
+ udelay(100);
+
+#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+
+ /* GPIO201 is input for PCMCIA card detect */
+ /* GPIO203 is input for PCMCIA interrupt request */
+ au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR);
+
+ /* zero and disable FREQ2 */
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
+ sys_freqctrl &= ~0xFFF00000;
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+ /* zero and disable USBH/USBD clocks */
+ sys_clksrc = au_readl(SYS_CLKSRC);
+ sys_clksrc &= ~0x00007FE0;
+ au_writel(sys_clksrc, SYS_CLKSRC);
+
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
+ sys_freqctrl &= ~0xFFF00000;
+
+ sys_clksrc = au_readl(SYS_CLKSRC);
+ sys_clksrc &= ~0x00007FE0;
+
+ // FREQ2 = aux/2 = 48 MHz
+ sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+ /*
+ * Route 48MHz FREQ2 into USB Host and/or Device
+ */
+#ifdef CONFIG_USB_OHCI
+ sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
+#endif
+#ifdef CONFIG_AU1X00_USB_DEVICE
+ sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
+#endif
+ au_writel(sys_clksrc, SYS_CLKSRC);
+
+
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
+#ifndef CONFIG_AU1X00_USB_DEVICE
+ // 2nd USB port is USB host
+ pin_func |= 0x8000;
+#endif
+ au_writel(pin_func, SYS_PINFUNC);
+#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+
+ /* Configure GPIO2....it's used by PCI among other things.
+ */
+
+ /* Make everything but GP200 (PCI RST) an input until we get
+ * the pins set correctly.
+ */
+ au_writel(0x00000001, GPIO2_DIR);
+
+ /* Set the pins used for output.
+ * A zero bit will leave PCI reset, LEDs off, power up USB,
+ * IDSEL disabled.
+ */
+ pin_val = ((3 << 30) | (7 << 19) | (1 << 17) | (1 << 16));
+ au_writel(pin_val, GPIO2_OUTPUT);
+
+ /* Set the output direction.
+ */
+ pin_val = ((3 << 14) | (7 << 3) | (1 << 1) | (1 << 0));
+ au_writel(pin_val, GPIO2_DIR);
+
+#ifdef CONFIG_PCI
+ /* Use FREQ1 for the PCI output clock. We use the
+ * CPU clock of 384 MHz divided by 12 to get 32 MHz PCI.
+ * If Michael changes the CPU speed, we need to adjust
+ * that here as well :-).
+ */
+
+ /* zero and disable FREQ1
+ */
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
+ sys_freqctrl &= ~0x000ffc00;
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+ /* zero and disable PCI clock
+ */
+ sys_clksrc = au_readl(SYS_CLKSRC);
+ sys_clksrc &= ~0x000f8000;
+ au_writel(sys_clksrc, SYS_CLKSRC);
+
+ /* Get current values (which really should match above).
+ */
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
+ sys_freqctrl &= ~0x000ffc00;
+
+ sys_clksrc = au_readl(SYS_CLKSRC);
+ sys_clksrc &= ~0x000f8000;
+
+ /* FREQ1 = cpu/12 = 32 MHz
+ */
+ sys_freqctrl |= ((5<<12) | (1<<11) | (0<<10));
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+ /* Just connect the clock without further dividing.
+ */
+ sys_clksrc |= ((3<<17) | (0<<16) | (0<<15));
+ au_writel(sys_clksrc, SYS_CLKSRC);
+
+ udelay(1);
+
+ /* Now that clocks should be running, take PCI out of reset.
+ */
+ pin_val = au_readl(GPIO2_OUTPUT);
+ pin_val |= ((1 << 16) | 1);
+ au_writel(pin_val, GPIO2_OUTPUT);
+
+ // Setup PCI bus controller
+ au_writel(0, Au1500_PCI_CMEM);
+ au_writel(0x00003fff, Au1500_CFG_BASE);
+
+ /* We run big endian without any of the software byte swapping,
+ * so configure the PCI bridge to help us out.
+ */
+ au_writel(0xf | (2<<6) | (1<<5) | (1<<4), Au1500_PCI_CFG);
+
+ au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
+ au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
+ au_writel(0x02a00356, Au1500_PCI_STATCMD);
+ au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
+ au_writel(0x00000008, Au1500_PCI_MBAR);
+ au_sync();
+
+ board_pci_idsel = csb250_pci_idsel;
+#endif
+
+ /* Enable sys bus clock divider when IDLE state or no bus activity. */
+ au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
+
+#ifdef CONFIG_RTC
+ rtc_ops = &csb250_rtc_ops;
+ // Enable the RTC if not already enabled
+ if (!(au_readl(0xac000028) & 0x20)) {
+ printk("enabling clock ...\n");
+ au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
+ }
+ // Put the clock in BCD mode
+ if (readl(0xac00002C) & 0x4) { /* reg B */
+ au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
+ au_sync();
+ }
+#endif
+}
+
+/* The IDSEL is selected in the GPIO2 register. We will make device
+ * 12 appear in slot 0 and device 13 appear in slot 1.
+ */
+int
+csb250_pci_idsel(unsigned int devsel, int assert)
+{
+ int retval;
+ unsigned int gpio2_pins;
+
+ retval = 1;
+
+ /* First, disable both selects, then assert the one requested.
+ */
+ au_writel(0xc000c000, GPIO2_OUTPUT);
+ au_sync();
+
+ if (assert) {
+ if (devsel == 12)
+ gpio2_pins = 0x40000000;
+ else if (devsel == 13)
+ gpio2_pins = 0x80000000;
+ else {
+ gpio2_pins = 0xc000c000;
+ retval = 0;
+ }
+ au_writel(gpio2_pins, GPIO2_OUTPUT);
+ }
+ au_sync();
+
+ return retval;
+}
diff -puN /dev/null arch/mips/au1000/csb250/init.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/csb250/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,95 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Cogent CSB250 board setup
+ *
+ * Copyright 2002 Cogent Computer Systems, Inc.
+ * dan@embeddededge.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+extern void __init prom_init_cmdline(void);
+extern char *prom_getenv(char *envname);
+
+/* When we get initrd working someday.........
+*/
+int my_initrd_start, my_initrd_size;
+
+/* Start arguments and environment.
+*/
+static char *csb_env[2];
+static char *csb_arg[4];
+static char *arg1 = "console=ttyS3,38400";
+static char *arg2 = "root=/dev/nfs rw ip=any";
+static char *env1 = "ethaddr=00:30:23:50:00:00";
+
+const char *get_system_type(void)
+{
+ return "Cogent CSB250";
+}
+
+int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+{
+ unsigned char *memsize_str;
+ unsigned long memsize;
+
+ /* We use a0 and a1 to pass initrd start and size.
+ */
+ if (((uint) argc > 0) && ((uint)argv > 0)) {
+ my_initrd_start = (uint)argc;
+ my_initrd_size = (uint)argv;
+ }
+
+ /* First argv is ignored.
+ */
+ prom_argc = 3;
+ prom_argv = csb_arg;
+ prom_envp = csb_env;
+ csb_arg[1] = arg1;
+ csb_arg[2] = arg2;
+ csb_env[0] = env1;
+
+ mips_machgroup = MACH_GROUP_ALCHEMY;
+ mips_machtype = MACH_CSB250;
+
+ prom_init_cmdline();
+ memsize_str = prom_getenv("memsize");
+ if (!memsize_str) {
+ memsize = 0x02000000;
+ } else {
+ memsize = simple_strtol(memsize_str, NULL, 0);
+ }
+ add_memory_region(0, memsize, BOOT_MEM_RAM);
+ return 0;
+}
diff -puN /dev/null arch/mips/au1000/csb250/irqmap.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/csb250/irqmap.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,100 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Au1xxx irq map table
+ *
+ * Copyright 2003 Embedded Edge, LLC
+ * dan@embeddededge.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/au1000.h>
+
+au1xxx_irq_map_t au1xxx_irq_map[] = {
+ { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
+
+ { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 },
+
+ { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
+
+ /* Careful if you change match 2 request!
+ * The interrupt handler is called directly
+ * from the low level dispatch code.
+ */
+ { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
+};
+
+int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
diff -puN /dev/null arch/mips/au1000/csb250/Makefile
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/csb250/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,18 @@
+#
+# Copyright 2002 Cogent Computer Systems
+# dan@embeddededge.com
+#
+# Makefile for the Cogent CSB250 Au1500 board. Copied from Pb1500.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+USE_STANDARD_AS_RULE := true
+
+O_TARGET := csb250.o
+
+obj-y := init.o board_setup.o irqmap.o
+
+include $(TOPDIR)/Rules.make
diff -puN /dev/null arch/mips/au1000/db1x00/board_setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/db1x00/board_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,87 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Alchemy Db1x00 board setup.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/mc146818rtc.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/mach-au1x00/au1000.h>
+#include <asm/mach-db1x00/db1x00.h>
+
+static BCSR * const bcsr = (BCSR *)0xAE000000;
+
+void __init board_setup(void)
+{
+ u32 pin_func;
+
+ pin_func = 0;
+#ifdef CONFIG_AU1X00_USB_DEVICE
+ // 2nd USB port is USB device
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
+ au_writel(pin_func, SYS_PINFUNC);
+#endif
+
+#if defined(CONFIG_IRDA) && (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
+ /* set IRFIRSEL instead of GPIO15 */
+ pin_func = au_readl(SYS_PINFUNC) | (u32)((1<<8));
+ au_writel(pin_func, SYS_PINFUNC);
+ /* power off until the driver is in use */
+ bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
+ bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF;
+ au_sync();
+#endif
+ au_writel(0, 0xAE000010); /* turn off pcmcia power */
+
+#ifdef CONFIG_MIPS_DB1000
+ printk("AMD Alchemy Au1000/Db1000 Board\n");
+#endif
+#ifdef CONFIG_MIPS_DB1500
+ printk("AMD Alchemy Au1500/Db1500 Board\n");
+#endif
+#ifdef CONFIG_MIPS_DB1100
+ printk("AMD Alchemy Au1100/Db1100 Board\n");
+#endif
+#ifdef CONFIG_MIPS_BOSPORUS
+ printk("AMD Alchemy Bosporus Board\n");
+#endif
+#ifdef CONFIG_MIPS_MIRAGE
+ printk("AMD Alchemy Mirage Board\n");
+#endif
+}
diff -puN arch/mips/au1000/db1x00/init.c~mips-megapatch arch/mips/au1000/db1x00/init.c
--- 25/arch/mips/au1000/db1x00/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/db1x00/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,5 +1,4 @@
/*
- *
* BRIEF MODULE DESCRIPTION
* PB1000 board setup
*
@@ -37,7 +36,6 @@
#include <linux/config.h>
#include <linux/string.h>
#include <linux/kernel.h>
-#include <linux/sched.h>
int prom_argc;
char **prom_argv, **prom_envp;
@@ -46,28 +44,31 @@ extern char *prom_getenv(char *envname);
const char *get_system_type(void)
{
- return "Alchemy Db1000";
+#ifdef CONFIG_MIPS_BOSPORUS
+ return "Alchemy Bosporus Gateway Reference";
+#else
+ return "Alchemy Db1x00";
+#endif
}
-int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+void __init prom_init(void)
{
unsigned char *memsize_str;
unsigned long memsize;
- prom_argc = argc;
- prom_argv = argv;
- prom_envp = envp;
+ prom_argc = fw_arg0;
+ prom_argv = (char **) fw_arg1;
+ prom_envp = (char **) fw_arg2;
mips_machgroup = MACH_GROUP_ALCHEMY;
mips_machtype = MACH_DB1000; /* set the platform # */
+
prom_init_cmdline();
memsize_str = prom_getenv("memsize");
- if (!memsize_str) {
+ if (!memsize_str)
memsize = 0x04000000;
- } else {
+ else
memsize = simple_strtol(memsize_str, NULL, 0);
- }
add_memory_region(0, memsize, BOOT_MEM_RAM);
- return 0;
}
diff -puN /dev/null arch/mips/au1000/db1x00/irqmap.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/db1x00/irqmap.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,123 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Au1xxx irq map table
+ *
+ * Copyright 2003 Embedded Edge, LLC
+ * dan@embeddededge.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/mach-au1x00/au1000.h>
+
+au1xxx_irq_map_t au1xxx_irq_map[] = {
+ { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_MIRAGE)
+ { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+#endif
+#ifndef CONFIG_MIPS_MIRAGE
+ { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
+#endif
+
+ { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
+
+#ifdef CONFIG_SOC_AU1500
+ { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
+#endif
+
+#ifdef CONFIG_MIPS_DB1500
+ { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 },
+#endif
+
+#ifndef CONFIG_MIPS_MIRAGE
+ { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 Fully_Interted#
+ { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 STSCHG#
+ { AU1000_GPIO_2, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ#
+
+ { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 Fully_Interted#
+ { AU1000_GPIO_4, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 STSCHG#
+ { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ#
+#endif
+
+ { AU1000_GPIO_2, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ#
+ { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ#
+
+ { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
+
+ /* Careful if you change match 2 request!
+ * The interrupt handler is called directly
+ * from the low level dispatch code.
+ */
+ { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
+};
+
+int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
diff -puN arch/mips/au1000/db1x00/Makefile~mips-megapatch arch/mips/au1000/db1x00/Makefile
--- 25/arch/mips/au1000/db1x00/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/db1x00/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -3,18 +3,6 @@
# Author: MontaVista Software, Inc.
# ppopov@mvista.com or source@mvista.com
#
-# Makefile for the Alchemy Semiconductor PB1000 board.
-#
-# Note! Dependencies are done automagically by 'make dep', which also
-# removes any old dependencies. DON'T put your own dependencies here
-# unless it's something special (ie not a .c file).
-#
-
-.S.s:
- $(CPP) $(CFLAGS) $< -o $*.s
-.S.o:
- $(CC) $(CFLAGS) -c $< -o $*.o
-
-O_TARGET := db1x00.o
+# Makefile for the Alchemy Semiconductor Db1x00 board.
-obj-y := init.o setup.o
+lib-y := init.o board_setup.o irqmap.o
diff -puN -L arch/mips/au1000/db1x00/setup.c arch/mips/au1000/db1x00/setup.c~mips-megapatch /dev/null
--- 25/arch/mips/au1000/db1x00/setup.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,230 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Alchemy Db1000 board setup.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/mm.h>
-#include <linux/console.h>
-#include <linux/mc146818rtc.h>
-#include <linux/delay.h>
-
-#include <asm/cpu.h>
-#include <asm/bootinfo.h>
-#include <asm/irq.h>
-#include <asm/keyboard.h>
-#include <asm/mipsregs.h>
-#include <asm/reboot.h>
-#include <asm/pgtable.h>
-#include <asm/au1000.h>
-#include <asm/db1x00.h>
-
-#ifdef CONFIG_BLK_DEV_INITRD
-extern unsigned long initrd_start, initrd_end;
-extern void * __rd_start, * __rd_end;
-#endif
-
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops std_ide_ops;
-extern struct ide_ops *ide_ops;
-#endif
-
-extern struct rtc_ops no_rtc_ops;
-extern char * __init prom_getcmdline(void);
-extern void au1000_restart(char *);
-extern void au1000_halt(void);
-extern void au1000_power_off(void);
-extern struct resource ioport_resource;
-extern struct resource iomem_resource;
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_SOC_AU1500)
-extern phys_t (*fixup_bigphys_addr)(phys_t phys_addr, phys_t size);
-static phys_t db_fixup_bigphys_addr(phys_t phys_addr, phys_t size);
-#endif
-
-void __init au1x00_setup(void)
-{
- char *argptr;
- u32 pin_func, static_cfg0;
- u32 sys_freqctrl, sys_clksrc;
- u32 prid = read_c0_prid();
-
- argptr = prom_getcmdline();
-
- /* Various early Au1000 Errata corrected by this */
- set_c0_config(1<<19); /* Config[OD] */
-
-#ifdef CONFIG_AU1X00_SERIAL_CONSOLE
- if ((argptr = strstr(argptr, "console=")) == NULL) {
- argptr = prom_getcmdline();
- strcat(argptr, " console=ttyS0,115200");
- }
-#endif
-
-#ifdef CONFIG_FB_AU1100
- if ((argptr = strstr(argptr, "video=")) == NULL) {
- argptr = prom_getcmdline();
- /* default panel */
- //strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");
- strcat(argptr, " video=au1100fb:panel:s10,nohwcursor");
- }
-#endif
-
-#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
- // au1000 does not support vra, au1500 and au1100 do
- strcat(argptr, " au1000_audio=vra");
- argptr = prom_getcmdline();
-#endif
-
- rtc_ops = &no_rtc_ops;
- _machine_restart = au1000_restart;
- _machine_halt = au1000_halt;
- _machine_power_off = au1000_power_off;
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_SOC_AU1500)
- fixup_bigphys_addr = db_fixup_bigphys_addr;
-#endif
-
- // IO/MEM resources.
- set_io_port_base(0);
-#ifdef CONFIG_SOC_AU1500
- ioport_resource.start = 0x00000000;
-#else
- /* don't allow any legacy ports probing */
- ioport_resource.start = 0x10000000;
-#endif
- ioport_resource.end = 0xffffffff;
- iomem_resource.start = 0x10000000;
- iomem_resource.end = 0xffffffff;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
- initrd_start = (unsigned long)&__rd_start;
- initrd_end = (unsigned long)&__rd_end;
-#endif
-
- //
- // NOTE:
- //
- // YAMON (specifically reset_db1500.s) enables 32khz osc
- // YAMON (specifically reset_db1x00.s) setups all clocking and GPIOs
- // YAMON (specifically reset_db1500.s) setups all PCI
- //
-
-#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
-#ifdef CONFIG_USB_OHCI
- if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
- char usb_args[80];
- argptr = prom_getcmdline();
- memset(usb_args, 0, sizeof(usb_args));
- sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
- USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
- strcat(argptr, usb_args);
- }
-#endif
-
-#ifdef CONFIG_USB_OHCI
- // enable host controller and wait for reset done
- au_writel(0x08, USB_HOST_CONFIG);
- udelay(1000);
- au_writel(0x0E, USB_HOST_CONFIG);
- udelay(1000);
- au_readl(USB_HOST_CONFIG); // throw away first read
- while (!(au_readl(USB_HOST_CONFIG) & 0x10))
- au_readl(USB_HOST_CONFIG);
-#endif
-
-#ifdef CONFIG_AU1X00_USB_DEVICE
- // 2nd USB port is USB device
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
- au_writel(pin_func, SYS_PINFUNC);
-#endif
-
-#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
-
-#ifdef CONFIG_FB
- // Needed if PCI video card in use
- conswitchp = &dummy_con;
-#endif
-
-#ifndef CONFIG_SERIAL_NONSTANDARD
- /* don't touch the default serial console */
- au_writel(0, UART_ADDR + UART_CLK);
-#endif
- //au_writel(0, UART3_ADDR + UART_CLK);
-
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
-#endif
-
-#if 0
- //// FIX!!! must be valid for au1000, au1500 and au1100
- /* Enable Au1000 BCLK switching */
- switch (prid & 0x000000FF)
- {
- case 0x00: /* DA */
- case 0x01: /* HA */
- case 0x02: /* HB */
- break;
- default: /* HC and newer */
- au_writel(0x00000060, 0xb190003c);
- break;
- }
-#endif
-
- au_writel(0, 0xAE000010); /* turn off pcmcia power */
-
-#ifdef CONFIG_MIPS_DB1000
- printk("AMD Alchemy Au1000/Db1000 Board\n");
-#endif
-#ifdef CONFIG_MIPS_DB1500
- printk("AMD Alchemy Au1500/Db1500 Board\n");
-#endif
-#ifdef CONFIG_MIPS_DB1100
- printk("AMD Alchemy Au1100/Db1100 Board\n");
-#endif
-}
-
-#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_SOC_AU1500)
-static phys_t db_fixup_bigphys_addr(phys_t phys_addr, phys_t size)
-{
- u32 pci_start = (u32)Au1500_PCI_MEM_START;
- u32 pci_end = (u32)Au1500_PCI_MEM_END;
-
- /* Don't fixup 36 bit addresses */
- if ((phys_addr >> 32) != 0) return phys_addr;
-
- /* check for pci memory window */
- if ((phys_addr >= pci_start) && ((phys_addr + size) < pci_end)) {
- return (phys_t)((phys_addr - pci_start) +
- Au1500_PCI_MEM_START);
- }
- else
- return phys_addr;
-}
-#endif
diff -puN /dev/null arch/mips/au1000/hydrogen3/board_setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/hydrogen3/board_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,71 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Alchemy Db1x00 board setup.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/mc146818rtc.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/keyboard.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/au1000.h>
+#include <asm/db1x00.h>
+
+extern struct rtc_ops no_rtc_ops;
+
+void __init board_setup(void)
+{
+ u32 pin_func;
+
+ rtc_ops = &no_rtc_ops;
+
+#ifdef CONFIG_AU1X00_USB_DEVICE
+ // 2nd USB port is USB device
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
+ au_writel(pin_func, SYS_PINFUNC);
+#endif
+
+#if defined(CONFIG_IRDA) && (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
+ /* set IRFIRSEL instead of GPIO15 */
+ pin_func = au_readl(SYS_PINFUNC) | (u32)((1<<8));
+ au_writel(pin_func, SYS_PINFUNC);
+ au_sync();
+#endif
+
+ printk("AMD Alchemy Hydrogen3 Board\n");
+}
diff -puN /dev/null arch/mips/au1000/hydrogen3/init.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/hydrogen3/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,77 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * PB1000 board setup
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <linux/config.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+extern void __init prom_init_cmdline(void);
+extern char *prom_getenv(char *envname);
+
+const char *get_system_type(void)
+{
+#ifdef CONFIG_MIPS_BOSPORUS
+ return "Alchemy Bosporus Gateway Reference";
+#else
+ return "Alchemy Db1x00";
+#endif
+}
+
+int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+{
+ unsigned char *memsize_str;
+ unsigned long memsize;
+
+ prom_argc = argc;
+ prom_argv = argv;
+ prom_envp = envp;
+
+ mips_machgroup = MACH_GROUP_ALCHEMY;
+ mips_machtype = MACH_DB1000; /* set the platform # */
+ prom_init_cmdline();
+
+ memsize_str = prom_getenv("memsize");
+ if (!memsize_str) {
+ memsize = 0x04000000;
+ } else {
+ memsize = simple_strtol(memsize_str, NULL, 0);
+ }
+ add_memory_region(0, memsize, BOOT_MEM_RAM);
+ return 0;
+}
diff -puN /dev/null arch/mips/au1000/hydrogen3/irqmap.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/hydrogen3/irqmap.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,90 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Au1xxx irq map table
+ *
+ * Copyright 2003 Embedded Edge, LLC
+ * dan@embeddededge.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/au1000.h>
+
+au1xxx_irq_map_t au1xxx_irq_map[] = {
+ { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
+
+// { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
+
+ { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
+
+ /* Careful if you change match 2 request!
+ * The interrupt handler is called directly
+ * from the low level dispatch code.
+ */
+ { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
+};
+
+int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
diff -puN /dev/null arch/mips/au1000/hydrogen3/Makefile
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/hydrogen3/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,22 @@
+#
+# Copyright 2000 MontaVista Software Inc.
+# Author: MontaVista Software, Inc.
+# ppopov@mvista.com or source@mvista.com
+#
+# Makefile for the Alchemy Semiconductor PB1000 board.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+ $(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+ $(CC) $(CFLAGS) -c $< -o $*.o
+
+O_TARGET := hydrogen3.o
+
+obj-y := init.o board_setup.o irqmap.o
+
+include $(TOPDIR)/Rules.make
diff -puN /dev/null arch/mips/au1000/mtx-1/board_setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/mtx-1/board_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,89 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * 4G Systems MTX-1 board setup.
+ *
+ * Copyright 2003 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ * Bruno Randolf <bruno.randolf@4g-systems.biz>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/mc146818rtc.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/keyboard.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/au1000.h>
+
+extern struct rtc_ops no_rtc_ops;
+
+void __init board_setup(void)
+{
+ rtc_ops = &no_rtc_ops;
+
+#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+#ifdef CONFIG_AU1X00_USB_DEVICE
+ // 2nd USB port is USB device
+ au_writel(au_readl(SYS_PINFUNC) & (u32)(~0x8000), SYS_PINFUNC);
+#endif
+ // enable USB power switch
+ au_writel( au_readl(GPIO2_DIR) | 0x10, GPIO2_DIR );
+ au_writel( 0x100000, GPIO2_OUTPUT );
+#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE)
+
+#ifdef CONFIG_PCI
+#if defined(__MIPSEB__)
+ au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
+#else
+ au_writel(0xf, Au1500_PCI_CFG);
+#endif
+#endif
+
+ // initialize sys_pinfunc:
+ // disable second ethernet port (SYS_PF_NI2)
+ // set U3/GPIO23 to GPIO23 (SYS_PF_U3)
+ au_writel( SYS_PF_NI2 | SYS_PF_U3, SYS_PINFUNC );
+
+ // initialize GPIO
+ au_writel( 0xFFFFFFFF, SYS_TRIOUTCLR );
+ au_writel( 0x00000001, SYS_OUTPUTCLR ); // set M66EN (PCI 66MHz) to OFF
+ au_writel( 0x00000008, SYS_OUTPUTSET ); // set PCI CLKRUN# to OFF
+ au_writel( 0x00000020, SYS_OUTPUTCLR ); // set eth PHY TX_ER to OFF
+
+ // enable LED and set it to green
+ au_writel( au_readl(GPIO2_DIR) | 0x1800, GPIO2_DIR );
+ au_writel( 0x18000800, GPIO2_OUTPUT );
+
+ printk("4G Systems MTX-1 Board\n");
+}
diff -puN /dev/null arch/mips/au1000/mtx-1/init.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/mtx-1/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,74 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * 4G Systems MTX-1 board setup
+ *
+ * Copyright 2003 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ * Bruno Randolf <bruno.randolf@4g-systems.biz>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <linux/config.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+extern void __init prom_init_cmdline(void);
+extern char *prom_getenv(char *envname);
+
+const char *get_system_type(void)
+{
+ return "MTX-1";
+}
+
+int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+{
+ unsigned char *memsize_str;
+ unsigned long memsize;
+
+ prom_argc = argc;
+ prom_argv = argv;
+ prom_envp = envp;
+
+ mips_machgroup = MACH_GROUP_ALCHEMY;
+ mips_machtype = MACH_MTX1; /* set the platform # */
+ prom_init_cmdline();
+
+ memsize_str = prom_getenv("memsize");
+ if (!memsize_str) {
+ memsize = 0x04000000;
+ } else {
+ memsize = simple_strtol(memsize_str, NULL, 0);
+ }
+ add_memory_region(0, memsize, BOOT_MEM_RAM);
+ return 0;
+}
diff -puN /dev/null arch/mips/au1000/mtx-1/irqmap.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/mtx-1/irqmap.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,93 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Au1xxx irq map table
+ *
+ * Copyright 2003 Embedded Edge, LLC
+ * dan@embeddededge.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/au1000.h>
+
+au1xxx_irq_map_t au1xxx_irq_map[] = {
+ { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
+
+ { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
+
+ { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
+
+ { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+
+ { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 },
+
+ { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
+
+ /* Careful if you change match 2 request!
+ * The interrupt handler is called directly
+ * from the low level dispatch code.
+ */
+ { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
+};
+
+int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
diff -puN /dev/null arch/mips/au1000/mtx-1/Makefile
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/mtx-1/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,14 @@
+#
+# Copyright 2003 MontaVista Software Inc.
+# Author: MontaVista Software, Inc.
+# ppopov@mvista.com or source@mvista.com
+# Bruno Randolf <bruno.randolf@4g-systems.biz>
+#
+# Makefile for 4G Systems MTX-1 board.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+lib-y := init.o board_setup.o irqmap.o
diff -puN /dev/null arch/mips/au1000/pb1000/board_setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/pb1000/board_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,186 @@
+/*
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/au1000.h>
+#include <asm/pb1000.h>
+
+#ifdef CONFIG_USB_OHCI
+// Enable the workaround for the OHCI DoneHead
+// register corruption problem.
+#define CONFIG_AU1000_OHCI_FIX
+ ^^^^^^^^^^^^^^^^^^^^^^
+ !!! I shall not define symbols starting with CONFIG_ !!!
+#endif
+
+void __init board_setup(void)
+{
+ u32 pin_func, static_cfg0;
+ u32 sys_freqctrl, sys_clksrc;
+ u32 prid = read_c0_prid();
+
+ // set AUX clock to 12MHz * 8 = 96 MHz
+ au_writel(8, SYS_AUXPLL);
+ au_writel(0, SYS_PINSTATERD);
+ udelay(100);
+
+#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+ /* zero and disable FREQ2 */
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
+ sys_freqctrl &= ~0xFFF00000;
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+ /* zero and disable USBH/USBD clocks */
+ sys_clksrc = au_readl(SYS_CLKSRC);
+ sys_clksrc &= ~0x00007FE0;
+ au_writel(sys_clksrc, SYS_CLKSRC);
+
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
+ sys_freqctrl &= ~0xFFF00000;
+
+ sys_clksrc = au_readl(SYS_CLKSRC);
+ sys_clksrc &= ~0x00007FE0;
+
+ switch (prid & 0x000000FF)
+ {
+ case 0x00: /* DA */
+ case 0x01: /* HA */
+ case 0x02: /* HB */
+ /* CPU core freq to 48MHz to slow it way down... */
+ au_writel(4, SYS_CPUPLL);
+
+ /*
+ * Setup 48MHz FREQ2 from CPUPLL for USB Host
+ */
+ /* FRDIV2=3 -> div by 8 of 384MHz -> 48MHz */
+ sys_freqctrl |= ((3<<22) | (1<<21) | (0<<20));
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+ /* CPU core freq to 384MHz */
+ au_writel(0x20, SYS_CPUPLL);
+
+ printk("Au1000: 48MHz OHCI workaround enabled\n");
+ break;
+
+ default: /* HC and newer */
+ // FREQ2 = aux/2 = 48 MHz
+ sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
+ break;
+ }
+
+ /*
+ * Route 48MHz FREQ2 into USB Host and/or Device
+ */
+#ifdef CONFIG_USB_OHCI
+ sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
+#endif
+#ifdef CONFIG_AU1X00_USB_DEVICE
+ sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
+#endif
+ au_writel(sys_clksrc, SYS_CLKSRC);
+
+ // configure pins GPIO[14:9] as GPIO
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8080);
+
+#ifndef CONFIG_AU1X00_USB_DEVICE
+ // 2nd USB port is USB host
+ pin_func |= 0x8000;
+#endif
+ au_writel(pin_func, SYS_PINFUNC);
+ au_writel(0x2800, SYS_TRIOUTCLR);
+ au_writel(0x0030, SYS_OUTPUTCLR);
+#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+
+ // make gpio 15 an input (for interrupt line)
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x100);
+ // we don't need I2S, so make it available for GPIO[31:29]
+ pin_func |= (1<<5);
+ au_writel(pin_func, SYS_PINFUNC);
+
+ au_writel(0x8000, SYS_TRIOUTCLR);
+
+ static_cfg0 = au_readl(MEM_STCFG0) & (u32)(~0xc00);
+ au_writel(static_cfg0, MEM_STCFG0);
+
+ // configure RCE2* for LCD
+ au_writel(0x00000004, MEM_STCFG2);
+
+ // MEM_STTIME2
+ au_writel(0x09000000, MEM_STTIME2);
+
+ // Set 32-bit base address decoding for RCE2*
+ au_writel(0x10003ff0, MEM_STADDR2);
+
+ // PCI CPLD setup
+ // expand CE0 to cover PCI
+ au_writel(0x11803e40, MEM_STADDR1);
+
+ // burst visibility on
+ au_writel(au_readl(MEM_STCFG0) | 0x1000, MEM_STCFG0);
+
+ au_writel(0x83, MEM_STCFG1); // ewait enabled, flash timing
+ au_writel(0x33030a10, MEM_STTIME1); // slower timing for FPGA
+
+ /* setup the static bus controller */
+ au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
+ au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
+ au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
+
+#ifdef CONFIG_PCI
+ au_writel(0, PCI_BRIDGE_CONFIG); // set extend byte to 0
+ au_writel(0, SDRAM_MBAR); // set mbar to 0
+ au_writel(0x2, SDRAM_CMD); // enable memory accesses
+ au_sync_delay(1);
+#endif
+
+ /* Enable Au1000 BCLK switching - note: sed1356 must not use
+ * its BCLK (Au1000 LCLK) for any timings */
+ switch (prid & 0x000000FF)
+ {
+ case 0x00: /* DA */
+ case 0x01: /* HA */
+ case 0x02: /* HB */
+ break;
+ default: /* HC and newer */
+ /* Enable sys bus clock divider when IDLE state or no bus
+ activity. */
+ au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
+ break;
+ }
+}
diff -puN arch/mips/au1000/pb1000/init.c~mips-megapatch arch/mips/au1000/pb1000/init.c
--- 25/arch/mips/au1000/pb1000/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/pb1000/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,5 +1,4 @@
/*
- *
* BRIEF MODULE DESCRIPTION
* PB1000 board setup
*
@@ -35,7 +34,6 @@
#include <asm/bootinfo.h>
#include <linux/string.h>
#include <linux/kernel.h>
-#include <linux/sched.h>
int prom_argc;
char **prom_argv, **prom_envp;
@@ -47,14 +45,14 @@ const char *get_system_type(void)
return "Alchemy Pb1000";
}
-int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+void __init prom_init(void)
{
unsigned char *memsize_str;
unsigned long memsize;
- prom_argc = argc;
- prom_argv = argv;
- prom_envp = envp;
+ prom_argc = (int) fw_arg0;
+ prom_argv = (char **) fw_arg1;
+ prom_envp = (char **) fw_arg2;
mips_machgroup = MACH_GROUP_ALCHEMY;
mips_machtype = MACH_PB1000;
diff -puN /dev/null arch/mips/au1000/pb1000/irqmap.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/pb1000/irqmap.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,96 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Au1xxx irq map table
+ *
+ * Copyright 2003 Embedded Edge, LLC
+ * dan@embeddededge.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/au1000.h>
+
+au1xxx_irq_map_t au1xxx_irq_map[] = {
+ { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_UART2_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_GPIO_15, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
+
+ { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
+
+ /* Careful if you change match 2 request!
+ * The interrupt handler is called directly
+ * from the low level dispatch code.
+ */
+ { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
+};
+
+int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
diff -puN arch/mips/au1000/pb1000/Makefile~mips-megapatch arch/mips/au1000/pb1000/Makefile
--- 25/arch/mips/au1000/pb1000/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/pb1000/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -4,14 +4,5 @@
# ppopov@mvista.com or source@mvista.com
#
# Makefile for the Alchemy Semiconductor PB1000 board.
-#
-# Note! Dependencies are done automagically by 'make dep', which also
-# removes any old dependencies. DON'T put your own dependencies here
-# unless it's something special (ie not a .c file).
-#
-
-USE_STANDARD_AS_RULE := true
-
-O_TARGET := pb1000.o
-obj-y := init.o setup.o
+lib-y := init.o board_setup.o irqmap.o
diff -puN -L arch/mips/au1000/pb1000/setup.c arch/mips/au1000/pb1000/setup.c~mips-megapatch /dev/null
--- 25/arch/mips/au1000/pb1000/setup.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,301 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Alchemy Pb1000 board setup.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/mm.h>
-#include <linux/console.h>
-#include <linux/mc146818rtc.h>
-#include <linux/major.h>
-#include <linux/kdev_t.h>
-#include <linux/root_dev.h>
-#include <linux/delay.h>
-
-#include <asm/cpu.h>
-#include <asm/bootinfo.h>
-#include <asm/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/reboot.h>
-#include <asm/pgtable.h>
-#include <asm/au1000.h>
-#include <asm/pb1000.h>
-
-#ifdef CONFIG_USB_OHCI
-// Enable the workaround for the OHCI DoneHead
-// register corruption problem.
-#define CONFIG_AU1000_OHCI_FIX
-#endif
-
-#if defined(CONFIG_AU1X00_SERIAL_CONSOLE)
-char serial_console[20];
-#endif
-
-#ifdef CONFIG_BLK_DEV_INITRD
-extern unsigned long initrd_start, initrd_end;
-extern void * __rd_start, * __rd_end;
-#endif
-
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops std_ide_ops;
-extern struct ide_ops *ide_ops;
-#endif
-
-extern struct rtc_ops no_rtc_ops;
-extern char * __init prom_getcmdline(void);
-extern void au1000_restart(char *);
-extern void au1000_halt(void);
-extern void au1000_power_off(void);
-extern struct resource ioport_resource;
-extern struct resource iomem_resource;
-
-void __init au1x00_setup(void)
-{
- char *argptr;
- u32 pin_func, static_cfg0;
- u32 sys_freqctrl, sys_clksrc;
- u32 prid = read_c0_prid();
-
- argptr = prom_getcmdline();
-
- /* Various early Au1000 Errata corrected by this */
- set_c0_config(1<<19); /* Config[OD] */
-
-#ifdef CONFIG_AU1X00_SERIAL_CONSOLE
- if ((argptr = strstr(argptr, "console=")) == NULL) {
- argptr = prom_getcmdline();
- strcat(argptr, " console=ttyS0,115200");
- }
-#endif
-
- rtc_ops = &no_rtc_ops;
- _machine_restart = au1000_restart;
- _machine_halt = au1000_halt;
- _machine_power_off = au1000_power_off;
-
- // IO/MEM resources.
- set_io_port_base(0);
- ioport_resource.start = 0x10000000;
- ioport_resource.end = 0xffffffff;
- iomem_resource.start = 0x10000000;
- iomem_resource.end = 0xffffffff;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- ROOT_DEV = Root_RAM0;
- initrd_start = (unsigned long)&__rd_start;
- initrd_end = (unsigned long)&__rd_end;
-#endif
-
- // set AUX clock to 12MHz * 8 = 96 MHz
- au_writel(8, SYS_AUXPLL);
- au_writel(0, SYS_PINSTATERD);
- udelay(100);
-
-#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
-#ifdef CONFIG_USB_OHCI
- if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
- char usb_args[80];
- argptr = prom_getcmdline();
- memset(usb_args, 0, sizeof(usb_args));
- sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
- USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
- strcat(argptr, usb_args);
- }
-#endif
-
- /* zero and disable FREQ2 */
- sys_freqctrl = au_readl(SYS_FREQCTRL0);
- sys_freqctrl &= ~0xFFF00000;
- au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
- /* zero and disable USBH/USBD clocks */
- sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x00007FE0;
- au_writel(sys_clksrc, SYS_CLKSRC);
-
- sys_freqctrl = au_readl(SYS_FREQCTRL0);
- sys_freqctrl &= ~0xFFF00000;
-
- sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x00007FE0;
-
- switch (prid & 0x000000FF)
- {
- case 0x00: /* DA */
- case 0x01: /* HA */
- case 0x02: /* HB */
- /* CPU core freq to 48MHz to slow it way down... */
- au_writel(4, SYS_CPUPLL);
-
- /*
- * Setup 48MHz FREQ2 from CPUPLL for USB Host
- */
- /* FRDIV2=3 -> div by 8 of 384MHz -> 48MHz */
- sys_freqctrl |= ((3<<22) | (1<<21) | (0<<20));
- au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
- /* CPU core freq to 384MHz */
- au_writel(0x20, SYS_CPUPLL);
-
- printk("Au1000: 48MHz OHCI workaround enabled\n");
- break;
-
- default: /* HC and newer */
- // FREQ2 = aux/2 = 48 MHz
- sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
- au_writel(sys_freqctrl, SYS_FREQCTRL0);
- break;
- }
-
- /*
- * Route 48MHz FREQ2 into USB Host and/or Device
- */
-#ifdef CONFIG_USB_OHCI
- sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
-#endif
-#ifdef CONFIG_AU1X00_USB_DEVICE
- sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
-#endif
- au_writel(sys_clksrc, SYS_CLKSRC);
-
-#ifdef CONFIG_USB_OHCI
- // enable host controller and wait for reset done
- au_writel(0x08, USB_HOST_CONFIG);
- udelay(1000);
- au_writel(0x0E, USB_HOST_CONFIG);
- udelay(1000);
- au_readl(USB_HOST_CONFIG); // throw away first read
- while (!(au_readl(USB_HOST_CONFIG) & 0x10))
- au_readl(USB_HOST_CONFIG);
-#endif
-
- // configure pins GPIO[14:9] as GPIO
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8080);
-
-#ifndef CONFIG_AU1X00_USB_DEVICE
- // 2nd USB port is USB host
- pin_func |= 0x8000;
-#endif
- au_writel(pin_func, SYS_PINFUNC);
- au_writel(0x2800, SYS_TRIOUTCLR);
- au_writel(0x0030, SYS_OUTPUTCLR);
-#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
-
- // make gpio 15 an input (for interrupt line)
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x100);
- // we don't need I2S, so make it available for GPIO[31:29]
- pin_func |= (1<<5);
- au_writel(pin_func, SYS_PINFUNC);
-
- au_writel(0x8000, SYS_TRIOUTCLR);
-
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
- static_cfg0 = au_readl(MEM_STCFG0) & (u32)(~0xc00);
- au_writel(static_cfg0, MEM_STCFG0);
-
- // configure RCE2* for LCD
- au_writel(0x00000004, MEM_STCFG2);
-
- // MEM_STTIME2
- au_writel(0x09000000, MEM_STTIME2);
-
- // Set 32-bit base address decoding for RCE2*
- au_writel(0x10003ff0, MEM_STADDR2);
-
- // PCI CPLD setup
- // expand CE0 to cover PCI
- au_writel(0x11803e40, MEM_STADDR1);
-
- // burst visibility on
- au_writel(au_readl(MEM_STCFG0) | 0x1000, MEM_STCFG0);
-
- au_writel(0x83, MEM_STCFG1); // ewait enabled, flash timing
- au_writel(0x33030a10, MEM_STTIME1); // slower timing for FPGA
-
- /* setup the static bus controller */
- au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
- au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
- au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
-
-#ifdef CONFIG_FB_E1356
- if ((argptr = strstr(argptr, "video=")) == NULL) {
- argptr = prom_getcmdline();
- strcat(argptr, " video=e1356fb:system:pb1000,mmunalign:1");
- }
-#endif // CONFIG_FB_E1356
-
-
-#ifdef CONFIG_PCI
- au_writel(0, PCI_BRIDGE_CONFIG); // set extend byte to 0
- au_writel(0, SDRAM_MBAR); // set mbar to 0
- au_writel(0x2, SDRAM_CMD); // enable memory accesses
- au_sync_delay(1);
-#endif
-
-#ifndef CONFIG_SERIAL_NONSTANDARD
- /* don't touch the default serial console */
- au_writel(0, UART0_ADDR + UART_CLK);
-#endif
- au_writel(0, UART1_ADDR + UART_CLK);
- au_writel(0, UART2_ADDR + UART_CLK);
- au_writel(0, UART3_ADDR + UART_CLK);
-
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
-#endif
-
- // setup irda clocks
- // aux clock, divide by 2, clock from 2/4 divider
- au_writel(au_readl(SYS_CLKSRC) | 0x7, SYS_CLKSRC);
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~(1<<2)); // clear IRTXD
- au_writel(pin_func, SYS_PINFUNC);
-
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
- au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
- au_sync();
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
- au_writel(0, SYS_TOYTRIM);
-
- /* Enable Au1000 BCLK switching - note: sed1356 must not use
- * its BCLK (Au1000 LCLK) for any timings */
- switch (prid & 0x000000FF)
- {
- case 0x00: /* DA */
- case 0x01: /* HA */
- case 0x02: /* HB */
- break;
- default: /* HC and newer */
- au_writel(0x00000060, 0xb190003c);
- break;
- }
-}
diff -puN /dev/null arch/mips/au1000/pb1100/board_setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/pb1100/board_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,118 @@
+/*
+ * Copyright 2002 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/au1000.h>
+#include <asm/pb1100.h>
+
+#ifdef CONFIG_USB_OHCI
+// Enable the workaround for the OHCI DoneHead
+// register corruption problem.
+#define CONFIG_AU1000_OHCI_FIX
+ ^^^^^^^^^^^^^^^^^^^^^^
+ !!! I shall not define symbols starting with CONFIG_ !!!
+#endif
+
+void __init board_setup(void)
+{
+ u32 pin_func;
+ u32 sys_freqctrl, sys_clksrc;
+
+ // set AUX clock to 12MHz * 8 = 96 MHz
+ au_writel(8, SYS_AUXPLL);
+ au_writel(0, SYS_PININPUTEN);
+ udelay(100);
+
+#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+ // configure pins GPIO[14:9] as GPIO
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80);
+
+ /* zero and disable FREQ2 */
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
+ sys_freqctrl &= ~0xFFF00000;
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+ /* zero and disable USBH/USBD/IrDA clock */
+ sys_clksrc = au_readl(SYS_CLKSRC);
+ sys_clksrc &= ~0x0000001F;
+ au_writel(sys_clksrc, SYS_CLKSRC);
+
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
+ sys_freqctrl &= ~0xFFF00000;
+
+ sys_clksrc = au_readl(SYS_CLKSRC);
+ sys_clksrc &= ~0x0000001F;
+
+ // FREQ2 = aux/2 = 48 MHz
+ sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+ /*
+ * Route 48MHz FREQ2 into USBH/USBD/IrDA
+ */
+ sys_clksrc |= ((4<<2) | (0<<1) | 0 );
+ au_writel(sys_clksrc, SYS_CLKSRC);
+
+ /* setup the static bus controller */
+ au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
+ au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
+ au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
+
+ // get USB Functionality pin state (device vs host drive pins)
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
+#ifndef CONFIG_AU1X00_USB_DEVICE
+ // 2nd USB port is USB host
+ pin_func |= 0x8000;
+#endif
+ au_writel(pin_func, SYS_PINFUNC);
+#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+
+ /* Enable sys bus clock divider when IDLE state or no bus activity. */
+ au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
+
+ // Enable the RTC if not already enabled
+ if (!(readb(0xac000028) & 0x20)) {
+ writeb(readb(0xac000028) | 0x20, 0xac000028);
+ au_sync();
+ }
+ // Put the clock in BCD mode
+ if (readb(0xac00002C) & 0x4) { /* reg B */
+ writeb(readb(0xac00002c) & ~0x4, 0xac00002c);
+ au_sync();
+ }
+}
diff -puN arch/mips/au1000/pb1100/init.c~mips-megapatch arch/mips/au1000/pb1100/init.c
--- 25/arch/mips/au1000/pb1100/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/pb1100/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -27,17 +27,14 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-#include <linux/config.h>
#include <linux/string.h>
#include <linux/kernel.h>
-#include <linux/sched.h>
int prom_argc;
char **prom_argv, **prom_envp;
@@ -49,25 +46,25 @@ const char *get_system_type(void)
return "Alchemy Pb1100";
}
-int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+void __init prom_init(void)
{
unsigned char *memsize_str;
unsigned long memsize;
- prom_argc = argc;
- prom_argv = argv;
- prom_envp = envp;
+ prom_argc = fw_arg0;
+ prom_argv = (char **) fw_arg1;
+ prom_envp = (int *) fw_arg3;
mips_machgroup = MACH_GROUP_ALCHEMY;
mips_machtype = MACH_PB1100;
prom_init_cmdline();
+
memsize_str = prom_getenv("memsize");
- if (!memsize_str) {
+ if (!memsize_str)
memsize = 0x04000000;
- } else {
+ else
memsize = simple_strtol(memsize_str, NULL, 0);
- }
+
add_memory_region(0, memsize, BOOT_MEM_RAM);
- return 0;
}
diff -puN /dev/null arch/mips/au1000/pb1100/irqmap.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/pb1100/irqmap.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,100 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Au1xxx irq map table
+ *
+ * Copyright 2003 Embedded Edge, LLC
+ * dan@embeddededge.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/au1000.h>
+
+au1xxx_irq_map_t au1xxx_irq_map[] = {
+ { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card Fully_Interted#
+ { AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card STSCHG#
+ { AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card IRQ#
+ { AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, // DC_IRQ#
+ { AU1000_GPIO_23, INTC_INT_LOW_LEVEL, 0 }, // 2-wire SCL
+
+ { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
+
+ /* Careful if you change match 2 request!
+ * The interrupt handler is called directly
+ * from the low level dispatch code.
+ */
+ { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
+};
+
+int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
diff -puN arch/mips/au1000/pb1100/Makefile~mips-megapatch arch/mips/au1000/pb1100/Makefile
--- 25/arch/mips/au1000/pb1100/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/pb1100/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -4,14 +4,5 @@
# ppopov@mvista.com or source@mvista.com
#
# Makefile for the Alchemy Semiconductor Pb1100 board.
-#
-# Note! Dependencies are done automagically by 'make dep', which also
-# removes any old dependencies. DON'T put your own dependencies here
-# unless it's something special (ie not a .c file).
-#
-
-USE_STANDARD_AS_RULE := true
-
-O_TARGET := pb1100.o
-obj-y := init.o setup.o
+lib-y := init.o board_setup.o irqmap.o
diff -puN -L arch/mips/au1000/pb1100/setup.c arch/mips/au1000/pb1100/setup.c~mips-megapatch /dev/null
--- 25/arch/mips/au1000/pb1100/setup.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,248 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Alchemy Pb1100 board setup.
- *
- * Copyright 2002 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/mm.h>
-#include <linux/console.h>
-#include <linux/mc146818rtc.h>
-#include <linux/delay.h>
-#include <linux/major.h>
-#include <linux/kdev_t.h>
-#include <linux/root_dev.h>
-
-#include <asm/cpu.h>
-#include <asm/bootinfo.h>
-#include <asm/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/reboot.h>
-#include <asm/pgtable.h>
-#include <asm/au1000.h>
-#include <asm/pb1100.h>
-
-#ifdef CONFIG_USB_OHCI
-// Enable the workaround for the OHCI DoneHead
-// register corruption problem.
-#define CONFIG_AU1000_OHCI_FIX
-#endif
-
-#if defined(CONFIG_AU1X00_SERIAL_CONSOLE)
-extern void console_setup(char *, int *);
-char serial_console[20];
-#endif
-
-#ifdef CONFIG_BLK_DEV_INITRD
-extern unsigned long initrd_start, initrd_end;
-extern void * __rd_start, * __rd_end;
-#endif
-
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops std_ide_ops;
-extern struct ide_ops *ide_ops;
-#endif
-
-#ifdef CONFIG_RTC
-extern struct rtc_ops pb1500_rtc_ops;
-#endif
-
-extern char * __init prom_getcmdline(void);
-extern void au1000_restart(char *);
-extern void au1000_halt(void);
-extern void au1000_power_off(void);
-extern struct resource ioport_resource;
-extern struct resource iomem_resource;
-
-
-void __init au1x00_setup(void)
-{
- char *argptr;
- u32 pin_func, static_cfg0;
- u32 sys_freqctrl, sys_clksrc;
-
- argptr = prom_getcmdline();
-
- /* NOTE: The memory map is established by YAMON 2.08+ */
-
- /* Various early Au1000 Errata corrected by this */
- set_c0_config(1<<19); /* Config[OD] */
-
-#ifdef CONFIG_AU1X00_SERIAL_CONSOLE
- if ((argptr = strstr(argptr, "console=")) == NULL) {
- argptr = prom_getcmdline();
- strcat(argptr, " console=ttyS0,115200");
- }
-#endif
-
-#ifdef CONFIG_SOUND_AU1X00
- strcat(argptr, " au1000_audio=vra");
- argptr = prom_getcmdline();
-#endif
-
- _machine_restart = au1000_restart;
- _machine_halt = au1000_halt;
- _machine_power_off = au1000_power_off;
-
- // IO/MEM resources.
- set_io_port_base(0);
- ioport_resource.start = 0x10000000;
- ioport_resource.end = 0xffffffff;
- iomem_resource.start = 0x10000000;
- iomem_resource.end = 0xffffffff;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- ROOT_DEV = Root_RAM0;
- initrd_start = (unsigned long)&__rd_start;
- initrd_end = (unsigned long)&__rd_end;
-#endif
-
- // set AUX clock to 12MHz * 8 = 96 MHz
- au_writel(8, SYS_AUXPLL);
- au_writel(0, SYS_PININPUTEN);
- udelay(100);
-
-#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
-#ifdef CONFIG_USB_OHCI
- if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
- char usb_args[80];
- argptr = prom_getcmdline();
- memset(usb_args, 0, sizeof(usb_args));
- sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
- USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
- strcat(argptr, usb_args);
- }
-#endif
- // configure pins GPIO[14:9] as GPIO
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80);
-
- /* zero and disable FREQ2 */
- sys_freqctrl = au_readl(SYS_FREQCTRL0);
- sys_freqctrl &= ~0xFFF00000;
- au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
- /* zero and disable USBH/USBD/IrDA clock */
- sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x0000001F;
- au_writel(sys_clksrc, SYS_CLKSRC);
-
- sys_freqctrl = au_readl(SYS_FREQCTRL0);
- sys_freqctrl &= ~0xFFF00000;
-
- sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x0000001F;
-
- // FREQ2 = aux/2 = 48 MHz
- sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
- au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
- /*
- * Route 48MHz FREQ2 into USBH/USBD/IrDA
- */
- sys_clksrc |= ((4<<2) | (0<<1) | 0 );
- au_writel(sys_clksrc, SYS_CLKSRC);
-
- /* setup the static bus controller */
- au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
- au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
- au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
-
- // get USB Functionality pin state (device vs host drive pins)
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
-#ifndef CONFIG_AU1X00_USB_DEVICE
- // 2nd USB port is USB host
- pin_func |= 0x8000;
-#endif
- au_writel(pin_func, SYS_PINFUNC);
-#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
-
-#ifdef CONFIG_USB_OHCI
- // enable host controller and wait for reset done
- au_writel(0x08, USB_HOST_CONFIG);
- udelay(1000);
- au_writel(0x0c, USB_HOST_CONFIG);
- udelay(1000);
- au_readl(USB_HOST_CONFIG);
- while (!(au_readl(USB_HOST_CONFIG) & 0x10))
- ;
- au_readl(USB_HOST_CONFIG);
-#endif
-
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
-#ifdef CONFIG_FB_AU1100
- if ((argptr = strstr(argptr, "video=")) == NULL) {
- argptr = prom_getcmdline();
- /* default panel */
- strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");
- }
-#endif
-
-#ifdef CONFIG_FB_E1356
- if ((argptr = strstr(argptr, "video=")) == NULL) {
- argptr = prom_getcmdline();
- strcat(argptr, " video=e1356fb:system:pb1500");
- }
-#endif
-
-#ifndef CONFIG_SERIAL_NONSTANDARD
- /* don't touch the default serial console */
- au_writel(0, UART0_ADDR + UART_CLK);
-#endif
- au_writel(0, UART1_ADDR + UART_CLK);
- au_writel(0, UART3_ADDR + UART_CLK);
-
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
-#endif
-
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
- au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
- au_sync();
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
- au_writel(0, SYS_TOYTRIM);
-
- au_writel(0x00000060, 0xb190003c);
-
-#ifdef CONFIG_RTC
- rtc_ops = &pb1500_rtc_ops;
- // Enable the RTC if not already enabled
- if (!(readb(0xac000028) & 0x20)) {
- writeb(readb(0xac000028) | 0x20, 0xac000028);
- au_sync();
- }
- // Put the clock in BCD mode
- if (readb(0xac00002C) & 0x4) { /* reg B */
- writeb(readb(0xac00002c) & ~0x4, 0xac00002c);
- au_sync();
- }
-#endif
-}
diff -puN /dev/null arch/mips/au1000/pb1500/board_setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/pb1500/board_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,140 @@
+/*
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/mach-au1x00/au1000.h>
+#include <asm/mach-pb1x00/pb1500.h>
+
+#ifdef CONFIG_USB_OHCI
+// Enable the workaround for the OHCI DoneHead
+// register corruption problem.
+#define CONFIG_AU1000_OHCI_FIX
+ ^^^^^^^^^^^^^^^^^^^^^^
+ !!! I shall not define symbols starting with CONFIG_ !!!
+#endif
+
+void __init board_setup(void)
+{
+ u32 pin_func;
+ u32 sys_freqctrl, sys_clksrc;
+
+ sys_clksrc = sys_freqctrl = pin_func = 0;
+ // set AUX clock to 12MHz * 8 = 96 MHz
+ au_writel(8, SYS_AUXPLL);
+ au_writel(0, SYS_PINSTATERD);
+ udelay(100);
+
+#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+
+ /* GPIO201 is input for PCMCIA card detect */
+ /* GPIO203 is input for PCMCIA interrupt request */
+ au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR);
+
+ /* zero and disable FREQ2 */
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
+ sys_freqctrl &= ~0xFFF00000;
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+ /* zero and disable USBH/USBD clocks */
+ sys_clksrc = au_readl(SYS_CLKSRC);
+ sys_clksrc &= ~0x00007FE0;
+ au_writel(sys_clksrc, SYS_CLKSRC);
+
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
+ sys_freqctrl &= ~0xFFF00000;
+
+ sys_clksrc = au_readl(SYS_CLKSRC);
+ sys_clksrc &= ~0x00007FE0;
+
+ // FREQ2 = aux/2 = 48 MHz
+ sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+ /*
+ * Route 48MHz FREQ2 into USB Host and/or Device
+ */
+#ifdef CONFIG_USB_OHCI
+ sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
+#endif
+#ifdef CONFIG_AU1X00_USB_DEVICE
+ sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
+#endif
+ au_writel(sys_clksrc, SYS_CLKSRC);
+
+
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
+#ifndef CONFIG_AU1X00_USB_DEVICE
+ // 2nd USB port is USB host
+ pin_func |= 0x8000;
+#endif
+ au_writel(pin_func, SYS_PINFUNC);
+#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
+
+
+
+#ifdef CONFIG_PCI
+ // Setup PCI bus controller
+ au_writel(0, Au1500_PCI_CMEM);
+ au_writel(0x00003fff, Au1500_CFG_BASE);
+#if defined(__MIPSEB__)
+ au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
+#else
+ au_writel(0xf, Au1500_PCI_CFG);
+#endif
+ au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
+ au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
+ au_writel(0x02a00356, Au1500_PCI_STATCMD);
+ au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
+ au_writel(0x00000008, Au1500_PCI_MBAR);
+ au_sync();
+#endif
+
+ /* Enable sys bus clock divider when IDLE state or no bus activity. */
+ au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
+
+ /* Enable the RTC if not already enabled */
+ if (!(au_readl(0xac000028) & 0x20)) {
+ printk("enabling clock ...\n");
+ au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
+ }
+ /* Put the clock in BCD mode */
+ if (readl(0xac00002C) & 0x4) { /* reg B */
+ au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
+ au_sync();
+ }
+}
diff -puN arch/mips/au1000/pb1500/init.c~mips-megapatch arch/mips/au1000/pb1500/init.c
--- 25/arch/mips/au1000/pb1500/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/pb1500/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -35,7 +35,6 @@
#include <asm/bootinfo.h>
#include <linux/string.h>
#include <linux/kernel.h>
-#include <linux/sched.h>
int prom_argc;
char **prom_argv, **prom_envp;
@@ -47,14 +46,14 @@ const char *get_system_type(void)
return "Alchemy Pb1500";
}
-int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+void __init prom_init(void)
{
unsigned char *memsize_str;
unsigned long memsize;
- prom_argc = argc;
- prom_argv = argv;
- prom_envp = envp;
+ prom_argc = (int) fw_arg0;
+ prom_argv = (char **) fw_arg1;
+ prom_envp = (char **) fw_arg2;
mips_machgroup = MACH_GROUP_ALCHEMY;
mips_machtype = MACH_PB1500;
@@ -67,5 +66,4 @@ int __init prom_init(int argc, char **ar
memsize = simple_strtol(memsize_str, NULL, 0);
}
add_memory_region(0, memsize, BOOT_MEM_RAM);
- return 0;
}
diff -puN /dev/null arch/mips/au1000/pb1500/irqmap.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/pb1500/irqmap.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,100 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Au1xxx irq map table
+ *
+ * Copyright 2003 Embedded Edge, LLC
+ * dan@embeddededge.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/mach-au1x00/au1000.h>
+
+au1xxx_irq_map_t au1xxx_irq_map[] = {
+ { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
+
+ { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 },
+
+ { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
+
+ /* Careful if you change match 2 request!
+ * The interrupt handler is called directly
+ * from the low level dispatch code.
+ */
+ { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
+};
+
+int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
diff -puN arch/mips/au1000/pb1500/Makefile~mips-megapatch arch/mips/au1000/pb1500/Makefile
--- 25/arch/mips/au1000/pb1500/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/au1000/pb1500/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -4,10 +4,5 @@
# ppopov@mvista.com or source@mvista.com
#
# Makefile for the Alchemy Semiconductor Pb1500 board.
-#
-# Note! Dependencies are done automagically by 'make dep', which also
-# removes any old dependencies. DON'T put your own dependencies here
-# unless it's something special (ie not a .c file).
-#
-lib-y := init.o setup.o
+lib-y := init.o board_setup.o irqmap.o
diff -puN -L arch/mips/au1000/pb1500/setup.c arch/mips/au1000/pb1500/setup.c~mips-megapatch /dev/null
--- 25/arch/mips/au1000/pb1500/setup.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,293 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Alchemy Pb1000 board setup.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/mm.h>
-#include <linux/console.h>
-#include <linux/mc146818rtc.h>
-#include <linux/delay.h>
-#include <linux/major.h>
-#include <linux/kdev_t.h>
-#include <linux/root_dev.h>
-
-#include <asm/cpu.h>
-#include <asm/time.h>
-#include <asm/bootinfo.h>
-#include <asm/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/reboot.h>
-#include <asm/pgtable.h>
-#include <asm/au1000.h>
-#include <asm/pb1500.h>
-
-#ifdef CONFIG_USB_OHCI
-// Enable the workaround for the OHCI DoneHead
-// register corruption problem.
-#define CONFIG_AU1000_OHCI_FIX
-#endif
-
-#ifdef CONFIG_BLK_DEV_INITRD
-extern unsigned long initrd_start, initrd_end;
-extern void * __rd_start, * __rd_end;
-#endif
-
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops std_ide_ops;
-extern struct ide_ops *ide_ops;
-#endif
-
-#ifdef CONFIG_RTC
-extern struct rtc_ops pb1500_rtc_ops;
-#endif
-
-extern char * __init prom_getcmdline(void);
-extern void __init au1x_time_init(void);
-extern void __init au1x_timer_setup(struct irqaction *irq);
-extern void au1000_restart(char *);
-extern void au1000_halt(void);
-extern void au1000_power_off(void);
-extern struct resource ioport_resource;
-extern struct resource iomem_resource;
-#ifdef CONFIG_64BIT_PHYS_ADDR
-extern phys_t (*fixup_bigphys_addr)(phys_t phys_addr, phys_t size);
-static phys_t pb1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size);
-#endif
-
-
-void __init au1x00_setup(void)
-{
- char *argptr;
- u32 pin_func, static_cfg0;
- u32 sys_freqctrl, sys_clksrc;
-
- argptr = prom_getcmdline();
-
- /* NOTE: The memory map is established by YAMON 2.08+ */
-
- /* Various early Au1500 Errata corrected by this */
- set_c0_config(1<<19); /* Config[OD] */
-
- board_time_init = au1x_time_init;
- board_timer_setup = au1x_timer_setup;
-
-#ifdef CONFIG_SERIAL_AU1X00_CONSOLE
- if ((argptr = strstr(argptr, "console=")) == NULL) {
- argptr = prom_getcmdline();
- strcat(argptr, " console=ttyS0,115200");
- }
-#endif
-
-#ifdef CONFIG_SOUND_AU1X00
- strcat(argptr, " au1000_audio=vra");
- argptr = prom_getcmdline();
-#endif
-
- _machine_restart = au1000_restart;
- _machine_halt = au1000_halt;
- _machine_power_off = au1000_power_off;
-#ifdef CONFIG_64BIT_PHYS_ADDR
- fixup_bigphys_addr = pb1500_fixup_bigphys_addr;
-#endif
-
- // IO/MEM resources.
- set_io_port_base(0);
- ioport_resource.start = 0x00000000;
- ioport_resource.end = 0xffffffff;
- iomem_resource.start = 0x10000000;
- iomem_resource.end = 0xffffffff;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- ROOT_DEV = Root_RAM0;
- initrd_start = (unsigned long)&__rd_start;
- initrd_end = (unsigned long)&__rd_end;
-#endif
-
- // set AUX clock to 12MHz * 8 = 96 MHz
- au_writel(8, SYS_AUXPLL);
- au_writel(0, SYS_PINSTATERD);
- udelay(100);
-
-#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
-#ifdef CONFIG_USB_OHCI
- if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
- char usb_args[80];
- argptr = prom_getcmdline();
- memset(usb_args, 0, sizeof(usb_args));
- sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
- USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
- strcat(argptr, usb_args);
- }
-#endif
-
- /* GPIO201 is input for PCMCIA card detect */
- /* GPIO203 is input for PCMCIA interrupt request */
- au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR);
-
- /* zero and disable FREQ2 */
- sys_freqctrl = au_readl(SYS_FREQCTRL0);
- sys_freqctrl &= ~0xFFF00000;
- au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
- /* zero and disable USBH/USBD clocks */
- sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x00007FE0;
- au_writel(sys_clksrc, SYS_CLKSRC);
-
- sys_freqctrl = au_readl(SYS_FREQCTRL0);
- sys_freqctrl &= ~0xFFF00000;
-
- sys_clksrc = au_readl(SYS_CLKSRC);
- sys_clksrc &= ~0x00007FE0;
-
- // FREQ2 = aux/2 = 48 MHz
- sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
- au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
- /*
- * Route 48MHz FREQ2 into USB Host and/or Device
- */
-#ifdef CONFIG_USB_OHCI
- sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
-#endif
-#ifdef CONFIG_AU1X00_USB_DEVICE
- sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
-#endif
- au_writel(sys_clksrc, SYS_CLKSRC);
-
-
- pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
-#ifndef CONFIG_AU1X00_USB_DEVICE
- // 2nd USB port is USB host
- pin_func |= 0x8000;
-#endif
- au_writel(pin_func, SYS_PINFUNC);
-#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
-
-
-#ifdef CONFIG_USB_OHCI
- // enable host controller and wait for reset done
- au_writel(0x08, USB_HOST_CONFIG);
- udelay(1000);
- au_writel(0x0c, USB_HOST_CONFIG);
- udelay(1000);
- au_readl(USB_HOST_CONFIG);
- while (!(au_readl(USB_HOST_CONFIG) & 0x10))
- ;
- au_readl(USB_HOST_CONFIG);
-#endif
-
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
-#ifdef CONFIG_FB_E1356
- if ((argptr = strstr(argptr, "video=")) == NULL) {
- argptr = prom_getcmdline();
- strcat(argptr, " video=e1356fb:system:pb1500");
- }
-#elif defined (CONFIG_FB_XPERT98)
- if ((argptr = strstr(argptr, "video=")) == NULL) {
- argptr = prom_getcmdline();
- strcat(argptr, " video=atyfb:1024x768-8@70");
- }
-#endif // CONFIG_FB_E1356
-
-#ifndef CONFIG_SERIAL_AU1X00_CONSOLE
- /* don't touch the default serial console */
- au_writel(0, UART0_ADDR + UART_CLK);
-#endif
- au_writel(0, UART3_ADDR + UART_CLK);
-
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
-#endif
-
-#ifdef CONFIG_PCI
- // Setup PCI bus controller
- au_writel(0, Au1500_PCI_CMEM);
- au_writel(0x00003fff, Au1500_CFG_BASE);
-#if defined(__MIPSEB__)
- au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
-#else
- au_writel(0xf, Au1500_PCI_CFG);
-#endif
- au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
- au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
- au_writel(0x02a00356, Au1500_PCI_STATCMD);
- au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
- au_writel(0x00000008, Au1500_PCI_MBAR);
- au_sync();
-#endif
-
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
- au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
- au_sync();
- while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
- au_writel(0, SYS_TOYTRIM);
-
- /* Enable BCLK switching */
- au_writel(0x00000060, 0xb190003c);
-
-#ifdef CONFIG_RTC
- rtc_ops = &pb1500_rtc_ops;
- // Enable the RTC if not already enabled
- if (!(au_readl(0xac000028) & 0x20)) {
- printk("enabling clock ...\n");
- au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
- }
- // Put the clock in BCD mode
- if (readl(0xac00002C) & 0x4) { /* reg B */
- au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
- au_sync();
- }
-#endif
-}
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-static phys_t pb1500_fixup_bigphys_addr(phys_t phys_addr,
- phys_t size)
-{
- u32 pci_start = (u32)Au1500_PCI_MEM_START;
- u32 pci_end = (u32)Au1500_PCI_MEM_END;
-
- /* Don't fixup 36 bit addresses */
- if ((phys_addr >> 32) != 0) return phys_addr;
-
- /* check for pci memory window */
- if ((phys_addr >= pci_start) && ((phys_addr + size) < pci_end)) {
- return (phys_t)((phys_addr - pci_start) +
- Au1500_PCI_MEM_START);
- }
- else
- return phys_addr;
-}
-#endif
diff -puN /dev/null arch/mips/au1000/pb1550/board_setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/pb1550/board_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,67 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Alchemy Pb1550 board setup.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/mc146818rtc.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/keyboard.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/au1000.h>
+#include <asm/db1x00.h>
+
+extern struct rtc_ops no_rtc_ops;
+
+static BCSR * const bcsr = (BCSR *)0xB3000000;
+
+void __init board_setup(void)
+{
+ u32 pin_func;
+ rtc_ops = &no_rtc_ops;
+
+#ifdef CONFIG_AU1X00_USB_DEVICE
+ // 2nd USB port is USB device
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
+ au_writel(pin_func, SYS_PINFUNC);
+#endif
+
+ au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
+
+ printk("AMD Alchemy Pb1550 Board\n");
+}
diff -puN /dev/null arch/mips/au1000/pb1550/init.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/pb1550/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,73 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * PB1550 board setup
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <linux/config.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+extern void __init prom_init_cmdline(void);
+extern char *prom_getenv(char *envname);
+
+const char *get_system_type(void)
+{
+ return "AMD Alchemy PbAu1550";
+}
+
+int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+{
+ unsigned char *memsize_str;
+ unsigned long memsize;
+
+ prom_argc = argc;
+ prom_argv = argv;
+ prom_envp = envp;
+
+ mips_machgroup = MACH_GROUP_ALCHEMY;
+ mips_machtype = MACH_PB1000; /* set the platform # */
+ prom_init_cmdline();
+
+ memsize_str = prom_getenv("memsize");
+ if (!memsize_str) {
+ memsize = 0x04000000;
+ } else {
+ memsize = simple_strtol(memsize_str, NULL, 0);
+ }
+ add_memory_region(0, memsize, BOOT_MEM_RAM);
+ return 0;
+}
diff -puN /dev/null arch/mips/au1000/pb1550/irqmap.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/pb1550/irqmap.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,93 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Au1xxx irq map table
+ *
+ * Copyright 2003 Embedded Edge, LLC
+ * dan@embeddededge.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/au1000.h>
+
+au1xxx_irq_map_t au1xxx_irq_map[] = {
+ { AU1550_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
+ { AU1550_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
+ { AU1550_DDMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_CRYPTO_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
+ { AU1550_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
+ { AU1550_PCI_RST_INT, INTC_INT_LOW_LEVEL, 0 },
+ { AU1550_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_PSC0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_TOY_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1550_TOY_MATCH0_INT,INTC_INT_RISE_EDGE, 0 },
+ { AU1550_TOY_MATCH1_INT,INTC_INT_RISE_EDGE, 0 },
+ /* Careful if you change match 2 request!
+ * The interrupt handler is called directly
+ * from the low level dispatch code.
+ */
+ { AU1550_TOY_MATCH2_INT,INTC_INT_RISE_EDGE, 0 },
+ { AU1550_RTC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1550_RTC_MATCH0_INT,INTC_INT_RISE_EDGE, 0 },
+ { AU1550_RTC_MATCH1_INT,INTC_INT_RISE_EDGE, 0 },
+ { AU1550_RTC_MATCH2_INT,INTC_INT_RISE_EDGE, 0 },
+ { AU1550_RTC_MATCH2_INT,INTC_INT_RISE_EDGE, 0 },
+ { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1550_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1550_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
+ { AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+
+
+ /*
+ * Need to define platform dependant GPIO ints here
+ */
+ #warning PbAu1550 needs GPIO Interrupts defined
+
+};
+
+int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
diff -puN /dev/null arch/mips/au1000/pb1550/Makefile
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/pb1550/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,22 @@
+#
+# Copyright 2000 MontaVista Software Inc.
+# Author: MontaVista Software, Inc.
+# ppopov@mvista.com or source@mvista.com
+#
+# Makefile for the Alchemy Semiconductor PB1000 board.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+.S.s:
+ $(CPP) $(CFLAGS) $< -o $*.s
+.S.o:
+ $(CC) $(CFLAGS) -c $< -o $*.o
+
+O_TARGET := pb1550.o
+
+obj-y := init.o board_setup.o irqmap.o
+
+include $(TOPDIR)/Rules.make
diff -puN /dev/null arch/mips/au1000/xxs1500/board_setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/xxs1500/board_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,85 @@
+/*
+ * Copyright 2000-2003 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/keyboard.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/au1000.h>
+
+void __init board_setup(void)
+{
+ u32 pin_func;
+
+ // set multiple use pins (UART3/GPIO) to UART (it's used as UART too)
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~SYS_PF_UR3);
+ pin_func |= SYS_PF_UR3;
+ au_writel(pin_func, SYS_PINFUNC);
+
+ // enable UART
+ au_writel(0x01, UART3_ADDR+UART_MOD_CNTRL); // clock enable (CE)
+ mdelay(10);
+ au_writel(0x03, UART3_ADDR+UART_MOD_CNTRL); // CE and "enable"
+ mdelay(10);
+
+ // enable DTR = USB power up
+ au_writel(0x01, UART3_ADDR+UART_MCR); //? UART_MCR_DTR is 0x01???
+
+#ifdef CONFIG_PCMCIA_XXS1500
+ /* setup pcmcia signals */
+ au_writel(0, SYS_PININPUTEN);
+
+ /* gpio 0, 1, and 4 are inputs */
+ au_writel(1 | (1<<1) | (1<<4), SYS_TRIOUTCLR);
+
+ /* enable GPIO2 if not already enabled */
+ au_writel(1, GPIO2_ENABLE);
+ /* gpio2 208/9/10/11 are inputs */
+ au_writel((1<<8) | (1<<9) | (1<<10) | (1<<11), GPIO2_DIR);
+
+ /* turn off power */
+ au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<14))|(1<<30), GPIO2_OUTPUT);
+#endif
+
+
+#ifdef CONFIG_PCI
+#if defined(__MIPSEB__)
+ au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
+#else
+ au_writel(0xf, Au1500_PCI_CFG);
+#endif
+#endif
+}
diff -puN /dev/null arch/mips/au1000/xxs1500/init.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/xxs1500/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,68 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * XXS1500 board setup
+ *
+ * Copyright 2003 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+
+int prom_argc;
+char **prom_argv, **prom_envp;
+extern void __init prom_init_cmdline(void);
+extern char *prom_getenv(char *envname);
+
+const char *get_system_type(void)
+{
+ return "XXS1500";
+}
+
+void __init prom_init(void)
+{
+ unsigned char *memsize_str;
+ unsigned long memsize;
+
+ prom_argc = fw_arg0;
+ prom_argv = (char **) fw_arg1;
+ prom_envp = (char **) fw_arg2;
+
+ mips_machgroup = MACH_GROUP_ALCHEMY;
+ mips_machtype = MACH_XXS1500; /* set the platform # */
+
+ prom_init_cmdline();
+
+ memsize_str = prom_getenv("memsize");
+ if (!memsize_str)
+ memsize = 0x04000000;
+ else
+ memsize = simple_strtol(memsize_str, NULL, 0);
+ add_memory_region(0, memsize, BOOT_MEM_RAM);
+}
diff -puN /dev/null arch/mips/au1000/xxs1500/irqmap.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/xxs1500/irqmap.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,106 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Au1xxx irq map table
+ *
+ * Copyright 2003 Embedded Edge, LLC
+ * dan@embeddededge.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/delay.h>
+
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/au1000.h>
+
+au1xxx_irq_map_t au1xxx_irq_map[] = {
+ { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
+
+ { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
+ { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 },
+
+ { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_GPIO_2, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 },
+ { AU1000_GPIO_4, INTC_INT_LOW_LEVEL, 0 }, /* CF interrupt */
+ { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 },
+
+ { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_USB_DEV_REQ_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
+
+ /* Careful if you change match 2 request!
+ * The interrupt handler is called directly
+ * from the low level dispatch code.
+ */
+ { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
+};
+
+int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
diff -puN /dev/null arch/mips/au1000/xxs1500/Makefile
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/au1000/xxs1500/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,13 @@
+#
+# Copyright 2003 MontaVista Software Inc.
+# Author: MontaVista Software, Inc.
+# ppopov@mvista.com or source@mvista.com
+#
+# Makefile for MyCable XXS1500 board.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+lib-y := init.o board_setup.o irqmap.o
diff -puN arch/mips/baget/prom/init.c~mips-megapatch arch/mips/baget/prom/init.c
--- 25/arch/mips/baget/prom/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/baget/prom/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -7,17 +7,15 @@
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-char arcs_cmdline[CL_SIZE];
-
const char *get_system_type(void)
{
/* Should probably return one of "BT23-201", "BT23-202" */
return "Baget";
}
-void __init prom_init(unsigned int mem_upper)
+void __init prom_init(void)
{
- mem_upper = PHYSADDR(mem_upper);
+ mem_upper = PHYSADDR(fw_arg0);
mips_machgroup = MACH_GROUP_UNKNOWN;
mips_machtype = MACH_UNKNOWN;
@@ -28,6 +26,7 @@ void __init prom_init(unsigned int mem_u
add_memory_region(0, mem_upper, BOOT_MEM_RAM);
}
-void prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/baget/setup.c~mips-megapatch arch/mips/baget/setup.c
--- 25/arch/mips/baget/setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/baget/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -470,7 +470,7 @@ extern void baget_machine_restart(char *
extern void baget_machine_halt(void);
extern void baget_machine_power_off(void);
-void __init baget_setup(void)
+static void __init baget_setup(void)
{
printk("BT23/63-201n found.\n");
*BAGET_WRERR_ACK = 0;
@@ -485,3 +485,5 @@ void __init baget_setup(void)
vac_start();
vic_start();
}
+
+early_initcall(baget_setup);
diff -puN arch/mips/boot/Makefile~mips-megapatch arch/mips/boot/Makefile
--- 25/arch/mips/boot/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/boot/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -9,7 +9,7 @@
#
# Some DECstations need all possible sections of an ECOFF executable
#
-ifdef CONFIG_DECSTATION
+ifdef CONFIG_MACH_DECSTATION
E2EFLAGS = -a
else
E2EFLAGS =
@@ -19,33 +19,29 @@ endif
# Drop some uninteresting sections in the kernel.
# This is only relevant for ELF kernels but doesn't hurt a.out
#
-drop-sections = .reginfo .mdebug .comment .note
+drop-sections = .reginfo .mdebug .comment .note .pdr
strip-flags = $(addprefix --remove-section=,$(drop-sections))
-all: vmlinux.ecoff addinitrd
-
-vmlinux.rm200: vmlinux
- $(OBJCOPY) \
- --change-addresses=0xfffffffc \
- -O elf32-tradlittlemips \
- $(strip-flags) \
- $< $@
+all: vmlinux.ecoff vmlinux.srec addinitrd
vmlinux.ecoff: $(obj)/elf2ecoff vmlinux
- ./elf2ecoff vmlinux $(obj)/vmlinux.ecoff $(E2EFLAGS)
+ $(obj)/elf2ecoff vmlinux vmlinux.ecoff $(E2EFLAGS)
$(obj)/elf2ecoff: $(obj)/elf2ecoff.c
$(HOSTCC) -o $@ $^
+vmlinux.srec: vmlinux
+ $(OBJCOPY) -S -O srec $(strip-flags) vmlinux $(obj)/vmlinux.srec
+
$(obj)/addinitrd: $(obj)/addinitrd.c
$(HOSTCC) -o $@ $^
archhelp:
- @echo '* vmlinux.rm200 - Bootable kernel image for RM200C'
+ @echo '* vmlinux.ecoff - ECOFF boot image'
CLEAN_FILES += addinitrd \
elf2ecoff \
vmlinux.ecoff \
- vmlinux.rm200 \
+ vmlinux.srec \
zImage.tmp \
zImage
diff -puN arch/mips/cobalt/int-handler.S~mips-megapatch arch/mips/cobalt/int-handler.S
--- 25/arch/mips/cobalt/int-handler.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/cobalt/int-handler.S 2004-02-19 12:53:00.000000000 -0800
@@ -1,11 +1,9 @@
/*
- * Cobalt interrupt handler
- *
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
+ * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle
* Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
*/
#include <asm/asm.h>
@@ -14,91 +12,14 @@
#include <asm/regdef.h>
#include <asm/stackframe.h>
-/*
- * cobalt_handle_int: Interrupt handler for Cobalt boards
- */
.text
- .set noreorder
- .set noat
.align 5
NESTED(cobalt_handle_int, PT_SIZE, sp)
SAVE_ALL
CLI
- .set at
-
- /*
- * Get pending Interrupts
- */
- mfc0 s0,CP0_CAUSE # get raw irq status
- mfc0 a0,CP0_STATUS # get irq mask
- and s0,s0,a0 # compute masked irq status
-
- andi a0,s0,CAUSEF_IP2 /* Check for Galileo timer */
- beq a0,zero,1f
- andi a0,s0,CAUSEF_IP6 /* Check for Via chip */
-
- /* Galileo interrupt */
- jal galileo_irq
- move a0,sp
- j ret_from_irq
- nop
-
-1:
- beq a0,zero,1f /* Check IP6 */
- andi a0,s0,CAUSEF_IP3
-
- /* Via interrupt */
- jal via_irq
- move a0,sp
- j ret_from_irq
- nop
-
-1:
- beq a0,zero,1f /* Check IP3 */
- andi a0,s0,CAUSEF_IP4
- /* Ethernet 0 interrupt */
- li a0,COBALT_ETH0_IRQ
- jal do_IRQ
- move a1,sp
-
- j ret_from_irq
- nop
-
-1:
- beq a0,zero,1f /* Check IP4 */
- andi a0,s0,CAUSEF_IP5
-
- /* Ethernet 1 interrupt */
- li a0,COBALT_ETH1_IRQ
- jal do_IRQ
- move a1,sp
-
- j ret_from_irq
- nop
-1:
- beq a0,zero,1f /* Check IP5 */
- andi a0,s0,CAUSEF_IP7
-
- /* Serial interrupt */
- li a0,COBALT_SERIAL_IRQ
- jal do_IRQ
- move a1,sp
-
- j ret_from_irq
- nop
-1:
- beq a0,zero,1f /* Check IP7 */
- nop
-
- /* PCI interrupt */
- li a0,COBALT_QUBE_SLOT_IRQ
- jal do_IRQ
- move a1,sp
-
-1:
- j ret_from_irq
- nop
+ la ra, ret_from_irq
+ move a1, sp
+ j cobalt_irq
END(cobalt_handle_int)
-
diff -puN arch/mips/cobalt/irq.c~mips-megapatch arch/mips/cobalt/irq.c
--- 25/arch/mips/cobalt/irq.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/cobalt/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -5,139 +5,98 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
- * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv)
- *
+ * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle
*/
-
#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
+#include <linux/irq.h>
-#include <asm/bootinfo.h>
#include <asm/i8259.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
+#include <asm/irq_cpu.h>
+#include <asm/gt64120.h>
+#include <asm/ptrace.h>
#include <asm/cobalt/cobalt.h>
-/* Cobalt Exception handler */
extern void cobalt_handle_int(void);
-/* Via masking routines */
-extern void unmask_irq(unsigned int irqr);
-extern void mask_irq(unsigned int irq);
-
-
/*
- * We have two types of interrupts that we handle, ones that come
- * in through the CPU interrupt lines, and ones that come in on
- * the via chip. The CPU mappings are:
- * 0,1 - S/W (ignored)
- * 2 - Galileo chip (timer)
- * 3 - Tulip 0 + NCR SCSI
- * 4 - Tulip 1
- * 5 - 16550 UART
- * 6 - VIA southbridge PIC
- * 7 - unused
+ * We have two types of interrupts that we handle, ones that come in through
+ * the CPU interrupt lines, and ones that come in on the via chip. The CPU
+ * mappings are:
*
- * The VIA chip is a master/slave 8259 setup and has the
- * following interrupts
- * 8 - RTC
- * 9 - PCI
- * 14 - IDE0
- * 15 - IDE1
+ * 16, - Software interrupt 0 (unused) IE_SW0
+ * 17 - Software interrupt 1 (unused) IE_SW0
+ * 18 - Galileo chip (timer) IE_IRQ0
+ * 19 - Tulip 0 + NCR SCSI IE_IRQ1
+ * 20 - Tulip 1 IE_IRQ2
+ * 21 - 16550 UART IE_IRQ3
+ * 22 - VIA southbridge PIC IE_IRQ4
+ * 23 - unused IE_IRQ5
*
- * In the table we use a 1 to indicate that we use a VIA interrupt
- * line, and IE_IRQx to indicate that we use a CPU interrupt line
+ * The VIA chip is a master/slave 8259 setup and has the following interrupts:
*
- * We map all of these onto linux IRQ #s 0-15 and forget the rest
- */
-#define NOINT_LINE 0
-#define CPUINT_LINE(x) IE_IRQ##x
-#define VIAINT_LINE 1
-
-#define COBALT_IRQS 16
-
-static unsigned short irqnr_to_type[COBALT_IRQS] =
-{ CPUINT_LINE(0), NOINT_LINE, VIAINT_LINE, NOINT_LINE,
- CPUINT_LINE(1), NOINT_LINE, NOINT_LINE, CPUINT_LINE(3),
- VIAINT_LINE, VIAINT_LINE, NOINT_LINE, NOINT_LINE,
- NOINT_LINE, CPUINT_LINE(2), VIAINT_LINE, VIAINT_LINE };
-
-/*
- * Cobalt CPU irq
+ * 8 - RTC
+ * 9 - PCI
+ * 14 - IDE0
+ * 15 - IDE1
*/
-static void enable_cpu_irq(unsigned int irq)
+asmlinkage void cobalt_irq(struct pt_regs *regs)
{
- unsigned long flags;
+ unsigned int pending = read_c0_status() & read_c0_cause();
- local_irq_save(flags);
- change_c0_status(irqnr_to_type[irq], irqnr_to_type[irq]);
- local_irq_restore(flags);
-}
+ if (pending & CAUSEF_IP2) { /* int 18 */
+ unsigned long irq_src = GALILEO_INL(GT_INTRCAUSE_OFS);
-static unsigned startup_cpu_irq(unsigned int irq)
-{
- enable_cpu_irq(irq);
+ /* Check for timer irq ... */
+ if (irq_src & GALILEO_T0EXP) {
+ /* Clear the int line */
+ GALILEO_OUTL(0, GT_INTRCAUSE_OFS);
+ do_IRQ(COBALT_TIMER_IRQ, regs);
+ }
+ return;
+ }
- return 0;
-}
+ if (pending & CAUSEF_IP6) { /* int 22 */
+ int irq = i8259_irq();
-static void disable_cpu_irq(unsigned int irq)
-{
- unsigned long flags;
+ if (irq >= 0)
+ do_IRQ(irq, regs);
+ return;
+ }
- local_irq_save(flags);
- change_c0_status(irqnr_to_type[irq], ~(irqnr_to_type[irq]));
- local_irq_restore(flags);
-}
+ if (pending & CAUSEF_IP3) { /* int 19 */
+ do_IRQ(COBALT_ETH0_IRQ, regs);
+ return;
+ }
-#define shutdown_cpu_irq disable_cpu_irq
-#define mask_and_ack_cpu_irq disable_cpu_irq
+ if (pending & CAUSEF_IP4) { /* int 20 */
+ do_IRQ(COBALT_ETH1_IRQ, regs);
+ return;
+ }
-static void end_cpu_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_cpu_irq(irq);
-}
+ if (pending & CAUSEF_IP5) { /* int 21 */
+ do_IRQ(COBALT_SERIAL_IRQ, regs);
+ return;
+ }
-static struct hw_interrupt_type cobalt_cpu_irq_type = {
- "Cobalt CPU",
- startup_cpu_irq,
- shutdown_cpu_irq,
- enable_cpu_irq,
- disable_cpu_irq,
- mask_and_ack_cpu_irq,
- end_cpu_irq,
- NULL
-};
+ if (pending & CAUSEF_IP7) { /* int 23 */
+ do_IRQ(COBALT_QUBE_SLOT_IRQ, regs);
+ return;
+ }
+}
void __init init_IRQ(void)
{
- int i;
-
- /* Initialise all of the IRQ descriptors */
- init_i8259_irqs();
-
- /* Map the irqnr to the type int we have */
- for (i=0; i < COBALT_IRQS; i++) {
- if (irqnr_to_type[i] >= CPUINT_LINE(0))
- /* cobalt_cpu_irq_type */
- irq_desc[i].handler = &cobalt_cpu_irq_type;
- }
-
- /* Mask all cpu interrupts
- (except IE4, we already masked those at VIA level) */
- clear_c0_status(ST0_IM);
- set_c0_status(IE_IRQ4);
+ set_except_vector(0, cobalt_handle_int);
- cli();
+ init_i8259_irqs(); /* 0 ... 15 */
+ mips_cpu_irq_init(16); /* 16 ... 23 */
- set_except_vector(0, cobalt_handle_int);
+ /*
+ * Mask all cpu interrupts
+ * (except IE4, we already masked those at VIA level)
+ */
+ change_c0_status(ST0_IM, IE_IRQ4);
}
diff -puN arch/mips/cobalt/Makefile~mips-megapatch arch/mips/cobalt/Makefile
--- 25/arch/mips/cobalt/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/cobalt/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,6 +2,6 @@
# Makefile for the Cobalt micro systems family specific parts of the kernel
#
-obj-y := irq.o int-handler.o reset.o setup.o via.o promcon.o
+obj-y := irq.o int-handler.o reset.o setup.o promcon.o
EXTRA_AFLAGS := $(CFLAGS)
diff -puN arch/mips/cobalt/promcon.c~mips-megapatch arch/mips/cobalt/promcon.c
--- 25/arch/mips/cobalt/promcon.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/cobalt/promcon.c 2004-02-19 12:53:00.000000000 -0800
@@ -13,7 +13,6 @@
#include <linux/init.h>
#include <linux/console.h>
#include <linux/kdev_t.h>
-#include <linux/major.h>
#include <linux/serial_reg.h>
#include <asm/delay.h>
@@ -70,22 +69,19 @@ void putDebugChar(char kgdb_char)
ns16550_cons_put_char(kgdb_char, port);
}
-static kdev_t
-ns16550_console_dev(struct console *c)
-{
- return mk_kdev(TTY_MAJOR, 64 + c->index);
-}
-
static struct console ns16550_console = {
.name = "prom",
.setup = NULL,
.write = ns16550_console_write,
- .device = ns16550_console_dev,
.flags = CON_PRINTBUFFER,
.index = -1,
};
-void __init ns16550_setup_console(void)
+static int __init ns16550_setup_console(void)
{
register_console(&ns16550_console);
+
+ return 0;
}
+
+console_initcall(ns16550_setup_console);
diff -puN arch/mips/cobalt/setup.c~mips-megapatch arch/mips/cobalt/setup.c
--- 25/arch/mips/cobalt/setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/cobalt/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -9,15 +9,13 @@
* Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
*
*/
-
#include <linux/config.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
-#include <linux/mc146818rtc.h>
#include <linux/init.h>
-#include <linux/ide.h>
#include <asm/bootinfo.h>
+#include <asm/pci_channel.h>
#include <asm/time.h>
#include <asm/io.h>
#include <asm/irq.h>
@@ -31,11 +29,9 @@ extern void cobalt_machine_restart(char
extern void cobalt_machine_halt(void);
extern void cobalt_machine_power_off(void);
-extern struct rtc_ops std_rtc_ops;
-extern struct ide_ops std_ide_ops;
-
+int cobalt_board_id;
-char arcs_cmdline[CL_SIZE] = {
+static char my_cmdline[CL_SIZE] = {
"console=ttyS0,115200 "
#ifdef CONFIG_IP_PNP
"ip=on "
@@ -52,12 +48,6 @@ const char *get_system_type(void)
return "MIPS Cobalt";
}
-
-static void __init cobalt_time_init(void)
-{
- rtc_ops = &std_rtc_ops;
-}
-
static void __init cobalt_timer_setup(struct irqaction *irq)
{
/* Load timer value for 150 Hz */
@@ -72,22 +62,46 @@ static void __init cobalt_timer_setup(st
GALILEO_OUTL(0x100, GT_INTRMASK_OFS);
}
+extern struct pci_ops gt64111_pci_ops;
+
+static struct resource cobalt_mem_resource = {
+ "GT64111 PCI MEM", GT64111_IO_BASE, 0xffffffffUL, IORESOURCE_MEM
+};
+
+static struct resource cobalt_io_resource = {
+ "GT64111 IO MEM", 0x00001000UL, 0x0fffffffUL, IORESOURCE_IO
+};
+
+static struct resource cobalt_io_resources[] = {
+ { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
+ { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
+ { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
+ { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
+ { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
+};
+
+#define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource))
+
+static struct pci_controller cobalt_pci_controller = {
+ .pci_ops = >64111_pci_ops,
+ .mem_resource = &cobalt_mem_resource,
+ .mem_offset = 0,
+ .io_resource = &cobalt_io_resource,
+ .io_offset = 0x00001000UL - GT64111_IO_BASE
+};
-void __init cobalt_setup(void)
+static void __init cobalt_setup(void)
{
+ unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
+ int i;
_machine_restart = cobalt_machine_restart;
_machine_halt = cobalt_machine_halt;
_machine_power_off = cobalt_machine_power_off;
- board_time_init = cobalt_time_init;
board_timer_setup = cobalt_timer_setup;
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
-#endif
-
- set_io_port_base(KSEG1ADDR(0x10000000));
+ set_io_port_base(KSEG1ADDR(GT64111_IO_BASE));
/*
* This is a prom style console. We just poke at the
@@ -96,18 +110,42 @@ void __init cobalt_setup(void)
* get to the stage of setting up a real serial console.
*/
/*ns16550_setup_console();*/
+
+ /* request I/O space for devices used on all i[345]86 PCs */
+ for (i = 0; i < COBALT_IO_RESOURCES; i++)
+ request_resource(&ioport_resource, cobalt_io_resources + i);
+
+ /* Read the cobalt id register out of the PCI config space */
+ PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
+ cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
+ cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
+ cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
+
+#ifdef CONFIG_PCI
+ register_pci_controller(&cobalt_pci_controller);
+#endif
}
-/* Prom init. We read our one and only communication with the
- firmware. Grab the amount of installed memory */
-void __init prom_init(int argc)
+early_initcall(cobalt_setup);
+
+/*
+ * Prom init. We read our one and only communication with the firmware.
+ * Grab the amount of installed memory
+ */
+
+void __init prom_init(void)
{
+ int argc = fw_arg0;
+
+ strcpy(arcs_cmdline, my_cmdline);
+
mips_machgroup = MACH_GROUP_COBALT;
add_memory_region(0x0, argc & 0x7fffffff, BOOT_MEM_RAM);
}
-void __init prom_free_prom_memory(void)
+unsigned long __init prom_free_prom_memory(void)
{
/* Nothing to do! */
+ return 0;
}
diff -puN -L arch/mips/cobalt/via.c arch/mips/cobalt/via.c~mips-megapatch /dev/null
--- 25/arch/mips/cobalt/via.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,67 +0,0 @@
-/*
- * VIA chipset irq handling
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997 by Ralf Baechle
- * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
- *
- */
-
-#include <linux/irq.h>
-#include <linux/kernel.h>
-
-#include <asm/gt64120.h>
-#include <asm/ptrace.h>
-#include <asm/io.h>
-
-#include <asm/cobalt/cobalt.h>
-
-asmlinkage void via_irq(struct pt_regs *regs)
-{
- char mstat, sstat;
-
- /* Read Master Status */
- outb(0x0C, 0x20);
- mstat = inb(0x20);
-
- if (mstat < 0) {
- mstat &= 0x7f;
- if (mstat != 2) {
- do_IRQ(mstat, regs);
- outb(mstat | 0x20, 0x20);
- } else {
- sstat = inb(0xA0);
-
- /* Slave interrupt */
- outb(0x0C, 0xA0);
- sstat = inb(0xA0);
-
- if (sstat < 0) {
- do_IRQ((sstat + 8) & 0x7f, regs);
- outb(0x22, 0x20);
- outb((sstat & 0x7f) | 0x20, 0xA0);
- } else {
- printk("Spurious slave interrupt...\n");
- }
- }
- } else
- printk("Spurious master interrupt...");
-}
-
-asmlinkage void galileo_irq(struct pt_regs *regs)
-{
- unsigned long irq_src;
-
- irq_src = GALILEO_INL(GT_INTRCAUSE_OFS);
-
- /* Check for timer irq ... */
- if (irq_src & GALILEO_T0EXP) {
- /* Clear the int line */
- GALILEO_OUTL(0, GT_INTRCAUSE_OFS);
- do_IRQ(COBALT_TIMER_IRQ, regs);
- } else
- printk("Spurious Galileo interrupt...\n");
-}
diff -puN /dev/null arch/mips/configs/atlas_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/atlas_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,659 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+CONFIG_MIPS_ATLAS=y
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_MIPS_BONITO64=y
+CONFIG_MIPS_MSC=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_MIPS_BOARDS_GEN=y
+CONFIG_MIPS_GT64120=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_BINFMT_IRIX is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_REPORT_LUNS is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+CONFIG_SCSI_QLA2XXX=y
+# CONFIG_SCSI_QLA21XX is not set
+# CONFIG_SCSI_QLA22XX is not set
+# CONFIG_SCSI_QLA2300 is not set
+# CONFIG_SCSI_QLA2322 is not set
+# CONFIG_SCSI_QLA6312 is not set
+# CONFIG_SCSI_QLA6322 is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/bosporus_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/bosporus_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,673 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_TCIC is not set
+
+#
+# PCI Hotplug Support
+#
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/capcella_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/capcella_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,640 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_CASIO_E55 is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_VICTOR_MPC30X is not set
+CONFIG_ZAO_CAPCELLA=y
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_DUMMY_KEYB=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+CONFIG_CPU_VR41XX=y
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEPCI is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/cobalt_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/cobalt_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,617 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+CONFIG_MIPS_COBALT=y
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_I8259=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_MIPS_GT64111=y
+CONFIG_COBALT_LCD=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+CONFIG_CPU_NEVADA=y
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEPCI is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=16
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/db1000_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/db1000_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,696 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+CONFIG_SOC_AU1X00=y
+CONFIG_SOC_AU1000=y
+# CONFIG_SOC_AU1100 is not set
+# CONFIG_SOC_AU1500 is not set
+# CONFIG_MIPS_PB1000 is not set
+# CONFIG_MIPS_PB1100 is not set
+# CONFIG_MIPS_PB1500 is not set
+CONFIG_MIPS_DB1000=y
+# CONFIG_MIPS_DB1100 is not set
+# CONFIG_MIPS_DB1500 is not set
+# CONFIG_MIPS_BOSPORUS is not set
+# CONFIG_MIPS_MIRAGE is not set
+# CONFIG_MIPS_XXS1500 is not set
+# CONFIG_MIPS_MTX1 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+CONFIG_64BIT_PHYS_ADDR=y
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_PCI is not set
+CONFIG_MMU=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_TCIC is not set
+# CONFIG_PCMCIA_AU1X00 is not set
+
+#
+# PCI Hotplug Support
+#
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MIPS_AU1X00_ENET=y
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_AU1X00_GPIO is not set
+# CONFIG_TS_AU1X00_ADS7846 is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_AU1X00=y
+CONFIG_SERIAL_AU1X00_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/db1100_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/db1100_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,692 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+CONFIG_SOC_AU1X00=y
+# CONFIG_SOC_AU1000 is not set
+CONFIG_SOC_AU1100=y
+# CONFIG_SOC_AU1500 is not set
+# CONFIG_MIPS_PB1000 is not set
+# CONFIG_MIPS_PB1100 is not set
+# CONFIG_MIPS_PB1500 is not set
+# CONFIG_MIPS_DB1000 is not set
+CONFIG_MIPS_DB1100=y
+# CONFIG_MIPS_DB1500 is not set
+# CONFIG_MIPS_BOSPORUS is not set
+# CONFIG_MIPS_MIRAGE is not set
+# CONFIG_MIPS_XXS1500 is not set
+# CONFIG_MIPS_MTX1 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_TCIC is not set
+# CONFIG_PCMCIA_AU1X00 is not set
+
+#
+# PCI Hotplug Support
+#
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_MIPS_AU1X00_ENET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_AU1X00_GPIO is not set
+# CONFIG_TS_AU1X00_ADS7846 is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_AU1X00 is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/db1500_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/db1500_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,769 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+CONFIG_SOC_AU1X00=y
+# CONFIG_SOC_AU1000 is not set
+# CONFIG_SOC_AU1100 is not set
+CONFIG_SOC_AU1500=y
+# CONFIG_MIPS_PB1000 is not set
+# CONFIG_MIPS_PB1100 is not set
+# CONFIG_MIPS_PB1500 is not set
+# CONFIG_MIPS_DB1000 is not set
+# CONFIG_MIPS_DB1100 is not set
+CONFIG_MIPS_DB1500=y
+# CONFIG_MIPS_BOSPORUS is not set
+# CONFIG_MIPS_MIRAGE is not set
+# CONFIG_MIPS_XXS1500 is not set
+# CONFIG_MIPS_MTX1 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+CONFIG_64BIT_PHYS_ADDR=y
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_PCI is not set
+CONFIG_MMU=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_TCIC is not set
+# CONFIG_PCMCIA_AU1X00 is not set
+
+#
+# PCI Hotplug Support
+#
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_DB1X00=y
+CONFIG_MTD_DB1X00_BOOT=y
+CONFIG_MTD_DB1X00_USER=y
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+CONFIG_BLK_DEV_IDECS=m
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+# CONFIG_IDE_TASKFILE_IO is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MIPS_AU1X00_ENET=y
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_AU1X00_GPIO is not set
+# CONFIG_TS_AU1X00_ADS7846 is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_AU1X00=y
+CONFIG_SERIAL_AU1X00_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/ddb5476_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/ddb5476_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,639 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+CONFIG_DDB5476=y
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_I8259=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_DDB5XXX_COMMON=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_FB=y
+CONFIG_HAVE_STD_PC_SERIAL_PORT=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+CONFIG_CPU_R5432=y
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEPCI is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON_OLD is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_E1356 is not set
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+
+#
+# Logo configuration
+#
+# CONFIG_LOGO is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE="ip=any"
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/ddb5477_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/ddb5477_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,616 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+CONFIG_DDB5477=y
+CONFIG_DDB5477_BUS_FREQUENCY=0
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_I8259=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_DUMMY_KEYB=y
+CONFIG_DDB5XXX_COMMON=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+CONFIG_CPU_R5432=y
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_PCI=y
+CONFIG_PCNET32=y
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_DGRS is not set
+# CONFIG_EEPRO100 is not set
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_LAN_SAA9730 is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE="ip=any"
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
diff -puN /dev/null arch/mips/configs/decstation_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/decstation_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,598 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+CONFIG_MACH_DECSTATION=y
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=4
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+CONFIG_CPU_R3000=y
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_WB=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_TC=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_REPORT_LUNS is not set
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+CONFIG_SCSI_DECNCR=y
+# CONFIG_SCSI_DECSII is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_DECLANCE=y
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_DZ=y
+CONFIG_SERIAL_DZ_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_EXPORTFS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+CONFIG_OSF_PARTITION=y
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_NEC98_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+CONFIG_ULTRIX_PARTITION=y
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
diff -puN /dev/null arch/mips/configs/e55_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/e55_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,589 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+CONFIG_MACH_VR41XX=y
+CONFIG_CASIO_E55=y
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_DUMMY_KEYB=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+CONFIG_CPU_VR41XX=y
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/eagle_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/eagle_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,759 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_CASIO_E55 is not set
+# CONFIG_IBM_WORKPAD is not set
+CONFIG_NEC_EAGLE=y
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_DUMMY_KEYB=y
+CONFIG_VRC4173=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+CONFIG_CPU_VR41XX=y
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=y
+# CONFIG_YENTA is not set
+# CONFIG_I82092 is not set
+# CONFIG_TCIC is not set
+# CONFIG_PCMCIA_VRC4173 is not set
+
+#
+# PCI Hotplug Support
+#
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_PARTITIONS is not set
+# CONFIG_MTD_CONCAT is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x1c000000
+CONFIG_MTD_PHYSMAP_LEN=0x2000000
+CONFIG_MTD_PHYSMAP_BUSWIDTH=4
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+CONFIG_IDEDISK_MULTI_MODE=y
+# CONFIG_IDEDISK_STROKE is not set
+CONFIG_BLK_DEV_IDECS=y
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEPCI is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+# CONFIG_PCMCIA_3C589 is not set
+# CONFIG_PCMCIA_3C574 is not set
+CONFIG_PCMCIA_FMVJ18X=y
+CONFIG_PCMCIA_PCNET=m
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_CS is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS_FS=y
+CONFIG_JFFS_FS_VERBOSE=0
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_NAND is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/ev64120_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/ev64120_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,608 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+# CONFIG_KMOD is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+CONFIG_MIPS_EV64120=y
+# CONFIG_EVB_PCI1 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_MIPS_GT64120=y
+# CONFIG_SYSCLK_75 is not set
+# CONFIG_SYSCLK_83 is not set
+CONFIG_SYSCLK_100=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_BINFMT_IRIX is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PPP=y
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=y
+# CONFIG_PPP_SYNC_TTY is not set
+# CONFIG_PPP_DEFLATE is not set
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPPOE is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs rw nfsroot=192.168.1.1:/mnt/disk2/fs.gal ip=192.168.1.211:192.168.1.1:::gt::"
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/ev96100_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/ev96100_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,564 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+# CONFIG_KMOD is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+CONFIG_MIPS_EV96100=y
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_IRQ_CPU=y
+CONFIG_MIPS_GT64120=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_MIPS_GT96100=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+CONFIG_BOARD_SCACHE=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+CONFIG_CPU_RM7000=y
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_PCI is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_BINFMT_IRIX is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MIPS_GT96100ETH=y
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/hp-lj_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/hp-lj_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,650 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+CONFIG_HP_LASERJET=y
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_PCI is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+CONFIG_MTD_DEBUG=y
+CONFIG_MTD_DEBUG_VERBOSE=3
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x10040000
+CONFIG_MTD_PHYSMAP_LEN=0x00fc0000
+CONFIG_MTD_PHYSMAP_BUSWIDTH=4
+# CONFIG_MTD_CSTM_MIPS_IXX is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+CONFIG_MTD_NAND_IDS=y
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+CONFIG_NET_RADIO=y
+
+#
+# Obsolete Wireless cards support (pre-802.11)
+#
+# CONFIG_STRIP is not set
+# CONFIG_ATMEL is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=3
+# CONFIG_JFFS2_FS_NAND is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/ip22_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/ip22_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,861 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+CONFIG_SGI_IP22=y
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_ARC=y
+CONFIG_DMA_NONCOHERENT=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_IRQ_CPU=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_ARC32=y
+# CONFIG_FB is not set
+CONFIG_ARC_CONSOLE=y
+CONFIG_ARC_PROMLIB=y
+CONFIG_BOARD_SCACHE=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_R5000_CPU_SCACHE=y
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_ISA is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=m
+CONFIG_TRAD_SIGNALS=y
+CONFIG_BINFMT_IRIX=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_REPORT_LUNS is not set
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+CONFIG_SGIWD93_SCSI=y
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_INET_ECN=y
+# CONFIG_SYN_COOKIES is not set
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+
+#
+# IP: Virtual Server Configuration
+#
+CONFIG_IP_VS=m
+# CONFIG_IP_VS_DEBUG is not set
+CONFIG_IP_VS_TAB_BITS=12
+
+#
+# IPVS transport protocol load balancing support
+#
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_PROTO_ESP=y
+CONFIG_IP_VS_PROTO_AH=y
+
+#
+# IPVS scheduler
+#
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_WLC=m
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_NQ=m
+
+#
+# IPVS application helper
+#
+CONFIG_IP_VS_FTP=m
+CONFIG_IPV6=m
+CONFIG_IPV6_PRIVACY=y
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_TUNNEL=m
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_CONNTRACK=m
+CONFIG_IP_NF_FTP=m
+CONFIG_IP_NF_IRC=m
+CONFIG_IP_NF_TFTP=m
+CONFIG_IP_NF_AMANDA=m
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_LIMIT=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_MAC=m
+CONFIG_IP_NF_MATCH_PKTTYPE=m
+CONFIG_IP_NF_MATCH_MARK=m
+CONFIG_IP_NF_MATCH_MULTIPORT=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_DSCP=m
+CONFIG_IP_NF_MATCH_AH_ESP=m
+CONFIG_IP_NF_MATCH_LENGTH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_TCPMSS=m
+CONFIG_IP_NF_MATCH_HELPER=m
+CONFIG_IP_NF_MATCH_STATE=m
+CONFIG_IP_NF_MATCH_CONNTRACK=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_IP_NF_NAT_LOCAL=y
+CONFIG_IP_NF_NAT_SNMP_BASIC=m
+CONFIG_IP_NF_NAT_IRC=m
+CONFIG_IP_NF_NAT_FTP=m
+CONFIG_IP_NF_NAT_TFTP=m
+CONFIG_IP_NF_NAT_AMANDA=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_DSCP=m
+CONFIG_IP_NF_TARGET_MARK=m
+CONFIG_IP_NF_TARGET_CLASSIFY=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_TARGET_TCPMSS=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+CONFIG_IP_NF_COMPAT_IPCHAINS=m
+CONFIG_IP_NF_COMPAT_IPFWADM=m
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_LIMIT=m
+CONFIG_IP6_NF_MATCH_MAC=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_MULTIPORT=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_MARK=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AHESP=m
+CONFIG_IP6_NF_MATCH_LENGTH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_MARK=m
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=m
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+CONFIG_NET_DIVERT=y
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_CSZ=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_QOS=y
+CONFIG_NET_ESTIMATOR=y
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_CLS_POLICE=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+CONFIG_EQUALIZER=m
+CONFIG_TUN=m
+CONFIG_ETHERTAP=m
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_SGISEEQ=y
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_IP22_ZILOG=m
+CONFIG_SERIAL_CORE=m
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_INDYDOG=m
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+CONFIG_SGI_DS1286=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+CONFIG_RAW_DRIVER=m
+CONFIG_MAX_RAW_DEVS=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_SGI_NEWPORT_CONSOLE=y
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FONT_8x16=y
+
+#
+# Logo configuration
+#
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+CONFIG_LOGO_SGI_CLUT224=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_RT is not set
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_SECURITY=y
+# CONFIG_XFS_POSIX_ACL is not set
+CONFIG_MINIX_FS=m
+# CONFIG_ROMFS_FS is not set
+CONFIG_QUOTA=y
+# CONFIG_QFMT_V1 is not set
+CONFIG_QFMT_V2=m
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_ZISOFS_FS=m
+CONFIG_UDF_FS=m
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+CONFIG_EFS_FS=m
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+CONFIG_UFS_FS=m
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V4 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=m
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_NEC98_PARTITION is not set
+CONFIG_SGI_PARTITION=y
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_BLOWFISH=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_SERPENT=y
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/ip27_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/ip27_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,665 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+CONFIG_MIPS64=y
+CONFIG_64BIT=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+CONFIG_SGI_IP27=y
+# CONFIG_SGI_SN0_N_MODE is not set
+CONFIG_DISCONTIGMEM=y
+# CONFIG_NUMA is not set
+# CONFIG_MAPPED_KERNEL is not set
+# CONFIG_REPLICATE_KTEXT is not set
+# CONFIG_REPLICATE_EXHANDLERS is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_ARC=y
+CONFIG_DMA_IP27=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=7
+# CONFIG_FB is not set
+CONFIG_ARC64=y
+CONFIG_BOOT_ELF64=y
+CONFIG_QL_ISP_A64=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+CONFIG_CPU_R10000=y
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_MIPS_INSANE_LARGE is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_MIPS32_COMPAT=y
+CONFIG_COMPAT=y
+CONFIG_MIPS32_O32=y
+# CONFIG_MIPS32_N32 is not set
+CONFIG_BINFMT_ELF32=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_REPORT_LUNS is not set
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+CONFIG_SCSI_QLOGIC_ISP=y
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+CONFIG_SCSI_QLA2XXX=y
+# CONFIG_SCSI_QLA21XX is not set
+# CONFIG_SCSI_QLA22XX is not set
+# CONFIG_SCSI_QLA2300 is not set
+# CONFIG_SCSI_QLA2322 is not set
+# CONFIG_SCSI_QLA6312 is not set
+# CONFIG_SCSI_QLA6322 is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_SGI_IOC3_ETH=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Userland interfaces
+#
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_MULTIPORT is not set
+# CONFIG_SERIAL_8250_RSA is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+CONFIG_SGI_IP27_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+CONFIG_JBD_DEBUG=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_NEC98_PARTITION is not set
+CONFIG_SGI_PARTITION=y
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
diff -puN /dev/null arch/mips/configs/ip32_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/ip32_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,671 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+CONFIG_MIPS64=y
+CONFIG_64BIT=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+CONFIG_SGI_IP32=y
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_ARC=y
+CONFIG_DMA_NONCOHERENT=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_ARC32=y
+# CONFIG_FB is not set
+CONFIG_ARC_MEMORY=y
+CONFIG_ARC_PROMLIB=y
+CONFIG_BOARD_SCACHE=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_R5000_CPU_SCACHE=y
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=y
+CONFIG_MIPS32_COMPAT=y
+CONFIG_COMPAT=y
+CONFIG_MIPS32_O32=y
+# CONFIG_MIPS32_N32 is not set
+CONFIG_BINFMT_ELF32=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+CONFIG_CHR_DEV_OSST=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_CHR_DEV_SG=y
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_REPORT_LUNS is not set
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+CONFIG_SCSI_AIC7XXX=y
+CONFIG_AIC7XXX_CMDS_PER_DEVICE=8
+CONFIG_AIC7XXX_RESET_DELAY_MS=15000
+# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
+CONFIG_AIC7XXX_DEBUG_ENABLE=y
+CONFIG_AIC7XXX_DEBUG_MASK=0
+CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+CONFIG_SCSI_QLA2XXX=y
+# CONFIG_SCSI_QLA21XX is not set
+# CONFIG_SCSI_QLA22XX is not set
+# CONFIG_SCSI_QLA2300 is not set
+# CONFIG_SCSI_QLA2322 is not set
+# CONFIG_SCSI_QLA6312 is not set
+# CONFIG_SCSI_QLA6322 is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_SGI_O2MACE_ETH=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+# CONFIG_SERIO_MACEPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_NEC98_PARTITION is not set
+CONFIG_SGI_PARTITION=y
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/it8172_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/it8172_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,667 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+CONFIG_MIPS_ITE8172=y
+# CONFIG_IT8172_REVC is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_ITE_BOARD_GEN=y
+CONFIG_IT8172_CIR=y
+CONFIG_IT8712=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+CONFIG_CPU_NEVADA=y
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_PCI is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_PARTITIONS is not set
+# CONFIG_MTD_CONCAT is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x8000000
+CONFIG_MTD_PHYSMAP_LEN=0x2000000
+CONFIG_MTD_PHYSMAP_BUSWIDTH=4
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_QTRONIX_KEYBOARD is not set
+# CONFIG_IT8172_SCR0 is not set
+# CONFIG_IT8172_SCR1 is not set
+# CONFIG_ITE_GPIO is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+# CONFIG_SND is not set
+
+#
+# Open Sound System
+#
+CONFIG_SOUND_PRIME=y
+# CONFIG_SOUND_BT878 is not set
+# CONFIG_SOUND_FUSION is not set
+# CONFIG_SOUND_CS4281 is not set
+# CONFIG_SOUND_ESSSOLO1 is not set
+# CONFIG_SOUND_MAESTRO is not set
+# CONFIG_SOUND_SONICVIBES is not set
+CONFIG_SOUND_IT8172=y
+# CONFIG_SOUND_TRIDENT is not set
+# CONFIG_SOUND_MSNDCLAS is not set
+# CONFIG_SOUND_MSNDPIN is not set
+# CONFIG_SOUND_OSS is not set
+# CONFIG_SOUND_AD1980 is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/ivr_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/ivr_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,621 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+CONFIG_MIPS_IVR=y
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_ITE_BOARD_GEN=y
+CONFIG_IT8172_CIR=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+CONFIG_CPU_NEVADA=y
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEPCI is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_QTRONIX_KEYBOARD=y
+# CONFIG_IT8172_SCR0 is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/jaguar-atx_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/jaguar-atx_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,540 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+CONFIG_MOMENCO_JAGUAR_ATX=y
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_IRQ_CPU_RM7K=y
+CONFIG_MIPS_MV64340=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+CONFIG_BOARD_SCACHE=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+CONFIG_CPU_RM9000=y
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_BINFMT_IRIX is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK_DEV is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_DGRS is not set
+CONFIG_EEPRO100=y
+# CONFIG_EEPRO100_PIO is not set
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+CONFIG_MV64340_ETH=y
+CONFIG_MV64340_ETH_0=y
+# CONFIG_MV64340_ETH_1 is not set
+# CONFIG_MV64340_ETH_2 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Userland interfaces
+#
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_DEVPTS_FS=y
+# CONFIG_DEVPTS_FS_XATTR is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/jmr3927_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/jmr3927_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,624 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+CONFIG_TOSHIBA_JMR3927=y
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_MIPS_TX3927=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_FB=y
+CONFIG_TOSHIBA_BOARDS=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+CONFIG_CPU_TX39XX=y
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+CONFIG_RTC_DS1742=y
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_BINFMT_IRIX is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_COMPUTONE is not set
+# CONFIG_ROCKETPORT is not set
+# CONFIG_CYCLADES is not set
+# CONFIG_DIGIEPCA is not set
+# CONFIG_DIGI is not set
+# CONFIG_MOXA_INTELLIO is not set
+# CONFIG_MOXA_SMARTIO is not set
+# CONFIG_SYNCLINK is not set
+# CONFIG_SYNCLINKMP is not set
+# CONFIG_N_HDLC is not set
+# CONFIG_RISCOM8 is not set
+# CONFIG_SPECIALIX is not set
+# CONFIG_SX is not set
+# CONFIG_RIO is not set
+# CONFIG_STALDRV is not set
+# CONFIG_SERIAL_TX3912 is not set
+CONFIG_TXX927_SERIAL=y
+CONFIG_TXX927_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_TXX9 is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_UNIX98_PTYS is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON_OLD is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_E1356 is not set
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+
+#
+# Logo configuration
+#
+# CONFIG_LOGO is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/lasat200_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/lasat200_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,715 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+CONFIG_LASAT=y
+CONFIG_PICVUE=y
+CONFIG_PICVUE_PROC=y
+CONFIG_DS1603=y
+CONFIG_LASAT_SYSCTL=y
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_MIPS_NILE4=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_GT64120=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+CONFIG_BOARD_SCACHE=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_R5000_CPU_SCACHE=y
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+# CONFIG_PCI_NAMES is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_LASAT=y
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+CONFIG_IDEDISK_MULTI_MODE=y
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_IDEPCI_SHARE_IRQ is not set
+# CONFIG_BLK_DEV_OFFBOARD is not set
+CONFIG_BLK_DEV_GENERIC=y
+# CONFIG_BLK_DEV_OPTI621 is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
+CONFIG_IDEDMA_PCI_AUTO=y
+# CONFIG_IDEDMA_ONLYDISK is not set
+CONFIG_BLK_DEV_ADMA=y
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+CONFIG_BLK_DEV_CMD64X=y
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+# CONFIG_BLK_DEV_VIA82CXXX is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_IDEDMA_IVB is not set
+CONFIG_IDEDMA_AUTO=y
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK_DEV is not set
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
diff -puN /dev/null arch/mips/configs/malta_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/malta_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,628 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+CONFIG_MIPS_MALTA=y
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_I8259=y
+CONFIG_MIPS_BONITO64=y
+CONFIG_MIPS_MSC=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_BOARDS_GEN=y
+CONFIG_MIPS_GT64120=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+CONFIG_HAVE_STD_PC_SERIAL_PORT=y
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_PCI=y
+CONFIG_PCNET32=y
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_DGRS is not set
+# CONFIG_EEPRO100 is not set
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_LAN_SAA9730 is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+CONFIG_EFS_FS=y
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V4 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
diff -puN /dev/null arch/mips/configs/mirage_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/mirage_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,673 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_TCIC is not set
+
+#
+# PCI Hotplug Support
+#
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/mpc30x_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/mpc30x_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,583 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_CASIO_E55 is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+CONFIG_VICTOR_MPC30X=y
+# CONFIG_ZAO_CAPCELLA is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_DUMMY_KEYB=y
+CONFIG_VRC4173=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+CONFIG_CPU_VR41XX=y
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_PCI is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/mtx1_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/mtx1_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,673 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_TCIC is not set
+
+#
+# PCI Hotplug Support
+#
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/ocelot_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/ocelot_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,563 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+CONFIG_MOMENCO_OCELOT=y
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_IRQ_CPU=y
+CONFIG_IRQ_CPU_RM7K=y
+CONFIG_MIPS_GT64120=y
+CONFIG_SWAP_IO_SPACE=y
+# CONFIG_SYSCLK_75 is not set
+# CONFIG_SYSCLK_83 is not set
+CONFIG_SYSCLK_100=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+CONFIG_BOARD_SCACHE=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+CONFIG_CPU_RM7000=y
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_PCI is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_BINFMT_IRIX is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/osprey_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/osprey_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,558 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+CONFIG_NEC_OSPREY=y
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_DUMMY_KEYB=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+CONFIG_VR4181=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+CONFIG_CPU_VR41XX=y
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE="ip=bootp ether=46,0x03fe0300,eth0"
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/pb1000_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/pb1000_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,673 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_TCIC is not set
+
+#
+# PCI Hotplug Support
+#
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/pb1100_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/pb1100_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,673 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_TCIC is not set
+
+#
+# PCI Hotplug Support
+#
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/pb1500_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/pb1500_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,784 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+CONFIG_SOC_AU1X00=y
+# CONFIG_SOC_AU1000 is not set
+# CONFIG_SOC_AU1100 is not set
+CONFIG_SOC_AU1500=y
+# CONFIG_MIPS_PB1000 is not set
+# CONFIG_MIPS_PB1100 is not set
+CONFIG_MIPS_PB1500=y
+# CONFIG_MIPS_DB1000 is not set
+# CONFIG_MIPS_DB1100 is not set
+# CONFIG_MIPS_DB1500 is not set
+# CONFIG_MIPS_BOSPORUS is not set
+# CONFIG_MIPS_MIRAGE is not set
+# CONFIG_MIPS_XXS1500 is not set
+# CONFIG_MIPS_MTX1 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_AU1000_USB_DEVICE is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+CONFIG_64BIT_PHYS_ADDR=y
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_YENTA is not set
+# CONFIG_I82092 is not set
+# CONFIG_TCIC is not set
+# CONFIG_PCMCIA_AU1X00 is not set
+
+#
+# PCI Hotplug Support
+#
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECS is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+# CONFIG_IDE_TASKFILE_IO is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_IDEPCI_SHARE_IRQ is not set
+# CONFIG_BLK_DEV_OFFBOARD is not set
+CONFIG_BLK_DEV_GENERIC=y
+# CONFIG_BLK_DEV_OPTI621 is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
+# CONFIG_IDEDMA_PCI_AUTO is not set
+CONFIG_BLK_DEV_ADMA=y
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+CONFIG_BLK_DEV_HPT366=y
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+# CONFIG_BLK_DEV_VIA82CXXX is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_IDEDMA_IVB is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MIPS_AU1X00_ENET=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_AU1X00_GPIO is not set
+# CONFIG_TS_AU1X00_ADS7846 is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_AU1X00=y
+CONFIG_SERIAL_AU1X00_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/rm200_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/rm200_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,1230 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+CONFIG_SNI_RM200_PCI=y
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_ARC=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_I8259=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_ARC32=y
+# CONFIG_FB is not set
+CONFIG_ARC_CONSOLE=y
+CONFIG_ARC_MEMORY=y
+CONFIG_ARC_PROMLIB=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+CONFIG_CPU_R4X00=y
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+# CONFIG_PCI_NAMES is not set
+CONFIG_ISA=y
+# CONFIG_EISA is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=m
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+CONFIG_PARPORT=m
+CONFIG_PARPORT_PC=m
+CONFIG_PARPORT_PC_CML1=m
+CONFIG_PARPORT_SERIAL=m
+# CONFIG_PARPORT_PC_FIFO is not set
+# CONFIG_PARPORT_PC_SUPERIO is not set
+# CONFIG_PARPORT_OTHER is not set
+CONFIG_PARPORT_1284=y
+
+#
+# Plug and Play support
+#
+# CONFIG_PNP is not set
+
+#
+# Block devices
+#
+CONFIG_BLK_DEV_FD=m
+# CONFIG_BLK_DEV_XD is not set
+CONFIG_PARIDE=m
+CONFIG_PARIDE_PARPORT=m
+
+#
+# Parallel IDE high-level drivers
+#
+CONFIG_PARIDE_PD=m
+CONFIG_PARIDE_PCD=m
+CONFIG_PARIDE_PF=m
+CONFIG_PARIDE_PT=m
+CONFIG_PARIDE_PG=m
+
+#
+# Parallel IDE protocol modules
+#
+CONFIG_PARIDE_ATEN=m
+CONFIG_PARIDE_BPCK=m
+CONFIG_PARIDE_BPCK6=m
+CONFIG_PARIDE_COMM=m
+CONFIG_PARIDE_DSTR=m
+CONFIG_PARIDE_FIT2=m
+CONFIG_PARIDE_FIT3=m
+CONFIG_PARIDE_EPAT=m
+# CONFIG_PARIDE_EPATC8 is not set
+CONFIG_PARIDE_EPIA=m
+CONFIG_PARIDE_FRIQ=m
+CONFIG_PARIDE_FRPW=m
+CONFIG_PARIDE_KBIC=m
+CONFIG_PARIDE_KTTI=m
+CONFIG_PARIDE_ON20=m
+CONFIG_PARIDE_ON26=m
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=m
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+CONFIG_BLK_DEV_SR_VENDOR=y
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_REPORT_LUNS is not set
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_7000FASST is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AHA1542 is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INIA100 is not set
+CONFIG_SCSI_PPA=m
+CONFIG_SCSI_IMM=m
+# CONFIG_SCSI_IZIP_EPP16 is not set
+# CONFIG_SCSI_IZIP_SLOW_CTR is not set
+# CONFIG_SCSI_NCR53C406A is not set
+CONFIG_SCSI_SYM53C8XX_2=y
+CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
+CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
+CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
+# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PSI240I is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+CONFIG_SCSI_QLA2XXX=y
+# CONFIG_SCSI_QLA21XX is not set
+# CONFIG_SCSI_QLA22XX is not set
+# CONFIG_SCSI_QLA2300 is not set
+# CONFIG_SCSI_QLA2322 is not set
+# CONFIG_SCSI_QLA6312 is not set
+# CONFIG_SCSI_QLA6322 is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_U14_34F is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=m
+CONFIG_MD_LINEAR=m
+CONFIG_MD_RAID0=m
+CONFIG_MD_RAID1=m
+CONFIG_MD_RAID5=m
+# CONFIG_MD_RAID6 is not set
+CONFIG_MD_MULTIPATH=m
+CONFIG_BLK_DEV_DM=m
+CONFIG_DM_IOCTL_V4=y
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=m
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=m
+CONFIG_UNIX=y
+CONFIG_NET_KEY=m
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_INET_ECN=y
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=m
+CONFIG_IPV6_PRIVACY=y
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_TUNNEL=m
+CONFIG_DECNET=m
+# CONFIG_DECNET_SIOCGIFCONF is not set
+# CONFIG_DECNET_ROUTER is not set
+CONFIG_BRIDGE=m
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_CONNTRACK=m
+CONFIG_IP_NF_FTP=m
+CONFIG_IP_NF_IRC=m
+CONFIG_IP_NF_TFTP=m
+CONFIG_IP_NF_AMANDA=m
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_LIMIT=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_MAC=m
+CONFIG_IP_NF_MATCH_PKTTYPE=m
+CONFIG_IP_NF_MATCH_MARK=m
+CONFIG_IP_NF_MATCH_MULTIPORT=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_DSCP=m
+CONFIG_IP_NF_MATCH_AH_ESP=m
+CONFIG_IP_NF_MATCH_LENGTH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_TCPMSS=m
+CONFIG_IP_NF_MATCH_HELPER=m
+CONFIG_IP_NF_MATCH_STATE=m
+CONFIG_IP_NF_MATCH_CONNTRACK=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_PHYSDEV=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_IP_NF_NAT_LOCAL=y
+CONFIG_IP_NF_NAT_SNMP_BASIC=m
+CONFIG_IP_NF_NAT_IRC=m
+CONFIG_IP_NF_NAT_FTP=m
+CONFIG_IP_NF_NAT_TFTP=m
+CONFIG_IP_NF_NAT_AMANDA=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_DSCP=m
+CONFIG_IP_NF_TARGET_MARK=m
+CONFIG_IP_NF_TARGET_CLASSIFY=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_TARGET_TCPMSS=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+CONFIG_IP_NF_COMPAT_IPCHAINS=m
+CONFIG_IP_NF_COMPAT_IPFWADM=m
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_LIMIT=m
+CONFIG_IP6_NF_MATCH_MAC=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_MULTIPORT=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_MARK=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AHESP=m
+CONFIG_IP6_NF_MATCH_LENGTH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_MARK=m
+
+#
+# DECnet: Netfilter Configuration
+#
+CONFIG_DECNET_NF_GRABULATOR=m
+
+#
+# Bridge: Netfilter Configuration
+#
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_LOG=m
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=m
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_CSZ=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_QOS=y
+CONFIG_NET_ESTIMATOR=y
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_CLS_POLICE=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+CONFIG_EQUALIZER=m
+CONFIG_TUN=m
+CONFIG_ETHERTAP=m
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_AT1700 is not set
+# CONFIG_DEPCA is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_ISA=y
+# CONFIG_E2100 is not set
+# CONFIG_EWRK3 is not set
+# CONFIG_EEXPRESS is not set
+# CONFIG_EEXPRESS_PRO is not set
+# CONFIG_HPLAN_PLUS is not set
+# CONFIG_HPLAN is not set
+# CONFIG_LP486E is not set
+# CONFIG_ETH16I is not set
+CONFIG_NE2000=m
+# CONFIG_ZNET is not set
+# CONFIG_SEEQ8005 is not set
+CONFIG_NET_PCI=y
+CONFIG_PCNET32=y
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_AC3200 is not set
+# CONFIG_APRICOT is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_DGRS is not set
+CONFIG_EEPRO100=m
+# CONFIG_EEPRO100_PIO is not set
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_LAN_SAA9730 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PLIP=m
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_PARKBD=m
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_INPORT is not set
+# CONFIG_MOUSE_LOGIBM is not set
+# CONFIG_MOUSE_PC110PAD is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=m
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_MULTIPORT=y
+CONFIG_SERIAL_8250_RSA=y
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=m
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+CONFIG_PRINTER=m
+# CONFIG_LP_CONSOLE is not set
+CONFIG_PPDEV=m
+CONFIG_TIPAR=m
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=m
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+CONFIG_USB=m
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_OHCI_HCD=m
+CONFIG_USB_UHCI_HCD=m
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_BLUETOOTH_TTY=m
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=m
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_DPCM=y
+CONFIG_USB_STORAGE_HP8200e=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+
+#
+# USB Human Interface Devices (HID)
+#
+CONFIG_USB_HID=m
+CONFIG_USB_HIDINPUT=y
+CONFIG_HID_FF=y
+CONFIG_HID_PID=y
+CONFIG_LOGITECH_FF=y
+CONFIG_THRUSTMASTER_FF=y
+CONFIG_USB_HIDDEV=y
+
+#
+# USB HID Boot Protocol drivers
+#
+CONFIG_USB_KBD=m
+CONFIG_USB_MOUSE=m
+CONFIG_USB_AIPTEK=m
+CONFIG_USB_WACOM=m
+CONFIG_USB_KBTAB=m
+CONFIG_USB_POWERMATE=m
+CONFIG_USB_XPAD=m
+
+#
+# USB Imaging devices
+#
+CONFIG_USB_MDC800=m
+CONFIG_USB_MICROTEK=m
+CONFIG_USB_HPUSBSCSI=m
+
+#
+# USB Multimedia devices
+#
+CONFIG_USB_DABUSB=m
+
+#
+# Video4Linux support is needed for USB Multimedia device support
+#
+
+#
+# USB Network adaptors
+#
+CONFIG_USB_CATC=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_USBNET=m
+
+#
+# USB Host-to-Host Cables
+#
+CONFIG_USB_AN2720=y
+CONFIG_USB_BELKIN=y
+CONFIG_USB_GENESYS=y
+CONFIG_USB_NET1080=y
+CONFIG_USB_PL2301=y
+
+#
+# Intelligent USB Devices/Gadgets
+#
+CONFIG_USB_ARMLINUX=y
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_ZAURUS=y
+CONFIG_USB_CDCETHER=y
+
+#
+# USB Network Adapters
+#
+CONFIG_USB_AX8817X=y
+
+#
+# USB port drivers
+#
+CONFIG_USB_USS720=m
+
+#
+# USB Serial Converter support
+#
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KEYSPAN_MPR=y
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_SAFE=m
+CONFIG_USB_SERIAL_SAFE_PADDED=y
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_OMNINET=m
+CONFIG_USB_EZUSB=y
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+CONFIG_USB_TIGL=m
+CONFIG_USB_AUERSWALD=m
+CONFIG_USB_RIO500=m
+CONFIG_USB_LEGOTOWER=m
+CONFIG_USB_BRLVGER=m
+CONFIG_USB_LCD=m
+# CONFIG_USB_LED is not set
+CONFIG_USB_TEST=m
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=m
+CONFIG_USB_GADGET_NET2280=y
+CONFIG_USB_NET2280=m
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_SA1100 is not set
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_GADGETFS=m
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+CONFIG_JFS_FS=m
+# CONFIG_JFS_POSIX_ACL is not set
+# CONFIG_JFS_DEBUG is not set
+# CONFIG_JFS_STATISTICS is not set
+CONFIG_XFS_FS=m
+# CONFIG_XFS_RT is not set
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_SECURITY=y
+# CONFIG_XFS_POSIX_ACL is not set
+CONFIG_MINIX_FS=m
+CONFIG_ROMFS_FS=m
+# CONFIG_QUOTA is not set
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_ZISOFS_FS=m
+CONFIG_UDF_FS=m
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+# CONFIG_NTFS_RW is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+CONFIG_ADFS_FS=m
+# CONFIG_ADFS_FS_RW is not set
+CONFIG_AFFS_FS=m
+CONFIG_HFS_FS=m
+CONFIG_BEFS_FS=m
+# CONFIG_BEFS_DEBUG is not set
+CONFIG_BFS_FS=m
+CONFIG_EFS_FS=m
+CONFIG_CRAMFS=m
+CONFIG_VXFS_FS=m
+CONFIG_HPFS_FS=m
+CONFIG_QNX4FS_FS=m
+# CONFIG_QNX4FS_RW is not set
+CONFIG_SYSV_FS=m
+CONFIG_UFS_FS=m
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V4 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=m
+CONFIG_SUNRPC_GSS=m
+CONFIG_RPCSEC_GSS_KRB5=m
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+CONFIG_NCP_FS=m
+CONFIG_NCPFS_PACKET_SIGNING=y
+CONFIG_NCPFS_IOCTL_LOCKING=y
+CONFIG_NCPFS_STRONG=y
+CONFIG_NCPFS_NFS_NS=y
+CONFIG_NCPFS_OS2_NS=y
+CONFIG_NCPFS_SMALLDOS=y
+CONFIG_NCPFS_NLS=y
+CONFIG_NCPFS_EXTRAS=y
+CONFIG_CODA_FS=m
+CONFIG_CODA_FS_OLD_API=y
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_AFS_FS=m
+CONFIG_RXRPC=m
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_NEC98_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_DEFLATE=m
+CONFIG_CRYPTO_TEST=m
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=m
+CONFIG_ZLIB_DEFLATE=m
diff -puN /dev/null arch/mips/configs/sb1250-swarm_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/sb1250-swarm_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,636 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=15
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+CONFIG_SIBYTE_SB1xxx_SOC=y
+CONFIG_SIBYTE_SWARM=y
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_PTSWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_UNKNOWN is not set
+CONFIG_SIBYTE_BOARD=y
+CONFIG_SIBYTE_SB1250=y
+CONFIG_CPU_SB1_PASS_1=y
+# CONFIG_CPU_SB1_PASS_2_1250 is not set
+# CONFIG_CPU_SB1_PASS_2_2 is not set
+# CONFIG_CPU_SB1_PASS_4 is not set
+# CONFIG_CPU_SB1_PASS_2_112x is not set
+# CONFIG_CPU_SB1_PASS_3 is not set
+CONFIG_SIBYTE_HAS_PCI=y
+CONFIG_SIBYTE_HAS_LDT=y
+# CONFIG_SIMULATION is not set
+CONFIG_SIBYTE_CFE=y
+# CONFIG_SIBYTE_CFE_CONSOLE is not set
+# CONFIG_SIBYTE_BUS_WATCHER is not set
+# CONFIG_SIBYTE_SB1250_PROF is not set
+# CONFIG_SIBYTE_TBPROF is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_COHERENT=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_DUMMY_KEYB=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+CONFIG_CPU_SB1=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_SIBYTE_DMA_PAGEOPS is not set
+# CONFIG_CPU_HAS_PREFETCH is not set
+CONFIG_VTAG_ICACHE=y
+CONFIG_SB1_PASS_1_WORKAROUNDS=y
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+CONFIG_SMP=y
+CONFIG_NR_CPUS=2
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_BINFMT_IRIX is not set
+
+#
+# MIPS initrd options
+#
+# CONFIG_EMBEDDED_RAMDISK is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=9220
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_NET_SB1250_MAC=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Userland interfaces
+#
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_ROCKETPORT is not set
+# CONFIG_SYNCLINK is not set
+# CONFIG_SYNCLINKMP is not set
+# CONFIG_N_HDLC is not set
+# CONFIG_STALDRV is not set
+CONFIG_SIBYTE_SB1250_DUART=y
+CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_UNIX98_PTYS is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_BLOWFISH=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_SERPENT=y
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/sead_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/sead_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,434 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+CONFIG_MIPS_SEAD=y
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_MIPS_BOARDS_GEN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# MIPS initrd options
+#
+CONFIG_EMBEDDED_RAMDISK=y
+CONFIG_EMBEDDED_RAMDISK_IMAGE="ramdisk.gz"
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=18432
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+# CONFIG_NET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# ISDN subsystem
+#
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/tb0226_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/tb0226_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,695 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_CASIO_E55 is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_NEC_EAGLE is not set
+CONFIG_TANBAC_TB0226=y
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_DUMMY_KEYB=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_FB=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+CONFIG_CPU_VR41XX=y
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+# CONFIG_PCI is not set
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+CONFIG_IDEDISK_MULTI_MODE=y
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+CONFIG_BLK_DEV_IDESCSI=y
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_REPORT_LUNS is not set
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=m
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_NAT=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_TOS=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+
+#
+# Logo configuration
+#
+# CONFIG_LOGO is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+# CONFIG_SND is not set
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+CONFIG_ROMFS_FS=m
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+CONFIG_AUTOFS4_FS=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_ZISOFS_FS=y
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V4 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+CONFIG_SMB_NLS_DEFAULT=y
+CONFIG_SMB_NLS_REMOTE="cp932"
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=m
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=m
diff -puN /dev/null arch/mips/configs/tb0229_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/tb0229_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,686 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_CASIO_E55 is not set
+# CONFIG_IBM_WORKPAD is not set
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_TANBAC_TB0226 is not set
+CONFIG_TANBAC_TB0229=y
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_DUMMY_KEYB=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+CONFIG_TANBAC_TB0219=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+CONFIG_CPU_VR41XX=y
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=m
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_NAT=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_TOS=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+# CONFIG_NET_IPGRE_BROADCAST is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+CONFIG_DUMMY=m
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPPOE=m
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_SMART=y
+CONFIG_SLIP_MODE_SLIP6=y
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT3_FS=m
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=m
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+CONFIG_JFS_FS=m
+# CONFIG_JFS_POSIX_ACL is not set
+# CONFIG_JFS_DEBUG is not set
+# CONFIG_JFS_STATISTICS is not set
+CONFIG_XFS_FS=y
+# CONFIG_XFS_RT is not set
+CONFIG_XFS_QUOTA=y
+# CONFIG_XFS_SECURITY is not set
+CONFIG_XFS_POSIX_ACL=y
+# CONFIG_MINIX_FS is not set
+CONFIG_ROMFS_FS=m
+# CONFIG_QUOTA is not set
+CONFIG_QUOTACTL=y
+# CONFIG_AUTOFS_FS is not set
+CONFIG_AUTOFS4_FS=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_ZISOFS_FS=y
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V4 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+CONFIG_SMB_NLS_DEFAULT=y
+CONFIG_SMB_NLS_REMOTE="cp932"
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=m
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=m
diff -puN /dev/null arch/mips/configs/workpad_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/workpad_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,593 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+CONFIG_MACH_VR41XX=y
+# CONFIG_CASIO_E55 is not set
+CONFIG_IBM_WORKPAD=y
+# CONFIG_NEC_EAGLE is not set
+# CONFIG_TANBAC_TB0226 is not set
+# CONFIG_TANBAC_TB0229 is not set
+# CONFIG_VICTOR_MPC30X is not set
+# CONFIG_ZAO_CAPCELLA is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_VRC4171=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+CONFIG_CPU_VR41XX=y
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_IDEDISK_STROKE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_TASKFILE_IO=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN /dev/null arch/mips/configs/xxs1500_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/xxs1500_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,673 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_TCIC is not set
+
+#
+# PCI Hotplug Support
+#
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC32=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff -puN /dev/null arch/mips/configs/yosemite_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/configs/yosemite_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,567 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=15
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_BAGET_MIPS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+CONFIG_BOARD_SCACHE=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+CONFIG_CPU_RM9000=y
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=2
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_BINFMT_IRIX is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_LBD=y
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+CONFIG_SCSI_REPORT_LUNS=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+# CONFIG_NETLINK_DEV is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_IPV6 is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IPV6_SCTP__=y
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Userland interfaces
+#
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+
+#
+# Input Device Drivers
+#
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_ROCKETPORT is not set
+# CONFIG_SYNCLINK is not set
+# CONFIG_SYNCLINKMP is not set
+# CONFIG_N_HDLC is not set
+# CONFIG_STALDRV is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_DEVPTS_FS_XATTR is not set
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_GSS is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN arch/mips/ddb5xxx/common/prom.c~mips-megapatch arch/mips/ddb5xxx/common/prom.c
--- 25/arch/mips/ddb5xxx/common/prom.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ddb5xxx/common/prom.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,17 +1,11 @@
-/***********************************************************************
- *
+/*
* Copyright 2001 MontaVista Software Inc.
* Author: jsun@mvista.com or jsun@junsun.net
*
- * arch/mips/ddb5xxx/common/prom.c
- * prom.c file.
- *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
- *
- ***********************************************************************
*/
#include <linux/config.h>
#include <linux/init.h>
@@ -24,8 +18,6 @@
#include <asm/ddb5xxx/ddb5xxx.h>
#include <asm/debug.h>
-char arcs_cmdline[CL_SIZE];
-
const char *get_system_type(void)
{
switch (mips_machtype) {
@@ -38,13 +30,22 @@ const char *get_system_type(void)
}
}
+#if defined(CONFIG_DDB5477)
+void ddb5477_runtime_detection(void);
+#endif
+
/* [jsun@junsun.net] PMON passes arguments in C main() style */
-void __init prom_init(int argc, const char **arg)
+void __init prom_init(void)
{
+ int argc = fw_arg0;
+ char **arg = (char**) fw_arg1;
int i;
+ /* if user passes kernel args, ignore the default one */
+ if (argc > 1)
+ arcs_cmdline[0] = '\0';
+
/* arg[0] is "g", the rest is boot parameters */
- arcs_cmdline[0] = '\0';
for (i = 1; i < argc; i++) {
if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
>= sizeof(arcs_cmdline))
@@ -53,9 +54,6 @@ void __init prom_init(int argc, const ch
strcat(arcs_cmdline, " ");
}
- /* by default all these boards use dhcp/nfs root fs */
- strcat(arcs_cmdline, "ip=bootp");
-
mips_machgroup = MACH_GROUP_NEC_DDB;
#if defined(CONFIG_DDB5074)
@@ -70,8 +68,9 @@ void __init prom_init(int argc, const ch
#endif
}
-void __init prom_free_prom_memory(void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
#if defined(CONFIG_DDB5477)
diff -puN arch/mips/ddb5xxx/ddb5074/Makefile~mips-megapatch arch/mips/ddb5xxx/ddb5074/Makefile
--- 25/arch/mips/ddb5xxx/ddb5074/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ddb5xxx/ddb5074/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -3,6 +3,6 @@
# under Linux.
#
-obj-y += setup.o irq.o int-handler.o nile4_pic.o time.o
+obj-y += setup.o irq.o int-handler.o nile4_pic.o
EXTRA_AFLAGS := $(CFLAGS)
diff -puN arch/mips/ddb5xxx/ddb5074/nile4_pic.c~mips-megapatch arch/mips/ddb5xxx/ddb5074/nile4_pic.c
--- 25/arch/mips/ddb5xxx/ddb5074/nile4_pic.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ddb5xxx/ddb5074/nile4_pic.c 2004-02-19 12:53:00.000000000 -0800
@@ -9,6 +9,7 @@
* Author: jsun@mvista.com or jsun@junsun.net
*
*/
+#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
diff -puN arch/mips/ddb5xxx/ddb5074/setup.c~mips-megapatch arch/mips/ddb5xxx/ddb5074/setup.c
--- 25/arch/mips/ddb5xxx/ddb5074/setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ddb5xxx/ddb5074/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -10,9 +10,7 @@
#include <linux/kernel.h>
#include <linux/kdev_t.h>
#include <linux/types.h>
-#include <linux/console.h>
#include <linux/sched.h>
-#include <linux/mc146818rtc.h>
#include <linux/pci.h>
#include <linux/ide.h>
#include <linux/ioport.h>
@@ -28,20 +26,11 @@
#include <asm/ddb5xxx/ddb5074.h>
#include <asm/ddb5xxx/ddb5xxx.h>
-
#ifdef CONFIG_KGDB
extern void rs_kgdb_hook(int);
extern void breakpoint(void);
#endif
-#if defined(CONFIG_SERIAL_CONSOLE)
-extern void console_setup(char *);
-#endif
-
-extern struct ide_ops std_ide_ops;
-extern struct kbd_ops std_kbd_ops;
-extern struct rtc_ops ddb_rtc_ops;
-
static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
static void ddb_machine_restart(char *command)
@@ -97,13 +86,13 @@ static void __init ddb_timer_init(struct
static void __init ddb_time_init(void)
{
- /* we have ds1396 RTC chip */
+ /* we have ds1396 RTC chip */
rtc_ds1386_init(KSEG1ADDR(DDB_PCI_MEM_BASE));
}
-void __init ddb_setup(void)
+static void __init ddb5074_setup(void)
{
extern int panic_timeout;
@@ -118,25 +107,16 @@ void __init ddb_setup(void)
_machine_halt = ddb_machine_halt;
_machine_power_off = ddb_machine_power_off;
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
-#endif
-
- rtc_ops = &ddb_rtc_ops;
-
- ddb_out32(DDB_BAR0, 0);
+ ddb_out32(DDB_BAR0, 0);
ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IO, 0, 0x10);
ddb_set_pmr(DDB_PCIINIT1, DDB_PCICMD_MEM, DDB_PCI_MEM_BASE , 0x10);
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
/* Reboot on panic */
panic_timeout = 180;
}
+early_initcall(ddb5074_setup);
#define USE_NILE4_SERIAL 0
diff -puN -L arch/mips/ddb5xxx/ddb5074/time.c arch/mips/ddb5xxx/ddb5074/time.c~mips-megapatch /dev/null
--- 25/arch/mips/ddb5xxx/ddb5074/time.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,33 +0,0 @@
-/*
- * arch/mips/ddb5074/time.c -- Timer routines
- *
- * Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- * Sony Software Development Center Europe (SDCE), Brussels
- *
- */
-#include <linux/init.h>
-#include <asm/mc146818rtc.h>
-#include <asm/ddb5xxx/ddb5074.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-
-
-static unsigned char ddb_rtc_read_data(unsigned long addr)
-{
- return *(volatile unsigned char *)(KSEG1ADDR(DDB_PCI_MEM_BASE)+addr);
-}
-
-static void ddb_rtc_write_data(unsigned char data, unsigned long addr)
-{
- *(volatile unsigned char *)(KSEG1ADDR(DDB_PCI_MEM_BASE)+addr)=data;
-}
-
-static int ddb_rtc_bcd_mode(void)
-{
- return 1;
-}
-
-struct rtc_ops ddb_rtc_ops = {
- ddb_rtc_read_data,
- ddb_rtc_write_data,
- ddb_rtc_bcd_mode
-};
diff -puN arch/mips/ddb5xxx/ddb5476/setup.c~mips-megapatch arch/mips/ddb5xxx/ddb5476/setup.c
--- 25/arch/mips/ddb5xxx/ddb5476/setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ddb5xxx/ddb5476/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -10,11 +10,8 @@
#include <linux/kernel.h>
#include <linux/kdev_t.h>
#include <linux/types.h>
-#include <linux/console.h>
#include <linux/sched.h>
-#include <linux/mc146818rtc.h>
#include <linux/pci.h>
-#include <linux/ide.h>
#include <asm/addrspace.h>
#include <asm/bcache.h>
@@ -43,9 +40,6 @@
extern void breakpoint(void);
#endif
-extern struct ide_ops std_ide_ops;
-extern struct kbd_ops std_kbd_ops;
-
static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
static void ddb_machine_restart(char *command)
@@ -82,7 +76,7 @@ extern void rtc_ds1386_init(unsigned lon
static void __init ddb_time_init(void)
{
#if defined(USE_CPU_COUNTER_TIMER)
- mips_counter_frequency = CPU_COUNTER_FREQUENCY;
+ mips_hpt_frequency = CPU_COUNTER_FREQUENCY;
#endif
/* we have ds1396 RTC chip */
@@ -114,20 +108,16 @@ static void __init ddb_timer_setup(struc
static struct {
struct resource dma1;
- struct resource pic1;
struct resource timer;
struct resource rtc;
struct resource dma_page_reg;
- struct resource pic2;
struct resource dma2;
} ddb5476_ioport = {
{
"dma1", 0x00, 0x1f, IORESOURCE_BUSY}, {
- "pic1", 0x20, 0x3f, IORESOURCE_BUSY}, {
"timer", 0x40, 0x5f, IORESOURCE_BUSY}, {
"rtc", 0x70, 0x7f, IORESOURCE_BUSY}, {
"dma page reg", 0x80, 0x8f, IORESOURCE_BUSY}, {
- "pic2", 0xa0, 0xbf, IORESOURCE_BUSY}, {
"dma2", 0xc0, 0xdf, IORESOURCE_BUSY}
};
@@ -142,8 +132,7 @@ static void ddb5476_board_init(void);
extern void ddb5476_irq_setup(void);
extern void (*irq_setup)(void);
-void __init
-ddb_setup(void)
+static void __init ddb5476_setup(void)
{
extern int panic_timeout;
@@ -159,21 +148,16 @@ ddb_setup(void)
/* request io port/mem resources */
if (request_resource(&ioport_resource, &ddb5476_ioport.dma1) ||
- request_resource(&ioport_resource, &ddb5476_ioport.pic1) ||
request_resource(&ioport_resource, &ddb5476_ioport.timer) ||
request_resource(&ioport_resource, &ddb5476_ioport.rtc) ||
request_resource(&ioport_resource,
&ddb5476_ioport.dma_page_reg)
- || request_resource(&ioport_resource, &ddb5476_ioport.pic2)
|| request_resource(&ioport_resource, &ddb5476_ioport.dma2)
|| request_resource(&iomem_resource, &ddb5476_iomem.nile4)) {
printk
("ddb_setup - requesting oo port resources failed.\n");
for (;;);
}
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
-#endif
/* Reboot on panic */
panic_timeout = 180;
@@ -181,14 +165,12 @@ ddb_setup(void)
/* [jsun] we need to set BAR0 so that SDRAM 0 appears at 0x0 in PCI */
/* *(long*)0xbfa00218 = 0x8; */
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
/* board initialization stuff */
ddb5476_board_init();
}
+early_initcall(ddb5476_setup);
+
/*
* We don't trust bios. We essentially does hardware re-initialization
* as complete as possible, as far as we know we can safely do.
diff -puN arch/mips/ddb5xxx/ddb5477/setup.c~mips-megapatch arch/mips/ddb5xxx/ddb5477/setup.c
--- 25/arch/mips/ddb5xxx/ddb5477/setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ddb5xxx/ddb5477/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -15,7 +15,6 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
-#include <linux/console.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/ide.h>
@@ -36,9 +35,7 @@
#include <asm/gdb-stub.h>
#include <asm/traps.h>
#include <asm/debug.h>
-#ifdef CONFIG_PC_KEYB
-#include <asm/keyboard.h>
-#endif
+#include <asm/pci_channel.h>
#include <asm/ddb5xxx/ddb5xxx.h>
@@ -141,11 +138,11 @@ static void __init ddb_time_init(void)
bus_frequency = detect_bus_frequency(rtc_base);
}
- /* mips_counter_frequency is 1/2 of the cpu core freq */
- i = (read_32bit_cp0_register(CP0_CONFIG) >> 28 ) & 7;
+ /* mips_hpt_frequency is 1/2 of the cpu core freq */
+ i = (read_c0_config() >> 28 ) & 7;
if ((current_cpu_data.cputype == CPU_R5432) && (i == 3))
i = 4;
- mips_counter_frequency = bus_frequency*(i+4)/4;
+ mips_hpt_frequency = bus_frequency*(i+4)/4;
}
extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
@@ -153,7 +150,6 @@ extern int setup_irq(unsigned int irq, s
static void __init ddb_timer_setup(struct irqaction *irq)
{
#if defined(USE_CPU_COUNTER_TIMER)
- unsigned int count;
/* we are using the cpu counter for timer interrupts */
setup_irq(CPU_IRQ_BASE + 7, irq);
@@ -170,17 +166,14 @@ static void __init ddb_timer_setup(struc
static void ddb5477_board_init(void);
extern void ddb5477_irq_setup(void);
+extern void (*irq_setup)(void);
-#if defined(CONFIG_BLK_DEV_INITRD)
-extern unsigned long __rd_start, __rd_end, initrd_start, initrd_end;
-#endif
+extern struct pci_controller ddb5477_ext_controller;
+extern struct pci_controller ddb5477_io_controller;
-void __init ddb_setup(void)
+static int ddb5477_setup(void)
{
extern int panic_timeout;
-#ifdef CONFIG_BLK_DEV_IDE
- extern struct ide_ops std_ide_ops;
-#endif
/* initialize board - we don't trust the loader */
ddb5477_board_init();
@@ -202,27 +195,16 @@ void __init ddb_setup(void)
/* Reboot on panic */
panic_timeout = 180;
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
-#endif
-
-
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
+ register_pci_controller (&ddb5477_ext_controller);
+ register_pci_controller (&ddb5477_io_controller);
-#if defined(CONFIG_BLK_DEV_INITRD)
- ROOT_DEV = Root_RAM0;
- initrd_start = (unsigned long)&__rd_start;
- initrd_end = (unsigned long)&__rd_end;
-#endif
+ return 0;
}
+early_initcall(ddb5477_setup);
+
static void __init ddb5477_board_init(void)
{
-#ifdef CONFIG_PC_KEYB
- extern struct kbd_ops std_kbd_ops;
-#endif
/* ----------- setup PDARs ------------ */
/* SDRAM should have been set */
@@ -351,13 +333,6 @@ static void __init ddb5477_board_init(vo
/* For dual-function pins, make them all non-GPIO */
ddb_out32(DDB_GIUFUNSEL, 0x0);
// ddb_out32(DDB_GIUFUNSEL, 0xfe0fcfff); /* NEC recommanded value */
-
- if (mips_machtype == MACH_NEC_ROCKHOPPERII) {
-#ifdef CONFIG_PC_KEYB
- printk("kdb_ops is std\n");
- kbd_ops = &std_kbd_ops;
-#endif
- }
if (mips_machtype == MACH_NEC_ROCKHOPPERII) {
diff -puN arch/mips/dec/ecc-berr.c~mips-megapatch arch/mips/dec/ecc-berr.c
--- 25/arch/mips/dec/ecc-berr.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/ecc-berr.c 2004-02-19 12:53:00.000000000 -0800
@@ -74,7 +74,7 @@ static int dec_ecc_be_backend(struct pt_
if (!(erraddr & KN0X_EAR_VALID)) {
/* No idea what happened. */
- printk(KERN_ALERT "Unindentified bus error %s.\n", kind);
+ printk(KERN_ALERT "Unidentified bus error %s.\n", kind);
return action;
}
@@ -198,12 +198,12 @@ int dec_ecc_be_handler(struct pt_regs *r
return dec_ecc_be_backend(regs, is_fixup, 0);
}
-void dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
int action = dec_ecc_be_backend(regs, 0, 1);
if (action == MIPS_BE_DISCARD)
- return;
+ return IRQ_NONE;
/*
* FIXME: Find affected processes and kill them, otherwise we
diff -puN arch/mips/dec/int-handler.S~mips-megapatch arch/mips/dec/int-handler.S
--- 25/arch/mips/dec/int-handler.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/int-handler.S 2004-02-19 12:53:00.000000000 -0800
@@ -13,6 +13,7 @@
* Rewritten extensively for controller-driven IRQ support
* by Maciej W. Rozycki.
*/
+#include <linux/config.h>
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
diff -puN arch/mips/dec/Makefile~mips-megapatch arch/mips/dec/Makefile
--- 25/arch/mips/dec/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -3,7 +3,7 @@
#
obj-y := ecc-berr.o int-handler.o ioasic-irq.o kn02-irq.o reset.o \
- rtc-dec.o setup.o time.o
+ setup.o time.o
obj-$(CONFIG_PROM_CONSOLE) += promcon.o
obj-$(CONFIG_CPU_HAS_WB) += wbflush.o
diff -puN arch/mips/dec/prom/cmdline.c~mips-megapatch arch/mips/dec/prom/cmdline.c
--- 25/arch/mips/dec/prom/cmdline.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/prom/cmdline.c 2004-02-19 12:53:00.000000000 -0800
@@ -2,6 +2,7 @@
* cmdline.c: read the command line passed to us by the PROM.
*
* Copyright (C) 1998 Harald Koerfgen
+ * Copyright (C) 2002, 2004 Maciej W. Rozycki
*/
#include <linux/init.h>
#include <linux/kernel.h>
@@ -13,8 +14,6 @@
#undef PROM_DEBUG
-char arcs_cmdline[CL_SIZE];
-
void __init prom_init_cmdline(s32 argc, s32 *argv, u32 magic)
{
char *arg;
@@ -35,6 +34,6 @@ void __init prom_init_cmdline(s32 argc,
}
#ifdef PROM_DEBUG
- prom_printf("arcs_cmdline: %s\n", &(arcs_cmdline[0]));
+ printk("arcs_cmdline: %s\n", &(arcs_cmdline[0]));
#endif
}
diff -puN arch/mips/dec/promcon.c~mips-megapatch arch/mips/dec/promcon.c
--- 25/arch/mips/dec/promcon.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/promcon.c 2004-02-19 12:53:00.000000000 -0800
@@ -6,7 +6,6 @@
*/
#include <linux/tty.h>
-#include <linux/major.h>
#include <linux/ptrace.h>
#include <linux/init.h>
#include <linux/console.h>
diff -puN /dev/null arch/mips/dec/prom/console.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/dec/prom/console.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,55 @@
+/*
+ * arch/mips/dec/prom/console.c
+ *
+ * DECstation PROM-based early console support.
+ *
+ * Copyright (C) 2004 Maciej W. Rozycki
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+
+#include <asm/dec/prom.h>
+
+static void __init prom_console_write(struct console *con, const char *s,
+ unsigned int c)
+{
+ static char sfmt[] __initdata = "%%%us";
+ char fmt[13];
+
+ snprintf(fmt, sizeof(fmt), sfmt, c);
+ prom_printf(fmt, s);
+}
+
+static struct console promcons __initdata = {
+ .name = "prom",
+ .write = prom_console_write,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+};
+
+static int promcons_output __initdata = 0;
+
+void __init register_prom_console(void)
+{
+ if (!promcons_output) {
+ promcons_output = 1;
+ register_console(&promcons);
+ }
+}
+
+void __init unregister_prom_console(void)
+{
+ if (promcons_output) {
+ unregister_console(&promcons);
+ promcons_output = 0;
+ }
+}
+
+void disable_early_printk(void)
+ __attribute__((alias("unregister_prom_console")));
diff -puN arch/mips/dec/prom/identify.c~mips-megapatch arch/mips/dec/prom/identify.c
--- 25/arch/mips/dec/prom/identify.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/prom/identify.c 2004-02-19 12:53:00.000000000 -0800
@@ -2,11 +2,12 @@
* identify.c: machine identification code.
*
* Copyright (C) 1998 Harald Koerfgen and Paul M. Antoine
- * Copyright (C) 2002, 2003 Maciej W. Rozycki
+ * Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/mc146818rtc.h>
+#include <linux/module.h>
#include <linux/string.h>
#include <linux/types.h>
@@ -61,6 +62,10 @@ const char *get_system_type(void)
* early. Semantically the functions belong to prom/init.c, but they
* are compact enough we want them inlined. --macro
*/
+volatile u8 *dec_rtc_base;
+
+EXPORT_SYMBOL(dec_rtc_base);
+
static inline void prom_init_kn01(void)
{
dec_rtc_base = (void *)KN01_RTC_BASE;
@@ -100,11 +105,13 @@ void __init prom_identify_arch(u32 magic
u32 dec_sysid;
if (!prom_is_rex(magic)) {
- dec_sysid = simple_strtoul(prom_getenv("systype"), (char **)0, 0);
+ dec_sysid = simple_strtoul(prom_getenv("systype"),
+ (char **)0, 0);
} else {
dec_sysid = rex_getsysid();
if (dec_sysid == 0) {
- prom_printf("Zero sysid returned from PROMs! Assuming PMAX-like machine.\n");
+ printk("Zero sysid returned from PROM! "
+ "Assuming a PMAX-like machine.\n");
dec_sysid = 1;
}
}
@@ -163,10 +170,8 @@ void __init prom_identify_arch(u32 magic
}
if (mips_machtype == MACH_DSUNKNOWN)
- prom_printf("This is an %s, id is %x\n",
- dec_system_strings[mips_machtype],
- dec_systype);
+ printk("This is an %s, id is %x\n",
+ dec_system_strings[mips_machtype], dec_systype);
else
- prom_printf("This is a %s\n",
- dec_system_strings[mips_machtype]);
+ printk("This is a %s\n", dec_system_strings[mips_machtype]);
}
diff -puN arch/mips/dec/prom/init.c~mips-megapatch arch/mips/dec/prom/init.c
--- 25/arch/mips/dec/prom/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/prom/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -2,11 +2,12 @@
* init.c: PROM library initialisation code.
*
* Copyright (C) 1998 Harald Koerfgen
- * Copyright (C) 2002 Maciej W. Rozycki
+ * Copyright (C) 2002, 2004 Maciej W. Rozycki
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/smp.h>
+#include <linux/string.h>
#include <linux/types.h>
#include <asm/bootinfo.h>
@@ -35,7 +36,7 @@ int (*__pmax_close)(int);
/*
- * Detect which PROM's the DECSTATION has, and set the callback vectors
+ * Detect which PROM the DECSTATION has, and set the callback vectors
* appropriately.
*/
void __init which_prom(s32 magic, s32 *prom_vec)
@@ -82,12 +83,22 @@ void __init which_prom(s32 magic, s32 *p
}
}
-int __init prom_init(s32 argc, s32 *argv, u32 magic, s32 *prom_vec)
+void __init prom_init(void)
{
extern void dec_machine_halt(void);
+ static char cpu_msg[] __initdata =
+ "Sorry, this kernel is compiled for a wrong CPU type!\n";
+ static char r3k_msg[] __initdata =
+ "Please recompile with \"CONFIG_CPU_R3000 = y\".\n";
+ static char r4k_msg[] __initdata =
+ "Please recompile with \"CONFIG_CPU_R4x00 = y\".\n";
+ s32 argc = fw_arg0;
+ s32 argv = fw_arg1;
+ u32 magic = fw_arg2;
+ s32 prom_vec = fw_arg3;
/*
- * Determine which PROM's we have
+ * Determine which PROM we have
* (and therefore which machine we're on!)
*/
which_prom(magic, prom_vec);
@@ -95,12 +106,15 @@ int __init prom_init(s32 argc, s32 *argv
if (prom_is_rex(magic))
rex_clear_cache();
+ /* Register the early console. */
+ register_prom_console();
+
/* Were we compiled with the right CPU option? */
#if defined(CONFIG_CPU_R3000)
if ((current_cpu_data.cputype == CPU_R4000SC) ||
(current_cpu_data.cputype == CPU_R4400SC)) {
- prom_printf("Sorry, this kernel is compiled for the wrong CPU type!\n");
- prom_printf("Please recompile with \"CONFIG_CPU_R4x00 = y\"\n");
+ printk(cpu_msg);
+ printk(r4k_msg);
dec_machine_halt();
}
#endif
@@ -108,8 +122,8 @@ int __init prom_init(s32 argc, s32 *argv
#if defined(CONFIG_CPU_R4X00)
if ((current_cpu_data.cputype == CPU_R3000) ||
(current_cpu_data.cputype == CPU_R3000A)) {
- prom_printf("Sorry, this kernel is compiled for the wrong CPU type!\n");
- prom_printf("Please recompile with \"CONFIG_CPU_R3000 = y\"\n");
+ printk(cpu_msg);
+ printk(r3k_msg);
dec_machine_halt();
}
#endif
@@ -117,6 +131,4 @@ int __init prom_init(s32 argc, s32 *argv
prom_meminit(magic);
prom_identify_arch(magic);
prom_init_cmdline(argc, argv, magic);
-
- return 0;
}
diff -puN arch/mips/dec/prom/Makefile~mips-megapatch arch/mips/dec/prom/Makefile
--- 25/arch/mips/dec/prom/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/prom/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -3,7 +3,7 @@
# under Linux.
#
-lib-y += init.o memory.o cmdline.o identify.o
+lib-y += init.o memory.o cmdline.o identify.o console.o
lib-$(CONFIG_MIPS32) += locore.o
lib-$(CONFIG_MIPS64) += call_o32.o
diff -puN arch/mips/dec/prom/memory.c~mips-megapatch arch/mips/dec/prom/memory.c
--- 25/arch/mips/dec/prom/memory.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/prom/memory.c 2004-02-19 12:53:00.000000000 -0800
@@ -93,7 +93,7 @@ void __init prom_meminit(u32 magic)
rex_setup_memory_region();
}
-void __init prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
unsigned long addr, end;
@@ -125,4 +125,6 @@ void __init prom_free_prom_memory (void)
printk("Freeing unused PROM memory: %ldk freed\n",
(end - PAGE_SIZE) >> 10);
+
+ return end - PAGE_SIZE;
}
diff -puN arch/mips/dec/reset.c~mips-megapatch arch/mips/dec/reset.c
--- 25/arch/mips/dec/reset.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/reset.c 2004-02-19 12:53:00.000000000 -0800
@@ -4,29 +4,38 @@
* Copyright (C) 199x the Anonymous
* Copyright (C) 2001, 2002, 2003 Maciej W. Rozycki
*/
+#include <linux/interrupt.h>
+#include <linux/linkage.h>
#include <asm/addrspace.h>
#include <asm/ptrace.h>
-#define back_to_prom() (((void (*)(void))KSEG1ADDR(0x1fc00000))())
+typedef void ATTRIB_NORET (* noret_func_t)(void);
-void dec_machine_restart(char *command)
+static inline void ATTRIB_NORET back_to_prom(void)
+{
+ noret_func_t func = (void *) KSEG1ADDR(0x1fc00000);
+
+ func();
+}
+
+void ATTRIB_NORET dec_machine_restart(char *command)
{
back_to_prom();
}
-void dec_machine_halt(void)
+void ATTRIB_NORET dec_machine_halt(void)
{
back_to_prom();
}
-void dec_machine_power_off(void)
+void ATTRIB_NORET dec_machine_power_off(void)
{
/* DECstations don't have a software power switch */
back_to_prom();
}
-void dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs)
{
dec_machine_halt();
}
diff -puN -L arch/mips/dec/rtc-dec.c arch/mips/dec/rtc-dec.c~mips-megapatch /dev/null
--- 25/arch/mips/dec/rtc-dec.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,40 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * RTC routines for DECstation style attached Dallas DS1287 chip.
- *
- * Copyright (C) 1998, 2001 by Ralf Baechle
- * Copyright (C) 1998 by Harald Koerfgen
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-
-#include <linux/mc146818rtc.h>
-#include <linux/module.h>
-#include <linux/types.h>
-
-volatile u8 *dec_rtc_base;
-
-static unsigned char dec_rtc_read_data(unsigned long addr)
-{
- return dec_rtc_base[addr * 4];
-}
-
-static void dec_rtc_write_data(unsigned char data, unsigned long addr)
-{
- dec_rtc_base[addr * 4] = data;
-}
-
-static int dec_rtc_bcd_mode(void)
-{
- return 0;
-}
-
-struct rtc_ops dec_rtc_ops = {
- &dec_rtc_read_data,
- &dec_rtc_write_data,
- &dec_rtc_bcd_mode
-};
-
-EXPORT_SYMBOL(dec_rtc_base);
diff -puN arch/mips/dec/setup.c~mips-megapatch arch/mips/dec/setup.c
--- 25/arch/mips/dec/setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -11,7 +11,6 @@
#include <linux/config.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
-#include <linux/mc146818rtc.h>
#include <linux/param.h>
#include <linux/console.h>
#include <linux/init.h>
@@ -19,12 +18,14 @@
#include <linux/spinlock.h>
#include <linux/types.h>
-#include <asm/cpu.h>
#include <asm/bootinfo.h>
+#include <asm/cpu.h>
+#include <asm/cpu-features.h>
#include <asm/irq.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/reboot.h>
+#include <asm/time.h>
#include <asm/traps.h>
#include <asm/wbflush.h>
@@ -43,10 +44,15 @@
extern void dec_machine_restart(char *command);
extern void dec_machine_halt(void);
extern void dec_machine_power_off(void);
-extern void dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs);
+extern irqreturn_t dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs);
extern asmlinkage void decstation_handle_int(void);
+#ifdef CONFIG_BLK_DEV_INITRD
+extern unsigned long initrd_start, initrd_end;
+extern void * __rd_start, * __rd_end;
+#endif
+
spinlock_t ioasic_ssr_lock;
volatile u32 *ioasic_base;
@@ -105,28 +111,6 @@ static struct irqaction haltirq = {
};
-void (*board_time_init)(struct irqaction *irq);
-
-
-/*
- * enable the periodic interrupts
- */
-static void __init dec_time_init(struct irqaction *irq)
-{
- /*
- * Here we go, enable periodic rtc interrupts.
- */
-
-#ifndef LOG_2_HZ
-# define LOG_2_HZ 7
-#endif
-
- CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - LOG_2_HZ), RTC_REG_A);
- CMOS_WRITE(CMOS_READ(RTC_REG_B) | RTC_PIE, RTC_REG_B);
- setup_irq(dec_interrupt[DEC_IRQ_RTC], irq);
-}
-
-
/*
* Bus error (DBE/IBE exceptions and bus interrupts) handling setup.
*/
@@ -147,24 +131,28 @@ void __init dec_be_init(void)
}
-void __init decstation_setup(void)
+extern void dec_time_init(void);
+extern void dec_timer_setup(struct irqaction *);
+
+static void __init decstation_setup(void)
{
+#ifdef CONFIG_BLK_DEV_INITRD
+ ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
+ initrd_start = (unsigned long)&__rd_start;
+ initrd_end = (unsigned long)&__rd_end;
+#endif
board_be_init = dec_be_init;
board_time_init = dec_time_init;
+ board_timer_setup = dec_timer_setup;
wbflush_setup();
_machine_restart = dec_machine_restart;
_machine_halt = dec_machine_halt;
_machine_power_off = dec_machine_power_off;
-
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
- rtc_ops = &dec_rtc_ops;
}
+early_initcall(decstation_setup);
/*
* Machine-specific initialisation for KN01, aka DS2100 (aka Pmin)
diff -puN arch/mips/dec/time.c~mips-megapatch arch/mips/dec/time.c
--- 25/arch/mips/dec/time.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/dec/time.c 2004-02-19 12:53:00.000000000 -0800
@@ -9,283 +9,98 @@
*
*/
#include <linux/bcd.h>
-#include <linux/module.h>
-#include <linux/types.h>
#include <linux/errno.h>
#include <linux/init.h>
-#include <linux/sched.h>
+#include <linux/interrupt.h>
#include <linux/kernel.h>
+#include <linux/mc146818rtc.h>
+#include <linux/mm.h>
+#include <linux/module.h>
#include <linux/param.h>
+#include <linux/sched.h>
#include <linux/string.h>
-#include <linux/mm.h>
#include <linux/time.h>
-#include <linux/interrupt.h>
-#include <linux/bcd.h>
+#include <linux/types.h>
-#include <asm/cpu.h>
#include <asm/bootinfo.h>
-#include <asm/mipsregs.h>
+#include <asm/cpu.h>
+#include <asm/div64.h>
#include <asm/io.h>
#include <asm/irq.h>
+#include <asm/mipsregs.h>
#include <asm/sections.h>
-#include <asm/dec/machtype.h>
+#include <asm/time.h>
+
+#include <asm/dec/interrupts.h>
#include <asm/dec/ioasic.h>
#include <asm/dec/ioasic_addrs.h>
+#include <asm/dec/machtype.h>
-#include <linux/mc146818rtc.h>
-#include <linux/timex.h>
-
-#include <asm/div64.h>
-
-extern void (*board_time_init)(struct irqaction *irq);
-
-extern volatile unsigned long wall_jiffies;
-
-/*
- * Change this if you have some constant time drift
- */
-/* This is the value for the PC-style PICs. */
-/* #define USECS_PER_JIFFY (1000020/HZ) */
-
-/* This is for machines which generate the exact clock. */
-#define USECS_PER_JIFFY (1000000/HZ)
-#define USECS_PER_JIFFY_FRAC ((u32)((1000000ULL << 32) / HZ))
-
-#define TICK_SIZE (tick_nsec / 1000)
-
-/* Cycle counter value at the previous timer interrupt.. */
-
-static unsigned int timerhi, timerlo;
-
-/*
- * Cached "1/(clocks per usec)*2^32" value.
- * It has to be recalculated once each jiffy.
- */
-static unsigned long cached_quotient = 0;
-
-/* Last jiffy when do_fast_gettimeoffset() was called. */
-static unsigned long last_jiffies = 0;
-
-/*
- * On MIPS only R4000 and better have a cycle counter.
- *
- * FIXME: Does playing with the RP bit in c0_status interfere with this code?
- */
-static unsigned long do_fast_gettimeoffset(void)
-{
- u32 count;
- unsigned long res, tmp;
- unsigned long quotient;
-
- tmp = jiffies;
-
- quotient = cached_quotient;
-
- if (last_jiffies != tmp) {
- last_jiffies = tmp;
- if (last_jiffies != 0) {
- unsigned long r0;
- __asm__(".set push\n\t"
- ".set mips3\n\t"
- "lwu %0,%3\n\t"
- "dsll32 %1,%2,0\n\t"
- "or %1,%1,%0\n\t"
- "ddivu $0,%1,%4\n\t"
- "mflo %1\n\t"
- "dsll32 %0,%5,0\n\t"
- "or %0,%0,%6\n\t"
- "ddivu $0,%0,%1\n\t"
- "mflo %0\n\t"
- ".set pop"
- : "=&r" (quotient), "=&r" (r0)
- : "r" (timerhi), "m" (timerlo),
- "r" (tmp), "r" (USECS_PER_JIFFY),
- "r" (USECS_PER_JIFFY_FRAC));
- cached_quotient = quotient;
- }
- }
- /* Get last timer tick in absolute kernel time */
- count = read_c0_count();
-
- /* .. relative to previous jiffy (32 bits is enough) */
- count -= timerlo;
-//printk("count: %08lx, %08lx:%08lx\n", count, timerhi, timerlo);
-
- __asm__("multu %2,%3"
- : "=l" (tmp), "=h" (res)
- : "r" (count), "r" (quotient));
-
- /*
- * Due to possible jiffies inconsistencies, we need to check
- * the result so that we'll get a timer that is monotonic.
- */
- if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY - 1;
-
- return res;
-}
-static unsigned long do_ioasic_gettimeoffset(void)
+static unsigned long dec_rtc_get_time(void)
{
- u32 count;
- unsigned long res, tmp;
- unsigned long quotient;
-
- tmp = jiffies;
-
- quotient = cached_quotient;
-
- if (last_jiffies != tmp) {
- last_jiffies = tmp;
- if (last_jiffies != 0) {
- unsigned long r0;
- do_div64_32(r0, timerhi, timerlo, tmp);
- do_div64_32(quotient, USECS_PER_JIFFY,
- USECS_PER_JIFFY_FRAC, r0);
- cached_quotient = quotient;
- }
- }
- /* Get last timer tick in absolute kernel time */
- count = ioasic_read(IO_REG_FCTR);
-
- /* .. relative to previous jiffy (32 bits is enough) */
- count -= timerlo;
-//printk("count: %08x, %08x:%08x\n", count, timerhi, timerlo);
-
- __asm__("multu %2,%3"
- : "=l" (tmp), "=h" (res)
- : "r" (count), "r" (quotient));
-
- /*
- * Due to possible jiffies inconsistencies, we need to check
- * the result so that we'll get a timer that is monotonic.
- */
- if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY - 1;
-
- return res;
-}
-
-/* This function must be called with interrupts disabled
- * It was inspired by Steve McCanne's microtime-i386 for BSD. -- jrs
- *
- * However, the pc-audio speaker driver changes the divisor so that
- * it gets interrupted rather more often - it loads 64 into the
- * counter rather than 11932! This has an adverse impact on
- * do_gettimeoffset() -- it stops working! What is also not
- * good is that the interval that our timer function gets called
- * is no longer 10.0002 ms, but 9.9767 ms. To get around this
- * would require using a different timing source. Maybe someone
- * could use the RTC - I know that this can interrupt at frequencies
- * ranging from 8192Hz to 2Hz. If I had the energy, I'd somehow fix
- * it so that at startup, the timer code in sched.c would select
- * using either the RTC or the 8253 timer. The decision would be
- * based on whether there was any other device around that needed
- * to trample on the 8253. I'd set up the RTC to interrupt at 1024 Hz,
- * and then do some jiggery to have a version of do_timer that
- * advanced the clock by 1/1024 s. Every time that reached over 1/100
- * of a second, then do all the old code. If the time was kept correct
- * then do_gettimeoffset could just return 0 - there is no low order
- * divider that can be accessed.
- *
- * Ideally, you would be able to use the RTC for the speaker driver,
- * but it appears that the speaker driver really needs interrupt more
- * often than every 120 us or so.
- *
- * Anyway, this needs more thought.... pjsg (1993-08-28)
- *
- * If you are really that interested, you should be reading
- * comp.protocols.time.ntp!
- */
+ unsigned int year, mon, day, hour, min, sec, real_year;
+ int i;
-static unsigned long do_slow_gettimeoffset(void)
-{
- /*
- * This is a kludge until I find a way for the
- * DECstations without bus cycle counter. HK
+ /* The Linux interpretation of the DS1287 clock register contents:
+ * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
+ * RTC registers show the second which has precisely just started.
+ * Let's hope other operating systems interpret the RTC the same way.
*/
- return 0;
-}
-
-static unsigned long (*do_gettimeoffset) (void) = do_slow_gettimeoffset;
-
-/*
- * This version of gettimeofday has microsecond resolution
- * and better than microsecond precision on fast x86 machines with TSC.
- */
-void do_gettimeofday(struct timeval *tv)
-{
- unsigned long seq;
- unsigned long usec, sec;
-
+ /* read RTC exactly on falling edge of update flag */
+ for (i = 0; i < 1000000; i++) /* may take up to 1 second... */
+ if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
+ break;
+ for (i = 0; i < 1000000; i++) /* must try at least 2.228 ms */
+ if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
+ break;
+ /* Isn't this overkill? UIP above should guarantee consistency */
do {
- seq = read_seqbegin(&xtime_lock);
- usec = do_gettimeoffset();
- {
- unsigned long lost = jiffies - wall_jiffies;
- if (lost)
- usec += lost * (1000000 / HZ);
- }
- sec = xtime.tv_sec;
- usec += (xtime.tv_nsec / 1000);
- } while (read_seqretry(&xtime_lock, seq));
-
- while (usec >= 1000000) {
- usec -= 1000000;
- sec++;
+ sec = CMOS_READ(RTC_SECONDS);
+ min = CMOS_READ(RTC_MINUTES);
+ hour = CMOS_READ(RTC_HOURS);
+ day = CMOS_READ(RTC_DAY_OF_MONTH);
+ mon = CMOS_READ(RTC_MONTH);
+ year = CMOS_READ(RTC_YEAR);
+ } while (sec != CMOS_READ(RTC_SECONDS));
+ if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
+ sec = BCD2BIN(sec);
+ min = BCD2BIN(min);
+ hour = BCD2BIN(hour);
+ day = BCD2BIN(day);
+ mon = BCD2BIN(mon);
+ year = BCD2BIN(year);
}
-
- tv->tv_sec = sec;
- tv->tv_usec = usec;
-}
-
-EXPORT_SYMBOL(do_gettimeofday);
-
-void do_settimeofday(struct timeval *tv)
-{
- write_seqlock_irq(&xtime_lock);
/*
- * This is revolting. We need to set "xtime" correctly. However, the
- * value in this location is the value at the most recent update of
- * wall time. Discover what correction gettimeofday() would have
- * made, and then undo it!
+ * The PROM will reset the year to either '72 or '73.
+ * Therefore we store the real year separately, in one
+ * of unused BBU RAM locations.
*/
- tv->tv_usec -= do_gettimeoffset();
- tv->tv_usec -= (jiffies - wall_jiffies) * (1000000 / HZ);
-
- while (tv->tv_usec < 0) {
- tv->tv_usec += 1000000;
- tv->tv_sec--;
- }
+ real_year = CMOS_READ(RTC_DEC_YEAR);
+ year += real_year - 72 + 2000;
- xtime.tv_sec = tv->tv_sec;
- xtime.tv_nsec = (tv->tv_usec * 1000);
- time_adjust = 0; /* stop active adjtime() */
- time_status |= STA_UNSYNC;
- time_maxerror = NTP_PHASE_LIMIT;
- time_esterror = NTP_PHASE_LIMIT;
- write_sequnlock_irq(&xtime_lock);
+ return mktime(year, mon, day, hour, min, sec);
}
-EXPORT_SYMBOL(do_settimeofday);
-
/*
- * In order to set the CMOS clock precisely, set_rtc_mmss has to be
- * called 500 ms after the second nowtime has started, because when
+ * In order to set the CMOS clock precisely, dec_rtc_set_mmss has to
+ * be called 500 ms after the second nowtime has started, because when
* nowtime is written into the registers of the CMOS clock, it will
- * jump to the next second precisely 500 ms later. Check the Motorola
- * MC146818A or Dallas DS12887 data sheet for details.
+ * jump to the next second precisely 500 ms later. Check the Dallas
+ * DS1287 data sheet for details.
*/
-static int set_rtc_mmss(unsigned long nowtime)
+static int dec_rtc_set_mmss(unsigned long nowtime)
{
int retval = 0;
int real_seconds, real_minutes, cmos_minutes;
unsigned char save_control, save_freq_select;
- save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
+ /* tell the clock it's being set */
+ save_control = CMOS_READ(RTC_CONTROL);
CMOS_WRITE((save_control | RTC_SET), RTC_CONTROL);
- save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
+ /* stop and reset prescaler */
+ save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
CMOS_WRITE((save_freq_select | RTC_DIV_RESET2), RTC_FREQ_SELECT);
cmos_minutes = CMOS_READ(RTC_MINUTES);
@@ -319,10 +134,9 @@ static int set_rtc_mmss(unsigned long no
}
/* The following flags have to be released exactly in this order,
- * otherwise the DS12887 (popular MC146818A clone with integrated
- * battery and quartz) will not reset the oscillator and will not
- * update precisely 500 ms later. You won't find this mentioned in
- * the Dallas Semiconductor data sheets, but who believes data
+ * otherwise the DS1287 will not reset the oscillator and will not
+ * update precisely 500 ms later. You won't find this mentioned
+ * in the Dallas Semiconductor data sheets, but who believes data
* sheets anyway ... -- Markus Kuhn
*/
CMOS_WRITE(save_control, RTC_CONTROL);
@@ -331,177 +145,56 @@ static int set_rtc_mmss(unsigned long no
return retval;
}
-/* last time the cmos clock got updated */
-static long last_rtc_update;
-/*
- * timer_interrupt() needs to keep up the real-time clock,
- * as well as call the "do_timer()" routine every clocktick
- */
-static inline void
-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+static int dec_timer_state(void)
{
- volatile unsigned char dummy;
- unsigned long seq;
-
- dummy = CMOS_READ(RTC_REG_C); /* ACK RTC Interrupt */
-
- if (!user_mode(regs)) {
- if (prof_buffer && current->pid) {
- unsigned long pc = regs->cp0_epc;
-
- pc -= (unsigned long) _stext;
- pc >>= prof_shift;
- /*
- * Dont ignore out-of-bounds pc values silently,
- * put them into the last histogram slot, so if
- * present, they will show up as a sharp peak.
- */
- if (pc > prof_len - 1)
- pc = prof_len - 1;
- atomic_inc((atomic_t *) & prof_buffer[pc]);
- }
- }
- do_timer(regs);
-
- /*
- * If we have an externally synchronized Linux clock, then update
- * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
- * called as close as possible to 500 ms before the new second starts.
- */
- do {
- seq = read_seqbegin(&xtime_lock);
-
- if ((time_status & STA_UNSYNC) == 0
- && xtime.tv_sec > last_rtc_update + 660
- && (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2
- && (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
- if (set_rtc_mmss(xtime.tv_sec) == 0)
- last_rtc_update = xtime.tv_sec;
- else
- /* do it again in 60 s */
- last_rtc_update = xtime.tv_sec - 600;
- }
- } while (read_seqretry(&xtime_lock, seq));
-
- /* As we return to user mode fire off the other CPU schedulers.. this is
- basically because we don't yet share IRQ's around. This message is
- rigged to be safe on the 386 - basically it's a hack, so don't look
- closely for now.. */
- /*smp_message_pass(MSG_ALL_BUT_SELF, MSG_RESCHEDULE, 0L, 0); */
- write_sequnlock(&xtime_lock);
+ return (CMOS_READ(RTC_REG_C) & RTC_PF) != 0;
}
-static void r4k_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+static void dec_timer_ack(void)
{
- unsigned int count;
+ CMOS_READ(RTC_REG_C); /* Ack the RTC interrupt. */
+}
+static unsigned int dec_ioasic_hpt_read(void)
+{
/*
- * The cycle counter is only 32 bit which is good for about
- * a minute at current count rates of upto 150MHz or so.
+ * The free-running counter is 32-bit which is good for about
+ * 2 minutes, 50 seconds at possible count rates of up to 25MHz.
*/
- count = read_c0_count();
- timerhi += (count < timerlo); /* Wrap around */
- timerlo = count;
-
- if (jiffies == ~0) {
- /*
- * If jiffies is to overflow in this timer_interrupt we must
- * update the timer[hi]/[lo] to make do_fast_gettimeoffset()
- * quotient calc still valid. -arca
- */
- write_c0_count(0);
- timerhi = timerlo = 0;
- }
+ return ioasic_read(IO_REG_FCTR);
+}
- timer_interrupt(irq, dev_id, regs);
+static void dec_ioasic_hpt_init(unsigned int count)
+{
+ ioasic_write(IO_REG_FCTR, ioasic_read(IO_REG_FCTR) - count);
}
-static void ioasic_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+
+void __init dec_time_init(void)
{
- unsigned int count;
+ rtc_get_time = dec_rtc_get_time;
+ rtc_set_mmss = dec_rtc_set_mmss;
- /*
- * The free-running counter is 32 bit which is good for about
- * 2 minutes, 50 seconds at possible count rates of upto 25MHz.
- */
- count = ioasic_read(IO_REG_FCTR);
- timerhi += (count < timerlo); /* Wrap around */
- timerlo = count;
-
- if (jiffies == ~0) {
- /*
- * If jiffies is to overflow in this timer_interrupt we must
- * update the timer[hi]/[lo] to make do_fast_gettimeoffset()
- * quotient calc still valid. -arca
- */
- ioasic_write(IO_REG_FCTR, 0);
- timerhi = timerlo = 0;
+ mips_timer_state = dec_timer_state;
+ mips_timer_ack = dec_timer_ack;
+
+ if (!cpu_has_counter && IOASIC) {
+ /* For pre-R4k systems we use the I/O ASIC's counter. */
+ mips_hpt_read = dec_ioasic_hpt_read;
+ mips_hpt_init = dec_ioasic_hpt_init;
}
- timer_interrupt(irq, dev_id, regs);
+ /* Set up the rate of periodic DS1287 interrupts. */
+ CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - LOG_2_HZ), RTC_REG_A);
}
-struct irqaction irq0 = {
- .handler = timer_interrupt,
- .flags = SA_INTERRUPT,
- .name = "timer",
-};
+EXPORT_SYMBOL(do_settimeofday);
-void __init time_init(void)
+void __init dec_timer_setup(struct irqaction *irq)
{
- unsigned int year, mon, day, hour, min, sec, real_year;
- int i;
-
- /* The Linux interpretation of the CMOS clock register contents:
- * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
- * RTC registers show the second which has precisely just started.
- * Let's hope other operating systems interpret the RTC the same way.
- */
- /* read RTC exactly on falling edge of update flag */
- for (i = 0; i < 1000000; i++) /* may take up to 1 second... */
- if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
- break;
- for (i = 0; i < 1000000; i++) /* must try at least 2.228 ms */
- if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
- break;
- do { /* Isn't this overkill ? UIP above should guarantee consistency */
- sec = CMOS_READ(RTC_SECONDS);
- min = CMOS_READ(RTC_MINUTES);
- hour = CMOS_READ(RTC_HOURS);
- day = CMOS_READ(RTC_DAY_OF_MONTH);
- mon = CMOS_READ(RTC_MONTH);
- year = CMOS_READ(RTC_YEAR);
- } while (sec != CMOS_READ(RTC_SECONDS));
- if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
- sec = BCD2BIN(sec);
- min = BCD2BIN(min);
- hour = BCD2BIN(hour);
- day = BCD2BIN(day);
- mon = BCD2BIN(mon);
- year = BCD2BIN(year);
- }
- /*
- * The PROM will reset the year to either '72 or '73.
- * Therefore we store the real year separately, in one
- * of unused BBU RAM locations.
- */
- real_year = CMOS_READ(RTC_DEC_YEAR);
- year += real_year - 72 + 2000;
+ setup_irq(dec_interrupt[DEC_IRQ_RTC], irq);
- write_seqlock_irq(&xtime_lock);
- xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
- xtime.tv_nsec = 0;
- write_sequnlock_irq(&xtime_lock);
-
- if (cpu_has_counter) {
- write_c0_count(0);
- do_gettimeoffset = do_fast_gettimeoffset;
- irq0.handler = r4k_timer_interrupt;
- } else if (IOASIC) {
- ioasic_write(IO_REG_FCTR, 0);
- do_gettimeoffset = do_ioasic_gettimeoffset;
- irq0.handler = ioasic_timer_interrupt;
- }
- board_time_init(&irq0);
+ /* Enable periodic DS1287 interrupts. */
+ CMOS_WRITE(CMOS_READ(RTC_REG_B) | RTC_PIE, RTC_REG_B);
}
diff -puN arch/mips/defconfig~mips-megapatch arch/mips/defconfig
--- 25/arch/mips/defconfig~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -3,12 +3,16 @@
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
CONFIG_MIPS32=y
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
#
# General setup
@@ -18,12 +22,16 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
#
# Loadable module support
@@ -38,51 +46,45 @@ CONFIG_KMOD=y
#
# Machine selection
#
-# CONFIG_ACER_PICA_61 is not set
+# CONFIG_MACH_JAZZ is not set
# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
+# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_IVR is not set
# CONFIG_LASAT is not set
# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
CONFIG_SGI_IP22=y
# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
CONFIG_ARC=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_NONCOHERENT_IO=y
+CONFIG_DMA_NONCOHERENT=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_BOOT_ELF32=y
-CONFIG_L1_CACHE_SHIFT=5
+CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_ARC32=y
# CONFIG_FB is not set
CONFIG_ARC_CONSOLE=y
@@ -107,7 +109,11 @@ CONFIG_CPU_R5000=y
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
CONFIG_R5000_CPU_SCACHE=y
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
@@ -127,13 +133,20 @@ CONFIG_MMU=y
#
# Executable file formats
#
-CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
+CONFIG_BINFMT_MISC=m
CONFIG_TRAD_SIGNALS=y
CONFIG_BINFMT_IRIX=y
#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
@@ -146,12 +159,6 @@ CONFIG_BINFMT_IRIX=y
#
# Plug and Play support
#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
#
# Block devices
@@ -172,6 +179,7 @@ CONFIG_BINFMT_IRIX=y
# SCSI device support
#
CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
@@ -195,9 +203,8 @@ CONFIG_SCSI_CONSTANTS=y
# SCSI low-level drivers
#
CONFIG_SGIWD93_SCSI=y
-# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_DEBUG is not set
@@ -212,10 +219,19 @@ CONFIG_SGIWD93_SCSI=y
# CONFIG_FUSION is not set
#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
# I2O device support
#
#
+# Macintosh device drivers
+#
+
+#
# Networking support
#
CONFIG_NET=y
@@ -226,7 +242,6 @@ CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
@@ -240,27 +255,156 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
+CONFIG_INET_ECN=y
# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+
+#
+# IP: Virtual Server Configuration
+#
+CONFIG_IP_VS=m
+# CONFIG_IP_VS_DEBUG is not set
+CONFIG_IP_VS_TAB_BITS=12
+
+#
+# IPVS transport protocol load balancing support
+#
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_PROTO_ESP=y
+CONFIG_IP_VS_PROTO_AH=y
+
+#
+# IPVS scheduler
+#
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_WLC=m
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_NQ=m
+
+#
+# IPVS application helper
+#
+CONFIG_IP_VS_FTP=m
+CONFIG_IPV6=m
+CONFIG_IPV6_PRIVACY=y
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_TUNNEL=m
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_CONNTRACK=m
+CONFIG_IP_NF_FTP=m
+CONFIG_IP_NF_IRC=m
+CONFIG_IP_NF_TFTP=m
+CONFIG_IP_NF_AMANDA=m
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_LIMIT=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_MAC=m
+CONFIG_IP_NF_MATCH_PKTTYPE=m
+CONFIG_IP_NF_MATCH_MARK=m
+CONFIG_IP_NF_MATCH_MULTIPORT=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_DSCP=m
+CONFIG_IP_NF_MATCH_AH_ESP=m
+CONFIG_IP_NF_MATCH_LENGTH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_TCPMSS=m
+CONFIG_IP_NF_MATCH_HELPER=m
+CONFIG_IP_NF_MATCH_STATE=m
+CONFIG_IP_NF_MATCH_CONNTRACK=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_IP_NF_NAT_LOCAL=y
+CONFIG_IP_NF_NAT_SNMP_BASIC=m
+CONFIG_IP_NF_NAT_IRC=m
+CONFIG_IP_NF_NAT_FTP=m
+CONFIG_IP_NF_NAT_TFTP=m
+CONFIG_IP_NF_NAT_AMANDA=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_DSCP=m
+CONFIG_IP_NF_TARGET_MARK=m
+CONFIG_IP_NF_TARGET_CLASSIFY=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_TARGET_TCPMSS=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+CONFIG_IP_NF_COMPAT_IPCHAINS=m
+CONFIG_IP_NF_COMPAT_IPFWADM=m
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_LIMIT=m
+CONFIG_IP6_NF_MATCH_MAC=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_MULTIPORT=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_MARK=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AHESP=m
+CONFIG_IP6_NF_MATCH_LENGTH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_MARK=m
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
+CONFIG_IPV6_SCTP__=m
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
+CONFIG_NET_DIVERT=y
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
@@ -269,18 +413,41 @@ CONFIG_IPV6_SCTP__=y
#
# QoS and/or fair queueing
#
-# CONFIG_NET_SCHED is not set
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_CSZ=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_INGRESS=m
+CONFIG_NET_QOS=y
+CONFIG_NET_ESTIMATOR=y
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+CONFIG_NET_CLS_POLICE=y
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+CONFIG_EQUALIZER=m
+CONFIG_TUN=m
+CONFIG_ETHERTAP=m
#
# Ethernet (10 or 100Mbit)
@@ -305,7 +472,7 @@ CONFIG_SGISEEQ=y
# CONFIG_NET_RADIO is not set
#
-# Token Ring devices (depends on LLC=y)
+# Token Ring devices
#
# CONFIG_SHAPER is not set
@@ -325,6 +492,11 @@ CONFIG_SGISEEQ=y
# CONFIG_IRDA is not set
#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
@@ -342,7 +514,10 @@ CONFIG_INPUT=y
#
# Userland interfaces
#
-# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
@@ -387,27 +562,12 @@ CONFIG_HW_CONSOLE=y
#
# Non-8250 serial port support
#
-CONFIG_SERIAL_IP22_ZILOG=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_IP22_ZILOG=m
+CONFIG_SERIAL_CORE=m
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
# Mice
#
# CONFIG_BUSMOUSE is not set
@@ -423,27 +583,12 @@ CONFIG_UNIX98_PTY_COUNT=256
#
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_WDTPCI is not set
-# CONFIG_PCWATCHDOG is not set
-# CONFIG_ACQUIRE_WDT is not set
-# CONFIG_ADVANTECH_WDT is not set
-# CONFIG_EUROTECH_WDT is not set
-# CONFIG_IB700_WDT is not set
-# CONFIG_I810_TCO is not set
-# CONFIG_MIXCOMWD is not set
-# CONFIG_SCx200_WDT is not set
-# CONFIG_60XX_WDT is not set
-# CONFIG_W83877F_WDT is not set
-# CONFIG_MACHZ_WDT is not set
-CONFIG_INDYDOG=y
-# CONFIG_SC520_WDT is not set
-# CONFIG_AMD7XX_TCO is not set
-# CONFIG_ALIM7101_WDT is not set
-# CONFIG_SC1200_WDT is not set
-# CONFIG_WAFER_WDT is not set
-# CONFIG_CPU5_WDT is not set
+CONFIG_INDYDOG=m
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
@@ -458,8 +603,13 @@ CONFIG_SGI_DS1286=y
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
+CONFIG_RAW_DRIVER=m
+CONFIG_MAX_RAW_DEVS=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
#
# Multimedia devices
@@ -472,9 +622,46 @@ CONFIG_SGI_DS1286=y
# CONFIG_DVB is not set
#
+# Graphics support
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_SGI_NEWPORT_CONSOLE=y
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FONT_8x16=y
+
+#
+# Logo configuration
+#
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+CONFIG_LOGO_SGI_CLUT224=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
# File systems
#
-# CONFIG_EXT2_FS is not set
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
CONFIG_EXT3_FS_POSIX_ACL=y
@@ -485,36 +672,48 @@ CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
+CONFIG_XFS_FS=m
+# CONFIG_XFS_RT is not set
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_SECURITY=y
+# CONFIG_XFS_POSIX_ACL is not set
+CONFIG_MINIX_FS=m
# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
+CONFIG_QUOTA=y
+# CONFIG_QFMT_V1 is not set
+CONFIG_QFMT_V2=m
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
#
# CD-ROM/DVD Filesystems
#
-CONFIG_ISO9660_FS=y
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_UDF_FS is not set
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_ZISOFS_FS=m
+CONFIG_UDF_FS=m
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
#
@@ -525,27 +724,30 @@ CONFIG_RAMFS=y
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
+CONFIG_EFS_FS=m
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
+CONFIG_UFS_FS=m
+# CONFIG_UFS_FS_WRITE is not set
#
# Network File Systems
#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V4 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=m
# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
@@ -576,46 +778,53 @@ CONFIG_SGI_PARTITION=y
# CONFIG_EFI_PARTITION is not set
#
-# Graphics support
+# Native Language Support
#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_SGI_NEWPORT_CONSOLE=y
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_FONT_8x16=y
-
-#
-# Logo configuration
-#
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-CONFIG_LOGO_SGI_CLUT224=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
# CONFIG_DEBUG_KERNEL is not set
#
@@ -639,6 +848,8 @@ CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_SERPENT=y
CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
CONFIG_CRYPTO_DEFLATE=y
# CONFIG_CRYPTO_TEST is not set
diff -puN -L arch/mips/defconfig-atlas arch/mips/defconfig-atlas~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-atlas
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,620 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-CONFIG_MIPS_ATLAS=y
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_NONCOHERENT_IO=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_MIPS_BOARDS_GEN=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_BOOT_ELF32=y
-CONFIG_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-# CONFIG_SCSI_CONSTANTS is not set
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_SYM53C8XX is not set
-# CONFIG_SCSI_PCI2000 is not set
-# CONFIG_SCSI_PCI2220I is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-capcella arch/mips/defconfig-capcella~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-capcella
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,616 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-CONFIG_ZAO_CAPCELLA=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_VR41XX_TIME_C=y
-CONFIG_DUMMY_KEYB=y
-CONFIG_VR41XX_COMMON=y
-CONFIG_NEW_PCI=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-CONFIG_CPU_VR41XX=y
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_IDEPCI is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_WDTPCI is not set
-# CONFIG_PCWATCHDOG is not set
-# CONFIG_ACQUIRE_WDT is not set
-# CONFIG_ADVANTECH_WDT is not set
-# CONFIG_EUROTECH_WDT is not set
-# CONFIG_IB700_WDT is not set
-# CONFIG_I810_TCO is not set
-# CONFIG_MIXCOMWD is not set
-# CONFIG_SCx200_WDT is not set
-# CONFIG_60XX_WDT is not set
-# CONFIG_W83877F_WDT is not set
-# CONFIG_MACHZ_WDT is not set
-# CONFIG_SC520_WDT is not set
-# CONFIG_AMD7XX_TCO is not set
-# CONFIG_ALIM7101_WDT is not set
-# CONFIG_SC1200_WDT is not set
-# CONFIG_WAFER_WDT is not set
-# CONFIG_CPU5_WDT is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-cobalt arch/mips/defconfig-cobalt~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-cobalt
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,581 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-CONFIG_MIPS_COBALT=y
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_I8259=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_COBALT_LCD=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-CONFIG_CPU_NEVADA=y
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_IDEPCI is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=16
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-CONFIG_HANGCHECK_TIMER=y
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-ddb5476 arch/mips/defconfig-ddb5476~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-ddb5476
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,616 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-CONFIG_DDB5476=y
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_I8259=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_DDB5XXX_COMMON=y
-CONFIG_NEW_PCI=y
-CONFIG_FB=y
-CONFIG_HAVE_STD_PC_SERIAL_PORT=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-CONFIG_CPU_R5432=y
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_IDEPCI is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-# CONFIG_FB_CIRRUS is not set
-# CONFIG_FB_PM2 is not set
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_IMSTT is not set
-# CONFIG_FB_RIVA is not set
-# CONFIG_FB_MATROX is not set
-# CONFIG_FB_RADEON is not set
-# CONFIG_FB_ATY128 is not set
-# CONFIG_FB_ATY is not set
-# CONFIG_FB_SIS is not set
-# CONFIG_FB_NEOMAGIC is not set
-# CONFIG_FB_3DFX is not set
-# CONFIG_FB_VOODOO1 is not set
-# CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_PM3 is not set
-# CONFIG_FB_E1356 is not set
-# CONFIG_FB_VIRTUAL is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE is not set
-
-#
-# Logo configuration
-#
-# CONFIG_LOGO is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-ddb5477 arch/mips/defconfig-ddb5477~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-ddb5477
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,597 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-CONFIG_DDB5477=y
-CONFIG_DDB5477_BUS_FREQUENCY=0
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_I8259=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_DUMMY_KEYB=y
-CONFIG_DDB5XXX_COMMON=y
-CONFIG_NEW_PCI=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-CONFIG_CPU_R5432=y
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
-# CONFIG_SND is not set
-
-#
-# Open Sound System
-#
-CONFIG_SOUND_PRIME=y
-# CONFIG_SOUND_BT878 is not set
-# CONFIG_SOUND_CMPCI is not set
-# CONFIG_SOUND_EMU10K1 is not set
-# CONFIG_SOUND_FUSION is not set
-# CONFIG_SOUND_CS4281 is not set
-# CONFIG_SOUND_ES1370 is not set
-# CONFIG_SOUND_ES1371 is not set
-# CONFIG_SOUND_ESSSOLO1 is not set
-# CONFIG_SOUND_MAESTRO is not set
-# CONFIG_SOUND_MAESTRO3 is not set
-# CONFIG_SOUND_ICH is not set
-# CONFIG_SOUND_RME96XX is not set
-# CONFIG_SOUND_SONICVIBES is not set
-CONFIG_SOUND_VRC5477=y
-# CONFIG_SOUND_TRIDENT is not set
-# CONFIG_SOUND_MSNDCLAS is not set
-# CONFIG_SOUND_MSNDPIN is not set
-# CONFIG_SOUND_VIA82CXXX is not set
-# CONFIG_SOUND_OSS is not set
-# CONFIG_SOUND_ALI5455 is not set
-# CONFIG_SOUND_FORTE is not set
-# CONFIG_SOUND_AD1980 is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-decstation arch/mips/defconfig-decstation~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-decstation
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,565 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-CONFIG_DECSTATION=y
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_BOOT_ELF32=y
-CONFIG_L1_CACHE_SHIFT=4
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-CONFIG_CPU_R3000=y
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_WB=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_TC=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-CONFIG_SCSI_DECNCR=y
-# CONFIG_SCSI_DECSII is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_DECLANCE=y
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_DZ=y
-CONFIG_SERIAL_DZ_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-# CONFIG_NFS_FS is not set
-# CONFIG_NFSD is not set
-# CONFIG_EXPORTFS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-CONFIG_OSF_PARTITION=y
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-CONFIG_ULTRIX_PARTITION=y
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-e55 arch/mips/defconfig-e55~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-e55
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,568 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-CONFIG_CASIO_E55=y
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_VR41XX_TIME_C=y
-CONFIG_DUMMY_KEYB=y
-CONFIG_VR41XX_COMMON=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-CONFIG_CPU_VR41XX=y
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_WDTPCI is not set
-# CONFIG_PCWATCHDOG is not set
-# CONFIG_ACQUIRE_WDT is not set
-# CONFIG_ADVANTECH_WDT is not set
-# CONFIG_EUROTECH_WDT is not set
-# CONFIG_IB700_WDT is not set
-# CONFIG_I810_TCO is not set
-# CONFIG_MIXCOMWD is not set
-# CONFIG_SCx200_WDT is not set
-# CONFIG_60XX_WDT is not set
-# CONFIG_W83877F_WDT is not set
-# CONFIG_MACHZ_WDT is not set
-# CONFIG_SC520_WDT is not set
-# CONFIG_AMD7XX_TCO is not set
-# CONFIG_ALIM7101_WDT is not set
-# CONFIG_SC1200_WDT is not set
-# CONFIG_WAFER_WDT is not set
-# CONFIG_CPU5_WDT is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-eagle arch/mips/defconfig-eagle~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-eagle
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,732 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-CONFIG_NEC_EAGLE=y
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_VR41XX_TIME_C=y
-CONFIG_DUMMY_KEYB=y
-CONFIG_VR41XX_COMMON=y
-CONFIG_VRC4173=y
-CONFIG_NEW_PCI=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-CONFIG_CPU_VR41XX=y
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=y
-# CONFIG_YENTA is not set
-# CONFIG_I82092 is not set
-# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_VRC4173 is not set
-
-#
-# PCI Hotplug Support
-#
-# CONFIG_HOTPLUG_PCI is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_PARTITIONS is not set
-# CONFIG_MTD_CONCAT is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x1c000000
-CONFIG_MTD_PHYSMAP_LEN=0x2000000
-CONFIG_MTD_PHYSMAP_BUSWIDTH=4
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-CONFIG_IDEDISK_MULTI_MODE=y
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECS=y
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_IDEPCI is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-CONFIG_PCMCIA_FMVJ18X=y
-CONFIG_PCMCIA_PCNET=m
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_CS is not set
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_WDTPCI is not set
-# CONFIG_PCWATCHDOG is not set
-# CONFIG_ACQUIRE_WDT is not set
-# CONFIG_ADVANTECH_WDT is not set
-# CONFIG_EUROTECH_WDT is not set
-# CONFIG_IB700_WDT is not set
-# CONFIG_I810_TCO is not set
-# CONFIG_MIXCOMWD is not set
-# CONFIG_SCx200_WDT is not set
-# CONFIG_60XX_WDT is not set
-# CONFIG_W83877F_WDT is not set
-# CONFIG_MACHZ_WDT is not set
-# CONFIG_SC520_WDT is not set
-# CONFIG_AMD7XX_TCO is not set
-# CONFIG_ALIM7101_WDT is not set
-# CONFIG_SC1200_WDT is not set
-# CONFIG_WAFER_WDT is not set
-# CONFIG_CPU5_WDT is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS_FS=y
-CONFIG_JFFS_FS_VERBOSE=0
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff -puN -L arch/mips/defconfig-ev64120 arch/mips/defconfig-ev64120~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-ev64120
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,575 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-# CONFIG_KMOD is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-CONFIG_MIPS_EV64120=y
-# CONFIG_EVB_PCI1 is not set
-CONFIG_SYSCLK_100=y
-# CONFIG_SYSCLK_75 is not set
-# CONFIG_SYSCLK_83 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_CONFIG_GT64120=y
-CONFIG_NONCOHERENT_IO=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_MIPS_GT64120=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-CONFIG_CPU_R5000=y
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=y
-# CONFIG_PPP_MULTILINK is not set
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=y
-# CONFIG_PPP_SYNC_TTY is not set
-# CONFIG_PPP_DEFLATE is not set
-# CONFIG_PPP_BSDCOMP is not set
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-# CONFIG_SERIAL_8250_CONSOLE is not set
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-ev96100 arch/mips/defconfig-ev96100~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-ev96100
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,527 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-# CONFIG_KMOD is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-CONFIG_MIPS_EV96100=y
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_NEW_PCI=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_MIPS_GT96100=y
-# CONFIG_FB is not set
-CONFIG_BOARD_SCACHE=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-CONFIG_CPU_RM7000=y
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-# CONFIG_PCI is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_MIPS_GT96100ETH=y
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-hp-lj arch/mips/defconfig-hp-lj~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-hp-lj
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,613 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-CONFIG_HP_LASERJET=y
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_NEW_PCI=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-CONFIG_CPU_R5000=y
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-# CONFIG_PCI is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=3
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-# CONFIG_MTD_CFI_STAA is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x10040000
-CONFIG_MTD_PHYSMAP_LEN=0x00fc0000
-CONFIG_MTD_PHYSMAP_BUSWIDTH=4
-# CONFIG_MTD_CSTM_MIPS_IXX is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-CONFIG_MTD_NAND=y
-# CONFIG_MTD_NAND_VERIFY_WRITE is not set
-CONFIG_MTD_NAND_IDS=y
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-CONFIG_NET_RADIO=y
-
-#
-# Obsolete Wireless cards support (pre-802.11)
-#
-# CONFIG_STRIP is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_UNIX98_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=3
-# CONFIG_JFFS2_FS_NAND is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff -puN -L arch/mips/defconfig-ip22 arch/mips/defconfig-ip22~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-ip22
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,650 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-CONFIG_SGI_IP22=y
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_ARC=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_NONCOHERENT_IO=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_IRQ_CPU=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_BOOT_ELF32=y
-CONFIG_L1_CACHE_SHIFT=5
-CONFIG_ARC32=y
-# CONFIG_FB is not set
-CONFIG_ARC_CONSOLE=y
-CONFIG_ARC_PROMLIB=y
-CONFIG_BOARD_SCACHE=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-CONFIG_CPU_R5000=y
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_R5000_CPU_SCACHE=y
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-# CONFIG_ISA is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-CONFIG_BINFMT_IRIX=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-# CONFIG_BLK_DEV_SR_VENDOR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-CONFIG_SGIWD93_SCSI=y
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_SGISEEQ=y
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_IP22_ZILOG=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_WDTPCI is not set
-# CONFIG_PCWATCHDOG is not set
-# CONFIG_ACQUIRE_WDT is not set
-# CONFIG_ADVANTECH_WDT is not set
-# CONFIG_EUROTECH_WDT is not set
-# CONFIG_IB700_WDT is not set
-# CONFIG_I810_TCO is not set
-# CONFIG_MIXCOMWD is not set
-# CONFIG_SCx200_WDT is not set
-# CONFIG_60XX_WDT is not set
-# CONFIG_W83877F_WDT is not set
-# CONFIG_MACHZ_WDT is not set
-CONFIG_INDYDOG=y
-# CONFIG_SC520_WDT is not set
-# CONFIG_AMD7XX_TCO is not set
-# CONFIG_ALIM7101_WDT is not set
-# CONFIG_SC1200_WDT is not set
-# CONFIG_WAFER_WDT is not set
-# CONFIG_CPU5_WDT is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-CONFIG_SGI_DS1286=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-CONFIG_SGI_PARTITION=y
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_SGI_NEWPORT_CONSOLE=y
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_FONT_8x16=y
-
-#
-# Logo configuration
-#
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-# CONFIG_LOGO_LINUX_CLUT224 is not set
-CONFIG_LOGO_SGI_CLUT224=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_BLOWFISH=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_SERPENT=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff -puN -L arch/mips/defconfig-ip27 arch/mips/defconfig-ip27~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-ip27
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,652 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-CONFIG_MIPS64=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=15
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-CONFIG_SGI_IP27=y
-# CONFIG_SGI_SN0_N_MODE is not set
-# CONFIG_DISCONTIGMEM is not set
-# CONFIG_NUMA is not set
-# CONFIG_MAPPED_KERNEL is not set
-# CONFIG_REPLICATE_KTEXT is not set
-# CONFIG_REPLICATE_EXHANDLERS is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_ARC=y
-CONFIG_GENERIC_ISA_DMA=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_L1_CACHE_SHIFT=7
-# CONFIG_FB is not set
-CONFIG_ARC64=y
-CONFIG_BOOT_ELF64=y
-CONFIG_QL_ISP_A64=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-CONFIG_CPU_R10000=y
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=4
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_MIPS_INSANE_LARGE is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_MIPS32_COMPAT=y
-CONFIG_COMPAT=y
-CONFIG_MIPS32_O32=y
-# CONFIG_MIPS32_N32 is not set
-CONFIG_BINFMT_ELF32=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_SYM53C8XX is not set
-# CONFIG_SCSI_PCI2000 is not set
-# CONFIG_SCSI_PCI2220I is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_SGI_IOC3_ETH=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-# CONFIG_SERIAL_8250_CONSOLE is not set
-CONFIG_SERIAL_8250_EXTENDED=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_RSA is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-CONFIG_SGI_IP27_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-CONFIG_JBD_DEBUG=y
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-CONFIG_SGI_PARTITION=y
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-ip32 arch/mips/defconfig-ip32~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-ip32
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,638 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-CONFIG_MIPS64=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-CONFIG_SGI_IP32=y
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_ARC=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_NONCOHERENT_IO=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_BOOT_ELF32=y
-CONFIG_L1_CACHE_SHIFT=5
-CONFIG_ARC32=y
-# CONFIG_FB is not set
-CONFIG_ARC_MEMORY=y
-CONFIG_ARC_PROMLIB=y
-CONFIG_BOARD_SCACHE=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-CONFIG_CPU_R5000=y
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_R5000_CPU_SCACHE=y
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=y
-CONFIG_MIPS32_COMPAT=y
-CONFIG_COMPAT=y
-CONFIG_MIPS32_O32=y
-# CONFIG_MIPS32_N32 is not set
-CONFIG_BINFMT_ELF32=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_CHR_DEV_OSST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=y
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-CONFIG_SCSI_AIC7XXX=y
-CONFIG_AIC7XXX_CMDS_PER_DEVICE=8
-CONFIG_AIC7XXX_RESET_DELAY_MS=15000
-# CONFIG_AIC7XXX_PROBE_EISA_VL is not set
-# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
-CONFIG_AIC7XXX_DEBUG_ENABLE=y
-CONFIG_AIC7XXX_DEBUG_MASK=0
-CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_SYM53C8XX is not set
-# CONFIG_SCSI_PCI2000 is not set
-# CONFIG_SCSI_PCI2220I is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_SGI_O2MACE_ETH=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-CONFIG_SGI_PARTITION=y
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-it8172 arch/mips/defconfig-it8172~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-it8172
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,631 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-CONFIG_MIPS_ITE8172=y
-# CONFIG_IT8172_REVC is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_ITE_BOARD_GEN=y
-CONFIG_NEW_PCI=y
-CONFIG_IT8172_CIR=y
-CONFIG_IT8712=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-CONFIG_CPU_NEVADA=y
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-# CONFIG_PCI is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_PARTITIONS is not set
-# CONFIG_MTD_CONCAT is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-# CONFIG_MTD_BLOCK is not set
-# CONFIG_MTD_BLOCK_RO is not set
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x8000000
-CONFIG_MTD_PHYSMAP_LEN=0x2000000
-CONFIG_MTD_PHYSMAP_BUSWIDTH=4
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_QTRONIX_KEYBOARD is not set
-# CONFIG_IT8172_SCR0 is not set
-# CONFIG_IT8172_SCR1 is not set
-# CONFIG_ITE_GPIO is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_JFFS2_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
-# CONFIG_SND is not set
-
-#
-# Open Sound System
-#
-CONFIG_SOUND_PRIME=y
-# CONFIG_SOUND_BT878 is not set
-# CONFIG_SOUND_FUSION is not set
-# CONFIG_SOUND_CS4281 is not set
-# CONFIG_SOUND_ESSSOLO1 is not set
-# CONFIG_SOUND_MAESTRO is not set
-# CONFIG_SOUND_SONICVIBES is not set
-CONFIG_SOUND_IT8172=y
-# CONFIG_SOUND_TRIDENT is not set
-# CONFIG_SOUND_MSNDCLAS is not set
-# CONFIG_SOUND_MSNDPIN is not set
-# CONFIG_SOUND_OSS is not set
-# CONFIG_SOUND_AD1980 is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-ivr arch/mips/defconfig-ivr~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-ivr
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,600 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-CONFIG_MIPS_IVR=y
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_ITE_BOARD_GEN=y
-CONFIG_NEW_PCI=y
-CONFIG_IT8172_CIR=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-CONFIG_CPU_NEVADA=y
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_BLK_DEV_IDEPCI is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-CONFIG_QTRONIX_KEYBOARD=y
-# CONFIG_IT8172_SCR0 is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-jmr3927 arch/mips/defconfig-jmr3927~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-jmr3927
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,602 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-CONFIG_TOSHIBA_JMR3927=y
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_NEW_PCI=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_FB=y
-CONFIG_TOSHIBA_BOARDS=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-CONFIG_CPU_TX39XX=y
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-CONFIG_RTC_DS1742=y
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_HW_CONSOLE=y
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_COMPUTONE is not set
-# CONFIG_ROCKETPORT is not set
-# CONFIG_CYCLADES is not set
-# CONFIG_DIGIEPCA is not set
-# CONFIG_DIGI is not set
-# CONFIG_MOXA_INTELLIO is not set
-# CONFIG_MOXA_SMARTIO is not set
-# CONFIG_SYNCLINK is not set
-# CONFIG_SYNCLINKMP is not set
-# CONFIG_N_HDLC is not set
-# CONFIG_RISCOM8 is not set
-# CONFIG_SPECIALIX is not set
-# CONFIG_SX is not set
-# CONFIG_RIO is not set
-# CONFIG_STALDRV is not set
-# CONFIG_SERIAL_TX3912 is not set
-CONFIG_TXX927_SERIAL=y
-CONFIG_TXX927_SERIAL_CONSOLE=y
-# CONFIG_SERIAL_TXX9 is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-# CONFIG_UNIX98_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-# CONFIG_FB_CIRRUS is not set
-# CONFIG_FB_PM2 is not set
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_IMSTT is not set
-# CONFIG_FB_RIVA is not set
-# CONFIG_FB_MATROX is not set
-# CONFIG_FB_RADEON is not set
-# CONFIG_FB_ATY128 is not set
-# CONFIG_FB_ATY is not set
-# CONFIG_FB_SIS is not set
-# CONFIG_FB_NEOMAGIC is not set
-# CONFIG_FB_3DFX is not set
-# CONFIG_FB_VOODOO1 is not set
-# CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_PM3 is not set
-# CONFIG_FB_E1356 is not set
-# CONFIG_FB_VIRTUAL is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE is not set
-
-#
-# Logo configuration
-#
-# CONFIG_LOGO is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-lasat200 arch/mips/defconfig-lasat200~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-lasat200
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,678 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-CONFIG_LASAT=y
-CONFIG_PICVUE=y
-CONFIG_PICVUE_PROC=y
-CONFIG_DS1603=y
-CONFIG_LASAT_SYSCTL=y
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-# CONFIG_FB is not set
-CONFIG_BOARD_SCACHE=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-CONFIG_CPU_R5000=y
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_R5000_CPU_SCACHE=y
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-# CONFIG_PCI_NAMES is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-CONFIG_MTD_CFI_AMDSTD=y
-# CONFIG_MTD_CFI_STAA is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_PHYSMAP is not set
-CONFIG_MTD_LASAT=y
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-CONFIG_IDEDISK_MULTI_MODE=y
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_BLK_DEV_IDEPCI=y
-CONFIG_BLK_DEV_GENERIC=y
-# CONFIG_IDEPCI_SHARE_IRQ is not set
-CONFIG_BLK_DEV_IDEDMA_PCI=y
-# CONFIG_BLK_DEV_IDE_TCQ is not set
-# CONFIG_BLK_DEV_OFFBOARD is not set
-# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
-CONFIG_IDEDMA_PCI_AUTO=y
-# CONFIG_IDEDMA_ONLYDISK is not set
-CONFIG_BLK_DEV_IDEDMA=y
-CONFIG_BLK_DEV_ADMA=y
-# CONFIG_BLK_DEV_AEC62XX is not set
-# CONFIG_BLK_DEV_ALI15X3 is not set
-# CONFIG_BLK_DEV_AMD74XX is not set
-CONFIG_BLK_DEV_CMD64X=y
-# CONFIG_BLK_DEV_TRIFLEX is not set
-# CONFIG_BLK_DEV_CY82C693 is not set
-# CONFIG_BLK_DEV_CS5520 is not set
-# CONFIG_BLK_DEV_HPT34X is not set
-# CONFIG_BLK_DEV_HPT366 is not set
-# CONFIG_BLK_DEV_SC1200 is not set
-# CONFIG_BLK_DEV_PIIX is not set
-# CONFIG_BLK_DEV_NS87415 is not set
-# CONFIG_BLK_DEV_OPTI621 is not set
-# CONFIG_BLK_DEV_PDC202XX_OLD is not set
-# CONFIG_BLK_DEV_PDC202XX_NEW is not set
-# CONFIG_BLK_DEV_SVWKS is not set
-# CONFIG_BLK_DEV_SIIMAGE is not set
-# CONFIG_BLK_DEV_SLC90E66 is not set
-# CONFIG_BLK_DEV_TRM290 is not set
-# CONFIG_BLK_DEV_VIA82CXXX is not set
-CONFIG_IDEDMA_AUTO=y
-# CONFIG_IDEDMA_IVB is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_JFFS2_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
diff -puN -L arch/mips/defconfig-malta arch/mips/defconfig-malta~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-malta
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,626 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-CONFIG_MIPS_MALTA=y
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_I8259=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_BOARDS_GEN=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_BOOT_ELF32=y
-CONFIG_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-CONFIG_HAVE_STD_PC_SERIAL_PORT=y
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-CONFIG_BLK_DEV_FD=y
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-# CONFIG_SCSI_CONSTANTS is not set
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_SYM53C8XX is not set
-# CONFIG_SCSI_PCI2000 is not set
-# CONFIG_SCSI_PCI2220I is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-CONFIG_EFS_FS=y
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-# CONFIG_NFSD_V4 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-mpc30x arch/mips/defconfig-mpc30x~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-mpc30x
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,547 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_VICTOR_MPC30X=y
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_VR41XX_TIME_C=y
-CONFIG_DUMMY_KEYB=y
-CONFIG_VR41XX_COMMON=y
-CONFIG_VRC4173=y
-CONFIG_NEW_PCI=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-CONFIG_CPU_VR41XX=y
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-# CONFIG_PCI is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff -puN -L arch/mips/defconfig-ocelot arch/mips/defconfig-ocelot~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-ocelot
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,523 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-CONFIG_SYSCLK_100=y
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-CONFIG_MOMENCO_OCELOT=y
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_CONFIG_GT64120=y
-CONFIG_NONCOHERENT_IO=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_SWAP_IO_SPACE=y
-# CONFIG_FB is not set
-CONFIG_BOARD_SCACHE=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-CONFIG_CPU_RM7000=y
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-# CONFIG_PCI is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-osprey arch/mips/defconfig-osprey~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-osprey
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,531 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-CONFIG_NEC_OSPREY=y
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_DUMMY_KEYB=y
-# CONFIG_FB is not set
-CONFIG_VR4181=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-CONFIG_CPU_VR41XX=y
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-pb1000 arch/mips/defconfig-pb1000~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-pb1000
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,711 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_FB=y
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_CPU_ADVANCED=y
-CONFIG_CPU_HAS_LLSC=y
-# CONFIG_CPU_HAS_LLDSCD is not set
-CONFIG_CPU_HAS_WB=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-CONFIG_MTD_CFI_AMDSTD=y
-# CONFIG_MTD_CFI_STAA is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_PHYSMAP is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-CONFIG_IRDA=y
-
-#
-# IrDA protocols
-#
-CONFIG_IRLAN=m
-CONFIG_IRCOMM=m
-# CONFIG_IRDA_ULTRA is not set
-
-#
-# IrDA options
-#
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-CONFIG_IRDA_FAST_RR=y
-# CONFIG_IRDA_DEBUG is not set
-
-#
-# Infrared-port device drivers
-#
-
-#
-# SIR device drivers
-#
-# CONFIG_IRTTY_SIR is not set
-
-#
-# Dongle support
-#
-
-#
-# Old SIR device drivers
-#
-# CONFIG_IRTTY_OLD is not set
-# CONFIG_IRPORT_SIR is not set
-
-#
-# Old Serial dongle support
-#
-
-#
-# FIR device drivers
-#
-# CONFIG_TOSHIBA_OLD is not set
-# CONFIG_TOSHIBA_FIR is not set
-# CONFIG_VLSI_FIR is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_COMPUTONE is not set
-# CONFIG_ROCKETPORT is not set
-# CONFIG_CYCLADES is not set
-# CONFIG_DIGIEPCA is not set
-# CONFIG_DIGI is not set
-# CONFIG_MOXA_INTELLIO is not set
-# CONFIG_MOXA_SMARTIO is not set
-# CONFIG_ISI is not set
-# CONFIG_SYNCLINK is not set
-# CONFIG_SYNCLINKMP is not set
-# CONFIG_N_HDLC is not set
-# CONFIG_RISCOM8 is not set
-# CONFIG_SPECIALIX is not set
-# CONFIG_SX is not set
-# CONFIG_RIO is not set
-# CONFIG_STALDRV is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-# CONFIG_FB_VIRTUAL is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE is not set
-
-#
-# Logo configuration
-#
-# CONFIG_LOGO is not set
-
-#
-# Sound
-#
-CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
-# CONFIG_SND is not set
-
-#
-# Open Sound System
-#
-# CONFIG_SOUND_PRIME is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff -puN -L arch/mips/defconfig-pb1100 arch/mips/defconfig-pb1100~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-pb1100
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,791 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_FB=y
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_CPU_ADVANCED=y
-CONFIG_CPU_HAS_LLSC=y
-# CONFIG_CPU_HAS_LLDSCD is not set
-CONFIG_CPU_HAS_WB=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_PHYSMAP is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-CONFIG_IRDA=y
-
-#
-# IrDA protocols
-#
-CONFIG_IRLAN=m
-# CONFIG_IRNET is not set
-CONFIG_IRCOMM=m
-# CONFIG_IRDA_ULTRA is not set
-
-#
-# IrDA options
-#
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-CONFIG_IRDA_FAST_RR=y
-# CONFIG_IRDA_DEBUG is not set
-
-#
-# Infrared-port device drivers
-#
-
-#
-# SIR device drivers
-#
-# CONFIG_IRTTY_SIR is not set
-
-#
-# Dongle support
-#
-
-#
-# Old SIR device drivers
-#
-# CONFIG_IRTTY_OLD is not set
-# CONFIG_IRPORT_SIR is not set
-
-#
-# Old Serial dongle support
-#
-
-#
-# FIR device drivers
-#
-# CONFIG_TOSHIBA_OLD is not set
-# CONFIG_TOSHIBA_FIR is not set
-# CONFIG_VLSI_FIR is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_COMPUTONE is not set
-# CONFIG_ROCKETPORT is not set
-# CONFIG_CYCLADES is not set
-# CONFIG_DIGIEPCA is not set
-# CONFIG_DIGI is not set
-# CONFIG_MOXA_INTELLIO is not set
-# CONFIG_MOXA_SMARTIO is not set
-# CONFIG_ISI is not set
-# CONFIG_SYNCLINK is not set
-# CONFIG_SYNCLINKMP is not set
-# CONFIG_N_HDLC is not set
-# CONFIG_RISCOM8 is not set
-# CONFIG_SPECIALIX is not set
-# CONFIG_SX is not set
-# CONFIG_RIO is not set
-# CONFIG_STALDRV is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS_FS=m
-CONFIG_JFFS_FS_VERBOSE=0
-CONFIG_JFFS2_FS=m
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-CONFIG_SMB_NLS=y
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB_VIRTUAL is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE is not set
-
-#
-# Logo configuration
-#
-# CONFIG_LOGO is not set
-
-#
-# Sound
-#
-CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
-# CONFIG_SND is not set
-
-#
-# Open Sound System
-#
-# CONFIG_SOUND_PRIME is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=m
-CONFIG_ZLIB_DEFLATE=m
diff -puN -L arch/mips/defconfig-pb1500 arch/mips/defconfig-pb1500~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-pb1500
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,674 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-CONFIG_SOC_AU1X00=y
-# CONFIG_SOC_AU1000 is not set
-# CONFIG_SOC_AU1100 is not set
-CONFIG_SOC_AU1500=y
-# CONFIG_MIPS_PB1000 is not set
-# CONFIG_MIPS_PB1100 is not set
-CONFIG_MIPS_PB1500=y
-# CONFIG_MIPS_DB1000 is not set
-# CONFIG_MIPS_DB1100 is not set
-# CONFIG_MIPS_DB1500 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_NEW_PCI=y
-# CONFIG_AU1000_USB_DEVICE is not set
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-# CONFIG_PCI is not set
-CONFIG_MMU=y
-CONFIG_HOTPLUG=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-# CONFIG_PM is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_MIPS_AU1X00_ENET=y
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_AU1X00_GPIO is not set
-# CONFIG_TS_AU1X00_ADS7846 is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_AU1X00=y
-CONFIG_SERIAL_AU1X00_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-CONFIG_SMB_NLS=y
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff -puN -L arch/mips/defconfig-rm200 arch/mips/defconfig-rm200~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-rm200
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,700 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-# CONFIG_SYSVIPC is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-CONFIG_SNI_RM200_PCI=y
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_ARC=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_I8259=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_BOOT_ELF32=y
-CONFIG_ARC32=y
-# CONFIG_FB is not set
-CONFIG_ARC_CONSOLE=y
-CONFIG_ARC_MEMORY=y
-CONFIG_ARC_PROMLIB=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-CONFIG_CPU_R4X00=y
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-# CONFIG_PCI_NAMES is not set
-CONFIG_ISA=y
-# CONFIG_EISA is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-CONFIG_BLK_DEV_FD=y
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-# CONFIG_BLK_DEV_SR_VENDOR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_7000FASST is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AHA152X is not set
-# CONFIG_SCSI_AHA1542 is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_IN2000 is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_DTC3280 is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_GENERIC_NCR5380 is not set
-# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_NCR53C406A is not set
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
-CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
-CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
-# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
-# CONFIG_SCSI_PAS16 is not set
-# CONFIG_SCSI_PCI2000 is not set
-# CONFIG_SCSI_PCI2220I is not set
-# CONFIG_SCSI_PSI240I is not set
-# CONFIG_SCSI_QLOGIC_FAS is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_SYM53C416 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_T128 is not set
-# CONFIG_SCSI_U14_34F is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_INET_ECN=y
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-CONFIG_NET_PCI=y
-CONFIG_PCNET32=y
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_AC3200 is not set
-# CONFIG_APRICOT is not set
-# CONFIG_B44 is not set
-# CONFIG_CS89x0 is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_LAN_SAA9730 is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-# CONFIG_SERIAL_8250_CONSOLE is not set
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-# CONFIG_NFS_FS is not set
-# CONFIG_NFSD is not set
-# CONFIG_EXPORTFS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-CONFIG_SGI_PARTITION=y
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-CONFIG_VGA_CONSOLE=y
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-sb1250-swarm arch/mips/defconfig-sb1250-swarm~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-sb1250-swarm
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,619 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=15
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-CONFIG_SIBYTE_SB1xxx_SOC=y
-CONFIG_SIBYTE_SB1250=y
-# CONFIG_SIMULATION is not set
-CONFIG_SIBYTE_CFE=y
-# CONFIG_SIBYTE_CFE_CONSOLE is not set
-# CONFIG_SIBYTE_BUS_WATCHER is not set
-# CONFIG_SIBYTE_SB1250_PROF is not set
-# CONFIG_SIBYTE_TBPROF is not set
-CONFIG_SIBYTE_SWARM=y
-CONFIG_SIBYTE_BOARD=y
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_DUMMY_KEYB=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_SIBYTE_HAS_LDT=y
-CONFIG_BOOT_ELF32=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-CONFIG_CPU_SB1=y
-# CONFIG_SIBYTE_DMA_PAGEOPS is not set
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_VTAG_ICACHE=y
-CONFIG_CPU_SB1_PASS_1=y
-# CONFIG_CPU_SB1_PASS_2 is not set
-# CONFIG_CPU_SB1_PASS_2_2 is not set
-CONFIG_SB1_PASS_1_WORKAROUNDS=y
-CONFIG_SB1_CACHE_ERROR=y
-CONFIG_SB1_CERR_IGNORE_RECOVERABLE=y
-# CONFIG_SB1_CERR_SPIN is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_LLDSCD=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_HIGHMEM is not set
-CONFIG_SMP=y
-CONFIG_NR_CPUS=2
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=9220
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-CONFIG_NET_SB1250_MAC=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-CONFIG_SERIAL_NONSTANDARD=y
-# CONFIG_COMPUTONE is not set
-# CONFIG_ROCKETPORT is not set
-# CONFIG_CYCLADES is not set
-# CONFIG_DIGIEPCA is not set
-# CONFIG_DIGI is not set
-# CONFIG_MOXA_INTELLIO is not set
-# CONFIG_MOXA_SMARTIO is not set
-# CONFIG_ISI is not set
-# CONFIG_SYNCLINK is not set
-# CONFIG_SYNCLINKMP is not set
-# CONFIG_N_HDLC is not set
-# CONFIG_RISCOM8 is not set
-# CONFIG_SPECIALIX is not set
-# CONFIG_SX is not set
-# CONFIG_RIO is not set
-# CONFIG_STALDRV is not set
-CONFIG_SIBYTE_SB1250_DUART=y
-CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
-CONFIG_SERIAL_CONSOLE=y
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-# CONFIG_UNIX98_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_BLOWFISH=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_SERPENT=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff -puN -L arch/mips/defconfig-sead arch/mips/defconfig-sead~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-sead
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,398 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-# CONFIG_SYSVIPC is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-CONFIG_MIPS_SEAD=y
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_BOARDS_GEN=y
-CONFIG_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=18432
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# MIPS initrd options
-#
-CONFIG_EMBEDDED_RAMDISK=y
-CONFIG_EMBEDDED_RAMDISK_IMAGE="ramdisk.gz"
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-# CONFIG_NET is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# ISDN subsystem
-#
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_UNIX98_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/defconfig-tb0226 arch/mips/defconfig-tb0226~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-tb0226
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,672 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-CONFIG_TANBAC_TB0226=y
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_VR41XX_TIME_C=y
-CONFIG_DUMMY_KEYB=y
-CONFIG_VR41XX_COMMON=y
-CONFIG_NEW_PCI=y
-CONFIG_FB=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-CONFIG_CPU_VR41XX=y
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-# CONFIG_PCI is not set
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-CONFIG_BLK_DEV_FD=y
-CONFIG_BLK_DEV_LOOP=m
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=m
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-CONFIG_IDEDISK_MULTI_MODE=y
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-CONFIG_BLK_DEV_IDESCSI=y
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-# CONFIG_BLK_DEV_SR_VENDOR is not set
-CONFIG_CHR_DEV_SG=y
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=m
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_NAT=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-CONFIG_IP_ROUTE_TOS=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1280
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=1024
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-CONFIG_ROMFS_FS=m
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_ZISOFS_FS=y
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-# CONFIG_NFSD_V4 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-CONFIG_SMB_FS=m
-CONFIG_SMB_NLS_DEFAULT=y
-CONFIG_SMB_NLS_REMOTE="cp932"
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-CONFIG_SMB_NLS=y
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=m
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-CONFIG_NLS_CODEPAGE_932=m
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-CONFIG_NLS_ISO8859_1=m
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB_VIRTUAL is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE is not set
-
-#
-# Logo configuration
-#
-# CONFIG_LOGO is not set
-
-#
-# Sound
-#
-CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
-# CONFIG_SND is not set
-
-#
-# Open Sound System
-#
-# CONFIG_SOUND_PRIME is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=m
diff -puN -L arch/mips/defconfig-tb0229 arch/mips/defconfig-tb0229~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-tb0229
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,662 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-# CONFIG_IBM_WORKPAD is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-CONFIG_TANBAC_TB0229=y
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_VR41XX_TIME_C=y
-CONFIG_DUMMY_KEYB=y
-CONFIG_VR41XX_COMMON=y
-CONFIG_NEW_PCI=y
-# CONFIG_FB is not set
-CONFIG_TANBAC_TB0219=y
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-CONFIG_CPU_VR41XX=y
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_PCI=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=m
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support (EXPERIMENTAL)
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=m
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_NAT=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-CONFIG_IP_ROUTE_TOS=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-CONFIG_NET_IPIP=m
-CONFIG_NET_IPGRE=m
-# CONFIG_NET_IPGRE_BROADCAST is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-CONFIG_DUMMY=m
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPPOE=m
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLIP_SMART=y
-CONFIG_SLIP_MODE_SLIP6=y
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1280
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=1024
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=m
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=m
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-CONFIG_JFS_FS=m
-# CONFIG_JFS_POSIX_ACL is not set
-# CONFIG_JFS_DEBUG is not set
-# CONFIG_JFS_STATISTICS is not set
-CONFIG_XFS_FS=y
-# CONFIG_XFS_RT is not set
-CONFIG_XFS_QUOTA=y
-CONFIG_XFS_POSIX_ACL=y
-# CONFIG_MINIX_FS is not set
-CONFIG_ROMFS_FS=m
-# CONFIG_QUOTA is not set
-CONFIG_QUOTACTL=y
-# CONFIG_AUTOFS_FS is not set
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_ZISOFS_FS=y
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-# CONFIG_NFSD_V4 is not set
-CONFIG_NFSD_TCP=y
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-CONFIG_SMB_FS=m
-CONFIG_SMB_NLS_DEFAULT=y
-CONFIG_SMB_NLS_REMOTE="cp932"
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-CONFIG_SMB_NLS=y
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=m
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-CONFIG_NLS_CODEPAGE_932=m
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-CONFIG_NLS_ISO8859_1=m
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=m
diff -puN -L arch/mips/defconfig-workpad arch/mips/defconfig-workpad~mips-megapatch /dev/null
--- 25/arch/mips/defconfig-workpad
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,572 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_ACER_PICA_61 is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_CASIO_E55 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_HP_LASERJET is not set
-CONFIG_IBM_WORKPAD=y
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MAGNUM_4000 is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_NEC_EAGLE is not set
-# CONFIG_OLIVETTI_M700 is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TANBAC_TB0226 is not set
-# CONFIG_TANBAC_TB0229 is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_VICTOR_MPC30X is not set
-# CONFIG_ZAO_CAPCELLA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_NONCOHERENT_IO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_VR41XX_TIME_C=y
-CONFIG_DUMMY_KEYB=y
-CONFIG_VR41XX_COMMON=y
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-# CONFIG_CPU_MIPS32 is not set
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-CONFIG_CPU_VR41XX=y
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_SB1 is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-# CONFIG_HOTPLUG is not set
-
-#
-# Executable file formats
-#
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_NETLINK_DEV=y
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_FASTROUTE is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-# CONFIG_SOFT_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_WDTPCI is not set
-# CONFIG_PCWATCHDOG is not set
-# CONFIG_ACQUIRE_WDT is not set
-# CONFIG_ADVANTECH_WDT is not set
-# CONFIG_EUROTECH_WDT is not set
-# CONFIG_IB700_WDT is not set
-# CONFIG_I810_TCO is not set
-# CONFIG_MIXCOMWD is not set
-# CONFIG_SCx200_WDT is not set
-# CONFIG_60XX_WDT is not set
-# CONFIG_W83877F_WDT is not set
-# CONFIG_MACHZ_WDT is not set
-# CONFIG_SC520_WDT is not set
-# CONFIG_AMD7XX_TCO is not set
-# CONFIG_ALIM7101_WDT is not set
-# CONFIG_SC1200_WDT is not set
-# CONFIG_WAFER_WDT is not set
-# CONFIG_CPU5_WDT is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
-CONFIG_AUTOFS4_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-CONFIG_NFSD=y
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
diff -puN -L arch/mips/galileo-boards/ev64120/dma.c arch/mips/galileo-boards/ev64120/dma.c~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/ev64120/dma.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,168 +0,0 @@
-/* DMA.C - DMA functions and definitions */
-
-/* Copyright Galileo Technology. */
-
-/*
-DESCRIPTION
-This file gives the user a complete interface to the powerful DMA engines,
-including functions for controling the priority mechanism.
-To fully understand the capabilities of the DMA engines please spare some
-time to go trough the spec.
-*/
-
-/* includes */
-
-#ifdef __linux__
-#include <asm/galileo/evb64120A/core.h>
-#include <asm/galileo/evb64120A/dma.h>
-#else
-#include "Core.h"
-#include "DMA.h"
-#endif
-/********************************************************************
-* dmaCommand - Write a command to a DMA channel
-*
-* Inputs: DMA_ENGINE channel - choosing one of the four engine.
-* unsigned int command - The command to be written to the control register.
-* Returns: false if one of the parameters is erroneous else returns true.
-*********************************************************************/
-
-bool dmaCommand(DMA_ENGINE channel, unsigned int command)
-{
- if (channel > LAST_DMA_ENGINE)
- return false;
- GT_REG_WRITE(CHANNEL0CONTROL + channel * 4, command);
- return true;
-}
-
-/********************************************************************
-* dmaTransfer - transfer data from sourceAddr to destAddr on DMA channel
-* Inputs:
-* DMA_RECORED *nextRecoredPointer: If we are using chain mode DMA transfer,
-* then this pointer should point to the next recored,otherwise it should be
-* NULL.
-* VERY IMPORTANT !!! When using chain mode, the records must be 16 Bytes
-* aligned, the function will take care of that for you, but you need to
-* allocate one more record for that, meaning: if you are having 3 records ,
-* declare 4 (see the example bellow) and start using the second one.
-* Example:
-* Performing a chain mode DMA transfer(Copy a 1/4 mega of data using
-* chain mode DMA):
-* DMA_RECORED dmaRecoredArray[4];
-* dmaRecoredArray[1].ByteCnt = _64KB;
-* dmaRecoredArray[1].DestAdd = destAddress + _64KB;
-* dmaRecoredArray[1].SrcAdd = sourceAddress + _64KB;
-* dmaRecoredArray[1].NextRecPtr = &dmaRecoredArray[2];
-* dmaRecoredArray[2].ByteCnt = _64KB;
-* dmaRecoredArray[2].DestAdd = destAddress + 2*_64KB;
-* dmaRecoredArray[2].SrcAdd = sourceAddress + 2*_64KB;
-* dmaRecoredArray[2].NextRecPtr = &dmaRecoredArray[3];
-* dmaRecoredArray[3].ByteCnt = _64KB;
-* dmaRecoredArray[3].DestAdd = destAddress + 3*_64KB;
-* dmaRecoredArray[3].SrcAdd = sourceAddress + 3*_64KB;
-* dmaRecoredArray[3].NextRecPtr = NULL;
-* performCmDma(0,sourceAddress,destAddress,_64KB,PLAIN,WAIT_TO_END,
-* &dmaRecoredArray[1]);
-* Returns: NO_SUCH_CHANNEL if channel does not exist, CHANNEL_BUSY if channel
-* is active and true if the transfer ended successfully
-*********************************************************************/
-
-DMA_STATUS dmaTransfer(DMA_ENGINE channel, unsigned int sourceAddr,
- unsigned int destAddr, unsigned int numOfBytes,
- unsigned int command,
- DMA_RECORED * nextRecoredPointer)
-{
- unsigned int tempData, checkBits, alignmentOffset = 0;
- DMA_RECORED *next = nextRecoredPointer;
-
- if (channel > LAST_DMA_ENGINE)
- return NO_SUCH_CHANNEL;
- if (numOfBytes > 0xffff)
- return GENERAL_ERROR;
- if (isDmaChannelActive(channel))
- return CHANNEL_BUSY;
- if (next != NULL) { /* case of chain Mode */
- alignmentOffset = ((unsigned int) next % 16);
- }
- checkBits = command & 0x6000000;
- if (checkBits == 0) {
- while (next != NULL) {
- WRITE_WORD((unsigned int) next - alignmentOffset,
- next->ByteCnt);
- tempData = (unsigned int) next->SrcAdd;
- WRITE_WORD((unsigned int) next + 4 -
- alignmentOffset, tempData & 0x5fffffff);
- tempData = (unsigned int) next->DestAdd;
- WRITE_WORD((unsigned int) next + 8 -
- alignmentOffset, tempData & 0x5fffffff);
- tempData = (unsigned int) next->NextRecPtr;
- WRITE_WORD((unsigned int) next + 12 -
- alignmentOffset,
- tempData & 0x5fffffff -
- alignmentOffset);
- next = (DMA_RECORED *) tempData;
- if (next == nextRecoredPointer)
- next = NULL;
- }
- }
- GT_REG_WRITE(CHANNEL0_DMA_BYTE_COUNT + channel * 4, numOfBytes);
- tempData = sourceAddr;
- GT_REG_WRITE(CHANNEL0_DMA_SOURCE_ADDRESS + channel * 4,
- tempData & 0x5fffffff);
- tempData = destAddr;
- GT_REG_WRITE(CHANNEL0_DMA_DESTINATION_ADDRESS + channel * 4,
- tempData & 0x5fffffff);
- if (nextRecoredPointer != NULL) {
- tempData =
- (unsigned int) nextRecoredPointer - alignmentOffset;
- GT_REG_WRITE(CHANNEL0NEXT_RECORD_POINTER + 4 * channel,
- tempData & 0x5fffffff);
- command = command | CHANNEL_ENABLE;
- } else {
- command = command | CHANNEL_ENABLE | NON_CHAIN_MOD;
- }
- /* Activate DMA engine By writting to dmaControlRegister */
- GT_REG_WRITE(CHANNEL0CONTROL + channel * 4, command);
-
- return DMA_OK;
-}
-
-/********************************************************************
-* isDmaChannelActive - check if channel is busy
-*
-* Inputs: channel number
-* RETURNS: True if the channel is busy, false otherwise.
-*********************************************************************/
-
-bool isDmaChannelActive(DMA_ENGINE channel)
-{
- unsigned int data;
-
- if (channel > LAST_DMA_ENGINE)
- return false;
- GT_REG_READ(CHANNEL0CONTROL + 4 * channel, &data);
- if (data & DMA_ACTIVITY_STATUS)
- return true;
- else
- return false;
-}
-
-
-/********************************************************************
-* changeDmaPriority - update the arbiter`s priority for channels 0-3
-*
-* Inputs: priority for channels 0-1, priority for channels 2-3,
- priority for groups and other priority options
-* RETURNS: false if one of the parameters is erroneous and true else
-*********************************************************************/
-
-bool changeDmaPriority(PRIO_CHAN_0_1 prio_01, PRIO_CHAN_2_3 prio_23,
- PRIO_GROUP prioGrp, PRIO_OPT prioOpt)
-{
- unsigned int prioReg = 0;
-
- prioReg = (prio_01 & 0x3) + ((prio_23 & 0x3) << 2) +
- ((prioGrp & 0x3) << 4) + (prioOpt << 6);
- GT_REG_WRITE(ARBITER_CONTROL, prioReg);
- return true;
-}
diff -puN -L arch/mips/galileo-boards/ev64120/i2o.c arch/mips/galileo-boards/ev64120/i2o.c~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/ev64120/i2o.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,689 +0,0 @@
-/* i2o.c - Drivers for the I2O */
-
-/* Copyright - Galileo technology. */
-
-/*includes*/
-
-#include <linux/module.h>
-
-#ifdef __linux__
-#include <asm/galileo-boards/evb64120A/core.h>
-#include <asm/galileo-boards/evb64120A/i2o.h>
-#else
-#include "Core.h"
-#include "i2o.h"
-#endif
-
-/********************************************************************
-* getInBoundMessage - When the GT is configured for I2O support
-* it can receive a message from an agent on the pci bus.
-* This message is a 32 bit wide and can be read by
-* the CPU.
-* The messaging unit contains two sets of registers
-* so, actually it can receive a 64 bit message.
-*
-* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
-* OUTPUT: N/A.
-* RETURNS: Data received from the remote agent.
-*********************************************************************/
-unsigned int getInBoundMessage(I2O_MESSAGE_REG messageRegNum)
-{
- unsigned int regValue;
-
- GT_REG_READ(INBOUND_MESSAGE_REGISTER0_CPU_SIDE + 4 * messageRegNum,
- ®Value);
- return (regValue);
-}
-
-
-/********************************************************************
-* checkInboundIntAndClear - When a message is received an interrupt is
-* generated, to enable polling instead the use of
-* an interrupt handler the user can use this fuction.
-* You will need to mask the incomming interrupt for
-* proper use.
-*
-* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
-* OUTPUT: N/A.
-* RETURNS: true if the corresponding bit in the cause register is set otherwise
-* false.
-*********************************************************************/
-bool checkInBoundIntAndClear(I2O_MESSAGE_REG messageRegNum)
-{
- unsigned int regValue;
-
- GT_REG_READ(INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE, ®Value);
- /* clears bit 0 for message register 0 or bit 1 for message register 1 */
- GT_REG_WRITE(INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE,
- BIT1 * messageRegNum);
- switch (messageRegNum) {
- case MESSAGE_REG_0:
- if (regValue & BIT0)
- return true;
- break;
- case MESSAGE_REG_1:
- if (regValue & BIT1)
- return true;
- break;
- }
- return false;
-}
-
-/********************************************************************
-* sendOutBoundMessage - When the GT is configured for I2O support
-* it can send a message to an agent on the pci bus.
-* This message is a 32 bit wide and can be read by
-* the PCI agent.
-* The messaging unit contains two sets of registers
-* so, actually it can send a 64 bit message.
-*
-* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
-* unsigned int message - Message to be sent.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool sendOutBoundMessage(I2O_MESSAGE_REG messageRegNum,
- unsigned int message)
-{
- GT_REG_WRITE(OUTBOUND_MESSAGE_REGISTER0_CPU_SIDE +
- 4 * messageRegNum, message);
- return true;
-}
-
-/********************************************************************
-* checkOutboundInt - When the CPU sends a message to the Outbound
-* register it generates an interrupt which is refelcted on
-* the Outbound Interrupt cause register, the interrupt can
-* be cleard only by the PCI agent which read the message.
-* After sending the message you can acknowledge it by
-* monitoring the corresponding bit in the cause register.
-*
-* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
-* OUTPUT: N/A.
-* RETURNS: true if the corresponding bit in the cause register is set otherwise
-* false.
-*********************************************************************/
-bool outBoundMessageAcknowledge(I2O_MESSAGE_REG messageRegNum)
-{
- unsigned int regValue;
-
- GT_REG_READ(OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE, ®Value);
- switch (messageRegNum) {
- case MESSAGE_REG_0:
- if (regValue & BIT0)
- return true;
- break;
- case MESSAGE_REG_1:
- if (regValue & BIT1)
- return true;
- break;
- }
- return false;
-}
-
-/********************************************************************
-* maskInBoundMessageInterrupt - Mask the inbound interrupt, when masking
-* the interrupt you can work in polling mode
-* using the checkInboundIntAndClear function.
-*
-* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool maskInBoundMessageInterrupt(I2O_MESSAGE_REG messageRegNum)
-{
- switch (messageRegNum) {
- case MESSAGE_REG_0:
- SET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
- BIT0);
- break;
- case MESSAGE_REG_1:
- SET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
- BIT1);
- break;
- }
- return true;
-}
-
-/********************************************************************
-* enableInBoundMessageInterrupt - unMask the inbound interrupt.
-*
-* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool enableInBoundMessageInterrupt(I2O_MESSAGE_REG messageRegNum)
-{
- switch (messageRegNum) {
- case MESSAGE_REG_0:
- RESET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
- BIT0);
- break;
- case MESSAGE_REG_1:
- RESET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
- BIT1);
- break;
- }
- return true;
-}
-
-/********************************************************************
-* maskOutboundMessageInterrupt - Mask the out bound interrupt, when doing so
-* the PCI agent needs to poll on the interrupt
-* cause register to monitor an incoming message.
-*
-* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool maskOutBoundMessageInterrupt(I2O_MESSAGE_REG messageRegNum)
-{
- switch (messageRegNum) {
- case MESSAGE_REG_0:
- SET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
- BIT0);
- break;
- case MESSAGE_REG_1:
- SET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
- BIT1);
- break;
- }
- return true;
-}
-
-/********************************************************************
-* enableOutboundMessageInterrupt - Mask the out bound interrupt, when doing so
-* the PCI agent needs to poll on the interrupt
-* cause register to monitor an incoming message.
-*
-* INPUTS: I2O_MESSAGE_REG messageRegNum - Selected set (0 or 1) register.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool enableOutBoundMessageInterrupt(I2O_MESSAGE_REG messageRegNum)
-{
- switch (messageRegNum) {
- case MESSAGE_REG_0:
- RESET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
- BIT0);
- break;
- case MESSAGE_REG_1:
- RESET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
- BIT1);
- break;
- }
- return true;
-}
-
-/********************************************************************
-* initiateOutBoundDoorBellInt - Setting a bit in this register to '1' by the
-* CPU generates a PCI interrupt (if it is not masked by
-* the Outbound interrupt Mask register)
-* Only the PCI agent which recieved the interrupt can
-* clear it, only after clearing all the bits the
-* interrupt will be de-asserted.
-*
-* INPUTS: unsigned int data - Requested interrupt bits.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool initiateOutBoundDoorBellInt(unsigned int data)
-{
- GT_REG_WRITE(OUTBOUND_DOORBELL_REGISTER_CPU_SIDE, data);
- return true;
-}
-
-/********************************************************************
-* readInBoundDoorBellInt - Read the in bound door bell interrupt cause
-* register.
-*
-* OUTPUT: N/A.
-* RETURNS: The 32 bit interrupt cause register.
-*********************************************************************/
-unsigned int readInBoundDoorBellInt()
-{
- unsigned int regData;
- GT_REG_READ(INBOUND_DOORBELL_REGISTER_CPU_SIDE, ®Data);
- return regData;
-}
-
-/********************************************************************
-* clearInBoundDoorBellInt - An interrupt generated by a PCI agent through
-* the in bound door bell mechanisem can be cleared
-* only by the CPU. The interrupt will be de-asserted
-* only if all the bits which where set by the PCI
-* agent are cleared.
-*
-* INPUTS: unsigned int data - Bits to be cleared.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool clearInBoundDoorBellInt(unsigned int data)
-{
- GT_REG_WRITE(INBOUND_DOORBELL_REGISTER_CPU_SIDE, data);
- return true;
-}
-
-/********************************************************************
-* isInBoundDoorBellInterruptSet - Check if Inbound Doorbell Interrupt is set,
-* can be used for polling mode.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: true if the corresponding bit in the cause register is set otherwise
-* false.
-*********************************************************************/
-bool isInBoundDoorBellInterruptSet()
-{
- unsigned int regData;
-
- GT_REG_READ(INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE, ®Data);
- return (regData & BIT2);
-}
-
-/********************************************************************
-* isOutBoundDoorBellInterruptSet - Check if out bound Doorbell Interrupt is
-* set, can be used for acknowledging interrupt
-* handling by the agent who recieived the
-* interrupt.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: true if the corresponding bit in the cause register is set otherwise
-* false.
-*********************************************************************/
-bool isOutBoundDoorBellInterruptSet()
-{
- unsigned int regData;
-
- GT_REG_READ(OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE, ®Data);
- return (regData & BIT2);
-}
-
-/********************************************************************
-* maskInboundDoorBellInterrupt - Mask the Inbound Doorbell Interrupt.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool maskInBoundDoorBellInterrupt()
-{
- SET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE, BIT2);
- return true;
-}
-
-/********************************************************************
-* enableInboundDoorBellInterrupt - unMask the Inbound Doorbell Interrupt.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool enableInBoundDoorBellInterrupt()
-{
- RESET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE, BIT2);
- return true;
-}
-
-/********************************************************************
-* maskOutboundDoorBellInterrupt - Mask the Outbound Doorbell Interrupt.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool maskOutBoundDoorBellInterrupt()
-{
- SET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE, BIT2);
- return true;
-}
-
-/********************************************************************
-* enableOutboundDoorBellInterrupt - unMask the Outbound Doorbell Interrupt.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool enableOutBoundDoorBellInterrupt()
-{
- RESET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE, BIT2);
- return true;
-}
-
-/********************************************************************
-* circularQueueEnable - Initialize the I2O messaging mechanism.
-*
-* INPUTS: CIRCULE_QUEUE_SIZE cirQueSize - Bits 5:1 in the:
-* Queue Control Register, Offset 0x50 (0x1c50).
-* Defines the queues size (refer to the data sheet
-* for more information)
-* unsigned int queueBaseAddr - The base address for the first queue.
-* The other queues base Address will be determined as follows:
-* Inbound Free = queueBaseAddr
-* Inbound Post = queueBaseAddr + cirQueSize
-* Outbound Post = queueBaseAddr + cirQueSize
-*
-* OUTPUT: N/A.
-* RETURNS: true.
-*
-* The Circular Queue Starting Addresses as written in the spec:
-* ----------------------------------------
-* | Queue | Starting Address |
-* |----------------|---------------------|
-* | Inbound Free | QBAR |
-* | Inbound Post | QBAR + Queue Size |
-* | Outbound Post | QBAR + 2*Queue Size |
-* | Outbound Free | QBAR + 3*Queue Size |
-* ----------------------------------------
-*********************************************************************/
-bool circularQueueEnable(CIRCULAR_QUEUE_SIZE cirQueSize,
- unsigned int queueBaseAddr)
-{
- unsigned int regData;
-
- regData = BIT0 | (cirQueSize << 1);
- /* Enable Queue Operation */
- GT_REG_WRITE(QUEUE_CONTROL_REGISTER_CPU_SIDE, regData);
- /* Writing The base Address for the 4 Queues */
- GT_REG_WRITE(QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE, queueBaseAddr);
- /* Update The Inbound Free Queue Base Address, offset=0 */
- GT_REG_WRITE(INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE, 0);
- GT_REG_WRITE(INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE, 0);
- /* Update The Inbound Post Queue Base Address, offset=_16K*cirQueSize */
- GT_REG_WRITE(INBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE,
- _16K * cirQueSize);
- GT_REG_WRITE(INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE,
- _16K * cirQueSize);
- /* Update The Outbound Post Queue Base Address, offset=2*_16K*cirQueSize */
- GT_REG_WRITE(OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE,
- 2 * _16K * cirQueSize);
- GT_REG_WRITE(OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE,
- 2 * _16K * cirQueSize);
- /* Update The Outbound Free Queue Base Address, offset=3*_16K*cirQueSize */
- GT_REG_WRITE(OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE,
- 3 * _16K * cirQueSize);
- GT_REG_WRITE(OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE,
- 3 * _16K * cirQueSize);
- return true;
-}
-
-/********************************************************************
-* inBoundPostQueuePop - Two actions are being taken upon pop:
-* 1) Getting out the data from the Queue`s head.
-* 2) Increment the tail pointer in a cyclic way (The HEAD is
-* incremented automaticaly by the GT)
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: Data pointed by tail.
-*********************************************************************/
-unsigned int inBoundPostQueuePop()
-{
- unsigned int tailAddrPointer;
- unsigned int data;
- unsigned int cirQueSize;
- unsigned int qBar;
- unsigned int inBoundPostQbase;
-
- /* Gets the Inbound Post TAIL pointer */
- GT_REG_READ(INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE,
- &tailAddrPointer);
- /* Gets the Data From the pointer Address */
- READ_WORD(tailAddrPointer, &data);
- /* incrementing head process: */
- /* Gets the fifo's base Address */
- GT_REG_READ(QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE, &qBar);
- qBar = qBar & 0xfff00000;
- /* Gets the fifo's size */
- GT_REG_READ(QUEUE_CONTROL_REGISTER_CPU_SIDE, &cirQueSize);
- cirQueSize = 0x1f && (cirQueSize >> 1);
- /* calculating The Inbound Post Queue Base Address */
- inBoundPostQbase = qBar + 1 * cirQueSize * _16K;
- /* incrementing Inbound Post queue TAIL in a cyclic loop */
- tailAddrPointer = inBoundPostQbase + ((tailAddrPointer + 4) %
- (_16K * cirQueSize));
- /* updating the pointer back to INBOUND_POST_TAIL_POINTER_REGISTER */
- GT_REG_WRITE(INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE,
- tailAddrPointer);
- return data;
-}
-
-/********************************************************************
-* isInBoundPostQueueInterruptSet - Check if in bound interrupt is set.
-* can be used for polling mode.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: true if the corresponding bit in the cause register is set otherwise
-* false.
-*********************************************************************/
-bool isInBoundPostQueueInterruptSet()
-{
- unsigned int regData;
-
- GT_REG_READ(INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE, ®Data);
- return (regData & BIT4); /* if set return '1' (true), else '0' (false) */
-}
-
-/********************************************************************
-* clearInBoundPostQueueInterrupt - Clears the Post queue interrupt.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool clearInBoundPostQueueInterrupt()
-{
- GT_REG_WRITE(INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE, BIT4);
- return true;
-}
-
-/********************************************************************
-* maskInBoundPostQueueInterrupt - Mask the inbound interrupt, when masking
-* the interrupt you can work in polling mode.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS:
-*********************************************************************/
-void maskInBoundPostQueueInterrupt()
-{
- unsigned int regData;
-
- GT_REG_READ(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE, ®Data);
- GT_REG_WRITE(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
- regData | BIT4);
-
-}
-
-/********************************************************************
-* enableInBoundPostQueueInterrupt - Enable interrupt when ever there is a new
-* message from the PCI agent.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS:
-*********************************************************************/
-void enableInBoundPostQueueInterrupt()
-{
- unsigned int regData;
-
- GT_REG_READ(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE, ®Data);
- GT_REG_WRITE(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
- regData & 0xfffffffb);
-}
-
-/********************************************************************
-* inBoundFreeQueuePush - Two actions are being taken upon push:
-* 1) Place the user`s data on the Queue`s head.
-* 2) Increment the haed pointer in a cyclic way (The tail is
-* decremented automaticaly by the GT)
-*
-* INPUTS: unsigned int data - Data to be placed in the queue.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool inBoundFreeQueuePush(unsigned int data)
-{
- unsigned int headPointer;
- unsigned int cirQueSize;
- unsigned int qBar;
- unsigned int inBoundFreeQbase;
-
- GT_REG_READ(INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE,
- &headPointer);
- /* placing the data in the queue */
- WRITE_WORD(headPointer, data);
- /* incrementing head process: */
- /* Gets the fifo's base Address */
- GT_REG_READ(QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE, &qBar);
- qBar = qBar & 0xfff00000;
- /* Gets the fifo's size */
- GT_REG_READ(QUEUE_CONTROL_REGISTER_CPU_SIDE, &cirQueSize);
- cirQueSize = 0x1f && (cirQueSize >> 1);
- /* calculating The Inbound Free Queue Base Address */
- inBoundFreeQbase = qBar;
- /* incrementing Inbound Free queue HEAD in a cyclic loop */
- headPointer =
- inBoundFreeQbase + ((headPointer + 4) % (_16K * cirQueSize));
- /* updating the pointer back to OUTBOUND_POST_HEAD_POINTER_REGISTER */
- GT_REG_WRITE(INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE,
- headPointer);
- return true;
-}
-
-/********************************************************************
-* isInBoundFreeQueueEmpty - Check if Inbound Free Queue Empty.
-* Can be used for acknowledging the messages
-* being sent by us to the PCI agent.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: true if the queue is empty , otherwise false.
-*********************************************************************/
-bool isInBoundFreeQueueEmpty()
-{
- unsigned int inBoundFreeQueHead;
- unsigned int inBoundFreeQueTail;
-
- GT_REG_READ(INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE,
- &inBoundFreeQueHead);
- GT_REG_READ(INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE,
- &inBoundFreeQueTail);
- if (inBoundFreeQueHead == inBoundFreeQueTail) {
- return true;
- } else
- return false;
-}
-
-/********************************************************************
-* outBoundPostQueuePush - Two actions are being taken upon push:
-* 1) Place the user`s data on the Queue`s head.
-* 2) Increment the haed pointer in a cyclic way (The tail is
-* decremented automaticaly by the GT when the Agent on the
-* PCI have read data from the Outbound Port).
-*
-* INPUTS: unsigned int data - Data to be placed in the queue`s head.
-* OUTPUT: N/A.
-* RETURNS: true.
-*********************************************************************/
-bool outBoundPostQueuePush(unsigned int data)
-{
- unsigned int headPointer;
- unsigned int cirQueSize;
- unsigned int qBar;
- unsigned int outBoundPostQbase;
-
- GT_REG_READ(OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE,
- &headPointer);
- /* placing the data in the queue (where the head point to..) */
- WRITE_WORD(headPointer, data);
- /* incrementing head process: */
- /* Gets the fifo's base Address */
- GT_REG_READ(QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE, &qBar);
- qBar = qBar & 0xfff00000;
- /* Gets the fifo's size */
- GT_REG_READ(QUEUE_CONTROL_REGISTER_CPU_SIDE, &cirQueSize);
- cirQueSize = 0x1f && (cirQueSize >> 1);
- /* calculating The Outbound Post Queue Base Address */
- outBoundPostQbase = qBar + 2 * cirQueSize * _16K;
- /* incrementing Outbound Post queue in a cyclic loop */
- headPointer =
- outBoundPostQbase + ((headPointer + 4) % (_16K * cirQueSize));
- /* updating the pointer back to OUTBOUND_POST_HEAD_POINTER_REGISTER */
- GT_REG_WRITE(OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE,
- headPointer);
- return true;
-}
-
-/********************************************************************
-* isOutBoundPostQueueEmpty - Check if Outbound Post Queue Empty.
-* Can be used for acknowledging the messages
-* being sent by us to the PCI agent.
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: true if the queue is empty , otherwise false.
-*********************************************************************/
-bool isOutBoundPostQueueEmpty()
-{
- unsigned int outBoundPostQueHead;
- unsigned int outBoundPostQueTail;
-
- GT_REG_READ(INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE,
- &outBoundPostQueHead);
- GT_REG_READ(INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE,
- &outBoundPostQueTail);
- if (outBoundPostQueHead == outBoundPostQueTail) {
- return true;
- } else
- return false;
-}
-
-/********************************************************************
-* outBoundFreeQueuePop - Two actions are being taken upon pop:
-* 1) Getting out the data from the Queue`s head.
-* 2) Increment the tail pointer in a cyclic way (The HEAD is
-* incremented automaticaly by the GT)
-*
-* INPUTS: N/A.
-* OUTPUT: N/A.
-* RETURNS: Data pointed by tail.
-*********************************************************************/
-unsigned int outBoundFreeQueuePop()
-{
- unsigned int tailAddrPointer;
- unsigned int data;
- unsigned int cirQueSize;
- unsigned int qBar;
- unsigned int outBoundFreeQbase;
-
- /* Gets the Inbound Post TAIL pointer */
- GT_REG_READ(OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE,
- &tailAddrPointer);
- /* Gets the Data From the pointer Address */
- READ_WORD(tailAddrPointer, &data);
- /* incrementing head process: */
- /* Gets the fifo's base Address */
- GT_REG_READ(QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE, &qBar);
- qBar = qBar & 0xfff00000;
- /* Gets the fifo's size */
- GT_REG_READ(QUEUE_CONTROL_REGISTER_CPU_SIDE, &cirQueSize);
- cirQueSize = 0x1f && (cirQueSize >> 1);
- /* calculating The Inbound Post Queue Base Address */
- outBoundFreeQbase = qBar + 3 * cirQueSize * _16K;
- /* incrementing Outbound Free queue TAlL in a cyclic loop */
- tailAddrPointer = outBoundFreeQbase + ((tailAddrPointer + 4) %
- (_16K * cirQueSize));
- /* updating the pointer back to OUTBOUND_FREE_TAIL_POINTER_REGISTER */
- GT_REG_WRITE(OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE,
- tailAddrPointer);
- return data;
-}
-
-
-EXPORT_SYMBOL(isInBoundDoorBellInterruptSet);
-EXPORT_SYMBOL(initiateOutBoundDoorBellInt);
-EXPORT_SYMBOL(clearInBoundDoorBellInt);
diff -puN -L arch/mips/galileo-boards/ev64120/int-handler.S arch/mips/galileo-boards/ev64120/int-handler.S~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/ev64120/int-handler.S
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,85 +0,0 @@
-/*
- * int-handler.S
- *
- * Based on the cobalt handler.
- */
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
-/*
- * We check for the timer first, then check PCI ints A and D.
- * Then check for serial IRQ and fall through.
- */
- .align 5
- .set reorder
- .set noat
- NESTED(galileo_handle_int, PT_SIZE, sp)
- SAVE_ALL
- CLI
- .set at
-
- mfc0 t0, CP0_CAUSE
- mfc0 t2, CP0_STATUS
-
- and t0, t2
-
- .set noreorder
- andi t1, t0, STATUSF_IP4 /* int2 hardware line (timer) */
- andi t2, t0, STATUSF_IP2 /* int0 hardware line */
- bnez t1, ll_galileo_irq
- andi t1, t0, STATUSF_IP5 /* int3 hardware line */
- bnez t2, ll_pci_intA
- andi t2, t0, STATUSF_IP6 /* int4 hardware line */
- bnez t1, ll_pci_intD
- andi t1, t0, STATUSF_IP7 /* compare int */
- bnez t2, ll_serial_irq
- nop
- bnez t1, ll_compare_irq
- nop
- .set reorder
-
- j spurious_interrupt
- END(galileo_handle_int)
-
- .align 5
-ll_galileo_irq: li a0, 4
- move a1, sp
- jal do_IRQ
- j ret_from_irq
-
- .align 5
-ll_compare_irq: li a0, 7
- move a1, sp
- jal do_IRQ
- j ret_from_irq
-
- .align 5
-ll_pci_intA: move a0, sp
- jal pci_intA
- j ret_from_irq
-
-#if 0
- .align 5
-ll_pci_intB: move a0, sp
- jal pci_intB
- j ret_from_irq
-
- .align 5
-ll_pci_intC: move a0, sp
- jal pci_intC
- j ret_from_irq
-#endif
-
- .align 5
-ll_pci_intD: move a0, sp
- jal pci_intD
- j ret_from_irq
-
- .align 5
-ll_serial_irq: li a0, 6
- move a1, sp
- jal do_IRQ
- j ret_from_irq
diff -puN -L arch/mips/galileo-boards/ev64120/irq.c arch/mips/galileo-boards/ev64120/irq.c~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/ev64120/irq.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,184 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * Code to handle irqs on GT64120A boards
- * Derived from mips/orion and Cort <cort@fsmlabs.com>
- *
- * Copyright (C) 2000 RidgeRun, Inc.
- * Author: RidgeRun, Inc.
- * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/kernel_stat.h>
-#include <linux/module.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/timex.h>
-#include <linux/slab.h>
-#include <linux/random.h>
-#include <asm/bitops.h>
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-#include <asm/galileo-boards/ev64120int.h>
-
-#define MAX_AGENTS_PER_INT 21 /* Random number */
-unsigned char pci_int_irq[MAX_AGENTS_PER_INT];
-static int max_interrupts = 0;
-
-asmlinkage void pci_intA(struct pt_regs *regs)
-{
- unsigned int count = 0;
-
- /* This must be a joke - Ralf */
- for (count = 0; count < max_interrupts; count++)
- do_IRQ(pci_int_irq[count], regs);
-}
-
-asmlinkage void pci_intD(struct pt_regs *regs)
-{
- unsigned int count = 0;
-
- /* Encore une fois - This must be a joke - Ralf */
- for (count = 0; count < max_interrupts; count++)
- do_IRQ(pci_int_irq[count], regs);
-}
-
-/*
- * Now this is scarry. A disable_irq(2) or disable_irq(5) would just
- * accidently disable a pci irq. It shouldn't happen but may just leaving
- * these always enabled or use some reference counting wouldn't be such a
- * bad thing.
- */
-static void disable_ev64120_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- if (irq_nr >= 8) {
- /* All PCI interrupts are on line 5 or 2 */
- clear_c0_status(IE_IRQ0 | IE_IRQ3);
- } else {
- clear_c0_status(0x100 << irq_nr);
- }
- local_irq_restore(flags);
-}
-
-#define mask_and_ack_ev64120_irq disable_ev64120_irq
-
-static inline void enable_ev64120_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- if (irq_nr >= 8) {
- /* All PCI interrupts are on line 5 or 2 */
- set_c0_status(IE_IRQ0 | IE_IRQ3);
- } else {
- set_c0_status(IE_SW0 << irq_nr);
- }
- local_irq_restore(flags);
-}
-
-static unsigned int startup_ev64120_irq(unsigned int irq)
-{
- if (irq >= 8) {
- // NOTE: Add error-handling if > max
- pci_int_irq[max_interrupts++] = irq;
- }
- enable_ev64120_irq(irq);
-
- return 0;
-}
-
-static void shutdown_ev64120_irq(unsigned int irq)
-{
- int count, tmp;
-
- /*
- * Remove PCI interrupts from the pci_int_irq list. Make sure
- * that some handler was removed before decrementing max_interrupts.
- */
- if (irq >= 8) {
- for (count = 0; count < max_interrupts; count++) {
- if (pci_int_irq[count] == irq) {
- for (tmp = count; tmp < max_interrupts; tmp++) {
- pci_int_irq[tmp] =
- pci_int_irq[tmp + 1];
- }
- }
- }
- max_interrupts--;
- }
-}
-
-static void end_ev64120_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_ev64120_irq(irq);
-}
-
-static struct hw_interrupt_type ev64120_irq_type = {
- "EV64120",
- startup_ev64120_irq,
- shutdown_ev64120_irq,
- enable_ev64120_irq,
- disable_ev64120_irq,
- mask_and_ack_ev64120_irq,
- end_ev64120_irq
-};
-
-/*
- * galileo_irq_setup - Initializes CPU interrupts
- */
-void __init init_IRQ(void)
-{
- extern asmlinkage void galileo_handle_int(void);
- int i;
-
- init_generic_irq();
-
- /* Yes, how many interrupts does this beast actually have? -- Ralf */
- for (i = 0; i < NR_IRQS; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &ev64120_irq_type;
- }
-
- /*
- * Clear all of the interrupts while we change the able around a bit.
- * Enable timer. Other interrupts will be enabled as they are
- * registered.
- */
- change_c0_status(ST0_IM | IE_IRQ2, IE_IRQ2);
-
- /* Sets the exception_handler array. */
- set_except_vector(0, galileo_handle_int);
-}
diff -puN -L arch/mips/galileo-boards/ev64120/irq-handler.c arch/mips/galileo-boards/ev64120/irq-handler.c~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/ev64120/irq-handler.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,270 +0,0 @@
-/*
- * Galileo Technology chip interrupt handler
- *
- * Modified by RidgeRun, Inc.
- */
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <asm/ptrace.h>
-#include <linux/config.h>
-#include <linux/sched.h>
-#include <linux/kernel_stat.h>
-#include <asm/io.h>
-#include <asm/gt64120.h>
-#include <asm/galileo-boards/ev64120.h>
-#include <asm/galileo-boards/ev64120int.h>
-
-/*
- * These are interrupt handlers for the GT on-chip interrupts. They all come
- * in to the MIPS on a single interrupt line, and have to be handled and ack'ed
- * differently than other MIPS interrupts.
- */
-
-#if CURRENTLY_UNUSED
-
-struct tq_struct irq_handlers[MAX_CAUSE_REGS][MAX_CAUSE_REG_WIDTH];
-void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr);
-
-/*
- * hook_irq_handler
- *
- * Hooks IRQ handler to the system. When the system is interrupted
- * the interrupt service routine is called.
- *
- * Inputs :
- * int_cause - The interrupt cause number. In EVB64120 two parameters
- * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
- * bit_num - Indicates which bit number in the cause register
- * isr_ptr - Pointer to the interrupt service routine
- *
- * Outputs :
- */
-void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr)
-{
- irq_handlers[int_cause][bit_num].routine = isr_ptr;
-}
-
-
-/*
- * enable_galileo_irq
- *
- * Enables the IRQ on Galileo Chip
- *
- * Inputs :
- * int_cause - The interrupt cause number. In EVB64120 two parameters
- * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
- * bit_num - Indicates which bit number in the cause register
- *
- * Outputs :
- * 1 if succesful, 0 if failure
- */
-int enable_galileo_irq(int int_cause, int bit_num)
-{
- if (int_cause == INT_CAUSE_MAIN)
- SET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER, (1 << bit_num));
- else if (int_cause == INT_CAUSE_HIGH)
- SET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER,
- (1 << bit_num));
- else
- return 0;
- return 1;
-}
-
-/*
- * disable_galileo_irq
- *
- * Disables the IRQ on Galileo Chip
- *
- * Inputs :
- * int_cause - The interrupt cause number. In EVB64120 two parameters
- * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
- * bit_num - Indicates which bit number in the cause register
- *
- * Outputs :
- * 1 if succesful, 0 if failure
- */
-int disable_galileo_irq(int int_cause, int bit_num)
-{
- if (int_cause == INT_CAUSE_MAIN)
- RESET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER,
- (1 << bit_num));
- else if (int_cause == INT_CAUSE_HIGH)
- RESET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER,
- (1 << bit_num));
- else
- return 0;
- return 1;
-}
-
-#endif /* UNUSED */
-
-/*
- * galileo_irq -
- *
- * Interrupt handler for interrupts coming from the Galileo chip.
- * It could be timer interrupt, built in ethernet ports etc...
- *
- * Inputs :
- *
- * Outputs :
- *
- */
-static void galileo_irq(int irq, void *dev_id, struct pt_regs *regs)
-{
- unsigned int irq_src, int_high_src, irq_src_mask,
- int_high_src_mask;
- int handled;
- unsigned int count;
- static int counter = 0;
-
- GT_READ(GT_INTRCAUSE_OFS, &irq_src);
- GT_READ(GT_INTRMASK_OFS, &irq_src_mask);
- GT_READ(GT_HINTRCAUSE_OFS, &int_high_src);
- GT_READ(GT_HINTRMASK_OFS, &int_high_src_mask);
- irq_src = irq_src & irq_src_mask;
- int_high_src = int_high_src & int_high_src_mask;
-
- handled = 0;
-
- /* Execute all interrupt handlers */
- /* Check for timer interrupt */
- if (irq_src & 0x00000800) {
- handled = 1;
- irq_src &= ~0x00000800;
- // RESET_REG_BITS (INTERRUPT_CAUSE_REGISTER,BIT8);
- do_timer(regs);
- }
-
- if (irq_src) {
- printk(KERN_INFO
- "Other Galileo interrupt received irq_src %x\n",
- irq_src);
-#if CURRENTLY_UNUSED
- for (count = 0; count < MAX_CAUSE_REG_WIDTH; count++) {
- if (irq_src & (1 << count)) {
- if (irq_handlers[INT_CAUSE_MAIN][count].
- routine) {
- queue_task(&irq_handlers
- [INT_CAUSE_MAIN][count],
- &tq_immediate);
- mark_bh(IMMEDIATE_BH);
- handled = 1;
- }
- }
- }
-#endif /* UNUSED */
- }
- GT_WRITE(GT_INTRCAUSE_OFS, 0);
- GT_WRITE(GT_HINTRCAUSE_OFS, 0);
-
-#undef GALILEO_I2O
-#ifdef GALILEO_I2O
- /*
- Future I2O support. We currently attach I2O interrupt handlers to the
- Galileo interrupt (int 4) and handle them in do_IRQ.
- */
- if (isInBoundDoorBellInterruptSet()) {
- printk(KERN_INFO "I2O doorbell interrupt received.\n");
- handled = 1;
- }
-
- if (isInBoundPostQueueInterruptSet()) {
- printk(KERN_INFO "I2O Queue interrupt received.\n");
- handled = 1;
- }
-
- /*
- This normally would be outside of the ifdef, but since
- we're handling I2O outside of this handler, this
- printk shows up every time we get a valid I2O
- interrupt. So turn this off for now.
- */
- if (handled == 0) {
- if (counter < 50) {
- printk("Spurious Galileo interrupt...\n");
- counter++;
- }
- }
-#endif
-}
-
-/*
- * galileo_time_init -
- *
- * Initializes timer using galileo's built in timer.
- *
- *
- * Inputs :
- * irq - number of irq to be used by the timer
- *
- * Outpus :
- *
- */
-#ifdef CONFIG_SYSCLK_100
-#define Sys_clock (100 * 1000000) // 100 MHz
-#endif
-#ifdef CONFIG_SYSCLK_83
-#define Sys_clock (83.333 * 1000000) // 83.333 MHz
-#endif
-#ifdef CONFIG_SYSCLK_75
-#define Sys_clock (75 * 1000000) // 75 MHz
-#endif
-
-/*
- * This will ignore the standard MIPS timer interrupt handler that is passed
- * in as *irq (=irq0 in ../kernel/time.c). We will do our own timer interrupt
- * handling.
- */
-void galileo_time_init(struct irqaction *irq)
-{
- extern irq_desc_t irq_desc[NR_IRQS];
- static struct irqaction timer;
-
- /* Disable timer first */
- GT_WRITE(GT_TC_CONTROL_OFS, 0);
- /* Load timer value for 100 Hz */
- GT_WRITE(GT_TC3_OFS, Sys_clock / 100);
-
- /*
- * Create the IRQ structure entry for the timer. Since we're too early
- * in the boot process to use the "request_irq()" call, we'll hard-code
- * the values to the correct interrupt line.
- */
- timer.handler = &galileo_irq;
- timer.flags = SA_SHIRQ;
- timer.name = "timer";
- timer.dev_id = NULL;
- timer.next = NULL;
- timer.mask = 0;
- irq_desc[TIMER].action = &timer;
-
- /* Enable timer ints */
- GT_WRITE(GT_TC_CONTROL_OFS, 0xc0);
- /* clear Cause register first */
- GT_WRITE(GT_INTRCAUSE_OFS, 0x0);
- /* Unmask timer int */
- GT_WRITE(GT_INTRMASK_OFS, 0x800);
- /* Clear High int register */
- GT_WRITE(GT_HINTRCAUSE_OFS, 0x0);
- /* Mask All interrupts at High cause interrupt */
- GT_WRITE(GT_HINTRMASK_OFS, 0x0);
-
-}
-
-void galileo_irq_init(void)
-{
-#if CURRENTLY_UNUSED
- int i, j;
-
- /* Reset irq handlers pointers to NULL */
- for (i = 0; i < MAX_CAUSE_REGS; i++) {
- for (j = 0; j < MAX_CAUSE_REG_WIDTH; j++) {
- irq_handlers[i][j].next = NULL;
- irq_handlers[i][j].sync = 0;
- irq_handlers[i][j].routine = NULL;
- irq_handlers[i][j].data = NULL;
- }
- }
-#endif
-}
diff -puN -L arch/mips/galileo-boards/ev64120/Makefile arch/mips/galileo-boards/ev64120/Makefile~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/ev64120/Makefile
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,12 +0,0 @@
-#
-# Copyright 2000 RidgeRun, Inc.
-# Author: RidgeRun, Inc.
-# glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
-#
-# Makefile for the Galileo EV64120 board.
-#
-
-obj-y := serialGT.o int-handler.o promcon.o reset.o setup.o irq.o \
- irq-handler.o
-
-EXTRA_AFLAGS := $(CFLAGS)
diff -puN -L arch/mips/galileo-boards/ev64120/promcon.c arch/mips/galileo-boards/ev64120/promcon.c~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/ev64120/promcon.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,70 +0,0 @@
-/*
- * Wrap-around code for a console using the
- * SGI PROM io-routines.
- *
- * Copyright (c) 1999 Ulf Carlsson
- *
- * Derived from DECstation promcon.c
- * Copyright (c) 1998 Harald Koerfgen
- * Copyright (c) 2002 Ralf Baechle
- */
-
-#include <linux/tty.h>
-#include <linux/major.h>
-#include <linux/ptrace.h>
-#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/fs.h>
-/*
-#include <asm/sgialib.h>
-*/
-
-static void prom_console_write(struct console *co, const char *s,
- unsigned count)
-{
- extern int CONSOLE_CHANNEL; // The default serial port
- unsigned i;
- /*
- * Now, do each character
- */
- for (i = 0; i < count; i++) {
- if (*s == 10)
- serial_putc(CONSOLE_CHANNEL, 13);
- serial_putc(CONSOLE_CHANNEL, *s++);
- }
-}
-int prom_getchar(void)
-{
- return 0;
-}
-static int __init prom_console_setup(struct console *co, char *options)
-{
- return 0;
-}
-
-static kdev_t prom_console_device(struct console *c)
-{
- return mk_kdev(TTY_MAJOR, 64 + c->index);
-}
-
-static struct console sercons = {
- .name = "ttyS",
- .write = prom_console_write,
- .device = prom_console_device,
- .setup = prom_console_setup,
- .flags = CON_PRINTBUFFER,
- .index = -1,
-};
-
-
-/*
- * Register console.
- */
-
-void gal_serial_console_init(void)
-{
- // serial_init();
- //serial_set(115200);
-
- register_console(&sercons);
-}
diff -puN -L arch/mips/galileo-boards/ev64120/README arch/mips/galileo-boards/ev64120/README~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/ev64120/README
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,2 +0,0 @@
-The compressed boot code was such a mess I deleted it. Feel free to
-reimplement it -- Ralf
diff -puN -L arch/mips/galileo-boards/ev64120/reset.c arch/mips/galileo-boards/ev64120/reset.c~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/ev64120/reset.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,45 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1997, 2002 Ralf Baechle
- */
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <asm/io.h>
-#include <asm/cacheflush.h>
-#include <asm/processor.h>
-#include <asm/reboot.h>
-#include <asm/system.h>
-
-void galileo_machine_restart(char *command)
-{
- *(volatile char *) 0xbc000000 = 0x0f;
- /*
- * Ouch, we're still alive ... This time we take the silver bullet ...
- * ... and find that we leave the hardware in a state in which the
- * kernel in the flush locks up somewhen during of after the PCI
- * detection stuff.
- */
- set_c0_status(ST0_BEV | ST0_ERL);
- change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
- flush_cache_all();
- write_c0_wired(0);
- __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
-}
-
-void galileo_machine_halt(void)
-{
- printk(KERN_NOTICE "You can safely turn off the power\n");
- while (1)
- __asm__(".set\tmips3\n\t"
- "wait\n\t"
- ".set\tmips0");
-
-}
-
-void galileo_machine_power_off(void)
-{
- galileo_machine_halt();
-}
diff -puN -L arch/mips/galileo-boards/ev64120/serialGT.c arch/mips/galileo-boards/ev64120/serialGT.c~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/ev64120/serialGT.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,212 +0,0 @@
-/*
- * serialGT.c
- *
- * BRIEF MODULE DESCRIPTION
- * Low Level Serial Port control for use
- * with the Galileo EVB64120A MIPS eval board and
- * its on board two channel 16552 Uart.
- *
- * Copyright (C) 2000 RidgeRun, Inc.
- * Author: RidgeRun, Inc.
- * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-// Note:
-// Serial CHANNELS - 0 is the bottom connector of evb64120A.
-// (The one that maps to the "B" channel of the
-// board's uart)
-// 1 is the top connector of evb64120A.
-// (The one that maps to the "A" channel of the
-// board's uart)
-int DEBUG_CHANNEL = 0; // See Note Above
-int CONSOLE_CHANNEL = 1; // See Note Above
-
-#define DUART 0xBD000000 /* Base address of Uart. */
-#define CHANNELOFFSET 0x20 /* DUART+CHANNELOFFSET gets you to the ChanA
- register set of the 16552 Uart device.
- DUART+0 gets you to the ChanB register set.
- */
-#define DUART_DELTA 0x4
-#define FIFO_ENABLE 0x07
-#define INT_ENABLE 0x04 /* default interrupt mask */
-
-#define RBR 0x00
-#define THR 0x00
-#define DLL 0x00
-#define IER 0x01
-#define DLM 0x01
-#define IIR 0x02
-#define FCR 0x02
-#define LCR 0x03
-#define MCR 0x04
-#define LSR 0x05
-#define MSR 0x06
-#define SCR 0x07
-
-#define LCR_DLAB 0x80
-#define XTAL 1843200
-#define LSR_THRE 0x20
-#define LSR_BI 0x10
-#define LSR_DR 0x01
-#define MCR_LOOP 0x10
-#define ACCESS_DELAY 0x10000
-
-/******************************
- Routine:
- Description:
- ******************************/
-int inreg(int channel, int reg)
-{
- int val;
- val =
- *((volatile unsigned char *) DUART +
- (channel * CHANNELOFFSET) + (reg * DUART_DELTA));
- return val;
-}
-
-/******************************
- Routine:
- Description:
- ******************************/
-void outreg(int channel, int reg, unsigned char val)
-{
- *((volatile unsigned char *) DUART + (channel * CHANNELOFFSET)
- + (reg * DUART_DELTA)) = val;
-}
-
-/******************************
- Routine:
- Description:
- Initialize the device driver.
- ******************************/
-void serial_init(int channel)
-{
- /*
- * Configure active port, (CHANNELOFFSET already set.)
- *
- * Set 8 bits, 1 stop bit, no parity.
- *
- * LCR<7> 0 divisor latch access bit
- * LCR<6> 0 break control (1=send break)
- * LCR<5> 0 stick parity (0=space, 1=mark)
- * LCR<4> 0 parity even (0=odd, 1=even)
- * LCR<3> 0 parity enable (1=enabled)
- * LCR<2> 0 # stop bits (0=1, 1=1.5)
- * LCR<1:0> 11 bits per character(00=5, 01=6, 10=7, 11=8)
- */
- outreg(channel, LCR, 0x3);
-
- outreg(channel, FCR, FIFO_ENABLE); /* Enable the FIFO */
-
- outreg(channel, IER, INT_ENABLE); /* Enable appropriate interrupts */
-}
-
-/******************************
- Routine:
- Description:
- Set the baud rate.
- ******************************/
-void serial_set(int channel, unsigned long baud)
-{
- unsigned char sav_lcr;
-
- /*
- * Enable access to the divisor latches by setting DLAB in LCR.
- *
- */
- sav_lcr = inreg(channel, LCR);
-
-#if 0
- /*
- * Set baud rate
- */
- outreg(channel, LCR, LCR_DLAB | sav_lcr);
- // outreg(DLL,(XTAL/(16*2*(baud))-2));
- outreg(channel, DLL, XTAL / (16 * baud));
- // outreg(DLM,(XTAL/(16*2*(baud))-2)>>8);
- outreg(channel, DLM, (XTAL / (16 * baud)) >> 8);
-#else
- /*
- * Note: Set baud rate, hardcoded here for rate of 115200
- * since became unsure of above "buad rate" algorithm (??).
- */
- outreg(channel, LCR, 0x83);
- outreg(channel, DLM, 0x00); // See note above
- outreg(channel, DLL, 0x02); // See note above.
- outreg(channel, LCR, 0x03);
-#endif
-
- /*
- * Restore line control register
- */
- outreg(channel, LCR, sav_lcr);
-}
-
-
-/******************************
- Routine:
- Description:
- Transmit a character.
- ******************************/
-void serial_putc(int channel, int c)
-{
- while ((inreg(channel, LSR) & LSR_THRE) == 0);
- outreg(channel, THR, c);
-}
-
-/******************************
- Routine:
- Description:
- Read a received character if one is
- available. Return -1 otherwise.
- ******************************/
-int serial_getc(int channel)
-{
- if (inreg(channel, LSR) & LSR_DR) {
- return inreg(channel, RBR);
- }
- return -1;
-}
-
-/******************************
- Routine:
- Description:
- Used by embedded gdb client. (example; gdb-stub.c)
- ******************************/
-char getDebugChar()
-{
- int val;
- while ((val = serial_getc(DEBUG_CHANNEL)) == -1); // loop until we get a character in.
- return (char) val;
-}
-
-/******************************
- Routine:
- Description:
- Used by embedded gdb target. (example; gdb-stub.c)
- ******************************/
-void putDebugChar(char c)
-{
- serial_putc(DEBUG_CHANNEL, (int) c);
-}
diff -puN -L arch/mips/galileo-boards/ev64120/setup.c arch/mips/galileo-boards/ev64120/setup.c~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/ev64120/setup.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,176 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * Galileo Evaluation Boards - board dependent boot routines
- *
- * Copyright (C) 2000 RidgeRun, Inc.
- * Author: RidgeRun, Inc.
- * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/swap.h>
-#include <linux/ioport.h>
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/timex.h>
-#include <linux/version.h>
-
-#include <asm/bootinfo.h>
-#include <asm/page.h>
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/pci.h>
-#include <asm/processor.h>
-#include <asm/ptrace.h>
-#include <asm/reboot.h>
-#include <asm/mc146818rtc.h>
-#include <asm/traps.h>
-
-extern struct rtc_ops no_rtc_ops;
-
-/* These functions are used for rebooting or halting the machine*/
-extern void galileo_machine_restart(char *command);
-extern void galileo_machine_halt(void);
-extern void galileo_machine_power_off(void);
-/*
- *This structure holds pointers to the pci configuration space accesses
- *and interrupts allocating routine for device over the PCI
- */
-extern struct pci_ops galileo_pci_ops;
-
-extern unsigned long mips_machgroup;
-
-char arcs_cmdline[CL_SIZE] = { "console=ttyS0,115200 "
- "root=/dev/nfs rw nfsroot=192.168.1.1:/mnt/disk2/fs.gal "
- "ip=192.168.1.211:192.168.1.1:::gt::"
-};
-
-//struct eeprom_parameters eeprom_param;
-
-/*
- * This function is added because arch/mips/mm/init.c needs it
- * basically it does nothing
- */
-void prom_free_prom_memory(void)
-{
-}
-
-extern void (*board_time_init) (struct irqaction * irq);
-
-static unsigned char galileo_rtc_read_data(unsigned long addr)
-{
- return 0;
-}
-
-static void galileo_rtc_write_data(unsigned char data, unsigned long addr)
-{
-}
-
-static int galileo_rtc_bcd_mode(void)
-{
- return 0;
-}
-
-struct rtc_ops galileo_rtc_ops = {
- &galileo_rtc_read_data,
- &galileo_rtc_write_data,
- &galileo_rtc_bcd_mode
-};
-
-/********************************************************************
- *ev64120_setup -
- *
- *Initializes basic routines and structures pointers, memory size (as
- *given by the bios and saves the command line.
- *
- *
- *Inputs :
- *
- *Outpus :
- *
- *********************************************************************/
-extern void galileo_time_init();
-
-void __init ev64120_setup(void)
-{
- _machine_restart = galileo_machine_restart;
- _machine_halt = galileo_machine_halt;
- _machine_power_off = galileo_machine_power_off;
-
- rtc_ops = &galileo_rtc_ops;
-
- board_time_init = galileo_time_init;
- set_io_port_base(KSEG1);
-
-#ifdef CONFIG_L2_L3_CACHE
-#error "external cache not implemented yet"
- config_register = read_c0_config();
- printk("\n\n\nchecking second level cache cp0_config = %08lx\n",
- config_register);
- if (config_register & CONF_SC) { // second/third level cache available
- config_register = config_register & (1 << 12);
- write_c0_config(config_register);
- printk
- ("\n\n\nchecking second level cache c0_config = %08lx\n",
- config_register);
- }
-#endif
-}
-
-const char *get_system_type(void)
-{
- return "Galileo EV64120A";
-}
-
-/*
- * SetUpBootInfo -
- *
- * This function is called at very first stages of kernel startup.
- * It specifies for the kernel the evaluation board that the linux
- * is running on. Then it saves the eprom parameters that holds the
- * command line, memory size etc...
- *
- * Inputs :
- * argc - nothing
- * argv - holds a pointer to the eprom parameters
- * envp - nothing
- */
-
-void SetUpBootInfo(int argc, char **argv, char **envp)
-{
- mips_machgroup = MACH_GROUP_GALILEO;
- mips_machtype = MACH_EV64120A;
-}
-
-void __init prom_init(int a, char **b, char **c, int *d)
-{
- mips_machgroup = MACH_GROUP_GALILEO;
- add_memory_region(0, 32 << 20, BOOT_MEM_RAM);
-}
diff -puN arch/mips/galileo-boards/ev96100/init.c~mips-megapatch arch/mips/galileo-boards/ev96100/init.c
--- 25/arch/mips/galileo-boards/ev96100/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/galileo-boards/ev96100/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -33,13 +33,12 @@
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
#include <linux/string.h>
#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <asm/galileo-boards/ev96100.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <asm/gt64120.h>
/* Environment variable */
@@ -51,7 +50,6 @@ typedef struct {
int prom_argc;
char **prom_argv, **prom_envp;
-char arcs_cmdline[CL_SIZE];
int init_debug = 0;
@@ -60,8 +58,9 @@ char * __init prom_getcmdline(void)
return &(arcs_cmdline[0]);
}
-void prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
void __init prom_init_cmdline(void)
@@ -155,14 +154,14 @@ const char *get_system_type(void)
return "Galileo EV96100";
}
-void __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+void __init prom_init(void)
{
volatile unsigned char *uart;
char ppbuf[8];
- prom_argc = argc;
- prom_argv = argv;
- prom_envp = envp;
+ prom_argc = fw_arg0;
+ prom_argv = (char **) fw_arg1;
+ prom_envp = (char **) fw_arg2;
mips_machgroup = MACH_GROUP_GALILEO;
mips_machtype = MACH_EV96100;
diff -puN arch/mips/galileo-boards/ev96100/int-handler.S~mips-megapatch arch/mips/galileo-boards/ev96100/int-handler.S
--- 25/arch/mips/galileo-boards/ev96100/int-handler.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/galileo-boards/ev96100/int-handler.S 2004-02-19 12:53:00.000000000 -0800
@@ -23,8 +23,9 @@ NESTED(ev96100IRQ, PT_SIZE, sp)
j ret_from_irq
1: beqz t0, 3f # spurious interrupt
+
move a0, t0
- move a1, sp # delay slot
+ move a1, sp
jal ev96100_cpu_irq
j ret_from_irq
diff -puN arch/mips/galileo-boards/ev96100/irq.c~mips-megapatch arch/mips/galileo-boards/ev96100/irq.c
--- 25/arch/mips/galileo-boards/ev96100/irq.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/galileo-boards/ev96100/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -38,55 +38,10 @@
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/timex.h>
-#include <linux/slab.h>
-#include <linux/random.h>
-
-#include <asm/bitops.h>
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-#include <asm/galileo-boards/ev96100int.h>
+#include <asm/irq_cpu.h>
-extern void mips_timer_interrupt(int irq, struct pt_regs *regs);
extern asmlinkage void ev96100IRQ(void);
-static void disable_ev96100_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- clear_c0_status(0x100 << irq_nr);
- local_irq_restore(flags);
-}
-
-static inline void enable_ev96100_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- set_c0_status(0x100 << irq_nr);
- local_irq_restore(flags);
-}
-
-static unsigned int startup_ev96100_irq(unsigned int irq)
-{
- enable_ev96100_irq(irq);
-
- return 0; /* never anything pending */
-}
-
-#define shutdown_ev96100_irq disable_ev96100_irq
-#define mask_and_ack_ev96100_irq disable_ev96100_irq
-
-static void end_ev96100_irq (unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_ev96100_irq(irq);
-}
-
static inline unsigned int ffz8(unsigned int word)
{
unsigned long k;
@@ -99,35 +54,14 @@ static inline unsigned int ffz8(unsigned
return k;
}
-asmlinkage void ev96100_cpu_irq(unsigned long cause, struct pt_regs * regs)
+asmlinkage void ev96100_cpu_irq(unsigned int pendin)
{
- if (!(cause & 0xff00))
- return;
-
- do_IRQ(ffz8((cause >> 8) & 0xff), regs);
+ do_IRQ(ffz8(pending >> 8), regs);
}
-static struct hw_interrupt_type ev96100_irq_type = {
- "EV96100",
- startup_ev96100_irq,
- shutdown_ev96100_irq,
- enable_ev96100_irq,
- disable_ev96100_irq,
- mask_and_ack_ev96100_irq,
- end_ev96100_irq
-};
-
void __init init_IRQ(void)
{
- int i;
-
set_except_vector(0, ev96100IRQ);
init_generic_irq();
-
- for (i = 0; i < 8; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &ev96100_irq_type;
- }
+ mips_cpu_irq_init(0);
}
diff -puN arch/mips/galileo-boards/ev96100/Makefile~mips-megapatch arch/mips/galileo-boards/ev96100/Makefile
--- 25/arch/mips/galileo-boards/ev96100/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/galileo-boards/ev96100/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -6,6 +6,4 @@
# Makefile for the Galileo EV96100 board.
#
-obj-y += init.o time.o irq.o int-handler.o setup.o puts.o
-
-EXTRA_AFLAGS := $(CFLAGS)
+obj-y += init.o irq.o puts.o reset.o time.o int-handler.o setup.o
diff -puN arch/mips/galileo-boards/ev96100/puts.c~mips-megapatch arch/mips/galileo-boards/ev96100/puts.c
--- 25/arch/mips/galileo-boards/ev96100/puts.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/galileo-boards/ev96100/puts.c 2004-02-19 12:53:00.000000000 -0800
@@ -4,7 +4,7 @@
*/
#include <linux/types.h>
-#include <asm/galileo-boards/ev96100.h>
+#include <asm/gt64120.h>
//#define SERIAL_BASE EV96100_UART0_REGS_BASE
@@ -22,123 +22,117 @@
#undef SLOW_DOWN
static const char digits[16] = "0123456789abcdef";
-static volatile unsigned char * const com1 = (unsigned char *)SERIAL_BASE;
+static volatile unsigned char *const com1 = (unsigned char *) SERIAL_BASE;
#ifdef SLOW_DOWN
static inline void slow_down()
{
- int k;
- for (k=0; k<10000; k++);
+ int k;
+ for (k = 0; k < 10000; k++);
}
#else
#define slow_down()
#endif
-void
-putch(const unsigned char c)
+void putch(const unsigned char c)
{
- unsigned char ch;
- int i = 0;
+ unsigned char ch;
+ int i = 0;
- do {
- ch = com1[SERB_CMD];
- slow_down();
- i++;
- if (i>TIMEOUT) {
- break;
- }
- } while (0 == (ch & TX_BUSY));
- com1[SERB_DATA] = c;
-}
-
-void
-putchar(const unsigned char c)
-{
- unsigned char ch;
- int i = 0;
-
- do {
- ch = com1[SERB_CMD];
- slow_down();
- i++;
- if (i>TIMEOUT) {
- break;
- }
- } while (0 == (ch & TX_BUSY));
- com1[SERB_DATA] = c;
-}
-
-void
-puts(unsigned char *cp)
-{
- unsigned char ch;
- int i = 0;
-
- while (*cp) {
- do {
- ch = com1[SERB_CMD];
- slow_down();
- i++;
- if (i>TIMEOUT) {
- break;
- }
- } while (0 == (ch & TX_BUSY));
- com1[SERB_DATA] = *cp++;
- }
- putch('\r');
- putch('\n');
-}
-
-void
-fputs(unsigned char *cp)
-{
- unsigned char ch;
- int i = 0;
-
- while (*cp) {
-
- do {
- ch = com1[SERB_CMD];
- slow_down();
- i++;
- if (i>TIMEOUT) {
- break;
- }
- } while (0 == (ch & TX_BUSY));
- com1[SERB_DATA] = *cp++;
- }
-}
-
-
-void
-put64(uint64_t ul)
-{
- int cnt;
- unsigned ch;
-
- cnt = 16; /* 16 nibbles in a 64 bit long */
- putch('0');
- putch('x');
- do {
- cnt--;
- ch = (unsigned char)(ul >> cnt * 4) & 0x0F;
- putch(digits[ch]);
- } while (cnt > 0);
-}
-
-void
-put32(unsigned u)
-{
- int cnt;
- unsigned ch;
-
- cnt = 8; /* 8 nibbles in a 32 bit long */
- putch('0');
- putch('x');
- do {
- cnt--;
- ch = (unsigned char)(u >> cnt * 4) & 0x0F;
- putch(digits[ch]);
- } while (cnt > 0);
+ do {
+ ch = com1[SERB_CMD];
+ slow_down();
+ i++;
+ if (i > TIMEOUT) {
+ break;
+ }
+ } while (0 == (ch & TX_BUSY));
+ com1[SERB_DATA] = c;
+}
+
+void putchar(const unsigned char c)
+{
+ unsigned char ch;
+ int i = 0;
+
+ do {
+ ch = com1[SERB_CMD];
+ slow_down();
+ i++;
+ if (i > TIMEOUT) {
+ break;
+ }
+ } while (0 == (ch & TX_BUSY));
+ com1[SERB_DATA] = c;
+}
+
+void puts(unsigned char *cp)
+{
+ unsigned char ch;
+ int i = 0;
+
+ while (*cp) {
+ do {
+ ch = com1[SERB_CMD];
+ slow_down();
+ i++;
+ if (i > TIMEOUT) {
+ break;
+ }
+ } while (0 == (ch & TX_BUSY));
+ com1[SERB_DATA] = *cp++;
+ }
+ putch('\r');
+ putch('\n');
+}
+
+void fputs(unsigned char *cp)
+{
+ unsigned char ch;
+ int i = 0;
+
+ while (*cp) {
+
+ do {
+ ch = com1[SERB_CMD];
+ slow_down();
+ i++;
+ if (i > TIMEOUT) {
+ break;
+ }
+ } while (0 == (ch & TX_BUSY));
+ com1[SERB_DATA] = *cp++;
+ }
+}
+
+
+void put64(uint64_t ul)
+{
+ int cnt;
+ unsigned ch;
+
+ cnt = 16; /* 16 nibbles in a 64 bit long */
+ putch('0');
+ putch('x');
+ do {
+ cnt--;
+ ch = (unsigned char) (ul >> cnt * 4) & 0x0F;
+ putch(digits[ch]);
+ } while (cnt > 0);
+}
+
+void put32(unsigned u)
+{
+ int cnt;
+ unsigned ch;
+
+ cnt = 8; /* 8 nibbles in a 32 bit long */
+ putch('0');
+ putch('x');
+ do {
+ cnt--;
+ ch = (unsigned char) (u >> cnt * 4) & 0x0F;
+ putch(digits[ch]);
+ } while (cnt > 0);
}
diff -puN /dev/null arch/mips/galileo-boards/ev96100/reset.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/galileo-boards/ev96100/reset.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,70 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Galileo EV96100 reset routines.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's
+ * arch/mips/mips-boards/generic/reset.c
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+#include <asm/gt64120.h>
+
+static void mips_machine_restart(char *command);
+static void mips_machine_halt(void);
+
+static void mips_machine_restart(char *command)
+{
+ set_c0_status(ST0_BEV | ST0_ERL);
+ change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
+ flush_cache_all();
+ write_c0_wired(0);
+ __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
+ while (1);
+}
+
+static void mips_machine_halt(void)
+{
+ printk(KERN_NOTICE "You can safely turn off the power\n");
+ while (1)
+ __asm__(".set\tmips3\n\t"
+ "wait\n\t"
+ ".set\tmips0");
+}
+
+void mips_reboot_setup(void)
+{
+ _machine_restart = mips_machine_restart;
+ _machine_halt = mips_machine_halt;
+}
diff -puN arch/mips/galileo-boards/ev96100/setup.c~mips-megapatch arch/mips/galileo-boards/ev96100/setup.c
--- 25/arch/mips/galileo-boards/ev96100/setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/galileo-boards/ev96100/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -36,13 +36,9 @@
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
-#include <linux/mc146818rtc.h>
#include <linux/string.h>
#include <linux/ctype.h>
#include <linux/pci.h>
-#include <linux/major.h>
-#include <linux/kdev_t.h>
-#include <linux/root_dev.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
@@ -50,86 +46,44 @@
#include <asm/irq.h>
#include <asm/delay.h>
#include <asm/gt64120.h>
-#include <asm/galileo-boards/ev96100.h>
#include <asm/galileo-boards/ev96100int.h>
-#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
-extern void console_setup(char *, int *);
-char serial_console[20];
-#endif
-
-extern char * __init prom_getcmdline(void);
+extern char *__init prom_getcmdline(void);
extern void mips_reboot_setup(void);
-extern struct rtc_ops no_rtc_ops;
-extern struct resource ioport_resource;
unsigned char mac_0_1[12];
-void __init ev96100_setup(void)
+static void __init ev96100_setup(void)
{
- unsigned long config = read_c0_config();
- unsigned long status = read_c0_status();
- unsigned long info = read_c0_info();
+ unsigned int config = read_c0_config();
+ unsigned int status = read_c0_status();
+ unsigned int info = read_c0_info();
u32 tmp;
char *argptr;
clear_c0_status(ST0_FR);
- if (config & 0x8) {
- printk("Secondary cache is enabled\n");
- }
- else {
- printk("Secondary cache is disabled\n");
- }
-
- if (status & (1<<27)) {
- printk("User-mode cache ops enabled\n");
- }
- else {
- printk("User-mode cache ops disabled\n");
- }
-
- printk("CP0 info reg: %x\n", (unsigned)info);
- if (info & (1<<28)) {
- printk("burst mode Scache RAMS\n");
- }
- else {
- printk("pipelined Scache RAMS\n");
- }
-
- if ((info & (0x3<<26)) >> 26 == 0) {
- printk("67 percent drive strength\n");
- }
- else if ((info & (0x3<<26)) >> 26 == 1) {
- printk("50 percent drive strength\n");
- }
- else if ((info & (0x3<<26)) >> 26 == 2) {
- printk("100 percent drive strength\n");
- }
- else if ((info & (0x3<<26)) >> 26 == 3) {
- printk("83 percent drive strength\n");
- }
-
-
- if ((info & (0x3<<23)) >> 23 == 0) {
- printk("Write Protocol: R4000 compatible\n");
- }
- else if ((info & (0x3<<23)) >> 23 == 1) {
- printk("Write Protocol: Reserved\n");
- }
- else if ((info & (0x3<<23)) >> 23 == 2) {
- printk("Write Protocol: Pipelined\n");
- }
- else if ((info & (0x3<<23)) >> 23 == 3) {
- printk("Write Protocol: Write re-issue\n");
- }
-
- if (info & 0x1) {
- printk("Atomic Enable is set\n");
- }
+ if (config & 0x8)
+ printk("Secondary cache is enabled\n");
+ else
+ printk("Secondary cache is disabled\n");
+
+ if (status & (1 << 27))
+ printk("User-mode cache ops enabled\n");
+ else
+ printk("User-mode cache ops disabled\n");
+
+ printk("CP0 info reg: %x\n", (unsigned) info);
+ if (info & (1 << 28))
+ printk("burst mode Scache RAMS\n");
+ else
+ printk("pipelined Scache RAMS\n");
+
+ if (info & 0x1)
+ printk("Atomic Enable is set\n");
argptr = prom_getcmdline();
#ifdef CONFIG_SERIAL_CONSOLE
@@ -139,68 +93,70 @@ void __init ev96100_setup(void)
}
#endif
- rtc_ops = &no_rtc_ops;
mips_reboot_setup();
+
set_io_port_base(KSEG1);
ioport_resource.start = GT_PCI_IO_BASE;
- ioport_resource.end = GT_PCI_IO_BASE + 0x01ffffff;
+ ioport_resource.end = GT_PCI_IO_BASE + 0x01ffffff;
#ifdef CONFIG_BLK_DEV_INITRD
- ROOT_DEV = Root_RAM0;
+ ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
#endif
/*
- * setup gt controller master bit so we can do config cycles
+ * Setup GT controller master bit so we can do config cycles
*/
/* Clear cause register bits */
GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
- GT_INTRCAUSE_TARABORT0_BIT));
+ GT_INTRCAUSE_TARABORT0_BIT));
/* Setup address */
GT_WRITE(GT_PCI0_CFGADDR_OFS,
- (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
- (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
- ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
+ (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
+ (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+ ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
GT_PCI0_CFGADDR_CONFIGEN_BIT);
udelay(2);
- tmp = le32_to_cpu(*(volatile u32 *)(MIPS_GT_BASE+GT_PCI0_CFGDATA_OFS));
+ tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
tmp |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
PCI_COMMAND_MASTER | PCI_COMMAND_SERR);
GT_WRITE(GT_PCI0_CFGADDR_OFS,
- (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
- (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
- ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
+ (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
+ (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+ ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
GT_PCI0_CFGADDR_CONFIGEN_BIT);
udelay(2);
- *(volatile u32 *)(MIPS_GT_BASE+GT_PCI0_CFGDATA_OFS) = cpu_to_le32(tmp);
+ GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
/* Setup address */
GT_WRITE(GT_PCI0_CFGADDR_OFS,
- (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
- (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
- ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
+ (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
+ (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+ ((PCI_COMMAND / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
GT_PCI0_CFGADDR_CONFIGEN_BIT);
udelay(2);
- tmp = le32_to_cpu(*(volatile u32 *)(MIPS_GT_BASE+GT_PCI0_CFGDATA_OFS));
+ tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
}
+early_initcall(ev96100_setup);
+
unsigned short get_gt_devid(void)
{
u32 gt_devid;
/* Figure out if this is a gt96100 or gt96100A */
GT_WRITE(GT_PCI0_CFGADDR_OFS,
- (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
- (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
- ((PCI_VENDOR_ID / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
+ (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) |
+ (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+ ((PCI_VENDOR_ID / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
GT_PCI0_CFGADDR_CONFIGEN_BIT);
udelay(4);
- gt_devid = le32_to_cpu(*(volatile u32 *)
- (MIPS_GT_BASE+GT_PCI0_CFGDATA_OFS));
- return (unsigned short)(gt_devid>>16);
+ gt_devid = GT_READ(GT_PCI0_CFGDATA_OFS);
+
+ return gt_devid >> 16;
}
diff -puN arch/mips/galileo-boards/ev96100/time.c~mips-megapatch arch/mips/galileo-boards/ev96100/time.c
--- 25/arch/mips/galileo-boards/ev96100/time.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/galileo-boards/ev96100/time.c 2004-02-19 12:53:00.000000000 -0800
@@ -37,11 +37,11 @@
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
+#include <linux/timex.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
-
-#include <linux/timex.h>
+#include <asm/time.h>
#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
@@ -57,202 +57,6 @@ static inline void ack_r4ktimer(unsigned
write_c0_compare(newval);
}
-static int set_rtc_mmss(unsigned long nowtime)
-{
- /* EV96100 does not have a real time clock */
- int retval = 0;
-
- return retval;
-}
-
-
-
-/*
- * Figure out the r4k offset, the amount to increment the compare
- * register for each time tick.
- * Use the RTC to calculate offset.
- */
-static unsigned long __init cal_r4koff(void)
-{
- unsigned long count;
- count = 300000000/2;
- return (count / HZ);
-}
-
-
-static unsigned long __init get_mips_time(void)
-{
- unsigned int year, mon, day, hour, min, sec;
-
- year = 2000;
- mon = 10;
- day = 31;
- hour = 0;
- min = 0;
- sec = 0;
- return mktime(year, mon, day, hour, min, sec);
-}
-
-
-/*
- * called from start_kernel()
- */
-void __init time_init(void)
-{
-
- unsigned int est_freq;
-
- r4k_offset = cal_r4koff();
-
- est_freq = 2*r4k_offset*HZ;
- est_freq += 5000; /* round */
- est_freq -= est_freq%10000;
- printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
- (est_freq%1000000)*100/1000000);
- r4k_cur = (read_c0_count() + r4k_offset);
-
- write_c0_compare(r4k_cur);
-
- change_c0_status(ST0_IM, IE_IRQ5); /* FIX ME */
-}
-
-/* This is for machines which generate the exact clock. */
-#define USECS_PER_JIFFY (1000000/HZ)
-
-/* Cycle counter value at the previous timer interrupt.. */
-
-static unsigned int timerhi = 0, timerlo = 0;
-
-/*
- * FIXME: Does playing with the RP bit in c0_status interfere with this code?
- */
-static unsigned long do_fast_gettimeoffset(void)
-{
- u32 count;
- unsigned long res, tmp;
-
- /* Last jiffy when do_fast_gettimeoffset() was called. */
- static unsigned long last_jiffies=0;
- unsigned long quotient;
-
- /*
- * Cached "1/(clocks per usec)*2^32" value.
- * It has to be recalculated once each jiffy.
- */
- static unsigned long cached_quotient=0;
-
- tmp = jiffies;
-
- quotient = cached_quotient;
-
- if (tmp && last_jiffies != tmp) {
- last_jiffies = tmp;
- __asm__(".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- ".set\tmips3\n\t"
- "lwu\t%0,%2\n\t"
- "dsll32\t$1,%1,0\n\t"
- "or\t$1,$1,%0\n\t"
- "ddivu\t$0,$1,%3\n\t"
- "mflo\t$1\n\t"
- "dsll32\t%0,%4,0\n\t"
- "nop\n\t"
- "ddivu\t$0,%0,$1\n\t"
- "mflo\t%0\n\t"
- ".set\tmips0\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=&r" (quotient)
- :"r" (timerhi),
- "m" (timerlo),
- "r" (tmp),
- "r" (USECS_PER_JIFFY));
- cached_quotient = quotient;
- }
-
- /* Get last timer tick in absolute kernel time */
- count = read_c0_count();
-
- /* .. relative to previous jiffy (32 bits is enough) */
- count -= timerlo;
-
- __asm__("multu\t%1,%2\n\t"
- "mfhi\t%0"
- :"=r" (res)
- :"r" (count),
- "r" (quotient));
-
- /*
- * Due to possible jiffies inconsistencies, we need to check
- * the result so that we'll get a timer that is monotonic.
- */
- if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY-1;
-
- return res;
-}
-
-/*
- * This version of gettimeofday has microsecond resolution
- * and better than microsecond precision on fast x86 machines with TSC.
- */
-void do_gettimeofday(struct timeval *tv)
-{
- unsigned long seq;
- unsigned long usec, sec;
-
- do {
- seq = read_seqbegin(&xtime_lock);
-
- usec = do_gettimeoffset();
- {
- unsigned long lost = jiffies - wall_jiffies;
- if (lost)
- usec += lost * (1000000 / HZ);
- }
- sec = xtime.tv_sec;
- usec += (xtime.tv_nsec / 1000);
- } while (read_seqretry(&xtime_lock, seq));
-
- while (usec >= 1000000) {
- usec -= 1000000;
- sec++;
- }
-
- tv->tv_sec = sec;
- tv->tv_usec = usec;
-}
-
-EXPORT_SYMBOL(do_gettimeofday);
-
-void do_settimeofday(struct timeval *tv)
-{
- write_seqlock_irq(&xtime_lock);
- /*
- * This is revolting. We need to set "xtime" correctly. However, the
- * value in this location is the value at the most recent update of
- * wall time. Discover what correction gettimeofday() would have
- * made, and then undo it!
- */
- tv->tv_usec -= do_gettimeoffset();
- tv->tv_usec -= (jiffies - wall_jiffies) * (1000000 / HZ);
-
- while (tv->tv_usec < 0) {
- tv->tv_usec += 1000000;
- tv->tv_sec--;
- }
-
- xtime.tv_sec = tv->tv_sec;
- xtime.tv_nsec = (tv->tv_usec * 1000);
- time_adjust = 0; /* stop active adjtime() */
- time_status |= STA_UNSYNC;
- time_maxerror = NTP_PHASE_LIMIT;
- time_esterror = NTP_PHASE_LIMIT;
- write_sequnlock_irq(&xtime_lock);
-}
-
-EXPORT_SYMBOL(do_settimeofday);
-
/*
* There are a lot of conceptually broken versions of the MIPS timer interrupt
* handler floating around. This one is rather different, but the algorithm
diff -puN -L arch/mips/galileo-boards/generic/Makefile arch/mips/galileo-boards/generic/Makefile~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/generic/Makefile
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,25 +0,0 @@
-#
-# Carsten Langgaard, carstenl@mips.com
-# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
-#
-# ########################################################################
-#
-# This program is free software; you can distribute it and/or modify it
-# under the terms of the GNU General Public License (Version 2) as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-#
-# #######################################################################
-#
-# Makefile for the MIPS boards generic routines under Linux.
-#
-
-obj-y := reset.o
diff -puN -L arch/mips/galileo-boards/generic/reset.c arch/mips/galileo-boards/generic/reset.c~mips-megapatch /dev/null
--- 25/arch/mips/galileo-boards/generic/reset.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,72 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * Galileo EV96100 reset routines.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This file was derived from Carsten Langgaard's
- * arch/mips/mips-boards/generic/reset.c
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <asm/cacheflush.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-#include <asm/reboot.h>
-#include <asm/system.h>
-
-#include <asm/reboot.h>
-#include <asm/galileo-boards/ev96100.h>
-
-static void mips_machine_restart(char *command);
-static void mips_machine_halt(void);
-
-static void mips_machine_restart(char *command)
-{
- set_c0_status(ST0_BEV | ST0_ERL);
- change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
- flush_cache_all();
- write_c0_wired(0);
- __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
- while (1);
-}
-
-static void mips_machine_halt(void)
-{
- printk(KERN_NOTICE "You can safely turn off the power\n");
- while (1)
- __asm__(".set\tmips3\n\t"
- "wait\n\t"
- ".set\tmips0");
-}
-
-void mips_reboot_setup(void)
-{
- _machine_restart = mips_machine_restart;
- _machine_halt = mips_machine_halt;
-}
diff -puN -L arch/mips/gt64120/common/gt_irq.c arch/mips/gt64120/common/gt_irq.c~mips-megapatch /dev/null
--- 25/arch/mips/gt64120/common/gt_irq.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,250 +0,0 @@
-/*
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: jsun@mvista.com or jsun@junsun.net
- *
- * arch/mips/gt64120/common/gt_irq.c
- * Interrupt routines for gt64120. Currently it only handles timer irq.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <asm/ptrace.h>
-#include <linux/config.h>
-#include <linux/sched.h>
-#include <linux/kernel_stat.h>
-#include <asm/io.h>
-#include <asm/gt64120/gt64120.h>
-
-/*
- * These are interrupt handlers for the GT on-chip interrupts. They
- * all come in to the MIPS on a single interrupt line, and have to
- * be handled and ack'ed differently than other MIPS interrupts.
- */
-
-#if CURRENTLY_UNUSED
-
-struct tq_struct irq_handlers[MAX_CAUSE_REGS][MAX_CAUSE_REG_WIDTH];
-void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr);
-
-/*
- * Hooks IRQ handler to the system. When the system is interrupted
- * the interrupt service routine is called.
- *
- * Inputs :
- * int_cause - The interrupt cause number. In EVB64120 two parameters
- * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
- * bit_num - Indicates which bit number in the cause register
- * isr_ptr - Pointer to the interrupt service routine
- */
-void hook_irq_handler(int int_cause, int bit_num, void *isr_ptr)
-{
- irq_handlers[int_cause][bit_num].routine = isr_ptr;
-}
-
-
-/*
- * Enables the IRQ on Galileo Chip
- *
- * Inputs :
- * int_cause - The interrupt cause number. In EVB64120 two parameters
- * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
- * bit_num - Indicates which bit number in the cause register
- *
- * Outputs :
- * 1 if succesful, 0 if failure
- */
-int enable_galileo_irq(int int_cause, int bit_num)
-{
- if (int_cause == INT_CAUSE_MAIN)
- SET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER, (1 << bit_num));
- else if (int_cause == INT_CAUSE_HIGH)
- SET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER,
- (1 << bit_num));
- else
- return 0;
-
- return 1;
-}
-
-/*
- * Disables the IRQ on Galileo Chip
- *
- * Inputs :
- * int_cause - The interrupt cause number. In EVB64120 two parameters
- * are declared, INT_CAUSE_MAIN and INT_CAUSE_HIGH.
- * bit_num - Indicates which bit number in the cause register
- *
- * Outputs :
- * 1 if succesful, 0 if failure
- */
-int disable_galileo_irq(int int_cause, int bit_num)
-{
- if (int_cause == INT_CAUSE_MAIN)
- RESET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER,
- (1 << bit_num));
- else if (int_cause == INT_CAUSE_HIGH)
- RESET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER,
- (1 << bit_num));
- else
- return 0;
- return 1;
-}
-#endif /* UNUSED */
-
-/*
- * Interrupt handler for interrupts coming from the Galileo chip.
- * It could be timer interrupt, built in ethernet ports etc...
- */
-static void gt64120_irq(int irq, void *dev_id, struct pt_regs *regs)
-{
- unsigned int irq_src, int_high_src, irq_src_mask,
- int_high_src_mask;
- int handled;
-
- GT_READ(GT_INTRCAUSE_OFS, &irq_src);
- GT_READ(GT_INTRMASK_OFS, &irq_src_mask);
- GT_READ(GT_HINTRCAUSE_OFS, &int_high_src);
- GT_READ(GT_HINTRMASK_OFS, &int_high_src_mask);
- irq_src = irq_src & irq_src_mask;
- int_high_src = int_high_src & int_high_src_mask;
-
- handled = 0;
-
- /* Execute all interrupt handlers */
- /* Check for timer interrupt */
- if (irq_src & 0x00000800) {
- handled = 1;
- irq_src &= ~0x00000800;
- // RESET_REG_BITS (INTERRUPT_CAUSE_REGISTER,BIT8);
- do_timer(regs);
- }
-
- if (irq_src) {
- printk(KERN_INFO
- "Other Galileo interrupt received irq_src %x\n",
- irq_src);
-#if CURRENTLY_UNUSED
- for (count = 0; count < MAX_CAUSE_REG_WIDTH; count++) {
- if (irq_src & (1 << count)) {
- if (irq_handlers[INT_CAUSE_MAIN][count].
- routine) {
- queue_task(&irq_handlers
- [INT_CAUSE_MAIN][count],
- &tq_immediate);
- mark_bh(IMMEDIATE_BH);
- handled = 1;
- }
- }
- }
-#endif /* UNUSED */
- }
- GT_WRITE(GT_INTRCAUSE_OFS, 0);
- GT_WRITE(GT_HINTRCAUSE_OFS, 0);
-
-#undef GALILEO_I2O
-#ifdef GALILEO_I2O
- /*
- * Future I2O support. We currently attach I2O interrupt handlers to
- * the Galileo interrupt (int 4) and handle them in do_IRQ.
- */
- if (isInBoundDoorBellInterruptSet()) {
- printk(KERN_INFO "I2O doorbell interrupt received.\n");
- handled = 1;
- }
-
- if (isInBoundPostQueueInterruptSet()) {
- printk(KERN_INFO "I2O Queue interrupt received.\n");
- handled = 1;
- }
-
- /*
- * This normally would be outside of the ifdef, but since we're
- * handling I2O outside of this handler, this printk shows up every
- * time we get a valid I2O interrupt. So turn this off for now.
- */
- if (handled == 0) {
- if (counter < 50) {
- printk("Spurious Galileo interrupt...\n");
- counter++;
- }
- }
-#endif
-}
-
-/*
- * Initializes timer using galileo's built in timer.
- */
-#ifdef CONFIG_SYSCLK_100
-#define Sys_clock (100 * 1000000) // 100 MHz
-#endif
-#ifdef CONFIG_SYSCLK_83
-#define Sys_clock (83.333 * 1000000) // 83.333 MHz
-#endif
-#ifdef CONFIG_SYSCLK_75
-#define Sys_clock (75 * 1000000) // 75 MHz
-#endif
-
-/*
- * This will ignore the standard MIPS timer interrupt handler
- * that is passed in as *irq (=irq0 in ../kernel/time.c).
- * We will do our own timer interrupt handling.
- */
-void gt64120_time_init(void)
-{
- extern irq_desc_t irq_desc[NR_IRQS];
- static struct irqaction timer;
-
- /* Disable timer first */
- GT_WRITE(GT_TC_CONTROL_OFS, 0);
- /* Load timer value for 100 Hz */
- GT_WRITE(GT_TC3_OFS, Sys_clock / 100);
-
- /*
- * Create the IRQ structure entry for the timer. Since we're too early
- * in the boot process to use the "request_irq()" call, we'll hard-code
- * the values to the correct interrupt line.
- */
- timer.handler = >64120_irq;
- timer.flags = SA_SHIRQ | SA_INTERRUPT;
- timer.name = "timer";
- timer.dev_id = NULL;
- timer.next = NULL;
- timer.mask = 0;
- irq_desc[TIMER].action = &timer;
-
- enable_irq(TIMER);
-
- /* Enable timer ints */
- GT_WRITE(GT_TC_CONTROL_OFS, 0xc0);
- /* clear Cause register first */
- GT_WRITE(GT_INTRCAUSE_OFS, 0x0);
- /* Unmask timer int */
- GT_WRITE(GT_INTRMASK_OFS, 0x800);
- /* Clear High int register */
- GT_WRITE(GT_HINTRCAUSE_OFS, 0x0);
- /* Mask All interrupts at High cause interrupt */
- GT_WRITE(GT_HINTRMASK_OFS, 0x0);
-}
-
-void gt64120_irq_init(void)
-{
-#if CURRENTLY_UNUSED
- int i, j;
-
- /* Reset irq handlers pointers to NULL */
- for (i = 0; i < MAX_CAUSE_REGS; i++) {
- for (j = 0; j < MAX_CAUSE_REG_WIDTH; j++) {
- irq_handlers[i][j].next = NULL;
- irq_handlers[i][j].sync = 0;
- irq_handlers[i][j].routine = NULL;
- irq_handlers[i][j].data = NULL;
- }
- }
-#endif
-}
diff -puN arch/mips/gt64120/common/Makefile~mips-megapatch arch/mips/gt64120/common/Makefile
--- 25/arch/mips/gt64120/common/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/gt64120/common/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,4 +2,5 @@
# Makefile for common code of gt64120-based boards.
#
-obj-y += gt_irq.o
+obj-y += time.o
+obj-$(CONFIG_PCI) += pci.o
diff -puN /dev/null arch/mips/gt64120/common/pci.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/gt64120/common/pci.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,147 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Galileo Evaluation Boards PCI support.
+ *
+ * The general-purpose functions to read/write and configure the GT64120A's
+ * PCI registers (function names start with pci0 or pci1) are either direct
+ * copies of functions written by Galileo Technology, or are modifications
+ * of their functions to work with Linux 2.4 vs Linux 2.2. These functions
+ * are Copyright - Galileo Technology.
+ *
+ * Other functions are derived from other MIPS PCI implementations, or were
+ * written by RidgeRun, Inc, Copyright (C) 2000 RidgeRun, Inc.
+ * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <asm/gt64120.h>
+
+#define SELF 0
+
+/*
+ * pciXReadConfigReg - Read from a PCI configuration register
+ * - Make sure the GT is configured as a master before
+ * reading from another device on the PCI.
+ * - The function takes care of Big/Little endian conversion.
+ * INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
+ * spec)
+ * pciDevNum: The device number needs to be addressed.
+ * RETURNS: data , if the data == 0xffffffff check the master abort bit in the
+ * cause register to make sure the data is valid
+ *
+ * Configuration Address 0xCF8:
+ *
+ * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
+ * |congif|Reserved| Bus |Device|Function|Register|00|
+ * |Enable| |Number|Number| Number | Number | | <=field Name
+ *
+ */
+static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device)
+{
+ unsigned int DataForRegCf8;
+ unsigned int data;
+
+ DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
+ (PCI_FUNC(device->devfn) << 8) |
+ (offset & ~0x3)) | 0x80000000;
+ GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
+
+ /*
+ * The casual observer might wonder why the READ is duplicated here,
+ * rather than immediately following the WRITE, and just have the swap
+ * in the "if". That's because there is a latency problem with trying
+ * to read immediately after setting up the address register. The "if"
+ * check gives enough time for the address to stabilize, so the READ
+ * can work.
+ */
+ if (PCI_SLOT(device->devfn) == SELF) /* This board */
+ return GT_READ(GT_PCI0_CFGDATA_OFS);
+ else /* PCI is little endian so swap the Data. */
+ return __GT_READ(GT_PCI0_CFGDATA_OFS);
+}
+
+/*
+ * pciXWriteConfigReg - Write to a PCI configuration register
+ * - Make sure the GT is configured as a master before
+ * writingto another device on the PCI.
+ * - The function takes care of Big/Little endian conversion.
+ * Inputs: unsigned int regOffset: The register offset as it apears in the
+ * GT spec
+ * (or any other PCI device spec)
+ * pciDevNum: The device number needs to be addressed.
+ *
+ * Configuration Address 0xCF8:
+ *
+ * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
+ * |congif|Reserved| Bus |Device|Function|Register|00|
+ * |Enable| |Number|Number| Number | Number | | <=field Name
+ *
+ */
+static void pci0WriteConfigReg(unsigned int offset,
+ struct pci_dev *device, unsigned int data)
+{
+ unsigned int DataForRegCf8;
+
+ DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
+ (PCI_FUNC(device->devfn) << 8) |
+ (offset & ~0x3)) | 0x80000000;
+ GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
+
+ if (PCI_SLOT(device->devfn) == SELF) /* This board */
+ GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
+ else /* configuration Transaction over the pci. */
+ __GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
+}
+
+extern struct pci_ops gt64120_pci_ops;
+
+void __init pcibios_init(void)
+{
+ u32 tmp;
+ struct pci_dev controller;
+
+ controller.devfn = SELF;
+
+ tmp = GT_READ(GT_PCI0_CMD_OFS); /* Huh??? -- Ralf */
+ tmp = GT_READ(GT_PCI0_BARE_OFS);
+
+ /*
+ * You have to enable bus mastering to configure any other
+ * card on the bus.
+ */
+ tmp = pci0ReadConfigReg(PCI_COMMAND, &controller);
+ tmp |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
+ pci0WriteConfigReg(PCI_COMMAND, &controller, tmp);
+
+ /*
+ * Reset PCI I/O and PCI MEM values to ones supported by EVM.
+ */
+ ioport_resource.start = GT_PCI_IO_BASE;
+ ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
+ iomem_resource.start = GT_PCI_MEM_BASE;
+ iomem_resource.end = GT_PCI_MEM_BASE + GT_PCI_MEM_SIZE - 1;
+
+ pci_scan_bus(0, >64120_pci_ops, NULL);
+}
diff -puN /dev/null arch/mips/gt64120/common/time.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/gt64120/common/time.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,98 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Galileo Technology chip interrupt handler
+ */
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/kernel_stat.h>
+#include <asm/ptrace.h>
+#include <asm/gt64120.h>
+
+/*
+ * These are interrupt handlers for the GT on-chip interrupts. They all come
+ * in to the MIPS on a single interrupt line, and have to be handled and ack'ed
+ * differently than other MIPS interrupts.
+ */
+
+static void gt64120_irq(int irq, void *dev_id, struct pt_regs *regs)
+{
+ unsigned int irq_src, int_high_src, irq_src_mask, int_high_src_mask;
+ int handled = 0;
+
+ irq_src = GT_READ(GT_INTRCAUSE_OFS);
+ irq_src_mask = GT_READ(GT_INTRMASK_OFS);
+ int_high_src = GT_READ(GT_HINTRCAUSE_OFS);
+ int_high_src_mask = GT_READ(GT_HINTRMASK_OFS);
+ irq_src = irq_src & irq_src_mask;
+ int_high_src = int_high_src & int_high_src_mask;
+
+ if (irq_src & 0x00000800) { /* Check for timer interrupt */
+ handled = 1;
+ irq_src &= ~0x00000800;
+ do_timer(regs);
+ }
+
+ GT_WRITE(GT_INTRCAUSE_OFS, 0);
+ GT_WRITE(GT_HINTRCAUSE_OFS, 0);
+}
+
+/*
+ * Initializes timer using galileo's built in timer.
+ */
+#ifdef CONFIG_SYSCLK_100
+#define Sys_clock (100 * 1000000) // 100 MHz
+#endif
+#ifdef CONFIG_SYSCLK_83
+#define Sys_clock (83.333 * 1000000) // 83.333 MHz
+#endif
+#ifdef CONFIG_SYSCLK_75
+#define Sys_clock (75 * 1000000) // 75 MHz
+#endif
+
+/*
+ * This will ignore the standard MIPS timer interrupt handler that is passed in
+ * as *irq (=irq0 in ../kernel/time.c). We will do our own timer interrupt
+ * handling.
+ */
+void gt64120_time_init(void)
+{
+ extern irq_desc_t irq_desc[NR_IRQS];
+ static struct irqaction timer;
+
+ /* Disable timer first */
+ GT_WRITE(GT_TC_CONTROL_OFS, 0);
+ /* Load timer value for 100 Hz */
+ GT_WRITE(GT_TC3_OFS, Sys_clock / 100);
+
+ /*
+ * Create the IRQ structure entry for the timer. Since we're too early
+ * in the boot process to use the "request_irq()" call, we'll hard-code
+ * the values to the correct interrupt line.
+ */
+ timer.handler = gt64120_irq;
+ timer.flags = SA_SHIRQ | SA_INTERRUPT;
+ timer.name = "timer";
+ timer.dev_id = NULL;
+ timer.next = NULL;
+ timer.mask = 0;
+ irq_desc[GT_TIMER].action = &timer;
+
+ enable_irq(GT_TIMER);
+
+ /* Enable timer ints */
+ GT_WRITE(GT_TC_CONTROL_OFS, 0xc0);
+ /* clear Cause register first */
+ GT_WRITE(GT_INTRCAUSE_OFS, 0x0);
+ /* Unmask timer int */
+ GT_WRITE(GT_INTRMASK_OFS, 0x800);
+ /* Clear High int register */
+ GT_WRITE(GT_HINTRCAUSE_OFS, 0x0);
+ /* Mask All interrupts at High cause interrupt */
+ GT_WRITE(GT_HINTRMASK_OFS, 0x0);
+}
diff -puN /dev/null arch/mips/gt64120/ev64120/int-handler.S
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/gt64120/ev64120/int-handler.S 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,113 @@
+/*
+ * int-handler.S
+ *
+ * Based on the cobalt handler.
+ */
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+/*
+ * galileo_handle_int -
+ * We check for the timer first, then check PCI ints A and D.
+ * Then check for serial IRQ and fall through.
+ */
+ .align 5
+ .set reorder
+ .set noat
+ NESTED(galileo_handle_int, PT_SIZE, sp)
+ SAVE_ALL
+ CLI
+ .set at
+ mfc0 t0,CP0_CAUSE
+ mfc0 t2,CP0_STATUS
+
+ and t0,t2
+
+ andi t1,t0,STATUSF_IP4 /* int2 hardware line (timer) */
+ bnez t1,ll_gt64120_irq
+ andi t1,t0,STATUSF_IP2 /* int0 hardware line */
+ bnez t1,ll_pci_intA
+ andi t1,t0,STATUSF_IP5 /* int3 hardware line */
+ bnez t1,ll_pci_intD
+ andi t1,t0,STATUSF_IP6 /* int4 hardware line */
+ bnez t1,ll_serial_irq
+ andi t1,t0,STATUSF_IP7 /* compare int */
+ bnez t1,ll_compare_irq
+ nop
+
+ /* wrong alarm or masked ... */
+ j spurious_interrupt
+ nop
+ END(galileo_handle_int)
+
+
+ .align 5
+ .set reorder
+ll_gt64120_irq:
+ li a0,4
+ move a1,sp
+ jal do_IRQ
+ nop
+ j ret_from_irq
+ nop
+
+ .align 5
+ .set reorder
+ll_compare_irq:
+ li a0,7
+ move a1,sp
+ jal do_IRQ
+ nop
+ j ret_from_irq
+ nop
+
+ .align 5
+ .set reorder
+ll_pci_intA:
+ move a0,sp
+ jal pci_intA
+ nop
+ j ret_from_irq
+ nop
+
+#if 0
+ .align 5
+ .set reorder
+ll_pci_intB:
+ move a0,sp
+ jal pci_intB
+ nop
+ j ret_from_irq
+ nop
+
+ .align 5
+ .set reorder
+ll_pci_intC:
+ move a0,sp
+ jal pci_intC
+ nop
+ j ret_from_irq
+ nop
+#endif
+
+ .align 5
+ .set reorder
+ll_pci_intD:
+ move a0,sp
+ jal pci_intD
+ nop
+ j ret_from_irq
+ nop
+
+ .align 5
+ .set reorder
+ll_serial_irq:
+ li a0,6
+ move a1,sp
+ jal do_IRQ
+ nop
+ j ret_from_irq
+ nop
diff -puN /dev/null arch/mips/gt64120/ev64120/irq.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/gt64120/ev64120/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,145 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Code to handle irqs on GT64120A boards
+ * Derived from mips/orion and Cort <cort@fsmlabs.com>
+ *
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Author: RidgeRun, Inc.
+ * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/gt64120.h>
+
+asmlinkage inline void pci_intA(struct pt_regs *regs)
+{
+ do_IRQ(GT_INTA, regs);
+}
+
+asmlinkage inline void pci_intD(struct pt_regs *regs)
+{
+ do_IRQ(GT_INTD, regs);
+}
+
+static void disable_ev64120_irq(unsigned int irq_nr)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ if (irq_nr >= 8) { // All PCI interrupts are on line 5 or 2
+ clear_c0_status(9 << 10);
+ } else {
+ clear_c0_status(1 << (irq_nr + 8));
+ }
+ local_irq_restore(flags);
+}
+
+static void enable_ev64120_irq(unsigned int irq_nr)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ if (irq_nr >= 8) // All PCI interrupts are on line 5 or 2
+ set_c0_status(9 << 10);
+ else
+ set_c0_status(1 << (irq_nr + 8));
+ local_irq_restore(flags);
+}
+
+static unsigned int startup_ev64120_irq(unsigned int irq)
+{
+ enable_ev64120_irq(irq);
+ return 0; /* Never anything pending */
+}
+
+#define shutdown_ev64120_irq disable_ev64120_irq
+#define mask_and_ack_ev64120_irq disable_ev64120_irq
+
+static void end_ev64120_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_ev64120_irq(irq);
+}
+
+static struct hw_interrupt_type ev64120_irq_type = {
+ .typename = "EV64120",
+ .startup = startup_ev64120_irq,
+ .shutdown = shutdown_ev64120_irq,
+ .enable = enable_ev64120_irq,
+ .disable = disable_ev64120_irq,
+ .ack = mask_and_ack_ev64120_irq,
+ .end = end_ev64120_irq,
+ .set_affinity = NULL
+};
+
+void gt64120_irq_setup(void)
+{
+ extern asmlinkage void galileo_handle_int(void);
+
+ /*
+ * Clear all of the interrupts while we change the able around a bit.
+ */
+ clear_c0_status(ST0_IM);
+
+ /* Sets the exception_handler array. */
+ set_except_vector(0, galileo_handle_int);
+
+ cli();
+
+ /*
+ * Enable timer. Other interrupts will be enabled as they are
+ * registered.
+ */
+ set_c0_status(IE_IRQ2);
+}
+
+void __init init_IRQ(void)
+{
+ int i;
+
+ /* Let's initialize our IRQ descriptors */
+ for (i = 0; i < NR_IRQS; i++) {
+ irq_desc[i].status = 0;
+ irq_desc[i].handler = &no_irq_type;
+ irq_desc[i].action = NULL;
+ irq_desc[i].depth = 0;
+ irq_desc[i].lock = SPIN_LOCK_UNLOCKED;
+ }
+
+ gt64120_irq_setup();
+}
diff -puN /dev/null arch/mips/gt64120/ev64120/Makefile
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/gt64120/ev64120/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,11 @@
+#
+# Copyright 2000 RidgeRun, Inc.
+# Author: RidgeRun, Inc.
+# glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+#
+# Makefile for the Galileo EV64120 board.
+#
+
+obj-y += int-handler.o irq.o promcon.o reset.o serialGT.o setup.o
+
+EXTRA_AFLAGS := $(CFLAGS)
diff -puN /dev/null arch/mips/gt64120/ev64120/promcon.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/gt64120/ev64120/promcon.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,53 @@
+/*
+ * Wrap-around code for a console using the
+ * SGI PROM io-routines.
+ *
+ * Copyright (c) 1999 Ulf Carlsson
+ *
+ * Derived from DECstation promcon.c
+ * Copyright (c) 1998 Harald Koerfgen
+ */
+#include <linux/tty.h>
+#include <linux/init.h>
+#include <linux/console.h>
+
+static void prom_console_write(struct console *co, const char *s,
+ unsigned count)
+{
+ extern int CONSOLE_CHANNEL; // The default serial port
+ unsigned i;
+
+ for (i = 0; i < count; i++) {
+ if (*s == 10)
+ serial_putc(CONSOLE_CHANNEL, 13);
+ serial_putc(CONSOLE_CHANNEL, *s++);
+ }
+}
+
+int prom_getchar(void)
+{
+ return 0;
+}
+
+static struct console sercons = {
+ .name = "ttyS",
+ .write = prom_console_write,
+ .flags = CON_PRINTBUFFER,
+ .index = -1,
+};
+
+/*
+ * Register console.
+ */
+
+static int gal_serial_console_init(void)
+{
+ // serial_init();
+ //serial_set(115200);
+
+ register_console(&sercons);
+
+ return 0;
+}
+
+console_initcall(gal_serial_console_init);
diff -puN /dev/null arch/mips/gt64120/ev64120/reset.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/gt64120/ev64120/reset.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,45 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1997 Ralf Baechle
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+
+void galileo_machine_restart(char *command)
+{
+ *(volatile char *) 0xbc000000 = 0x0f;
+ /*
+ * Ouch, we're still alive ... This time we take the silver bullet ...
+ * ... and find that we leave the hardware in a state in which the
+ * kernel in the flush locks up somewhen during of after the PCI
+ * detection stuff.
+ */
+ set_c0_status(ST0_BEV | ST0_ERL);
+ change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
+ flush_cache_all();
+ write_c0_wired(0);
+ __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
+}
+
+void galileo_machine_halt(void)
+{
+ printk(KERN_NOTICE "You can safely turn off the power\n");
+ while (1)
+ __asm__(".set\tmips3\n\t"
+ "wait\n\t"
+ ".set\tmips0");
+
+}
+
+void galileo_machine_power_off(void)
+{
+ galileo_machine_halt();
+}
diff -puN /dev/null arch/mips/gt64120/ev64120/serialGT.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/gt64120/ev64120/serialGT.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,212 @@
+/*
+ * serialGT.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Low Level Serial Port control for use
+ * with the Galileo EVB64120A MIPS eval board and
+ * its on board two channel 16552 Uart.
+ *
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Author: RidgeRun, Inc.
+ * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+// Note:
+// Serial CHANNELS - 0 is the bottom connector of evb64120A.
+// (The one that maps to the "B" channel of the
+// board's uart)
+// 1 is the top connector of evb64120A.
+// (The one that maps to the "A" channel of the
+// board's uart)
+int DEBUG_CHANNEL = 0; // See Note Above
+int CONSOLE_CHANNEL = 1; // See Note Above
+
+#define DUART 0xBD000000 /* Base address of Uart. */
+#define CHANNELOFFSET 0x20 /* DUART+CHANNELOFFSET gets you to the ChanA
+ register set of the 16552 Uart device.
+ DUART+0 gets you to the ChanB register set.
+ */
+#define DUART_DELTA 0x4
+#define FIFO_ENABLE 0x07
+#define INT_ENABLE 0x04 /* default interrupt mask */
+
+#define RBR 0x00
+#define THR 0x00
+#define DLL 0x00
+#define IER 0x01
+#define DLM 0x01
+#define IIR 0x02
+#define FCR 0x02
+#define LCR 0x03
+#define MCR 0x04
+#define LSR 0x05
+#define MSR 0x06
+#define SCR 0x07
+
+#define LCR_DLAB 0x80
+#define XTAL 1843200
+#define LSR_THRE 0x20
+#define LSR_BI 0x10
+#define LSR_DR 0x01
+#define MCR_LOOP 0x10
+#define ACCESS_DELAY 0x10000
+
+/******************************
+ Routine:
+ Description:
+ ******************************/
+int inreg(int channel, int reg)
+{
+ int val;
+ val =
+ *((volatile unsigned char *) DUART +
+ (channel * CHANNELOFFSET) + (reg * DUART_DELTA));
+ return val;
+}
+
+/******************************
+ Routine:
+ Description:
+ ******************************/
+void outreg(int channel, int reg, unsigned char val)
+{
+ *((volatile unsigned char *) DUART + (channel * CHANNELOFFSET)
+ + (reg * DUART_DELTA)) = val;
+}
+
+/******************************
+ Routine:
+ Description:
+ Initialize the device driver.
+ ******************************/
+void serial_init(int channel)
+{
+ /*
+ * Configure active port, (CHANNELOFFSET already set.)
+ *
+ * Set 8 bits, 1 stop bit, no parity.
+ *
+ * LCR<7> 0 divisor latch access bit
+ * LCR<6> 0 break control (1=send break)
+ * LCR<5> 0 stick parity (0=space, 1=mark)
+ * LCR<4> 0 parity even (0=odd, 1=even)
+ * LCR<3> 0 parity enable (1=enabled)
+ * LCR<2> 0 # stop bits (0=1, 1=1.5)
+ * LCR<1:0> 11 bits per character(00=5, 01=6, 10=7, 11=8)
+ */
+ outreg(channel, LCR, 0x3);
+
+ outreg(channel, FCR, FIFO_ENABLE); /* Enable the FIFO */
+
+ outreg(channel, IER, INT_ENABLE); /* Enable appropriate interrupts */
+}
+
+/******************************
+ Routine:
+ Description:
+ Set the baud rate.
+ ******************************/
+void serial_set(int channel, unsigned long baud)
+{
+ unsigned char sav_lcr;
+
+ /*
+ * Enable access to the divisor latches by setting DLAB in LCR.
+ *
+ */
+ sav_lcr = inreg(channel, LCR);
+
+#if 0
+ /*
+ * Set baud rate
+ */
+ outreg(channel, LCR, LCR_DLAB | sav_lcr);
+ // outreg(DLL,(XTAL/(16*2*(baud))-2));
+ outreg(channel, DLL, XTAL / (16 * baud));
+ // outreg(DLM,(XTAL/(16*2*(baud))-2)>>8);
+ outreg(channel, DLM, (XTAL / (16 * baud)) >> 8);
+#else
+ /*
+ * Note: Set baud rate, hardcoded here for rate of 115200
+ * since became unsure of above "buad rate" algorithm (??).
+ */
+ outreg(channel, LCR, 0x83);
+ outreg(channel, DLM, 0x00); // See note above
+ outreg(channel, DLL, 0x02); // See note above.
+ outreg(channel, LCR, 0x03);
+#endif
+
+ /*
+ * Restore line control register
+ */
+ outreg(channel, LCR, sav_lcr);
+}
+
+
+/******************************
+ Routine:
+ Description:
+ Transmit a character.
+ ******************************/
+void serial_putc(int channel, int c)
+{
+ while ((inreg(channel, LSR) & LSR_THRE) == 0);
+ outreg(channel, THR, c);
+}
+
+/******************************
+ Routine:
+ Description:
+ Read a received character if one is
+ available. Return -1 otherwise.
+ ******************************/
+int serial_getc(int channel)
+{
+ if (inreg(channel, LSR) & LSR_DR) {
+ return inreg(channel, RBR);
+ }
+ return -1;
+}
+
+/******************************
+ Routine:
+ Description:
+ Used by embedded gdb client. (example; gdb-stub.c)
+ ******************************/
+char getDebugChar()
+{
+ int val;
+ while ((val = serial_getc(DEBUG_CHANNEL)) == -1); // loop until we get a character in.
+ return (char) val;
+}
+
+/******************************
+ Routine:
+ Description:
+ Used by embedded gdb target. (example; gdb-stub.c)
+ ******************************/
+void putDebugChar(char c)
+{
+ serial_putc(DEBUG_CHANNEL, (int) c);
+}
diff -puN /dev/null arch/mips/gt64120/ev64120/setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/gt64120/ev64120/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Author: RidgeRun, Inc.
+ * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/ioport.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/timex.h>
+#include <asm/bootinfo.h>
+#include <asm/page.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/pci.h>
+#include <asm/processor.h>
+#include <asm/ptrace.h>
+#include <asm/time.h>
+#include <asm/reboot.h>
+#include <asm/traps.h>
+#include <linux/bootmem.h>
+
+unsigned long gt64120_base = KSEG1ADDR(0x14000000);
+
+/* These functions are used for rebooting or halting the machine*/
+extern void galileo_machine_restart(char *command);
+extern void galileo_machine_halt(void);
+extern void galileo_machine_power_off(void);
+/*
+ *This structure holds pointers to the pci configuration space accesses
+ *and interrupts allocating routine for device over the PCI
+ */
+extern struct pci_ops galileo_pci_ops;
+
+unsigned long __init prom_free_prom_memory(void)
+{
+ return 0;
+}
+
+/*
+ * Initializes basic routines and structures pointers, memory size (as
+ * given by the bios and saves the command line.
+ */
+extern void gt64120_time_init(void);
+
+static void __init ev64120_setup(void)
+{
+ _machine_restart = galileo_machine_restart;
+ _machine_halt = galileo_machine_halt;
+ _machine_power_off = galileo_machine_power_off;
+
+ board_time_init = gt64120_time_init;
+ set_io_port_base(KSEG1);
+}
+
+early_initcall(ev64120_setup);
+
+const char *get_system_type(void)
+{
+ return "Galileo EV64120A";
+}
+
+/*
+ * Kernel arguments passed by the firmware
+ *
+ * $a0 - nothing
+ * $a1 - holds a pointer to the eprom parameters
+ * $a2 - nothing
+ */
+
+void __init prom_init(void)
+{
+ mips_machgroup = MACH_GROUP_GALILEO;
+ mips_machtype = MACH_EV64120A;
+
+ add_memory_region(0, 32 << 20, BOOT_MEM_RAM);
+}
diff -puN arch/mips/gt64120/momenco_ocelot/irq.c~mips-megapatch arch/mips/gt64120/momenco_ocelot/irq.c
--- 25/arch/mips/gt64120/momenco_ocelot/irq.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/gt64120/momenco_ocelot/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -5,7 +5,7 @@
*
* Copyright 2001 MontaVista Software Inc.
* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
+ * Copyright (C) 2000, 2001, 2003 Ralf Baechle (ralf@gnu.org)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -45,103 +45,14 @@
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
+#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
-
-static spinlock_t rm7000_irq_lock = SPIN_LOCK_UNLOCKED;
-
-/* Function for careful CP0 interrupt mask access */
-static inline void modify_cp0_intmask(unsigned clr_mask_in, unsigned set_mask_in)
-{
- unsigned long status;
- unsigned clr_mask;
- unsigned set_mask;
-
- /* do the low 8 bits first */
- clr_mask = 0xff & clr_mask_in;
- set_mask = 0xff & set_mask_in;
- status = read_c0_status();
- status &= ~((clr_mask & 0xFF) << 8);
- status |= (set_mask & 0xFF) << 8;
- write_c0_status(status);
-
- /* do the high 8 bits */
- clr_mask = 0xff & (clr_mask_in >> 8);
- set_mask = 0xff & (set_mask_in >> 8);
- status = read_c0_intcontrol();
- status &= ~((clr_mask & 0xFF) << 8);
- status |= (set_mask & 0xFF) << 8;
- write_c0_intcontrol(status);
-}
-
-static inline void mask_irq(unsigned int irq)
-{
- modify_cp0_intmask(irq, 0);
-}
-
-static inline void unmask_irq(unsigned int irq)
-{
- modify_cp0_intmask(0, irq);
-}
-
-static void enable_cp7000_irq(unsigned int irq)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&rm7000_irq_lock, flags);
- unmask_irq(1 << irq);
- spin_unlock_irqrestore(&rm7000_irq_lock, flags);
-}
-
-static unsigned int startup_cp7000_irq(unsigned int irq)
-{
- enable_cp7000_irq(irq);
-
- return 0; /* never anything pending */
-}
-
-static void disable_cp7000_irq(unsigned int irq)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&rm7000_irq_lock, flags);
- mask_irq(1 << irq);
- spin_unlock_irqrestore(&rm7000_irq_lock, flags);
-}
-
-#define shutdown_cp7000_irq disable_cp7000_irq
-
-static void mask_and_ack_cp7000_irq(unsigned int irq)
-{
- mask_irq(1 << irq);
-}
-
-static void end_cp7000_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- unmask_irq(1 << irq);
-}
-
-static struct hw_interrupt_type cp7000_hpcdma_irq_type = {
- "CP7000",
- startup_cp7000_irq,
- shutdown_cp7000_irq,
- enable_cp7000_irq,
- disable_cp7000_irq,
- mask_and_ack_cp7000_irq,
- end_cp7000_irq,
- NULL
-};
-
-
extern asmlinkage void ocelot_handle_int(void);
-extern void gt64120_irq_init(void);
void __init init_IRQ(void)
{
- int i;
-
/*
* Clear all of the interrupts while we change the able around a bit.
* int-handler is not on bootstrap
@@ -151,23 +62,14 @@ void __init init_IRQ(void)
/* Sets the first-level interrupt dispatcher. */
set_except_vector(0, ocelot_handle_int);
- init_generic_irq();
-
- for (i = 0; i <= 15; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &cp7000_hpcdma_irq_type;
- }
- gt64120_irq_init();
+ init_generic_irq();
+ mips_cpu_irq_init(0);
+ rm7k_cpu_irq_init(8);
#ifdef CONFIG_KGDB
printk("start kgdb ...\n");
set_debug_traps();
breakpoint(); /* you may move this line to whereever you want :-) */
#endif
-#ifdef CONFIG_GDB_CONSOLE
- register_gdb_console();
-#endif
}
diff -puN arch/mips/gt64120/momenco_ocelot/prom.c~mips-megapatch arch/mips/gt64120/momenco_ocelot/prom.c
--- 25/arch/mips/gt64120/momenco_ocelot/prom.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/gt64120/momenco_ocelot/prom.c 2004-02-19 12:53:00.000000000 -0800
@@ -27,7 +27,6 @@ struct callvectors {
};
struct callvectors* debug_vectors;
-char arcs_cmdline[CL_SIZE];
extern unsigned long gt64120_base;
@@ -37,10 +36,14 @@ const char *get_system_type(void)
}
/* [jsun@junsun.net] PMON passes arguments in C main() style */
-void __init prom_init(int argc, char **arg, char** env, struct callvectors *cv)
+void __init prom_init(void)
{
- int i;
+ int argc = fw_arg0;
+ char **arg = (char **) fw_arg1;
+ char **env = (char **) fw_arg2;
+ struct callvectors *cv = (struct callvectors *) fw_arg3;
uint32_t tmp;
+ int i;
/* save the PROM vectors for debugging use */
debug_vectors = cv;
@@ -74,10 +77,7 @@ void __init prom_init(int argc, char **a
add_memory_region(0, 64 << 20, BOOT_MEM_RAM);
}
-void __init prom_free_prom_memory(void)
-{
-}
-
-void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/gt64120/momenco_ocelot/setup.c~mips-megapatch arch/mips/gt64120/momenco_ocelot/setup.c
--- 25/arch/mips/gt64120/momenco_ocelot/setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/gt64120/momenco_ocelot/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -39,7 +39,6 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
-#include <linux/mc146818rtc.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/ioport.h>
@@ -51,23 +50,18 @@
#include <asm/time.h>
#include <asm/bootinfo.h>
#include <asm/page.h>
-#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/reboot.h>
-#include <asm/mc146818rtc.h>
#include <asm/traps.h>
-#include <linux/version.h>
#include <linux/bootmem.h>
#include <linux/initrd.h>
-#include <asm/gt64120/gt64120.h>
+#include <asm/gt64120.h>
#include "ocelot_pld.h"
-extern struct rtc_ops no_rtc_ops;
-
unsigned long gt64120_base = KSEG1ADDR(GT_DEF_BASE);
/* These functions are used for rebooting or halting the machine*/
@@ -156,7 +150,7 @@ void PMON_v2_setup()
gt64120_base = 0xe0000000;
}
-void __init momenco_ocelot_setup(void)
+static void __init momenco_ocelot_setup(void)
{
void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache);
unsigned int tmpword;
@@ -172,7 +166,6 @@ void __init momenco_ocelot_setup(void)
* initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size;
* initrd_below_start_ok = 1;
*/
- rtc_ops = &no_rtc_ops;
/* do handoff reconfiguration */
if (gt64120_base == KSEG1ADDR(GT_DEF_BASE))
@@ -314,6 +307,8 @@ void __init momenco_ocelot_setup(void)
GT_WRITE(0x468, 0xfef73);
}
+early_initcall(momenco_ocelot_setup);
+
extern int rm7k_tcache_enabled;
/*
* This runs in KSEG1. See the verbiage in rm7k.c::probe_scache()
@@ -327,7 +322,7 @@ static void __init setup_l3cache(unsigne
printk("Enabling L3 cache...");
/* Enable the L3 cache in the GT64120A's CPU Configuration register */
- GT_READ(0, &tmp);
+ tmp = GT_READ(0);
GT_WRITE(0, tmp | (1<<14));
/* Enable the L3 cache in the CPU */
diff -puN arch/mips/hp-lj/init.c~mips-megapatch arch/mips/hp-lj/init.c
--- 25/arch/mips/hp-lj/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/hp-lj/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -17,9 +17,7 @@
const char CommandLine[] = Delimiter
"root=/dev/hda3 ";
-char arcs_cmdline[CL_SIZE];
-
-int __init prom_init(int argc, char ** argv, char **envp)
+void __init prom_init(void)
{
ulong mem_size = get_mem_avail();
int reserve_size = 0;
@@ -43,11 +41,10 @@ int __init prom_init(int argc, char ** a
mips_machtype = MACH_UNKNOWN;
strcpy(arcs_cmdline, CommandLine+strlen(Delimiter));
-
- return 0;
}
-void prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/hp-lj/setup.c~mips-megapatch arch/mips/hp-lj/setup.c
--- 25/arch/mips/hp-lj/setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/hp-lj/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -14,52 +14,57 @@
#include <linux/interrupt.h>
#include <linux/ide.h>
#include <linux/bootmem.h>
-#include <asm/mc146818rtc.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/hp-lj/asic.h>
#include "utils.h"
+extern char CommandLine[];
+extern void pci_setup(void);
+
#ifdef CONFIG_KGDB
int remote_debug = 0;
#endif
const char *get_system_type(void)
{
- return "HP LaserJet"; /* But which exactly? */
+ return "HP LaserJet"; /* But which exactly? */
}
-static void (*timer_interrupt_service)(int irq, void *dev_id, struct pt_regs * regs) = NULL;
+static void (*timer_interrupt_service) (int irq, void *dev_id,
+ struct pt_regs * regs) = NULL;
-static void andros_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+static void andros_timer_interrupt(int irq, void *dev_id,
+ struct pt_regs *regs)
{
- if (!(*((volatile unsigned int*)0xbfea0010) & 0x20)) // mask = pend & en
- return;
+ if (!(*((volatile unsigned int *) 0xbfea0010) & 0x20)) // mask = pend & en
+ return;
- /* clear timer interrupt */
- {
- unsigned int tmr = *((volatile unsigned int*)0xbfe90040); // ctl bits
- *((volatile unsigned int*)0xbfe90040) = tmr; // write to ack
- *((volatile unsigned int*)0xbfea000c) = 0x20; // sys int ack
- }
+ /* clear timer interrupt */
+ {
+ unsigned int tmr = *((volatile unsigned int *) 0xbfe90040); // ctl bits
+ *((volatile unsigned int *) 0xbfe90040) = tmr; // write to ack
+ *((volatile unsigned int *) 0xbfea000c) = 0x20; // sys int ack
+ }
- /* service interrupt */
- timer_interrupt_service(irq, dev_id, regs);
+ /* service interrupt */
+ timer_interrupt_service(irq, dev_id, regs);
}
-static void harmony_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+static void harmony_timer_interrupt(int irq, void *dev_id,
+ struct pt_regs *regs)
{
- if (!(*((volatile unsigned int*)0xbff63000) & 0x01))
- return; // big sys int reg, 01-timer did it
- if (!(*((volatile unsigned int*)0xbff610a4) & 0x01))
- return; // local small int reg, 01-timer0 did it
+ if (!(*((volatile unsigned int *) 0xbff63000) & 0x01))
+ return; // big sys int reg, 01-timer did it
+ if (!(*((volatile unsigned int *) 0xbff610a4) & 0x01))
+ return; // local small int reg, 01-timer0 did it
- *((volatile unsigned int*)0xbff610a4) = 1; // ack local timer0 bit
- *((volatile unsigned int*)0xbff63000) = 1; // ack global timer bit
+ *((volatile unsigned int *) 0xbff610a4) = 1; // ack local timer0 bit
+ *((volatile unsigned int *) 0xbff63000) = 1; // ack global timer bit
- /* service interrupt */
- timer_interrupt_service(irq, dev_id, regs);
+ /* service interrupt */
+ timer_interrupt_service(irq, dev_id, regs);
}
@@ -68,87 +73,78 @@ static void harmony_timer_interrupt(int
static void __init hp_time_init(struct irqaction *irq)
{
- timer_interrupt_service = irq->handler;
+ timer_interrupt_service = irq->handler;
- if (GetAsicId() == AndrosAsic) {
- //*((volatile unsigned int*)0xbfe90000) = 0x2f; // set by bootloader to 0x20 // prescaler
- *((volatile unsigned int*)0xbfe90040) = 0x21; // 20-res of 1kHz,1-int ack // control
- *((volatile unsigned int*)0xbfe90048) = 0x09; // 09-reload val // reload
- *((volatile unsigned int*)0xbfe90044) = 0x09; // 09-count val // count
- *((volatile unsigned int*)0xbfe90040) = 0x2f; // 8-int enable,4-reload en,2-count down en,1-int-ack
-
- irq->handler = andros_timer_interrupt;
- irq->flags |= SA_INTERRUPT | SA_SHIRQ;
- printk("setting up timer in hp_time_init\n");
- setup_irq(ASIC_IRQ_NUMBER, irq);
-
- // enable timer interrupt
- *((volatile unsigned int*)0xbfea0000) = 0x20;
-
- } else if (GetAsicId() == HarmonyAsic) {
-
- *((volatile unsigned int*)0xbff61000) = 99; // prescaler, 100Mz sys clk
- *((volatile unsigned int*)0xbff61028) = 0x09; // reload reg
- *((volatile unsigned int*)0xbff61024) = 0x09; // count reg
- *((volatile unsigned int*)0xbff61020) = 0x0b; // 80-1khz res on timer, 2 reload en, 1 - count down en
-
- irq->handler = harmony_timer_interrupt;
- irq->flags |= SA_INTERRUPT | SA_SHIRQ;
- setup_irq(ASIC_IRQ_NUMBER, irq);
-
- *((volatile unsigned int*)0xbff610a0) |= 1; // turn on timer0
-
- } else if (GetAsicId() == UnknownAsic)
- printk("Unknown asic in hp_time_init()\n");
- else
- printk("Unsupported asic in hp_time_init()\n");
+ if (GetAsicId() == AndrosAsic) {
+ //*((volatile unsigned int*)0xbfe90000) = 0x2f; // set by bootloader to 0x20 // prescaler
+ *((volatile unsigned int *) 0xbfe90040) = 0x21; // 20-res of 1kHz,1-int ack // control
+ *((volatile unsigned int *) 0xbfe90048) = 0x09; // 09-reload val // reload
+ *((volatile unsigned int *) 0xbfe90044) = 0x09; // 09-count val // count
+ *((volatile unsigned int *) 0xbfe90040) = 0x2f; // 8-int enable,4-reload en,2-count down en,1-int-ack
+
+ irq->handler = andros_timer_interrupt;
+ irq->flags |= SA_INTERRUPT | SA_SHIRQ;
+ printk("setting up timer in hp_time_init\n");
+ setup_irq(ASIC_IRQ_NUMBER, irq);
+
+ // enable timer interrupt
+ *((volatile unsigned int *) 0xbfea0000) = 0x20;
+
+ } else if (GetAsicId() == HarmonyAsic) {
+
+ *((volatile unsigned int *) 0xbff61000) = 99; // prescaler, 100Mz sys clk
+ *((volatile unsigned int *) 0xbff61028) = 0x09; // reload reg
+ *((volatile unsigned int *) 0xbff61024) = 0x09; // count reg
+ *((volatile unsigned int *) 0xbff61020) = 0x0b; // 80-1khz res on timer, 2 reload en, 1 - count down en
+
+ irq->handler = harmony_timer_interrupt;
+ irq->flags |= SA_INTERRUPT | SA_SHIRQ;
+ setup_irq(ASIC_IRQ_NUMBER, irq);
+
+ *((volatile unsigned int *) 0xbff610a0) |= 1; // turn on timer0
+
+ } else if (GetAsicId() == UnknownAsic)
+ printk("Unknown asic in hp_time_init()\n");
+ else
+ printk("Unsupported asic in hp_time_init()\n");
}
static void hplj_restart(void)
{
- if (GetAsicId() == AndrosAsic)
- *((volatile unsigned int *) 0xbfe900c0) = 0;
+ if (GetAsicId() == AndrosAsic)
+ *((volatile unsigned int *) 0xbfe900c0) = 0;
- if (GetAsicId() == HarmonyAsic)
- *((volatile unsigned int *) 0xbff62030) = 0;
+ if (GetAsicId() == HarmonyAsic)
+ *((volatile unsigned int *) 0xbff62030) = 0;
- printk("Restart Failed ... halting instead\n");
- while(1);
+ printk("Restart Failed ... halting instead\n");
+ while (1);
}
static void hplj_halt(void)
{
- while(1);
+ while (1);
}
-void __init hp_setup(void)
+static void __init hp_setup(void)
{
#ifdef CONFIG_PCI
- extern void pci_setup(void);
- pci_setup();
-#endif
-
-#ifdef CONFIG_IDE
- {
- extern struct ide_ops std_ide_ops;
- ide_ops = &std_ide_ops;
- }
+ pci_setup();
#endif
- _machine_restart =(void (*)(char *)) hplj_restart;
- _machine_halt = hplj_halt;
- _machine_power_off = hplj_halt;
+ _machine_restart = (void (*)(char *)) hplj_restart;
+ _machine_halt = hplj_halt;
+ _machine_power_off = hplj_halt;
- board_timer_setup = hp_time_init;
+ board_timer_setup = hp_time_init;
#ifdef CONFIG_KGDB
- {
- extern char CommandLine[];
- remote_debug = (strstr(CommandLine, "kgdb") != NULL);
- }
+ remote_debug = (strstr(CommandLine, "kgdb") != NULL);
#endif
- printk("HP SETUP\n");
+ printk("HP SETUP\n");
}
+
+early_initcall(hp_setup);
diff -puN arch/mips/ite-boards/generic/irq.c~mips-megapatch arch/mips/ite-boards/generic/irq.c
--- 25/arch/mips/ite-boards/generic/irq.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ite-boards/generic/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -75,8 +75,6 @@ extern void breakpoint(void);
#define ALLINTS_NOTIMER (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4)
-unsigned int local_bh_count[NR_CPUS];
-unsigned int local_irq_count[NR_CPUS];
void disable_it8172_irq(unsigned int irq_nr);
void enable_it8172_irq(unsigned int irq_nr);
@@ -84,8 +82,8 @@ extern void set_debug_traps(void);
extern void mips_timer_interrupt(int irq, struct pt_regs *regs);
extern asmlinkage void it8172_IRQ(void);
-struct it8172_intc_regs volatile *it8172_hw0_icregs
- = (struct it8172_intc_regs volatile *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_INTC_BASE));
+struct it8172_intc_regs volatile *it8172_hw0_icregs =
+ (struct it8172_intc_regs volatile *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_INTC_BASE));
/* Function for careful CP0 interrupt mask access */
static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
@@ -244,7 +242,6 @@ static struct hw_interrupt_type cp0_irq_
end_none
};
-
void enable_cpu_timer(void)
{
unsigned long flags;
@@ -254,7 +251,6 @@ void enable_cpu_timer(void)
local_irq_restore(flags);
}
-
void __init init_IRQ(void)
{
int i;
@@ -334,8 +330,7 @@ void it8172_hw0_irqdispatch(struct pt_re
intstatus = it8172_hw0_icregs->intstatus;
if (intstatus & 0x8) {
panic("Got NMI interrupt");
- }
- else if (intstatus & 0x4) {
+ } else if (intstatus & 0x4) {
/* PCI interrupt */
irq = 0;
status |= it8172_hw0_icregs->pci_req;
@@ -372,10 +367,9 @@ void it8172_hw0_irqdispatch(struct pt_re
}
irq += IT8172_LPC_IRQ_BASE;
//printk("LPC int %d\n", irq);
- }
- else {
+ } else
return;
- }
+
do_IRQ(irq, regs);
}
diff -puN arch/mips/ite-boards/generic/it8172_setup.c~mips-megapatch arch/mips/ite-boards/generic/it8172_setup.c
--- 25/arch/mips/ite-boards/generic/it8172_setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ite-boards/generic/it8172_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -30,7 +30,6 @@
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
-#include <linux/console.h>
#include <linux/serial_reg.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
@@ -47,17 +46,8 @@
#include <asm/it8172/it8172.h>
#include <asm/it8712.h>
-#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
-extern void console_setup(char *, int *);
-char serial_console[20];
-#endif
-
extern struct resource ioport_resource;
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops std_ide_ops;
-extern struct ide_ops *ide_ops;
-#endif
-#ifdef CONFIG_PC_KEYB
+#ifdef CONFIG_SERIO_I8042
int init_8712_keyboard(void);
#endif
@@ -115,7 +105,7 @@ void __init it8172_init_ram_resource(uns
it8172_resources.ram.end = memsize;
}
-void __init it8172_setup(void)
+static void __init it8172_setup(void)
{
unsigned short dsr;
char *argptr;
@@ -138,10 +128,10 @@ void __init it8172_setup(void)
_machine_power_off = it8172_power_off;
/*
- * IO/MEM resources.
- *
- * revisit this area.
- */
+ * IO/MEM resources.
+ *
+ * revisit this area.
+ */
set_io_port_base(KSEG1);
ioport_resource.start = it8172_resources.pci_io.start;
ioport_resource.end = it8172_resources.pci_io.end;
@@ -161,6 +151,10 @@ void __init it8172_setup(void)
* Pull enabled devices out of standby
*/
IT_IO_READ16(IT_PM_DSR, dsr);
+
+ /*
+ * Fixme: This breaks when these drivers are modules!!!
+ */
#ifdef CONFIG_SOUND_IT8172
dsr &= ~IT_PM_DSR_ACSB;
#else
@@ -168,30 +162,24 @@ void __init it8172_setup(void)
#endif
#ifdef CONFIG_BLK_DEV_IT8172
dsr &= ~IT_PM_DSR_IDESB;
- ide_ops = &std_ide_ops;
#else
dsr |= IT_PM_DSR_IDESB;
#endif
IT_IO_WRITE16(IT_PM_DSR, dsr);
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
InitLPCInterface();
#ifdef CONFIG_MIPS_ITE8172
if (SearchIT8712()) {
printk("Found IT8712 Super IO\n");
- // enable IT8712 serial port
+ /* enable IT8712 serial port */
LPCSetConfig(LDN_SERIAL1, 0x30, 0x01); /* enable */
LPCSetConfig(LDN_SERIAL1, 0x23, 0x01); /* clock selection */
-#ifdef CONFIG_PC_KEYB
+#ifdef CONFIG_SERIO_I8042
if (init_8712_keyboard()) {
printk("Unable to initialize keyboard\n");
LPCSetConfig(LDN_KEYBOARD, 0x30, 0x0); /* disable keyboard */
- }
- else {
+ } else {
LPCSetConfig(LDN_KEYBOARD, 0x30, 0x1); /* enable keyboard */
LPCSetConfig(LDN_KEYBOARD, 0xf0, 0x2);
LPCSetConfig(LDN_KEYBOARD, 0x71, 0x3);
@@ -205,7 +193,6 @@ void __init it8172_setup(void)
(LPCGetConfig(LDN_MOUSE, 0x30) == 0))
printk("Error: keyboard or mouse not enabled\n");
- kbd_ops = &std_kbd_ops;
}
#endif
}
@@ -264,16 +251,20 @@ void __init it8172_setup(void)
#endif /* CONFIG_IT8172_SCR1 */
}
+early_initcall(it8172_setup);
-#ifdef CONFIG_PC_KEYB
+#ifdef CONFIG_SERIO_I8042
/*
* According to the ITE Special BIOS Note for waking up the
* keyboard controller...
*/
-int init_8712_keyboard()
+static int init_8712_keyboard(void)
{
unsigned int cmd_port = 0x14000064;
unsigned int data_port = 0x14000060;
+ ^^^^^^^^^^^
+ Somebody here doesn't grok the concept of io ports.
+
unsigned char data;
int i;
diff -puN arch/mips/ite-boards/generic/pmon_prom.c~mips-megapatch arch/mips/ite-boards/generic/pmon_prom.c
--- 25/arch/mips/ite-boards/generic/pmon_prom.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ite-boards/generic/pmon_prom.c 2004-02-19 12:53:00.000000000 -0800
@@ -42,9 +42,6 @@
#include <asm/bootinfo.h>
-/* #define DEBUG_CMDLINE */
-
-char arcs_cmdline[CL_SIZE];
extern int prom_argc;
extern char **prom_argv, **prom_envp;
@@ -111,8 +108,9 @@ static inline unsigned char str2hexnum(u
return 0; /* foo */
}
-void prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
unsigned long __init prom_get_memsize(void)
diff -puN arch/mips/ite-boards/generic/time.c~mips-megapatch arch/mips/ite-boards/generic/time.c
--- 25/arch/mips/ite-boards/generic/time.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ite-boards/generic/time.c 2004-02-19 12:53:00.000000000 -0800
@@ -29,7 +29,6 @@
#include <linux/sched.h>
#include <linux/time.h>
#include <linux/spinlock.h>
-#include <linux/mc146818rtc.h>
#include <asm/time.h>
#include <asm/mipsregs.h>
@@ -114,7 +113,7 @@ hour_hw_to_bin(unsigned char c)
static unsigned long r4k_offset; /* Amount to increment compare reg each time */
static unsigned long r4k_cur; /* What counter should be at next timer irq */
-extern unsigned int mips_counter_frequency;
+extern unsigned int mips_hpt_frequency;
/*
* Figure out the r4k offset, the amount to increment the compare
@@ -138,12 +137,12 @@ static unsigned long __init cal_r4koff(v
while (CMOS_READ(RTC_REG_A) & RTC_UIP);
while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
- mips_counter_frequency = read_c0_count();
+ mips_hpt_frequency = read_c0_count();
/* restore interrupts */
local_irq_restore(flags);
- return (mips_counter_frequency / HZ);
+ return (mips_hpt_frequency / HZ);
}
static unsigned long
diff -puN arch/mips/ite-boards/ivr/init.c~mips-megapatch arch/mips/ite-boards/ivr/init.c
--- 25/arch/mips/ite-boards/ivr/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ite-boards/ivr/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,5 +1,4 @@
/*
- *
* BRIEF MODULE DESCRIPTION
* IVR board setup.
*
@@ -35,7 +34,6 @@
#include <asm/bootinfo.h>
#include <linux/string.h>
#include <linux/kernel.h>
-#include <linux/sched.h>
#include <asm/it8172/it8172.h>
#include <asm/it8172/it8172_dbg.h>
@@ -55,16 +53,14 @@ const char *get_system_type(void)
return "Globespan IVR";
}
-int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+void __init prom_init(void)
{
unsigned long mem_size;
unsigned long pcicr;
- prom_argc = argc;
- prom_argv = argv;
- prom_envp = envp;
-
- puts("IVR board running...");
+ prom_argc = fw_arg0;
+ prom_argv = (char **) fw_arg1;
+ prom_envp = (int *) fw_arg3;
mips_machgroup = MACH_GROUP_GLOBESPAN;
mips_machtype = MACH_IVR; /* Globespan's iTVC15 reference board */
@@ -85,5 +81,4 @@ int __init prom_init(int argc, char **ar
it8172_init_ram_resource(mem_size);
add_memory_region(0, mem_size, BOOT_MEM_RAM);
- return 0;
}
diff -puN arch/mips/ite-boards/qed-4n-s01b/init.c~mips-megapatch arch/mips/ite-boards/qed-4n-s01b/init.c
--- 25/arch/mips/ite-boards/qed-4n-s01b/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ite-boards/qed-4n-s01b/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -34,7 +34,6 @@
#include <asm/bootinfo.h>
#include <linux/string.h>
#include <linux/kernel.h>
-#include <linux/sched.h>
#include <asm/it8172/it8172.h>
#include <asm/it8172/it8172_dbg.h>
@@ -54,16 +53,14 @@ const char *get_system_type(void)
return "ITE QED-4N-S01B";
}
-int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+void __init prom_init(void)
{
unsigned long mem_size;
unsigned long pcicr;
- prom_argc = argc;
- prom_argv = argv;
- prom_envp = envp;
-
- puts("ITE board running...");
+ prom_argc = fw_arg0;
+ prom_argv = (char **) fw_arg1;
+ prom_envp = (int *) fw_arg3;
mips_machgroup = MACH_GROUP_ITE;
mips_machtype = MACH_QED_4N_S01B; /* ITE board name/number */
@@ -85,6 +82,4 @@ int __init prom_init(int argc, char **ar
it8172_init_ram_resource(mem_size);
add_memory_region(0, mem_size, BOOT_MEM_RAM);
-
- return 0;
}
diff -puN arch/mips/ite-boards/qed-4n-s01b/Makefile~mips-megapatch arch/mips/ite-boards/qed-4n-s01b/Makefile
--- 25/arch/mips/ite-boards/qed-4n-s01b/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/ite-boards/qed-4n-s01b/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -8,5 +8,3 @@
#
obj-y := init.o
-
-obj-$(CONFIG_PCI) += pci_fixup.o
diff -puN /dev/null arch/mips/jaguar-atx_defconfig
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/jaguar-atx_defconfig 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,537 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_CLEAN_COMPILE=y
+CONFIG_STANDALONE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_HP_LASERJET is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+CONFIG_MOMENCO_JAGUAR_ATX=y
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_IRQ_CPU=y
+CONFIG_IRQ_CPU_RM7K=y
+CONFIG_MIPS_MV64340=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+CONFIG_BOARD_SCACHE=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+CONFIG_CPU_RM9000=y
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+# CONFIG_HOTPLUG is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_BINFMT_IRIX is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_LBD is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK_DEV is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_DGRS is not set
+CONFIG_EEPRO100=y
+# CONFIG_EEPRO100_PIO is not set
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+CONFIG_MV64340_ETH=y
+CONFIG_MV64340_ETH_0=y
+# CONFIG_MV64340_ETH_1 is not set
+# CONFIG_MV64340_ETH_2 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_FDDI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BT is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN_BOOL is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Userland interfaces
+#
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+
+#
+# Input Device Drivers
+#
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_FAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_DEVPTS_FS=y
+# CONFIG_DEVPTS_FS_XATTR is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+# CONFIG_EXPORTFS is not set
+CONFIG_SUNRPC=y
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Security options
+#
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC32 is not set
diff -puN -L arch/mips/jazz/floppy-jazz.c arch/mips/jazz/floppy-jazz.c~mips-megapatch /dev/null
--- 25/arch/mips/jazz/floppy-jazz.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,149 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Low-level floppy stuff for Jazz family machines.
- *
- * Copyright (C) 1998 by Ralf Baechle
- */
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/linkage.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <asm/addrspace.h>
-#include <asm/jazz.h>
-#include <asm/jazzdma.h>
-#include <asm/pgtable.h>
-#include <asm/floppy.h>
-
-static unsigned char jazz_fd_inb(unsigned int port)
-{
- unsigned char c;
-
- c = *(volatile unsigned char *) port;
- udelay(1);
-
- return c;
-}
-
-static void jazz_fd_outb(unsigned char value, unsigned int port)
-{
- *(volatile unsigned char *) port = value;
-}
-
-/*
- * How to access the floppy DMA functions.
- */
-static void jazz_fd_enable_dma(int channel)
-{
- vdma_enable(JAZZ_FLOPPY_DMA);
-}
-
-static void jazz_fd_disable_dma(int channel)
-{
- vdma_disable(JAZZ_FLOPPY_DMA);
-}
-
-static int jazz_fd_request_dma(int channel)
-{
- return 0;
-}
-
-static void jazz_fd_free_dma(int channel)
-{
-}
-
-static void jazz_fd_clear_dma_ff(int channel)
-{
-}
-
-static void jazz_fd_set_dma_mode(int channel, char mode)
-{
- vdma_set_mode(JAZZ_FLOPPY_DMA, mode);
-}
-
-static void jazz_fd_set_dma_addr(int channel, unsigned int a)
-{
- vdma_set_addr(JAZZ_FLOPPY_DMA, vdma_phys2log(PHYSADDR(a)));
-}
-
-static void jazz_fd_set_dma_count(int channel, unsigned int count)
-{
- vdma_set_count(JAZZ_FLOPPY_DMA, count);
-}
-
-static int jazz_fd_get_dma_residue(int channel)
-{
- return vdma_get_residue(JAZZ_FLOPPY_DMA);
-}
-
-static void jazz_fd_enable_irq(int irq)
-{
-}
-
-static void jazz_fd_disable_irq(int irq)
-{
-}
-
-static unsigned long jazz_fd_getfdaddr1(void)
-{
- return JAZZ_FDC_BASE;
-}
-
-static unsigned long jazz_fd_dma_mem_alloc(unsigned long size)
-{
- unsigned long mem;
-
- mem = __get_dma_pages(GFP_KERNEL, get_order(size));
- if(!mem)
- return 0;
- vdma_alloc(PHYSADDR(mem), size); /* XXX error checking */
-
- return mem;
-}
-
-static void jazz_fd_dma_mem_free(unsigned long addr,
- unsigned long size)
-{
- vdma_free(vdma_phys2log(PHYSADDR(addr)));
- free_pages(addr, get_order(size));
-}
-
-static unsigned long jazz_fd_drive_type(unsigned long n)
-{
- /* XXX This is wrong for machines with ED 2.88mb disk drives like the
- Olivetti M700. Anyway, we should suck this from the ARC
- firmware. */
- if (n == 0)
- return 4; /* 3,5", 1.44mb */
-
- return 0;
-}
-
-struct fd_ops jazz_fd_ops = {
- /*
- * How to access the floppy controller's ports
- */
- jazz_fd_inb,
- jazz_fd_outb,
- /*
- * How to access the floppy DMA functions.
- */
- jazz_fd_enable_dma,
- jazz_fd_disable_dma,
- jazz_fd_request_dma,
- jazz_fd_free_dma,
- jazz_fd_clear_dma_ff,
- jazz_fd_set_dma_mode,
- jazz_fd_set_dma_addr,
- jazz_fd_set_dma_count,
- jazz_fd_get_dma_residue,
- jazz_fd_enable_irq,
- jazz_fd_disable_irq,
- jazz_fd_getfdaddr1,
- jazz_fd_dma_mem_alloc,
- jazz_fd_dma_mem_free,
- jazz_fd_drive_type
-};
diff -puN arch/mips/jazz/int-handler.S~mips-megapatch arch/mips/jazz/int-handler.S
--- 25/arch/mips/jazz/int-handler.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/jazz/int-handler.S 2004-02-19 12:53:00.000000000 -0800
@@ -88,9 +88,9 @@ ll_local_dev: lbu t0,JAZZ_IO_IRQ_SOURCE
* cards. Oh well - for all the Jazz boxes slots are more or less just
* whistles and bells and we're aware of the problem.
*/
-ll_isa_irq: lw a0,JAZZ_EISA_IRQ_ACK
+ll_isa_irq: lw a0, JAZZ_EISA_IRQ_ACK
- jal i8259_do_irq
+ jal do_IRQ
move a1,sp
j ret_from_irq
@@ -133,7 +133,7 @@ ll_timer: lw zero,JAZZ_TIMER_REGISTER #
/*
* CPU count/compare IRQ (unused)
*/
-ll_count: j return
+ll_count: j ret_from_irq
mtc0 zero,CP0_COMPARE
#if 0
diff -puN arch/mips/jazz/irq.c~mips-megapatch arch/mips/jazz/irq.c
--- 25/arch/mips/jazz/irq.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/jazz/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -4,9 +4,8 @@
* for more details.
*
* Copyright (C) 1992 Linus Torvalds
- * Copyright (C) 1994 - 2001 Ralf Baechle
+ * Copyright (C) 1994 - 2001, 2003 Ralf Baechle
*/
-#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
@@ -18,6 +17,75 @@
extern asmlinkage void jazz_handle_int(void);
+static spinlock_t r4030_lock = SPIN_LOCK_UNLOCKED;
+
+extern asmlinkage void sni_rm200_pci_handle_int(void);
+
+static void enable_r4030_irq(unsigned int irq)
+{
+ unsigned int mask = 1 << (irq - JAZZ_IE_PARALLEL);
+ unsigned long flags;
+
+ spin_lock_irqsave(&r4030_lock, flags);
+ mask |= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE);
+ r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask);
+ spin_unlock_irqrestore(&r4030_lock, flags);
+}
+
+static unsigned int startup_r4030_irq(unsigned int irq)
+{
+ enable_r4030_irq(irq);
+ return 0; /* never anything pending */
+}
+
+#define shutdown_r4030_irq disable_r4030_irq
+
+void disable_r4030_irq(unsigned int irq)
+{
+ unsigned int mask = ~(1 << (irq - JAZZ_IE_PARALLEL));
+ unsigned long flags;
+
+ spin_lock_irqsave(&r4030_lock, flags);
+ mask &= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE);
+ r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask);
+ spin_unlock_irqrestore(&r4030_lock, flags);
+}
+
+#define mask_and_ack_r4030_irq disable_r4030_irq
+
+static void end_r4030_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_r4030_irq(irq);
+}
+
+static struct hw_interrupt_type r4030_irq_type = {
+ "R4030",
+ startup_r4030_irq,
+ shutdown_r4030_irq,
+ enable_r4030_irq,
+ disable_r4030_irq,
+ mask_and_ack_r4030_irq,
+ end_r4030_irq,
+ NULL
+};
+
+void __init init_r4030_ints(void)
+{
+ int i;
+
+ for (i = JAZZ_PARALLEL_IRQ; i <= JAZZ_TIMER_IRQ; i++) {
+ irq_desc[i].status = IRQ_DISABLED;
+ irq_desc[i].action = 0;
+ irq_desc[i].depth = 1;
+ irq_desc[i].handler = &r4030_irq_type;
+ }
+
+ r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0);
+ r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */
+ r4030_read_reg32(JAZZ_R4030_INVAL_ADDR); /* clear error bits */
+}
+
/*
* On systems with i8259-style interrupt controllers we assume for
* driver compatibility reasons interrupts 0 - 15 to be the i8259
@@ -25,21 +93,11 @@ extern asmlinkage void jazz_handle_int(v
*/
void __init init_IRQ (void)
{
- int i;
-
set_except_vector(0, jazz_handle_int);
init_generic_irq();
init_i8259_irqs(); /* Integrated i8259 */
-#if 0
- init_jazz_irq();
+ init_r4030_ints();
- /* Actually we've got more interrupts to handle ... */
- for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_ETHERNET; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &pciasic_irq_type;
- }
-#endif
+ change_c0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1);
}
diff -puN arch/mips/jazz/jazzdma.c~mips-megapatch arch/mips/jazz/jazzdma.c
--- 25/arch/mips/jazz/jazzdma.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/jazz/jazzdma.c 2004-02-19 12:53:00.000000000 -0800
@@ -9,6 +9,7 @@
*/
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/module.h>
#include <linux/errno.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
@@ -78,7 +79,7 @@ void __init vdma_init(void)
vdma_pgtbl_init();
r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
- PHYSADDR(vdma_pagetable_start));
+ CPHYSADDR(vdma_pagetable_start));
r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
@@ -170,6 +171,8 @@ unsigned long vdma_alloc(unsigned long p
return laddr;
}
+EXPORT_SYMBOL(vdma_alloc);
+
/*
* Free previously allocated dma translation pages
* Note that this does NOT change the translation table,
@@ -201,6 +204,8 @@ int vdma_free(unsigned long laddr)
return 0;
}
+EXPORT_SYMBOL(vdma_free);
+
/*
* Map certain page(s) to another physical address.
* Caller must have allocated the page(s) before.
@@ -310,6 +315,8 @@ unsigned long vdma_log2phys(unsigned lon
return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
}
+EXPORT_SYMBOL(vdma_log2phys);
+
/*
* Print DMA statistics
*/
diff -puN -L arch/mips/jazz/jazz-ksyms.c arch/mips/jazz/jazz-ksyms.c~mips-megapatch /dev/null
--- 25/arch/mips/jazz/jazz-ksyms.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,16 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1998, 2000, 2001, 2003 by Ralf Baechle
- */
-#include <linux/module.h>
-
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/jazzdma.h>
-
-EXPORT_SYMBOL(vdma_alloc);
-EXPORT_SYMBOL(vdma_free);
-EXPORT_SYMBOL(vdma_log2phys);
diff -puN -L arch/mips/jazz/kbd-jazz.c arch/mips/jazz/kbd-jazz.c~mips-megapatch /dev/null
--- 25/arch/mips/jazz/kbd-jazz.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,99 +0,0 @@
-/*
- * Low-level hardware access stuff for Jazz family machines.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle
- */
-#include <linux/sched.h>
-#include <asm/jazz.h>
-
-#define jazz_kh ((keyboard_hardware *) JAZZ_KEYBOARD_ADDRESS)
-
-static void jazz_request_region(void)
-{
- /* No I/O ports are being used on Jazz. */
-}
-
-static int jazz_request_irq(void (*handler)(int, void *, struct pt_regs *))
-{
- int res;
-
- res = request_irq(JAZZ_KEYBOARD_IRQ, handler, 0, "keyboard", NULL);
- if (res != 0)
- return res;
-
- /* jazz_request_irq() should do this ... */
- r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
- r4030_read_reg16(JAZZ_IO_IRQ_ENABLE)
- | JAZZ_IE_KEYBOARD);
-
- return 0;
-}
-
-static int jazz_aux_request_irq(void (*handler)(int, void *, struct pt_regs *))
-{
- int ret;
-
- ret = request_irq(JAZZ_MOUSE_IRQ, handler, 0, "PS/2 Mouse", NULL);
- if (ret != 0)
- return ret;
-
- r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
- r4030_read_reg16(JAZZ_IO_IRQ_ENABLE) |
- JAZZ_IE_MOUSE);
- return 0;
-}
-
-static void jazz_aux_free_irq(void)
-{
- r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
- r4030_read_reg16(JAZZ_IO_IRQ_ENABLE)
- | JAZZ_IE_MOUSE);
- free_irq(JAZZ_MOUSE_IRQ, NULL);
-}
-
-static unsigned char jazz_read_input(void)
-{
- return jazz_kh->data;
-}
-
-static void jazz_write_output(unsigned char val)
-{
- int status;
-
- do {
- status = jazz_kh->command;
- } while (status & KBD_STAT_IBF);
- jazz_kh->data = val;
-}
-
-static void jazz_write_command(unsigned char val)
-{
- int status;
-
- do {
- status = jazz_kh->command;
- } while (status & KBD_STAT_IBF);
- jazz_kh->command = val;
-}
-
-static unsigned char jazz_read_status(void)
-{
- return jazz_kh->command;
-}
-
-struct kbd_ops jazz_kbd_ops = {
- jazz_request_region,
- jazz_request_irq,
-
- jazz_aux_request_irq,
- jazz_aux_free_irq,
-
- jazz_read_input,
- jazz_write_output,
- jazz_write_command,
- jazz_read_status
-};
diff -puN arch/mips/jazz/Makefile~mips-megapatch arch/mips/jazz/Makefile
--- 25/arch/mips/jazz/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/jazz/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,8 +2,6 @@
# Makefile for the Jazz family specific parts of the kernel
#
-export-syms := jazz-ksyms.o
-obj-y := int-handler.o irq.o jazzdma.o jazz-ksyms.o reset.o \
- rtc-jazz.o setup.o floppy-jazz.o kbd-jazz.o
+obj-y := int-handler.o irq.o jazzdma.o reset.o setup.o
EXTRA_AFLAGS := $(CFLAGS)
diff -puN arch/mips/jazz/reset.c~mips-megapatch arch/mips/jazz/reset.c
--- 25/arch/mips/jazz/reset.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/jazz/reset.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,5 +1,8 @@
/*
* Reset a Jazz machine.
+ *
+ * We don't trust the firmware so we do it the classic way by poking and
+ * stabbing at the keyboard controller ...
*/
#include <linux/jiffies.h>
#include <asm/jazz.h>
@@ -8,25 +11,54 @@
#include <asm/reboot.h>
#include <asm/delay.h>
+#define jazz_kh ((keyboard_hardware *) JAZZ_KEYBOARD_ADDRESS)
+
+#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
+
+static void jazz_write_output(unsigned char val)
+{
+ int status;
+
+ do {
+ status = jazz_kh->command;
+ } while (status & KBD_STAT_IBF);
+ jazz_kh->data = val;
+}
+
+static void jazz_write_command(unsigned char val)
+{
+ int status;
+
+ do {
+ status = jazz_kh->command;
+ } while (status & KBD_STAT_IBF);
+ jazz_kh->command = val;
+}
+
+static unsigned char jazz_read_status(void)
+{
+ return jazz_kh->command;
+}
+
static inline void kb_wait(void)
{
unsigned long start = jiffies;
unsigned long timeout = start + HZ/2;
do {
- if (! (kbd_read_status() & 0x02))
+ if (! (jazz_read_status() & 0x02))
return;
- } time_before_eq(jiffies, timeout);
+ } while (time_before_eq(jiffies, timeout));
}
void jazz_machine_restart(char *command)
{
- while (1) {
- kb_wait ();
- kbd_write_command (0xd1);
- kb_wait ();
- kbd_write_output (0x00);
- }
+ while(1) {
+ kb_wait();
+ jazz_write_command (0xd1);
+ kb_wait();
+ jazz_write_output (0x00);
+ }
}
void jazz_machine_halt(void)
diff -puN -L arch/mips/jazz/rtc-jazz.c arch/mips/jazz/rtc-jazz.c~mips-megapatch /dev/null
--- 25/arch/mips/jazz/rtc-jazz.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,35 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * RTC routines for Jazz style attached Dallas chip.
- *
- * Copyright (C) 1998, 2001 by Ralf Baechle
- */
-#include <linux/mc146818rtc.h>
-#include <asm/io.h>
-#include <asm/jazz.h>
-
-static unsigned char jazz_rtc_read_data(unsigned long addr)
-{
- outb_p(addr, RTC_PORT(0));
- return *(char *)JAZZ_RTC_BASE;
-}
-
-static void jazz_rtc_write_data(unsigned char data, unsigned long addr)
-{
- outb_p(addr, RTC_PORT(0));
- *(char *)JAZZ_RTC_BASE = data;
-}
-
-static int jazz_rtc_bcd_mode(void)
-{
- return 0;
-}
-
-struct rtc_ops jazz_rtc_ops = {
- &jazz_rtc_read_data,
- &jazz_rtc_write_data,
- &jazz_rtc_bcd_mode
-};
diff -puN arch/mips/jazz/setup.c~mips-megapatch arch/mips/jazz/setup.c
--- 25/arch/mips/jazz/setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/jazz/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -18,7 +18,6 @@
#include <linux/mm.h>
#include <linux/console.h>
#include <linux/fb.h>
-#include <linux/mc146818rtc.h>
#include <linux/ide.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
@@ -28,62 +27,33 @@
#include <asm/reboot.h>
#include <asm/io.h>
#include <asm/pgtable.h>
+#include <asm/time.h>
#include <asm/traps.h>
-/*
- * Initial irq handlers.
- */
-static void no_action(int cpl, void *dev_id, struct pt_regs *regs) { }
-
-/*
- * IRQ2 is cascade interrupt to second interrupt controller
- */
-static struct irqaction irq2 = { no_action, 0, 0, "cascade", NULL, NULL};
-
extern asmlinkage void jazz_handle_int(void);
extern void jazz_machine_restart(char *command);
extern void jazz_machine_halt(void);
extern void jazz_machine_power_off(void);
-extern struct ide_ops std_ide_ops;
-extern struct rtc_ops jazz_rtc_ops;
-extern struct kbd_ops jazz_kbd_ops;
-extern struct fd_ops *fd_ops;
-extern struct fd_ops jazz_fd_ops;
-
-void (*board_time_init)(struct irqaction *irq);
-
static void __init jazz_time_init(struct irqaction *irq)
{
- /* set the clock to 100 Hz */
- r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
- i8259_setup_irq(JAZZ_TIMER_IRQ, irq);
-}
-
-static void __init jazz_irq_setup(void)
-{
- set_except_vector(0, jazz_handle_int);
- r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
- JAZZ_IE_ETHERNET |
- JAZZ_IE_SCSI |
- JAZZ_IE_SERIAL1 |
- JAZZ_IE_SERIAL2 |
- JAZZ_IE_PARALLEL |
- JAZZ_IE_FLOPPY);
- r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */
- r4030_read_reg32(JAZZ_R4030_INVAL_ADDR); /* clear error bits */
- change_c0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1);
/* set the clock to 100 Hz */
r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
- request_region(0x20, 0x20, "pic1");
- request_region(0xa0, 0x20, "pic2");
- i8259_setup_irq(2, &irq2);
+ setup_irq(JAZZ_TIMER_IRQ, irq);
}
+static struct resource jazz_io_resources[] = {
+ { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
+ { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
+ { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
+ { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
+};
-void __init jazz_setup(void)
+static void __init jazz_setup(void)
{
+ int i;
+
/* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */
add_wired_entry (0x02000017, 0x03c00017, 0xe0000000, PM_64K);
@@ -93,34 +63,24 @@ void __init jazz_setup(void)
/* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */
add_wired_entry (0x01800017, 0x01000017, 0xe4000000, PM_4M);
- irq_setup = jazz_irq_setup;
set_io_port_base(JAZZ_PORT_BASE);
#ifdef CONFIG_EISA
if (mips_machtype == MACH_MIPS_MAGNUM_4000)
EISA_bus = 1;
#endif
isa_slot_offset = 0xe3000000;
- request_region(0x00,0x20,"dma1");
- request_region(0x40,0x20,"timer");
- request_region(0x80,0x10,"dma page reg");
- request_region(0xc0,0x20,"dma2");
- board_time_init = jazz_time_init;
+
+ /* request I/O space for devices used on all i[345]86 PCs */
+ for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++)
+ request_resource(&ioport_resource, jazz_io_resources + i);
+
+ board_timer_setup = jazz_time_init;
/* The RTC is outside the port address space */
_machine_restart = jazz_machine_restart;
_machine_halt = jazz_machine_halt;
_machine_power_off = jazz_machine_power_off;
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
-#endif
-#ifdef CONFIG_BLK_DEV_FD
- fd_ops = &jazz_fd_ops;
-#endif
-#ifdef CONFIG_VT
- conswitchp = &dummy_con;
-#endif
-
#warning "Somebody should check if screen_info is ok for Jazz."
screen_info = (struct screen_info) {
@@ -135,8 +95,7 @@ void __init jazz_setup(void)
16 /* orig_video_points */
};
- rtc_ops = &jazz_rtc_ops;
- kbd_ops = &jazz_kbd_ops;
-
vdma_init();
}
+
+early_initcall(jazz_setup);
diff -puN arch/mips/jmr3927/common/prom.c~mips-megapatch arch/mips/jmr3927/common/prom.c
--- 25/arch/mips/jmr3927/common/prom.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/jmr3927/common/prom.c 2004-02-19 12:53:00.000000000 -0800
@@ -41,9 +41,6 @@
#include <asm/bootinfo.h>
-/* #define DEBUG_CMDLINE */
-
-char arcs_cmdline[CL_SIZE];
extern int prom_argc;
extern char **prom_argv, **prom_envp;
@@ -78,6 +75,7 @@ void __init prom_init_cmdline(void)
*cp = '\0';
}
-void prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/jmr3927/rbhma3100/init.c~mips-megapatch arch/mips/jmr3927/rbhma3100/init.c
--- 25/arch/mips/jmr3927/rbhma3100/init.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/jmr3927/rbhma3100/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,5 +1,4 @@
-/***********************************************************************
- *
+/*
* Copyright 2001 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* ahennessy@mvista.com
@@ -27,8 +26,6 @@
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- ***********************************************************************
*/
#include <linux/config.h>
#include <linux/init.h>
@@ -57,16 +54,17 @@ const char *get_system_type(void)
}
extern void puts(unsigned char *cp);
-int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+
+void __init prom_init(void)
{
#ifdef CONFIG_TOSHIBA_JMR3927
/* CCFG */
if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
puts("Warning: TX3927 TLB off\n");
#endif
- prom_argc = argc;
- prom_argv = argv;
- prom_envp = envp;
+ prom_argc = fw_arg0;
+ prom_argv = (char **) fw_arg1;
+ prom_envp = (char **) fw_arg2;
mips_machgroup = MACH_GROUP_TOSHIBA;
@@ -76,5 +74,4 @@ int __init prom_init(int argc, char **ar
prom_init_cmdline();
add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM);
- return 0;
}
diff -puN arch/mips/jmr3927/rbhma3100/irq.c~mips-megapatch arch/mips/jmr3927/rbhma3100/irq.c
--- 25/arch/mips/jmr3927/rbhma3100/irq.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/jmr3927/rbhma3100/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -63,10 +63,7 @@
struct tb_irq_space* tb_irq_spaces;
-unsigned int local_bh_count[NR_CPUS];
-unsigned int local_irq_count[NR_CPUS];
-
-static int jmr3927_irq_base=-1;
+static int jmr3927_irq_base = -1;
#ifdef CONFIG_PCI
static int jmr3927_gen_iack(void)
@@ -84,6 +81,7 @@ extern asmlinkage void jmr3927_IRQ(void)
#define irc_dlevel 0
#define irc_elevel 1
+
static unsigned char irc_level[TX3927_NUM_IR] = {
5, 5, 5, 5, 5, 5, /* INT[5:0] */
7, 7, /* SIO */
@@ -122,9 +120,12 @@ static inline void unmask_irq(unsigned i
static void jmr3927_irq_disable(unsigned int irq_nr);
static void jmr3927_irq_enable(unsigned int irq_nr);
+static spinlock_t jmr3927_irq_lock = SPIN_LOCK_UNLOCKED;
+
static unsigned int jmr3927_irq_startup(unsigned int irq)
{
jmr3927_irq_enable(irq);
+
return 0;
}
@@ -132,10 +133,6 @@ static unsigned int jmr3927_irq_startup(
static void jmr3927_irq_ack(unsigned int irq)
{
- db_assert(jmr3927_irq_base != -1);
- db_assert(irq >= jmr3927_irq_base);
- db_assert(irq < jmr3927_irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC);
-
if (irq == JMR3927_IRQ_IRC_TMR0) {
jmr3927_tmrptr->tisr = 0; /* ack interrupt */
}
@@ -145,10 +142,6 @@ static void jmr3927_irq_ack(unsigned int
static void jmr3927_irq_end(unsigned int irq)
{
- db_assert(jmr3927_irq_base != -1);
- db_assert(irq >= jmr3927_irq_base);
- db_assert(irq < jmr3927_irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC);
-
jmr3927_irq_enable(irq);
}
@@ -156,26 +149,18 @@ static void jmr3927_irq_disable(unsigned
{
unsigned long flags;
- db_assert(jmr3927_irq_base != -1);
- db_assert(irq >= jmr3927_irq_base);
- db_assert(irq < jmr3927_irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC);
-
- local_irq_save(flags);
+ spinlock_irqsave(&jmr3927_irq_lock, flags);
mask_irq(irq_nr);
- local_irq_restore(flags);
+ spinlock_irqrestore(&jmr3927_irq_lock, flags);
}
static void jmr3927_irq_enable(unsigned int irq_nr)
{
unsigned long flags;
- db_assert(jmr3927_irq_base != -1);
- db_assert(irq >= jmr3927_irq_base);
- db_assert(irq < jmr3927_irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC);
-
- local_irq_save(flags);
+ spinlock_irqsave(&jmr3927_irq_lock, flags);
unmask_irq(irq_nr);
- local_irq_restore(flags);
+ spinlock_irqrestore(&jmr3927_irq_lock, flags);
}
/*
@@ -195,8 +180,7 @@ static void mask_irq_isac(int irq_nr, in
static void unmask_irq_isac(int irq_nr, int space_id)
{
/* 0: mask */
- unsigned char imask =
- jmr3927_isac_reg_in(JMR3927_ISAC_INTM_ADDR);
+ unsigned char imask = jmr3927_isac_reg_in(JMR3927_ISAC_INTM_ADDR);
unsigned int bit = 1 << irq_nr;
jmr3927_isac_reg_out(imask | bit, JMR3927_ISAC_INTM_ADDR);
/* flush write buffer */
@@ -206,8 +190,7 @@ static void unmask_irq_isac(int irq_nr,
static void mask_irq_ioc(int irq_nr, int space_id)
{
/* 0: mask */
- unsigned char imask =
- jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
+ unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
unsigned int bit = 1 << irq_nr;
jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR);
/* flush write buffer */
@@ -216,8 +199,7 @@ static void mask_irq_ioc(int irq_nr, int
static void unmask_irq_ioc(int irq_nr, int space_id)
{
/* 0: mask */
- unsigned char imask =
- jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
+ unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
unsigned int bit = 1 << irq_nr;
jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR);
/* flush write buffer */
@@ -440,6 +422,7 @@ void jmr3927_irq_setup(void)
}
void (*irq_setup)(void);
+
void __init init_IRQ(void)
{
@@ -456,7 +439,7 @@ void __init init_IRQ(void)
irq_setup();
}
-hw_irq_controller jmr3927_irq_controller = {
+static hw_irq_controller jmr3927_irq_controller = {
"jmr3927_irq",
jmr3927_irq_startup,
jmr3927_irq_shutdown,
@@ -464,15 +447,13 @@ hw_irq_controller jmr3927_irq_controller
jmr3927_irq_disable,
jmr3927_irq_ack,
jmr3927_irq_end,
- NULL /* no affinity stuff for UP */
};
-void
-jmr3927_irq_init(u32 irq_base)
+void jmr3927_irq_init(u32 irq_base)
{
- extern irq_desc_t irq_desc[];
u32 i;
+ init_generic_irq();
for (i= irq_base; i< irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
diff -puN arch/mips/jmr3927/rbhma3100/Makefile~mips-megapatch arch/mips/jmr3927/rbhma3100/Makefile
--- 25/arch/mips/jmr3927/rbhma3100/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/jmr3927/rbhma3100/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,7 +2,7 @@
# Makefile for TOSHIBA JMR-TX3927 board
#
-obj-y += init.o int-handler.o irq.o setup.o rtc.o
+obj-y += init.o int-handler.o irq.o setup.o
obj-$(CONFIG_RUNTIME_DEBUG) += debug.o
obj-$(CONFIG_KGDB) += kgdb_io.o
diff -puN -L arch/mips/jmr3927/rbhma3100/rtc.c arch/mips/jmr3927/rbhma3100/rtc.c~mips-megapatch /dev/null
--- 25/arch/mips/jmr3927/rbhma3100/rtc.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,56 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- *
- * RTC routines for Dallas chip.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 200-2001 Toshiba Corporation
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <asm/mc146818rtc.h> /* bad name... */
-#include <asm/jmr3927/jmr3927.h>
-
-static unsigned char jmr3927_rtc_read_data(unsigned long addr)
-{
- return jmr3927_nvram_in(addr);
-}
-
-static void jmr3927_rtc_write_data(unsigned char data, unsigned long addr)
-{
- jmr3927_nvram_out(data, addr);
-}
-
-static int jmr3927_rtc_bcd_mode(void)
-{
- return 1;
-}
-
-struct rtc_ops jmr3927_rtc_ops = {
- &jmr3927_rtc_read_data,
- &jmr3927_rtc_write_data,
- &jmr3927_rtc_bcd_mode
-};
diff -puN arch/mips/jmr3927/rbhma3100/setup.c~mips-megapatch arch/mips/jmr3927/rbhma3100/setup.c
--- 25/arch/mips/jmr3927/rbhma3100/setup.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/jmr3927/rbhma3100/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -38,7 +38,6 @@
#include <linux/kernel.h>
#include <linux/kdev_t.h>
#include <linux/types.h>
-#include <linux/console.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/ide.h>
@@ -199,7 +198,7 @@ extern void jmr3927_irq_setup(void);
extern struct resource pci_io_resource;
extern struct resource pci_mem_resource;
-void __init jmr3927_setup(void)
+static void __init jmr3927_setup(void)
{
extern int panic_timeout;
char *argptr;
@@ -282,6 +281,8 @@ void __init jmr3927_setup(void)
#endif
}
+early_initcall(jmr3927_setup);
+
static void tx3927_setup(void);
@@ -294,9 +295,6 @@ unsigned long mips_pci_mem_size;
unsigned long mips_pci_io_pciaddr = 0;
#endif
-extern struct rtc_ops *rtc_ops;
-extern struct rtc_ops jmr3927_rtc_ops;
-
static void __init jmr3927_board_init(void)
{
char *argptr;
@@ -310,10 +308,6 @@ static void __init jmr3927_board_init(vo
tx3927_setup();
-#ifdef CONFIG_VT
- conswitchp = &dummy_con;
-#endif
-
if (jmr3927_have_isac()) {
#ifdef CONFIG_FB_E1355
@@ -328,11 +322,6 @@ static void __init jmr3927_board_init(vo
/* overrides PCI-IDE */
#endif
}
-#ifdef USE_RTC_DS1742
- if (jmr3927_have_nvram()) {
- rtc_ops = &jmr3927_rtc_ops;
- }
-#endif
/* SIO0 DTR on */
jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
diff -puN arch/mips/Kconfig~mips-megapatch arch/mips/Kconfig
--- 25/arch/mips/Kconfig~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/Kconfig 2004-02-19 12:53:00.000000000 -0800
@@ -1,13 +1,15 @@
config MIPS
bool
default y
+ # Horrible source of confusion. Die, die, die ...
+ select EMBEDDED
config MIPS64
bool "64-bit kernel"
help
Select this option if you want to build a 64-bit kernel. You should
only select this option if you have hardware that actually has a
- 32-bit processor and if your application will actually benefit from
+ 64-bit processor and if your application will actually benefit from
64-bit processing, otherwise say N. You must say Y for kernels for
SGI IP27 (Origin 200 and 2000). If in doubt say N.
@@ -25,14 +27,40 @@ source "init/Kconfig"
menu "Machine selection"
+config MACH_JAZZ
+ bool "Support for the Jazz family of machines"
+ help
+ This a family of machines based on the MIPS R4030 chipset which was
+ used by several vendors to build RISC/os and Windows NT workstations.
+ Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
+ Olivetti M700-10 workstations.
+
config ACER_PICA_61
bool "Support for Acer PICA 1 chipset (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ depends on MACH_JAZZ && EXPERIMENTAL
help
This is a machine with a R4400 133/150 MHz CPU. To compile a Linux
kernel that runs on these, say Y here. For details about Linux on
the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
- <http://oss.sgi.com/mips/>.
+ <http://www.linux-mips.org/>.
+
+config MIPS_MAGNUM_4000
+ bool "Support for MIPS Magnum 4000"
+ depends on MACH_JAZZ
+ help
+ This is a machine with a R4000 100 MHz CPU. To compile a Linux
+ kernel that runs on these, say Y here. For details about Linux on
+ the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
+ <http://www.linux-mips.org/>.
+
+config OLIVETTI_M700
+ bool "Support for Olivetti M700-10"
+ depends on MACH_JAZZ
+ help
+ This is a machine with a R4000 100 MHz CPU. To compile a Linux
+ kernel that runs on these, say Y here. For details about Linux on
+ the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
+ <http://www.linux-mips.org/>.
config BAGET_MIPS
bool "Support for BAGET MIPS series (EXPERIMENTAL)"
@@ -40,21 +68,59 @@ config BAGET_MIPS
help
This enables support for the Baget, a Russian embedded system. For
more details about the Baget see the Linux/MIPS FAQ on
- <http://oss.sgi.com/mips/>.
+ <http://www.linux-mips.org/>.
+
+config MACH_VR41XX
+ bool "Support for NEC VR41XX-based machines"
config CASIO_E55
bool "Support for CASIO CASSIOPEIA E-10/15/55/65"
+ depends on MACH_VR41XX
+
+config IBM_WORKPAD
+ bool "Support for IBM WorkPad z50"
+ depends on MACH_VR41XX
+
+config NEC_EAGLE
+ bool "Support for NEC Eagle/Hawk board"
+ depends on MACH_VR41XX
+
+config TANBAC_TB0226
+ bool "Support for TANBAC TB0226 (Mbase)"
+ depends on MACH_VR41XX
+ help
+ The TANBAC TB0226 (Mbase) is a MIPS-based platform manufactured by TANBAC.
+ Please refer to <http://www.tanbac.co.jp/> about Mbase.
+
+config TANBAC_TB0229
+ bool "Support for TANBAC TB0229 (VR4131DIMM)"
+ depends on MACH_VR41XX
+ help
+ The TANBAC TB0229 (VR4131DIMM) is a MIPS-based platform manufactured by TANBAC.
+ Please refer to <http://www.tanbac.co.jp/> about VR4131DIMM.
+
+config VICTOR_MPC30X
+ bool "Support for Victor MP-C303/304"
+ depends on MACH_VR41XX
+
+config ZAO_CAPCELLA
+ bool "Support for ZAO Networks Capcella"
+ depends on MACH_VR41XX
+
+config TOSHIBA_JMR3927
+ bool "Support for Toshiba JMR-TX3927 board"
+ depends on MIPS32
config MIPS_COBALT
bool "Support for Cobalt Server (EXPERIMENTAL)"
depends on EXPERIMENTAL
-config DECSTATION
+config MACH_DECSTATION
bool "Support for DECstations"
depends on MIPS32 || EXPERIMENTAL
---help---
This enables support for DEC's MIPS based workstations. For details
- see the Linux/MIPS FAQ on <http://oss.sgi.com/mips/> and the
+ see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
DECstation porting pages on <http://decstation.unix-ag.org/>.
If you have one of the following DECstation Models you definitely
@@ -74,46 +140,21 @@ config MIPS_EV64120
This is an evaluation board based on the Galileo GT-64120
single-chip system controller that contains a MIPS R5000 compatible
core running at 75/100MHz. Their website is located at
- <http://www.galileot.com/>. Say Y here if you wish to build a
+ <http://www.marvell.com/>. Say Y here if you wish to build a
kernel for this platform.
config EVB_PCI1
bool "Enable Second PCI (PCI1)"
depends on MIPS_EV64120
-if MOMENCO_OCELOT_G || MOMENCO_OCELOT
-
-config SYSCLK_100
- bool
- default y
-
-endif
-if MIPS_EV64120
-
-choice
- prompt "Galileo Chip Clock"
- default SYSCLK_83
-
-config SYSCLK_75
- bool "75"
-
-config SYSCLK_83
- bool "83.3"
-
-config SYSCLK_100
- bool "100" if MIPS_EV64120
-
-endchoice
-
-endif
-
config MIPS_EV96100
bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
depends on EXPERIMENTAL
+ select MIPS_GT96100
help
- This is an evaluation board based on the Galielo GT-96100 LAN/WAN
+ This is an evaluation board based on the Galileo GT-96100 LAN/WAN
communications controllers containing a MIPS R5000 compatible core
- running at 83MHz. Their website is <http://www.galileot.com/>. Say Y
+ running at 83MHz. Their website is <http://www.marvell.com/>. Say Y
here if you wish to build a kernel for this platform.
config MIPS_IVR
@@ -122,8 +163,8 @@ config MIPS_IVR
This is an evaluation board built by Globespan to showcase thir
iVR (Internet Video Recorder) design. It utilizes a QED RM5231
R5000 MIPS core. More information can be found out their website
- located at <http://www.globespan.net/products/product4.html>P. Say Y
- here if you wish to build a kernel for this platform.
+ located at <http://www.globespan.net/>. Say Y here if you wish to
+ build a kernel for this platform.
config LASAT
bool "Support for LASAT Networks platforms"
@@ -147,9 +188,6 @@ config LASAT_SYSCTL
config HP_LASERJET
bool "Support for Hewlett Packard LaserJet board"
-config IBM_WORKPAD
- bool "Support for IBM WorkPad z50"
-
config MIPS_ITE8172
bool "Support for ITE 8172G board"
help
@@ -166,7 +204,7 @@ config IT8172_REVC
Say Y here to support the older, Revision C version of the Integrated
Technology Express, Inc. ITE8172 SBC. Vendor page at
<http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
- board at <http://www.mvista.com/allies/semiconductor/ite.html>.
+ board at <http://www.mvista.com/partners/semiconductor/ite.html>.
config MIPS_ATLAS
bool "Support for MIPS Atlas board"
@@ -174,14 +212,6 @@ config MIPS_ATLAS
This enables support for the QED R5231-based MIPS Atlas evaluation
board.
-config MIPS_MAGNUM_4000
- bool "Support for MIPS Magnum 4000"
- help
- This is a machine with a R4000 100 MHz CPU. To compile a Linux
- kernel that runs on these, say Y here. For details about Linux on
- the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
- <http://oss.sgi.com/mips/>.
-
config MIPS_MALTA
bool "Support for MIPS Malta board"
help
@@ -210,6 +240,22 @@ config MOMENCO_OCELOT_C
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
+config MOMENCO_JAGUAR_ATX
+ bool "Support for Momentum Jaguar board"
+ help
+ The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by
+ Momentum Computer <http://www.momenco.com/>.
+
+config PMC_YOSEMITE
+ bool "Support for PMC-Siera Yosemite eval board"
+ help
+ Yosemite is an evaluation board for the RM9000x2 processor
+ manufactured by PMC-Sierra
+
+config HYPERTRANSPORT
+ bool "Hypertransport Support for PMC-Sierra Yosemite"
+ depends on PMC_YOSEMITE
+
config DDB5074
bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"
depends on EXPERIMENTAL
@@ -244,17 +290,6 @@ config DDB5477_BUS_FREQUENCY
config NEC_OSPREY
bool "Support for NEC Osprey board"
-config NEC_EAGLE
- bool "Support for NEC Eagle/Hawk board"
-
-config OLIVETTI_M700
- bool "Support for Olivetti M700-10"
- help
- This is a machine with a R4000 100 MHz CPU. To compile a Linux
- kernel that runs on these, say Y here. For details about Linux on
- the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
- <http://oss.sgi.com/mips/>.
-
config SGI_IP22
bool "Support for SGI IP22 (Indy/Indigo2)"
help
@@ -286,8 +321,8 @@ config SGI_SN0_N_MODE
running in M-Mode, so you should say N here.
config DISCONTIGMEM
- bool "Discontiguous Memory Support"
- depends on SGI_IP27
+ bool
+ default y if SGI_IP27
help
Say Y to upport efficient handling of discontiguous physical memory,
for architectures which are either NUMA (Non-Uniform Memory Access)
@@ -352,7 +387,7 @@ config SOC_AU1500
endchoice
choice
- prompt "AMD/Alchemy Pb1x and Db1x board support"
+ prompt "AMD/Alchemy Au1x00 board support"
depends on SOC_AU1X00
help
These are evaluation boards built by AMD/Alchemy to
@@ -386,6 +421,22 @@ config MIPS_DB1500
bool "DB1500 board"
depends on SOC_AU1500
+config MIPS_BOSPORUS
+ bool "Bosporus board"
+ depends on SOC_AU1500
+
+config MIPS_MIRAGE
+ bool "Mirage board"
+ depends on SOC_AU1500
+
+config MIPS_XXS1500
+ bool "MyCable XXS1500 board"
+ depends on SOC_AU1500
+
+config MIPS_MTX1
+ bool "4G Systems MTX-1 board"
+ depends on SOC_AU1500
+
endchoice
config SIBYTE_SB1xxx_SOC
@@ -393,26 +444,174 @@ config SIBYTE_SB1xxx_SOC
depends on EXPERIMENTAL
choice
- prompt "BCM1xxx SOC Type"
+ prompt "BCM1xxx SOC-based board"
depends on SIBYTE_SB1xxx_SOC
- default SIBYTE_SB1250
+ default SIBYTE_SWARM
+ help
+ Enable support for boards based on the SiByte line of SOCs
+ from Broadcom. There are configurations for the known
+ evaluation boards, or you can choose "Other" and add your
+ own board support code.
-config SIBYTE_SB1250
+config SIBYTE_SWARM
+ bool "BCM91250A-SWARM"
+ select SIBYTE_SB1250
+
+config SIBYTE_SENTOSA
+ bool "BCM91250E-Sentosa"
+ select SIBYTE_SB1250
+
+config SIBYTE_RHONE
+ bool "BCM91125E-Rhone"
+ select SIBYTE_BCM1125H
+
+config SIBYTE_CARMEL
+ bool "BCM91120x-Carmel"
+ select SIBYTE_BCM1120
+
+config SIBYTE_PTSWARM
+ bool "BCM91250PT-PTSWARM"
+ select SIBYTE_SB1250
+
+config SIBYTE_LITTLESUR
+ bool "BCM91250C2-LittleSur"
+ select SIBYTE_SB1250
+
+config SIBYTE_CRHINE
+ bool "BCM91120C-CRhine"
+ select SIBYTE_BCM1120
+
+config SIBYTE_CRHONE
+ bool "BCM91125C-CRhone"
+ select SIBYTE_BCM1125
+
+config SIBYTE_UNKNOWN
+ bool "Other"
+
+endchoice
+
+config SIBYTE_BOARD
+ bool
+ depends on SIBYTE_SB1xxx_SOC && !SIBYTE_UNKNOWN
+ default y
+
+choice
+ prompt "BCM1xxx SOC Type"
+ depends on SIBYTE_UNKNOWN
+ default SIBYTE_UNK_BCM1250
+ help
+ Since you haven't chosen a known evaluation board from
+ Broadcom, you must explicitly pick the SOC this kernel is
+ targetted for.
+
+config SIBYTE_UNK_BCM1250
bool "BCM1250"
+ select SIBYTE_SB1250
+
+config SIBYTE_UNK_BCM1120
+ bool "BCM1120"
+ select SIBYTE_BCM1120
+
+config SIBYTE_UNK_BCM1125
+ bool "BCM1125"
+ select SIBYTE_BCM1125
+
+config SIBYTE_UNK_BCM1125H
+ bool "BCM1125H"
+ select SIBYTE_BCM1125H
+
+endchoice
+
+config SIBYTE_SB1250
+ bool
+
+config SIBYTE_BCM1120
+ bool
+ select SIBYTE_BCM112X
+
+config SIBYTE_BCM1125
+ bool
+ select SIBYTE_BCM112X
+
+config SIBYTE_BCM1125H
+ bool
+ select SIBYTE_BCM112X
+
+config SIBYTE_BCM112X
+ bool
+
+choice
+ prompt "SiByte SOC Stepping"
+ depends on SIBYTE_SB1xxx_SOC
+
+config CPU_SB1_PASS_1
+ bool "1250 Pass1"
+ depends on SIBYTE_SB1250
+
+config CPU_SB1_PASS_2_1250
+ bool "1250 An"
+ depends on SIBYTE_SB1250
+ select CPU_SB1_PASS_2
+ help
+ Also called BCM1250 Pass 2
+
+config CPU_SB1_PASS_2_2
+ bool "1250 Bn"
+ depends on SIBYTE_SB1250
+ help
+ Also called BCM1250 Pass 2.2
+
+config CPU_SB1_PASS_4
+ bool "1250 Cn"
+ depends on SIBYTE_SB1250
+ help
+ Also called BCM1250 Pass 3
+
+config CPU_SB1_PASS_2_112x
+ bool "112x Hybrid"
+ depends on SIBYTE_BCM112X
+ select CPU_SB1_PASS_2
+
+config CPU_SB1_PASS_3
+ bool "112x An"
+ depends on SIBYTE_BCM112X
endchoice
+config CPU_SB1_PASS_2
+ bool
+
+config SIBYTE_HAS_PCI
+ bool
+ depends on SIBYTE_SB1250 || SIBYTE_BCM1125 || SIBYTE_BCM1125H
+ default y
+
+config SIBYTE_HAS_LDT
+ bool
+ depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H)
+ default y
+
config SIMULATION
bool "Running under simulation"
depends on SIBYTE_SB1xxx_SOC
+ help
+ Build a kernel suitable for running under the GDB simulator.
+ Primarily adjusts the kernel's notion of time.
config SIBYTE_CFE
bool "Booting from CFE"
depends on SIBYTE_SB1xxx_SOC
+ help
+ Make use of the CFE API for enumerating available memory,
+ controlling secondary CPUs, and possibly console output.
config SIBYTE_CFE_CONSOLE
bool "Use firmware console"
depends on SIBYTE_CFE
+ help
+ Use the CFE API's console write routines during boot. Other console
+ options (VT console, sb1250 duart console, etc.) should not be
+ configured.
config SIBYTE_STANDALONE
bool
@@ -421,12 +620,25 @@ config SIBYTE_STANDALONE
config SIBYTE_STANDALONE_RAM_SIZE
int "Memory size (in megabytes)"
- depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
+ depends on SIBYTE_STANDALONE
default "32"
config SIBYTE_BUS_WATCHER
- bool "Support for Bus Watcher statistics"
+ bool "Support for Bus Watcher statistics"
depends on SIBYTE_SB1xxx_SOC
+ help
+ Handle and keep statistics on the bus error interrupts (COR_ECC,
+ BAD_ECC, IO_BUS).
+
+config SIBYTE_BW_TRACE
+ bool "Capture bus trace before bus error"
+ depends on SIBYTE_BUS_WATCHER
+ help
+ Run a continuous bus trace, dumping the raw data as soon as
+ a ZBbus error is detected. Cannot work if ZBbus profiling
+ is turned on, and also will interfere with JTAG-based trace
+ buffer activity. Raw buffer data is dumped to console, and
+ must be processed off-line.
config SIBYTE_SB1250_PROF
bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
@@ -436,15 +648,6 @@ config SIBYTE_TBPROF
bool "Support for ZBbus profiling"
depends on SIBYTE_SB1xxx_SOC
-config SIBYTE_SWARM
- bool "Support for SWARM board"
- depends on SIBYTE_SB1250
-
-config SIBYTE_BOARD
- bool
- depends on SIBYTE_SWARM
- default y
-
config SNI_RM200_PCI
bool "Support for SNI RM200 PCI"
help
@@ -453,32 +656,10 @@ config SNI_RM200_PCI
Technology and now in turn merged with Fujitsu. Say Y here to
support this machine type.
-config TANBAC_TB0226
- bool "Support for TANBAC TB0226 (Mbase)"
- help
- The TANBAC TB0226 (Mbase) is a MIPS-based platform manufactured by TANBAC.
- Please refer to <http://www.tanbac.co.jp/> about Mbase.
-
-config TANBAC_TB0229
- bool "Support for TANBAC TB0229 (VR4131DIMM)"
- help
- The TANBAC TB0229 (VR4131DIMM) is a MIPS-based platform manufactured by TANBAC.
- Please refer to <http://www.tanbac.co.jp/> about VR4131DIMM.
-
-config TOSHIBA_JMR3927
- bool "Support for Toshiba JMR-TX3927 board"
- depends on MIPS32
-
config TOSHIBA_RBTX4927
bool "Support for Toshiba TBTX49[23]7 board"
depends on MIPS32
-config VICTOR_MPC30X
- bool "Support for Victor MP-C303/304"
-
-config ZAO_CAPCELLA
- bool "Support for ZAO Networks Capcella"
-
config RWSEM_GENERIC_SPINLOCK
bool
default y
@@ -486,6 +667,10 @@ config RWSEM_GENERIC_SPINLOCK
config RWSEM_XCHGADD_ALGORITHM
bool
+config HAVE_DEC_LOCK
+ bool
+ default y
+
#
# Select some configuration options automatically based on user selections.
#
@@ -494,35 +679,54 @@ config ARC
depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP27 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
default y
-config GENERIC_ISA_DMA
+config DMA_COHERENT
+ bool
+ depends on SIBYTE_SB1xxx_SOC
+ default y
+
+config DMA_IP27
+ bool
+ depends on SGI_IP27
+ default y
+
+config DMA_NONCOHERENT
bool
- depends on SNI_RM200_PCI || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
+ depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MOMENCO_JAGUAR_ATX || MIPS_BOSPORUS || MIPS_DB1000 || MIPS_DB1100 || MIPS_DB1500 || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || MIPS_MIRAGE || MIPS_MTX1 || MIPS_XXS1500 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || MACH_DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61 || TANBAC_TB0226 || TANBAC_TB0229
default y
-config CONFIG_GT64120
+config EARLY_PRINTK
bool
- depends on MIPS_EV64120 || MOMENCO_OCELOT
+ depends on MACH_DECSTATION
+ default y
+
+config GENERIC_ISA_DMA
+ bool
+ depends on SNI_RM200_PCI || MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61 || MIPS_MALTA
default y
config I8259
bool
- depends on SNI_RM200_PCI || DDB5477 || DDB5476 || DDB5074 || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_COBALT || ACER_PICA_61
+ depends on SNI_RM200_PCI || DDB5477 || DDB5476 || DDB5074 || MACH_JAZZ || MIPS_MALTA || MIPS_COBALT
+ default y
+
+config MIPS_BONITO64
+ bool
+ depends on MIPS_ATLAS || MIPS_MALTA
default y
-config MIPS_JAZZ
+config MIPS_MSC
bool
- depends on MIPS_MAGNUM_4000 || OLIVETTI_M700 || ACER_PICA_61
+ depends on MIPS_ATLAS || MIPS_MALTA
default y
-config NONCOHERENT_IO
+config MIPS_NILE4
bool
- depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61 || TANBAC_TB0226 || TANBAC_TB0229
- default y if ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_SEAD || MIPS_MALTA || MIPS_MAGNUM_4000 || OLIVETTI_M700 || MIPS_ATLAS || LASAT || MIPS_ITE8172 || IBM_WORKPAD || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_EV64120 || DECSTATION || MIPS_COBALT || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || CASIO_E55 || ACER_PICA_61 || TANBAC_TB0226 || TANBAC_TB0229
- default n if (SIBYTE_SB1250 || SGI_IP27)
+ depends on LASAT
+ default y
config CPU_LITTLE_ENDIAN
bool "Generate little endian code"
- default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || DECSTATION || HP_LASERJET || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || MIPS_PB1000 || MIPS_PB1100 || MIPS_PB1500 || NEC_OSPREY || NEC_EAGLE || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
+ default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || HP_LASERJET || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || MIPS_PB1000 || MIPS_PB1100 || MIPS_PB1500 || NEC_OSPREY || NEC_EAGLE || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
default n if BAGET_MIPS || MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
help
Some MIPS machines can be configured for either little or big endian
@@ -531,23 +735,22 @@ config CPU_LITTLE_ENDIAN
config IRQ_CPU
bool
- depends on ZAO_CAPCELLA || VICTOR_MPC30X || SGI_IP22 || NEC_EAGLE || NEC_OSPREY || DDB5477 || DDB5476 || DDB5074 || IBM_WORKPAD || HP_LASERJET || DECSTATION || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
+ depends on CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || HP_LASERJET || IBM_WORKPAD || MIPS_COBALT || MIPS_EV96100 || MOMENCO_OCELOT || MIPS_SEAD || MOMENCO_OCELOT_G || NEC_EAGLE || NEC_OSPREY || SGI_IP22 || VICTOR_MPC30X || TANBAC_TB0226 || TANBAC_TB0229 || ZAO_CAPCELLA
default y
-config VR41XX_TIME_C
+config IRQ_CPU_RM7K
bool
- depends on ZAO_CAPCELLA || VICTOR_MPC30X || NEC_EAGLE || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
+ depends on MOMENCO_JAGUAR_ATX || MOMENCO_OCELOT || MOMENCO_OCELOT_G
default y
config DUMMY_KEYB
bool
- depends on ZAO_CAPCELLA || VICTOR_MPC30X || SIBYTE_SB1250 || NEC_EAGLE || NEC_OSPREY || DDB5477 || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
+ depends on ZAO_CAPCELLA || VICTOR_MPC30X || SIBYTE_SB1xxx_SOC || NEC_EAGLE || NEC_OSPREY || DDB5477 || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
default y
-config VR41XX_COMMON
- bool
- depends on NEC_EAGLE || ZAO_CAPCELLA || VICTOR_MPC30X || IBM_WORKPAD || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229
- default y
+config VRC4171
+ tristate "NEC VRC4171 Support"
+ depends on IBM_WORKPAD
config VRC4173
tristate "NEC VRC4173 Support"
@@ -563,31 +766,58 @@ config MIPS_BOARDS_GEN
depends on MIPS_ATLAS || MIPS_MALTA || MIPS_SEAD
default y
-config ITE_BOARD_GEN
+config MIPS_GT64111
bool
- depends on MIPS_IVR || MIPS_ITE8172
+ depends on MIPS_COBALT
+ default y
+
+config MIPS_GT64120
+ bool
+ depends on MIPS_EV64120 || MIPS_EV96100 || LASAT || MIPS_ATLAS || MIPS_MALTA || MOMENCO_OCELOT
default y
-config NEW_PCI
+config MIPS_MV64340
bool
- depends on ZAO_CAPCELLA || VICTOR_MPC30X || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || NEC_EAGLE || DDB5477 || DDB5476 || DDB5074 || MIPS_ITE8172 || HP_LASERJET || MIPS_IVR || MIPS_EV96100 || MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 || TANBAC_TB0226 || TANBAC_TB0229
+ depends on MOMENCO_JAGUAR_ATX || MOMENCO_OCELOT_C
default y
-config SWAP_IO_SPACE
- bool "Support for paging of anonymous memory"
- depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SIBYTE_SB1250 || SGI_IP22 || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MIPS_MALTA || MIPS_ATLAS || MIPS_EV96100 || MIPS_PB1100 || MIPS_PB1000
+config MIPS_TX3927
+ bool
+ depends on TOSHIBA_JMR3927
default y
- help
- This option allows you to choose whether you want to have support
- for socalled swap devices or swap files in your kernel that are
- used to provide more virtual memory than the actual RAM present
- in your computer. If unusre say Y.
-config SIBYTE_HAS_LDT
+config ITE_BOARD_GEN
+ bool
+ depends on MIPS_IVR || MIPS_ITE8172
+ default y
+
+config SWAP_IO_SPACE
bool
- depends on SIBYTE_SB1xxx_SOC && PCI
+ depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SIBYTE_SB1xxx_SOC || SGI_IP22 || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MOMENCO_JAGUAR_ATX || MIPS_MALTA || MIPS_ATLAS || MIPS_EV96100 || MIPS_PB1100 || MIPS_PB1000
default y
+#
+# Unfortunately not all GT64120 systems run the chip at the same clock.
+# As the user for the clock rate and try to minimize the available options.
+#
+choice
+ prompt "Galileo Chip Clock"
+ #default SYSCLK_83 if MIPS_EV64120
+ depends on MIPS_EV64120 || MOMENCO_OCELOT || MOMENCO_OCELOT_G
+ default SYSCLK_83 if MIPS_EV64120
+ default SYSCLK_100 if MOMENCO_OCELOT || MOMENCO_OCELOT_G
+
+config SYSCLK_75
+ bool "75" if MIPS_EV64120
+
+config SYSCLK_83
+ bool "83.3" if MIPS_EV64120
+
+config SYSCLK_100
+ bool "100" if MIPS_EV64120 || MOMENCO_OCELOT || MOMENCO_OCELOT_G
+
+endchoice
+
config AU1000_USB_DEVICE
bool
depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
@@ -598,11 +828,6 @@ config COBALT_LCD
depends on MIPS_COBALT
default y
-config MIPS_GT64120
- bool
- depends on MIPS_EV64120
- default y
-
config MIPS_GT96100
bool
depends on MIPS_EV96100
@@ -623,18 +848,18 @@ config IT8712
config BOOT_ELF32
bool
- depends on DECSTATION || MIPS_ATLAS || MIPS_MALTA || SIBYTE_SB1250 || SGI_IP32 || SGI_IP22 || SNI_RM200_PCI
+ depends on MACH_DECSTATION || MIPS_ATLAS || MIPS_MALTA || MOMENCO_JAGUAR_ATX || SIBYTE_SB1xxx_SOC || SGI_IP32 || SGI_IP22 || SNI_RM200_PCI
default y
-config L1_CACHE_SHIFT
+config MIPS_L1_CACHE_SHIFT
int
- default "4" if DECSTATION
- default "5" if SGI_IP32 || SGI_IP22 || MIPS_SEAD || MIPS_MALTA || MIPS_ATLAS
+ default "4" if MACH_DECSTATION
default "7" if SGI_IP27
+ default "5"
config ARC32
bool
- depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP22 || MIPS_MAGNUM_4000 || OLIVETTI_M700
+ depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP32
default y
config FB
@@ -660,9 +885,8 @@ config FB
You need an utility program called fbset to make full use of frame
buffer devices. Please read <file:Documentation/fb/framebuffer.txt>
- and the Framebuffer-HOWTO at
- <http://www.tahallah.demon.co.uk/programming/prog.html> for more
- information.
+ and the Framebuffer-HOWTO at <http://www.tldp.org/docs.html#howto>
+ for more information.
Say Y here and to the driver for your graphics board below if you
are compiling a kernel for a non-x86 architecture.
@@ -694,17 +918,17 @@ config ARC_CONSOLE
config ARC_MEMORY
bool
- depends on SNI_RM200_PCI || SGI_IP32
+ depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP32
default y
config ARC_PROMLIB
bool
- depends on SNI_RM200_PCI || SGI_IP32 || SGI_IP22
+ depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP32
default y
config BOARD_SCACHE
bool
- depends on MIPS_EV96100 || MOMENCO_OCELOT || SGI_IP22
+ depends on CPU_RM9000 || MIPS_EV96100 || MOMENCO_OCELOT || SGI_IP22
default y
config ARC64
@@ -823,11 +1047,48 @@ config CPU_R10000
config CPU_RM7000
bool "RM7000"
+config CPU_RM9000
+ bool "RM9000"
+
config CPU_SB1
bool "SB1"
endchoice
+choice
+ prompt "Kernel page size"
+ default PAGE_SIZE_4KB
+
+config PAGE_SIZE_4KB
+ bool "4kB"
+ help
+ This option select the standard 4kB Linux page size. On some
+ R3000-family processors this is the only available page size. Using
+ 4kB page size will minimize memory consumption and is therefore
+ recommended for low memory systems.
+
+config PAGE_SIZE_16KB
+ bool "16kB"
+ depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
+ help
+ Using 16kB page size will result in higher performance kernel at
+ the price of higher memory consumption. This option is available on
+ all non-R3000 family processor. Not that at the time of this
+ writing this option is still high experimental; there are also
+ issues with compatibility of user applications.
+
+config PAGE_SIZE_64KB
+ bool "64kB"
+ depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
+ help
+ Using 64kB page size will result in higher performance kernel at
+ the price of higher memory consumption. This option is available on
+ all non-R3000 family processor. Not that at the time of this
+ writing this option is still high experimental; there are also
+ issues with compatibility of user applications.
+
+endchoice
+
config R5000_CPU_SCACHE
bool
depends on CPU_NEVADA || CPU_R5000
@@ -848,28 +1109,12 @@ config SIBYTE_DMA_PAGEOPS
config CPU_HAS_PREFETCH
bool "Enable prefetches" if CPU_SB1 && !CPU_SB1_PASS_2
- default y if CPU_RM7000 || CPU_MIPS64 || CPU_MIPS32
+ default y if CPU_MIPS32 || CPU_MIPS64 || CPU_RM7000 || CPU_RM9000
config VTAG_ICACHE
bool "Support for Virtual Tagged I-cache" if CPU_MIPS64 || CPU_MIPS32
default y if CPU_SB1
-choice
- prompt "SB1 Pass"
- depends on CPU_SB1
- default CPU_SB1_PASS_1
-
-config CPU_SB1_PASS_1
- bool "Pass1"
-
-config CPU_SB1_PASS_2
- bool "Pass2"
-
-config CPU_SB1_PASS_2_2
- bool "Pass2.2"
-
-endchoice
-
config SB1_PASS_1_WORKAROUNDS
bool
depends on CPU_SB1_PASS_1
@@ -880,23 +1125,14 @@ config SB1_PASS_2_WORKAROUNDS
depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
default y
-# Avoid prefetches on Pass 2 (before 2.2)
-# XXXKW for now, let 2.2 use same WORKAROUNDS flag as pre-2.2
-config SB1_CACHE_ERROR
- bool "Support for SB1 Cache Error handler"
- depends on CPU_SB1
-
-config SB1_CERR_IGNORE_RECOVERABLE
- bool "Ignore recoverable cache errors"
- depends on SB1_CACHE_ERROR
-
-config SB1_CERR_SPIN
- bool "Spin instead of running handler"
- depends on SB1_CACHE_ERROR
+config SB1_PASS_2_1_WORKAROUNDS
+ bool
+ depends on CPU_SB1 && CPU_SB1_PASS_2
+ default y
config 64BIT_PHYS_ADDR
bool "Support for 64-bit physical address space"
- depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && MIPS32
+ depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && MIPS32
config CPU_ADVANCED
bool "Override CPU Options"
@@ -927,7 +1163,7 @@ config CPU_HAS_LLDSCD
config CPU_HAS_WB
bool "Writeback Buffer available" if CPU_ADVANCED
- default y if !CPU_ADVANCED && (CPU_R3000 || CPU_VR41XX || CPU_TX39XX) && DECSTATION
+ default y if !CPU_ADVANCED && CPU_R3000 && MACH_DECSTATION
help
Say N here for slightly better performance. You must say Y here for
machines which require flushing of write buffers in software. Saying
@@ -954,11 +1190,11 @@ config CPU_HAS_SYNC
#
config HIGHMEM
bool "High Memory Support"
- depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_R10000) && !(BAGET_MIPS || DECSTATION)
+ depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_R10000) && !(BAGET_MIPS || MACH_DECSTATION)
config SMP
bool "Multi-Processing support"
- depends on SIBYTE_SB1xxx_SOC && SIBYTE_SB1250 && !SIBYTE_STANDALONE || SGI_IP27
+ depends on CPU_RM9000 || (SIBYTE_SB1250 && !SIBYTE_STANDALONE) || SGI_IP27
---help---
This enables support for systems with more than one CPU. If you have
a system with only one CPU, like most personal computers, say N. If
@@ -980,14 +1216,16 @@ config SMP
If you don't know what to do here, say N.
config NR_CPUS
- int "Maximum number of CPUs (2-32)"
- range 2 32
+ int "Maximum number of CPUs (2-64)"
+ range 2 64
depends on SMP
- default "32"
+ default "64" if SGI_IP27
+ default "2"
help
This allows you to specify the maximum number of CPUs which this
- kernel will support. The maximum supported value is 32 and the
- minimum value which makes sense is 2.
+ kernel will support. The maximum supported value is 32 for 32-bit
+ kernel and 64 for 64-bit kernels; the minimum value which makes
+ sense is 2.
This is purely to save memory - each supported CPU adds
approximately eight kilobytes to the kernel image.
@@ -1001,6 +1239,15 @@ config PREEMPT
This allows applications to run more reliably even when the system is
under load.
+config DEBUG_SPINLOCK
+ bool "Spinlock debugging"
+ depends on DEBUG_KERNEL
+ help
+ Say Y here and build SMP to catch missing spinlock initialization
+ and certain other kinds of spinlock errors commonly made. This is
+ best used in conjunction with the NMI watchdog so that spinlock
+ deadlocks are also debuggable.
+
config DEBUG_SPINLOCK_SLEEP
bool "Sleep-inside-spinlock checking"
help
@@ -1031,7 +1278,7 @@ menu "Bus options (PCI, PCMCIA, EISA, IS
config PCI
bool "Support for PCI controller"
- depends on MIPS_DB1000 || DDB5074 || DDB5476 || DDB5477 || HP_LASERJET || LASAT || MIPS_IVR || MIPS_ATLAS || MIPS_COBALT || MIPS_EV64120 || MIPS_EV96100 || MIPS_ITE8172 || MIPS_MALTA || MOMENCO_OCELOT || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MIPS_PB1000 || MIPS_PB1100 || MIPS_PB1500 || NEC_EAGLE || SGI_IP27 || SGI_IP32 || SIBYTE_SB1250 || SNI_RM200_PCI || TANBAC_TB0226 || TANBAC_TB0229 || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || VICTOR_MPC30X || ZAO_CAPCELLA
+ depends on MIPS_DB1000 || DDB5074 || DDB5476 || DDB5477 || HP_LASERJET || LASAT || MIPS_IVR || MIPS_ATLAS || MIPS_COBALT || MIPS_EV64120 || MIPS_EV96100 || MIPS_ITE8172 || MIPS_MALTA || MOMENCO_OCELOT || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MOMENCO_JAGUAR_ATX || MIPS_PB1000 || MIPS_PB1100 || SOC_AU1500 || NEC_EAGLE || SGI_IP27 || SGI_IP32 || SIBYTE_HAS_PCI || SNI_RM200_PCI || TANBAC_TB0226 || TANBAC_TB0229 || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || VICTOR_MPC30X || ZAO_CAPCELLA
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
@@ -1056,13 +1303,6 @@ config ISA
an older system, now being displaced by PCI; newer boards don't
support it. If you have ISA, say Y, otherwise N.
-#
-# The SCSI bits are needed to get the SCSI code to link ...
-#
-config GENERIC_ISA_DMA
- bool
- default y if ACER_PICA_61 || MIPS_MAGNUM_4000 || OLIVETTI_M700 || SNI_RM200_PCI || SCSI
-
config EISA
bool "EISA support"
depends on ISA && (SGI_IP22 || SNI_RM200_PCI)
@@ -1083,7 +1323,7 @@ source "drivers/eisa/Kconfig"
config TC
bool "TURBOchannel support"
- depends on DECSTATION
+ depends on MACH_DECSTATION
help
TurboChannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
processors. Documentation on writing device drivers for TurboChannel
@@ -1180,21 +1420,10 @@ config BINFMT_ELF32
config PM
bool "Power Management support (EXPERIMENTAL)"
- depends on EXPERIMENTAL && SOC_AU1X00
+ depends on EXPERIMENTAL && MACH_AU1X00
endmenu
-source "drivers/mtd/Kconfig"
-
-source "drivers/parport/Kconfig"
-
-source "drivers/pnp/Kconfig"
-
-source "drivers/base/Kconfig"
-
-source "drivers/block/Kconfig"
-
-
menu "MIPS initrd options"
depends on BLK_DEV_INITRD
@@ -1213,79 +1442,10 @@ config EMBEDDED_RAMDISK_IMAGE
endmenu
-source "drivers/ide/Kconfig"
-
-source "drivers/scsi/Kconfig"
-
-source "drivers/cdrom/Kconfig"
-
-source "drivers/md/Kconfig"
-
-source "drivers/message/fusion/Kconfig"
-
-source "drivers/ieee1394/Kconfig"
-
-source "drivers/message/i2o/Kconfig"
-
-source "net/Kconfig"
-
-source "drivers/isdn/Kconfig"
-
-source "drivers/telephony/Kconfig"
-
-#
-# input before char - char/joystick depends on it. As does USB.
-#
-source "drivers/input/Kconfig"
-
-source "drivers/char/Kconfig"
-
-#source drivers/misc/Config.in
-
-source "drivers/media/Kconfig"
+source "drivers/Kconfig"
source "fs/Kconfig"
-source "drivers/video/Kconfig"
-
-
-menu "Sound"
-
-config SOUND
- tristate "Sound card support"
- ---help---
- If you have a sound card in your computer, i.e. if it can say more
- than an occasional beep, say Y. Be sure to have all the information
- about your sound card and its configuration down (I/O port,
- interrupt and DMA channel), because you will be asked for it.
-
- You want to read the Sound-HOWTO, available from
- <http://www.tldp.org/docs.html#howto>. General information about
- the modular sound system is contained in the files
- <file:Documentation/sound/oss/Introduction>. The file
- <file:Documentation/sound/oss/README.OSS> contains some slightly
- outdated but still useful information as well.
-
- If you have a PnP sound card and you want to configure it at boot
- time using the ISA PnP tools (read
- <http://www.roestock.demon.co.uk/isapnptools/>), then you need to
- compile the sound card support as a module and load that module
- after the PnP configuration is finished. To do this, choose M here
- and read <file:Documentation/sound/oss/README.modules>; the module
- will be called soundcore.
-
- I'm told that even without a sound card, you can make your computer
- say more than an occasional beep, by programming the PC speaker.
- Kernel patches and supporting utilities to do that are in the pcsp
- package, available at <ftp://ftp.infradead.org/pub/pcsp/>.
-
-source "sound/Kconfig"
-
-endmenu
-
-source "drivers/usb/Kconfig"
-
-
menu "Kernel hacking"
config CROSSCOMPILE
@@ -1294,12 +1454,32 @@ config CROSSCOMPILE
Say Y here if you are compiling the kernel on a different
architecture than the one it is intended to run on.
+config CMDLINE
+ string "Default kernel command string"
+ default ""
+ help
+ On some platforms, there is currently no way for the boot loader to
+ pass arguments to the kernel. For these platforms, you can supply
+ some command-line options at build time by entering them here. In
+ other cases you can specify kernel args so that you don't have
+ to set them up in board prom initialization routines.
+
config DEBUG_KERNEL
bool "Kernel debugging"
+ config DEBUG_STACK_USAGE
+ bool "Enable stack utilization instrumentation"
+ depends on DEBUG_KERNEL
+ help
+ Enables the display of the minimum amount of free stack which each
+ task has ever had available in the sysrq-T and sysrq-P debug output.
+
+ This option will slow down process creation somewhat.
+
config KGDB
bool "Remote GDB kernel debugging"
depends on DEBUG_KERNEL
+ select DEBUG_INFO
help
If you say Y here, it will be possible to remotely debug the MIPS
kernel using gdb. This enlarges your kernel image disk size by
@@ -1315,6 +1495,23 @@ config GDB_CONSOLE
would like kernel messages to be formatted into GDB $O packets so
that GDB prints them as program output, say 'Y'.
+config DEBUG_INFO
+ bool "Compile the kernel with debug info"
+ depends on DEBUG_KERNEL && !KGDB
+ default y if KGDB
+ help
+ If you say Y here the resulting kernel image will include
+ debugging info resulting in a larger kernel image.
+ Say Y here only if you plan to use gdb to debug the kernel.
+ If you don't debug the kernel, you can say N.
+
+config SB1XXX_CORELIS
+ bool "Corelis Debugger"
+ depends on SIBYTE_SB1xxx_SOC && DEBUG_INFO
+ help
+ Select compile flags that produce code that can be processed by the
+ Corelis mksym utility and UDB Emulator.
+
config RUNTIME_DEBUG
bool "Enable run-time debugging"
depends on DEBUG_KERNEL
diff -puN arch/mips/kernel/binfmt_elfn32.c~mips-megapatch arch/mips/kernel/binfmt_elfn32.c
--- 25/arch/mips/kernel/binfmt_elfn32.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/binfmt_elfn32.c 2004-02-19 12:53:00.000000000 -0800
@@ -95,6 +95,19 @@ struct elf_prpsinfo32
#define elf_caddr_t u32
#define init_elf_binfmt init_elfn32_binfmt
+#define jiffies_to_timeval jiffies_to_compat_timeval
+static __inline__ void
+jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
+{
+ /*
+ * Convert jiffies to nanoseconds and seperate with
+ * one divide.
+ */
+ u64 nsec = (u64)jiffies * TICK_NSEC;
+ value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &value->tv_usec);
+ value->tv_usec /= NSEC_PER_USEC;
+}
+
#define ELF_CORE_EFLAGS EF_MIPS_ABI2
#undef CONFIG_BINFMT_ELF
diff -puN arch/mips/kernel/binfmt_elfo32.c~mips-megapatch arch/mips/kernel/binfmt_elfo32.c
--- 25/arch/mips/kernel/binfmt_elfo32.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/binfmt_elfo32.c 2004-02-19 12:53:00.000000000 -0800
@@ -97,6 +97,18 @@ struct elf_prpsinfo32
#define elf_caddr_t u32
#define init_elf_binfmt init_elf32_binfmt
+#define jiffies_to_timeval jiffies_to_compat_timeval
+static __inline__ void
+jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
+{
+ /*
+ * Convert jiffies to nanoseconds and seperate with
+ * one divide.
+ */
+ u64 nsec = (u64)jiffies * TICK_NSEC;
+ value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &value->tv_usec);
+ value->tv_usec /= NSEC_PER_USEC;
+}
#undef ELF_CORE_COPY_REGS
#define ELF_CORE_COPY_REGS(_dest,_regs) elf32_core_copy_regs(_dest,_regs);
diff -puN arch/mips/kernel/branch.c~mips-megapatch arch/mips/kernel/branch.c
--- 25/arch/mips/kernel/branch.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/branch.c 2004-02-19 12:53:00.000000000 -0800
@@ -11,6 +11,7 @@
#include <linux/signal.h>
#include <asm/branch.h>
#include <asm/cpu.h>
+#include <asm/cpu-features.h>
#include <asm/inst.h>
#include <asm/ptrace.h>
#include <asm/uaccess.h>
diff -puN arch/mips/kernel/cpu-bugs64.c~mips-megapatch arch/mips/kernel/cpu-bugs64.c
--- 25/arch/mips/kernel/cpu-bugs64.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/cpu-bugs64.c 2004-02-19 12:53:00.000000000 -0800
@@ -6,6 +6,7 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ptrace.h>
@@ -17,18 +18,40 @@
#include <asm/mipsregs.h>
#include <asm/system.h>
-static inline void check_mult_sh(void)
+static inline void align_mod(const int align, const int mod)
+{
+ asm volatile(
+ ".set push\n\t"
+ ".set noreorder\n\t"
+ ".balign %0\n\t"
+ ".rept %1\n\t"
+ "nop\n\t"
+ ".endr\n\t"
+ ".set pop"
+ :
+ : "n" (align), "n" (mod));
+}
+
+static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
+ const int align, const int mod)
{
unsigned long flags;
int m1, m2;
- long p, s, v;
+ long p, s, lv1, lv2, lw;
- printk("Checking for the multiply/shift bug... ");
+ /*
+ * We want the multiply and the shift to be isolated from the
+ * rest of the code to disable gcc optimizations. Hence the
+ * asm statements that execute nothing, but make gcc not know
+ * what the values of m1, m2 and s are and what lv2 and p are
+ * used for.
+ */
local_irq_save(flags);
/*
- * The following code leads to a wrong result of dsll32 when
- * executed on R4000 rev. 2.2 or 3.0.
+ * The following code leads to a wrong result of the first
+ * dsll32 when executed on R4000 rev. 2.2 or 3.0 (PRId
+ * 00000422 or 00000430, respectively).
*
* See "MIPS R4000PC/SC Errata, Processor Revision 2.2 and
* 3.0" by MIPS Technologies, Inc., errata #16 and #28 for
@@ -36,52 +59,97 @@ static inline void check_mult_sh(void)
* sigh... --macro
*/
asm volatile(
+ ""
+ : "=r" (m1), "=r" (m2), "=r" (s)
+ : "0" (5), "1" (8), "2" (5));
+ align_mod(align, mod);
+ /*
+ * The trailing nop is needed to fullfill the two-instruction
+ * requirement between reading hi/lo and staring a mult/div.
+ * Leaving it out may cause gas insert a nop itself breaking
+ * the desired alignment of the next chunk.
+ */
+ asm volatile(
".set push\n\t"
".set noat\n\t"
".set noreorder\n\t"
".set nomacro\n\t"
- "mult %1, %2\n\t"
- "dsll32 %0, %3, %4\n\t"
+ "mult %2, %3\n\t"
+ "dsll32 %0, %4, %5\n\t"
"mflo $0\n\t"
+ "dsll32 %1, %4, %5\n\t"
+ "nop\n\t"
".set pop"
- : "=r" (v)
- : "r" (5), "r" (8), "r" (5), "I" (0)
+ : "=&r" (lv1), "=r" (lw)
+ : "r" (m1), "r" (m2), "r" (s), "I" (0)
: "hi", "lo", "accum");
- local_irq_restore(flags);
-
- if (v == 5L << 32) {
- printk("no.\n");
- return;
- }
-
- printk("yes, workaround... ");
- local_irq_save(flags);
- /*
- * We want the multiply and the shift to be isolated from the
- * rest of the code to disable gcc optimizations. Hence the
- * asm statements that execute nothing, but make gcc not know
- * what the values of m1, m2 and s are and what v and p are
- * used for.
- *
- * We have to use single integers for m1 and m2 and a double
+ /* We have to use single integers for m1 and m2 and a double
* one for p to be sure the mulsidi3 gcc's RTL multiplication
* instruction has the workaround applied. Older versions of
- * gcc have correct mulsi3, but other multiplication variants
- * lack the workaround.
+ * gcc have correct umulsi3 and mulsi3, but other
+ * multiplication variants lack the workaround.
*/
asm volatile(
""
: "=r" (m1), "=r" (m2), "=r" (s)
- : "0" (5), "1" (8), "2" (5));
+ : "0" (m1), "1" (m2), "2" (s));
+ align_mod(align, mod);
p = m1 * m2;
- v = s << 32;
+ lv2 = s << 32;
asm volatile(
""
- : "=r" (v)
- : "0" (v), "r" (p));
+ : "=r" (lv2)
+ : "0" (lv2), "r" (p));
local_irq_restore(flags);
- if (v == 5L << 32) {
+ *v1 = lv1;
+ *v2 = lv2;
+ *w = lw;
+}
+
+static inline void check_mult_sh(void)
+{
+ long v1[8], v2[8], w[8];
+ int bug, fix, i;
+
+ printk("Checking for the multiply/shift bug... ");
+
+ /*
+ * Testing discovered false negatives for certain code offsets
+ * into cache lines. Hence we test all possible offsets for
+ * the worst assumption of an R4000 I-cache line width of 32
+ * bytes.
+ *
+ * We can't use a loop as alignment directives need to be
+ * immediates.
+ */
+ mult_sh_align_mod(&v1[0], &v2[0], &w[0], 32, 0);
+ mult_sh_align_mod(&v1[1], &v2[1], &w[1], 32, 1);
+ mult_sh_align_mod(&v1[2], &v2[2], &w[2], 32, 2);
+ mult_sh_align_mod(&v1[3], &v2[3], &w[3], 32, 3);
+ mult_sh_align_mod(&v1[4], &v2[4], &w[4], 32, 4);
+ mult_sh_align_mod(&v1[5], &v2[5], &w[5], 32, 5);
+ mult_sh_align_mod(&v1[6], &v2[6], &w[6], 32, 6);
+ mult_sh_align_mod(&v1[7], &v2[7], &w[7], 32, 7);
+
+ bug = 0;
+ for (i = 0; i < 8; i++)
+ if (v1[i] != w[i])
+ bug = 1;
+
+ if (bug == 0) {
+ printk("no.\n");
+ return;
+ }
+
+ printk("yes, workaround... ");
+
+ fix = 1;
+ for (i = 0; i < 8; i++)
+ if (v2[i] != w[i])
+ fix = 0;
+
+ if (fix == 1) {
printk("yes.\n");
return;
}
@@ -117,7 +185,8 @@ static inline void check_daddi(void)
handler = set_except_vector(12, handle_daddi_ov);
/*
* The following code fails to trigger an overflow exception
- * when executed on R4000 rev. 2.2 or 3.0.
+ * when executed on R4000 rev. 2.2 or 3.0 (PRId 00000422 or
+ * 00000430, respectively).
*
* See "MIPS R4000PC/SC Errata, Processor Revision 2.2 and
* 3.0" by MIPS Technologies, Inc., erratum #23 for details.
@@ -177,15 +246,16 @@ static inline void check_daddiu(void)
/*
* The following code leads to a wrong result of daddiu when
- * executed on R4400 rev. 1.0.
+ * executed on R4400 rev. 1.0 (PRId 00000440).
*
* See "MIPS R4400PC/SC Errata, Processor Revision 1.0" by
* MIPS Technologies, Inc., erratum #7 for details.
*
* According to "MIPS R4000PC/SC Errata, Processor Revision
* 2.2 and 3.0" by MIPS Technologies, Inc., erratum #41 this
- * problem affects R4000 rev. 2.2 and 3.0, too. Testing
- * failed to trigger it so far.
+ * problem affects R4000 rev. 2.2 and 3.0 (PRId 00000422 and
+ * 00000430, respectively), too. Testing failed to trigger it
+ * so far.
*
* I got no permission to duplicate the errata here, sigh...
* --macro
diff -puN arch/mips/kernel/cpu-probe.c~mips-megapatch arch/mips/kernel/cpu-probe.c
--- 25/arch/mips/kernel/cpu-probe.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/cpu-probe.c 2004-02-19 12:53:00.000000000 -0800
@@ -9,6 +9,7 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ptrace.h>
@@ -89,12 +90,15 @@ static inline void check_wait(void)
case CPU_R5000:
case CPU_NEVADA:
case CPU_RM7000:
+/* case CPU_RM9000: */
case CPU_TX49XX:
case CPU_4KC:
case CPU_4KEC:
case CPU_4KSC:
case CPU_5KC:
/* case CPU_20KC:*/
+ case CPU_24K:
+ case CPU_25KF:
cpu_wait = r4k_wait;
printk(" available.\n");
break;
@@ -160,350 +164,420 @@ static inline int __cpu_has_fpu(void)
}
#define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4KTLB \
- | MIPS_CPU_COUNTER | MIPS_CPU_CACHE_CDEX)
+ | MIPS_CPU_COUNTER)
-__init void cpu_probe(void)
+static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
{
- struct cpuinfo_mips *c = ¤t_cpu_data;
- unsigned long config0 = read_c0_config();
- unsigned long config1;
-
- c->processor_id = PRID_IMP_UNKNOWN;
- c->fpu_id = FPIR_IMP_NONE;
- c->cputype = CPU_UNKNOWN;
-
- if (config0 & (1 << 31)) {
- /* MIPS32 or MIPS64 compliant CPU. Read Config 1 register. */
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_4KTLB | MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
- MIPS_CPU_LLSC;
- config1 = read_c0_config1();
- if (config1 & (1 << 3))
- c->options |= MIPS_CPU_WATCH;
- if (config1 & (1 << 2))
- c->options |= MIPS_CPU_MIPS16;
- if (config1 & (1 << 1))
- c->options |= MIPS_CPU_EJTAG;
- if (config1 & 1) {
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_R2000:
+ c->cputype = CPU_R2000;
+ c->isa_level = MIPS_CPU_ISA_I;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX |
+ MIPS_CPU_LLSC;
+ if (__cpu_has_fpu())
c->options |= MIPS_CPU_FPU;
- c->options |= MIPS_CPU_32FPR;
- }
- c->scache.flags = MIPS_CACHE_NOT_PRESENT;
-
- c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
- }
-
- c->processor_id = read_c0_prid();
- switch (c->processor_id & 0xff0000) {
- case PRID_COMP_LEGACY:
- switch (c->processor_id & 0xff00) {
- case PRID_IMP_R2000:
- c->cputype = CPU_R2000;
- c->isa_level = MIPS_CPU_ISA_I;
- c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX |
- MIPS_CPU_LLSC;
- if (__cpu_has_fpu())
- c->options |= MIPS_CPU_FPU;
- c->tlbsize = 64;
- break;
- case PRID_IMP_R3000:
- if ((c->processor_id & 0xff) == PRID_REV_R3000A)
- if (cpu_has_confreg())
- c->cputype = CPU_R3081E;
- else
- c->cputype = CPU_R3000A;
+ c->tlbsize = 64;
+ break;
+ case PRID_IMP_R3000:
+ if ((c->processor_id & 0xff) == PRID_REV_R3000A)
+ if (cpu_has_confreg())
+ c->cputype = CPU_R3081E;
else
- c->cputype = CPU_R3000;
- c->isa_level = MIPS_CPU_ISA_I;
- c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX |
- MIPS_CPU_LLSC;
- if (__cpu_has_fpu())
- c->options |= MIPS_CPU_FPU;
- c->tlbsize = 64;
- break;
- case PRID_IMP_R4000:
+ c->cputype = CPU_R3000A;
+ else
+ c->cputype = CPU_R3000;
+ c->isa_level = MIPS_CPU_ISA_I;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_NOFPUEX |
+ MIPS_CPU_LLSC;
+ if (__cpu_has_fpu())
+ c->options |= MIPS_CPU_FPU;
+ c->tlbsize = 64;
+ break;
+ case PRID_IMP_R4000:
+ if (read_c0_config() & CONF_SC) {
+ if ((c->processor_id & 0xff) >= PRID_REV_R4400)
+ c->cputype = CPU_R4400PC;
+ else
+ c->cputype = CPU_R4000PC;
+ } else {
if ((c->processor_id & 0xff) >= PRID_REV_R4400)
c->cputype = CPU_R4400SC;
else
c->cputype = CPU_R4000SC;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_WATCH | MIPS_CPU_VCE |
- MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_VR41XX:
- switch (c->processor_id & 0xf0) {
-#ifndef CONFIG_VR4181
- case PRID_REV_VR4111:
- c->cputype = CPU_VR4111;
- break;
-#else
- case PRID_REV_VR4181:
- c->cputype = CPU_VR4181;
- break;
-#endif
- case PRID_REV_VR4121:
- c->cputype = CPU_VR4121;
- break;
- case PRID_REV_VR4122:
- if ((c->processor_id & 0xf) < 0x3)
- c->cputype = CPU_VR4122;
- else
- c->cputype = CPU_VR4181A;
- break;
- case PRID_REV_VR4131:
- c->cputype = CPU_VR4131;
- break;
- default:
- printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
- c->cputype = CPU_VR41XX;
- break;
- }
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS;
- c->tlbsize = 32;
- break;
- case PRID_IMP_R4300:
- c->cputype = CPU_R4300;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- c->tlbsize = 32;
- break;
- case PRID_IMP_R4600:
- c->cputype = CPU_R4600;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- #if 0
- case PRID_IMP_R4650:
- /*
- * This processor doesn't have an MMU, so it's not
- * "real easy" to run Linux on it. It is left purely
- * for documentation. Commented out because it shares
- * it's c0_prid id number with the TX3900.
- */
- c->cputype = CPU_R4650;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- #endif
- case PRID_IMP_TX39:
- c->isa_level = MIPS_CPU_ISA_I;
- c->options = MIPS_CPU_TLB;
-
- if ((c->processor_id & 0xf0) ==
- (PRID_REV_TX3927 & 0xf0)) {
- c->cputype = CPU_TX3927;
- c->tlbsize = 64;
- } else {
- switch (c->processor_id & 0xff) {
- case PRID_REV_TX3912:
- c->cputype = CPU_TX3912;
- c->tlbsize = 32;
- break;
- case PRID_REV_TX3922:
- c->cputype = CPU_TX3922;
- c->tlbsize = 64;
- break;
- default:
- c->cputype = CPU_UNKNOWN;
- break;
- }
- }
- break;
- case PRID_IMP_R4700:
- c->cputype = CPU_R4700;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_TX49:
- c->cputype = CPU_TX49XX;
- c->isa_level = MIPS_CPU_ISA_III;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_R5000:
- c->cputype = CPU_R5000;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_R5432:
- c->cputype = CPU_R5432;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_WATCH | MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_R5500:
- c->cputype = CPU_R5500;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_WATCH | MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_NEVADA:
- c->cputype = CPU_NEVADA;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_DIVEC | MIPS_CPU_LLSC;
- c->tlbsize = 48;
- break;
- case PRID_IMP_R6000:
- c->cputype = CPU_R6000;
- c->isa_level = MIPS_CPU_ISA_II;
- c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
- MIPS_CPU_LLSC;
- c->tlbsize = 32;
- break;
- case PRID_IMP_R6000A:
- c->cputype = CPU_R6000A;
- c->isa_level = MIPS_CPU_ISA_II;
- c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
- MIPS_CPU_LLSC;
- c->tlbsize = 32;
- break;
- case PRID_IMP_RM7000:
- c->cputype = CPU_RM7000;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- /*
- * Undocumented RM7000: Bit 29 in the info register of
- * the RM7000 v2.0 indicates if the TLB has 48 or 64
- * entries.
- *
- * 29 1 => 64 entry JTLB
- * 0 => 48 entry JTLB
- */
- c->tlbsize = (read_c0_info() & (1 << 29)) ? 64 : 48;
- break;
- case PRID_IMP_R8000:
- c->cputype = CPU_R8000;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_LLSC;
- c->tlbsize = 384; /* has weird TLB: 3-way x 128 */
- break;
- case PRID_IMP_R10000:
- c->cputype = CPU_R10000;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
- MIPS_CPU_LLSC;
- c->tlbsize = 64;
- break;
- case PRID_IMP_R12000:
- c->cputype = CPU_R12000;
- c->isa_level = MIPS_CPU_ISA_IV;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_FPU | MIPS_CPU_32FPR |
- MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
- MIPS_CPU_LLSC;
- c->tlbsize = 64;
- break;
- default:
- c->cputype = CPU_UNKNOWN;
- break;
}
+
+ c->isa_level = MIPS_CPU_ISA_III;
+ c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_WATCH | MIPS_CPU_VCE |
+ MIPS_CPU_LLSC;
+ c->tlbsize = 48;
break;
- case PRID_COMP_MIPS:
- switch (c->processor_id & 0xff00) {
- case PRID_IMP_4KC:
- c->cputype = CPU_4KC;
- c->isa_level = MIPS_CPU_ISA_M32;
+ case PRID_IMP_VR41XX:
+ switch (c->processor_id & 0xf0) {
+#ifndef CONFIG_VR4181
+ case PRID_REV_VR4111:
+ c->cputype = CPU_VR4111;
break;
- case PRID_IMP_4KEC:
- c->cputype = CPU_4KEC;
- c->isa_level = MIPS_CPU_ISA_M32;
+#else
+ case PRID_REV_VR4181:
+ c->cputype = CPU_VR4181;
break;
- case PRID_IMP_4KSC:
- c->cputype = CPU_4KSC;
- c->isa_level = MIPS_CPU_ISA_M32;
+#endif
+ case PRID_REV_VR4121:
+ c->cputype = CPU_VR4121;
break;
- case PRID_IMP_5KC:
- c->cputype = CPU_5KC;
- c->isa_level = MIPS_CPU_ISA_M64;
+ case PRID_REV_VR4122:
+ if ((c->processor_id & 0xf) < 0x3)
+ c->cputype = CPU_VR4122;
+ else
+ c->cputype = CPU_VR4181A;
break;
- case PRID_IMP_20KC:
- c->cputype = CPU_20KC;
- c->isa_level = MIPS_CPU_ISA_M64;
+ case PRID_REV_VR4130:
+ if ((c->processor_id & 0xf) < 0x4)
+ c->cputype = CPU_VR4131;
+ else
+ c->cputype = CPU_VR4133;
break;
default:
- c->cputype = CPU_UNKNOWN;
- break;
+ printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
+ c->cputype = CPU_VR41XX;
+ break;
}
+ c->isa_level = MIPS_CPU_ISA_III;
+ c->options = R4K_OPTS;
+ c->tlbsize = 32;
break;
- case PRID_COMP_ALCHEMY:
- switch (c->processor_id & 0xff00) {
- case PRID_IMP_AU1_REV1:
- case PRID_IMP_AU1_REV2:
- switch ((c->processor_id >> 24) & 0xff) {
- case 0:
- c->cputype = CPU_AU1000;
- break;
- case 1:
- c->cputype = CPU_AU1500;
+ case PRID_IMP_R4300:
+ c->cputype = CPU_R4300;
+ c->isa_level = MIPS_CPU_ISA_III;
+ c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_LLSC;
+ c->tlbsize = 32;
+ break;
+ case PRID_IMP_R4600:
+ c->cputype = CPU_R4600;
+ c->isa_level = MIPS_CPU_ISA_III;
+ c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC;
+ c->tlbsize = 48;
+ break;
+ #if 0
+ case PRID_IMP_R4650:
+ /*
+ * This processor doesn't have an MMU, so it's not
+ * "real easy" to run Linux on it. It is left purely
+ * for documentation. Commented out because it shares
+ * it's c0_prid id number with the TX3900.
+ */
+ c->cputype = CPU_R4650;
+ c->isa_level = MIPS_CPU_ISA_III;
+ c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC;
+ c->tlbsize = 48;
+ break;
+ #endif
+ case PRID_IMP_TX39:
+ c->isa_level = MIPS_CPU_ISA_I;
+ c->options = MIPS_CPU_TLB;
+
+ if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) {
+ c->cputype = CPU_TX3927;
+ c->tlbsize = 64;
+ } else {
+ switch (c->processor_id & 0xff) {
+ case PRID_REV_TX3912:
+ c->cputype = CPU_TX3912;
+ c->tlbsize = 32;
break;
- case 2:
- c->cputype = CPU_AU1100;
+ case PRID_REV_TX3922:
+ c->cputype = CPU_TX3922;
+ c->tlbsize = 64;
break;
default:
- panic("Unknown Au Core!");
+ c->cputype = CPU_UNKNOWN;
break;
}
- c->isa_level = MIPS_CPU_ISA_M32;
- break;
- default:
- c->cputype = CPU_UNKNOWN;
- break;
}
break;
- case PRID_COMP_SIBYTE:
- switch (c->processor_id & 0xff00) {
- case PRID_IMP_SB1:
- c->cputype = CPU_SB1;
- c->isa_level = MIPS_CPU_ISA_M64;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
- MIPS_CPU_MCHECK | MIPS_CPU_EJTAG |
- MIPS_CPU_WATCH | MIPS_CPU_LLSC;
-#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
- /* FPU in pass1 is known to have issues. */
+ case PRID_IMP_R4700:
+ c->cputype = CPU_R4700;
+ c->isa_level = MIPS_CPU_ISA_III;
+ c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_LLSC;
+ c->tlbsize = 48;
+ break;
+ case PRID_IMP_TX49:
+ c->cputype = CPU_TX49XX;
+ c->isa_level = MIPS_CPU_ISA_III;
+ c->options = R4K_OPTS | MIPS_CPU_LLSC;
+ if (!(c->processor_id & 0x08))
c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR;
-#endif
+ c->tlbsize = 48;
+ break;
+ case PRID_IMP_R5000:
+ c->cputype = CPU_R5000;
+ c->isa_level = MIPS_CPU_ISA_IV;
+ c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_LLSC;
+ c->tlbsize = 48;
+ break;
+ case PRID_IMP_R5432:
+ c->cputype = CPU_R5432;
+ c->isa_level = MIPS_CPU_ISA_IV;
+ c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_WATCH | MIPS_CPU_LLSC;
+ c->tlbsize = 48;
+ break;
+ case PRID_IMP_R5500:
+ c->cputype = CPU_R5500;
+ c->isa_level = MIPS_CPU_ISA_IV;
+ c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_WATCH | MIPS_CPU_LLSC;
+ c->tlbsize = 48;
+ break;
+ case PRID_IMP_NEVADA:
+ c->cputype = CPU_NEVADA;
+ c->isa_level = MIPS_CPU_ISA_IV;
+ c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_DIVEC | MIPS_CPU_LLSC;
+ c->tlbsize = 48;
+ break;
+ case PRID_IMP_R6000:
+ c->cputype = CPU_R6000;
+ c->isa_level = MIPS_CPU_ISA_II;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
+ MIPS_CPU_LLSC;
+ c->tlbsize = 32;
+ break;
+ case PRID_IMP_R6000A:
+ c->cputype = CPU_R6000A;
+ c->isa_level = MIPS_CPU_ISA_II;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_FPU |
+ MIPS_CPU_LLSC;
+ c->tlbsize = 32;
+ break;
+ case PRID_IMP_RM7000:
+ c->cputype = CPU_RM7000;
+ c->isa_level = MIPS_CPU_ISA_IV;
+ c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_LLSC;
+ /*
+ * Undocumented RM7000: Bit 29 in the info register of
+ * the RM7000 v2.0 indicates if the TLB has 48 or 64
+ * entries.
+ *
+ * 29 1 => 64 entry JTLB
+ * 0 => 48 entry JTLB
+ */
+ c->tlbsize = (read_c0_info() & (1 << 29)) ? 64 : 48;
+ break;
+ case PRID_IMP_RM9000:
+ c->cputype = CPU_RM9000;
+ c->isa_level = MIPS_CPU_ISA_IV;
+ c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_LLSC;
+ /*
+ * Bit 29 in the info register of the RM9000
+ * indicates if the TLB has 48 or 64 entries.
+ *
+ * 29 1 => 64 entry JTLB
+ * 0 => 48 entry JTLB
+ */
+ c->tlbsize = (read_c0_info() & (1 << 29)) ? 64 : 48;
+ break;
+ case PRID_IMP_R8000:
+ c->cputype = CPU_R8000;
+ c->isa_level = MIPS_CPU_ISA_IV;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+ MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_LLSC;
+ c->tlbsize = 384; /* has weird TLB: 3-way x 128 */
+ break;
+ case PRID_IMP_R10000:
+ c->cputype = CPU_R10000;
+ c->isa_level = MIPS_CPU_ISA_IV;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+ MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
+ MIPS_CPU_LLSC;
+ c->tlbsize = 64;
+ break;
+ case PRID_IMP_R12000:
+ c->cputype = CPU_R12000;
+ c->isa_level = MIPS_CPU_ISA_IV;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+ MIPS_CPU_FPU | MIPS_CPU_32FPR |
+ MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
+ MIPS_CPU_LLSC;
+ c->tlbsize = 64;
+ break;
+ default:
+ c->cputype = CPU_UNKNOWN;
+ break;
+ }
+}
+
+static inline void decode_config1(struct cpuinfo_mips *c)
+{
+ unsigned long config0 = read_c0_config();
+ unsigned long config1;
+
+ if ((config0 & (1 << 31)) == 0)
+ return; /* actually wort a panic() */
+
+ /* MIPS32 or MIPS64 compliant CPU. Read Config 1 register. */
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+ MIPS_CPU_4KTLB | MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
+ MIPS_CPU_LLSC | MIPS_CPU_MCHECK;
+ config1 = read_c0_config1();
+ if (config1 & (1 << 3))
+ c->options |= MIPS_CPU_WATCH;
+ if (config1 & (1 << 2))
+ c->options |= MIPS_CPU_MIPS16;
+ if (config1 & (1 << 1))
+ c->options |= MIPS_CPU_EJTAG;
+ if (config1 & 1) {
+ c->options |= MIPS_CPU_FPU;
+ c->options |= MIPS_CPU_32FPR;
+ }
+ c->scache.flags = MIPS_CACHE_NOT_PRESENT;
+
+ c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
+}
+
+static inline void cpu_probe_mips(struct cpuinfo_mips *c)
+{
+ decode_config1(c);
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_4KC:
+ c->cputype = CPU_4KC;
+ c->isa_level = MIPS_CPU_ISA_M32;
+ break;
+ case PRID_IMP_4KEC:
+ c->cputype = CPU_4KEC;
+ c->isa_level = MIPS_CPU_ISA_M32;
+ break;
+ case PRID_IMP_4KSC:
+ c->cputype = CPU_4KSC;
+ c->isa_level = MIPS_CPU_ISA_M32;
+ break;
+ case PRID_IMP_5KC:
+ c->cputype = CPU_5KC;
+ c->isa_level = MIPS_CPU_ISA_M64;
+ break;
+ case PRID_IMP_20KC:
+ c->cputype = CPU_20KC;
+ c->isa_level = MIPS_CPU_ISA_M64;
+ break;
+ case PRID_IMP_24K:
+ c->cputype = CPU_24K;
+ c->isa_level = MIPS_CPU_ISA_M32;
+ break;
+ case PRID_IMP_25KF:
+ c->cputype = CPU_25KF;
+ c->isa_level = MIPS_CPU_ISA_M64;
+ /* Probe for L2 cache */
+ c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
+ break;
+ default:
+ c->cputype = CPU_UNKNOWN;
+ break;
+ }
+}
+
+static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
+{
+ decode_config1(c);
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_AU1_REV1:
+ case PRID_IMP_AU1_REV2:
+ switch ((c->processor_id >> 24) & 0xff) {
+ case 0:
+ c->cputype = CPU_AU1000;
+ break;
+ case 1:
+ c->cputype = CPU_AU1500;
+ break;
+ case 2:
+ c->cputype = CPU_AU1100;
break;
default:
- c->cputype = CPU_UNKNOWN;
+ panic("Unknown Au Core!");
break;
}
+ c->isa_level = MIPS_CPU_ISA_M32;
+ break;
+ default:
+ c->cputype = CPU_UNKNOWN;
+ break;
+ }
+}
+
+static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
+{
+ decode_config1(c);
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_SB1:
+ c->cputype = CPU_SB1;
+ c->isa_level = MIPS_CPU_ISA_M64;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+ MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
+ MIPS_CPU_MCHECK | MIPS_CPU_EJTAG |
+ MIPS_CPU_WATCH | MIPS_CPU_LLSC;
+#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
+ /* FPU in pass1 is known to have issues. */
+ c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR;
+#endif
+ break;
+ default:
+ c->cputype = CPU_UNKNOWN;
+ break;
+ }
+}
+
+static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c)
+{
+ decode_config1(c);
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_SR71000:
+ c->cputype = CPU_SR71000;
+ c->isa_level = MIPS_CPU_ISA_M64;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+ MIPS_CPU_4KTLB | MIPS_CPU_FPU |
+ MIPS_CPU_COUNTER | MIPS_CPU_MCHECK;
+ c->scache.ways = 8;
+ c->tlbsize = 64;
+ break;
+ default:
+ c->cputype = CPU_UNKNOWN;
+ break;
+ }
+}
+
+__init void cpu_probe(void)
+{
+ struct cpuinfo_mips *c = ¤t_cpu_data;
+
+ c->processor_id = PRID_IMP_UNKNOWN;
+ c->fpu_id = FPIR_IMP_NONE;
+ c->cputype = CPU_UNKNOWN;
+
+ c->processor_id = read_c0_prid();
+ switch (c->processor_id & 0xff0000) {
+
+ case PRID_COMP_LEGACY:
+ cpu_probe_legacy(c);
+ break;
+ case PRID_COMP_MIPS:
+ cpu_probe_mips(c);
+ break;
+ case PRID_COMP_ALCHEMY:
+ cpu_probe_alchemy(c);
+ break;
+ case PRID_COMP_SIBYTE:
+ cpu_probe_sibyte(c);
break;
case PRID_COMP_SANDCRAFT:
- switch (c->processor_id & 0xff00) {
- case PRID_IMP_SR71000:
- c->cputype = CPU_SR71000;
- c->isa_level = MIPS_CPU_ISA_M64;
- c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
- MIPS_CPU_4KTLB | MIPS_CPU_FPU |
- MIPS_CPU_COUNTER | MIPS_CPU_MCHECK;
- c->scache.ways = 8;
- c->tlbsize = 64;
- break;
- default:
- c->cputype = CPU_UNKNOWN;
- break;
- }
+ cpu_probe_sandcraft(c);
break;
default:
c->cputype = CPU_UNKNOWN;
diff -puN arch/mips/kernel/entry.S~mips-megapatch arch/mips/kernel/entry.S
--- 25/arch/mips/kernel/entry.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/entry.S 2004-02-19 12:53:00.000000000 -0800
@@ -52,9 +52,10 @@ ENTRY(resume_kernel)
need_resched:
LONG_L t0, TI_FLAGS($28)
andi t1, t0, _TIF_NEED_RESCHED
- beqz restore_all
- if (in_exception_path)
- goto restore_all;
+ beqz t1, restore_all
+ LONG_L t0, PT_STATUS(sp) # Interrupts off?
+ andi t0, 1
+ beqz t0, restore_all
li t0, PREEMPT_ACTIVE
sw t0, TI_PRE_COUNT($28)
local_irq_enable t0
@@ -64,7 +65,7 @@ need_resched:
#endif
FEXPORT(ret_from_fork)
- jal schedule_tail
+ jal schedule_tail # a0 = task_t *prev
FEXPORT(syscall_exit)
local_irq_disable # make sure need_resched and
@@ -75,14 +76,19 @@ FEXPORT(syscall_exit)
and t0, a2, t0
bnez t0, syscall_exit_work
-FEXPORT(restore_all)
+FEXPORT(restore_all) # restore full frame
.set noat
- RESTORE_ALL_AND_RET
+ RESTORE_TEMP
+ RESTORE_AT
+ RESTORE_STATIC
+FEXPORT(restore_partial) # restore partial frame
+ RESTORE_SOME
+ RESTORE_SP_AND_RET
.set at
FEXPORT(work_pending)
andi t0, a2, _TIF_NEED_RESCHED
- bnez t0, work_notifysig
+ beqz t0, work_notifysig
work_resched:
jal schedule
@@ -103,11 +109,13 @@ work_notifysig: # deal with pending s
jal do_notify_resume # a2 already loaded
j restore_all
+FEXPORT(syscall_exit_work_partial)
+ SAVE_STATIC
FEXPORT(syscall_exit_work)
LONG_L t0, TI_FLAGS($28)
li t1, _TIF_SYSCALL_TRACE
and t0, t1
- bnez t0, work_pending # trace bit is set
+ beqz t0, work_pending # trace bit is set
local_irq_enable # could let do_syscall_trace()
# call schedule() instead
jal do_syscall_trace
diff -puN arch/mips/kernel/gdb-low.S~mips-megapatch arch/mips/kernel/gdb-low.S
--- 25/arch/mips/kernel/gdb-low.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/gdb-low.S 2004-02-19 12:53:00.000000000 -0800
@@ -62,7 +62,7 @@
1:
move k0, sp
subu sp, k1, GDB_FR_SIZE*2 # see comment above
- LONG_S $26, GDB_FR_REG29(sp)
+ LONG_S k0, GDB_FR_REG29(sp)
LONG_S $2, GDB_FR_REG2(sp)
/*
@@ -90,7 +90,7 @@
LONG_S $1, GDB_FR_REG1(sp)
/* v0 already saved */
LONG_S $3, GDB_FR_REG3(sp)
- LONG_S $3, GDB_FR_REG4(sp)
+ LONG_S $4, GDB_FR_REG4(sp)
LONG_S $5, GDB_FR_REG5(sp)
LONG_S $6, GDB_FR_REG6(sp)
LONG_S $7, GDB_FR_REG7(sp)
@@ -296,7 +296,7 @@
LONG_L v0, GDB_FR_HI(sp)
LONG_L v1, GDB_FR_LO(sp)
mthi v0
- mtlo v0
+ mtlo v1
LONG_L $31, GDB_FR_REG31(sp)
LONG_L $30, GDB_FR_REG30(sp)
LONG_L $28, GDB_FR_REG28(sp)
diff -puN arch/mips/kernel/gdb-stub.c~mips-megapatch arch/mips/kernel/gdb-stub.c
--- 25/arch/mips/kernel/gdb-stub.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/gdb-stub.c 2004-02-19 12:53:00.000000000 -0800
@@ -134,6 +134,7 @@
#include <linux/reboot.h>
#include <asm/asm.h>
+#include <asm/cacheflush.h>
#include <asm/mipsregs.h>
#include <asm/pgtable.h>
#include <asm/system.h>
@@ -233,7 +234,7 @@ static void getpacket(char *buffer)
* now, read until a # or end of buffer is found
*/
while (count < BUFMAX) {
- ch = getDebugChar() & 0x7f;
+ ch = getDebugChar();
if (ch == '#')
break;
checksum = checksum + ch;
@@ -339,15 +340,22 @@ static unsigned char *mem2hex(char *mem,
* may_fault is non-zero if we are reading from arbitrary memory, but is currently
* not used.
*/
-static char *hex2mem(char *buf, char *mem, int count, int may_fault)
+static char *hex2mem(char *buf, char *mem, int count, int binary, int may_fault)
{
int i;
unsigned char ch;
for (i=0; i<count; i++)
{
- ch = hex(*buf++) << 4;
- ch |= hex(*buf++);
+ if (binary) {
+ ch = *buf++;
+ if (ch == 0x7d)
+ ch = 0x20 ^ *buf++;
+ }
+ else {
+ ch = hex(*buf++) << 4;
+ ch |= hex(*buf++);
+ }
if (kgdb_write_byte(ch, mem++) != 0)
return 0;
}
@@ -414,10 +422,10 @@ void restore_debug_traps(void)
struct hard_trap_info *ht;
unsigned long flags;
- save_and_cli(flags);
+ local_irq_save(flags);
for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
set_except_vector(ht->tt, saved_vectors[ht->tt]);
- restore_flags(flags);
+ local_irq_restore(flags);
}
/*
@@ -669,6 +677,7 @@ void handle_exception (struct gdb_regs *
char *ptr;
unsigned long *stack;
int i;
+ int bflag = 0;
kgdb_started = 1;
@@ -695,7 +704,7 @@ void handle_exception (struct gdb_regs *
/*
* acquire the CPU spinlocks
*/
- for (i=0; i< smp_num_cpus; i++)
+ for (i = num_online_cpus()-1; i >= 0; i--)
if (spin_trylock(&kgdb_cpulock[i]) == 0)
panic("kgdb: couldn't get cpulock %d\n", i);
@@ -817,17 +826,17 @@ void handle_exception (struct gdb_regs *
case 'G':
{
ptr = &input_buffer[1];
- hex2mem(ptr, (char *)®s->reg0, 32*sizeof(long), 0);
+ hex2mem(ptr, (char *)®s->reg0, 32*sizeof(long), 0, 0);
ptr += 32*(2*sizeof(long));
- hex2mem(ptr, (char *)®s->cp0_status, 6*sizeof(long), 0);
+ hex2mem(ptr, (char *)®s->cp0_status, 6*sizeof(long), 0, 0);
ptr += 6*(2*sizeof(long));
- hex2mem(ptr, (char *)®s->fpr0, 32*sizeof(long), 0);
+ hex2mem(ptr, (char *)®s->fpr0, 32*sizeof(long), 0, 0);
ptr += 32*(2*sizeof(long));
- hex2mem(ptr, (char *)®s->cp1_fsr, 2*sizeof(long), 0);
+ hex2mem(ptr, (char *)®s->cp1_fsr, 2*sizeof(long), 0, 0);
ptr += 2*(2*sizeof(long));
- hex2mem(ptr, (char *)®s->frame_ptr, 2*sizeof(long), 0);
+ hex2mem(ptr, (char *)®s->frame_ptr, 2*sizeof(long), 0, 0);
ptr += 2*(2*sizeof(long));
- hex2mem(ptr, (char *)®s->cp0_index, 16*sizeof(long), 0);
+ hex2mem(ptr, (char *)®s->cp0_index, 16*sizeof(long), 0, 0);
strcpy(output_buffer,"OK");
}
break;
@@ -849,6 +858,13 @@ void handle_exception (struct gdb_regs *
break;
/*
+ * XAA..AA,LLLL: Write LLLL escaped binary bytes at address AA.AA
+ */
+ case 'X':
+ bflag = 1;
+ /* fall through */
+
+ /*
* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK
*/
case 'M':
@@ -858,7 +874,7 @@ void handle_exception (struct gdb_regs *
&& *ptr++ == ','
&& hexToInt(&ptr, &length)
&& *ptr++ == ':') {
- if (hex2mem(ptr, (char *)addr, length, 1))
+ if (hex2mem(ptr, (char *)addr, length, bflag, 1))
strcpy(output_buffer, "OK");
else
strcpy(output_buffer, "E03");
@@ -963,7 +979,7 @@ finish_kgdb:
exit_kgdb_exception:
/* release locks so other CPUs can go */
- for (i=0; i < smp_num_cpus; i++)
+ for (i = num_online_cpus()-1; i >= 0; i--)
spin_unlock(&kgdb_cpulock[i]);
spin_unlock(&kgdb_lock);
@@ -985,7 +1001,7 @@ void breakpoint(void)
__asm__ __volatile__(
".globl breakinst\n\t"
".set\tnoreorder\n\t"
- "nop\n\t"
+ "nop\n"
"breakinst:\tbreak\n\t"
"nop\n\t"
".set\treorder"
@@ -998,7 +1014,7 @@ void async_breakpoint(void)
__asm__ __volatile__(
".globl async_breakinst\n\t"
".set\tnoreorder\n\t"
- "nop\n\t"
+ "nop\n"
"async_breakinst:\tbreak\n\t"
"nop\n\t"
".set\treorder"
@@ -1061,9 +1077,13 @@ static struct console gdb_console = {
.index = -1
};
-__init void register_gdb_console(void)
+static int __init register_gdb_console(void)
{
register_console(&gdb_console);
+
+ return 0;
}
+console_initcall(register_gdb_console);
+
#endif
diff -puN arch/mips/kernel/genex.S~mips-megapatch arch/mips/kernel/genex.S
--- 25/arch/mips/kernel/genex.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/genex.S 2004-02-19 12:53:00.000000000 -0800
@@ -17,6 +17,7 @@
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
+#include <asm/war.h>
__INIT
@@ -123,84 +124,82 @@ NESTED(except_vec4, 0, sp)
1: j 1b /* Dummy, will be replaced */
END(except_vec4)
- /*
- * EJTAG debug exception handler.
- * The EJTAG debug exception entry point is 0xbfc00480, which
- * normally is in the boot PROM, so the boot PROM must do a
- * unconditional jump to this vector.
- */
+/*
+ * EJTAG debug exception handler.
+ * The EJTAG debug exception entry point is 0xbfc00480, which
+ * normally is in the boot PROM, so the boot PROM must do a
+ * unconditional jump to this vector.
+ */
NESTED(except_vec_ejtag_debug, 0, sp)
j ejtag_debug_handler
- nop
END(except_vec_ejtag_debug)
__FINIT
- /*
- * EJTAG debug exception handler.
- */
- NESTED(ejtag_debug_handler, PT_SIZE, sp)
+/*
+ * EJTAG debug exception handler.
+ */
+NESTED(ejtag_debug_handler, PT_SIZE, sp)
+ .set push
.set noat
.set noreorder
- mtc0 k0, CP0_DESAVE
+ MTC0 k0, CP0_DESAVE
mfc0 k0, CP0_DEBUG
sll k0, k0, 30 # Check for SDBBP.
bgez k0, ejtag_return
+ nop
- la k0, ejtag_debug_buffer
- sw k1, 0(k0)
+ PTR_LA k0, ejtag_debug_buffer
+ LONG_S k1, 0(k0)
SAVE_ALL
jal ejtag_exception_handler
move a0, sp
RESTORE_ALL
- la k0, ejtag_debug_buffer
- lw k1, 0(k0)
+ PTR_LA k0, ejtag_debug_buffer
+ LONG_L k1, 0(k0)
ejtag_return:
- mfc0 k0, CP0_DESAVE
+ MFC0 k0, CP0_DESAVE
.set mips32
deret
- .set mips0
- nop
- .set at
+ nop
+ .set pop
END(ejtag_debug_handler)
- /*
- * This buffer is reserved for the use of the EJTAG debug
- * handler.
- */
+/*
+ * This buffer is reserved for the use of the EJTAG debug
+ * handler.
+ */
.data
- EXPORT(ejtag_debug_buffer)
+EXPORT(ejtag_debug_buffer)
.fill LONGSIZE
.previous
__INIT
- /*
- * NMI debug exception handler for MIPS reference boards.
- * The NMI debug exception entry point is 0xbfc00000, which
- * normally is in the boot PROM, so the boot PROM must do a
- * unconditional jump to this vector.
- */
- NESTED(except_vec_nmi, 0, sp)
+/*
+ * NMI debug exception handler for MIPS reference boards.
+ * The NMI debug exception entry point is 0xbfc00000, which
+ * normally is in the boot PROM, so the boot PROM must do a
+ * unconditional jump to this vector.
+ */
+NESTED(except_vec_nmi, 0, sp)
j nmi_handler
- nop
END(except_vec_nmi)
__FINIT
- NESTED(nmi_handler, PT_SIZE, sp)
+NESTED(nmi_handler, PT_SIZE, sp)
+ .set push
.set noat
- .set noreorder
.set mips3
SAVE_ALL
- jal nmi_exception_handler
move a0, sp
+ jal nmi_exception_handler
RESTORE_ALL
eret
- .set at
- .set mips0
+ .set pop
END(nmi_handler)
.macro __build_clear_none
@@ -236,34 +235,41 @@ ejtag_return:
recognize an unknown escape code. So make the arguments
start with an n and gas will believe \n is ok ... */
.macro __BUILD_verbose nexception
- ld a1, PT_EPC(sp)
+ LONG_L a1, PT_EPC(sp)
+#if CONFIG_MIPS32
+ PRINT("Got \nexception at %08lx\012")
+#endif
+#if CONFIG_MIPS64
PRINT("Got \nexception at %016lx\012")
+#endif
.endm
.macro __BUILD_count exception
- .set reorder
LONG_L t0,exception_count_\exception
LONG_ADDIU t0, 1
LONG_S t0,exception_count_\exception
- .set noreorder
.comm exception_count\exception, 8, 8
.endm
- .macro BUILD_HANDLER exception handler clear verbose
+ .macro __BUILD_HANDLER exception handler clear verbose ext
.align 5
NESTED(handle_\exception, PT_SIZE, sp)
.set noat
SAVE_ALL
+ FEXPORT(handle_\exception\ext)
__BUILD_clear_\clear
.set at
__BUILD_\verbose \exception
move a0, sp
jal do_\handler
j ret_from_exception
- nop
END(handle_\exception)
.endm
+ .macro BUILD_HANDLER exception handler clear verbose
+ __BUILD_HANDLER \exception \handler \clear \verbose _int
+ .endm
+
BUILD_HANDLER adel ade ade silent /* #4 */
BUILD_HANDLER ades ade ade silent /* #5 */
BUILD_HANDLER ibe be cli silent /* #6 */
diff -puN /dev/null arch/mips/kernel/genrtc.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/kernel/genrtc.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,64 @@
+/*
+ * A glue layer that provides RTC read/write to drivers/char/genrtc.c driver
+ * based on MIPS internal RTC routines. It does take care locking
+ * issues so that we are SMP/Preemption safe.
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * Please read the COPYING file for all license details.
+ */
+
+#include <linux/spinlock.h>
+
+#include <asm/rtc.h>
+#include <asm/time.h>
+
+static spinlock_t mips_rtc_lock = SPIN_LOCK_UNLOCKED;
+
+unsigned int get_rtc_time(struct rtc_time *time)
+{
+ unsigned long nowtime;
+
+ spin_lock(&mips_rtc_lock);
+ nowtime = rtc_get_time();
+ to_tm(nowtime, time);
+ time->tm_year -= 1900;
+ spin_unlock(&mips_rtc_lock);
+
+ return RTC_24H;
+}
+
+int set_rtc_time(struct rtc_time *time)
+{
+ unsigned long nowtime;
+ int ret;
+
+ spin_lock(&mips_rtc_lock);
+ nowtime = mktime(time->tm_year+1900, time->tm_mon+1,
+ time->tm_mday, time->tm_hour, time->tm_min,
+ time->tm_sec);
+ ret = rtc_set_time(nowtime);
+ spin_unlock(&mips_rtc_lock);
+
+ return ret;
+}
+
+unsigned int get_rtc_ss(void)
+{
+ struct rtc_time h;
+
+ get_rtc_time(&h);
+ return h.tm_sec;
+}
+
+int get_rtc_pll(struct rtc_pll_info *pll)
+{
+ return -EINVAL;
+}
+
+int set_rtc_pll(struct rtc_pll_info *pll)
+{
+ return -EINVAL;
+}
+
diff -puN arch/mips/kernel/head.S~mips-megapatch arch/mips/kernel/head.S
--- 25/arch/mips/kernel/head.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/head.S 2004-02-19 12:53:00.000000000 -0800
@@ -20,7 +20,6 @@
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/page.h>
-#include <asm/processor.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
#ifdef CONFIG_SGI_IP27
@@ -91,6 +90,19 @@
.endm
/*
+ * For the moment set ST0_KU so the CPU will not spit fire when
+ * executing 64-bit instructions. The full initialization of the
+ * CPU's status register is done later in per_cpu_trap_init().
+ */
+ .macro setup_c0_status
+#ifdef CONFIG_MIPS64
+ mfc0 t0, CP0_STATUS
+ or t0, ST0_KX
+ mtc0 t0, CP0_STATUS
+#endif
+ .endm
+
+ /*
* Reserved space for exception handlers.
* Necessary for machines which link their kernels at KSEG0.
*/
@@ -102,6 +114,8 @@ EXPORT(_stext)
__INIT
NESTED(kernel_entry, 16, sp) # kernel entry point
+ setup_c0_status
+
#ifdef CONFIG_SGI_IP27
GET_NASID_ASM t1
move t2, t1 # text and data are here
@@ -112,18 +126,7 @@ NESTED(kernel_entry, 16, sp) # kernel
CLI # disable interrupts
- PTR_LA $28, init_thread_union
- PTR_ADDIU sp, $28, _THREAD_SIZE - 32
- set_saved_sp sp, t0, t1
- PTR_SUBU sp, 4 * SZREG # init stack pointer
-
- /*
- * The firmware/bootloader passes argc/argp/envp
- * to us as arguments. But clear bss first because
- * the romvec and other important info is stored there
- * by prom_init().
- */
- PTR_LA t0, __bss_start
+ PTR_LA t0, __bss_start # clear .bss
LONG_S zero, (t0)
PTR_LA t1, __bss_stop - LONGSIZE
1:
@@ -131,7 +134,17 @@ NESTED(kernel_entry, 16, sp) # kernel
LONG_S zero, (t0)
bne t0, t1, 1b
- jal init_arch
+ LONG_S a0, fw_arg0 # firmware arguments
+ LONG_S a1, fw_arg1
+ LONG_S a2, fw_arg2
+ LONG_S a3, fw_arg3
+
+ PTR_LA $28, init_thread_union
+ PTR_ADDIU sp, $28, _THREAD_SIZE - 32
+ set_saved_sp sp, t0, t1
+ PTR_SUBU sp, 4 * SZREG # init stack pointer
+
+ jal start_kernel
END(kernel_entry)
#ifdef CONFIG_SMP
@@ -142,8 +155,8 @@ NESTED(kernel_entry, 16, sp) # kernel
NESTED(smp_bootstrap, 16, sp)
#ifdef CONFIG_SGI_IP27
GET_NASID_ASM t1
- li t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
- KLDIR_OFF_POINTER + K0BASE
+ dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
+ KLDIR_OFF_POINTER + CAC_BASE
dsll t1, NASID_SHFT
or t0, t0, t1
ld t0, 0(t0) # t0 points to kern_vars struct
@@ -154,17 +167,7 @@ NESTED(smp_bootstrap, 16, sp)
#endif /* CONFIG_SGI_IP27 */
CLI
-
-#ifdef CONFIG_MIPS64
- /*
- * For the moment set ST0_KU so the CPU will not spit fire when
- * executing 64-bit instructions. The full initialization of the
- * CPU's status register is done later in per_cpu_trap_init().
- */
- mfc0 t0, CP0_STATUS
- or t0, ST0_KX
- mtc0 t0, CP0_STATUS
-#endif
+ setup_c0_status
jal start_secondary
END(smp_bootstrap)
#endif /* CONFIG_SMP */
@@ -174,6 +177,11 @@ NESTED(smp_bootstrap, 16, sp)
.comm kernelsp, NR_CPUS * 8, 8
.comm pgd_current, NR_CPUS * 8, 8
+ .comm fw_arg0, SZREG, SZREG # firmware arguments
+ .comm fw_arg1, SZREG, SZREG
+ .comm fw_arg2, SZREG, SZREG
+ .comm fw_arg3, SZREG, SZREG
+
.macro page name, order=0
.globl \name
\name: .size \name, (_PAGE_SIZE << \order)
@@ -184,22 +192,17 @@ NESTED(smp_bootstrap, 16, sp)
.data
.align PAGE_SHIFT
-#ifdef CONFIG_MIPS32
- /*
- * Here we only have a two-level pagetable structure ...
- */
- page swapper_pg_dir, _PGD_ORDER
- page invalid_pte_table, _PTE_ORDER
-#endif
-#ifdef CONFIG_MIPS64
/*
* ... but on 64-bit we've got three-level pagetables with a
* slightly different layout ...
*/
page swapper_pg_dir, _PGD_ORDER
+#ifdef CONFIG_MIPS64
page invalid_pmd_table, _PMD_ORDER
+#endif
page invalid_pte_table, _PTE_ORDER
+#ifdef CONFIG_MIPS64
/*
* 64-bit kernel mappings are really screwed up ...
*/
diff -puN arch/mips/kernel/i8259.c~mips-megapatch arch/mips/kernel/i8259.c
--- 25/arch/mips/kernel/i8259.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/i8259.c 2004-02-19 12:53:00.000000000 -0800
@@ -31,7 +31,7 @@ void disable_8259A_irq(unsigned int irq)
* moves to arch independent land
*/
-static spinlock_t i8259A_lock = SPIN_LOCK_UNLOCKED;
+spinlock_t i8259A_lock = SPIN_LOCK_UNLOCKED;
static void end_8259A_irq (unsigned int irq)
{
@@ -291,11 +291,6 @@ void __init init_8259A(int auto_eoi)
spin_unlock_irqrestore(&i8259A_lock, flags);
}
-asmlinkage void i8259_do_irq(int irq, struct pt_regs regs)
-{
- panic("i8259_do_irq: I want to be implemented");
-}
-
/*
* IRQ2 is cascade interrupt to second interrupt controller
*/
diff -puN arch/mips/kernel/init_task.c~mips-megapatch arch/mips/kernel/init_task.c
--- 25/arch/mips/kernel/init_task.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/init_task.c 2004-02-19 12:53:00.000000000 -0800
@@ -4,6 +4,7 @@
#include <linux/init_task.h>
#include <linux/fs.h>
+#include <asm/thread_info.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
@@ -26,7 +27,8 @@ EXPORT_SYMBOL(init_mm);
* The things we do for performance..
*/
union thread_union init_thread_union
- __attribute__((__section__(".data.init_task"))) =
+ __attribute__((__section__(".data.init_task"),
+ __aligned__(THREAD_SIZE))) =
{ INIT_THREAD_INFO(init_task) };
/*
diff -puN arch/mips/kernel/ioctl32.c~mips-megapatch arch/mips/kernel/ioctl32.c
--- 25/arch/mips/kernel/ioctl32.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/ioctl32.c 2004-02-19 12:53:00.000000000 -0800
@@ -4,7 +4,7 @@
* Copyright (C) 2000 Silicon Graphics, Inc.
* Written by Ulf Carlsson (ulfc@engr.sgi.com)
* Copyright (C) 2000 Ralf Baechle
- * Copyright (C) 2002 Maciej W. Rozycki
+ * Copyright (C) 2002, 2003 Maciej W. Rozycki
*
* Mostly stolen from the sparc64 ioctl32 implementation.
*/
@@ -33,7 +33,9 @@
#include <linux/blkdev.h>
#include <linux/loop.h>
#include <linux/fb.h>
+#include <linux/i2c.h>
#include <linux/vt.h>
+#include <linux/vt_kern.h>
#include <linux/kd.h>
#include <linux/ext2_fs.h>
#include <linux/videodev.h>
@@ -45,7 +47,6 @@
#include <linux/hdreg.h>
#include <linux/raid/md.h>
#include <linux/blkpg.h>
-#include <linux/blkdev.h>
#include <linux/elevator.h>
#include <linux/rtc.h>
#include <linux/pci.h>
@@ -89,6 +90,7 @@
#include <linux/nbd.h>
#include <linux/random.h>
#include <linux/filter.h>
+#include <linux/wireless.h>
#ifdef CONFIG_SIBYTE_TBPROF
#include <asm/sibyte/trace_prof.h>
@@ -383,7 +385,7 @@ static inline int dev_ifconf(unsigned in
struct ifreq32 *ifr32;
struct ifreq *ifr;
mm_segment_t old_fs;
- int len;
+ unsigned int i, j;
int err;
if (copy_from_user(&ifc32, uifc32, sizeof(struct ifconf32)))
@@ -402,16 +404,14 @@ static inline int dev_ifconf(unsigned in
}
ifr = ifc.ifc_req;
ifr32 = (struct ifreq32 *)A(ifc32.ifcbuf);
- len = ifc32.ifc_len / sizeof (struct ifreq32);
- while (len--) {
+ for (i = 0; i < ifc32.ifc_len; i += sizeof (struct ifreq32)) {
if (copy_from_user(ifr++, ifr32++, sizeof (struct ifreq32))) {
- err = -EFAULT;
- goto out;
+ kfree (ifc.ifc_buf);
+ return -EFAULT;
}
}
- old_fs = get_fs();
- set_fs (KERNEL_DS);
+ old_fs = get_fs(); set_fs (KERNEL_DS);
err = sys_ioctl (fd, SIOCGIFCONF, (unsigned long)&ifc);
set_fs (old_fs);
if (err)
@@ -419,16 +419,26 @@ static inline int dev_ifconf(unsigned in
ifr = ifc.ifc_req;
ifr32 = (struct ifreq32 *)A(ifc32.ifcbuf);
- len = ifc.ifc_len / sizeof (struct ifreq);
- ifc32.ifc_len = len * sizeof (struct ifreq32);
-
- while (len--) {
+ for (i = 0, j = 0; i < ifc32.ifc_len && j < ifc.ifc_len;
+ i += sizeof (struct ifreq32), j += sizeof (struct ifreq)) {
if (copy_to_user(ifr32++, ifr++, sizeof (struct ifreq32))) {
err = -EFAULT;
goto out;
}
}
-
+ if (ifc32.ifcbuf == 0) {
+ /* Translate from 64-bit structure multiple to
+ * a 32-bit one.
+ */
+ i = ifc.ifc_len;
+ i = ((i / sizeof(struct ifreq)) * sizeof(struct ifreq32));
+ ifc32.ifc_len = i;
+ } else {
+ if (i <= ifc32.ifc_len)
+ ifc32.ifc_len = i;
+ else
+ ifc32.ifc_len = i - sizeof (struct ifreq32);
+ }
if (copy_to_user(uifc32, &ifc32, sizeof(struct ifconf32))) {
err = -EFAULT;
goto out;
@@ -803,6 +813,120 @@ static int ioc_settimeout(unsigned int f
return rw_long(fd, AUTOFS_IOC_SETTIMEOUT, arg);
}
+#ifdef CONFIG_VT
+
+extern int tty_ioctl(struct inode * inode, struct file * file, unsigned int cmd, unsigned long arg);
+
+static int vt_check(struct file *file)
+{
+ struct tty_struct *tty;
+ struct inode *inode = file->f_dentry->d_inode;
+
+ if (file->f_op->ioctl != tty_ioctl)
+ return -EINVAL;
+
+ tty = (struct tty_struct *)file->private_data;
+ if (tty_paranoia_check(tty, inode, "tty_ioctl"))
+ return -EINVAL;
+
+ if (tty->driver->ioctl != vt_ioctl)
+ return -EINVAL;
+
+ /*
+ * To have permissions to do most of the vt ioctls, we either have
+ * to be the owner of the tty, or super-user.
+ */
+ if (current->tty == tty || capable(CAP_SYS_TTY_CONFIG))
+ return 1;
+ return 0;
+}
+
+struct consolefontdesc32 {
+ unsigned short charcount; /* characters in font (256 or 512) */
+ unsigned short charheight; /* scan lines per character (1-32) */
+ u32 chardata; /* font data in expanded form */
+};
+
+static int do_fontx_ioctl(unsigned int fd, int cmd, struct consolefontdesc32 *user_cfd, struct file *file)
+{
+ struct consolefontdesc cfdarg;
+ struct console_font_op op;
+ int i, perm;
+
+ perm = vt_check(file);
+ if (perm < 0) return perm;
+
+ if (copy_from_user(&cfdarg, user_cfd, sizeof(struct consolefontdesc32)))
+ return -EFAULT;
+
+ cfdarg.chardata = (unsigned char *)A(((struct consolefontdesc32 *)&cfdarg)->chardata);
+
+ switch (cmd) {
+ case PIO_FONTX:
+ if (!perm)
+ return -EPERM;
+ op.op = KD_FONT_OP_SET;
+ op.flags = 0;
+ op.width = 8;
+ op.height = cfdarg.charheight;
+ op.charcount = cfdarg.charcount;
+ op.data = cfdarg.chardata;
+ return con_font_op(fg_console, &op);
+ case GIO_FONTX:
+ if (!cfdarg.chardata)
+ return 0;
+ op.op = KD_FONT_OP_GET;
+ op.flags = 0;
+ op.width = 8;
+ op.height = cfdarg.charheight;
+ op.charcount = cfdarg.charcount;
+ op.data = cfdarg.chardata;
+ i = con_font_op(fg_console, &op);
+ if (i)
+ return i;
+ cfdarg.charheight = op.height;
+ cfdarg.charcount = op.charcount;
+ ((struct consolefontdesc32 *)&cfdarg)->chardata = (unsigned long)cfdarg.chardata;
+ if (copy_to_user(user_cfd, &cfdarg, sizeof(struct consolefontdesc32)))
+ return -EFAULT;
+ return 0;
+ }
+ return -EINVAL;
+}
+
+struct console_font_op32 {
+ unsigned int op; /* operation code KD_FONT_OP_* */
+ unsigned int flags; /* KD_FONT_FLAG_* */
+ unsigned int width, height; /* font size */
+ unsigned int charcount;
+ u32 data; /* font data with height fixed to 32 */
+};
+
+static int do_kdfontop_ioctl(unsigned int fd, unsigned int cmd, struct console_font_op32 *fontop, struct file *file)
+{
+ struct console_font_op op;
+ int perm = vt_check(file), i;
+ struct vt_struct *vt;
+
+ if (perm < 0) return perm;
+
+ if (copy_from_user(&op, (void *) fontop, sizeof(struct console_font_op32)))
+ return -EFAULT;
+ if (!perm && op.op != KD_FONT_OP_GET)
+ return -EPERM;
+ op.data = (unsigned char *)A(((struct console_font_op32 *)&op)->data);
+ op.flags |= KD_FONT_FLAG_OLD;
+ vt = (struct vt_struct *)((struct tty_struct *)file->private_data)->driver_data;
+ i = con_font_op(vt->vc_num, &op);
+ if (i) return i;
+ ((struct console_font_op32 *)&op)->data = (unsigned long)op.data;
+ if (copy_to_user((void *) fontop, &op, sizeof(struct console_font_op32)))
+ return -EFAULT;
+ return 0;
+}
+
+#endif
+
typedef int (* ioctl32_handler_t)(unsigned int, unsigned int, unsigned long, struct file *);
#define COMPATIBLE_IOCTL(cmd) HANDLE_IOCTL((cmd),sys_ioctl)
@@ -819,6 +943,7 @@ COMPATIBLE_IOCTL(TCSETA)
COMPATIBLE_IOCTL(TCSETAW)
COMPATIBLE_IOCTL(TCSETAF)
COMPATIBLE_IOCTL(TCSBRK)
+COMPATIBLE_IOCTL(TCSBRKP)
COMPATIBLE_IOCTL(TCXONC)
COMPATIBLE_IOCTL(TCFLSH)
COMPATIBLE_IOCTL(TCGETS)
@@ -869,6 +994,7 @@ HANDLE_IOCTL(FBIOPUTCMAP, do_fbiocmap_io
COMPATIBLE_IOCTL(FBIOPAN_DISPLAY)
#endif /* CONFIG_FB */
+#ifdef CONFIG_VT
/* Big K */
COMPATIBLE_IOCTL(PIO_FONT)
COMPATIBLE_IOCTL(GIO_FONT)
@@ -901,16 +1027,8 @@ COMPATIBLE_IOCTL(GIO_UNISCRNMAP)
COMPATIBLE_IOCTL(PIO_UNISCRNMAP)
COMPATIBLE_IOCTL(PIO_FONTRESET)
COMPATIBLE_IOCTL(PIO_UNIMAPCLR)
-
-/* Big S */
-COMPATIBLE_IOCTL(SCSI_IOCTL_GET_IDLUN)
-COMPATIBLE_IOCTL(SCSI_IOCTL_DOORLOCK)
-COMPATIBLE_IOCTL(SCSI_IOCTL_DOORUNLOCK)
-COMPATIBLE_IOCTL(SCSI_IOCTL_TEST_UNIT_READY)
-COMPATIBLE_IOCTL(SCSI_IOCTL_TAGGED_ENABLE)
-COMPATIBLE_IOCTL(SCSI_IOCTL_TAGGED_DISABLE)
-COMPATIBLE_IOCTL(SCSI_IOCTL_GET_BUS_NUMBER)
-COMPATIBLE_IOCTL(SCSI_IOCTL_SEND_COMMAND)
+HANDLE_IOCTL(PIO_FONTX, do_fontx_ioctl)
+HANDLE_IOCTL(KDFONTOP, do_kdfontop_ioctl)
/* Big V */
COMPATIBLE_IOCTL(VT_SETMODE)
@@ -925,8 +1043,16 @@ COMPATIBLE_IOCTL(VT_RESIZE)
COMPATIBLE_IOCTL(VT_RESIZEX)
COMPATIBLE_IOCTL(VT_LOCKSWITCH)
COMPATIBLE_IOCTL(VT_UNLOCKSWITCH)
+#endif
+
+/* Big S */
+COMPATIBLE_IOCTL(SCSI_IOCTL_GET_IDLUN)
+COMPATIBLE_IOCTL(SCSI_IOCTL_DOORLOCK)
+COMPATIBLE_IOCTL(SCSI_IOCTL_DOORUNLOCK)
+COMPATIBLE_IOCTL(SCSI_IOCTL_TEST_UNIT_READY)
+COMPATIBLE_IOCTL(SCSI_IOCTL_GET_BUS_NUMBER)
+COMPATIBLE_IOCTL(SCSI_IOCTL_SEND_COMMAND)
-#ifdef CONFIG_NET
/* Socket level stuff */
COMPATIBLE_IOCTL(FIOSETOWN)
COMPATIBLE_IOCTL(SIOCSPGRP)
@@ -1034,6 +1160,7 @@ COMPATIBLE_IOCTL(DVD_AUTH)
COMPATIBLE_IOCTL(LOOP_SET_FD)
COMPATIBLE_IOCTL(LOOP_CLR_FD)
+#ifdef CONFIG_NET
/* And these ioctls need translation */
HANDLE_IOCTL(SIOCGIFNAME, dev_ifname32)
HANDLE_IOCTL(SIOCGIFCONF, dev_ifconf)
@@ -1075,7 +1202,6 @@ HANDLE_IOCTL(SIOCDELRT, routing_ioctl)
*/
HANDLE_IOCTL(SIOCRTMSG, ret_einval)
HANDLE_IOCTL(SIOCGSTAMP, do_siocgstamp)
-
#endif /* CONFIG_NET */
HANDLE_IOCTL(EXT2_IOC32_GETFLAGS, do_ext2_ioctl)
@@ -1147,23 +1273,23 @@ COMPATIBLE_IOCTL(RESTART_ARRAY_RW)
#endif /* CONFIG_MD */
#ifdef CONFIG_SIBYTE_TBPROF
-COMPATIBLE_IOCTL(SBPROF_ZBSTART),
-COMPATIBLE_IOCTL(SBPROF_ZBSTOP),
-COMPATIBLE_IOCTL(SBPROF_ZBWAITFULL),
+COMPATIBLE_IOCTL(SBPROF_ZBSTART)
+COMPATIBLE_IOCTL(SBPROF_ZBSTOP)
+COMPATIBLE_IOCTL(SBPROF_ZBWAITFULL)
#endif /* CONFIG_SIBYTE_TBPROF */
#if defined(CONFIG_BLK_DEV_DM) || defined(CONFIG_BLK_DEV_DM_MODULE)
- IOCTL32_DEFAULT(DM_VERSION),
- IOCTL32_DEFAULT(DM_REMOVE_ALL),
- IOCTL32_DEFAULT(DM_DEV_CREATE),
- IOCTL32_DEFAULT(DM_DEV_REMOVE),
- IOCTL32_DEFAULT(DM_DEV_RELOAD),
- IOCTL32_DEFAULT(DM_DEV_SUSPEND),
- IOCTL32_DEFAULT(DM_DEV_RENAME),
- IOCTL32_DEFAULT(DM_DEV_DEPS),
- IOCTL32_DEFAULT(DM_DEV_STATUS),
- IOCTL32_DEFAULT(DM_TARGET_STATUS),
- IOCTL32_DEFAULT(DM_TARGET_WAIT),
+COMPATIBLE_IOCTL(DM_VERSION)
+COMPATIBLE_IOCTL(DM_REMOVE_ALL)
+COMPATIBLE_IOCTL(DM_DEV_CREATE)
+COMPATIBLE_IOCTL(DM_DEV_REMOVE)
+COMPATIBLE_IOCTL(DM_DEV_RELOAD)
+COMPATIBLE_IOCTL(DM_DEV_SUSPEND)
+COMPATIBLE_IOCTL(DM_DEV_RENAME)
+COMPATIBLE_IOCTL(DM_DEV_DEPS)
+COMPATIBLE_IOCTL(DM_DEV_STATUS)
+COMPATIBLE_IOCTL(DM_TARGET_STATUS)
+COMPATIBLE_IOCTL(DM_TARGET_WAIT)
#endif /* CONFIG_BLK_DEV_DM */
COMPATIBLE_IOCTL(MTIOCTOP) /* mtio.h ioctls */
diff -puN arch/mips/kernel/irixsig.c~mips-megapatch arch/mips/kernel/irixsig.c
--- 25/arch/mips/kernel/irixsig.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/irixsig.c 2004-02-19 12:53:00.000000000 -0800
@@ -210,7 +210,10 @@ irix_sigreturn(struct pt_regs *regs)
int sig, i, base = 0;
sigset_t blocked;
- if(regs->regs[2] == 1000)
+ /* Always make any pending restarted system calls return -EINTR */
+ current_thread_info()->restart_block.fn = do_no_restart_syscall;
+
+ if (regs->regs[2] == 1000)
base = 1;
context = (struct sigctx_irix5 *) regs->regs[base + 4];
diff -puN arch/mips/kernel/irq.c~mips-megapatch arch/mips/kernel/irq.c
--- 25/arch/mips/kernel/irq.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -288,8 +288,10 @@ void inline disable_irq_nosync(unsigned
void disable_irq(unsigned int irq)
{
+ irq_desc_t *desc = irq_desc + irq;
disable_irq_nosync(irq);
- synchronize_irq(irq);
+ if (desc->action)
+ synchronize_irq(irq);
}
/**
@@ -310,7 +312,7 @@ void enable_irq(unsigned int irq)
spin_lock_irqsave(&desc->lock, flags);
switch (desc->depth) {
case 1: {
- unsigned int status = desc->status & ~IRQ_DISABLED;
+ unsigned int status = desc->status & ~(IRQ_DISABLED | IRQ_INPROGRESS);
desc->status = status;
if ((status & (IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) {
desc->status = status | IRQ_REPLAY;
@@ -706,7 +708,7 @@ unsigned int probe_irq_mask(unsigned lon
* appears to have triggered the interrupt. If no interrupt was
* found then zero is returned. If more than one interrupt is
* found then minus the first candidate is returned to indicate
- * their is doubt.
+ * there is doubt.
*
* The interrupt probe logic state is returned to its previous
* value.
@@ -858,7 +860,7 @@ static int irq_affinity_write_proc (stru
* way to make the system unusable accidentally :-) At least
* one online CPU still has to be targeted.
*/
- cpus_and(tmp, tmp, cpu_online_map);
+ cpus_and(tmp, new_value, cpu_online_map);
if (cpus_empty(tmp))
return -EINVAL;
diff -puN arch/mips/kernel/irq_cpu.c~mips-megapatch arch/mips/kernel/irq_cpu.c
--- 25/arch/mips/kernel/irq_cpu.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/irq_cpu.c 2004-02-19 12:53:00.000000000 -0800
@@ -80,7 +80,7 @@ static unsigned int mips_cpu_irq_startup
static void mips_cpu_irq_ack(unsigned int irq)
{
/* Only necessary for soft interrupts */
- clear_c0_cause(1 << (irq - mips_cpu_irq_base + 8));
+ clear_c0_cause(0x100 << (irq - mips_cpu_irq_base));
mask_mips_irq(irq);
}
@@ -102,6 +102,7 @@ static hw_irq_controller mips_cpu_irq_co
NULL /* no affinity stuff for UP */
};
+
void __init mips_cpu_irq_init(int irq_base)
{
int i;
diff -puN /dev/null arch/mips/kernel/irq-rm7000.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/kernel/irq-rm7000.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,96 @@
+/*
+ * Copyright (C) 2003 Ralf Baechle
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Handler for RM7000 extended interrupts. These are a non-standard
+ * feature so we handle them separately from standard interrupts.
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+
+static int irq_base;
+
+static inline void unmask_rm7k_irq(unsigned int irq)
+{
+ set_c0_intcontrol(1 << (irq - irq_base));
+}
+
+static inline void mask_rm7k_irq(unsigned int irq)
+{
+ clear_c0_intcontrol(1 << (irq - irq_base));
+}
+
+static inline void rm7k_cpu_irq_enable(unsigned int irq)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ unmask_rm7k_irq(irq);
+ local_irq_restore(flags);
+}
+
+static void rm7k_cpu_irq_disable(unsigned int irq)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ mask_rm7k_irq(irq);
+ local_irq_restore(flags);
+}
+
+static unsigned int rm7k_cpu_irq_startup(unsigned int irq)
+{
+ rm7k_cpu_irq_enable(irq);
+
+ return 0;
+}
+
+#define rm7k_cpu_irq_shutdown rm7k_cpu_irq_disable
+
+/*
+ * While we ack the interrupt interrupts are disabled and thus we don't need
+ * to deal with concurrency issues. Same for rm7k_cpu_irq_end.
+ */
+static void rm7k_cpu_irq_ack(unsigned int irq)
+{
+ mask_rm7k_irq(irq);
+}
+
+static void rm7k_cpu_irq_end(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ unmask_rm7k_irq(irq);
+}
+
+static hw_irq_controller rm7k_irq_controller = {
+ "RM7000",
+ rm7k_cpu_irq_startup,
+ rm7k_cpu_irq_shutdown,
+ rm7k_cpu_irq_enable,
+ rm7k_cpu_irq_disable,
+ rm7k_cpu_irq_ack,
+ rm7k_cpu_irq_end,
+};
+
+void __init rm7k_cpu_irq_init(int base)
+{
+ int i;
+
+ for (i = base; i < base + 4; i++) {
+ irq_desc[i].status = IRQ_DISABLED;
+ irq_desc[i].action = NULL;
+ irq_desc[i].depth = 1;
+ irq_desc[i].handler = &rm7k_irq_controller;
+ }
+
+ irq_base = base;
+}
diff -puN arch/mips/kernel/linux32.c~mips-megapatch arch/mips/kernel/linux32.c
--- 25/arch/mips/kernel/linux32.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/linux32.c 2004-02-19 12:53:00.000000000 -0800
@@ -6,6 +6,7 @@
* sys32_execve from ia64/ia32 code, Feb 2000, Kanoj Sarcar (kanoj@sgi.com)
*/
#include <linux/config.h>
+#include <linux/compiler.h>
#include <linux/mm.h>
#include <linux/errno.h>
#include <linux/file.h>
@@ -175,26 +176,34 @@ static int count32(u32 * argv, int max)
*/
int copy_strings32(int argc, u32 * argv, struct linux_binprm *bprm)
{
+ struct page *kmapped_page = NULL;
+ char *kaddr = NULL;
+ int ret;
+
while (argc-- > 0) {
u32 str;
int len;
unsigned long pos;
if (get_user(str, argv+argc) || !str ||
- !(len = strnlen_user((char *)A(str), bprm->p)))
- return -EFAULT;
- if (bprm->p < len)
- return -E2BIG;
+ !(len = strnlen_user((char *)A(str), bprm->p))) {
+ ret = -EFAULT;
+ goto out;
+ }
+
+ if (bprm->p < len) {
+ ret = -E2BIG;
+ goto out;
+ }
bprm->p -= len;
/* XXX: add architecture specific overflow check here. */
pos = bprm->p;
while (len > 0) {
- char *kaddr;
int i, new, err;
- struct page *page;
int offset, bytes_to_copy;
+ struct page *page;
offset = pos % PAGE_SIZE;
i = pos/PAGE_SIZE;
@@ -203,12 +212,19 @@ int copy_strings32(int argc, u32 * argv,
if (!page) {
page = alloc_page(GFP_HIGHUSER);
bprm->page[i] = page;
- if (!page)
- return -ENOMEM;
+ if (!page) {
+ ret = -ENOMEM;
+ goto out;
+ }
new = 1;
}
- kaddr = kmap(page);
+ if (page != kmapped_page) {
+ if (kmapped_page)
+ kunmap(kmapped_page);
+ kmapped_page = page;
+ kaddr = kmap(kmapped_page);
+ }
if (new && offset)
memset(kaddr, 0, offset);
bytes_to_copy = PAGE_SIZE - offset;
@@ -220,20 +236,42 @@ int copy_strings32(int argc, u32 * argv,
}
err = copy_from_user(kaddr + offset, (char *)A(str),
bytes_to_copy);
- flush_dcache_page(page);
- kunmap(page);
-
- if (err)
- return -EFAULT;
+ if (err) {
+ ret = -EFAULT;
+ goto out;
+ }
pos += bytes_to_copy;
str += bytes_to_copy;
len -= bytes_to_copy;
}
}
- return 0;
+ ret = 0;
+out:
+ if (kmapped_page)
+ kunmap(kmapped_page);
+ return ret;
}
+#ifdef CONFIG_MMU
+
+#define free_arg_pages(bprm) do { } while (0)
+
+#else
+
+static inline void free_arg_pages(struct linux_binprm *bprm)
+{
+ int i;
+
+ for (i = 0; i < MAX_ARG_PAGES; i++) {
+ if (bprm->page[i])
+ __free_page(bprm->page[i]);
+ bprm->page[i] = NULL;
+ }
+}
+
+#endif /* CONFIG_MMU */
+
/*
* sys32_execve() executes a new program.
*/
@@ -243,7 +281,8 @@ do_execve32(char * filename, u32 * argv,
struct linux_binprm bprm;
struct file * file;
int retval;
- int i;
+
+ sched_balance_exec();
file = open_exec(filename);
@@ -278,7 +317,8 @@ do_execve32(char * filename, u32 * argv,
if ((retval = bprm.envc) < 0)
goto out_mm;
- if ((retval = security_bprm_alloc(&bprm)))
+ retval = security_bprm_alloc(&bprm);
+ if (retval)
goto out;
retval = prepare_binprm(&bprm);
@@ -300,6 +340,8 @@ do_execve32(char * filename, u32 * argv,
retval = search_binary_handler(&bprm, regs);
if (retval >= 0) {
+ free_arg_pages(&bprm);
+
/* execve success */
security_bprm_free(&bprm);
return retval;
@@ -307,17 +349,14 @@ do_execve32(char * filename, u32 * argv,
out:
/* Something went wrong, return the inode and free the argument pages*/
- for (i = 0 ; i < MAX_ARG_PAGES ; i++) {
- struct page * page = bprm.page[i];
- if (page)
- __free_page(page);
- }
+ free_arg_pages(&bprm);
if (bprm.security)
security_bprm_free(&bprm);
out_mm:
- mmdrop(bprm.mm);
+ if (bprm.mm)
+ mmdrop(bprm.mm);
out_file:
if (bprm.file) {
@@ -336,7 +375,6 @@ asmlinkage int sys32_execve(nabi_no_rega
char * filename;
filename = getname((char *) (long)regs.regs[4]);
- printk("Executing: %s\n", filename);
error = PTR_ERR(filename);
if (IS_ERR(filename))
goto out;
@@ -704,6 +742,7 @@ do_readv_writev32(int type, struct file
* specially as they have atomicity guarantees and can handle
* iovec's natively
*/
+#ifdef CONFIG_NET
if (inode->i_sock) {
int err;
err = sock_readv_writev(type, inode, file, iov, count, tot_len);
@@ -711,6 +750,7 @@ do_readv_writev32(int type, struct file
kfree(iov);
return err;
}
+#endif
if (!file->f_op) {
if (iov != iovstack)
@@ -1183,10 +1223,10 @@ do_sys32_semctl(int first, int second, i
case IPC_STAT:
case SEM_STAT:
fourth.__pad = &s;
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_semctl (first, second, third, fourth);
- set_fs (old_fs);
+ old_fs = get_fs();
+ set_fs(KERNEL_DS);
+ err = sys_semctl(first, second, third | IPC_64, fourth);
+ set_fs(old_fs);
if (third & IPC_64) {
struct semid64_ds32 *usp64 = (struct semid64_ds32 *) A(pad);
@@ -1348,18 +1388,18 @@ do_sys32_msgctl (int first, int second,
}
if (err)
break;
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_msgctl (first, second, (struct msqid_ds *)&m);
- set_fs (old_fs);
+ old_fs = get_fs();
+ set_fs(KERNEL_DS);
+ err = sys_msgctl(first, second | IPC_64, (struct msqid_ds *)&m);
+ set_fs(old_fs);
break;
case IPC_STAT:
case MSG_STAT:
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_msgctl (first, second, (struct msqid_ds *)&m);
- set_fs (old_fs);
+ old_fs = get_fs();
+ set_fs(KERNEL_DS);
+ err = sys_msgctl(first, second | IPC_64, (struct msqid_ds *)&m);
+ set_fs(old_fs);
if (second & IPC_64) {
if (!access_ok(VERIFY_WRITE, up64, sizeof(*up64))) {
err = -EFAULT;
@@ -1420,8 +1460,6 @@ do_sys32_shmat (int first, int second, i
if (version == 1)
return err;
- if (version == 1)
- return err;
err = sys_shmat (first, uptr, second, &raddr);
if (err)
return err;
@@ -1429,21 +1467,23 @@ do_sys32_shmat (int first, int second, i
return err;
}
+struct shm_info32 {
+ int used_ids;
+ u32 shm_tot, shm_rss, shm_swp;
+ u32 swap_attempts, swap_successes;
+};
+
static int
do_sys32_shmctl (int first, int second, void *uptr)
{
+ struct shmid64_ds32 *up64 = (struct shmid64_ds32 *)uptr;
+ struct shmid_ds32 *up32 = (struct shmid_ds32 *)uptr;
+ struct shm_info32 *uip = (struct shm_info32 *)uptr;
int err = -EFAULT, err2;
- struct shmid_ds s;
struct shmid64_ds s64;
- struct shmid_ds32 *up32 = (struct shmid_ds32 *)uptr;
- struct shmid64_ds32 *up64 = (struct shmid64_ds32 *)uptr;
mm_segment_t old_fs;
- struct shm_info32 {
- int used_ids;
- u32 shm_tot, shm_rss, shm_swp;
- u32 swap_attempts, swap_successes;
- } *uip = (struct shm_info32 *)uptr;
struct shm_info si;
+ struct shmid_ds s;
switch (second & ~IPC_64) {
case IPC_INFO:
@@ -1451,7 +1491,7 @@ do_sys32_shmctl (int first, int second,
case IPC_RMID:
case SHM_LOCK:
case SHM_UNLOCK:
- err = sys_shmctl (first, second, (struct shmid_ds *)uptr);
+ err = sys_shmctl(first, second, (struct shmid_ds *)uptr);
break;
case IPC_SET:
if (second & IPC_64) {
@@ -1465,18 +1505,18 @@ do_sys32_shmctl (int first, int second,
}
if (err)
break;
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_shmctl (first, second, &s);
- set_fs (old_fs);
+ old_fs = get_fs();
+ set_fs(KERNEL_DS);
+ err = sys_shmctl(first, second & ~IPC_64, &s);
+ set_fs(old_fs);
break;
case IPC_STAT:
case SHM_STAT:
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_shmctl (first, second, (void *) &s64);
- set_fs (old_fs);
+ old_fs = get_fs();
+ set_fs(KERNEL_DS);
+ err = sys_shmctl(first, second | IPC_64, (void *) &s64);
+ set_fs(old_fs);
if (err < 0)
break;
if (second & IPC_64) {
@@ -1523,32 +1563,46 @@ do_sys32_shmctl (int first, int second,
break;
case SHM_INFO:
- old_fs = get_fs ();
- set_fs (KERNEL_DS);
- err = sys_shmctl (first, second, (void *)&si);
- set_fs (old_fs);
+ old_fs = get_fs();
+ set_fs(KERNEL_DS);
+ err = sys_shmctl(first, second, (void *)&si);
+ set_fs(old_fs);
if (err < 0)
break;
- err2 = put_user (si.used_ids, &uip->used_ids);
- err2 |= __put_user (si.shm_tot, &uip->shm_tot);
- err2 |= __put_user (si.shm_rss, &uip->shm_rss);
- err2 |= __put_user (si.shm_swp, &uip->shm_swp);
- err2 |= __put_user (si.swap_attempts,
- &uip->swap_attempts);
- err2 |= __put_user (si.swap_successes,
- &uip->swap_successes);
+ err2 = put_user(si.used_ids, &uip->used_ids);
+ err2 |= __put_user(si.shm_tot, &uip->shm_tot);
+ err2 |= __put_user(si.shm_rss, &uip->shm_rss);
+ err2 |= __put_user(si.shm_swp, &uip->shm_swp);
+ err2 |= __put_user(si.swap_attempts, &uip->swap_attempts);
+ err2 |= __put_user (si.swap_successes, &uip->swap_successes);
if (err2)
err = -EFAULT;
break;
default:
- err = -ENOSYS;
+ err = -EINVAL;
break;
}
return err;
}
+static int sys32_semtimedop(int semid, struct sembuf *tsems, int nsems,
+ const struct compat_timespec *timeout32)
+{
+ struct compat_timespec t32;
+ struct timespec *t64 = compat_alloc_user_space(sizeof(*t64));
+
+ if (copy_from_user(&t32, timeout32, sizeof(t32)))
+ return -EFAULT;
+
+ if (put_user(t32.tv_sec, &t64->tv_sec) ||
+ put_user(t32.tv_nsec, &t64->tv_nsec))
+ return -EFAULT;
+
+ return sys_semtimedop(semid, tsems, nsems, t64);
+}
+
asmlinkage long
sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth)
{
@@ -1558,11 +1612,14 @@ sys32_ipc (u32 call, int first, int seco
call &= 0xffff;
switch (call) {
-
case SEMOP:
/* struct sembuf is the same on 32 and 64bit :)) */
- err = sys_semop (first, (struct sembuf *)AA(ptr),
- second);
+ err = sys_semtimedop (first, (struct sembuf *)AA(ptr), second,
+ NULL);
+ break;
+ case SEMTIMEDOP:
+ err = sys32_semtimedop (first, (struct sembuf *)AA(ptr), second,
+ (const struct compat_timespec __user *)AA(fifth));
break;
case SEMGET:
err = sys_semget (first, second, third);
@@ -1668,56 +1725,6 @@ asmlinkage long sys32_sysctl(struct sysc
#endif /* CONFIG_SYSCTL */
-extern asmlinkage int sys_sched_setaffinity(pid_t pid, unsigned int len,
- unsigned long *user_mask_ptr);
-
-asmlinkage int sys32_sched_setaffinity(compat_pid_t pid, unsigned int len,
- u32 *user_mask_ptr)
-{
- unsigned long kernel_mask;
- mm_segment_t old_fs;
- int ret;
-
- if (get_user(kernel_mask, user_mask_ptr))
- return -EFAULT;
-
- old_fs = get_fs();
- set_fs(KERNEL_DS);
- ret = sys_sched_setaffinity(pid,
- /* XXX Nice api... */
- sizeof(kernel_mask),
- &kernel_mask);
- set_fs(old_fs);
-
- return ret;
-}
-
-extern asmlinkage int sys_sched_getaffinity(pid_t pid, unsigned int len,
- unsigned long *user_mask_ptr);
-
-asmlinkage int sys32_sched_getaffinity(compat_pid_t pid, unsigned int len,
- u32 *user_mask_ptr)
-{
- unsigned long kernel_mask;
- mm_segment_t old_fs;
- int ret;
-
- old_fs = get_fs();
- set_fs(KERNEL_DS);
- ret = sys_sched_getaffinity(pid,
- /* XXX Nice api... */
- sizeof(kernel_mask),
- &kernel_mask);
- set_fs(old_fs);
-
- if (ret == 0) {
- if (put_user(kernel_mask, user_mask_ptr))
- ret = -EFAULT;
- }
-
- return ret;
-}
-
asmlinkage long sys32_newuname(struct new_utsname * name)
{
int ret = 0;
@@ -1747,6 +1754,40 @@ asmlinkage int sys32_personality(unsigne
return ret;
}
+/* ustat compatibility */
+struct ustat32 {
+ compat_daddr_t f_tfree;
+ compat_ino_t f_tinode;
+ char f_fname[6];
+ char f_fpack[6];
+};
+
+extern asmlinkage long sys_ustat(dev_t dev, struct ustat * ubuf);
+
+asmlinkage int sys32_ustat(dev_t dev, struct ustat32 * ubuf32)
+{
+ int err;
+ struct ustat tmp;
+ struct ustat32 tmp32;
+ mm_segment_t old_fs = get_fs();
+
+ set_fs(KERNEL_DS);
+ err = sys_ustat(dev, &tmp);
+ set_fs (old_fs);
+
+ if (err)
+ goto out;
+
+ memset(&tmp32,0,sizeof(struct ustat32));
+ tmp32.f_tfree = tmp.f_tfree;
+ tmp32.f_tinode = tmp.f_tinode;
+
+ err = copy_to_user(ubuf32,&tmp32,sizeof(struct ustat32)) ? -EFAULT : 0;
+
+out:
+ return err;
+}
+
/* Handle adjtimex compatibility. */
struct timex32 {
@@ -1850,21 +1891,116 @@ asmlinkage ssize_t sys32_readahead(int f
return sys_readahead(fd, merge_64(a2, a3), count);
}
-asmlinkage long compat_sys_utimes(char __user * filename,
- struct compat_timeval __user * utimes)
+/* Argument list sizes for sys_socketcall */
+#define AL(x) ((x) * sizeof(unsigned int))
+static unsigned char socketcall_nargs[18]={AL(0),AL(3),AL(3),AL(3),AL(2),AL(3),
+ AL(3),AL(3),AL(4),AL(4),AL(4),AL(6),
+ AL(6),AL(2),AL(5),AL(5),AL(3),AL(3)};
+#undef AL
+
+/*
+ * System call vectors.
+ *
+ * Argument checking cleaned up. Saved 20% in size.
+ * This function doesn't need to set the kernel lock because
+ * it is set by the callees.
+ */
+
+asmlinkage long sys32_socketcall(int call, unsigned int *args32)
{
- struct timeval times[2];
-
- if (utimes) {
- if (verify_area(VERIFY_READ, utimes, 2 * sizeof(*utimes)))
- return -EFAULT;
+ unsigned int a[6];
+ unsigned int a0,a1;
+ int err;
+
+ extern asmlinkage long sys_socket(int family, int type, int protocol);
+ extern asmlinkage long sys_bind(int fd, struct sockaddr __user *umyaddr, int addrlen);
+ extern asmlinkage long sys_connect(int fd, struct sockaddr __user *uservaddr, int addrlen);
+ extern asmlinkage long sys_listen(int fd, int backlog);
+ extern asmlinkage long sys_accept(int fd, struct sockaddr __user *upeer_sockaddr, int __user *upeer_addrlen);
+ extern asmlinkage long sys_getsockname(int fd, struct sockaddr __user *usockaddr, int __user *usockaddr_len);
+ extern asmlinkage long sys_getpeername(int fd, struct sockaddr __user *usockaddr, int __user *usockaddr_len);
+ extern asmlinkage long sys_socketpair(int family, int type, int protocol, int __user *usockvec);
+ extern asmlinkage long sys_send(int fd, void __user * buff, size_t len, unsigned flags);
+ extern asmlinkage long sys_sendto(int fd, void __user * buff, size_t len, unsigned flags,
+ struct sockaddr __user *addr, int addr_len);
+ extern asmlinkage long sys_recv(int fd, void __user * ubuf, size_t size, unsigned flags);
+ extern asmlinkage long sys_recvfrom(int fd, void __user * ubuf, size_t size, unsigned flags,
+ struct sockaddr __user *addr, int __user *addr_len);
+ extern asmlinkage long sys_shutdown(int fd, int how);
+ extern asmlinkage long sys_setsockopt(int fd, int level, int optname, char __user *optval, int optlen);
+ extern asmlinkage long sys_getsockopt(int fd, int level, int optname, char __user *optval, int *optlen);
+ extern asmlinkage long sys_sendmsg(int fd, struct msghdr __user *msg, unsigned flags);
+ extern asmlinkage long sys_recvmsg(int fd, struct msghdr __user *msg, unsigned int flags);
- if (__get_user(times[0].tv_sec, &utimes[0].tv_sec) |
- __get_user(times[0].tv_usec, &utimes[0].tv_usec) |
- __get_user(times[1].tv_sec, &utimes[1].tv_sec) |
- __get_user(times[1].tv_usec, &utimes[1].tv_usec))
- return -EFAULT;
- }
- return do_utimes(filename, utimes ? times : NULL);
+ if(call<1||call>SYS_RECVMSG)
+ return -EINVAL;
+
+ /* copy_from_user should be SMP safe. */
+ if (copy_from_user(a, args32, socketcall_nargs[call]))
+ return -EFAULT;
+
+ a0=a[0];
+ a1=a[1];
+
+ switch(call)
+ {
+ case SYS_SOCKET:
+ err = sys_socket(a0,a1,a[2]);
+ break;
+ case SYS_BIND:
+ err = sys_bind(a0,(struct sockaddr __user *)A(a1), a[2]);
+ break;
+ case SYS_CONNECT:
+ err = sys_connect(a0, (struct sockaddr __user *)A(a1), a[2]);
+ break;
+ case SYS_LISTEN:
+ err = sys_listen(a0,a1);
+ break;
+ case SYS_ACCEPT:
+ err = sys_accept(a0,(struct sockaddr __user *)A(a1), (int __user *)A(a[2]));
+ break;
+ case SYS_GETSOCKNAME:
+ err = sys_getsockname(a0,(struct sockaddr __user *)A(a1), (int __user *)A(a[2]));
+ break;
+ case SYS_GETPEERNAME:
+ err = sys_getpeername(a0, (struct sockaddr __user *)A(a1), (int __user *)A(a[2]));
+ break;
+ case SYS_SOCKETPAIR:
+ err = sys_socketpair(a0,a1, a[2], (int __user *)A(a[3]));
+ break;
+ case SYS_SEND:
+ err = sys_send(a0, (void __user *)A(a1), a[2], a[3]);
+ break;
+ case SYS_SENDTO:
+ err = sys_sendto(a0,(void __user *)A(a1), a[2], a[3],
+ (struct sockaddr __user *)A(a[4]), a[5]);
+ break;
+ case SYS_RECV:
+ err = sys_recv(a0, (void __user *)A(a1), a[2], a[3]);
+ break;
+ case SYS_RECVFROM:
+ err = sys_recvfrom(a0, (void __user *)A(a1), a[2], a[3],
+ (struct sockaddr __user *)A(a[4]), (int __user *)A(a[5]));
+ break;
+ case SYS_SHUTDOWN:
+ err = sys_shutdown(a0,a1);
+ break;
+ case SYS_SETSOCKOPT:
+ err = sys_setsockopt(a0, a1, a[2], (char __user *)A(a[3]), a[4]);
+ break;
+ case SYS_GETSOCKOPT:
+ err = sys_getsockopt(a0, a1, a[2], (char __user *)A(a[3]), (int __user *)A(a[4]));
+ break;
+ case SYS_SENDMSG:
+ err = sys_sendmsg(a0, (struct msghdr __user *) A(a1), a[2]);
+ break;
+ case SYS_RECVMSG:
+ err = sys_recvmsg(a0, (struct msghdr __user *) A(a1), a[2]);
+ break;
+ default:
+ err = -EINVAL;
+ break;
+ }
+ return err;
}
diff -puN arch/mips/kernel/Makefile~mips-megapatch arch/mips/kernel/Makefile
--- 25/arch/mips/kernel/Makefile~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -24,6 +24,7 @@ obj-$(CONFIG_CPU_R4X00) += r4k_fpu.o r4
obj-$(CONFIG_CPU_R5000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R5432) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_RM7000) += r4k_fpu.o r4k_switch.o
+obj-$(CONFIG_CPU_RM9000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_NEVADA) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R10000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_SB1) += r4k_fpu.o r4k_switch.o
@@ -35,6 +36,7 @@ obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_I8259) += i8259.o
obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
+obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o
obj-$(CONFIG_MIPS32) += scall32-o32.o
obj-$(CONFIG_MIPS64) += scall64-64.o
@@ -47,12 +49,10 @@ obj-$(CONFIG_MIPS32_O32) += binfmt_elfo3
obj-$(CONFIG_KGDB) += gdb-low.o gdb-stub.o
obj-$(CONFIG_PROC_FS) += proc.o
-ifndef CONFIG_MAPPED_DMA_IO
-obj-y += pci-dma.o
-endif
-
obj-$(CONFIG_MIPS64) += cpu-bugs64.o
+obj-$(CONFIG_GEN_RTC) += genrtc.o
+
CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
EXTRA_AFLAGS := $(CFLAGS)
diff -puN arch/mips/kernel/mips_ksyms.c~mips-megapatch arch/mips/kernel/mips_ksyms.c
--- 25/arch/mips/kernel/mips_ksyms.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/mips_ksyms.c 2004-02-19 12:53:00.000000000 -0800
@@ -8,27 +8,10 @@
* Copyright (C) 1996, 97, 98, 99, 2000, 01, 03 by Ralf Baechle
* Copyright (C) 1999, 2000, 01 Silicon Graphics, Inc.
*/
-#include <linux/config.h>
#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/in6.h>
-#include <linux/pci.h>
-#include <linux/tty.h>
-#include <linux/ide.h>
-
-#include <asm/bootinfo.h>
#include <asm/checksum.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/page.h>
-#include <asm/pgalloc.h>
-#include <asm/semaphore.h>
+#include <asm/pgtable.h>
#include <asm/uaccess.h>
-#ifdef CONFIG_BLK_DEV_FD
-#include <asm/floppy.h>
-#endif
extern void *__bzero(void *__s, size_t __count);
extern long __strncpy_from_user_nocheck_asm(char *__to,
@@ -40,11 +23,10 @@ extern long __strlen_user_asm(const char
extern long __strnlen_user_nocheck_asm(const char *s);
extern long __strnlen_user_asm(const char *s);
-EXPORT_SYMBOL(mips_machtype);
-
/*
* String functions
*/
+EXPORT_SYMBOL_NOVERS(memchr);
EXPORT_SYMBOL_NOVERS(memcmp);
EXPORT_SYMBOL_NOVERS(memset);
EXPORT_SYMBOL_NOVERS(memcpy);
@@ -58,7 +40,6 @@ EXPORT_SYMBOL_NOVERS(strnlen);
EXPORT_SYMBOL_NOVERS(strrchr);
EXPORT_SYMBOL_NOVERS(strstr);
-EXPORT_SYMBOL(_clear_page);
EXPORT_SYMBOL(kernel_thread);
/*
@@ -73,24 +54,6 @@ EXPORT_SYMBOL_NOVERS(__strlen_user_asm);
EXPORT_SYMBOL_NOVERS(__strnlen_user_nocheck_asm);
EXPORT_SYMBOL_NOVERS(__strnlen_user_asm);
-EXPORT_SYMBOL(invalid_pte_table);
-
-/*
- * Semaphore stuff
- */
-EXPORT_SYMBOL(__down);
-EXPORT_SYMBOL(__down_interruptible);
-EXPORT_SYMBOL(__down_trylock);
-EXPORT_SYMBOL(__up);
+EXPORT_SYMBOL(csum_partial);
-/*
- * Kernel hacking ...
- */
-#include <asm/branch.h>
-#include <linux/sched.h>
-
-#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
-EXPORT_SYMBOL(ide_ops);
-#endif
-
-EXPORT_SYMBOL(get_wchan);
+EXPORT_SYMBOL(invalid_pte_table);
diff -puN arch/mips/kernel/module-elf32.c~mips-megapatch arch/mips/kernel/module-elf32.c
--- 25/arch/mips/kernel/module-elf32.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/module-elf32.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,20 +1,24 @@
-/* Kernel module help for MIPS.
- Copyright (C) 2001 Rusty Russell.
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Copyright (C) 2001 Rusty Russell.
+ * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
+ */
+
+#undef DEBUG
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
#include <linux/moduleloader.h>
#include <linux/elf.h>
#include <linux/vmalloc.h>
@@ -31,12 +35,6 @@ struct mips_hi16 {
static struct mips_hi16 *mips_hi16_list;
-#if 0
-#define DEBUGP printk
-#else
-#define DEBUGP(fmt , ...)
-#endif
-
void *module_alloc(unsigned long size)
{
if (size == 0)
@@ -53,52 +51,170 @@ void module_free(struct module *mod, voi
table entries. */
}
-/* We don't need anything special. */
-long module_core_size(const Elf32_Ehdr *hdr,
- const Elf32_Shdr *sechdrs,
- const char *secstrings,
- struct module *module)
+int module_frob_arch_sections(Elf_Ehdr *hdr,
+ Elf_Shdr *sechdrs,
+ char *secstrings,
+ struct module *mod)
{
- return module->core_size;
+ return 0;
}
-long module_init_size(const Elf32_Ehdr *hdr,
- const Elf32_Shdr *sechdrs,
- const char *secstrings,
- struct module *module)
+static int apply_r_mips_none(struct module *me, uint32_t *location,
+ Elf32_Addr v)
{
- return module->init_size;
+ return 0;
}
-int module_frob_arch_sections(Elf_Ehdr *hdr,
- Elf_Shdr *sechdrs,
- char *secstrings,
- struct module *mod)
+static int apply_r_mips_32(struct module *me, uint32_t *location,
+ Elf32_Addr v)
+{
+ *location += v;
+
+ return 0;
+}
+
+static int apply_r_mips_26(struct module *me, uint32_t *location,
+ Elf32_Addr v)
+{
+ if (v % 4) {
+ printk(KERN_ERR "module %s: dangerous relocation\n", me->name);
+ return -ENOEXEC;
+ }
+
+ if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
+ printk(KERN_ERR
+ "module %s: relocation overflow\n",
+ me->name);
+ return -ENOEXEC;
+ }
+
+ *location = (*location & ~0x03ffffff) |
+ ((*location + (v >> 2)) & 0x03ffffff);
+
+ return 0;
+}
+
+static int apply_r_mips_hi16(struct module *me, uint32_t *location,
+ Elf32_Addr v)
{
+ struct mips_hi16 *n;
+
+ /*
+ * We cannot relocate this one now because we don't know the value of
+ * the carry we need to add. Save the information, and let LO16 do the
+ * actual relocation.
+ */
+ n = kmalloc(sizeof *n, GFP_KERNEL);
+ if (!n)
+ return -ENOMEM;
+
+ n->addr = location;
+ n->value = v;
+ n->next = mips_hi16_list;
+ mips_hi16_list = n;
+
return 0;
}
+static int apply_r_mips_lo16(struct module *me, uint32_t *location,
+ Elf32_Addr v)
+{
+ unsigned long insnlo = *location;
+ Elf32_Addr val, vallo;
+
+ /* Sign extend the addend we extract from the lo insn. */
+ vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
+
+ if (mips_hi16_list != NULL) {
+ struct mips_hi16 *l;
+
+ l = mips_hi16_list;
+ while (l != NULL) {
+ struct mips_hi16 *next;
+ unsigned long insn;
+
+ /*
+ * The value for the HI16 had best be the same.
+ */
+ if (v != l->value)
+ goto out_danger;
+
+ /*
+ * Do the HI16 relocation. Note that we actually don't
+ * need to know anything about the LO16 itself, except
+ * where to find the low 16 bits of the addend needed
+ * by the LO16.
+ */
+ insn = *l->addr;
+ val = ((insn & 0xffff) << 16) + vallo;
+ val += v;
+
+ /*
+ * Account for the sign extension that will happen in
+ * the low bits.
+ */
+ val = ((val >> 16) + ((val & 0x8000) != 0)) & 0xffff;
+
+ insn = (insn & ~0xffff) | val;
+ *l->addr = insn;
+
+ next = l->next;
+ kfree(l);
+ l = next;
+ }
+
+ mips_hi16_list = NULL;
+ }
+
+ /*
+ * Ok, we're done with the HI16 relocs. Now deal with the LO16.
+ */
+ val = v + vallo;
+ insnlo = (insnlo & ~0xffff) | (val & 0xffff);
+ *location = insnlo;
+
+ return 0;
+
+out_danger:
+ printk(KERN_ERR "module %s: dangerous " "relocation\n", me->name);
+
+ return -ENOEXEC;
+}
+
+static int (*reloc_handlers[]) (struct module *me, uint32_t *location,
+ Elf32_Addr v) = {
+ [R_MIPS_NONE] = apply_r_mips_none,
+ [R_MIPS_32] = apply_r_mips_32,
+ [R_MIPS_26] = apply_r_mips_26,
+ [R_MIPS_HI16] = apply_r_mips_hi16,
+ [R_MIPS_LO16] = apply_r_mips_lo16
+};
+
int apply_relocate(Elf32_Shdr *sechdrs,
const char *strtab,
unsigned int symindex,
unsigned int relsec,
struct module *me)
{
- unsigned int i;
- Elf32_Rel *rel = (void *)sechdrs[relsec].sh_offset;
+ Elf32_Rel *rel = (void *) sechdrs[relsec].sh_addr;
Elf32_Sym *sym;
uint32_t *location;
+ unsigned int i;
Elf32_Addr v;
+ int res;
- DEBUGP("Applying relocate section %u to %u\n", relsec,
+ pr_debug("Applying relocate section %u to %u\n", relsec,
sechdrs[relsec].sh_info);
+
for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
+ Elf32_Word r_info = rel[i].r_info;
+
/* This is where to make the change */
- location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_offset
+ location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+ rel[i].r_offset;
/* This is the symbol it is referring to */
- sym = (Elf32_Sym *)sechdrs[symindex].sh_offset
- + ELF32_R_SYM(rel[i].r_info);
+ sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
+ + ELF32_R_SYM(r_info);
if (!sym->st_value) {
printk(KERN_WARNING "%s: Unknown symbol %s\n",
me->name, strtab + sym->st_name);
@@ -107,115 +223,11 @@ int apply_relocate(Elf32_Shdr *sechdrs,
v = sym->st_value;
- switch (ELF32_R_TYPE(rel[i].r_info)) {
- case R_MIPS_NONE:
- break;
-
- case R_MIPS_32:
- *location += v;
- break;
-
- case R_MIPS_26:
- if (v % 4)
- printk(KERN_ERR
- "module %s: dangerous relocation\n",
- me->name);
- return -ENOEXEC;
- if ((v & 0xf0000000) !=
- (((unsigned long)location + 4) & 0xf0000000))
- printk(KERN_ERR
- "module %s: relocation overflow\n",
- me->name);
- return -ENOEXEC;
- *location = (*location & ~0x03ffffff) |
- ((*location + (v >> 2)) & 0x03ffffff);
- break;
-
- case R_MIPS_HI16: {
- struct mips_hi16 *n;
-
- /*
- * We cannot relocate this one now because we don't
- * know the value of the carry we need to add. Save
- * the information, and let LO16 do the actual
- * relocation.
- */
- n = (struct mips_hi16 *) kmalloc(sizeof *n, GFP_KERNEL);
- n->addr = location;
- n->value = v;
- n->next = mips_hi16_list;
- mips_hi16_list = n;
- break;
- }
-
- case R_MIPS_LO16: {
- unsigned long insnlo = *location;
- Elf32_Addr val, vallo;
-
- /* Sign extend the addend we extract from the lo insn. */
- vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
-
- if (mips_hi16_list != NULL) {
- struct mips_hi16 *l;
-
- l = mips_hi16_list;
- while (l != NULL) {
- struct mips_hi16 *next;
- unsigned long insn;
-
- /*
- * The value for the HI16 had best be
- * the same.
- */
- printk(KERN_ERR "module %s: dangerous "
- "relocation\n", me->name);
- return -ENOEXEC;
-
- /*
- * Do the HI16 relocation. Note that
- * we actually don't need to know
- * anything about the LO16 itself,
- * except where to find the low 16 bits
- * of the addend needed by the LO16.
- */
- insn = *l->addr;
- val = ((insn & 0xffff) << 16) + vallo;
- val += v;
-
- /*
- * Account for the sign extension that
- * will happen in the low bits.
- */
- val = ((val >> 16) + ((val & 0x8000) !=
- 0)) & 0xffff;
-
- insn = (insn & ~0xffff) | val;
- *l->addr = insn;
-
- next = l->next;
- kfree(l);
- l = next;
- }
-
- mips_hi16_list = NULL;
- }
-
- /*
- * Ok, we're done with the HI16 relocs. Now deal with
- * the LO16.
- */
- val = v + vallo;
- insnlo = (insnlo & ~0xffff) | (val & 0xffff);
- *location = insnlo;
- break;
- }
-
- default:
- printk(KERN_ERR "module %s: Unknown relocation: %u\n",
- me->name, ELF32_R_TYPE(rel[i].r_info));
- return -ENOEXEC;
- }
+ res = reloc_handlers[ELF32_R_TYPE(r_info)](me, location, v);
+ if (res)
+ return res;
}
+
return 0;
}
@@ -225,6 +237,13 @@ int apply_relocate_add(Elf32_Shdr *sechd
unsigned int relsec,
struct module *me)
{
+ /*
+ * Current binutils always generate .rela relocations. Keep smiling
+ * if it's empty, abort otherwise.
+ */
+ if (!sechdrs[relsec].sh_size)
+ return 0;
+
printk(KERN_ERR "module %s: ADD RELOCATION unsupported\n",
me->name);
return -ENOEXEC;
diff -puN arch/mips/kernel/module-elf64.c~mips-megapatch arch/mips/kernel/module-elf64.c
--- 25/arch/mips/kernel/module-elf64.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/module-elf64.c 2004-02-19 12:53:00.000000000 -0800
@@ -160,23 +160,6 @@ void module_free(struct module *mod, voi
table entries. */
}
-/* We don't need anything special. */
-long module_core_size(const Elf32_Ehdr *hdr,
- const Elf32_Shdr *sechdrs,
- const char *secstrings,
- struct module *module)
-{
- return module->core_size;
-}
-
-long module_init_size(const Elf32_Ehdr *hdr,
- const Elf32_Shdr *sechdrs,
- const char *secstrings,
- struct module *module)
-{
- return module->init_size;
-}
-
int module_frob_arch_sections(Elf_Ehdr *hdr,
Elf_Shdr *sechdrs,
char *secstrings,
diff -puN arch/mips/kernel/offset.c~mips-megapatch arch/mips/kernel/offset.c
--- 25/arch/mips/kernel/offset.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/offset.c 2004-02-19 12:53:00.000000000 -0800
@@ -8,6 +8,7 @@
* Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc.
*/
+#include <linux/config.h>
#include <linux/compat.h>
#include <linux/types.h>
#include <linux/sched.h>
@@ -22,7 +23,7 @@
#define offset(string, ptr, member) \
__asm__("\n@@@" string "%0" : : "i" (_offset(ptr, member)))
#define constant(string, member) \
- __asm__("\n@@@" string "%x0" : : "i" (member))
+ __asm__("\n@@@" string "%x0" : : "ri" (member))
#define size(string, size) \
__asm__("\n@@@" string "%0" : : "i" (sizeof(size)))
#define linefeed text("")
@@ -202,10 +203,14 @@ void output_thread_fpu_defines(void)
offset("#define THREAD_FCR31 ",
struct task_struct, thread.fpu.hard.fcr31);
+ linefeed;
}
void output_mm_defines(void)
{
+ text("/* Size of struct page */");
+ size("#define STRUCT_PAGE_SIZE ", struct page);
+ linefeed;
text("/* Linux mm_struct offsets. */");
offset("#define MM_USERS ", struct mm_struct, mm_users);
offset("#define MM_PGD ", struct mm_struct, pgd);
@@ -214,8 +219,16 @@ void output_mm_defines(void)
constant("#define _PAGE_SIZE ", PAGE_SIZE);
constant("#define _PAGE_SHIFT ", PAGE_SHIFT);
linefeed;
- constant("#define _PGDIR_SHIFT ", PGDIR_SHIFT);
+ constant("#define _PGD_T_SIZE ", sizeof(pgd_t));
+ constant("#define _PMD_T_SIZE ", sizeof(pmd_t));
+ constant("#define _PTE_T_SIZE ", sizeof(pte_t));
+ linefeed;
+ constant("#define _PGD_T_LOG2 ", PGD_T_LOG2);
+ constant("#define _PMD_T_LOG2 ", PMD_T_LOG2);
+ constant("#define _PTE_T_LOG2 ", PTE_T_LOG2);
+ linefeed;
constant("#define _PMD_SHIFT ", PMD_SHIFT);
+ constant("#define _PGDIR_SHIFT ", PGDIR_SHIFT);
linefeed;
constant("#define _PGD_ORDER ", PGD_ORDER);
constant("#define _PMD_ORDER ", PMD_ORDER);
@@ -223,6 +236,7 @@ void output_mm_defines(void)
linefeed;
constant("#define _PTRS_PER_PGD ", PTRS_PER_PGD);
constant("#define _PTRS_PER_PMD ", PTRS_PER_PMD);
+ constant("#define _PTRS_PER_PTE ", PTRS_PER_PTE);
linefeed;
}
diff -puN -L arch/mips/kernel/pci-dma.c arch/mips/kernel/pci-dma.c~mips-megapatch /dev/null
--- 25/arch/mips/kernel/pci-dma.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,64 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
- * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
- * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
- */
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/pci.h>
-
-#include <asm/io.h>
-
-#ifndef UNCAC_BASE /* Hack ... */
-#define UNCAC_BASE 0x9000000000000000UL
-#endif
-
-void *dma_alloc_coherent(struct device *dev, size_t size,
- dma_addr_t * dma_handle, int gfp)
-{
- void *ret;
- /* ignore region specifiers */
- gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
-
- if (dev == NULL || (*dev->dma_mask < 0xffffffff))
- gfp |= GFP_DMA;
- ret = (void *) __get_free_pages(gfp, get_order(size));
-
- if (ret != NULL) {
- memset(ret, 0, size);
-#if 0 /* Broken support for some platforms ... */
- if (hwdev)
- bus = hwdev->bus;
- *dma_handle = bus_to_baddr(bus, __pa(ret));
-#else
- *dma_handle = virt_to_phys(ret);
-#endif
-#ifdef CONFIG_NONCOHERENT_IO
- dma_cache_wback_inv((unsigned long) ret, size);
- ret = UNCAC_ADDR(ret);
-#endif
- }
-
- return ret;
-}
-
-void dma_free_coherent(struct device *dev, size_t size,
- void *vaddr, dma_addr_t dma_handle)
-{
- unsigned long addr = (unsigned long) vaddr;
-
-#ifdef CONFIG_NONCOHERENT_IO
- addr = CAC_ADDR(addr);
-#endif
- free_pages(addr, get_order(size));
-}
-
-EXPORT_SYMBOL(pci_alloc_consistent);
-EXPORT_SYMBOL(pci_free_consistent);
diff -puN arch/mips/kernel/proc.c~mips-megapatch arch/mips/kernel/proc.c
--- 25/arch/mips/kernel/proc.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/proc.c 2004-02-19 12:53:00.000000000 -0800
@@ -11,6 +11,7 @@
#include <linux/seq_file.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
+#include <asm/cpu-features.h>
#include <asm/mipsregs.h>
#include <asm/processor.h>
#include <asm/watch.h>
@@ -39,6 +40,7 @@ static const char *cpu_name[] = {
[CPU_R6000A] "R6000A",
[CPU_R8000] "R8000",
[CPU_R10000] "R10000",
+ [CPU_R12000] "R12000",
[CPU_R4300] "R4300",
[CPU_R4650] "R4650",
[CPU_R4700] "R4700",
@@ -47,6 +49,7 @@ static const char *cpu_name[] = {
[CPU_R4640] "R4640",
[CPU_NEVADA] "Nevada",
[CPU_RM7000] "RM7000",
+ [CPU_RM9000] "RM9000",
[CPU_R5432] "R5432",
[CPU_4KC] "MIPS 4Kc",
[CPU_5KC] "MIPS 5Kc",
@@ -63,10 +66,13 @@ static const char *cpu_name[] = {
[CPU_R5500] "R5500",
[CPU_TX49XX] "TX49xx",
[CPU_20KC] "MIPS 20Kc",
+ [CPU_24K] "MIPS 24K",
+ [CPU_25KF] "MIPS 25Kf",
[CPU_VR4111] "NEC VR4111",
[CPU_VR4121] "NEC VR4121",
[CPU_VR4122] "NEC VR4122",
[CPU_VR4131] "NEC VR4131",
+ [CPU_VR4133] "NEC VR4133",
[CPU_VR4181] "NEC VR4181",
[CPU_VR4181A] "NEC VR4181A",
[CPU_SR71000] "Sandcraft SR71000"
diff -puN arch/mips/kernel/process.c~mips-megapatch arch/mips/kernel/process.c
--- 25/arch/mips/kernel/process.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/process.c 2004-02-19 12:53:00.000000000 -0800
@@ -6,7 +6,9 @@
* Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
+#include <linux/config.h>
#include <linux/errno.h>
+#include <linux/module.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
@@ -246,7 +248,8 @@ static int __init get_frame_info(struct
return 0;
}
-void __init frame_info_init(void)
+
+static int __init frame_info_init(void)
{
mips_frame_info_initialized =
!get_frame_info(&schedule_frame, schedule) &&
@@ -254,8 +257,12 @@ void __init frame_info_init(void)
!get_frame_info(&sleep_on_frame, sleep_on) &&
!get_frame_info(&sleep_on_timeout_frame, sleep_on_timeout) &&
!get_frame_info(&wait_for_completion_frame, wait_for_completion);
+
+ return 0;
}
+arch_initcall(frame_info_init);
+
/*
* Return saved PC of a blocked thread.
*/
@@ -341,3 +348,5 @@ out:
return pc;
}
+
+EXPORT_SYMBOL(get_wchan);
diff -puN arch/mips/kernel/ptrace32.c~mips-megapatch arch/mips/kernel/ptrace32.c
--- 25/arch/mips/kernel/ptrace32.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/ptrace32.c 2004-02-19 12:53:00.000000000 -0800
@@ -14,7 +14,6 @@
* At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
* binaries.
*/
-#include <linux/config.h>
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/sched.h>
diff -puN arch/mips/kernel/ptrace.c~mips-megapatch arch/mips/kernel/ptrace.c
--- 25/arch/mips/kernel/ptrace.c~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/ptrace.c 2004-02-19 12:53:00.000000000 -0800
@@ -108,7 +108,7 @@ asmlinkage int sys_ptrace(long request,
/* Read the word at location addr in the USER area. */
case PTRACE_PEEKUSR: {
struct pt_regs *regs;
- unsigned long tmp;
+ unsigned long tmp = 0;
regs = (struct pt_regs *) ((unsigned long) child->thread_info +
THREAD_SIZE - 32 - sizeof(struct pt_regs));
@@ -312,13 +312,9 @@ asmlinkage void do_syscall_trace(void)
/* The 0x80 provides a way for the tracing parent to distinguish
between a syscall stop and SIGTRAP delivery */
- current->exit_code = SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
- ? 0x80 : 0);
- preempt_disable();
- current->state = TASK_STOPPED;
- notify_parent(current, SIGCHLD);
- schedule();
- preempt_enable();
+ ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
+ 0x80 : 0));
+
/*
* this isn't the same as continuing with a signal, but it will do
* for normal use. strace only continues with a signal if the
diff -puN arch/mips/kernel/r2300_switch.S~mips-megapatch arch/mips/kernel/r2300_switch.S
--- 25/arch/mips/kernel/r2300_switch.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/r2300_switch.S 2004-02-19 12:53:00.000000000 -0800
@@ -17,7 +17,6 @@
#include <asm/mipsregs.h>
#include <asm/offset.h>
#include <asm/page.h>
-#include <asm/processor.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#include <asm/thread_info.h>
@@ -31,7 +30,7 @@
* Offset to the current process status flags, the first 32 bytes of the
* stack are not used.
*/
-#define ST_OFF (THREAD_SIZE - 32 - PT_SIZE + PT_STATUS)
+#define ST_OFF (_THREAD_SIZE - 32 - PT_SIZE + PT_STATUS)
/*
* FPU context is saved iff the process has used it's FPU in the current
@@ -87,7 +86,7 @@ LEAF(resume)
move $28, a2
cpu_restore_nonscratch a1
- addiu t1, $28, THREAD_SIZE-32
+ addiu t1, $28, _THREAD_SIZE - 32
sw t1, kernelsp
mfc0 t1, CP0_STATUS /* Do we really need this? */
diff -puN arch/mips/kernel/r4k_fpu.S~mips-megapatch arch/mips/kernel/r4k_fpu.S
--- 25/arch/mips/kernel/r4k_fpu.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/r4k_fpu.S 2004-02-19 12:53:00.000000000 -0800
@@ -12,6 +12,7 @@
* Copyright (C) 2000 MIPS Technologies, Inc.
* Copyright (C) 1999, 2001 Silicon Graphics, Inc.
*/
+#include <linux/config.h>
#include <asm/asm.h>
#include <asm/errno.h>
#include <asm/fpregdef.h>
diff -puN arch/mips/kernel/r4k_switch.S~mips-megapatch arch/mips/kernel/r4k_switch.S
--- 25/arch/mips/kernel/r4k_switch.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/r4k_switch.S 2004-02-19 12:53:00.000000000 -0800
@@ -18,15 +18,12 @@
#include <asm/offset.h>
#include <asm/page.h>
#include <asm/pgtable-bits.h>
-#include <asm/processor.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#include <asm/thread_info.h>
#include <asm/asmmacro.h>
- .set mips3
-
/*
* Offset to the current process status flags, the first 32 bytes of the
* stack are not used.
@@ -196,7 +193,42 @@ LEAF(_init_fpu)
dmtc1 t1, $f31
1:
#endif
-
+
+#ifdef CONFIG_CPU_MIPS32
+ mtc1 t1, $f0
+ mtc1 t1, $f1
+ mtc1 t1, $f2
+ mtc1 t1, $f3
+ mtc1 t1, $f4
+ mtc1 t1, $f5
+ mtc1 t1, $f6
+ mtc1 t1, $f7
+ mtc1 t1, $f8
+ mtc1 t1, $f9
+ mtc1 t1, $f10
+ mtc1 t1, $f11
+ mtc1 t1, $f12
+ mtc1 t1, $f13
+ mtc1 t1, $f14
+ mtc1 t1, $f15
+ mtc1 t1, $f16
+ mtc1 t1, $f17
+ mtc1 t1, $f18
+ mtc1 t1, $f19
+ mtc1 t1, $f20
+ mtc1 t1, $f21
+ mtc1 t1, $f22
+ mtc1 t1, $f23
+ mtc1 t1, $f24
+ mtc1 t1, $f25
+ mtc1 t1, $f26
+ mtc1 t1, $f27
+ mtc1 t1, $f28
+ mtc1 t1, $f29
+ mtc1 t1, $f30
+ mtc1 t1, $f31
+#else
+ .set mips3
dmtc1 t1, $f0
dmtc1 t1, $f2
dmtc1 t1, $f4
@@ -213,5 +245,6 @@ LEAF(_init_fpu)
dmtc1 t1, $f26
dmtc1 t1, $f28
dmtc1 t1, $f30
+#endif
jr ra
END(_init_fpu)
diff -puN arch/mips/kernel/scall32-o32.S~mips-megapatch arch/mips/kernel/scall32-o32.S
--- 25/arch/mips/kernel/scall32-o32.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/scall32-o32.S 2004-02-19 12:53:00.000000000 -0800
@@ -72,14 +72,12 @@ EXPORT(o32_syscall_exit)
LONG_L a2, TI_FLAGS($28) # current->work
li t0, _TIF_ALLWORK_MASK
and t0, a2, t0
- bnez a2, o32_syscall_exit_work
+ bnez t0, o32_syscall_exit_work
- RESTORE_SOME
- RESTORE_SP_AND_RET
+ j restore_partial
o32_syscall_exit_work:
- SAVE_STATIC
- j syscall_exit_work
+ j syscall_exit_work_partial
/* ------------------------------------------------------------------------ */
@@ -124,7 +122,7 @@ stackargs:
bltz t0, bad_stack # -> sp is bad
lw t0, PT_R29(sp) # get old user stack pointer
- PTR_LA t1, 3f # copy 1 to 2 arguments
+ PTR_LA t1, 4f # copy 1 to 3 arguments
sll t3, t3, 4
subu t1, t3
jr t1
@@ -139,21 +137,26 @@ stackargs:
.set push
.set noreorder
.set nomacro
-1: lw t1, 20(t0) # argument #6 from usp
+1: lw t1, 24(t0) # argument #7 from usp
+ nop
+ sw t1, 24(sp)
+ nop
+2: lw t1, 20(t0) # argument #5 from usp
nop
sw t1, 20(sp)
nop
-2: lw t1, 16(t0) # argument #5 from usp
+3: lw t1, 16(t0) # argument #5 from usp
nop
sw t1, 16(sp)
nop
-3: .set pop
+4: .set pop
j stack_done # go back
.section __ex_table,"a"
PTR 1b,bad_stack
PTR 2b,bad_stack
+ PTR 3b,bad_stack
.previous
/*
@@ -225,8 +228,8 @@ illegal_syscall:
.previous
#endif
+ sw zero, PT_R7(sp) # success
sw v0, PT_R2(sp) # result
-1:
/* Success, so skip usual error handling garbage. */
LONG_L a2, TI_FLAGS($28) # syscall tracing enabled?
@@ -597,7 +600,7 @@ out: jr ra
sys sys_remap_file_pages 5
sys sys_set_tid_address 1
sys sys_restart_syscall 0
- sys sys_fadvise64 6
+ sys sys_fadvise64_64 7
sys sys_statfs64 3 /* 4255 */
sys sys_fstatfs64 2
sys sys_timer_create 3
diff -puN arch/mips/kernel/scall64-64.S~mips-megapatch arch/mips/kernel/scall64-64.S
--- 25/arch/mips/kernel/scall64-64.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/scall64-64.S 2004-02-19 12:53:00.000000000 -0800
@@ -71,21 +71,14 @@ syscall_exit:
# signals dont change between
# sampling and return
LONG_L a2, TI_FLAGS($28) # current->work
- bnez a2, n64_syscall_exit_work
-
- j restore_all
+ li t0, _TIF_ALLWORK_MASK
+ and t0, a2, t0
+ bnez t0, n64_syscall_exit_work
-work_notifysig: # deal with pending signals and
- # notify-resume requests
- SAVE_STATIC
- move a0, sp
- li a1, 0
- jal do_notify_resume # a2 already loaded
- RESTORE_STATIC
- j restore_all
+ j restore_partial
n64_syscall_exit_work:
- j syscall_exit_work
+ j syscall_exit_work_partial
/* ------------------------------------------------------------------------ */
@@ -167,8 +160,8 @@ illegal_syscall:
.previous
#endif
- sw v0, PT_R2(sp) # result
-1:
+ sd zero, PT_R7(sp) # success
+ sd v0, PT_R2(sp) # result
/* Success, so skip usual error handling garbage. */
LONG_L a2, TI_FLAGS($28) # syscall tracing enabled?
@@ -221,7 +214,7 @@ sys_call_table:
PTR sys_newlstat
PTR sys_poll
PTR sys_lseek
- PTR sys_mmap2
+ PTR old_mmap
PTR sys_mprotect /* 5010 */
PTR sys_munmap
PTR sys_brk
@@ -405,7 +398,7 @@ sys_call_table:
PTR sys_lremovexattr /* 5190 */
PTR sys_fremovexattr
PTR sys_tkill
- PTR sys_time
+ PTR sys_ni_syscall
PTR sys_futex
PTR sys_sched_setaffinity /* 5195 */
PTR sys_sched_getaffinity
@@ -427,7 +420,7 @@ sys_call_table:
PTR sys_set_tid_address
PTR sys_restart_syscall
PTR sys_semtimedop
- PTR sys_fadvise64 /* 5215 */
+ PTR sys_fadvise64_64 /* 5215 */
PTR sys_timer_create
PTR sys_timer_settime
PTR sys_timer_gettime
diff -puN arch/mips/kernel/scall64-n32.S~mips-megapatch arch/mips/kernel/scall64-n32.S
--- 25/arch/mips/kernel/scall64-n32.S~mips-megapatch 2004-02-19 12:52:58.000000000 -0800
+++ 25-akpm/arch/mips/kernel/scall64-n32.S 2004-02-19 12:53:00.000000000 -0800
@@ -14,6 +14,7 @@
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
+#include <asm/thread_info.h>
#include <asm/unistd.h>
/* This duplicates the definition from <linux/sched.h> */
@@ -67,14 +68,14 @@ FEXPORT(n32_syscall_exit)
# signals dont change between
# sampling and return
LONG_L a2, TI_FLAGS($28) # current->work
- bnez a2, n32_syscall_exit_work
+ li t0, _TIF_ALLWORK_MASK
+ and t0, a2, t0
+ bnez t0, n32_syscall_exit_work
- RESTORE_SOME
- RESTORE_SP_AND_RET
+ j restore_partial
n32_syscall_exit_work:
- SAVE_STATIC
- j syscall_exit_work
+ j syscall_exit_work_partial
/* ------------------------------------------------------------------------ */
@@ -118,7 +119,7 @@ EXPORT(sysn32_call_table)
PTR sys_newlstat
PTR sys_poll
PTR sys_lseek
- PTR sys_mmap2
+ PTR old_mmap
PTR sys_mprotect /* 6010 */
PTR sys_munmap
PTR sys_brk
@@ -302,10 +303,10 @@ EXPORT(sysn32_call_table)
PTR sys_lremovexattr /* 6190 */
PTR sys_fremovexattr
PTR sys_tkill
- PTR sys_time
+ PTR sys_ni_syscall
PTR compat_sys_futex
- PTR sys32_sched_setaffinity /* 6195 */
- PTR sys32_sched_getaffinity
+ PTR compat_sys_sched_setaffinity /* 6195 */
+ PTR compat_sys_sched_getaffinity
PTR sys_cacheflush
PTR sys_cachectl
PTR sys_sysmips
@@ -325,7 +326,7 @@ EXPORT(sysn32_call_table)
PTR sys_set_tid_address
PTR sys_restart_syscall
PTR sys_semtimedop /* 6215 */
- PTR sys_fadvise64
+ PTR sys_fadvise64_64
PTR sys_statfs64
PTR sys_fstatfs64
PTR sys_sendfile64
diff -puN arch/mips/kernel/scall64-o32.S~mips-megapatch arch/mips/kernel/scall64-o32.S
--- 25/arch/mips/kernel/scall64-o32.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/scall64-o32.S 2004-02-19 12:53:00.000000000 -0800
@@ -12,12 +12,14 @@
* to ABI64 calling convention. 64-bit syscalls are also processed
* here for now.
*/
+#include <linux/config.h>
#include <linux/errno.h>
#include <asm/asm.h>
#include <asm/asmmacro.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
+#include <asm/thread_info.h>
#include <asm/unistd.h>
#include <asm/sysmips.h>
@@ -76,14 +78,14 @@ FEXPORT(o32_syscall_exit)
# signals dont change between
# sampling and return
LONG_L a2, TI_FLAGS($28)
- bnez a2, o32_syscall_exit_work
+ li t0, _TIF_ALLWORK_MASK
+ and t0, a2, t0
+ bnez t0, o32_syscall_exit_work
- RESTORE_SOME
- RESTORE_SP_AND_RET
+ j restore_partial
o32_syscall_exit_work:
- SAVE_STATIC
- j syscall_exit_work
+ j syscall_exit_work_partial
/* ------------------------------------------------------------------------ */
@@ -315,7 +317,7 @@ out: jr ra
sys sys_olduname 1
sys sys_umask 1 /* 4060 */
sys sys_chroot 1
- sys sys_ustat 2
+ sys sys32_ustat 2
sys sys_dup2 2
sys sys_getppid 0
sys sys_getpgrp 0 /* 4065 */
@@ -355,7 +357,7 @@ out: jr ra
sys compat_sys_statfs 2
sys compat_sys_fstatfs 2 /* 4100 */
sys sys_ni_syscall 0 /* sys_ioperm */
- sys sys_socketcall 2
+ sys sys32_socketcall 2
sys sys_syslog 3
sys compat_sys_setitimer 3
sys compat_sys_getitimer 2 /* 4105 */
@@ -492,8 +494,8 @@ out: jr ra
sys sys_tkill 2
sys sys_sendfile64 5
sys compat_sys_futex 5
- sys sys32_sched_setaffinity 3
- sys sys32_sched_getaffinity 3 /* 4240 */
+ sys compat_sys_sched_setaffinity 3
+ sys compat_sys_sched_getaffinity 3 /* 4240 */
sys sys_io_setup 2
sys sys_io_destroy 1
sys sys_io_getevents 5
@@ -507,7 +509,7 @@ out: jr ra
sys sys_remap_file_pages 5
sys sys_set_tid_address 1
sys sys_restart_syscall 0
- sys sys_fadvise64 6
+ sys sys_fadvise64_64 7
sys sys_statfs64 3 /* 4255 */
sys sys_fstatfs64 2
sys sys_timer_create 3
diff -puN arch/mips/kernel/semaphore.c~mips-megapatch arch/mips/kernel/semaphore.c
--- 25/arch/mips/kernel/semaphore.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/semaphore.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,129 +1,272 @@
/*
- * Generic semaphore code. Buyer beware. Do your own
- * specific changes in <asm/semaphore-helper.h>
+ * Copyright (C) 1999, 2001, 02, 03 Ralf Baechle
+ *
+ * Heavily inspired by the Alpha implementation
*/
-
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/module.h>
#include <linux/sched.h>
-#include <asm/semaphore-helper.h>
+
+#ifdef CONFIG_CPU_HAS_LLDSCD
+/*
+ * On machines without lld/scd we need a spinlock to make the manipulation of
+ * sem->count and sem->waking atomic. Scalability isn't an issue because
+ * this lock is used on UP only so it's just an empty variable.
+ */
+spinlock_t semaphore_lock = SPIN_LOCK_UNLOCKED;
+
+EXPORT_SYMBOL(semaphore_lock);
+#endif
/*
- * Semaphores are implemented using a two-way counter:
- * The "count" variable is decremented for each process
- * that tries to sleep, while the "waking" variable is
- * incremented when the "up()" code goes to wake up waiting
- * processes.
- *
- * Notably, the inline "up()" and "down()" functions can
- * efficiently test if they need to do any extra work (up
- * needs to do something only if count was negative before
- * the increment operation.
- *
- * waking_non_zero() (from asm/semaphore.h) must execute
- * atomically.
- *
- * When __up() is called, the count was negative before
- * incrementing it, and we need to wake up somebody.
- *
- * This routine adds one to the count of processes that need to
- * wake up and exit. ALL waiting processes actually wake up but
- * only the one that gets to the "waking" field first will gate
- * through and acquire the semaphore. The others will go back
- * to sleep.
- *
- * Note that these functions are only called when there is
- * contention on the lock, and as such all this is the
- * "non-critical" part of the whole semaphore business. The
- * critical part is the inline stuff in <asm/semaphore.h>
- * where we want to avoid any extra jumps and calls.
+ * Semaphores are implemented using a two-way counter: The "count" variable is
+ * decremented for each process that tries to sleep, while the "waking" variable
+ * is incremented when the "up()" code goes to wake up waiting processes.
+ *
+ * Notably, the inline "up()" and "down()" functions can efficiently test if
+ * they need to do any extra work (up needs to do something only if count was
+ * negative before the increment operation.
+ *
+ * waking_non_zero() must execute atomically.
+ *
+ * When __up() is called, the count was negative before incrementing it, and we
+ * need to wake up somebody.
+ *
+ * This routine adds one to the count of processes that need to wake up and
+ * exit. ALL waiting processes actually wake up but only the one that gets to
+ * the "waking" field first will gate through and acquire the semaphore. The
+ * others will go back to sleep.
+ *
+ * Note that these functions are only called when there is contention on the
+ * lock, and as such all this is the "non-critical" part of the whole semaphore
+ * business. The critical part is the inline stuff in <asm/semaphore.h> where
+ * we want to avoid any extra jumps and calls.
*/
-void __up(struct semaphore *sem)
+void __up_wakeup(struct semaphore *sem)
{
- wake_one_more(sem);
wake_up(&sem->wait);
}
+EXPORT_SYMBOL(__up_wakeup);
+
+#ifdef CONFIG_CPU_HAS_LLSC
+
+static inline int waking_non_zero(struct semaphore *sem)
+{
+ int ret, tmp;
+
+ __asm__ __volatile__(
+ "1: ll %1, %2 # waking_non_zero \n"
+ " blez %1, 2f \n"
+ " subu %0, %1, 1 \n"
+ " sc %0, %2 \n"
+ " beqz %0, 1b \n"
+ "2: \n"
+ : "=r" (ret), "=r" (tmp), "+m" (sem->waking)
+ : "0" (0));
+
+ return ret;
+}
+
+#else /* !CONFIG_CPU_HAS_LLSC */
+
+static inline int waking_non_zero(struct semaphore *sem)
+{
+ unsigned long flags;
+ int waking, ret = 0;
+
+ spin_lock_irqsave(&semaphore_lock, flags);
+ waking = atomic_read(&sem->waking);
+ if (waking > 0) {
+ atomic_set(&sem->waking, waking - 1);
+ ret = 1;
+ }
+ spin_unlock_irqrestore(&semaphore_lock, flags);
+
+ return ret;
+}
+
+#endif /* !CONFIG_CPU_HAS_LLSC */
+
/*
- * Perform the "down" function. Return zero for semaphore acquired,
- * return negative for signalled out of the function.
+ * Perform the "down" function. Return zero for semaphore acquired, return
+ * negative for signalled out of the function.
*
- * If called from __down, the return is ignored and the wait loop is
- * not interruptible. This means that a task waiting on a semaphore
- * using "down()" cannot be killed until someone does an "up()" on
- * the semaphore.
- *
- * If called from __down_interruptible, the return value gets checked
- * upon return. If the return value is negative then the task continues
- * with the negative value in the return register (it can be tested by
- * the caller).
+ * If called from down, the return is ignored and the wait loop is not
+ * interruptible. This means that a task waiting on a semaphore using "down()"
+ * cannot be killed until someone does an "up()" on the semaphore.
*
- * Either form may be used in conjunction with "up()".
+ * If called from down_interruptible, the return value gets checked upon return.
+ * If the return value is negative then the task continues with the negative
+ * value in the return register (it can be tested by the caller).
*
+ * Either form may be used in conjunction with "up()".
*/
-#define DOWN_VAR \
- struct task_struct *tsk = current; \
- wait_queue_t wait; \
+void __down_failed(struct semaphore * sem)
+{
+ struct task_struct *tsk = current;
+ wait_queue_t wait;
+
init_waitqueue_entry(&wait, tsk);
+ __set_current_state(TASK_UNINTERRUPTIBLE);
+ add_wait_queue_exclusive(&sem->wait, &wait);
-#define DOWN_HEAD(task_state) \
- \
- \
- tsk->state = (task_state); \
- add_wait_queue(&sem->wait, &wait); \
- \
- /* \
- * Ok, we're set up. sem->count is known to be less than zero \
- * so we must wait. \
- * \
- * We can let go the lock for purposes of waiting. \
- * We re-acquire it after awaking so as to protect \
- * all semaphore operations. \
- * \
- * If "up()" is called before we call waking_non_zero() then \
- * we will catch it right away. If it is called later then \
- * we will have to go through a wakeup cycle to catch it. \
- * \
- * Multiple waiters contend for the semaphore lock to see \
- * who gets to gate through and who has to wait some more. \
- */ \
+ /*
+ * Ok, we're set up. sem->count is known to be less than zero
+ * so we must wait.
+ *
+ * We can let go the lock for purposes of waiting.
+ * We re-acquire it after awaking so as to protect
+ * all semaphore operations.
+ *
+ * If "up()" is called before we call waking_non_zero() then
+ * we will catch it right away. If it is called later then
+ * we will have to go through a wakeup cycle to catch it.
+ *
+ * Multiple waiters contend for the semaphore lock to see
+ * who gets to gate through and who has to wait some more.
+ */
for (;;) {
-
-#define DOWN_TAIL(task_state) \
- tsk->state = (task_state); \
- } \
- tsk->state = TASK_RUNNING; \
+ if (waking_non_zero(sem))
+ break;
+ schedule();
+ __set_current_state(TASK_UNINTERRUPTIBLE);
+ }
+ __set_current_state(TASK_RUNNING);
remove_wait_queue(&sem->wait, &wait);
+}
+
+EXPORT_SYMBOL(__down_failed);
+
+#ifdef CONFIG_CPU_HAS_LLDSCD
+
+/*
+ * waking_non_zero_interruptible:
+ * 1 got the lock
+ * 0 go to sleep
+ * -EINTR interrupted
+ *
+ * We must undo the sem->count down_interruptible decrement
+ * simultaneously and atomically with the sem->waking adjustment,
+ * otherwise we can race with wake_one_more.
+ *
+ * This is accomplished by doing a 64-bit lld/scd on the 2 32-bit words.
+ *
+ * This is crazy. Normally it's strictly forbidden to use 64-bit operations
+ * in the 32-bit MIPS kernel. In this case it's however ok because if an
+ * interrupt has destroyed the upper half of registers sc will fail.
+ * Note also that this will not work for MIPS32 CPUs!
+ *
+ * Pseudocode:
+ *
+ * If(sem->waking > 0) {
+ * Decrement(sem->waking)
+ * Return(SUCCESS)
+ * } else If(signal_pending(tsk)) {
+ * Increment(sem->count)
+ * Return(-EINTR)
+ * } else {
+ * Return(SLEEP)
+ * }
+ */
-void __down(struct semaphore * sem)
+static inline int
+waking_non_zero_interruptible(struct semaphore *sem, struct task_struct *tsk)
{
- DOWN_VAR
- DOWN_HEAD(TASK_UNINTERRUPTIBLE)
- if (waking_non_zero(sem))
- break;
- schedule();
- DOWN_TAIL(TASK_UNINTERRUPTIBLE)
+ long ret, tmp;
+
+ __asm__ __volatile__(
+ " .set push # waking_non_zero_interruptible \n"
+ " .set mips3 \n"
+ " .set noat \n"
+ "0: lld %1, %2 \n"
+ " li %0, 0 \n"
+ " sll $1, %1, 0 \n"
+ " blez $1, 1f \n"
+ " daddiu %1, %1, -1 \n"
+ " li %0, 1 \n"
+ " b 2f \n"
+ "1: beqz %3, 2f \n"
+ " li %0, %4 \n"
+ " dli $1, 0x0000000100000000 \n"
+ " daddu %1, %1, $1 \n"
+ "2: scd %1, %2 \n"
+ " beqz %1, 0b \n"
+ " .set pop \n"
+ : "=&r" (ret), "=&r" (tmp), "=m" (*sem)
+ : "r" (signal_pending(tsk)), "i" (-EINTR));
+
+ return ret;
}
-int __down_interruptible(struct semaphore * sem)
+#else /* !CONFIG_CPU_HAS_LLDSCD */
+
+static inline int waking_non_zero_interruptible(struct semaphore *sem,
+ struct task_struct *tsk)
{
- int ret = 0;
- DOWN_VAR
- DOWN_HEAD(TASK_INTERRUPTIBLE)
+ int waking, pending, ret = 0;
+ unsigned long flags;
- ret = waking_non_zero_interruptible(sem, tsk);
- if (ret)
- {
- if (ret == 1)
- /* ret != 0 only if we get interrupted -arca */
- ret = 0;
- break;
+ pending = signal_pending(tsk);
+
+ spin_lock_irqsave(&semaphore_lock, flags);
+ waking = atomic_read(&sem->waking);
+ if (waking > 0) {
+ atomic_set(&sem->waking, waking - 1);
+ ret = 1;
+ } else if (pending) {
+ atomic_set(&sem->count, atomic_read(&sem->count) + 1);
+ ret = -EINTR;
}
- schedule();
- DOWN_TAIL(TASK_INTERRUPTIBLE)
+ spin_unlock_irqrestore(&semaphore_lock, flags);
+
return ret;
}
-int __down_trylock(struct semaphore * sem)
+#endif /* !CONFIG_CPU_HAS_LLDSCD */
+
+int __down_failed_interruptible(struct semaphore * sem)
{
- return waking_non_zero_trylock(sem);
+ struct task_struct *tsk = current;
+ wait_queue_t wait;
+ int ret = 0;
+
+ init_waitqueue_entry(&wait, tsk);
+ __set_current_state(TASK_INTERRUPTIBLE);
+ add_wait_queue_exclusive(&sem->wait, &wait);
+
+ /*
+ * Ok, we're set up. sem->count is known to be less than zero
+ * so we must wait.
+ *
+ * We can let go the lock for purposes of waiting.
+ * We re-acquire it after awaking so as to protect
+ * all semaphore operations.
+ *
+ * If "up()" is called before we call waking_non_zero() then
+ * we will catch it right away. If it is called later then
+ * we will have to go through a wakeup cycle to catch it.
+ *
+ * Multiple waiters contend for the semaphore lock to see
+ * who gets to gate through and who has to wait some more.
+ */
+ for (;;) {
+ ret = waking_non_zero_interruptible(sem, tsk);
+ if (ret) {
+ if (ret == 1)
+ /* ret != 0 only if we get interrupted -arca */
+ ret = 0;
+ break;
+ }
+ schedule();
+ __set_current_state(TASK_INTERRUPTIBLE);
+ }
+ __set_current_state(TASK_RUNNING);
+ remove_wait_queue(&sem->wait, &wait);
+
+ return ret;
}
+
+EXPORT_SYMBOL(__down_failed_interruptible);
diff -puN arch/mips/kernel/setup.c~mips-megapatch arch/mips/kernel/setup.c
--- 25/arch/mips/kernel/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -31,6 +31,8 @@
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
+#include <linux/highmem.h>
+#include <linux/console.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
@@ -40,25 +42,21 @@
struct cpuinfo_mips cpu_data[NR_CPUS];
+EXPORT_SYMBOL(cpu_data);
+
#ifdef CONFIG_VT
struct screen_info screen_info;
#endif
-#if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
-extern struct fd_ops no_fd_ops;
-struct fd_ops *fd_ops;
-#endif
+/*
+ * Despite it's name this variable is even if we don't have PCI
+ */
+unsigned int PCI_DMA_BUS_IS_PHYS;
-#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
-extern struct ide_ops no_ide_ops;
-struct ide_ops *ide_ops;
-#endif
+EXPORT_SYMBOL(PCI_DMA_BUS_IS_PHYS);
extern void * __rd_start, * __rd_end;
-extern struct rtc_ops no_rtc_ops;
-struct rtc_ops *rtc_ops;
-
/*
* Setup information
*
@@ -67,11 +65,14 @@ struct rtc_ops *rtc_ops;
unsigned long mips_machtype = MACH_UNKNOWN;
unsigned long mips_machgroup = MACH_GROUP_UNKNOWN;
+EXPORT_SYMBOL(mips_machtype);
+EXPORT_SYMBOL(mips_machgroup);
+
struct boot_mem_map boot_mem_map;
static char command_line[CL_SIZE];
char saved_command_line[CL_SIZE];
-extern char arcs_cmdline[CL_SIZE];
+ char arcs_cmdline[CL_SIZE]=CONFIG_CMDLINE;
/*
* mips_io_port_base is the begin of the address space to which x86 style
@@ -87,53 +88,22 @@ EXPORT_SYMBOL(mips_io_port_base);
unsigned long isa_slot_offset;
EXPORT_SYMBOL(isa_slot_offset);
-extern void SetUpBootInfo(void);
-extern void load_mmu(void);
-extern ATTRIB_NORET asmlinkage void start_kernel(void);
-extern void prom_init(int, char **, char **, int *);
-
static struct resource code_resource = { "Kernel code" };
static struct resource data_resource = { "Kernel data" };
-asmlinkage void __init init_arch(int argc, char **argv, char **envp,
- int *prom_vec)
+void __init add_memory_region(phys_t start, phys_t size, long type)
{
- /* Determine which MIPS variant we are running on. */
- cpu_probe();
-
- prom_init(argc, argv, envp, prom_vec);
-
- cpu_report();
-
- /*
- * Determine the mmu/cache attached to this machine, then flush the
- * tlb and caches. On the r4xx0 variants this also sets CP0_WIRED to
- * zero.
- */
- load_mmu();
+ int x = boot_mem_map.nr_map;
+ struct boot_mem_map_entry *prev = boot_mem_map.map + x - 1;
-#ifdef CONFIG_MIPS32
- /* Disable coprocessors and set FPU for 16/32 FPR register model */
- clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
- set_c0_status(ST0_CU0);
-#endif
-#ifdef CONFIG_MIPS64
/*
- * On IP27, I am seeing the TS bit set when the kernel is loaded.
- * Maybe because the kernel is in ckseg0 and not xkphys? Clear it
- * anyway ...
+ * Try to merge with previous entry if any. This is far less than
+ * perfect but is sufficient for most real world cases.
*/
- clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
- set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
-#endif
-
- start_kernel();
-}
-
-void __init add_memory_region(phys_t start, phys_t size,
- long type)
-{
- int x = boot_mem_map.nr_map;
+ if (x && prev->addr + prev->size == start && prev->type == type) {
+ prev->size += size;
+ return;
+ }
if (x == BOOT_MEM_MAP_MAX) {
printk("Ooops! Too many entries in the memory map!\n");
@@ -149,11 +119,12 @@ void __init add_memory_region(phys_t sta
static void __init print_memory_map(void)
{
int i;
+ const int field = 2 * sizeof(unsigned long);
for (i = 0; i < boot_mem_map.nr_map; i++) {
printk(" memory: %0*Lx @ %0*Lx ",
- sizeof(long) * 2, (u64) boot_mem_map.map[i].size,
- sizeof(long) * 2, (u64) boot_mem_map.map[i].addr);
+ field, (unsigned long long) boot_mem_map.map[i].size,
+ field, (unsigned long long) boot_mem_map.map[i].addr);
switch (boot_mem_map.map[i].type) {
case BOOT_MEM_RAM:
@@ -233,15 +204,15 @@ static inline void parse_cmdline_early(v
static inline void bootmem_init(void)
{
+ unsigned long start_pfn;
+#ifndef CONFIG_SGI_IP27
+ unsigned long bootmap_size, max_low_pfn, first_usable_pfn;
+ int i;
+#endif
#ifdef CONFIG_BLK_DEV_INITRD
unsigned long tmp;
unsigned long *initrd_header;
-#endif
- unsigned long bootmap_size;
- unsigned long start_pfn, max_low_pfn, first_usable_pfn;
- int i;
-#ifdef CONFIG_BLK_DEV_INITRD
tmp = (((unsigned long)&_end + PAGE_SIZE-1) & PAGE_MASK) - 8;
if (tmp < (unsigned long)&_end)
tmp += PAGE_SIZE;
@@ -385,8 +356,7 @@ static inline void bootmem_init(void)
printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
(void *)initrd_start,
initrd_size);
-/* FIXME: is this right? */
-#ifndef CONFIG_SGI_IP27
+
if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
printk("initrd extends beyond end of memory "
"(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n",
@@ -394,7 +364,6 @@ static inline void bootmem_init(void)
sizeof(long) * 2, PFN_PHYS(max_low_pfn));
initrd_start = initrd_end = 0;
}
-#endif /* !CONFIG_SGI_IP27 */
}
#endif /* CONFIG_BLK_DEV_INITRD */
}
@@ -456,229 +425,63 @@ static inline void resource_init(void)
#undef MAXMEM
#undef MAXMEM_PFN
-void __init setup_arch(char **cmdline_p)
+static int __initdata earlyinit_debug;
+
+static int __init earlyinit_debug_setup(char *str)
{
- extern void atlas_setup(void);
- extern void baget_setup(void);
- extern void cobalt_setup(void);
- extern void lasat_setup(void);
- extern void ddb_setup(void);
- extern void decstation_setup(void);
- extern void deskstation_setup(void);
- extern void jazz_setup(void);
- extern void sni_rm200_pci_setup(void);
- extern void ip22_setup(void);
- extern void ip27_setup(void);
- extern void ip32_setup(void);
- extern void ev96100_setup(void);
- extern void malta_setup(void);
- extern void sead_setup(void);
- extern void ikos_setup(void);
- extern void momenco_ocelot_setup(void);
- extern void momenco_ocelot_g_setup(void);
- extern void momenco_ocelot_c_setup(void);
- extern void nec_osprey_setup(void);
- extern void nec_eagle_setup(void);
- extern void zao_capcella_setup(void);
- extern void victor_mpc30x_setup(void);
- extern void ibm_workpad_setup(void);
- extern void casio_e55_setup(void);
- extern void jmr3927_setup(void);
- extern void it8172_setup(void);
- extern void swarm_setup(void);
- extern void hp_setup(void);
- extern void au1x00_setup(void);
- extern void frame_info_init(void);
+ earlyinit_debug = 1;
+ return 1;
+}
+__setup("earlyinit_debug", earlyinit_debug_setup);
- frame_info_init();
+extern initcall_t __earlyinitcall_start, __earlyinitcall_end;
-#ifdef CONFIG_BLK_DEV_FD
- fd_ops = &no_fd_ops;
-#endif
+static void __init do_earlyinitcalls(void)
+{
+ initcall_t *call, *start, *end;
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &no_ide_ops;
-#endif
+ start = &__earlyinitcall_start;
+ end = &__earlyinitcall_end;
- rtc_ops = &no_rtc_ops;
+ for (call = start; call < end; call++) {
+ if (earlyinit_debug)
+ printk("calling earlyinitcall 0x%p\n", *call);
- switch (mips_machgroup) {
-#ifdef CONFIG_BAGET_MIPS
- case MACH_GROUP_BAGET:
- baget_setup();
- break;
-#endif
-#ifdef CONFIG_MIPS_COBALT
- case MACH_GROUP_COBALT:
- cobalt_setup();
- break;
-#endif
-#ifdef CONFIG_DECSTATION
- case MACH_GROUP_DEC:
- decstation_setup();
- break;
-#endif
-#ifdef CONFIG_MIPS_ATLAS
- case MACH_GROUP_UNKNOWN:
- atlas_setup();
- break;
-#endif
-#ifdef CONFIG_MIPS_JAZZ
- case MACH_GROUP_JAZZ:
- jazz_setup();
- break;
-#endif
-#ifdef CONFIG_MIPS_MALTA
- case MACH_GROUP_UNKNOWN:
- malta_setup();
- break;
-#endif
-#ifdef CONFIG_MOMENCO_OCELOT
- case MACH_GROUP_MOMENCO:
- momenco_ocelot_setup();
- break;
-#endif
-#ifdef CONFIG_MOMENCO_OCELOT_G
- case MACH_GROUP_MOMENCO:
- momenco_ocelot_g_setup();
- break;
-#endif
-#ifdef CONFIG_MOMENCO_OCELOT_C
- case MACH_GROUP_MOMENCO:
- momenco_ocelot_c_setup();
- break;
-#endif
-#ifdef CONFIG_MIPS_SEAD
- case MACH_GROUP_UNKNOWN:
- sead_setup();
- break;
-#endif
-#ifdef CONFIG_SGI_IP22
- /* As of now this is only IP22. */
- case MACH_GROUP_SGI:
- ip22_setup();
- break;
-#endif
-#ifdef CONFIG_SGI_IP27
- case MACH_GROUP_SGI:
- ip27_setup();
- break;
-#endif
-#ifdef CONFIG_SGI_IP32
- case MACH_GROUP_SGI:
- ip32_setup();
- break;
-#endif
-#ifdef CONFIG_SNI_RM200_PCI
- case MACH_GROUP_SNI_RM:
- sni_rm200_pci_setup();
- break;
-#endif
-#ifdef CONFIG_DDB5074
- case MACH_GROUP_NEC_DDB:
- ddb_setup();
- break;
-#endif
-#ifdef CONFIG_DDB5476
- case MACH_GROUP_NEC_DDB:
- ddb_setup();
- break;
-#endif
-#ifdef CONFIG_DDB5477
- case MACH_GROUP_NEC_DDB:
- ddb_setup();
- break;
-#endif
-#ifdef CONFIG_CPU_VR41XX
- case MACH_GROUP_NEC_VR41XX:
- switch (mips_machtype) {
-#ifdef CONFIG_NEC_OSPREY
- case MACH_NEC_OSPREY:
- nec_osprey_setup();
- break;
-#endif
-#ifdef CONFIG_NEC_EAGLE
- case MACH_NEC_EAGLE:
- nec_eagle_setup();
- break;
-#endif
-#ifdef CONFIG_ZAO_CAPCELLA
- case MACH_ZAO_CAPCELLA:
- zao_capcella_setup();
- break;
-#endif
-#ifdef CONFIG_VICTOR_MPC30X
- case MACH_VICTOR_MPC30X:
- victor_mpc30x_setup();
- break;
-#endif
-#ifdef CONFIG_IBM_WORKPAD
- case MACH_IBM_WORKPAD:
- ibm_workpad_setup();
- break;
-#endif
-#ifdef CONFIG_CASIO_E55
- case MACH_CASIO_E55:
- casio_e55_setup();
- break;
-#endif
-#ifdef CONFIG_TANBAC_TB0229
- case MACH_TANBAC_TB0229:
- tanbac_tb0229_setup();
- break;
-#endif
- }
- break;
-#endif
-#ifdef CONFIG_MIPS_EV96100
- case MACH_GROUP_GALILEO:
- ev96100_setup();
- break;
-#endif
-#ifdef CONFIG_MIPS_EV64120
- case MACH_GROUP_GALILEO:
- ev64120_setup();
- break;
-#endif
-#if defined(CONFIG_MIPS_IVR) || defined(CONFIG_MIPS_ITE8172)
- case MACH_GROUP_ITE:
- case MACH_GROUP_GLOBESPAN:
- it8172_setup();
- break;
-#endif
-#ifdef CONFIG_LASAT
- case MACH_GROUP_LASAT:
- lasat_setup();
- break;
-#endif
-#ifdef CONFIG_SOC_AU1X00
- case MACH_GROUP_ALCHEMY:
- au1x00_setup();
- break;
-#endif
-#ifdef CONFIG_TOSHIBA_JMR3927
- case MACH_GROUP_TOSHIBA:
- jmr3927_setup();
- break;
+ (*call)();
+ }
+}
+
+void __init setup_arch(char **cmdline_p)
+{
+ cpu_probe();
+ prom_init();
+ cpu_report();
+
+#ifdef CONFIG_MIPS32
+ /* Disable coprocessors and set FPU for 16/32 FPR register model */
+ clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
+ set_c0_status(ST0_CU0);
#endif
-#ifdef CONFIG_TOSHIBA_RBTX4927
- case MACH_GROUP_TOSHIBA:
- tx4927_setup();
- break;
+#ifdef CONFIG_MIPS64
+ /*
+ * On IP27, I am seeing the TS bit set when the kernel is loaded.
+ * Maybe because the kernel is in ckseg0 and not xkphys? Clear it
+ * anyway ...
+ */
+ clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
+ set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
#endif
-#ifdef CONFIG_SIBYTE_BOARD
- case MACH_GROUP_SIBYTE:
- swarm_setup();
- break;
+
+#if defined(CONFIG_VT)
+#if defined(CONFIG_VGA_CONSOLE)
+ conswitchp = &vga_con;
+#elif defined(CONFIG_DUMMY_CONSOLE)
+ conswitchp = &dummy_con;
#endif
-#ifdef CONFIG_HP_LASERJET
- case MACH_GROUP_HP_LJ:
- hp_setup();
- break;
#endif
- default:
- panic("Unsupported architecture");
- }
+
+ /* call board setup routine */
+ do_earlyinitcalls();
strlcpy(command_line, arcs_cmdline, sizeof(command_line));
strlcpy(saved_command_line, command_line, sizeof(saved_command_line));
@@ -686,11 +489,8 @@ void __init setup_arch(char **cmdline_p)
*cmdline_p = command_line;
parse_cmdline_early();
-
bootmem_init();
-
paging_init();
-
resource_init();
}
diff -puN arch/mips/kernel/signal32.c~mips-megapatch arch/mips/kernel/signal32.c
--- 25/arch/mips/kernel/signal32.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/signal32.c 2004-02-19 12:53:00.000000000 -0800
@@ -28,7 +28,7 @@
#include <asm/fpu.h>
/*
- * Including <asm/unistd.h would give use the 64-bit syscall numbers ...
+ * Including <asm/unistd.h> would give use the 64-bit syscall numbers ...
*/
#define __NR_O32_sigreturn 4119
#define __NR_O32_rt_sigreturn 4193
@@ -126,12 +126,12 @@ static inline int get_sigset(sigset_t *k
/*
* Atomically swap in the new signal mask, and wait for a signal.
*/
-asmlinkage inline int sys32_sigsuspend(nabi_no_regargs struct pt_regs regs)
+save_static_function(sys32_sigsuspend);
+static_unused int _sys32_sigsuspend(nabi_no_regargs struct pt_regs regs)
{
compat_sigset_t *uset;
sigset_t newset, saveset;
- save_static(®s);
uset = (compat_sigset_t *) regs.regs[4];
if (get_sigset(&newset, uset))
return -EFAULT;
@@ -153,13 +153,13 @@ asmlinkage inline int sys32_sigsuspend(n
}
}
-asmlinkage int sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
+save_static_function(sys32_rt_sigsuspend);
+static_unused int _sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
{
compat_sigset_t *uset;
sigset_t newset, saveset;
size_t sigsetsize;
- save_static(®s);
/* XXX Don't preclude handling different sized sigset_t's. */
sigsetsize = regs.regs[5];
if (sigsetsize != sizeof(compat_sigset_t))
@@ -241,7 +241,7 @@ asmlinkage int sys32_sigaltstack(nabi_no
if (!access_ok(VERIFY_READ, uss, sizeof(*uss)))
return -EFAULT;
err |= __get_user(sp, &uss->ss_sp);
- kss.ss_size = (long) sp;
+ kss.ss_sp = (void *) (long) sp;
err |= __get_user(kss.ss_size, &uss->ss_size);
err |= __get_user(kss.ss_flags, &uss->ss_flags);
if (err)
@@ -270,6 +270,9 @@ static asmlinkage int restore_sigcontext
{
int err = 0;
+ /* Always make any pending restarted system calls return -EINTR */
+ current_thread_info()->restart_block.fn = do_no_restart_syscall;
+
err |= __get_user(regs->cp0_epc, &sc->sc_pc);
err |= __get_user(regs->hi, &sc->sc_mdhi);
err |= __get_user(regs->lo, &sc->sc_mdlo);
@@ -651,7 +654,6 @@ static inline void handle_signal(unsigne
switch (regs->regs[0]) {
case ERESTART_RESTARTBLOCK:
- current_thread_info()->restart_block.fn = do_no_restart_syscall;
case ERESTARTNOHAND:
regs->regs[2] = EINTR;
break;
@@ -712,6 +714,7 @@ asmlinkage int do_signal32(sigset_t *old
}
if (regs->regs[2] == ERESTART_RESTARTBLOCK) {
regs->regs[2] = __NR_O32_restart_syscall;
+ regs->regs[7] = regs->regs[26];
regs->cp0_epc -= 4;
}
}
diff -puN arch/mips/kernel/signal.c~mips-megapatch arch/mips/kernel/signal.c
--- 25/arch/mips/kernel/signal.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/signal.c 2004-02-19 12:53:00.000000000 -0800
@@ -74,8 +74,6 @@ static_unused int _sys_rt_sigsuspend(nab
sigset_t *unewset, saveset, newset;
size_t sigsetsize;
- save_static(®s);
-
/* XXX Don't preclude handling different sized sigset_t's. */
sigsetsize = regs.regs[5];
if (sigsetsize != sizeof(sigset_t))
@@ -156,6 +154,9 @@ asmlinkage int restore_sigcontext(struct
{
int err = 0;
+ /* Always make any pending restarted system calls return -EINTR */
+ current_thread_info()->restart_block.fn = do_no_restart_syscall;
+
err |= __get_user(regs->cp0_epc, &sc->sc_pc);
err |= __get_user(regs->hi, &sc->sc_mdhi);
err |= __get_user(regs->lo, &sc->sc_mdlo);
@@ -490,7 +491,6 @@ static inline void handle_signal(unsigne
switch(regs->regs[0]) {
case ERESTART_RESTARTBLOCK:
- current_thread_info()->restart_block.fn = do_no_restart_syscall;
case ERESTARTNOHAND:
regs->regs[2] = EINTR;
break;
@@ -508,9 +508,9 @@ static inline void handle_signal(unsigne
regs->regs[0] = 0; /* Don't deal with this again. */
#ifdef CONFIG_TRAD_SIGNALS
- if (ka->sa.sa_flags & SA_SIGINFO)
+ if (ka->sa.sa_flags & SA_SIGINFO) {
#else
- if (1)
+ if (1) {
#endif
#ifdef CONFIG_MIPS32_N32
if ((current->thread.mflags & MF_ABI_MASK) == MF_N32)
@@ -518,8 +518,11 @@ static inline void handle_signal(unsigne
else
#endif
setup_rt_frame(ka, regs, sig, oldset, info);
+ }
+#ifdef CONFIG_TRAD_SIGNALS
else
setup_frame(ka, regs, sig, oldset);
+#endif
if (ka->sa.sa_flags & SA_ONESHOT)
ka->sa.sa_handler = SIG_DFL;
@@ -569,6 +572,7 @@ asmlinkage int do_signal(sigset_t *oldse
}
if (regs->regs[2] == ERESTART_RESTARTBLOCK) {
regs->regs[2] = __NR_restart_syscall;
+ regs->regs[7] = regs->regs[26];
regs->cp0_epc -= 4;
}
}
diff -puN arch/mips/kernel/signal_n32.c~mips-megapatch arch/mips/kernel/signal_n32.c
--- 25/arch/mips/kernel/signal_n32.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/signal_n32.c 2004-02-19 12:53:00.000000000 -0800
@@ -15,8 +15,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-
-#include <linux/config.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/smp.h>
diff -puN arch/mips/kernel/smp.c~mips-megapatch arch/mips/kernel/smp.c
--- 25/arch/mips/kernel/smp.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/smp.c 2004-02-19 12:53:00.000000000 -0800
@@ -16,7 +16,7 @@
* Copyright (C) 2000, 2001 Kanoj Sarcar
* Copyright (C) 2000, 2001 Ralf Baechle
* Copyright (C) 2000, 2001 Silicon Graphics, Inc.
- * Copyright (C) 2000, 2001 Broadcom Corporation
+ * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
*/
#include <linux/config.h>
#include <linux/cache.h>
@@ -29,6 +29,7 @@
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/sched.h>
+#include <linux/cpumask.h>
#include <asm/atomic.h>
#include <asm/cpu.h>
@@ -38,45 +39,18 @@
#include <asm/mmu_context.h>
#include <asm/smp.h>
-int smp_threads_ready; /* Not used */
-
-// static atomic_t cpus_booted = ATOMIC_INIT(0);
-atomic_t cpus_booted = ATOMIC_INIT(0);
-
-cpumask_t phys_cpu_present_map; /* Bitmask of physically CPUs */
+cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */
+volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
-int __cpu_number_map[NR_CPUS];
-int __cpu_logical_map[NR_CPUS];
+int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
+int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
EXPORT_SYMBOL(cpu_online_map);
-/* These are defined by the board-specific code. */
-
-/*
- * Cause the function described by call_data to be executed on the passed
- * cpu. When the function has finished, increment the finished field of
- * call_data.
- */
-void core_send_ipi(int cpu, unsigned int action);
-
-/*
- * Clear all undefined state in the cpu, set up sp and gp to the passed
- * values, and kick the cpu into smp_bootstrap();
- */
-void prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp);
-
-/*
- * After we've done initial boot, this function is called to allow the
- * board code to clean up state, if needed
- */
-void prom_init_secondary(void);
-
-void prom_smp_finish(void);
-
cycles_t cacheflush_time;
unsigned long cache_decay_ticks;
-void smp_tune_scheduling (void)
+static void smp_tune_scheduling (void)
{
struct cache_desc *cd = ¤t_cpu_data.scache;
unsigned long cachesize; /* kB */
@@ -119,49 +93,34 @@ void smp_tune_scheduling (void)
(cache_decay_ticks + 1) * 1000 / HZ);
}
-void __init smp_callin(void)
-{
-#if 0
- calibrate_delay();
- smp_store_cpu_info(cpuid);
-#endif
-}
+extern void __init calibrate_delay(void);
-#ifndef CONFIG_SGI_IP27
/*
- * Hook for doing final board-specific setup after the generic smp setup
- * is done
+ * First C code run on the secondary CPUs after being started up by
+ * the master.
*/
asmlinkage void start_secondary(void)
{
unsigned int cpu = smp_processor_id();
cpu_probe();
- prom_init_secondary();
+ cpu_report();
per_cpu_trap_init();
+ prom_init_secondary();
/*
* XXX parity protection should be folded in here when it's converted
* to an option instead of something based on .cputype
*/
- pgd_current[cpu] = init_mm.pgd;
+
+ calibrate_delay();
cpu_data[cpu].udelay_val = loops_per_jiffy;
+
prom_smp_finish();
- printk("Slave cpu booted successfully\n");
- cpu_set(cpu, cpu_online_map);
- atomic_inc(&cpus_booted);
- cpu_idle();
-}
-#endif /* CONFIG_SGI_IP27 */
-/*
- * this function sends a 'reschedule' IPI to another CPU.
- * it goes straight through and wastes no time serializing
- * anything. Worst case is that we lose a reschedule ...
- */
-void smp_send_reschedule(int cpu)
-{
- core_send_ipi(cpu, SMP_RESCHEDULE_YOURSELF);
+ cpu_set(cpu, cpu_callin_map);
+
+ cpu_idle();
}
spinlock_t smp_call_lock = SPIN_LOCK_UNLOCKED;
@@ -201,10 +160,11 @@ int smp_call_function (void (*func) (voi
spin_lock(&smp_call_lock);
call_data = &data;
+ mb();
/* Send a message to all other CPUs and wait for them to respond */
for (i = 0; i < NR_CPUS; i++)
- if (cpu_online(cpu) && i != cpu)
+ if (cpu_online(i) && i != cpu)
core_send_ipi(i, SMP_CALL_FUNCTION);
/* Wait for response */
@@ -261,6 +221,99 @@ void smp_send_stop(void)
smp_call_function(stop_this_cpu, NULL, 1, 0);
}
+void __init smp_cpus_done(unsigned int max_cpus)
+{
+ prom_cpus_done();
+}
+
+/* called from main before smp_init() */
+void __init smp_prepare_cpus(unsigned int max_cpus)
+{
+ cpu_data[0].udelay_val = loops_per_jiffy;
+ init_new_context(current, &init_mm);
+ current_thread_info()->cpu = 0;
+ smp_tune_scheduling();
+ prom_build_cpu_map();
+ prom_prepare_cpus(max_cpus);
+}
+
+/* preload SMP state for boot cpu */
+void __devinit smp_prepare_boot_cpu(void)
+{
+ /*
+ * This assumes that bootup is always handled by the processor
+ * with the logic and physical number 0.
+ */
+ __cpu_number_map[0] = 0;
+ __cpu_logical_map[0] = 0;
+ cpu_set(0, phys_cpu_present_map);
+ cpu_set(0, cpu_online_map);
+ cpu_set(0, cpu_callin_map);
+}
+
+static struct task_struct * __init fork_by_hand(void)
+{
+ struct pt_regs regs;
+ /*
+ * don't care about the eip and regs settings since
+ * we'll never reschedule the forked task.
+ */
+ return copy_process(CLONE_VM|CLONE_IDLETASK, 0, ®s, 0, NULL, NULL);
+}
+
+/*
+ * Startup the CPU with this logical number
+ */
+static int __init do_boot_cpu(int cpu)
+{
+ struct task_struct *idle;
+
+ /*
+ * The following code is purely to make sure
+ * Linux can schedule processes on this slave.
+ */
+ idle = fork_by_hand();
+ if (IS_ERR(idle))
+ panic("failed fork for CPU %d\n", cpu);
+
+ wake_up_forked_process(idle);
+
+ /*
+ * We remove it from the pidhash and the runqueue once we've
+ * got the process:
+ */
+ init_idle(idle, cpu);
+
+ unhash_process(idle);
+
+ prom_boot_secondary(cpu, idle);
+
+ /* XXXKW timeout */
+ while (!cpu_isset(cpu, cpu_callin_map))
+ udelay(100);
+
+ cpu_set(cpu, cpu_online_map);
+
+ return 0;
+}
+
+/*
+ * Called once for each "cpu_possible(cpu)". Needs to spin up the cpu
+ * and keep control until "cpu_online(cpu)" is set. Note: cpu is
+ * physical, not logical.
+ */
+int __devinit __cpu_up(unsigned int cpu)
+{
+ int ret;
+
+ /* Processor goes to start_secondary(), sets online flag */
+ ret = do_boot_cpu(cpu);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
/* Not really SMP stuff ... */
int setup_profiling_timer(unsigned int multiplier)
{
diff -puN arch/mips/kernel/syscall.c~mips-megapatch arch/mips/kernel/syscall.c
--- 25/arch/mips/kernel/syscall.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/syscall.c 2004-02-19 12:53:00.000000000 -0800
@@ -111,7 +111,7 @@ static inline long
do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
unsigned long flags, unsigned long fd, unsigned long pgoff)
{
- int error = -EBADF;
+ unsigned long error = -EBADF;
struct file * file = NULL;
flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
@@ -134,7 +134,7 @@ out:
asmlinkage unsigned long old_mmap(unsigned long addr, size_t len, int prot,
int flags, int fd, off_t offset)
{
- int result;
+ unsigned long result;
result = -EINVAL;
if (offset & ~PAGE_MASK)
@@ -156,7 +156,6 @@ sys_mmap2(unsigned long addr, unsigned l
save_static_function(sys_fork);
static_unused int _sys_fork(nabi_no_regargs struct pt_regs regs)
{
- save_static(®s);
return do_fork(SIGCHLD, regs.regs[29], ®s, 0, NULL, NULL);
}
@@ -167,7 +166,6 @@ static_unused int _sys_clone(nabi_no_reg
unsigned long newsp;
int *parent_tidptr, *child_tidptr;
- save_static(®s);
clone_flags = regs.regs[4];
newsp = regs.regs[5];
if (!newsp)
@@ -297,7 +295,11 @@ asmlinkage int sys_ipc (uint call, int f
switch (call) {
case SEMOP:
- return sys_semop (first, (struct sembuf *)ptr, second);
+ return sys_semtimedop (first, (struct sembuf *)ptr, second,
+ NULL);
+ case SEMTIMEDOP:
+ return sys_semtimedop (first, (struct sembuf *)ptr, second,
+ (const struct timespec __user *)fifth);
case SEMGET:
return sys_semget (first, second, third);
case SEMCTL: {
diff -puN arch/mips/kernel/sysirix.c~mips-megapatch arch/mips/kernel/sysirix.c
--- 25/arch/mips/kernel/sysirix.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/sysirix.c 2004-02-19 12:53:00.000000000 -0800
@@ -1206,8 +1206,8 @@ static int irix_xstat32_xlate(struct kst
ub.st_ino = stat->ino;
ub.st_mode = stat->mode;
ub.st_nlink = stat->nlink;
- SET_STAT_UID(ub, stat->uid);
- SET_STAT_GID(ub, stat->gid);
+ SET_UID(ub.st_uid, stat->uid);
+ SET_GID(ub.st_gid, stat->gid);
ub.st_rdev = sysv_encode_dev(stat->rdev);
#if BITS_PER_LONG == 32
if (stat->size > MAX_NON_LFS)
diff -puN arch/mips/kernel/time.c~mips-megapatch arch/mips/kernel/time.c
--- 25/arch/mips/kernel/time.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/time.c 2004-02-19 12:53:00.000000000 -0800
@@ -18,6 +18,7 @@
#include <linux/sched.h>
#include <linux/param.h>
#include <linux/time.h>
+#include <linux/timex.h>
#include <linux/smp.h>
#include <linux/kernel_stat.h>
#include <linux/spinlock.h>
@@ -26,14 +27,20 @@
#include <asm/bootinfo.h>
#include <asm/cpu.h>
+#include <asm/cpu-features.h>
#include <asm/div64.h>
#include <asm/hardirq.h>
#include <asm/sections.h>
#include <asm/time.h>
-/* This is for machines which generate the exact clock. */
-#define USECS_PER_JIFFY (1000000/HZ)
-#define USECS_PER_JIFFY_FRAC ((u32)((1000000ULL << 32) / HZ))
+/*
+ * The integer part of the number of usecs per jiffy is taken from tick,
+ * but the fractional part is not recorded, so we calculate it using the
+ * initial value of HZ. This aids systems where tick isn't really an
+ * integer (e.g. for HZ = 128).
+ */
+#define USECS_PER_JIFFY TICK_SIZE
+#define USECS_PER_JIFFY_FRAC ((unsigned long)(u32)((1000000ULL << 32) / HZ))
#define TICK_SIZE (tick_nsec / 1000)
@@ -53,6 +60,7 @@ spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED
*/
int emulate_local_timer_interrupt;
+
/*
* By default we provide the null RTC ops
*/
@@ -71,6 +79,85 @@ int (*rtc_set_time)(unsigned long) = nul
int (*rtc_set_mmss)(unsigned long);
+/* usecs per counter cycle, shifted to left by 32 bits */
+static unsigned int sll32_usecs_per_cycle;
+
+/* how many counter cycles in a jiffy */
+static unsigned long cycles_per_jiffy;
+
+/* Cycle counter value at the previous timer interrupt.. */
+static unsigned int timerhi, timerlo;
+
+/* expirelo is the count value for next CPU timer interrupt */
+static unsigned int expirelo;
+
+
+/*
+ * Null timer ack for systems not needing one (e.g. i8254).
+ */
+static void null_timer_ack(void) { /* nothing */ }
+
+/*
+ * Null high precision timer functions for systems lacking one.
+ */
+static unsigned int null_hpt_read(void)
+{
+ return 0;
+}
+
+static void null_hpt_init(unsigned int count) { /* nothing */ }
+
+
+/*
+ * Timer ack for an R4k-compatible timer of a known frequency.
+ */
+static void c0_timer_ack(void)
+{
+ unsigned int count;
+
+ /* Ack this timer interrupt and set the next one. */
+ expirelo += cycles_per_jiffy;
+ write_c0_compare(expirelo);
+
+ /* Check to see if we have missed any timer interrupts. */
+ count = read_c0_count();
+ if ((count - expirelo) < 0x7fffffff) {
+ /* missed_timer_count++; */
+ expirelo = count + cycles_per_jiffy;
+ write_c0_compare(expirelo);
+ }
+}
+
+/*
+ * High precision timer functions for a R4k-compatible timer.
+ */
+static unsigned int c0_hpt_read(void)
+{
+ return read_c0_count();
+}
+
+/* For use solely as a high precision timer. */
+static void c0_hpt_init(unsigned int count)
+{
+ write_c0_count(read_c0_count() - count);
+}
+
+/* For use both as a high precision timer and an interrupt source. */
+static void c0_hpt_timer_init(unsigned int count)
+{
+ count = read_c0_count() - count;
+ expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
+ write_c0_count(expirelo - cycles_per_jiffy);
+ write_c0_compare(expirelo);
+ write_c0_count(count);
+}
+
+int (*mips_timer_state)(void);
+void (*mips_timer_ack)(void);
+unsigned int (*mips_hpt_read)(void);
+void (*mips_hpt_init)(unsigned int);
+
+
/*
* This version of gettimeofday has microsecond resolution and better than
* microsecond precision on fast machines with cycle counter.
@@ -78,18 +165,33 @@ int (*rtc_set_mmss)(unsigned long);
void do_gettimeofday(struct timeval *tv)
{
unsigned long seq;
+ unsigned long lost;
unsigned long usec, sec;
+ unsigned long max_ntp_tick = tick_usec - tickadj;
do {
seq = read_seqbegin(&xtime_lock);
+
usec = do_gettimeoffset();
- {
- unsigned long lost = jiffies - wall_jiffies;
+
+ lost = jiffies - wall_jiffies;
+
+ /*
+ * If time_adjust is negative then NTP is slowing the clock
+ * so make sure not to go into next possible interval.
+ * Better to lose some accuracy than have time go backwards..
+ */
+ if (unlikely(time_adjust < 0)) {
+ usec = min(usec, max_ntp_tick);
+
if (lost)
- usec += lost * (1000000 / HZ);
- }
+ usec += lost * max_ntp_tick;
+ } else if (unlikely(lost))
+ usec += lost * tick_usec;
+
sec = xtime.tv_sec;
usec += (xtime.tv_nsec / 1000);
+
} while (read_seqretry(&xtime_lock, seq));
while (usec >= 1000000) {
@@ -112,14 +214,15 @@ int do_settimeofday(struct timespec *tv)
return -EINVAL;
write_seqlock_irq(&xtime_lock);
+
/*
- * This is revolting. We need to set "xtime" correctly. However, the
- * value in this location is the value at the most recent update of
- * wall time. Discover what correction gettimeofday() would have
+ * This is revolting. We need to set "xtime" correctly. However,
+ * the value in this location is the value at the most recent update
+ * of wall time. Discover what correction gettimeofday() would have
* made, and then undo it!
*/
nsec -= do_gettimeoffset() * NSEC_PER_USEC;
- nsec -= (jiffies - wall_jiffies) * TICK_NSEC;
+ nsec -= (jiffies - wall_jiffies) * tick_nsec;
wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
@@ -127,10 +230,11 @@ int do_settimeofday(struct timespec *tv)
set_normalized_timespec(&xtime, sec, nsec);
set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
- time_adjust = 0; /* stop active adjtime() */
+ time_adjust = 0; /* stop active adjtime() */
time_status |= STA_UNSYNC;
time_maxerror = NTP_PHASE_LIMIT;
time_esterror = NTP_PHASE_LIMIT;
+
write_sequnlock_irq(&xtime_lock);
clock_was_set();
return 0;
@@ -145,42 +249,28 @@ EXPORT_SYMBOL(do_settimeofday);
* If the exact CPU counter frequency is known, use fixed_rate_gettimeoffset.
* Otherwise use calibrate_gettimeoffset()
*
- * If the CPU does not have counter register all, you can either supply
- * your own gettimeoffset() routine, or use null_gettimeoffset() routines,
- * which gives the same resolution as HZ.
+ * If the CPU does not have the counter register, you can either supply
+ * your own gettimeoffset() routine, or use null_gettimeoffset(), which
+ * gives the same resolution as HZ.
*/
+static unsigned long null_gettimeoffset(void)
+{
+ return 0;
+}
-/* usecs per counter cycle, shifted to left by 32 bits */
-static unsigned int sll32_usecs_per_cycle;
-
-/* how many counter cycles in a jiffy */
-static unsigned long cycles_per_jiffy;
-
-/* Cycle counter value at the previous timer interrupt.. */
-static unsigned int timerhi, timerlo;
-
-/* expirelo is the count value for next CPU timer interrupt */
-static unsigned int expirelo;
-
-/* last time when xtime and rtc are sync'ed up */
-static long last_rtc_update;
-/* the function pointer to one of the gettimeoffset funcs*/
+/* The function pointer to one of the gettimeoffset funcs. */
unsigned long (*do_gettimeoffset)(void) = null_gettimeoffset;
-unsigned long null_gettimeoffset(void)
-{
- return 0;
-}
-unsigned long fixed_rate_gettimeoffset(void)
+static unsigned long fixed_rate_gettimeoffset(void)
{
u32 count;
unsigned long res;
/* Get last timer tick in absolute kernel time */
- count = read_c0_count();
+ count = mips_hpt_read();
/* .. relative to previous jiffy (32 bits is enough) */
count -= timerlo;
@@ -200,6 +290,7 @@ unsigned long fixed_rate_gettimeoffset(v
return res;
}
+
/*
* Cached "1/(clocks per usec) * 2^32" value.
* It has to be recalculated once each jiffy.
@@ -209,11 +300,10 @@ static unsigned long cached_quotient;
/* Last jiffy when calibrate_divXX_gettimeoffset() was called. */
static unsigned long last_jiffies;
-
/*
- * This is copied from dec/time.c:do_ioasic_gettimeoffset() by Maciej.
+ * This is moved from dec/time.c:do_ioasic_gettimeoffset() by Maciej.
*/
-unsigned long calibrate_div32_gettimeoffset(void)
+static unsigned long calibrate_div32_gettimeoffset(void)
{
u32 count;
unsigned long res, tmp;
@@ -235,7 +325,7 @@ unsigned long calibrate_div32_gettimeoff
}
/* Get last timer tick in absolute kernel time */
- count = read_c0_count();
+ count = mips_hpt_read();
/* .. relative to previous jiffy (32 bits is enough) */
count -= timerlo;
@@ -255,7 +345,7 @@ unsigned long calibrate_div32_gettimeoff
return res;
}
-unsigned long calibrate_div64_gettimeoffset(void)
+static unsigned long calibrate_div64_gettimeoffset(void)
{
u32 count;
unsigned long res, tmp;
@@ -265,30 +355,33 @@ unsigned long calibrate_div64_gettimeoff
quotient = cached_quotient;
- if (tmp && last_jiffies != tmp) {
+ if (last_jiffies != tmp) {
last_jiffies = tmp;
- __asm__(".set push\n\t"
- ".set noreorder\n\t"
- ".set noat\n\t"
- ".set mips3\n\t"
- "lwu %0,%2\n\t"
- "dsll32 $1,%1,0\n\t"
- "or $1,$1,%0\n\t"
- "ddivu $0,$1,%3\n\t"
- "mflo $1\n\t"
- "dsll32 %0,%4,0\n\t"
- "nop\n\t"
- "ddivu $0,%0,$1\n\t"
- "mflo %0\n\t"
- ".set pop"
- : "=&r" (quotient)
- : "r" (timerhi), "m" (timerlo),
- "r" (tmp), "r" (USECS_PER_JIFFY));
- cached_quotient = quotient;
+ if (last_jiffies) {
+ unsigned long r0;
+ __asm__(".set push\n\t"
+ ".set mips3\n\t"
+ "lwu %0,%3\n\t"
+ "dsll32 %1,%2,0\n\t"
+ "or %1,%1,%0\n\t"
+ "ddivu $0,%1,%4\n\t"
+ "mflo %1\n\t"
+ "dsll32 %0,%5,0\n\t"
+ "or %0,%0,%6\n\t"
+ "ddivu $0,%0,%1\n\t"
+ "mflo %0\n\t"
+ ".set pop"
+ : "=&r" (quotient), "=&r" (r0)
+ : "r" (timerhi), "m" (timerlo),
+ "r" (tmp), "r" (USECS_PER_JIFFY),
+ "r" (USECS_PER_JIFFY_FRAC)
+ : "hi", "lo", "accum");
+ cached_quotient = quotient;
+ }
}
/* Get last timer tick in absolute kernel time */
- count = read_c0_count();
+ count = mips_hpt_read();
/* .. relative to previous jiffy (32 bits is enough) */
count -= timerlo;
@@ -309,6 +402,9 @@ unsigned long calibrate_div64_gettimeoff
}
+/* last time when xtime and rtc are sync'ed up */
+static long last_rtc_update;
+
/*
* local_timer_interrupt() does profiling and process accounting
* on a per-CPU basis.
@@ -345,30 +441,20 @@ void local_timer_interrupt(int irq, void
}
/*
- * high-level timer interrupt service routines. This function
+ * High-level timer interrupt service routines. This function
* is set as irqaction->handler and is invoked through do_IRQ.
*/
irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
- if (cpu_has_counter) {
- unsigned int count;
-
- /* ack timer interrupt, and try to set next interrupt */
- expirelo += cycles_per_jiffy;
- write_c0_compare(expirelo);
- count = read_c0_count();
+ unsigned long j;
+ unsigned int count;
- /* check to see if we have missed any timer interrupts */
- if ((count - expirelo) < 0x7fffffff) {
- /* missed_timer_count++; */
- expirelo = count + cycles_per_jiffy;
- write_c0_compare(expirelo);
- }
+ count = mips_hpt_read();
+ mips_timer_ack();
- /* Update timerhi/timerlo for intra-jiffy calibration. */
- timerhi += count < timerlo; /* Wrap around */
- timerlo = count;
- }
+ /* Update timerhi/timerlo for intra-jiffy calibration. */
+ timerhi += count < timerlo; /* Wrap around */
+ timerlo = count;
/*
* call the generic timer interrupt handling
@@ -395,12 +481,44 @@ irqreturn_t timer_interrupt(int irq, voi
write_sequnlock(&xtime_lock);
/*
- * If jiffies has overflowed in this timer_interrupt we must
+ * If jiffies has overflown in this timer_interrupt, we must
* update the timer[hi]/[lo] to make fast gettimeoffset funcs
* quotient calc still valid. -arca
+ *
+ * The first timer interrupt comes late as interrupts are
+ * enabled long after timers are initialized. Therefore the
+ * high precision timer is fast, leading to wrong gettimeoffset()
+ * calculations. We deal with it by setting it based on the
+ * number of its ticks between the second and the third interrupt.
+ * That is still somewhat imprecise, but it's a good estimate.
+ * --macro
*/
- if (!jiffies) {
- timerhi = timerlo = 0;
+ j = jiffies;
+ if (j < 4) {
+ static unsigned int prev_count;
+ static int hpt_initialized;
+
+ switch (j) {
+ case 0:
+ timerhi = timerlo = 0;
+ mips_hpt_init(count);
+ break;
+ case 2:
+ prev_count = count;
+ break;
+ case 3:
+ if (!hpt_initialized) {
+ unsigned int c3 = 3 * (count - prev_count);
+
+ timerhi = 0;
+ timerlo = c3;
+ mips_hpt_init(count - c3);
+ hpt_initialized = 1;
+ }
+ break;
+ default:
+ break;
+ }
}
#if !defined(CONFIG_SMP)
@@ -445,7 +563,8 @@ asmlinkage void ll_timer_interrupt(int i
asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
{
irq_enter();
- kstat_this_cpu.irqs[irq]++;
+ if (smp_processor_id() != 0)
+ kstat_this_cpu.irqs[irq]++;
/* we keep interrupt disabled all the time */
local_timer_interrupt(irq, NULL, regs);
@@ -458,7 +577,7 @@ asmlinkage void ll_local_timer_interrupt
*
* 1) board_time_init() -
* a) (optional) set up RTC routines,
- * b) (optional) calibrate and set the mips_counter_frequency
+ * b) (optional) calibrate and set the mips_hpt_frequency
* (only needed if you intended to use fixed_rate_gettimeoffset
* or use cpu counter as timer interrupt source)
* 2) setup xtime based on rtc_get_time().
@@ -473,7 +592,7 @@ asmlinkage void ll_local_timer_interrupt
void (*board_time_init)(void);
void (*board_timer_setup)(struct irqaction *irq);
-unsigned int mips_counter_frequency;
+unsigned int mips_hpt_frequency;
static struct irqaction timer_irqaction = {
.handler = timer_interrupt,
@@ -481,6 +600,49 @@ static struct irqaction timer_irqaction
.name = "timer",
};
+static unsigned int __init calibrate_hpt(void)
+{
+ u64 frequency;
+ u32 hpt_start, hpt_end, hpt_count, hz;
+
+ const int loops = HZ / 10;
+ int log_2_loops = 0;
+ int i;
+
+ /*
+ * We want to calibrate for 0.1s, but to avoid a 64-bit
+ * division we round the number of loops up to the nearest
+ * power of 2.
+ */
+ while (loops > 1 << log_2_loops)
+ log_2_loops++;
+ i = 1 << log_2_loops;
+
+ /*
+ * Wait for a rising edge of the timer interrupt.
+ */
+ while (mips_timer_state());
+ while (!mips_timer_state());
+
+ /*
+ * Now see how many high precision timer ticks happen
+ * during the calculated number of periods between timer
+ * interrupts.
+ */
+ hpt_start = mips_hpt_read();
+ do {
+ while (mips_timer_state());
+ while (!mips_timer_state());
+ } while (--i);
+ hpt_end = mips_hpt_read();
+
+ hpt_count = hpt_end - hpt_start;
+ hz = HZ;
+ frequency = (u64)hpt_count * (u64)hz;
+
+ return frequency >> log_2_loops;
+}
+
void __init time_init(void)
{
if (board_time_init)
@@ -495,50 +657,79 @@ void __init time_init(void)
set_normalized_timespec(&wall_to_monotonic,
-xtime.tv_sec, -xtime.tv_nsec);
- /* choose appropriate gettimeoffset routine */
- if (!cpu_has_counter) {
- /* no cpu counter - sorry */
- do_gettimeoffset = null_gettimeoffset;
- } else if (mips_counter_frequency != 0) {
- /* we have cpu counter and know counter frequency! */
- do_gettimeoffset = fixed_rate_gettimeoffset;
- } else if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32) ||
- (current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
- (current_cpu_data.isa_level == MIPS_CPU_ISA_II) ) {
- /* we need to calibrate the counter but we don't have
- * 64-bit division. */
- do_gettimeoffset = calibrate_div32_gettimeoffset;
+ /* Choose appropriate high precision timer routines. */
+ if (!cpu_has_counter && !mips_hpt_read) {
+ /* No high precision timer -- sorry. */
+ mips_hpt_read = null_hpt_read;
+ mips_hpt_init = null_hpt_init;
+ } else if (!mips_hpt_frequency && !mips_timer_state) {
+ /* A high precision timer of unknown frequency. */
+ if (!mips_hpt_read) {
+ /* No external high precision timer -- use R4k. */
+ mips_hpt_read = c0_hpt_read;
+ mips_hpt_init = c0_hpt_init;
+ }
+
+ if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32) ||
+ (current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
+ (current_cpu_data.isa_level == MIPS_CPU_ISA_II))
+ /*
+ * We need to calibrate the counter but we don't have
+ * 64-bit division.
+ */
+ do_gettimeoffset = calibrate_div32_gettimeoffset;
+ else
+ /*
+ * We need to calibrate the counter but we *do* have
+ * 64-bit division.
+ */
+ do_gettimeoffset = calibrate_div64_gettimeoffset;
} else {
- /* we need to calibrate the counter but we *do* have
- * 64-bit division. */
- do_gettimeoffset = calibrate_div64_gettimeoffset;
- }
+ /* We know counter frequency. Or we can get it. */
+ if (!mips_hpt_read) {
+ /* No external high precision timer -- use R4k. */
+ mips_hpt_read = c0_hpt_read;
+
+ if (mips_timer_state)
+ mips_hpt_init = c0_hpt_init;
+ else {
+ /* No external timer interrupt -- use R4k. */
+ mips_hpt_init = c0_hpt_timer_init;
+ mips_timer_ack = c0_timer_ack;
+ }
+ }
+ if (!mips_hpt_frequency)
+ mips_hpt_frequency = calibrate_hpt();
- /* caclulate cache parameters */
- if (mips_counter_frequency) {
- cycles_per_jiffy = mips_counter_frequency / HZ;
-
- /* sll32_usecs_per_cycle = 10^6 * 2^32 / mips_counter_freq */
- /* any better way to do this? */
- sll32_usecs_per_cycle = mips_counter_frequency / 100000;
- sll32_usecs_per_cycle = 0xffffffff / sll32_usecs_per_cycle;
- sll32_usecs_per_cycle *= 10;
+ do_gettimeoffset = fixed_rate_gettimeoffset;
- /*
- * For those using cpu counter as timer, this sets up the
- * first interrupt
- */
- write_c0_compare(cycles_per_jiffy);
- write_c0_count(0);
- expirelo = cycles_per_jiffy;
+ /* Calculate cache parameters. */
+ cycles_per_jiffy = (mips_hpt_frequency + HZ / 2) / HZ;
+
+ /* sll32_usecs_per_cycle = 10^6 * 2^32 / mips_counter_freq */
+ do_div64_32(sll32_usecs_per_cycle,
+ 1000000, mips_hpt_frequency / 2,
+ mips_hpt_frequency);
+
+ /* Report the high precision timer rate for a reference. */
+ printk("Using %u.%03u MHz high precision timer.\n",
+ ((mips_hpt_frequency + 500) / 1000) / 1000,
+ ((mips_hpt_frequency + 500) / 1000) % 1000);
}
+ if (!mips_timer_ack)
+ /* No timer interrupt ack (e.g. i8254). */
+ mips_timer_ack = null_timer_ack;
+
+ /* This sets up the high precision timer for the first interrupt. */
+ mips_hpt_init(mips_hpt_read());
+
/*
* Call board specific timer interrupt setup.
*
* this pointer must be setup in machine setup routine.
*
- * Even if the machine choose to use low-level timer interrupt,
+ * Even if a machine chooses to use a low-level timer interrupt,
* it still needs to setup the timer_irqaction.
* In that case, it might be better to set timer_irqaction.handler
* to be NULL function so that we are sure the high-level code
diff -puN arch/mips/kernel/traps.c~mips-megapatch arch/mips/kernel/traps.c
--- 25/arch/mips/kernel/traps.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/traps.c 2004-02-19 12:53:00.000000000 -0800
@@ -83,12 +83,12 @@ void show_stack(struct task_struct *task
sp = sp ? sp : (unsigned long *) &sp;
- printk("Stack: ");
- i = 1;
+ printk("Stack :");
+ i = 0;
while ((unsigned long) sp & (PAGE_SIZE - 1)) {
- if (i && ((i % (64 / sizeof(unsigned long))) == 0))
+ if (i && ((i % (64 / field)) == 0))
printk("\n ");
- if (i > 40) {
+ if (i > 39) {
printk(" ...");
break;
}
@@ -116,7 +116,7 @@ void show_trace(struct task_struct *task
#ifdef CONFIG_KALLSYMS
printk("\n");
#endif
- while (((long) stack & (THREAD_SIZE-1)) != 0) {
+ while (!kstack_end(stack)) {
addr = *stack++;
if (kernel_text_address(addr)) {
printk(" [<%0*lx>] ", field, addr);
@@ -162,6 +162,7 @@ void show_code(unsigned int *pc)
void show_regs(struct pt_regs *regs)
{
const int field = 2 * sizeof(unsigned long);
+ unsigned int cause = regs->cp0_cause;
int i;
printk("Cpu %d\n", smp_processor_id());
@@ -171,7 +172,7 @@ void show_regs(struct pt_regs *regs)
*/
for (i = 0; i < 32; ) {
if ((i % 4) == 0)
- printk("$%2d :", i);
+ printk("$%2d :", i);
if (i == 0)
printk(" %0*lx", field, 0UL);
else if (i == 26 || i == 27)
@@ -184,15 +185,19 @@ void show_regs(struct pt_regs *regs)
printk("\n");
}
- printk("Hi : %0*lx\n", field, regs->hi);
- printk("Lo : %0*lx\n", field, regs->lo);
+ printk("Hi : %0*lx\n", field, regs->hi);
+ printk("Lo : %0*lx\n", field, regs->lo);
/*
* Saved cp0 registers
*/
- printk("epc : %0*lx %s\n", field, regs->cp0_epc, print_tainted());
- printk("Status: %0*lx\n", field, regs->cp0_status);
- printk("Cause : %0*lx\n", field, regs->cp0_cause);
+ printk("epc : %0*lx ", field, regs->cp0_epc);
+ print_symbol("%s ", regs->cp0_epc);
+ printk(" %s\n", print_tainted());
+ printk("ra : %0*lx ", field, regs->regs[31]);
+ print_symbol("%s\n", regs->regs[31]);
+
+ printk("Status: %08x ", (uint32_t) regs->cp0_status);
if (regs->cp0_status & ST0_KX)
printk("KX ");
@@ -220,15 +225,22 @@ void show_regs(struct pt_regs *regs)
printk("EXL ");
if (regs->cp0_status & ST0_IE)
printk("IE ");
+ printk("\n");
+
+ printk("Cause : %08x\n", cause);
+
+ cause = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE;
+ if (1 <= cause && cause <= 5)
+ printk("BadVA : %0*lx\n", field, regs->cp0_badvaddr);
+
+ printk("PrId : %08x\n", read_c0_prid());
}
void show_registers(struct pt_regs *regs)
{
- const int field = 2 * sizeof(unsigned long);
-
show_regs(regs);
- printk("Process %s (pid: %d, stackpage=%0*lx)\n",
- current->comm, current->pid, field, (unsigned long) current);
+ printk("Process %s (pid: %d, threadinfo=%p, task=%p)\n",
+ current->comm, current->pid, current_thread_info(), current);
show_stack(current, (long *) regs->regs[29]);
show_trace(current, (long *) regs->regs[29]);
show_code((unsigned int *) regs->cp0_epc);
@@ -237,8 +249,8 @@ void show_registers(struct pt_regs *regs
static spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
-void __die(const char * str, struct pt_regs * regs, const char * file,
- const char * func, unsigned long line)
+NORET_TYPE void __die(const char * str, struct pt_regs * regs,
+ const char * file, const char * func, unsigned long line)
{
static int die_counter;
@@ -271,6 +283,56 @@ void __declare_dbe_table(void)
);
}
+#ifdef CONFIG_MDULES
+
+/* Given an address, look for it in the module exception tables. */
+const struct exception_table_entry *search_module_dbetables(unsigned long addr)
+{
+ unsigned long flags;
+ const struct exception_table_entry *e = NULL;
+ struct module *mod;
+
+ spin_lock_irqsave(&modlist_lock, flags);
+ list_for_each_entry(mod, &modules, list) {
+ if (mod->arch.num_dbeentries == 0)
+ continue;
+
+ e = search_extable(mod->arch.dbe_table_start,
+ mod->arch.dbe_table_end +
+ mod->arch.num_dbeentries - 1,
+ addr);
+ if (e)
+ break;
+ }
+ spin_unlock_irqrestore(&modlist_lock, flags);
+
+ /* Now, if we found one, we are running inside it now, hence
+ we cannot unload the module, hence no refcnt needed. */
+ return e;
+}
+
+#else
+
+/* Given an address, look for it in the exception tables. */
+static inline const struct exception_table_entry *
+search_module_dbetables(unsigned long addr)
+{
+ return NULL;
+}
+
+#endif
+
+/* Given an address, look for it in the exception tables. */
+const struct exception_table_entry *search_dbe_tables(unsigned long addr)
+{
+ const struct exception_table_entry *e;
+
+ e = search_extable(__start___dbe_table, __stop___dbe_table - 1, addr);
+ if (!e)
+ e = search_module_dbetables(addr);
+ return e;
+}
+
asmlinkage void do_be(struct pt_regs *regs)
{
const int field = 2 * sizeof(unsigned long);
@@ -280,7 +342,7 @@ asmlinkage void do_be(struct pt_regs *re
/* XXX For now. Fixme, this searches the wrong table ... */
if (data && !user_mode(regs))
- fixup = search_exception_tables(regs->cp0_epc);
+ fixup = search_dbe_tables(exception_epc(regs));
if (fixup)
action = MIPS_BE_FIXUP;
@@ -725,10 +787,10 @@ asmlinkage void cache_parity_error(void)
#if defined(CONFIG_CPU_MIPS32) || defined (CONFIG_CPU_MIPS64)
if (reg_val & (1<<22))
- printk("DErrAddr0: 0x%08x\n", read_c0_derraddr0());
+ printk("DErrAddr0: 0x%0*lx\n", field, read_c0_derraddr0());
if (reg_val & (1<<23))
- printk("DErrAddr1: 0x%08x\n", read_c0_derraddr1());
+ printk("DErrAddr1: 0x%0*lx\n", field, read_c0_derraddr1());
#endif
panic("Can't handle the cache error!");
@@ -794,9 +856,9 @@ void *set_except_vector(int n, void *add
exception_handlers[n] = handler;
if (n == 0 && cpu_has_divec) {
- *(volatile u32 *)(KSEG0+0x200) = 0x08000000 |
+ *(volatile u32 *)(CAC_BASE + 0x200) = 0x08000000 |
(0x03ffffff & (handler >> 2));
- flush_icache_range(KSEG0+0x200, KSEG0 + 0x204);
+ flush_icache_range(CAC_BASE + 0x200, CAC_BASE + 0x204);
}
return (void *)old_handler;
}
@@ -850,6 +912,9 @@ static inline void signal32_init(void)
}
#endif
+extern void cpu_cache_init(void);
+extern void tlb_init(void);
+
void __init per_cpu_trap_init(void)
{
unsigned int cpu = smp_processor_id();
@@ -860,6 +925,9 @@ void __init per_cpu_trap_init(void)
set_c0_status(ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX);
#endif
+ if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
+ set_c0_status(ST0_XX);
+
/*
* Some MIPS CPUs have a dedicated interrupt vector which reduces the
* interrupt processing overhead. Use it where available.
@@ -868,19 +936,19 @@ void __init per_cpu_trap_init(void)
set_c0_cause(CAUSEF_IV);
cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
-#ifdef CONFIG_MIPS32
- write_c0_context(cpu << 23);
-#endif
-#ifdef CONFIG_MIPS64
- write_c0_context(((long)(&pgd_current[cpu])) << 23);
-#endif
- write_c0_wired(0);
+ TLBMISS_HANDLER_SETUP();
+
+ atomic_inc(&init_mm.mm_count);
+ current->active_mm = &init_mm;
+ BUG_ON(current->mm);
+ enter_lazy_tlb(&init_mm, current);
+
+ cpu_cache_init();
+ tlb_init();
}
void __init trap_init(void)
{
- extern char except_vec0_generic;
- extern char except_vec1_generic;
extern char except_vec3_generic, except_vec3_r4000;
extern char except_vec_ejtag_debug;
extern char except_vec4;
@@ -893,9 +961,7 @@ void __init trap_init(void)
* This will be overriden later as suitable for a particular
* configuration.
*/
- memcpy((void *) KSEG0 , &except_vec0_generic, 0x80);
- memcpy((void *)(KSEG0 + 0x080), &except_vec1_generic, 0x80);
- memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
+ memcpy((void *)(CAC_BASE + 0x180), &except_vec3_generic, 0x80);
/*
* Setup default vectors
@@ -908,7 +974,7 @@ void __init trap_init(void)
* destination.
*/
if (cpu_has_ejtag)
- memcpy((void *)(KSEG0 + 0x300), &except_vec_ejtag_debug, 0x80);
+ memcpy((void *)(CAC_BASE + 0x300), &except_vec_ejtag_debug, 0x80);
/*
* Only some CPUs have the watch exceptions or a dedicated
@@ -922,7 +988,7 @@ void __init trap_init(void)
* interrupt processing overhead. Use it where available.
*/
if (cpu_has_divec)
- memcpy((void *)(KSEG0 + 0x200), &except_vec4, 0x8);
+ memcpy((void *)(CAC_BASE + 0x200), &except_vec4, 0x8);
/*
* Some CPUs can enable/disable for cache parity detection, but does
@@ -969,11 +1035,11 @@ void __init trap_init(void)
set_except_vector(24, handle_mcheck);
if (cpu_has_vce)
- memcpy((void *)(KSEG0 + 0x180), &except_vec3_r4000, 0x80);
+ memcpy((void *)(CAC_BASE + 0x180), &except_vec3_r4000, 0x80);
else if (cpu_has_4kex)
- memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
+ memcpy((void *)(CAC_BASE + 0x180), &except_vec3_generic, 0x80);
else
- memcpy((void *)(KSEG0 + 0x080), &except_vec3_generic, 0x80);
+ memcpy((void *)(CAC_BASE + 0x080), &except_vec3_generic, 0x80);
if (current_cpu_data.cputype == CPU_R6000 ||
current_cpu_data.cputype == CPU_R6000A) {
@@ -994,11 +1060,5 @@ void __init trap_init(void)
signal32_init();
#endif
- flush_icache_range(KSEG0, KSEG0 + 0x400);
-
- if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
- set_c0_status(ST0_XX);
-
- atomic_inc(&init_mm.mm_count); /* XXX UP? */
- current->active_mm = &init_mm;
+ flush_icache_range(CAC_BASE, CAC_BASE + 0x400);
}
diff -puN arch/mips/kernel/unaligned.c~mips-megapatch arch/mips/kernel/unaligned.c
--- 25/arch/mips/kernel/unaligned.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/unaligned.c 2004-02-19 12:53:00.000000000 -0800
@@ -40,7 +40,7 @@
* Below a little program to play around with this feature.
*
* #include <stdio.h>
- * #include <asm/sysmips.h>
+ * #include <sys/sysmips.h>
*
* struct foo {
* unsigned char bar[8];
@@ -99,7 +99,6 @@ static inline int emulate_load_store_ins
{
union mips_instruction insn;
unsigned long value;
- const struct exception_table_entry *fixup;
unsigned int res;
regs->regs[0] = 0;
@@ -470,14 +469,8 @@ static inline int emulate_load_store_ins
fault:
/* Did we have an exception handler installed? */
- fixup = search_exception_tables(exception_epc(regs));
- if (fixup) {
- unsigned long new_epc = fixup->nextinsn;
- printk(KERN_DEBUG "%s: Forwarding exception at [<%lx>] (%lx)\n",
- current->comm, regs->cp0_epc, new_epc);
- regs->cp0_epc = new_epc;
+ if (fixup_exception(regs))
return 1;
- }
die_if_kernel ("Unhandled kernel unaligned access", regs);
send_sig(SIGSEGV, current, 1);
diff -puN arch/mips/kernel/vmlinux.lds.S~mips-megapatch arch/mips/kernel/vmlinux.lds.S
--- 25/arch/mips/kernel/vmlinux.lds.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/kernel/vmlinux.lds.S 2004-02-19 12:53:00.000000000 -0800
@@ -1,3 +1,4 @@
+#include <linux/config.h>
#include <asm-generic/vmlinux.lds.h>
#undef mips /* CPP really sucks for this job */
@@ -44,10 +45,11 @@ SECTIONS
RODATA
- . = ALIGN(64);
-
/* writeable */
.data : { /* Data */
+ . = . + MAPPED_OFFSET; /* for CONFIG_MAPPED_KERNEL */
+ *(.data.init_task)
+
*(.data)
/* Align the initial ramdisk image (INITRD) on page boundaries. */
@@ -73,23 +75,11 @@ SECTIONS
. = ALIGN(4096);
__nosave_end = .;
- . = ALIGN(4096);
- .data.page_aligned : { *(.data.idt) }
-
. = ALIGN(32);
.data.cacheline_aligned : { *(.data.cacheline_aligned) }
_edata = .; /* End of data section */
-#ifdef CONFIG_MIPS32
- . = ALIGN(8192); /* init_task */
-#endif
-#ifdef CONFIG_MIPS64
- . = ALIGN(16384); /* init_task */
-#endif
- . = . + MAPPED_OFFSET; /* for CONFIG_MAPPED_KERNEL */
- .data.init_task : { *(.data.init_task) }
-
/* will be freed after init */
. = ALIGN(4096); /* Init code and data */
__init_begin = .;
@@ -108,6 +98,13 @@ SECTIONS
__start___param = .;
__param : { *(__param) }
__stop___param = .;
+
+ .early_initcall.init : {
+ __earlyinitcall_start = .;
+ *(.initcall.early1.init)
+ }
+ __earlyinitcall_end = .;
+
__initcall_start = .;
.initcall.init : {
*(.initcall1.init)
@@ -119,6 +116,7 @@ SECTIONS
*(.initcall7.init)
}
__initcall_end = .;
+
__con_initcall_start = .;
.con_initcall.init : { *(.con_initcall.init) }
__con_initcall_end = .;
diff -puN arch/mips/lasat/interrupt.c~mips-megapatch arch/mips/lasat/interrupt.c
--- 25/arch/mips/lasat/interrupt.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lasat/interrupt.c 2004-02-19 12:53:00.000000000 -0800
@@ -2,8 +2,6 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
- * ########################################################################
- *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -17,13 +15,9 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
- * ########################################################################
- *
* Routines for generic manipulation of the interrupts found on the
* Lasat boards.
- *
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/slab.h>
@@ -41,16 +35,9 @@ static volatile int lasat_int_mask_shift
extern asmlinkage void mipsIRQ(void);
-#if 0
-#define DEBUG_INT(x...) printk(x)
-#else
-#define DEBUG_INT(x...)
-#endif
-
void disable_lasat_irq(unsigned int irq_nr)
{
unsigned long flags;
- DEBUG_INT("disable_lasat_irq: %d", irq_nr);
local_irq_save(flags);
*lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
@@ -60,7 +47,6 @@ void disable_lasat_irq(unsigned int irq_
void enable_lasat_irq(unsigned int irq_nr)
{
unsigned long flags;
- DEBUG_INT("enable_lasat_irq: %d", irq_nr);
local_irq_save(flags);
*lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
@@ -70,6 +56,7 @@ void enable_lasat_irq(unsigned int irq_n
static unsigned int startup_lasat_irq(unsigned int irq)
{
enable_lasat_irq(irq);
+
return 0; /* never anything pending */
}
@@ -111,7 +98,7 @@ static unsigned long (* get_int_status)(
static unsigned long get_int_status_100(void)
{
- return (*lasat_int_status & *lasat_int_mask);
+ return *lasat_int_status & *lasat_int_mask;
}
static unsigned long get_int_status_200(void)
@@ -132,28 +119,11 @@ void lasat_hw0_irqdispatch(struct pt_reg
int_status = get_int_status();
/* if int_status == 0, then the interrupt has already been cleared */
- if (int_status == 0)
- return;
+ if (int_status) {
+ irq = ls1bit32(int_status);
- irq = ls1bit32(int_status);
- action = irq_desc[irq].action;
-
- DEBUG_INT("lasat_hw0_irqdispatch: irq=%d\n", irq);
-
- /* if action == NULL, then we don't have a handler for the irq */
- if (action == NULL) {
- printk("No handler for hw0 irq: %i\n", irq);
- atomic_inc(&irq_err_count);
- disable_lasat_irq(irq);
- return;
+ do_IRQ(irq, regs);
}
-
- irq_enter();
- kstat_this_cpu.irqs[irq]++;
- action->handler(irq, action->dev_id, regs);
- irq_exit();
-
- return;
}
void __init init_IRQ(void)
diff -puN arch/mips/lasat/lasat_board.c~mips-megapatch arch/mips/lasat/lasat_board.c
--- 25/arch/mips/lasat/lasat_board.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lasat/lasat_board.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,11 +1,7 @@
/*
- * lasat_board.c
- *
* Thomas Horsten <thh@lasat.com>
* Copyright (C) 2000 LASAT Networks A/S.
*
- * ########################################################################
- *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -19,10 +15,9 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
- * ########################################################################
- *
* Routines specific to the LASAT boards
*/
+#include <linux/config.h>
#include <linux/types.h>
#include <linux/crc32.h>
#include <asm/lasat/lasat.h>
diff -puN arch/mips/lasat/lasatIRQ.S~mips-megapatch arch/mips/lasat/lasatIRQ.S
--- 25/arch/mips/lasat/lasatIRQ.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lasat/lasatIRQ.S 2004-02-19 12:53:00.000000000 -0800
@@ -2,8 +2,6 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
*
- * ########################################################################
- *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -17,13 +15,8 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
- * ########################################################################
- *
* Interrupt exception dispatch code.
- *
*/
-#include <linux/config.h>
-
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
diff -puN arch/mips/lasat/Makefile~mips-megapatch arch/mips/lasat/Makefile
--- 25/arch/mips/lasat/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lasat/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -7,6 +7,7 @@ obj-y += reset.o setup.o prom.o lasa
obj-$(CONFIG_LASAT_SYSCTL) += sysctl.o
obj-$(CONFIG_DS1603) += ds1603.o
+obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_PICVUE) += picvue.o
obj-$(CONFIG_PICVUE_PROC) += picvue_proc.o
diff -puN /dev/null arch/mips/lasat/pci.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/lasat/pci.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,25 @@
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <asm/bootinfo.h>
+
+extern struct pci_ops nile4_pci_ops;
+extern struct pci_ops gt64120_pci_ops;
+
+void __init pcibios_init(void)
+{
+ struct pci_ops *pci_ops;
+
+ switch (mips_machtype) {
+ case MACH_LASAT_100:
+ pci_ops = >64120_pci_ops;
+ break;
+ case MACH_LASAT_200:
+ pci_ops = &nile4_pci_ops;
+ break;
+ default:
+ panic("pcibios_init: mips_machtype incorrect");
+ }
+
+ pci_scan_bus(0, pci_ops, NULL);
+}
diff -puN arch/mips/lasat/prom.c~mips-megapatch arch/mips/lasat/prom.c
--- 25/arch/mips/lasat/prom.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lasat/prom.c 2004-02-19 12:53:00.000000000 -0800
@@ -2,7 +2,6 @@
* PROM interface routines.
*/
#include <linux/types.h>
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/ctype.h>
@@ -85,8 +84,6 @@ static void setup_prom_vectors(void)
prom_printf("prom vectors set up\n");
}
-char arcs_cmdline[CL_SIZE];
-
static struct at93c_defs at93c_defs[N_MACHTYPES] = {
{(void *)AT93C_REG_100, (void *)AT93C_RDATA_REG_100, AT93C_RDATA_SHIFT_100,
AT93C_WDATA_SHIFT_100, AT93C_CS_M_100, AT93C_CLK_M_100},
@@ -94,8 +91,11 @@ static struct at93c_defs at93c_defs[N_MA
AT93C_WDATA_SHIFT_200, AT93C_CS_M_200, AT93C_CLK_M_200},
};
-void __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
+void __init prom_init(void)
{
+ int argc = fw_arg0;
+ char **argv = (char **) fw_arg1;
+
setup_prom_vectors();
if (current_cpu_data.cputype == CPU_R5000)
@@ -110,7 +110,7 @@ void __init prom_init(int argc, char **a
mips_machgroup = MACH_GROUP_LASAT;
/* Get the command line */
- if (argc>0) {
+ if (argc > 0) {
strncpy(arcs_cmdline, argv[0], CL_SIZE-1);
arcs_cmdline[CL_SIZE-1] = '\0';
}
@@ -119,14 +119,15 @@ void __init prom_init(int argc, char **a
set_io_port_base(KSEG1);
/* Set memory regions */
- ioport_resource.start = 0; /* Should be KSEGx ??? */
- ioport_resource.end = 0xffffffff; /* Should be ??? */
+ ioport_resource.start = 0;
+ ioport_resource.end = 0xffffffff; /* Wrong, fixme. */
add_memory_region(0, lasat_board_info.li_memsize, BOOT_MEM_RAM);
}
-void prom_free_prom_memory(void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
const char *get_system_type(void)
diff -puN arch/mips/lasat/reset.c~mips-megapatch arch/mips/lasat/reset.c
--- 25/arch/mips/lasat/reset.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lasat/reset.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,10 +1,7 @@
/*
- *
* Thomas Horsten <thh@lasat.com>
* Copyright (C) 2000 LASAT Networks A/S.
*
- * ########################################################################
- *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -18,12 +15,9 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
- * ########################################################################
- *
* Reset the LASAT board.
- *
*/
-
+#include <linux/config.h>
#include <linux/kernel.h>
#include <asm/reboot.h>
#include <asm/system.h>
diff -puN arch/mips/lasat/setup.c~mips-megapatch arch/mips/lasat/setup.c
--- 25/arch/mips/lasat/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lasat/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -26,20 +26,17 @@
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/pci.h>
-#include <linux/ide.h>
-
#include <linux/interrupt.h>
-#include <asm/time.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <asm/time.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
-#include <asm/lasat/lasat.h>
-
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
#include <asm/serial.h>
+#include <asm/lasat/lasat.h>
#include <asm/lasat/serial.h>
#ifdef CONFIG_PICVUE
@@ -57,13 +54,6 @@
int lasat_command_line = 0;
void lasatint_init(void);
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops std_ide_ops;
-extern struct ide_ops *ide_ops;
-#endif
-
-extern char arcs_cmdline[CL_SIZE];
-
extern void lasat_reboot_setup(void);
extern void pcisetup(void);
extern void edhac_init(void *, void *, void *);
@@ -122,19 +112,9 @@ static struct notifier_block lasat_panic
{ lasat_panic_prom_monitor, NULL, INT_MIN }
};
-#ifdef CONFIG_BLK_DEV_IDE
-static int lasat_ide_default_irq(ide_ioreg_t base) {
- return 0;
-}
-
-static ide_ioreg_t lasat_ide_default_io_base(int index) {
- return 0;
-}
-#endif
-
static void lasat_time_init(void)
{
- mips_counter_frequency = lasat_board_info.li_cpu_hz / 2;
+ mips_hpt_frequency = lasat_board_info.li_cpu_hz / 2;
}
static void lasat_timer_setup(struct irqaction *irq)
@@ -142,7 +122,7 @@ static void lasat_timer_setup(struct irq
write_c0_compare(
read_c0_count() +
- mips_counter_frequency / HZ);
+ mips_hpt_frequency / HZ);
change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5);
}
@@ -182,7 +162,7 @@ void __init serial_init(void)
}
#endif
-void __init lasat_setup(void)
+static void __init lasat_setup(void)
{
int i;
lasat_misc = &lasat_misc_info[mips_machtype];
@@ -194,12 +174,6 @@ void __init lasat_setup(void)
for (i = 0; i < sizeof(lasat_panic_block) / sizeof(struct notifier_block); i++)
notifier_chain_register(&panic_notifier_list, &lasat_panic_block[i]);
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
- ide_ops->ide_default_irq = &lasat_ide_default_irq;
- ide_ops->ide_default_io_base = &lasat_ide_default_io_base;
-#endif
-
lasat_reboot_setup();
board_time_init = lasat_time_init;
@@ -220,4 +194,4 @@ void __init lasat_setup(void)
prom_printf("Lasat specific initialization complete\n");
}
-
+early_initcall(lasat_setup);
diff -puN arch/mips/lib-32/csum_partial.S~mips-megapatch arch/mips/lib-32/csum_partial.S
--- 25/arch/mips/lib-32/csum_partial.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lib-32/csum_partial.S 2004-02-19 12:53:00.000000000 -0800
@@ -103,8 +103,8 @@ small_csumcpy:
.align 5
LEAF(csum_partial)
- move sum, zero
- move t7, zero
+ move sum, zero
+ move t7, zero
sltiu t8, a1, 0x8
bnez t8, small_csumcpy /* < 8 bytes to copy */
diff -puN arch/mips/lib-32/dump_tlb.c~mips-megapatch arch/mips/lib-32/dump_tlb.c
--- 25/arch/mips/lib-32/dump_tlb.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lib-32/dump_tlb.c 2004-02-19 12:53:00.000000000 -0800
@@ -143,7 +143,7 @@ void dump_list_process(struct task_struc
addr = (unsigned long) address;
- printk("Addr == %08x\n", addr);
+ printk("Addr == %08lx\n", addr);
printk("task == %8p\n", t);
printk("task->mm == %8p\n", t->mm);
//printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd);
@@ -211,10 +211,10 @@ void dump16(unsigned long *p)
{
int i;
- for(i = 0; i < 8; i++) {
- printk("*%8p = %08lx, ", p, *p);
+ for (i = 0; i < 8; i++) {
+ printk("*%08lx == %08lx, ", (unsigned long)p, *p);
p++;
- printk("*%8p = %08lx\n", p, *p);
+ printk("*%08lx == %08lx\n", (unsigned long)p, *p);
p++;
}
}
diff -puN arch/mips/lib-32/Makefile~mips-megapatch arch/mips/lib-32/Makefile
--- 25/arch/mips/lib-32/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lib-32/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,8 +2,7 @@
# Makefile for MIPS-specific library files..
#
-lib-y += csum_partial.o memset.o strlen_user.o strncpy_user.o strnlen_user.o \
- watch.o
+lib-y += csum_partial.o memset.o watch.o
ifeq ($(CONFIG_CPU_R3000)$(CONFIG_CPU_TX39XX),y)
lib-y += r3k_dump_tlb.o
diff -puN arch/mips/lib-32/r3k_dump_tlb.c~mips-megapatch arch/mips/lib-32/r3k_dump_tlb.c
--- 25/arch/mips/lib-32/r3k_dump_tlb.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lib-32/r3k_dump_tlb.c 2004-02-19 12:53:00.000000000 -0800
@@ -19,8 +19,7 @@
extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */
-void
-dump_tlb(int first, int last)
+void dump_tlb(int first, int last)
{
int i;
unsigned int asid;
@@ -28,8 +27,7 @@ dump_tlb(int first, int last)
asid = read_c0_entryhi() & 0xfc0;
- for(i=first;i<=last;i++)
- {
+ for (i = first; i <= last; i++) {
write_c0_index(i<<8);
__asm__ __volatile__(
".set\tnoreorder\n\t"
@@ -63,14 +61,12 @@ dump_tlb(int first, int last)
write_c0_entryhi(asid);
}
-void
-dump_tlb_all(void)
+void dump_tlb_all(void)
{
dump_tlb(0, current_cpu_data.tlbsize - 1);
}
-void
-dump_tlb_wired(void)
+void dump_tlb_wired(void)
{
int wired = r3k_have_wired_reg ? read_c0_wired() : 8;
@@ -78,10 +74,9 @@ dump_tlb_wired(void)
dump_tlb(0, wired - 1);
}
-void
-dump_tlb_addr(unsigned long addr)
+void dump_tlb_addr(unsigned long addr)
{
- unsigned int flags, oldpid;
+ unsigned long flags, oldpid;
int index;
local_irq_save(flags);
@@ -101,15 +96,13 @@ dump_tlb_addr(unsigned long addr)
dump_tlb(index, index);
}
-void
-dump_tlb_nonwired(void)
+void dump_tlb_nonwired(void)
{
int wired = r3k_have_wired_reg ? read_c0_wired() : 8;
dump_tlb(wired, current_cpu_data.tlbsize - 1);
}
-void
-dump_list_process(struct task_struct *t, void *address)
+void dump_list_process(struct task_struct *t, void *address)
{
pgd_t *page_dir, *pgd;
pmd_t *pmd;
@@ -148,14 +141,12 @@ dump_list_process(struct task_struct *t,
printk("\n");
}
-void
-dump_list_current(void *address)
+void dump_list_current(void *address)
{
dump_list_process(current, address);
}
-unsigned int
-vtop(void *address)
+unsigned int vtop(void *address)
{
pgd_t *pgd;
pmd_t *pmd;
@@ -172,16 +163,14 @@ vtop(void *address)
return paddr;
}
-void
-dump16(unsigned long *p)
+void dump16(unsigned long *p)
{
int i;
- for(i=0;i<8;i++)
- {
- printk("*%08lx == %08lx, ",
- (unsigned long)p, (unsigned long)*p++);
- printk("*%08lx == %08lx\n",
- (unsigned long)p, (unsigned long)*p++);
+ for (i = 0; i < 8; i++) {
+ printk("*%08lx == %08lx, ", (unsigned long)p, *p);
+ p++;
+ printk("*%08lx == %08lx\n", (unsigned long)p, *p);
+ p++;
}
}
diff -puN -L arch/mips/lib-32/strlen_user.S arch/mips/lib-32/strlen_user.S~mips-megapatch /dev/null
--- 25/arch/mips/lib-32/strlen_user.S
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,40 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
- * Copyright (c) 1999 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-#include <asm/sgidefs.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Return the size of a string (including the ending 0)
- *
- * Return 0 for error
- */
-LEAF(__strlen_user_asm)
- LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a0
- bltz v0, fault
-
-FEXPORT(__strlen_user_nocheck_asm)
- move v0, a0
-1: EX(lb, t0, (v0), fault)
- PTR_ADDIU v0, 1
- bnez t0, 1b
- PTR_SUBU v0, a0
- jr ra
- END(__strlen_user_asm)
-
-fault: move v0, zero
- jr ra
diff -puN -L arch/mips/lib-32/strncpy_user.S arch/mips/lib-32/strncpy_user.S~mips-megapatch /dev/null
--- 25/arch/mips/lib-32/strncpy_user.S
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,58 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1999 by Ralf Baechle
- */
-#include <linux/errno.h>
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Returns: -EFAULT if exception before terminator, N if the entire
- * buffer filled, else strlen.
- */
-
-/*
- * Ugly special case have to check: we might get passed a user space
- * pointer which wraps into the kernel space. We don't deal with that. If
- * it happens at most some bytes of the exceptions handlers will be copied.
- */
-
-LEAF(__strncpy_from_user_asm)
- LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a1
- bltz v0, fault
-
-FEXPORT(__strncpy_from_user_nocheck_asm)
- move v0, zero
- move v1, a1
- .set noreorder
-1: EX(lbu, t0, (v1), fault)
- PTR_ADDIU v1, 1
- beqz t0, 2f
- sb t0, (a0)
- PTR_ADDIU v0, 1
- bne v0, a2, 1b
- PTR_ADDIU a0, 1
- .set reorder
-2: PTR_ADDU t0, a1, v0
- xor t0, a1
- bltz t0, fault
- jr ra # return n
- END(__strncpy_from_user_asm)
-
-fault: li v0, -EFAULT
- jr ra
-
- .section __ex_table,"a"
- PTR 1b, fault
- .previous
diff -puN -L arch/mips/lib-32/strnlen_user.S arch/mips/lib-32/strnlen_user.S~mips-megapatch /dev/null
--- 25/arch/mips/lib-32/strnlen_user.S
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,46 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
- * Copyright (c) 1999 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-#include <asm/sgidefs.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Return the size of a string including the ending NUL character upto a
- * maximum of a1 or 0 in case of error.
- *
- * Note: for performance reasons we deliberately accept that a user may
- * make strlen_user and strnlen_user access the first few KSEG0
- * bytes. There's nothing secret there. On 64-bit accessing beyond
- * the maximum is a tad hairier ...
- */
-LEAF(__strnlen_user_asm)
- LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a0
- bltz v0, fault
-
-FEXPORT(__strnlen_user_nocheck_asm)
- move v0, a0
- PTR_ADDU a1, a0 # stop pointer
-1: beq v0, a1, 1f # limit reached?
- EX(lb, t0, (v0), fault)
- PTR_ADDU v0, 1
- bnez t0, 1b
-1: PTR_SUBU v0, a0
- jr ra
- END(__strnlen_user_asm)
-
-fault: move v0, zero
- jr ra
diff -puN arch/mips/lib-64/dump_tlb.c~mips-megapatch arch/mips/lib-64/dump_tlb.c
--- 25/arch/mips/lib-64/dump_tlb.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lib-64/dump_tlb.c 2004-02-19 12:53:00.000000000 -0800
@@ -200,12 +200,10 @@ void dump16(unsigned long *p)
{
int i;
- for(i = 0; i < 8; i++) {
- printk("*%08lx == %08lx, ",
- (unsigned long)p, (unsigned long)*p);
+ for (i = 0; i < 8; i++) {
+ printk("*%08lx == %08lx, ", (unsigned long)p, *p);
p++;
- printk("*%08lx == %08lx\n",
- (unsigned long)p, (unsigned long)*p);
+ printk("*%08lx == %08lx\n", (unsigned long)p, *p);
p++;
}
}
diff -puN arch/mips/lib-64/Makefile~mips-megapatch arch/mips/lib-64/Makefile
--- 25/arch/mips/lib-64/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lib-64/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,8 +2,7 @@
# Makefile for MIPS-specific library files..
#
-lib-y += csum_partial.o memset.o strlen_user.o strncpy_user.o strnlen_user.o \
- watch.o
+lib-y += csum_partial.o memset.o watch.o
ifeq ($(CONFIG_CPU_R3000)$(CONFIG_CPU_TX39XX),y)
lib-y += r3k_dump_tlb.o
diff -puN -L arch/mips/lib-64/strlen_user.S arch/mips/lib-64/strlen_user.S~mips-megapatch /dev/null
--- 25/arch/mips/lib-64/strlen_user.S
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,40 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
- * Copyright (c) 1999 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-#include <asm/sgidefs.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Return the size of a string (including the ending 0)
- *
- * Return 0 for error
- */
-LEAF(__strlen_user_asm)
- LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a0
- bnez v0, fault
-
-FEXPORT(__strlen_user_nocheck_asm)
- move v0, a0
-1: EX(lb, t0, (v0), fault)
- PTR_ADDIU v0, 1
- bnez t0, 1b
- PTR_SUBU v0, a0
- jr ra
- END(__strlen_user_asm)
-
-fault: move v0, zero
- jr ra
diff -puN -L arch/mips/lib-64/strncpy_user.S arch/mips/lib-64/strncpy_user.S~mips-megapatch /dev/null
--- 25/arch/mips/lib-64/strncpy_user.S
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,58 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1999 by Ralf Baechle
- */
-#include <linux/errno.h>
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Returns: -EFAULT if exception before terminator, N if the entire
- * buffer filled, else strlen.
- */
-
-/*
- * Ugly special case have to check: we might get passed a user space
- * pointer which wraps into the kernel space. We don't deal with that. If
- * it happens at most some bytes of the exceptions handlers will be copied.
- */
-
-LEAF(__strncpy_from_user_asm)
- LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a1
- bnez v0, fault
-
-FEXPORT(__strncpy_from_user_nocheck_asm)
- move v0, zero
- move v1, a1
- .set noreorder
-1: EX(lbu, t0, (v1), fault)
- PTR_ADDIU v1, 1
- beqz t0, 2f
- sb t0, (a0)
- PTR_ADDIU v0, 1
- bne v0, a2, 1b
- PTR_ADDIU a0, 1
- .set reorder
-2: PTR_ADDU t0, a1, v0
- xor t0, a1
- bltz t0, fault
- jr ra # return n
- END(__strncpy_from_user_asm)
-
-fault: li v0, -EFAULT
- jr ra
-
- .section __ex_table,"a"
- PTR 1b, fault
- .previous
diff -puN -L arch/mips/lib-64/strnlen_user.S arch/mips/lib-64/strnlen_user.S~mips-megapatch /dev/null
--- 25/arch/mips/lib-64/strnlen_user.S
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,46 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
- * Copyright (c) 1999 Silicon Graphics, Inc.
- */
-#include <asm/asm.h>
-#include <asm/offset.h>
-#include <asm/regdef.h>
-#include <asm/sgidefs.h>
-
-#define EX(insn,reg,addr,handler) \
-9: insn reg, addr; \
- .section __ex_table,"a"; \
- PTR 9b, handler; \
- .previous
-
-/*
- * Return the size of a string including the ending NUL character upto a
- * maximum of a1 or 0 in case of error.
- *
- * Note: for performance reasons we deliberately accept that a user may
- * make strlen_user and strnlen_user access the first few KSEG0
- * bytes. There's nothing secret there. On 64-bit accessing beyond
- * the maximum is a tad hairier ...
- */
-LEAF(__strnlen_user_asm)
- LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
- and v0, a0
- bnez v0, fault
-
-FEXPORT(__strnlen_user_nocheck_asm)
- move v0, a0
- PTR_ADDU a1, a0 # stop pointer
-1: beq v0, a1, 1f # limit reached?
- EX(lb, t0, (v0), fault)
- PTR_ADDU v0, 1
- bnez t0, 1b
-1: PTR_SUBU v0, a0
- jr ra
- END(__strnlen_user_asm)
-
-fault: move v0, zero
- jr ra
diff -puN /dev/null arch/mips/lib/dec_and_lock.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/lib/dec_and_lock.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,55 @@
+/*
+ * MIPS version of atomic_dec_and_lock() using cmpxchg
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <asm/atomic.h>
+#include <asm/system.h>
+
+/*
+ * This is an implementation of the notion of "decrement a
+ * reference count, and return locked if it decremented to zero".
+ *
+ * This implementation can be used on any architecture that
+ * has a cmpxchg, and where atomic->value is an int holding
+ * the value of the atomic (i.e. the high bits aren't used
+ * for a lock or anything like that).
+ *
+ * N.B. ATOMIC_DEC_AND_LOCK gets defined in include/linux/spinlock.h
+ * if spinlocks are empty and thus atomic_dec_and_lock is defined
+ * to be atomic_dec_and_test - in that case we don't need it
+ * defined here as well.
+ */
+
+#ifndef ATOMIC_DEC_AND_LOCK
+int atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock)
+{
+ int counter;
+ int newcount;
+
+ for (;;) {
+ counter = atomic_read(atomic);
+ newcount = counter - 1;
+ if (!newcount)
+ break; /* do it the slow way */
+
+ newcount = cmpxchg(&atomic->counter, counter, newcount);
+ if (newcount == counter)
+ return 0;
+ }
+
+ spin_lock(lock);
+ if (atomic_dec_and_test(atomic))
+ return 1;
+ spin_unlock(lock);
+ return 0;
+}
+
+EXPORT_SYMBOL(atomic_dec_and_lock);
+#endif /* ATOMIC_DEC_AND_LOCK */
diff -puN -L arch/mips/lib/floppy-no.c arch/mips/lib/floppy-no.c~mips-megapatch /dev/null
--- 25/arch/mips/lib/floppy-no.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,57 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Dummy file for machines without standard floppy drives.
- *
- * Copyright (C) 1998 by Ralf Baechle
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <asm/floppy.h>
-
-/*
- * How to access the FDC's registers.
- */
-static void no_fd_dummy(void)
-{
- panic("no_fd_dummy called - shouldn't happen");
-}
-
-static unsigned long no_fd_getfdaddr1(void)
-{
- return (unsigned long)-1; /* No FDC nowhere ... */
-}
-
-static unsigned long no_fd_drive_type(unsigned long n)
-{
- return 0;
-}
-
-struct fd_ops no_fd_ops = {
- /*
- * How to access the floppy controller's ports
- */
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- /*
- * How to access the floppy DMA functions.
- */
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- no_fd_getfdaddr1,
- (void *) no_fd_dummy,
- (void *) no_fd_dummy,
- no_fd_drive_type
-};
diff -puN -L arch/mips/lib/floppy-std.c arch/mips/lib/floppy-std.c~mips-megapatch /dev/null
--- 25/arch/mips/lib/floppy-std.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,149 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Access the floppy hardware on PC style hardware
- *
- * Copyright (C) 1996, 1997, 1998, 2003 by Ralf Baechle
- */
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/linkage.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cachectl.h>
-#include <asm/dma.h>
-#include <asm/floppy.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/pgtable.h>
-
-/*
- * How to access the FDC's registers.
- */
-static unsigned char std_fd_inb(unsigned int port)
-{
- return inb_p(port);
-}
-
-static void std_fd_outb(unsigned char value, unsigned int port)
-{
- outb_p(value, port);
-}
-
-/*
- * How to access the floppy DMA functions.
- */
-static void std_fd_enable_dma(int channel)
-{
- enable_dma(channel);
-}
-
-static void std_fd_disable_dma(int channel)
-{
- disable_dma(channel);
-}
-
-static int std_fd_request_dma(int channel)
-{
- return request_dma(channel, "floppy");
-}
-
-static void std_fd_free_dma(int channel)
-{
- free_dma(channel);
-}
-
-static void std_fd_clear_dma_ff(int channel)
-{
- clear_dma_ff(channel);
-}
-
-static void std_fd_set_dma_mode(int channel, char mode)
-{
- set_dma_mode(channel, mode);
-}
-
-static void std_fd_set_dma_addr(int channel, unsigned int addr)
-{
- set_dma_addr(channel, addr);
-}
-
-static void std_fd_set_dma_count(int channel, unsigned int count)
-{
- set_dma_count(channel, count);
-}
-
-static int std_fd_get_dma_residue(int channel)
-{
- return get_dma_residue(channel);
-}
-
-static void std_fd_enable_irq(int irq)
-{
- enable_irq(irq);
-}
-
-static void std_fd_disable_irq(int irq)
-{
- disable_irq(irq);
-}
-
-static unsigned long std_fd_getfdaddr1(void)
-{
- return 0x3f0;
-}
-
-static unsigned long std_fd_dma_mem_alloc(unsigned long size)
-{
- unsigned long mem;
-
- mem = __get_dma_pages(GFP_KERNEL, get_order(size));
-
- return mem;
-}
-
-static void std_fd_dma_mem_free(unsigned long addr, unsigned long size)
-{
- free_pages(addr, get_order(size));
-}
-
-static unsigned long std_fd_drive_type(unsigned long n)
-{
- if (n == 0)
- return 4; /* 3,5", 1.44mb */
-
- return 0;
-}
-
-struct fd_ops std_fd_ops = {
- /*
- * How to access the floppy controller's ports
- */
- std_fd_inb,
- std_fd_outb,
- /*
- * How to access the floppy DMA functions.
- */
- std_fd_enable_dma,
- std_fd_disable_dma,
- std_fd_request_dma,
- std_fd_free_dma,
- std_fd_clear_dma_ff,
- std_fd_set_dma_mode,
- std_fd_set_dma_addr,
- std_fd_set_dma_count,
- std_fd_get_dma_residue,
- std_fd_enable_irq,
- std_fd_disable_irq,
- std_fd_getfdaddr1,
- std_fd_dma_mem_alloc,
- std_fd_dma_mem_free,
- std_fd_drive_type
-};
diff -puN -L arch/mips/lib/ide-no.c arch/mips/lib/ide-no.c~mips-megapatch /dev/null
--- 25/arch/mips/lib/ide-no.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,35 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Stub IDE routines to keep Linux from crashing on machine which don't
- * have IDE like the Indy.
- *
- * Copyright (C) 1998, 1999 by Ralf Baechle
- */
-#include <linux/hdreg.h>
-#include <linux/kernel.h>
-#include <linux/ide.h>
-#include <asm/hdreg.h>
-
-static int no_ide_default_irq(ide_ioreg_t base)
-{
- return 0;
-}
-
-static ide_ioreg_t no_ide_default_io_base(int index)
-{
- return 0;
-}
-
-static void no_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq)
-{
-}
-
-struct ide_ops no_ide_ops = {
- &no_ide_default_irq,
- &no_ide_default_io_base,
- &no_ide_init_hwif_ports
-};
diff -puN -L arch/mips/lib/ide-std.c arch/mips/lib/ide-std.c~mips-megapatch /dev/null
--- 25/arch/mips/lib/ide-std.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,63 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * IDE routines for typical pc-like standard configurations.
- *
- * Copyright (C) 1998, 1999, 2001 by Ralf Baechle
- */
-#include <linux/sched.h>
-#include <linux/ide.h>
-#include <linux/ioport.h>
-#include <linux/hdreg.h>
-#include <asm/hdreg.h>
-
-static int std_ide_default_irq(ide_ioreg_t base)
-{
- switch (base) {
- case 0x1f0: return 14;
- case 0x170: return 15;
- case 0x1e8: return 11;
- case 0x168: return 10;
- case 0x1e0: return 8;
- case 0x160: return 12;
- default:
- return 0;
- }
-}
-
-static ide_ioreg_t std_ide_default_io_base(int index)
-{
- static unsigned long ata_io_base[MAX_HWIFS] = {
- 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160
- };
-
- return ata_io_base[index];
-}
-
-static void std_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq)
-{
- ide_ioreg_t reg = data_port;
- int i;
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- if (ctrl_port) {
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- } else {
- hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
- }
- if (irq != NULL)
- *irq = 0;
- hw->io_ports[IDE_IRQ_OFFSET] = 0;
-}
-
-struct ide_ops std_ide_ops = {
- &std_ide_default_irq,
- &std_ide_default_io_base,
- &std_ide_init_hwif_ports
-};
diff -puN arch/mips/lib/Makefile~mips-megapatch arch/mips/lib/Makefile
--- 25/arch/mips/lib/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/lib/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,9 +2,7 @@
# Makefile for MIPS-specific library files..
#
-lib-y += csum_partial_copy.o memcpy.o promlib.o rtc-no.o rtc-std.o
-
-lib-$(subst m,y,$(CONFIG_BLK_DEV_FD)) += floppy-no.o floppy-std.o
-lib-$(subst m,y,$(CONFIG_IDE)) += ide-no.o ide-std.o
+lib-y += csum_partial_copy.o dec_and_lock.o memcpy.o promlib.o strlen_user.o \
+ strncpy_user.o strnlen_user.o
EXTRA_AFLAGS := $(CFLAGS)
diff -puN -L arch/mips/lib/rtc-no.c arch/mips/lib/rtc-no.c~mips-megapatch /dev/null
--- 25/arch/mips/lib/rtc-no.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,30 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Stub RTC routines to keep Linux from crashing on machine which don't
- * have a RTC chip.
- *
- * Copyright (C) 1998, 2001, 2003 by Ralf Baechle
- */
-#include <linux/kernel.h>
-#include <linux/mc146818rtc.h>
-
-static unsigned int shouldnt_happen(void)
-{
- static int called;
-
- if (called) {
- called = 1;
- printk(KERN_DEBUG "RTC functions called - shouldn't happen\n");
- }
-
- return 0;
-}
-
-struct rtc_ops no_rtc_ops = {
- .rtc_read_data = (void *) &shouldnt_happen,
- .rtc_write_data = (void *) &shouldnt_happen,
- .rtc_bcd_mode = (void *) &shouldnt_happen
-};
diff -puN -L arch/mips/lib/rtc-std.c arch/mips/lib/rtc-std.c~mips-megapatch /dev/null
--- 25/arch/mips/lib/rtc-std.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,34 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * RTC routines for PC style attached Dallas chip.
- *
- * Copyright (C) 1998, 2001 by Ralf Baechle
- */
-#include <linux/mc146818rtc.h>
-#include <asm/io.h>
-
-static unsigned char std_rtc_read_data(unsigned long addr)
-{
- outb_p(addr, RTC_PORT(0));
- return inb_p(RTC_PORT(1));
-}
-
-static void std_rtc_write_data(unsigned char data, unsigned long addr)
-{
- outb_p(addr, RTC_PORT(0));
- outb_p(data, RTC_PORT(1));
-}
-
-static int std_rtc_bcd_mode(void)
-{
- return 1;
-}
-
-struct rtc_ops std_rtc_ops = {
- &std_rtc_read_data,
- &std_rtc_write_data,
- &std_rtc_bcd_mode
-};
diff -puN /dev/null arch/mips/lib/strlen_user.S
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/lib/strlen_user.S 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,40 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
+ * Copyright (c) 1999 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+#include <asm/sgidefs.h>
+
+#define EX(insn,reg,addr,handler) \
+9: insn reg, addr; \
+ .section __ex_table,"a"; \
+ PTR 9b, handler; \
+ .previous
+
+/*
+ * Return the size of a string (including the ending 0)
+ *
+ * Return 0 for error
+ */
+LEAF(__strlen_user_asm)
+ LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
+ and v0, a0
+ bnez v0, fault
+
+FEXPORT(__strlen_user_nocheck_asm)
+ move v0, a0
+1: EX(lb, t0, (v0), fault)
+ PTR_ADDIU v0, 1
+ bnez t0, 1b
+ PTR_SUBU v0, a0
+ jr ra
+ END(__strlen_user_asm)
+
+fault: move v0, zero
+ jr ra
diff -puN /dev/null arch/mips/lib/strncpy_user.S
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/lib/strncpy_user.S 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,58 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1996, 1999 by Ralf Baechle
+ */
+#include <linux/errno.h>
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+
+#define EX(insn,reg,addr,handler) \
+9: insn reg, addr; \
+ .section __ex_table,"a"; \
+ PTR 9b, handler; \
+ .previous
+
+/*
+ * Returns: -EFAULT if exception before terminator, N if the entire
+ * buffer filled, else strlen.
+ */
+
+/*
+ * Ugly special case have to check: we might get passed a user space
+ * pointer which wraps into the kernel space. We don't deal with that. If
+ * it happens at most some bytes of the exceptions handlers will be copied.
+ */
+
+LEAF(__strncpy_from_user_asm)
+ LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
+ and v0, a1
+ bnez v0, fault
+
+FEXPORT(__strncpy_from_user_nocheck_asm)
+ move v0, zero
+ move v1, a1
+ .set noreorder
+1: EX(lbu, t0, (v1), fault)
+ PTR_ADDIU v1, 1
+ beqz t0, 2f
+ sb t0, (a0)
+ PTR_ADDIU v0, 1
+ bne v0, a2, 1b
+ PTR_ADDIU a0, 1
+ .set reorder
+2: PTR_ADDU t0, a1, v0
+ xor t0, a1
+ bltz t0, fault
+ jr ra # return n
+ END(__strncpy_from_user_asm)
+
+fault: li v0, -EFAULT
+ jr ra
+
+ .section __ex_table,"a"
+ PTR 1b, fault
+ .previous
diff -puN /dev/null arch/mips/lib/strnlen_user.S
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/lib/strnlen_user.S 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,46 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
+ * Copyright (c) 1999 Silicon Graphics, Inc.
+ */
+#include <asm/asm.h>
+#include <asm/offset.h>
+#include <asm/regdef.h>
+#include <asm/sgidefs.h>
+
+#define EX(insn,reg,addr,handler) \
+9: insn reg, addr; \
+ .section __ex_table,"a"; \
+ PTR 9b, handler; \
+ .previous
+
+/*
+ * Return the size of a string including the ending NUL character upto a
+ * maximum of a1 or 0 in case of error.
+ *
+ * Note: for performance reasons we deliberately accept that a user may
+ * make strlen_user and strnlen_user access the first few KSEG0
+ * bytes. There's nothing secret there. On 64-bit accessing beyond
+ * the maximum is a tad hairier ...
+ */
+LEAF(__strnlen_user_asm)
+ LONG_L v0, TI_ADDR_LIMIT($28) # pointer ok?
+ and v0, a0
+ bnez v0, fault
+
+FEXPORT(__strnlen_user_nocheck_asm)
+ move v0, a0
+ PTR_ADDU a1, a0 # stop pointer
+1: beq v0, a1, 1f # limit reached?
+ EX(lb, t0, (v0), fault)
+ PTR_ADDU v0, 1
+ bnez t0, 1b
+1: PTR_SUBU v0, a0
+ jr ra
+ END(__strnlen_user_asm)
+
+fault: move v0, zero
+ jr ra
diff -puN arch/mips/Makefile~mips-megapatch arch/mips/Makefile
--- 25/arch/mips/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -5,7 +5,7 @@
#
# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
# DECStation modifications by Paul M. Antoine, 1996
-# Copyright (C) 2002 Maciej W. Rozycki
+# Copyright (C) 2002, 2003 Maciej W. Rozycki
#
# This file is included by the global makefile so that you can add your own
# architecture-specific flags and dependencies. Remember to do have actions
@@ -16,22 +16,28 @@
# Select the object file format to substitute into the linker script.
#
ifdef CONFIG_CPU_LITTLE_ENDIAN
-32bit-tool-prefix = mips64el-linux-
+32bit-tool-prefix = mipsel-linux-
64bit-tool-prefix = mips64el-linux-
32bit-bfd = elf32-tradlittlemips
64bit-bfd = elf64-tradlittlemips
else
-32bit-tool-prefix = mips64-linux-
+32bit-tool-prefix = mips-linux-
64bit-tool-prefix = mips64-linux-
32bit-bfd = elf32-tradbigmips
64bit-bfd = elf64-tradbigmips
endif
ifdef CONFIG_MIPS32
+gcc-abi = 32
+gas-abi = 32
tool-prefix = $(32bit-tool-prefix)
+UTS_MACHINE := mips
endif
ifdef CONFIG_MIPS64
+gcc-abi = 64
+gas-abi = 32
tool-prefix = $(64bit-tool-prefix)
+UTS_MACHINE := mips64
endif
ifdef CONFIG_CROSSCOMPILE
@@ -50,76 +56,128 @@ endif
#
cflags-y := -I $(TOPDIR)/include/asm/gcc
cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
-cflags-$(CONFIG_MIPS32) += $(call check_gcc, -mabi=32,)
-cflags-$(CONFIG_MIPS64) += -mabi=64
+cflags-y += $(call check_gcc, -finline-limit=100000,)
LDFLAGS_vmlinux += -G 0 -static # -N
MODFLAGS += -mlong-calls
-cflags-$(CONFIG_KGDB) += -g
cflags-$(CONFIG_SB1XXX_CORELIS) += -mno-sched-prolog -fno-omit-frame-pointer
check_warning = $(shell if $(CC) $(1) -c -o /dev/null -xc /dev/null > /dev/null 2>&1; then echo "$(1)"; else echo "$(2)"; fi)
#
+# Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
+#
+# <cpu0>,<isa0> -- preferred CPU and ISA designations (may require
+# recent tools)
+# <cpu1>,<isa1> -- fallback CPU and ISA designations (have to work
+# with up to the oldest supported tools)
+# <isa2> -- an ISA designation used as an ABI selector for
+# gcc versions that do not support "-mabi=32"
+# (depending on the CPU type, either "mips1" or
+# "mips2")
+#
+set_gccflags = $(shell \
+while :; do \
+ cpu=$(1); isa=-$(2); \
+ for gcc_opt in -march= -mcpu=; do \
+ $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
+ -xc /dev/null > /dev/null 2>&1 && \
+ break 2; \
+ done; \
+ cpu=$(3); isa=-$(4); \
+ for gcc_opt in -march= -mcpu=; do \
+ $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
+ -xc /dev/null > /dev/null 2>&1 && \
+ break 2; \
+ done; \
+ break; \
+done; \
+gcc_abi=-mabi=$(gcc-abi); gcc_cpu=$$cpu; \
+if $(CC) $$gcc_abi -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then \
+ gcc_isa=$$isa; \
+else \
+ gcc_abi=; gcc_isa=-$(5); \
+fi; \
+gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \
+while :; do \
+ for gas_opt in -Wa,-march= -Wa,-mcpu=; do \
+ $(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \
+ -o /dev/null -xassembler /dev/null > /dev/null 2>&1 && \
+ break 2; \
+ done; \
+ gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \
+ break; \
+done; \
+if test x$(gcc-abi) != x$(gas-abi); then \
+ gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
+fi; \
+echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa)
+
+#
# CPU-dependent compiler/assembler options for optimization.
-# This is done in several steps:
#
-# - cflags-y contains the options which select for which processor to
-# optimize the code for. The options should not contain any
-# options that change the ISA level but only compiler flags to
-# tune performance of the generated code.
-# - 32bit-isa-y contains the options which select the ISA for 32-bit kernels.
-# A kernel built those options will only work on hardware which
-# actually supports this ISA.
-# - 64bit-isa-y contains the options which select the ISA for 64-bit kernels.
-# A kernel built those options will only work on hardware which
-# actually supports this ISA.
-#
-cflags-$(CONFIG_CPU_R3000) += -mcpu=r3000
-32bit-isa-$(CONFIG_CPU_R3000) += -mips1
-64bit-isa-$(CONFIG_CPU_R3000) += -mboom
-cflags-$(CONFIG_CPU_TX39XX) += -mcpu=r3000
-32bit-isa-$(CONFIG_CPU_TX39XX) += -mips1
-64bit-isa-$(CONFIG_CPU_TX39XX) += -mboom
-cflags-$(CONFIG_CPU_R6000) += -mcpu=r6000
-32bit-isa-$(CONFIG_CPU_R6000) += -mips2 -Wa,--trap
-64bit-isa-$(CONFIG_CPU_R6000) += -mboom -Wa,--trap
-cflags-$(CONFIG_CPU_R4300) += -mcpu=r4300
-32bit-isa-$(CONFIG_CPU_R4300) += -mips2 -Wa,--trap
-64bit-isa-$(CONFIG_CPU_R4300) += -mips3 -Wa,--trap
-cflags-$(CONFIG_CPU_VR41XX) += -mcpu=r4600
-32bit-isa-$(CONFIG_CPU_VR41XX) += -mips2 -Wa,--trap
-64bit-isa-$(CONFIG_CPU_VR41XX) += -mips3 -Wa,--trap
-cflags-$(CONFIG_CPU_R4X00) += -mcpu=r4600
-32bit-isa-$(CONFIG_CPU_R4X00) += -mips2 -Wa,--trap
-64bit-isa-$(CONFIG_CPU_R4X00) += -mips3 -Wa,--trap
-cflags-$(CONFIG_CPU_MIPS32) += $(call check_gcc, -mtune=mips32, -mcpu=r4600)
-32bit-isa-$(CONFIG_CPU_MIPS32) += $(call check_gcc, -mips32 -mabi=32, -mips2) -Wa,--trap
-64bit-isa-$(CONFIG_CPU_MIPS32) += -mboom
-cflags-$(CONFIG_CPU_MIPS64) +=
-32bit-isa-$(CONFIG_CPU_MIPS64) += $(call check_gcc, -mips32, -mips2) -Wa,--trap
-64bit-isa-$(CONFIG_CPU_MIPS64) += $(call check_gcc, -mips64, -mips4) -Wa,--trap
-cflags-$(CONFIG_CPU_R5000) += -mcpu=r8000
-32bit-isa-$(CONFIG_CPU_R5000) += -mips2 -Wa,--trap
-64bit-isa-$(CONFIG_CPU_R5000) += -mips4 -Wa,--trap
-cflags-$(CONFIG_CPU_R5432) += -mcpu=r5000
-32bit-isa-$(CONFIG_CPU_R5432) += -mips1 -Wa,--trap
-64bit-isa-$(CONFIG_CPU_R5432) += -mips3 -Wa,--trap
-cflags-$(CONFIG_CPU_NEVADA) += -mcpu=r8000 -mmad
-32bit-isa-$(CONFIG_CPU_NEVADA) += -mips2 -Wa,--trap
-64bit-isa-$(CONFIG_CPU_NEVADA) += -mips3 -Wa,--trap
-cflags-$(CONFIG_CPU_RM7000) += $(call check_gcc, -mcpu=r7000, -mcpu=r5000)
-32bit-isa-$(CONFIG_CPU_RM7000) += -mips2 -Wa,--trap
-64bit-isa-$(CONFIG_CPU_RM7000) += -mips4 -Wa,--trap
-cflags-$(CONFIG_CPU_SB1) += $(call check_gcc, -mcpu=sb1, -mcpu=r8000)
-32bit-isa-$(CONFIG_CPU_SB1) += $(call check_gcc, -mips32, -mips2) -Wa,--trap
-64bit-isa-$(CONFIG_CPU_SB1) += $(call check_gcc, -mips64, -mips4) -Wa,--trap
-cflags-$(CONFIG_CPU_R8000) += -mcpu=r8000
-32bit-isa-$(CONFIG_CPU_R8000) += -mips2 -Wa,--trap
-64bit-isa-$(CONFIG_CPU_R8000) += -mips4 -Wa,--trap
-cflags-$(CONFIG_CPU_R10000) += -mcpu=r8000
-32bit-isa-$(CONFIG_CPU_R10000) += -mips2 -Wa,--trap
-64bit-isa-$(CONFIG_CPU_R10000) += -mips4 -Wa,--trap
+cflags-$(CONFIG_CPU_R3000) += \
+ $(call set_gccflags,r3000,mips1,r3000,mips1,mips1)
+
+cflags-$(CONFIG_CPU_TX39XX) += \
+ $(call set_gccflags,r3900,mips1,r3000,mips1,mips1)
+
+cflags-$(CONFIG_CPU_R6000) += \
+ $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_R4300) += \
+ $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_VR41XX) += \
+ $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_R4X00) += \
+ $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_MIPS32) += \
+ $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_MIPS64) += \
+ $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_R5000) += \
+ $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_R5432) += \
+ $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_NEVADA) += \
+ $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \
+ -Wa,--trap
+# $(call check_gcc,-mmad,)
+
+cflags-$(CONFIG_CPU_RM7000) += \
+ $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_RM9000) += \
+ $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_SB1) += \
+ $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_R8000) += \
+ $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \
+ -Wa,--trap
+
+cflags-$(CONFIG_CPU_R10000) += \
+ $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \
+ -Wa,--trap
ifdef CONFIG_CPU_SB1
ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
@@ -129,13 +187,11 @@ endif
#
# ramdisk/initrd support
-# You need a compressed ramdisk image, named ramdisk.gz in
-# arch/mips/ramdisk
+# You need a compressed ramdisk image, named
+# CONFIG_EMBEDDED_RAMDISK_IMAGE. Relative pathnames
+# are relative to arch/mips/ramdisk/.
#
-ifdef CONFIG_EMBEDDED_RAMDISK
-CORE_FILES += arch/mips/ramdisk/ramdisk.o
-SUBDIRS += arch/mips/ramdisk
-endif
+core-$(CONFIG_EMBEDDED_RAMDISK) += arch/mips/ramdisk/
#
# Firmware support
@@ -150,18 +206,85 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/s
#
# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
#
-core-$(CONFIG_MIPS_JAZZ) += arch/mips/jazz/
-load-$(CONFIG_MIPS_JAZZ) += 0x80080000
+core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
+cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
+load-$(CONFIG_MACH_JAZZ) += 0x80080000
+#
+# Common Alchemy Au1x00 stuff
+#
+core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
+cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
#
-# Au1500 (Alchemy Semi PB1500) eval board
+# AMD Alchemy Pb1000 eval board
+#
+libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
+cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
+load-$(CONFIG_MIPS_PB1000) += 0x80100000
+
+#
+# AMD Alchemy Pb1100 eval board
+#
+libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
+cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
+load-$(CONFIG_MIPS_PB1100) += 0x80100000
+
+#
+# AMD Alchemy Pb1500 eval board
#
-core-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/common/
libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
+cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
load-$(CONFIG_MIPS_PB1500) += 0x80100000
#
+# AMD Alchemy Db1000 eval board
+#
+libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
+cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
+load-$(CONFIG_MIPS_DB1000) += 0x80100000
+
+#
+# AMD Alchemy Db1100 eval board
+#
+libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
+cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
+load-$(CONFIG_MIPS_DB1100) += 0x80100000
+
+#
+# AMD Alchemy Db1500 eval board
+#
+libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
+cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
+load-$(CONFIG_MIPS_DB1500) += 0x80100000
+
+#
+# AMD Alchemy Bosporus eval board
+#
+libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
+cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
+load-$(CONFIG_MIPS_BOSPORUS) += 0x80100000
+
+#
+# AMD Alchemy Mirage eval board
+#
+libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
+cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
+load-$(CONFIG_MIPS_MIRAGE) += 0x80100000
+
+#
+# 4G-Systems eval board
+#
+libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
+load-$(CONFIG_MIPS_MTX1) += 0x80100000
+
+#
+# MyCable eval board
+#
+libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
+load-$(CONFIG_MIPS_XXS1500) += 0x80100000
+
+#
# Baget/MIPS
#
libs-$(CONFIG_BAGET_MIPS) += arch/mips/baget/ arch/mips/baget/prom/
@@ -176,22 +299,25 @@ load-$(CONFIG_MIPS_COBALT) += 0x80080000
#
# DECstation family
#
-core-$(CONFIG_DECSTATION) += arch/mips/dec/
-libs-$(CONFIG_DECSTATION) += arch/mips/dec/prom/
-load-$(CONFIG_DECSTATION) += 0x80040000
+core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
+cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
+libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
+load-$(CONFIG_MACH_DECSTATION) += 0x80040000
CLEAN_FILES += drivers/tc/lk201-map.c
#
# Galileo EV64120 Board
#
-core-$(CONFIG_MIPS_EV64120) += arch/mips/galileo-boards/ev64120/
+core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
+core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
+cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
load-$(CONFIG_MIPS_EV64120) += 0x80100000
#
# Galileo EV96100 Board
#
-core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/generic/ \
- arch/mips/galileo-boards/ev96100/
+core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
+cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
load-$(CONFIG_MIPS_EV96100) += 0x80100000
#
@@ -214,16 +340,23 @@ core-$(CONFIG_MIPS_ITE8172) += arch/mips
load-$(CONFIG_MIPS_ITE8172) += 0x80100000
#
-# MIPS Atlas board
+# For all MIPS, Inc. eval boards
#
core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
+
+#
+# MIPS Atlas board
+#
core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
+cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
+cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
load-$(CONFIG_MIPS_ATLAS) += 0x80100000
#
# MIPS Malta board
#
core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
+cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
load-$(CONFIG_MIPS_MALTA) += 0x80100000
#
@@ -240,6 +373,7 @@ load-$(CONFIG_MIPS_SEAD) += 0x80100000
#
core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
arch/mips/gt64120/momenco_ocelot/
+cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
load-$(CONFIG_MOMENCO_OCELOT) += 0x80100000
#
@@ -260,9 +394,23 @@ core-$(CONFIG_MOMENCO_OCELOT_C) += arch/
load-$(CONFIG_MOMENCO_OCELOT_C) += 0x80100000
#
-# NEC DDB Vrc-5074
+# Momentum Jaguar ATX
+#
+core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
+ifdef CONFIG_JAGUAR_DMALOW
+load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0x88000000
+else
+load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0x80100000
+endif
+
+#
+# NEC DDB
#
core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
+
+#
+# NEC DDB Vrc-5074
+#
core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/
load-$(CONFIG_DDB5074) += 0x80080000
@@ -279,6 +427,7 @@ core-$(CONFIG_DDB5477) += arch/mips/ddb
load-$(CONFIG_DDB5477) += 0x80100000
core-$(CONFIG_LASAT) += arch/mips/lasat/
+cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
load-$(CONFIG_LASAT) += 0x80000000
#
@@ -289,9 +438,14 @@ core-$(CONFIG_NEC_OSPREY) += arch/mips/v
load-$(CONFIG_NEC_OSPREY) += 0x80002000
#
+# Common VR41xx
+#
+core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
+cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
+
+#
# NEC Eagle/Hawk (VR4122/VR4131) board
#
-core-$(CONFIG_VR41XX_COMMON) += arch/mips/vr41xx/common/
core-$(CONFIG_NEC_EAGLE) += arch/mips/vr41xx/nec-eagle/
load-$(CONFIG_NEC_EAGLE) += 0x80000000
@@ -340,6 +494,7 @@ load-$(CONFIG_TANBAC_TB0229) += 0x800000
# will break so for 64-bit kernels we have to raise the start address by 8kb.
#
core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
+cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
ifdef CONFIG_MIPS32
load-$(CONFIG_SGI_IP22) += 0x88002000
endif
@@ -356,6 +511,7 @@ endif
#
ifdef CONFIG_SGI_IP27
core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
+cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
#load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
ifdef CONFIG_MAPPED_KERNEL
load-$(CONFIG_SGI_IP27) += 0xc001c000
@@ -373,11 +529,12 @@ endif
# will break so for 64-bit kernels we have to raise the start address by 8kb.
#
core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
+cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
ifdef CONFIG_MIPS32
-load-$(CONFIG_SGI_IP32) += 0x88002000
+load-$(CONFIG_SGI_IP32) += 0x80002000
endif
ifdef CONFIG_MIPS64
-load-$(CONFIG_SGI_IP32) += 0x88004000
+load-$(CONFIG_SGI_IP32) += 0x80004000
endif
#
@@ -388,6 +545,7 @@ endif
# removed (as happens, even if they have __initcall/module_init)
#
core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
+
core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
#
@@ -414,7 +572,8 @@ load-$(CONFIG_SIBYTE_SWARM) := 0x8010000
# SNI RM200 PCI
#
core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
-load-$(CONFIG_SNI_RM200_PCI) += 0x80080000
+cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
+load-$(CONFIG_SNI_RM200_PCI) += 0x80600000
#
# Toshiba JMR-TX3927 board
@@ -431,6 +590,7 @@ core-$(CONFIG_TOSHIBA_RBTX4927) += arch/
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
load-$(CONFIG_TOSHIBA_RBTX4927) += 0x80020000
+cflags-y += -Iinclude/asm-mips/mach-generic
drivers-$(CONFIG_PCI) += arch/mips/pci/
ifdef CONFIG_MIPS32
@@ -463,17 +623,6 @@ endif
#AS += -64
#LDFLAGS += -m elf64bmip
-ifdef CONFIG_MIPS64
-#
-# We use an unusual code model for building 64-bit kernels. 64-bit ELF,
-# squeezed into 32-bit ELF files. Later version of gas throw silly warnings
-# which requires the use of -mgp64 which not all gas versions have ...
-#
-GRRR=-Wa,-mgp64
-cflags-$(CONFIG_BOOT_ELF32) += -Wa,-32 $(call check_warning, $(GRRR),)
-cflags-$(CONFIG_BOOT_ELF64) += -Wa,-32 $(call check_warning, $(GRRR),)
-endif
-
#
# Choosing incompatible machines durings configuration will result in
# error messages during linking. Select a default linkscript if
@@ -516,25 +665,32 @@ endif
ifdef CONFIG_MAPPED_KERNEL
vmlinux.64: vmlinux
- $(OBJCOPY) -O $(64bit-bfd) --change-addresses=0xbfffffff40000000 $< $@
+ $(OBJCOPY) -O $(64bit-bfd) --remove-section=.reginfo \
+ --change-addresses=0xc000000080000000 $< $@
else
vmlinux.64: vmlinux
- $(OBJCOPY) -O $(64bit-bfd) --change-addresses=0xa7ffffff80000000 $< $@
+ $(OBJCOPY) -O $(64bit-bfd) --remove-section=.reginfo \
+ --change-addresses=0xa800000080000000 $< $@
endif
makeboot =$(Q)$(MAKE) -f scripts/Makefile.build obj=arch/mips/boot $(1)
-#
-# SNI firmware is f*cked in interesting ways ...
-#
+ifdef CONFIG_SGI_IP27
+all: vmlinux.64
+endif
+
ifdef CONFIG_SNI_RM200_PCI
-all: vmlinux.rm200
+all: vmlinux.ecoff
endif
vmlinux.ecoff vmlinux.rm200: vmlinux
+@$(call makeboot,$@)
+vmlinux.srec: vmlinux
+ +@$(call makeboot,$@)
+
CLEAN_FILES += vmlinux.ecoff \
+ vmlinux.srec \
vmlinux.rm200.tmp \
vmlinux.rm200
@@ -594,4 +750,6 @@ include/asm-$(ARCH)/reg.h: arch/$(ARCH)/
CLEAN_FILES += include/asm-$(ARCH)/offset.h.tmp \
include/asm-$(ARCH)/offset.h \
include/asm-$(ARCH)/reg.h.tmp \
- include/asm-$(ARCH)/reg.h
+ include/asm-$(ARCH)/reg.h \
+ vmlinux.64 \
+ vmlinux.ecoff
diff -puN arch/mips/math-emu/cp1emu.c~mips-megapatch arch/mips/math-emu/cp1emu.c
--- 25/arch/mips/math-emu/cp1emu.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/math-emu/cp1emu.c 2004-02-19 12:53:00.000000000 -0800
@@ -39,6 +39,7 @@
#include <asm/inst.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
+#include <asm/cpu-features.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/signal.h>
@@ -233,7 +234,7 @@ static int cop1Emulate(struct pt_regs *x
fpuemuprivate.stats.errors++;
return SIGBUS;
}
- /* __computer_return_epc() will have updated cp0_epc */
+ /* __compute_return_epc() will have updated cp0_epc */
contpc = REG_TO_VA xcp->cp0_epc;
/* In order not to confuse ptrace() et al, tweak context */
xcp->cp0_epc = VA_TO_REG emulpc - 4;
diff -puN arch/mips/math-emu/dp_fint.c~mips-megapatch arch/mips/math-emu/dp_fint.c
--- 25/arch/mips/math-emu/dp_fint.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/math-emu/dp_fint.c 2004-02-19 12:53:00.000000000 -0800
@@ -33,6 +33,8 @@ ieee754dp ieee754dp_fint(int x)
CLEARCX;
+ xc = ( 0 ? xc : xc );
+
if (x == 0)
return ieee754dp_zero(0);
if (x == 1 || x == -1)
diff -puN arch/mips/math-emu/dp_flong.c~mips-megapatch arch/mips/math-emu/dp_flong.c
--- 25/arch/mips/math-emu/dp_flong.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/math-emu/dp_flong.c 2004-02-19 12:53:00.000000000 -0800
@@ -33,6 +33,8 @@ ieee754dp ieee754dp_flong(s64 x)
CLEARCX;
+ xc = ( 0 ? xc : xc );
+
if (x == 0)
return ieee754dp_zero(0);
if (x == 1 || x == -1)
diff -puN arch/mips/math-emu/kernel_linkage.c~mips-megapatch arch/mips/math-emu/kernel_linkage.c
--- 25/arch/mips/math-emu/kernel_linkage.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/math-emu/kernel_linkage.c 2004-02-19 12:53:00.000000000 -0800
@@ -19,6 +19,7 @@
* manipulation primitives for the Algorithmics MIPS
* FPU Emulator
*/
+#include <linux/config.h>
#include <linux/sched.h>
#include <asm/processor.h>
#include <asm/signal.h>
diff -puN arch/mips/math-emu/sp_fint.c~mips-megapatch arch/mips/math-emu/sp_fint.c
--- 25/arch/mips/math-emu/sp_fint.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/math-emu/sp_fint.c 2004-02-19 12:53:00.000000000 -0800
@@ -33,6 +33,8 @@ ieee754sp ieee754sp_fint(int x)
CLEARCX;
+ xc = ( 0 ? xc : xc );
+
if (x == 0)
return ieee754sp_zero(0);
if (x == 1 || x == -1)
diff -puN arch/mips/math-emu/sp_flong.c~mips-megapatch arch/mips/math-emu/sp_flong.c
--- 25/arch/mips/math-emu/sp_flong.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/math-emu/sp_flong.c 2004-02-19 12:53:00.000000000 -0800
@@ -33,6 +33,8 @@ ieee754sp ieee754sp_flong(s64 x)
CLEARCX;
+ xc = ( 0 ? xc : xc );
+
if (x == 0)
return ieee754sp_zero(0);
if (x == 1 || x == -1)
diff -puN /dev/null arch/mips/mips-boards/atlas/atlas_gdb.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/mips-boards/atlas/atlas_gdb.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,97 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * This is the interface to the remote debugger stub.
+ */
+#include <asm/io.h>
+#include <asm/mips-boards/atlas.h>
+#include <asm/mips-boards/saa9730_uart.h>
+
+#define INB(a) inb((unsigned long)a)
+#define OUTB(x,a) outb(x,(unsigned long)a)
+
+/*
+ * This is the interface to the remote debugger stub
+ * if the Philips part is used for the debug port,
+ * called from the platform setup code.
+ */
+void *saa9730_base = (void *)ATLAS_SAA9730_REG;
+
+static int saa9730_kgdb_active = 0;
+
+#define SAA9730_BAUDCLOCK(baud) (((ATLAS_SAA9730_BAUDCLOCK/(baud))/16)-1)
+
+int saa9730_kgdb_hook(int speed)
+{
+ int baudclock;
+ t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
+
+ /*
+ * Clear all interrupts
+ */
+ (void) INB(&kgdb_uart->Lsr);
+ (void) INB(&kgdb_uart->Msr);
+ (void) INB(&kgdb_uart->Thr_Rbr);
+ (void) INB(&kgdb_uart->Iir_Fcr);
+
+ /*
+ * Now, initialize the UART
+ */
+ /* 8 data bits, one stop bit, no parity */
+ OUTB(SAA9730_LCR_DATA8, &kgdb_uart->Lcr);
+
+ baudclock = SAA9730_BAUDCLOCK(speed);
+
+ OUTB((baudclock >> 16) & 0xff, &kgdb_uart->BaudDivMsb);
+ OUTB( baudclock & 0xff, &kgdb_uart->BaudDivLsb);
+
+ /* Set RTS/DTR active */
+ OUTB(SAA9730_MCR_DTR | SAA9730_MCR_RTS, &kgdb_uart->Mcr);
+ saa9730_kgdb_active = 1;
+
+ return speed;
+}
+
+int saa9730_putDebugChar(char c)
+{
+ t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
+
+ if (!saa9730_kgdb_active) { /* need to init device first */
+ return 0;
+ }
+
+ while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_THRE))
+ ;
+ OUTB(c, &kgdb_uart->Thr_Rbr);
+
+ return 1;
+}
+
+char saa9730_getDebugChar(void)
+{
+ t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
+ char c;
+
+ if (!saa9730_kgdb_active) { /* need to init device first */
+ return 0;
+ }
+ while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_DR))
+ ;
+
+ c = INB(&kgdb_uart->Thr_Rbr);
+ return(c);
+}
diff -puN arch/mips/mips-boards/atlas/atlas_int.c~mips-megapatch arch/mips/mips-boards/atlas/atlas_int.c
--- 25/arch/mips/mips-boards/atlas/atlas_int.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/atlas/atlas_int.c 2004-02-19 12:53:00.000000000 -0800
@@ -32,13 +32,13 @@
#include <linux/kernel_stat.h>
#include <asm/irq.h>
+#include <asm/io.h>
#include <asm/mips-boards/atlas.h>
#include <asm/mips-boards/atlasint.h>
#include <asm/gdb-stub.h>
-struct atlas_ictrl_regs *atlas_hw0_icregs
- = (struct atlas_ictrl_regs *)ATLAS_ICTRL_REGS_BASE;
+static struct atlas_ictrl_regs *atlas_hw0_icregs;
extern asmlinkage void mipsIRQ(void);
@@ -50,12 +50,14 @@ extern asmlinkage void mipsIRQ(void);
void disable_atlas_irq(unsigned int irq_nr)
{
- atlas_hw0_icregs->intrsten = (1 << irq_nr);
+ atlas_hw0_icregs->intrsten = (1 << (irq_nr-ATLASINT_BASE));
+ iob();
}
void enable_atlas_irq(unsigned int irq_nr)
{
- atlas_hw0_icregs->intseten = (1 << irq_nr);
+ atlas_hw0_icregs->intseten = (1 << (irq_nr-ATLASINT_BASE));
+ iob();
}
static unsigned int startup_atlas_irq(unsigned int irq)
@@ -109,7 +111,7 @@ void atlas_hw0_irqdispatch(struct pt_reg
if (unlikely(int_status == 0))
return;
- irq = ls1bit32(int_status);
+ irq = ATLASINT_BASE + ls1bit32(int_status);
DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
@@ -125,6 +127,8 @@ void __init init_IRQ(void)
{
int i;
+ atlas_hw0_icregs = (struct atlas_ictrl_regs *)ioremap (ATLAS_ICTRL_REGS_BASE, sizeof(struct atlas_ictrl_regs *));
+
/*
* Mask out all interrupt by writing "1" to all bit position in
* the interrupt reset reg.
@@ -134,7 +138,7 @@ void __init init_IRQ(void)
/* Now safe to set the exception vector. */
set_except_vector(0, mipsIRQ);
- for (i = 0; i <= ATLASINT_END; i++) {
+ for (i = ATLASINT_BASE; i <= ATLASINT_END; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
diff -puN -L arch/mips/mips-boards/atlas/atlas_rtc.c arch/mips/mips-boards/atlas/atlas_rtc.c~mips-megapatch /dev/null
--- 25/arch/mips/mips-boards/atlas/atlas_rtc.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,57 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * RTC routines for Atlas style attached Dallas chip.
- *
- */
-#include <linux/mc146818rtc.h>
-#include <asm/mips-boards/atlas.h>
-
-
-static unsigned char atlas_rtc_read_data(unsigned long addr)
-{
- volatile unsigned int *rtc_adr_reg = (void *)ATLAS_RTC_ADR_REG;
- volatile unsigned int *rtc_dat_reg = (void *)ATLAS_RTC_DAT_REG;
-
- *rtc_adr_reg = addr;
-
- return *rtc_dat_reg;
-}
-
-static void atlas_rtc_write_data(unsigned char data, unsigned long addr)
-{
- volatile unsigned int *rtc_adr_reg = (void *)ATLAS_RTC_ADR_REG;
- volatile unsigned int *rtc_dat_reg = (void *)ATLAS_RTC_DAT_REG;
-
- *rtc_adr_reg = addr;
- *rtc_dat_reg = data;
-}
-
-static int atlas_rtc_bcd_mode(void)
-{
- return 0;
-}
-
-struct rtc_ops atlas_rtc_ops = {
- &atlas_rtc_read_data,
- &atlas_rtc_write_data,
- &atlas_rtc_bcd_mode
-};
diff -puN arch/mips/mips-boards/atlas/atlas_setup.c~mips-megapatch arch/mips/mips-boards/atlas/atlas_setup.c
--- 25/arch/mips/mips-boards/atlas/atlas_setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/atlas/atlas_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -14,117 +14,82 @@
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Atlas specific setup.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
-#include <linux/mc146818rtc.h>
#include <linux/ioport.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/prom.h>
+#include <asm/mips-boards/atlas.h>
#include <asm/mips-boards/atlasint.h>
-#include <asm/gt64120.h>
#include <asm/time.h>
#include <asm/traps.h>
-#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
-extern void console_setup(char *, int *);
-char serial_console[20];
-#endif
+extern void mips_reboot_setup(void);
+extern void mips_time_init(void);
+extern void mips_timer_setup(struct irqaction *irq);
+extern unsigned long mips_rtc_get_time(void);
#ifdef CONFIG_KGDB
-extern void rs_kgdb_hook(int);
-extern void saa9730_kgdb_hook(void);
-extern void breakpoint(void);
-int remote_debug = 0;
+extern void kgdb_config(void);
#endif
-extern struct rtc_ops atlas_rtc_ops;
-
-extern void mips_reboot_setup(void);
+static void __init serial_init(void);
const char *get_system_type(void)
{
return "MIPS Atlas";
}
-extern void mips_time_init(void);
-extern void mips_timer_setup(struct irqaction *irq);
-extern unsigned long mips_rtc_get_time(void);
-
-void __init atlas_setup(void)
+static int __init atlas_setup(void)
{
-#ifdef CONFIG_KGDB
- int rs_putDebugChar(char);
- char rs_getDebugChar(void);
- int saa9730_putDebugChar(char);
- char saa9730_getDebugChar(void);
- extern int (*generic_putDebugChar)(char);
- extern char (*generic_getDebugChar)(void);
-#endif
- char *argptr;
-
ioport_resource.end = 0x7fffffff;
-#ifdef CONFIG_SERIAL_CONSOLE
- argptr = prom_getcmdline();
- if ((argptr = strstr(argptr, "console=ttyS0")) == NULL) {
- int i = 0;
- char *s = prom_getenv("modetty0");
- while(s[i] >= '0' && s[i] <= '9')
- i++;
- strcpy(serial_console, "ttyS0,");
- strncpy(serial_console + 6, s, i);
- prom_printf("Config serial console: %s\n", serial_console);
- console_setup(serial_console, NULL);
- }
-#endif
+ serial_init ();
#ifdef CONFIG_KGDB
- argptr = prom_getcmdline();
- if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
- int line;
- argptr += strlen("kgdb=ttyS");
- if (*argptr != '0' && *argptr != '1')
- printk("KGDB: Uknown serial line /dev/ttyS%c, "
- "falling back to /dev/ttyS1\n", *argptr);
- line = *argptr == '0' ? 0 : 1;
- printk("KGDB: Using serial line /dev/ttyS%d for session\n",
- line ? 1 : 0);
-
- if(line == 0) {
- rs_kgdb_hook(line);
- generic_putDebugChar = rs_putDebugChar;
- generic_getDebugChar = rs_getDebugChar;
- } else {
- saa9730_kgdb_hook();
- generic_putDebugChar = saa9730_putDebugChar;
- generic_getDebugChar = saa9730_getDebugChar;
- }
-
- prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
- "please connect your debugger\n", line ? 1 : 0);
-
- remote_debug = 1;
- /* Breakpoints and stuff are in atlas_irq_setup() */
- }
+ kgdb_config();
#endif
- argptr = prom_getcmdline();
-
- if ((argptr = strstr(argptr, "nofpu")) != NULL)
- cpu_data[0].options &= ~MIPS_CPU_FPU;
+ mips_reboot_setup();
- rtc_ops = &atlas_rtc_ops;
board_time_init = mips_time_init;
board_timer_setup = mips_timer_setup;
rtc_get_time = mips_rtc_get_time;
- mips_reboot_setup();
+ return 0;
+}
+
+early_initcall(atlas_setup);
+
+static void __init serial_init(void)
+{
+#ifdef CONFIG_SERIAL_8250
+ struct uart_port s;
+
+ memset(&s, 0, sizeof(s));
+
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+ s.iobase = ATLAS_UART_REGS_BASE;
+#else
+ s.iobase = ATLAS_UART_REGS_BASE+3;
+#endif
+ s.irq = ATLASINT_UART;
+ s.uartclk = ATLAS_BASE_BAUD * 16;
+ s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | UPF_RESOURCES | ASYNC_AUTO_IRQ;
+ s.iotype = SERIAL_IO_PORT;
+ s.regshift = 3;
+
+ if (early_serial_setup(&s) != 0) {
+ printk(KERN_ERR "Serial setup failed!\n");
+ }
+#endif
}
diff -puN arch/mips/mips-boards/atlas/Makefile~mips-megapatch arch/mips/mips-boards/atlas/Makefile
--- 25/arch/mips/mips-boards/atlas/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/atlas/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,8 +2,6 @@
# Carsten Langgaard, carstenl@mips.com
# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
#
-# ########################################################################
-#
# This program is free software; you can distribute it and/or modify it
# under the terms of the GNU General Public License (Version 2) as
# published by the Free Software Foundation.
@@ -17,10 +15,6 @@
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
#
-# #######################################################################
-#
-# Makefile for the MIPS Atlas specific kernel interface routines
-# under Linux.
-#
-obj-y := atlas_int.o atlas_rtc.o atlas_setup.o
+obj-y := atlas_int.o atlas_setup.o
+obj-$(CONFIG_KGDB) += atlas_gdb.o
diff -puN arch/mips/mips-boards/generic/cmdline.c~mips-megapatch arch/mips/mips-boards/generic/cmdline.c
--- 25/arch/mips/mips-boards/generic/cmdline.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/generic/cmdline.c 2004-02-19 12:53:00.000000000 -0800
@@ -29,9 +29,7 @@ extern int *_prom_argv;
* YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
* This macro take care of sign extension.
*/
-#define prom_argv(index) ((char *)(((int *)(int)_prom_argv)[(index)]))
-
-char arcs_cmdline[CL_SIZE];
+#define prom_argv(index) ((char *)(long)_prom_argv[(index)])
char * __init prom_getcmdline(void)
{
diff -puN arch/mips/mips-boards/generic/display.c~mips-megapatch arch/mips/mips-boards/generic/display.c
--- 25/arch/mips/mips-boards/generic/display.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/generic/display.c 2004-02-19 12:53:00.000000000 -0800
@@ -2,8 +2,6 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
- * ########################################################################
- *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -17,20 +15,21 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
- * ########################################################################
- *
* Display routines for display messages in MIPS boards ascii display.
- *
*/
+#include <linux/compiler.h>
+#include <asm/io.h>
#include <asm/mips-boards/generic.h>
-
void mips_display_message(const char *str)
{
- volatile unsigned int *display = (void *)ASCII_DISPLAY_POS_BASE;
+ static volatile unsigned int *display = NULL;
int i;
+ if (unlikely(display == NULL))
+ display = (volatile unsigned int *)ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int));
+
for (i = 0; i <= 14; i=i+2) {
if (*str)
display[i] = *str++;
@@ -38,12 +37,3 @@ void mips_display_message(const char *st
display[i] = ' ';
}
}
-
-#ifndef CONFIG_MIPS_SEAD
-void mips_display_word(unsigned int num)
-{
- volatile unsigned int *display = (void *)ASCII_DISPLAY_WORD_BASE;
-
- *display = num;
-}
-#endif
diff -puN arch/mips/mips-boards/generic/gdb_hook.c~mips-megapatch arch/mips/mips-boards/generic/gdb_hook.c
--- 25/arch/mips/mips-boards/generic/gdb_hook.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/generic/gdb_hook.c 2004-02-19 12:53:00.000000000 -0800
@@ -17,7 +17,9 @@
*
* This is the interface to the remote debugger stub.
*/
+#include <linux/types.h>
#include <linux/config.h>
+#include <linux/serial.h>
#include <linux/serialP.h>
#include <linux/serial_reg.h>
@@ -44,7 +46,7 @@ static __inline__ void serial_out(struct
outb(value, info->port+offset);
}
-void rs_kgdb_hook(int tty_no) {
+int rs_kgdb_hook(int tty_no, int speed) {
int t;
struct serial_state *ser = &rs_table[tty_no];
@@ -79,17 +81,19 @@ void rs_kgdb_hook(int tty_no) {
/*
* and set the speed of the serial port
- * (currently hardwired to 9600 8N1
*/
+ if (speed == 0)
+ speed = 9600;
- /* baud rate is fixed to 9600 (is this sufficient?)*/
- t = kdb_port_info.state->baud_base / 9600;
+ t = kdb_port_info.state->baud_base / speed;
/* set DLAB */
serial_out(&kdb_port_info, UART_LCR, UART_LCR_WLEN8 | UART_LCR_DLAB);
serial_out(&kdb_port_info, UART_DLL, t & 0xff);/* LS of divisor */
serial_out(&kdb_port_info, UART_DLM, t >> 8); /* MS of divisor */
/* reset DLAB */
serial_out(&kdb_port_info, UART_LCR, UART_LCR_WLEN8);
+
+ return speed;
}
int putDebugChar(char c)
@@ -126,84 +130,5 @@ char rs_getDebugChar(void)
while (!(serial_in(&kdb_port_info, UART_LSR) & 1))
;
- return(serial_in(&kdb_port_info, UART_RX));
-}
-
-
-#ifdef CONFIG_MIPS_ATLAS
-
-#include <asm/mips-boards/atlas.h>
-#include <asm/mips-boards/saa9730_uart.h>
-
-#define INB(a) inb((unsigned long)a)
-#define OUTB(x,a) outb(x,(unsigned long)a)
-
-/*
- * This is the interface to the remote debugger stub
- * if the Philips part is used for the debug port,
- * called from the platform setup code.
- *
- * PCI init will not have been done yet, we make a
- * universal assumption about the way the bootloader (YAMON)
- * have located and set up the chip.
- */
-static t_uart_saa9730_regmap *kgdb_uart = (void *)(ATLAS_SAA9730_REG + SAA9730_UART_REGS_ADDR);
-
-static int saa9730_kgdb_active = 0;
-
-void saa9730_kgdb_hook(void)
-{
- volatile unsigned char t;
-
- /*
- * Clear all interrupts
- */
- t = INB(&kgdb_uart->Lsr);
- t += INB(&kgdb_uart->Msr);
- t += INB(&kgdb_uart->Thr_Rbr);
- t += INB(&kgdb_uart->Iir_Fcr);
-
- /*
- * Now, initialize the UART
- */
- /* 8 data bits, one stop bit, no parity */
- OUTB(SAA9730_LCR_DATA8, &kgdb_uart->Lcr);
-
- /* baud rate is fixed to 9600 (is this sufficient?)*/
- OUTB(0, &kgdb_uart->BaudDivMsb); /* HACK - Assumes standard crystal */
- OUTB(23, &kgdb_uart->BaudDivLsb); /* HACK - known for MIPS Atlas */
-
- /* Set RTS/DTR active */
- OUTB(SAA9730_MCR_DTR | SAA9730_MCR_RTS, &kgdb_uart->Mcr);
- saa9730_kgdb_active = 1;
-}
-
-int saa9730_putDebugChar(char c)
-{
-
- if (!saa9730_kgdb_active) { /* need to init device first */
- return 0;
- }
-
- while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_THRE))
- ;
- OUTB(c, &kgdb_uart->Thr_Rbr);
-
- return 1;
+ return serial_in(&kdb_port_info, UART_RX);
}
-
-char saa9730_getDebugChar(void)
-{
- char c;
-
- if (!saa9730_kgdb_active) { /* need to init device first */
- return 0;
- }
- while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_DR))
- ;
-
- c = INB(&kgdb_uart->Thr_Rbr);
- return(c);
-}
-
-#endif
diff -puN arch/mips/mips-boards/generic/init.c~mips-megapatch arch/mips/mips-boards/generic/init.c
--- 25/arch/mips/mips-boards/generic/init.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/generic/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -23,19 +23,28 @@
#include <linux/kernel.h>
#include <asm/io.h>
+#include <asm/bootinfo.h>
#include <asm/mips-boards/prom.h>
#include <asm/mips-boards/generic.h>
+#ifdef CONFIG_MIPS_GT64120
#include <asm/gt64120.h>
-#include <asm/mips-boards/malta.h>
+#endif
#include <asm/mips-boards/msc01_pci.h>
#include <asm/mips-boards/bonito64.h>
+#ifdef CONFIG_MIPS_MALTA
+#include <asm/mips-boards/malta.h>
+#endif
-/* Environment variable */
-typedef struct
-{
- char *name;
- char *val;
-} t_env_var;
+#ifdef CONFIG_KGDB
+extern int rs_kgdb_hook(int, int);
+extern int rs_putDebugChar(char);
+extern char rs_getDebugChar(void);
+extern int saa9730_kgdb_hook(int);
+extern int saa9730_putDebugChar(char);
+extern char saa9730_getDebugChar(void);
+
+int remote_debug = 0;
+#endif
int prom_argc;
int *_prom_argv, *_prom_envp;
@@ -44,12 +53,22 @@ int *_prom_argv, *_prom_envp;
* YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
* This macro take care of sign extension, if running in 64-bit mode.
*/
-#define prom_envp(index) ((char *)(((int *)(int)_prom_envp)[(index)]))
+#define prom_envp(index) ((char *)(long)_prom_envp[(index)])
int init_debug = 0;
unsigned int mips_revision_corid;
+/* Bonito64 system controller register base. */
+unsigned long _pcictrl_bonito;
+unsigned long _pcictrl_bonito_pcicfg;
+
+/* GT64120 system controller register base */
+unsigned long _pcictrl_gt64120;
+
+/* MIPS System controller register base */
+unsigned long _pcictrl_msc;
+
char *prom_getenv(char *envname)
{
/*
@@ -62,21 +81,21 @@ char *prom_getenv(char *envname)
i = strlen(envname);
- while(prom_envp(index)) {
+ while (prom_envp(index)) {
if(strncmp(envname, prom_envp(index), i) == 0) {
return(prom_envp(index+1));
}
index += 2;
}
- return(NULL);
+ return NULL;
}
static inline unsigned char str2hexnum(unsigned char c)
{
- if(c >= '0' && c <= '9')
+ if (c >= '0' && c <= '9')
return c - '0';
- if(c >= 'a' && c <= 'f')
+ if (c >= 'a' && c <= 'f')
return c - 'a' + 10;
return 0; /* foo */
}
@@ -85,7 +104,7 @@ static inline void str2eaddr(unsigned ch
{
int i;
- for(i = 0; i < 6; i++) {
+ for (i = 0; i < 6; i++) {
unsigned char num;
if((*str == '.') || (*str == ':'))
@@ -118,42 +137,150 @@ int get_ethernet_addr(char *ethernet_add
return 0;
}
-int __init prom_init(int argc, char **argv, char **envp)
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+static void __init console_config(void)
+{
+ char console_string[40];
+ int baud = 0;
+ char parity = '\0', bits = '\0', flow = '\0';
+ char *s;
+
+ if ((strstr(prom_getcmdline(), "console=ttyS")) == NULL) {
+ s = prom_getenv("modetty0");
+ if (s) {
+ while (*s >= '0' && *s <= '9')
+ baud = baud*10 + *s++ - '0';
+ if (*s == ',') s++;
+ if (*s) parity = *s++;
+ if (*s == ',') s++;
+ if (*s) bits = *s++;
+ if (*s == ',') s++;
+ if (*s == 'h') flow = 'r';
+ }
+ if (baud == 0)
+ baud = 38400;
+ if (parity != 'n' && parity != 'o' && parity != 'e')
+ parity = 'n';
+ if (bits != '7' && bits != '8')
+ bits = '8';
+ if (flow == '\0')
+ flow = 'r';
+ sprintf (console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
+ strcat (prom_getcmdline(), console_string);
+ prom_printf("Config serial console:%s\n", console_string);
+ }
+}
+#endif
+
+#ifdef CONFIG_KGDB
+void __init kgdb_config (void)
+{
+ extern int (*generic_putDebugChar)(char);
+ extern char (*generic_getDebugChar)(void);
+ char *argptr;
+ int line, speed;
+
+ argptr = prom_getcmdline();
+ if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
+ argptr += strlen("kgdb=ttyS");
+ if (*argptr != '0' && *argptr != '1')
+ printk("KGDB: Unknown serial line /dev/ttyS%c, "
+ "falling back to /dev/ttyS1\n", *argptr);
+ line = *argptr == '0' ? 0 : 1;
+ printk("KGDB: Using serial line /dev/ttyS%d for session\n", line);
+
+ speed = 0;
+ if (*++argptr == ',')
+ {
+ int c;
+ while ((c = *++argptr) && ('0' <= c && c <= '9'))
+ speed = speed * 10 + c - '0';
+ }
+#ifdef CONFIG_MIPS_ATLAS
+ if (line == 1) {
+ speed = saa9730_kgdb_hook(speed);
+ generic_putDebugChar = saa9730_putDebugChar;
+ generic_getDebugChar = saa9730_getDebugChar;
+ }
+ else
+#endif
+ {
+ speed = rs_kgdb_hook(line, speed);
+ generic_putDebugChar = rs_putDebugChar;
+ generic_getDebugChar = rs_getDebugChar;
+ }
+
+ prom_printf("KGDB: Using serial line /dev/ttyS%d at %d for session, "
+ "please connect your debugger\n", line ? 1 : 0, speed);
+
+ {
+ char *s;
+ for (s = "Please connect GDB to this port\r\n"; *s; )
+ generic_putDebugChar (*s++);
+ }
+
+ remote_debug = 1;
+ /* Breakpoint is invoked after interrupts are initialised */
+ }
+}
+#endif
+
+void __init prom_init(void)
{
- prom_argc = argc;
- _prom_argv = (int *)argv;
- _prom_envp = (int *)envp;
+ prom_argc = fw_arg0;
+ _prom_argv = (int *) fw_arg1;
+ _prom_envp = (int *) fw_arg2;
mips_display_message("LINUX");
#ifdef CONFIG_MIPS_SEAD
set_io_port_base(KSEG1);
#else
+ /*
+ * early setup of _pcictrl_bonito so that we can determine
+ * the system controller on a CORE_EMUL board
+ */
+ _pcictrl_bonito = (unsigned long)ioremap(BONITO_REG_BASE, BONITO_REG_SIZE);
+
mips_revision_corid = MIPS_REVISION_CORID;
+
+ if (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL) {
+ if (BONITO_PCIDID == 0x0001df53 ||
+ BONITO_PCIDID == 0x0003df53)
+ mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_BON;
+ else
+ mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_MSC;
+ }
switch(mips_revision_corid) {
case MIPS_REVISION_CORID_QED_RM5261:
case MIPS_REVISION_CORID_CORE_LV:
case MIPS_REVISION_CORID_CORE_FPGA:
+ case MIPS_REVISION_CORID_CORE_FPGAR2:
/*
* Setup the North bridge to do Master byte-lane swapping
* when running in bigendian.
*/
-#if defined(__MIPSEL__)
+ _pcictrl_gt64120 = (unsigned long)ioremap(MIPS_GT_BASE, 0x2000);
+
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
GT_PCI0_CMD_SBYTESWAP_BIT);
#else
GT_WRITE(GT_PCI0_CMD_OFS, 0);
#endif
-#if defined(CONFIG_MIPS_MALTA)
+#ifdef CONFIG_MIPS_MALTA
set_io_port_base(MALTA_GT_PORT_BASE);
#else
- set_io_port_base(KSEG1);
+ set_io_port_base((unsigned long)ioremap(0, 0x20000000));
#endif
-
break;
+
+ case MIPS_REVISION_CORID_CORE_EMUL_BON:
case MIPS_REVISION_CORID_BONITO64:
case MIPS_REVISION_CORID_CORE_20K:
+ _pcictrl_bonito_pcicfg = (unsigned long)ioremap(BONITO_PCICFG_BASE, BONITO_PCICFG_SIZE);
+
/*
* Disable Bonito IOBC.
*/
@@ -165,7 +292,7 @@ int __init prom_init(int argc, char **ar
* Setup the North bridge to do Master byte-lane swapping
* when running in bigendian.
*/
-#if defined(__MIPSEL__)
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
BONITO_BONGENCFG = BONITO_BONGENCFG &
~(BONITO_BONGENCFG_MSTRBYTESWAP |
BONITO_BONGENCFG_BYTESWAP);
@@ -175,16 +302,19 @@ int __init prom_init(int argc, char **ar
BONITO_BONGENCFG_BYTESWAP;
#endif
-#if defined(CONFIG_MIPS_MALTA)
- set_io_port_base(MALTA_BONITO_PORT_BASE);
+#ifdef CONFIG_MIPS_MALTA
+ set_io_port_base(MALTA_BONITO_PORT_BASE);
#else
- set_io_port_base(KSEG1);
+ set_io_port_base((unsigned long)ioremap(0, 0x20000000));
#endif
break;
case MIPS_REVISION_CORID_CORE_MSC:
- set_io_port_base(MALTA_MSC_PORT_BASE);
-#if defined(__MIPSEL__)
+ case MIPS_REVISION_CORID_CORE_FPGA2:
+ case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+ _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
+
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP);
#else
MSC_WRITE(MSC01_PCI_SWAP,
@@ -192,7 +322,14 @@ int __init prom_init(int argc, char **ar
MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
#endif
+
+#ifdef CONFIG_MIPS_MALTA
+ set_io_port_base(MALTA_MSC_PORT_BASE);
+#else
+ set_io_port_base((unsigned long)ioremap(0, 0x20000000));
+#endif
break;
+
default:
/* Unknown Core card */
mips_display_message("CC Error");
@@ -202,6 +339,7 @@ int __init prom_init(int argc, char **ar
prom_printf("\nLINUX started...\n");
prom_init_cmdline();
prom_meminit();
-
- return 0;
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+ console_config();
+#endif
}
diff -puN arch/mips/mips-boards/generic/Makefile~mips-megapatch arch/mips/mips-boards/generic/Makefile
--- 25/arch/mips/mips-boards/generic/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/generic/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -19,9 +19,8 @@
#
obj-y := mipsIRQ.o reset.o display.o init.o memory.o \
- printf.o cmdline.o
-obj-$(CONFIG_MIPS_ATLAS) += time.o
-obj-$(CONFIG_MIPS_MALTA) += time.o
+ printf.o cmdline.o time.o
+obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_KGDB) += gdb_hook.o
EXTRA_AFLAGS := $(CFLAGS)
diff -puN arch/mips/mips-boards/generic/memory.c~mips-megapatch arch/mips/mips-boards/generic/memory.c
--- 25/arch/mips/mips-boards/generic/memory.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/generic/memory.c 2004-02-19 12:53:00.000000000 -0800
@@ -96,10 +96,10 @@ struct prom_pmemblock * __init prom_getm
mdesc[3].type = yamon_dontuse;
mdesc[3].base = 0x00100000;
- mdesc[3].size = PHYSADDR(PFN_ALIGN(&_end)) - mdesc[3].base;
+ mdesc[3].size = CPHYSADDR(PFN_ALIGN(&_end)) - mdesc[3].base;
mdesc[4].type = yamon_free;
- mdesc[4].base = PHYSADDR(PFN_ALIGN(&_end));
+ mdesc[4].base = CPHYSADDR(PFN_ALIGN(&_end));
mdesc[4].size = memsize - mdesc[4].base;
return &mdesc[0];
@@ -147,12 +147,11 @@ void __init prom_meminit(void)
}
}
-void __init
-prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
- int i;
unsigned long freed = 0;
unsigned long addr;
+ int i;
for (i = 0; i < boot_mem_map.nr_map; i++) {
if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
@@ -169,4 +168,6 @@ prom_free_prom_memory (void)
}
}
printk("Freeing prom memory: %ldkb freed\n", freed >> 10);
+
+ return freed;
}
diff -puN /dev/null arch/mips/mips-boards/generic/pci.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/mips-boards/generic/pci.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,162 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * MIPS boards specific PCI support.
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/mips-boards/generic.h>
+#include <asm/pci_channel.h>
+#include <asm/gt64120.h>
+#include <asm/mips-boards/bonito64.h>
+#include <asm/mips-boards/msc01_pci.h>
+#ifdef CONFIG_MIPS_MALTA
+#include <asm/mips-boards/malta.h>
+#endif
+
+static struct resource bonito64_mem_resource = {
+ .name = "Bonito PCI MEM",
+ .start = 0x10000000UL,
+ .end = 0x1bffffffUL,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct resource bonito64_io_resource = {
+ .name = "Bonito IO MEM",
+ .start = 0x00002000UL, /* avoid conflicts with YAMON allocated I/O addresses */
+ .end = 0x000fffffUL,
+ .flags = IORESOURCE_IO,
+};
+
+static struct resource gt64120_mem_resource = {
+ .name = "GT64120 PCI MEM",
+ .start = 0x10000000UL,
+ .end = 0x1bdfffffUL,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct resource gt64120_io_resource = {
+ .name = "GT64120 IO MEM",
+#ifdef CONFIG_MIPS_ATLAS
+ .start = 0x18000000UL,
+ .end = 0x181fffffUL,
+#endif
+#ifdef CONFIG_MIPS_MALTA
+ .start = 0x00002000UL,
+ .end = 0x001fffffUL,
+#endif
+ .flags = IORESOURCE_IO,
+};
+
+static struct resource msc_mem_resource = {
+ .name = "MSC PCI MEM",
+ .start = 0x10000000UL,
+ .end = 0x1fffffffUL,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct resource msc_io_resource = {
+ .name = "MSC IO MEM",
+ .start = 0x00002000UL,
+ .end = 0x007fffffUL,
+ .flags = IORESOURCE_IO,
+};
+
+extern struct pci_ops bonito64_pci_ops;
+extern struct pci_ops gt64120_pci_ops;
+extern struct pci_ops msc_pci_ops;
+
+static struct pci_controller bonito64_controller = {
+ .pci_ops = &bonito64_pci_ops,
+ .io_resource = &bonito64_io_resource,
+ .mem_resource = &bonito64_mem_resource,
+ .mem_offset = 0x10000000UL,
+ .io_offset = 0x00000000UL,
+};
+
+static struct pci_controller gt64120_controller = {
+ .pci_ops = >64120_pci_ops,
+ .io_resource = >64120_io_resource,
+ .mem_resource = >64120_mem_resource,
+ .mem_offset = 0x00000000UL,
+ .io_offset = 0x00000000UL,
+};
+
+static struct pci_controller msc_controller = {
+ .pci_ops = &msc_pci_ops,
+ .io_resource = &msc_io_resource,
+ .mem_resource = &msc_mem_resource,
+ .mem_offset = 0x10000000UL,
+ .io_offset = 0x00000000UL,
+};
+
+static int __init pcibios_init(void)
+{
+ struct pci_controller *controller;
+
+ switch (mips_revision_corid) {
+ case MIPS_REVISION_CORID_QED_RM5261:
+ case MIPS_REVISION_CORID_CORE_LV:
+ case MIPS_REVISION_CORID_CORE_FPGA:
+ case MIPS_REVISION_CORID_CORE_FPGAR2:
+ /*
+ * Due to a bug in the Galileo system controller, we need
+ * to setup the PCI BAR for the Galileo internal registers.
+ * This should be done in the bios/bootprom and will be
+ * fixed in a later revision of YAMON (the MIPS boards
+ * boot prom).
+ */
+ GT_WRITE(GT_PCI0_CFGADDR_OFS,
+ (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) | /* Local bus */
+ (0 << GT_PCI0_CFGADDR_DEVNUM_SHF) | /* GT64120 dev */
+ (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) | /* Function 0*/
+ ((0x20/4) << GT_PCI0_CFGADDR_REGNUM_SHF) | /* BAR 4*/
+ GT_PCI0_CFGADDR_CONFIGEN_BIT );
+
+ /* Perform the write */
+ GT_WRITE(GT_PCI0_CFGDATA_OFS, CPHYSADDR(MIPS_GT_BASE));
+
+ controller = >64120_controller;
+ break;
+
+ case MIPS_REVISION_CORID_BONITO64:
+ case MIPS_REVISION_CORID_CORE_20K:
+ case MIPS_REVISION_CORID_CORE_EMUL_BON:
+ controller = &bonito64_controller;
+ break;
+
+ case MIPS_REVISION_CORID_CORE_MSC:
+ case MIPS_REVISION_CORID_CORE_FPGA2:
+ case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+ controller = &msc_controller;
+ break;
+ default:
+ return 1;
+ }
+
+ ioport_resource.end = controller->io_resource->end;
+
+ register_pci_controller (controller);
+
+ return 0;
+}
+
+early_initcall(pcibios_init);
diff -puN arch/mips/mips-boards/generic/printf.c~mips-megapatch arch/mips/mips-boards/generic/printf.c
--- 25/arch/mips/mips-boards/generic/printf.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/generic/printf.c 2004-02-19 12:53:00.000000000 -0800
@@ -25,53 +25,39 @@
#include <asm/io.h>
#ifdef CONFIG_MIPS_ATLAS
-
#include <asm/mips-boards/atlas.h>
-/*
- * Atlas registers are memory mapped on 64-bit aligned boundaries and
- * only word access are allowed.
- * When reading the UART 8 bit registers only the LSB are valid.
- */
-static inline unsigned int serial_in(int offset)
-{
- return (*(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) & 0xff);
-}
-
-static inline void serial_out(int offset, int value)
-{
- *(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) = value;
-}
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+#define PORT(offset) (ATLAS_UART_REGS_BASE + ((offset)<<3))
+#else
+#define PORT(offset) (ATLAS_UART_REGS_BASE + 3 + ((offset)<<3))
+#endif
#elif defined(CONFIG_MIPS_SEAD)
#include <asm/mips-boards/sead.h>
-/*
- * SEAD registers are just like Atlas registers.
- */
-static inline unsigned int serial_in(int offset)
-{
- return (*(volatile unsigned int *)(mips_io_port_base + SEAD_UART0_REGS_BASE + offset*8) & 0xff);
-}
-
-static inline void serial_out(int offset, int value)
-{
- *(volatile unsigned int *)(mips_io_port_base + SEAD_UART0_REGS_BASE + offset*8) = value;
-}
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+#define PORT(offset) (SEAD_UART0_REGS_BASE + ((offset)<<3))
+#else
+#define PORT(offset) (SEAD_UART0_REGS_BASE + 3 + ((offset)<<3))
+#endif
#else
+#define PORT(offset) (0x3f8 + (offset))
+
+#endif
+
static inline unsigned int serial_in(int offset)
{
- return inb(0x3f8 + offset);
+ return inb(PORT(offset));
}
static inline void serial_out(int offset, int value)
{
- outb(value, 0x3f8 + offset);
+ outb(value, PORT(offset));
}
-#endif
int putPromChar(char c)
{
@@ -85,7 +71,7 @@ int putPromChar(char c)
char getPromChar(void)
{
- while (!(serial_in(UART_LSR) & 1))
+ while (!(serial_in(UART_LSR) & UART_LSR_DR))
;
return serial_in(UART_RX);
@@ -102,9 +88,8 @@ void __init prom_printf(char *fmt, ...)
char *p, *buf_end;
long flags;
- int putPromChar(char);
-
spin_lock_irqsave(con_lock, flags);
+
va_start(args, fmt);
l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */
va_end(args);
@@ -117,5 +102,8 @@ void __init prom_printf(char *fmt, ...)
putPromChar('\r');
putPromChar(*p);
}
+ /* wait for output to drain */
+ while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0)
+ ;
spin_unlock_irqrestore(con_lock, flags);
}
diff -puN arch/mips/mips-boards/generic/reset.c~mips-megapatch arch/mips/mips-boards/generic/reset.c
--- 25/arch/mips/mips-boards/generic/reset.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/generic/reset.c 2004-02-19 12:53:00.000000000 -0800
@@ -24,6 +24,7 @@
*/
#include <linux/config.h>
+#include <asm/io.h>
#include <asm/reboot.h>
#include <asm/mips-boards/generic.h>
#if defined(CONFIG_MIPS_ATLAS)
@@ -38,14 +39,14 @@ static void atlas_machine_power_off(void
static void mips_machine_restart(char *command)
{
- volatile unsigned int *softres_reg = (void *)SOFTRES_REG;
+ volatile unsigned int *softres_reg = (unsigned int *)ioremap (SOFTRES_REG, sizeof(unsigned int));
*softres_reg = GORESET;
}
static void mips_machine_halt(void)
{
- volatile unsigned int *softres_reg = (void *)SOFTRES_REG;
+ volatile unsigned int *softres_reg = (unsigned int *)ioremap (SOFTRES_REG, sizeof(unsigned int));
*softres_reg = GORESET;
}
@@ -53,7 +54,7 @@ static void mips_machine_halt(void)
#if defined(CONFIG_MIPS_ATLAS)
static void atlas_machine_power_off(void)
{
- volatile unsigned int *psustby_reg = (void *)ATLAS_PSUSTBY_REG;
+ volatile unsigned int *psustby_reg = (unsigned int *)ioremap(ATLAS_PSUSTBY_REG, sizeof(unsigned int));
*psustby_reg = ATLAS_GOSTBY;
}
@@ -66,7 +67,7 @@ void mips_reboot_setup(void)
#if defined(CONFIG_MIPS_ATLAS)
_machine_power_off = atlas_machine_power_off;
#endif
-#if defined(CONFIG_MIPS_MALTA)
+#if defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MIPS_SEAD)
_machine_power_off = mips_machine_halt;
#endif
}
diff -puN arch/mips/mips-boards/generic/time.c~mips-megapatch arch/mips/mips-boards/generic/time.c
--- 25/arch/mips/mips-boards/generic/time.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/generic/time.c 2004-02-19 12:53:00.000000000 -0800
@@ -2,8 +2,6 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
- * ########################################################################
- *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -17,10 +15,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
- * ########################################################################
- *
* Setting up the clock on the MIPS boards.
- *
*/
#include <linux/types.h>
@@ -40,14 +35,18 @@
#include <asm/div64.h>
#include <asm/cpu.h>
#include <asm/time.h>
+#include <asm/mc146818-time.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/prom.h>
-static unsigned int r4k_offset; /* Amount to increment compare reg each time */
-static unsigned int r4k_cur; /* What counter should be at next timer irq */
+unsigned long cpu_khz;
+#if defined(CONFIG_MIPS_SEAD)
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ5)
+#else
#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+#endif
#if defined(CONFIG_MIPS_ATLAS)
static char display_string[] = " LINUX ON ATLAS ";
@@ -55,19 +54,16 @@ static char display_string[] = "
#if defined(CONFIG_MIPS_MALTA)
static char display_string[] = " LINUX ON MALTA ";
#endif
+#if defined(CONFIG_MIPS_SEAD)
+static char display_string[] = " LINUX ON SEAD ";
+#endif
static unsigned int display_count = 0;
#define MAX_DISPLAY_COUNT (sizeof(display_string) - 8)
-#define MIPS_CPU_TIMER_IRQ 7
+#define MIPS_CPU_TIMER_IRQ (NR_IRQS-1)
static unsigned int timer_tick_count=0;
-
-static inline void ack_r4ktimer(unsigned int newval)
-{
- write_c0_compare(newval);
-}
-
void mips_timer_interrupt(struct pt_regs *regs)
{
if ((timer_tick_count++ % HZ) == 0) {
@@ -81,12 +77,27 @@ void mips_timer_interrupt(struct pt_regs
}
/*
- * Figure out the r4k offset, the amount to increment the compare
- * register for each time tick.
- * Use the RTC to calculate offset.
+ * Estimate CPU frequency. Sets mips_counter_frequency as a side-effect
*/
-static unsigned int __init cal_r4koff(void)
+static unsigned int __init estimate_cpu_frequency(void)
{
+ unsigned int prid = read_c0_prid() & 0xffff00;
+ unsigned int count;
+
+#ifdef CONFIG_MIPS_SEAD
+ /*
+ * The SEAD board doesn't have a real time clock, so we can't
+ * really calculate the timer frequency
+ * For now we hardwire the SEAD board frequency to 12MHz.
+ */
+
+ if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) ||
+ (prid == (PRID_COMP_MIPS | PRID_IMP_25KF)))
+ count = 12000000;
+ else
+ count = 6000000;
+#endif
+#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA)
unsigned int flags;
local_irq_save(flags);
@@ -102,73 +113,46 @@ static unsigned int __init cal_r4koff(vo
while (CMOS_READ(RTC_REG_A) & RTC_UIP);
while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
- mips_counter_frequency = read_c0_count();
+ count = read_c0_count();
/* restore interrupts */
local_irq_restore(flags);
+#endif
- return (mips_counter_frequency / HZ);
+ mips_hpt_frequency = count;
+ if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
+ (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
+ count *= 2;
+
+ count += 5000; /* round */
+ count -= count%10000;
+
+ return count;
}
unsigned long __init mips_rtc_get_time(void)
{
- unsigned int year, mon, day, hour, min, sec;
- unsigned char save_control;
-
- save_control = CMOS_READ(RTC_CONTROL);
-
- /* Freeze it. */
- CMOS_WRITE(save_control | RTC_SET, RTC_CONTROL);
-
- /* Read regs. */
- sec = CMOS_READ(RTC_SECONDS);
- min = CMOS_READ(RTC_MINUTES);
- hour = CMOS_READ(RTC_HOURS);
-
- if (!(save_control & RTC_24H))
- {
- if ((hour & 0xf) == 0xc)
- hour &= 0x80;
- if (hour & 0x80)
- hour = (hour & 0xf) + 12;
- }
- day = CMOS_READ(RTC_DAY_OF_MONTH);
- mon = CMOS_READ(RTC_MONTH);
- year = CMOS_READ(RTC_YEAR);
-
- /* Unfreeze clock. */
- CMOS_WRITE(save_control, RTC_CONTROL);
-
- if ((year += 1900) < 1970)
- year += 100;
-
- return mktime(year, mon, day, hour, min, sec);
+ return mc146818_get_cmos_time();
}
void __init mips_time_init(void)
{
- unsigned int est_freq, flags;
+ unsigned int est_freq, flags;
local_irq_save(flags);
+#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA)
/* Set Data mode - binary. */
CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
+#endif
- printk("calculating r4koff... ");
- r4k_offset = cal_r4koff();
- printk("%08x(%d)\n", r4k_offset, r4k_offset);
-
- if ((read_c0_prid() & 0xffff00) ==
- (PRID_COMP_MIPS | PRID_IMP_20KC))
- est_freq = r4k_offset*HZ;
- else
- est_freq = 2*r4k_offset*HZ;
+ est_freq = estimate_cpu_frequency ();
- est_freq += 5000; /* round */
- est_freq -= est_freq%10000;
printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
(est_freq%1000000)*100/1000000);
+ cpu_khz = est_freq / 1000;
+
local_irq_restore(flags);
}
@@ -179,7 +163,6 @@ void __init mips_timer_setup(struct irqa
setup_irq(MIPS_CPU_TIMER_IRQ, irq);
/* to generate the first timer interrupt */
- r4k_cur = (read_c0_count() + r4k_offset);
- write_c0_compare(r4k_cur);
+ write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ);
set_c0_status(ALLINTS);
}
diff -puN arch/mips/mips-boards/malta/Makefile~mips-megapatch arch/mips/mips-boards/malta/Makefile
--- 25/arch/mips/mips-boards/malta/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/malta/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,8 +2,6 @@
# Carsten Langgaard, carstenl@mips.com
# Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
#
-# ########################################################################
-#
# This program is free software; you can distribute it and/or modify it
# under the terms of the GNU General Public License (Version 2) as
# published by the Free Software Foundation.
@@ -17,10 +15,8 @@
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
#
-# #######################################################################
-#
# Makefile for the MIPS Malta specific kernel interface routines
# under Linux.
#
-obj-y := malta_int.o malta_rtc.o malta_setup.o
+obj-y := malta_int.o malta_setup.o
diff -puN arch/mips/mips-boards/malta/malta_int.c~mips-megapatch arch/mips/mips-boards/malta/malta_int.c
--- 25/arch/mips/mips-boards/malta/malta_int.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/malta/malta_int.c 2004-02-19 12:53:00.000000000 -0800
@@ -32,15 +32,14 @@
#include <asm/i8259.h>
#include <asm/io.h>
-#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/malta.h>
#include <asm/mips-boards/maltaint.h>
#include <asm/mips-boards/piix4.h>
-#include <asm/mips-boards/msc01_pci.h>
#include <asm/gt64120.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/msc01_pci.h>
extern asmlinkage void mipsIRQ(void);
-extern int mips_pcibios_iack(void);
#ifdef CONFIG_KGDB
extern void breakpoint(void);
@@ -50,6 +49,55 @@ extern int remote_debug;
static spinlock_t mips_irq_lock = SPIN_LOCK_UNLOCKED;
+static inline int mips_pcibios_iack(void)
+{
+ int irq;
+ u32 dummy;
+
+ /*
+ * Determine highest priority pending interrupt by performing
+ * a PCI Interrupt Acknowledge cycle.
+ */
+ switch(mips_revision_corid) {
+ case MIPS_REVISION_CORID_CORE_MSC:
+ case MIPS_REVISION_CORID_CORE_FPGA2:
+ case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+ MSC_READ(MSC01_PCI_IACK, irq);
+ irq &= 0xff;
+ break;
+ case MIPS_REVISION_CORID_QED_RM5261:
+ case MIPS_REVISION_CORID_CORE_LV:
+ case MIPS_REVISION_CORID_CORE_FPGA:
+ case MIPS_REVISION_CORID_CORE_FPGAR2:
+ irq = GT_READ(GT_PCI0_IACK_OFS);
+ irq &= 0xff;
+ break;
+ case MIPS_REVISION_CORID_BONITO64:
+ case MIPS_REVISION_CORID_CORE_20K:
+ case MIPS_REVISION_CORID_CORE_EMUL_BON:
+ /* The following will generate a PCI IACK cycle on the
+ * Bonito controller. It's a little bit kludgy, but it
+ * was the easiest way to implement it in hardware at
+ * the given time.
+ */
+ BONITO_PCIMAP_CFG = 0x20000;
+
+ /* Flush Bonito register block */
+ dummy = BONITO_PCIMAP_CFG;
+ iob(); /* sync */
+
+ irq = *(volatile u32 *)(_pcictrl_bonito_pcicfg);
+ iob(); /* sync */
+ irq &= 0xff;
+ BONITO_PCIMAP_CFG = 0;
+ break;
+ default:
+ printk("Unknown Core card, don't know the system controller.\n");
+ return -1;
+ }
+ return irq;
+}
+
static inline int get_int(int *irq)
{
unsigned long flags;
@@ -104,18 +152,22 @@ void corehi_irqdispatch(struct pt_regs *
, regs->cp0_epc, regs->cp0_status, regs->cp0_cause, regs->cp0_badvaddr);
switch(mips_revision_corid) {
case MIPS_REVISION_CORID_CORE_MSC:
+ case MIPS_REVISION_CORID_CORE_FPGA2:
+ case MIPS_REVISION_CORID_CORE_EMUL_MSC:
break;
case MIPS_REVISION_CORID_QED_RM5261:
case MIPS_REVISION_CORID_CORE_LV:
case MIPS_REVISION_CORID_CORE_FPGA:
- GT_READ(GT_INTRCAUSE_OFS, data);
+ case MIPS_REVISION_CORID_CORE_FPGAR2:
+ data = GT_READ(GT_INTRCAUSE_OFS);
printk("GT_INTRCAUSE = %08x\n", data);
- GT_READ(0x70, data);
- GT_READ(0x78, datahi);
- printk("GT_CPU_ERR_ADDR = %0x2%08x\n", datahi,data);
+ data = GT_READ(0x70);
+ datahi = GT_READ(0x78);
+ printk("GT_CPU_ERR_ADDR = %02x%08x\n", datahi, data);
break;
case MIPS_REVISION_CORID_BONITO64:
case MIPS_REVISION_CORID_CORE_20K:
+ case MIPS_REVISION_CORID_CORE_EMUL_BON:
data = BONITO_INTISR;
printk("BONITO_INTISR = %08x\n", data);
data = BONITO_INTEN;
diff -puN -L arch/mips/mips-boards/malta/malta_rtc.c arch/mips/mips-boards/malta/malta_rtc.c~mips-megapatch /dev/null
--- 25/arch/mips/mips-boards/malta/malta_rtc.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,50 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * RTC routines for Malta style attached PIIX4 device, which contains a
- * Motorola MC146818A-compatible Real Time Clock.
- *
- */
-#include <linux/mc146818rtc.h>
-#include <asm/mips-boards/malta.h>
-
-static unsigned char malta_rtc_read_data(unsigned long addr)
-{
- outb(addr, MALTA_RTC_ADR_REG);
- return inb(MALTA_RTC_DAT_REG);
-}
-
-static void malta_rtc_write_data(unsigned char data, unsigned long addr)
-{
- outb(addr, MALTA_RTC_ADR_REG);
- outb(data, MALTA_RTC_DAT_REG);
-}
-
-static int malta_rtc_bcd_mode(void)
-{
- return 0;
-}
-
-struct rtc_ops malta_rtc_ops = {
- &malta_rtc_read_data,
- &malta_rtc_write_data,
- &malta_rtc_bcd_mode
-};
diff -puN arch/mips/mips-boards/malta/malta_setup.c~mips-megapatch arch/mips/mips-boards/malta/malta_setup.c
--- 25/arch/mips/mips-boards/malta/malta_setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/malta/malta_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -18,12 +18,9 @@
#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
-#include <linux/mc146818rtc.h>
#include <linux/ioport.h>
#include <linux/pci.h>
-#ifdef CONFIG_BLK_DEV_IDE
-#include <linux/ide.h>
-#endif
+#include <linux/tty.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
@@ -32,9 +29,6 @@
#include <asm/mips-boards/prom.h>
#include <asm/mips-boards/malta.h>
#include <asm/mips-boards/maltaint.h>
-#ifdef CONFIG_BLK_DEV_FD
-#include <asm/floppy.h>
-#endif
#include <asm/dma.h>
#include <asm/time.h>
#include <asm/traps.h>
@@ -42,54 +36,56 @@
#include <linux/console.h>
#endif
-#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
-extern void console_setup(char *, int *);
-char serial_console[20];
-#endif
-
-#ifdef CONFIG_KGDB
-extern void rs_kgdb_hook(int);
-int remote_debug = 0;
-#endif
-
-extern struct ide_ops std_ide_ops;
-extern struct fd_ops std_fd_ops;
-extern struct rtc_ops malta_rtc_ops;
-extern struct kbd_ops std_kbd_ops;
-
extern void mips_reboot_setup(void);
-
extern void mips_time_init(void);
extern void mips_timer_setup(struct irqaction *irq);
extern unsigned long mips_rtc_get_time(void);
+#ifdef CONFIG_KGDB
+extern void kgdb_config(void);
+#endif
+
struct resource standard_io_resources[] = {
{ "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
{ "timer", 0x40, 0x5f, IORESOURCE_BUSY },
+ { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
{ "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
{ "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
};
-#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource))
-
const char *get_system_type(void)
{
return "MIPS Malta";
}
-void __init malta_setup(void)
+#ifdef CONFIG_BLK_DEV_FD
+void __init fd_activate(void)
{
-#ifdef CONFIG_KGDB
- int rs_putDebugChar(char);
- char rs_getDebugChar(void);
- extern int (*generic_putDebugChar)(char);
- extern char (*generic_getDebugChar)(void);
+ /*
+ * Activate Floppy Controller in the SMSC FDC37M817 Super I/O
+ * Controller.
+ * Done by YAMON 2.00 onwards
+ */
+ /* Entering config state. */
+ SMSC_WRITE(SMSC_CONFIG_ENTER, SMSC_CONFIG_REG);
+
+ /* Activate floppy controller. */
+ SMSC_WRITE(SMSC_CONFIG_DEVNUM, SMSC_CONFIG_REG);
+ SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY, SMSC_DATA_REG);
+ SMSC_WRITE(SMSC_CONFIG_ACTIVATE, SMSC_CONFIG_REG);
+ SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE, SMSC_DATA_REG);
+
+ /* Exit config state. */
+ SMSC_WRITE(SMSC_CONFIG_EXIT, SMSC_CONFIG_REG);
+}
#endif
- char *argptr;
- int i;
+
+static int __init malta_setup(void)
+{
+ unsigned int i;
/* Request I/O space for devices used on the Malta board. */
- for (i = 0; i < STANDARD_IO_RESOURCES; i++)
+ for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
request_resource(&ioport_resource, standard_io_resources+i);
/*
@@ -97,54 +93,79 @@ void __init malta_setup(void)
*/
enable_dma(4);
-#ifdef CONFIG_SERIAL_CONSOLE
- argptr = prom_getcmdline();
- if ((argptr = strstr(argptr, "console=")) == NULL) {
- argptr = prom_getcmdline();
- strcat(argptr, " console=ttyS0,38400");
- }
+#ifdef CONFIG_KGDB
+ kgdb_config ();
#endif
-#ifdef CONFIG_KGDB
- argptr = prom_getcmdline();
- if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
- int line;
- argptr += strlen("kgdb=ttyS");
- if (*argptr != '0' && *argptr != '1')
- printk("KGDB: Uknown serial line /dev/ttyS%c, "
- "falling back to /dev/ttyS1\n", *argptr);
- line = *argptr == '0' ? 0 : 1;
- printk("KGDB: Using serial line /dev/ttyS%d for session\n",
- line ? 1 : 0);
-
- rs_kgdb_hook(line);
- generic_putDebugChar = rs_putDebugChar;
- generic_getDebugChar = rs_getDebugChar;
+ if ((mips_revision_corid == MIPS_REVISION_CORID_BONITO64) ||
+ (mips_revision_corid == MIPS_REVISION_CORID_CORE_20K) ||
+ (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL_BON)) {
+ char *argptr;
- prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
- "please connect your debugger\n", line ? 1 : 0);
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "debug")) {
+ BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE;
+ printk ("Enabled Bonito debug mode\n");
+ }
+ else
+ BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE;
+
+#ifdef CONFIG_DMA_COHERENT
+ if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) {
+ BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN;
+ printk("Enabled Bonito CPU coherency\n");
+
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "iobcuncached")) {
+ BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN;
+ BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
+ ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
+ BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
+ printk("Disabled Bonito IOBC coherency\n");
+ }
+ else {
+ BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN;
+ BONITO_PCIMEMBASECFG |=
+ (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
+ BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
+ printk("Disabled Bonito IOBC coherency\n");
+ }
+ }
+ else
+ panic ("Hardware DMA cache coherency not supported\n");
- remote_debug = 1;
- /* Breakpoints are in init_IRQ() */
+#endif
+ }
+#ifdef CONFIG_DMA_COHERENT
+ else {
+ panic ("Hardware DMA cache coherency not supported\n");
}
#endif
- argptr = prom_getcmdline();
- if ((argptr = strstr(argptr, "nofpu")) != NULL)
- cpu_data[0].options &= ~MIPS_CPU_FPU;
-
- rtc_ops = &malta_rtc_ops;
-
#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
+ /* Check PCI clock */
+ {
+ int jmpr = (*((volatile unsigned int *)ioremap(MALTA_JMPRS_REG, sizeof(unsigned int))) >> 2) & 0x07;
+ static const int pciclocks[] __initdata = {
+ 33, 20, 25, 30, 12, 16, 37, 10
+ };
+ int pciclock = pciclocks[jmpr];
+ char *argptr = prom_getcmdline();
+
+ if (pciclock != 33 && !strstr (argptr, "idebus=")) {
+ printk("WARNING: PCI clock is %dMHz, setting idebus\n", pciclock);
+ argptr += strlen(argptr);
+ sprintf (argptr, " idebus=%d", pciclock);
+ if (pciclock < 20 || pciclock > 66)
+ printk ("WARNING: IDE timing calculations will be incorrect\n");
+ }
+ }
#endif
#ifdef CONFIG_BLK_DEV_FD
- fd_ops = &std_fd_ops;
+ fd_activate ();
#endif
#ifdef CONFIG_VT
#if defined(CONFIG_VGA_CONSOLE)
- conswitchp = &vga_con;
-
screen_info = (struct screen_info) {
0, 25, /* orig-x, orig-y */
0, /* unused */
@@ -153,11 +174,9 @@ void __init malta_setup(void)
80, /* orig-video-cols */
0,0,0, /* ega_ax, ega_bx, ega_cx */
25, /* orig-video-lines */
- 1, /* orig-video-isVGA */
+ VIDEO_TYPE_VGAC, /* orig-video-isVGA */
16 /* orig-video-points */
};
-#elif defined(CONFIG_DUMMY_CONSOLE)
- conswitchp = &dummy_con;
#endif
#endif
mips_reboot_setup();
@@ -165,4 +184,8 @@ void __init malta_setup(void)
board_time_init = mips_time_init;
board_timer_setup = mips_timer_setup;
rtc_get_time = mips_rtc_get_time;
+
+ return 0;
}
+
+early_initcall(malta_setup);
diff -puN arch/mips/mips-boards/sead/Makefile~mips-megapatch arch/mips/mips-boards/sead/Makefile
--- 25/arch/mips/mips-boards/sead/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/sead/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -23,4 +23,4 @@
# under Linux.
#
-obj-y := sead_int.o sead_setup.o sead_time.o
+obj-y := sead_int.o sead_setup.o
diff -puN arch/mips/mips-boards/sead/sead_int.c~mips-megapatch arch/mips/mips-boards/sead/sead_int.c
--- 25/arch/mips/mips-boards/sead/sead_int.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/sead/sead_int.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,8 +1,7 @@
/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
+ * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
@@ -17,84 +16,29 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
- * ########################################################################
- *
* Routines for generic manipulation of the interrupts found on the MIPS
* Sead board.
- *
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/irq.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
#include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
-#include <asm/mips-boards/sead.h>
#include <asm/mips-boards/seadint.h>
extern asmlinkage void mipsIRQ(void);
-void disable_sead_irq(unsigned int irq_nr)
-{
- if (irq_nr == SEADINT_UART0)
- clear_c0_status(0x00000400);
- else
- if (irq_nr == SEADINT_UART1)
- clear_c0_status(0x00000800);
-}
-
-void enable_sead_irq(unsigned int irq_nr)
-{
- if (irq_nr == SEADINT_UART0)
- set_c0_status(0x00000400);
- else
- if (irq_nr == SEADINT_UART1)
- set_c0_status(0x00000800);
-}
-
-static unsigned int startup_sead_irq(unsigned int irq)
-{
- enable_sead_irq(irq);
- return 0; /* never anything pending */
-}
-
-#define shutdown_sead_irq disable_sead_irq
-
-#define mask_and_ack_sead_irq disable_sead_irq
-
-static void end_sead_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_sead_irq(irq);
-}
-
-static struct hw_interrupt_type sead_irq_type = {
- "SEAD",
- startup_sead_irq,
- shutdown_sead_irq,
- enable_sead_irq,
- disable_sead_irq,
- mask_and_ack_sead_irq,
- end_sead_irq,
- NULL
-};
-
-void sead_hw0_irqdispatch(struct pt_regs *regs)
+asmlinkage void sead_hw0_irqdispatch(struct pt_regs *regs)
{
- do_IRQ(0, regs);
+ do_IRQ(SEADINT_UART0, regs);
}
-void sead_hw1_irqdispatch(struct pt_regs *regs)
+asmlinkage void sead_hw1_irqdispatch(struct pt_regs *regs)
{
- do_IRQ(1, regs);
+ do_IRQ(SEADINT_UART1, regs);
}
void __init init_IRQ(void)
{
- int i;
-
/*
* Mask out all interrupt
*/
@@ -104,12 +48,5 @@ void __init init_IRQ(void)
set_except_vector(0, mipsIRQ);
init_generic_irq();
-
- for (i = 0; i <= SEADINT_END; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = NULL;
- irq_desc[i].depth = 1;
- irq_desc[i].lock = SPIN_LOCK_UNLOCKED;
- irq_desc[i].handler = &sead_irq_type;
- }
+ mips_cpu_irq_init(0);
}
diff -puN arch/mips/mips-boards/sead/sead_setup.c~mips-megapatch arch/mips/mips-boards/sead/sead_setup.c
--- 25/arch/mips/mips-boards/sead/sead_setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mips-boards/sead/sead_setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -20,58 +20,65 @@
#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
-#include <linux/mc146818rtc.h>
#include <linux/ioport.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/prom.h>
+#include <asm/mips-boards/sead.h>
#include <asm/mips-boards/seadint.h>
#include <asm/time.h>
-#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
-extern void console_setup(char *, int *);
-char serial_console[20];
-#endif
-
extern void mips_reboot_setup(void);
extern void mips_time_init(void);
extern void mips_timer_setup(struct irqaction *irq);
+static void __init serial_init(void);
+
const char *get_system_type(void)
{
return "MIPS SEAD";
}
-void __init sead_setup(void)
+static void __init sead_setup(void)
{
- char *argptr;
-
ioport_resource.end = 0x7fffffff;
-#ifdef CONFIG_SERIAL_CONSOLE
- argptr = prom_getcmdline();
- if ((argptr = strstr(argptr, "console=ttyS0")) == NULL) {
- int i = 0;
- char *s = prom_getenv("modetty0");
- while(s[i] >= '0' && s[i] <= '9')
- i++;
- strcpy(serial_console, "ttyS0,");
- strncpy(serial_console + 6, s, i);
- prom_printf("Config serial console: %s\n", serial_console);
- console_setup(serial_console, NULL);
- }
-#endif
-
- argptr = prom_getcmdline();
-
- if ((argptr = strstr(argptr, "nofpu")) != NULL)
- cpu_data[0].options &= ~MIPS_CPU_FPU;
+ serial_init ();
board_time_init = mips_time_init;
board_timer_setup = mips_timer_setup;
mips_reboot_setup();
}
+
+early_initcall(sead_setup);
+
+static void __init serial_init(void)
+{
+#ifdef CONFIG_SERIAL_8250
+ struct uart_port s;
+
+ memset(&s, 0, sizeof(s));
+
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+ s.iobase = SEAD_UART0_REGS_BASE;
+#else
+ s.iobase = SEAD_UART0_REGS_BASE+3;
+#endif
+ s.irq = SEADINT_UART0;
+ s.uartclk = SEAD_BASE_BAUD * 16;
+ s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | UPF_RESOURCES | ASYNC_AUTO_IRQ;
+ s.iotype = 0;
+ s.regshift = 3;
+
+ if (early_serial_setup(&s) != 0) {
+ printk(KERN_ERR "Serial setup failed!\n");
+ }
+#endif
+}
diff -puN -L arch/mips/mips-boards/sead/sead_time.c arch/mips/mips-boards/sead/sead_time.c~mips-megapatch /dev/null
--- 25/arch/mips/mips-boards/sead/sead_time.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,140 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Setting up the clock on the MIPS boards.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/kernel_stat.h>
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-
-#include <asm/mipsregs.h>
-#include <asm/ptrace.h>
-#include <asm/hardirq.h>
-#include <asm/cpu.h>
-
-#include <linux/interrupt.h>
-#include <linux/timex.h>
-
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-
-extern volatile unsigned long wall_jiffies;
-
-static unsigned long r4k_offset; /* Amount to increment compare reg each time */
-static unsigned long r4k_cur; /* What counter should be at next timer irq */
-
-#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ5)
-
-static char display_string[] = " LINUX ON SEAD ";
-
-static unsigned int display_count = 0;
-#define MAX_DISPLAY_COUNT (sizeof(display_string) - 8)
-
-#define MIPS_CPU_TIMER_IRQ 7
-
-static unsigned int timer_tick_count=0;
-
-static inline void ack_r4ktimer(unsigned long newval)
-{
- write_c0_compare(newval);
-}
-
-/*
- * There are a lot of conceptually broken versions of the MIPS timer interrupt
- * handler floating around. This one is rather different, but the algorithm
- * is provably more robust.
- */
-void mips_timer_interrupt(struct pt_regs *regs)
-{
- int cpu = smp_processor_id();
- int irq = MIPS_CPU_TIMER_IRQ;
-
- irq_enter();
-
- do {
- kstat_this_cpu.irqs[irq]++;
- do_timer(regs);
-
- if ((timer_tick_count++ % HZ) == 0) {
- mips_display_message(&display_string[display_count++]);
- if (display_count == MAX_DISPLAY_COUNT)
- display_count = 0;
- }
-
- r4k_cur += r4k_offset;
- ack_r4ktimer(r4k_cur);
-
- } while (((unsigned long)read_c0_count()
- - r4k_cur) < 0x7fffffff);
-
- irq_exit();
-}
-
-/*
- * Figure out the r4k offset, the amount to increment the compare
- * register for each time tick.
- */
-static unsigned long __init cal_r4koff(void)
-{
- /*
- * The SEAD board doesn't have a real time clock, so we can't
- * really calculate the timer offset.
- * For now we hardwire the SEAD board frequency to 12MHz.
- */
- return(6000000/HZ);
-}
-
-void __init mips_time_init(void)
-{
- unsigned int est_freq, flags;
-
- local_irq_save(flags);
-
- /* Start r4k counter. */
- write_c0_count(0);
-
- printk("calculating r4koff... ");
- r4k_offset = cal_r4koff();
- printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
-
- if ((read_c0_prid() & 0xffff00) ==
- (PRID_COMP_MIPS | PRID_IMP_20KC))
- est_freq = r4k_offset*HZ;
- else
- est_freq = 2*r4k_offset*HZ;
-
- est_freq += 5000; /* round */
- est_freq -= est_freq%10000;
- printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
- (est_freq%1000000)*100/1000000);
-
- local_irq_restore(flags);
-}
-
-void __init mips_timer_setup(struct irqaction *irq)
-{
- /* we are using the cpu counter for timer interrupts */
- irq->handler = no_action; /* we use our own handler */
- setup_irq(MIPS_CPU_TIMER_IRQ, irq);
-
- /* to generate the first timer interrupt */
- r4k_cur = (read_c0_count() + r4k_offset);
- write_c0_compare(r4k_cur);
- set_c0_status(ALLINTS);
-}
diff -puN -L arch/mips/mm-32/init.c arch/mips/mm-32/init.c~mips-megapatch /dev/null
--- 25/arch/mips/mm-32/init.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,292 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 2000 Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/pagemap.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/highmem.h>
-#include <linux/swap.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cachectl.h>
-#include <asm/cpu.h>
-#include <asm/dma.h>
-#include <asm/pgalloc.h>
-#include <asm/mmu_context.h>
-#include <asm/sections.h>
-#include <asm/tlb.h>
-
-DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-
-unsigned long highstart_pfn, highend_pfn;
-
-/*
- * We have up to 8 empty zeroed pages so we can map one of the right colour
- * when needed. This is necessary only on R4000 / R4400 SC and MC versions
- * where we have to avoid VCED / VECI exceptions for good performance at
- * any price. Since page is never written to after the initialization we
- * don't have to care about aliases on other CPUs.
- */
-unsigned long empty_zero_page, zero_page_mask;
-
-/*
- * Not static inline because used by IP27 special magic initialization code
- */
-unsigned long setup_zero_pages(void)
-{
- unsigned long order, size;
- struct page *page;
-
- if (cpu_has_vce)
- order = 3;
- else
- order = 0;
-
- empty_zero_page = __get_free_pages(GFP_KERNEL, order);
- if (!empty_zero_page)
- panic("Oh boy, that early out of memory?");
-
- page = virt_to_page(empty_zero_page);
- while (page < virt_to_page(empty_zero_page + (PAGE_SIZE << order))) {
- set_bit(PG_reserved, &page->flags);
- set_page_count(page, 0);
- page++;
- }
-
- size = PAGE_SIZE << order;
- zero_page_mask = (size - 1) & PAGE_MASK;
- memset((void *)empty_zero_page, 0, size);
-
- return 1UL << order;
-}
-
-#ifdef CONFIG_HIGHMEM
-pte_t *kmap_pte;
-pgprot_t kmap_prot;
-
-EXPORT_SYMBOL(kmap_prot);
-EXPORT_SYMBOL(kmap_pte);
-
-#define kmap_get_fixmap_pte(vaddr) \
- pte_offset_kernel(pmd_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr))
-
-static void __init kmap_init(void)
-{
- unsigned long kmap_vstart;
-
- /* cache the first kmap pte */
- kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
- kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
-
- kmap_prot = PAGE_KERNEL;
-}
-
-#endif /* CONFIG_HIGHMEM */
-
-#ifdef CONFIG_HIGHMEM
-static void __init fixrange_init (unsigned long start, unsigned long end,
- pgd_t *pgd_base)
-{
- pgd_t *pgd;
- pmd_t *pmd;
- pte_t *pte;
- int i, j;
- unsigned long vaddr;
-
- vaddr = start;
- i = __pgd_offset(vaddr);
- j = __pmd_offset(vaddr);
- pgd = pgd_base + i;
-
- for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
- pmd = (pmd_t *)pgd;
- for (; (j < PTRS_PER_PMD) && (vaddr != end); pmd++, j++) {
- if (pmd_none(*pmd)) {
- pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
- set_pmd(pmd, __pmd(pte));
- if (pte != pte_offset_kernel(pmd, 0))
- BUG();
- }
- vaddr += PMD_SIZE;
- }
- j = 0;
- }
-}
-#endif
-
-#ifndef CONFIG_DISCONTIGMEM
-
-extern void pagetable_init(void);
-
-void __init paging_init(void)
-{
- unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
- unsigned long max_dma, high, low;
-
- pagetable_init();
-
-#ifdef CONFIG_HIGHMEM
- kmap_init();
-#endif
-
- max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
- low = max_low_pfn;
- high = highend_pfn;
-
-#ifdef CONFIG_ISA
- if (low < max_dma)
- zones_size[ZONE_DMA] = low;
- else {
- zones_size[ZONE_DMA] = max_dma;
- zones_size[ZONE_NORMAL] = low - max_dma;
- }
-#else
- zones_size[ZONE_DMA] = low;
-#endif
-#ifdef CONFIG_HIGHMEM
- zones_size[ZONE_HIGHMEM] = high - low;
-#endif
-
- free_area_init(zones_size);
-}
-
-#define PFN_UP(x) (((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
-#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
-
-static inline int page_is_ram(unsigned long pagenr)
-{
- int i;
-
- for (i = 0; i < boot_mem_map.nr_map; i++) {
- unsigned long addr, end;
-
- if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
- /* not usable memory */
- continue;
-
- addr = PFN_UP(boot_mem_map.map[i].addr);
- end = PFN_DOWN(boot_mem_map.map[i].addr +
- boot_mem_map.map[i].size);
-
- if (pagenr >= addr && pagenr < end)
- return 1;
- }
-
- return 0;
-}
-
-void __init mem_init(void)
-{
- unsigned long codesize, reservedpages, datasize, initsize;
- unsigned long tmp, ram;
-
-#ifdef CONFIG_HIGHMEM
- highstart_pfn = (KSEG1 - KSEG0) >> PAGE_SHIFT;
- highmem_start_page = mem_map + highstart_pfn;
-#ifdef CONFIG_DISCONTIGMEM
-#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
-#endif
- max_mapnr = num_physpages = highend_pfn;
-#else
- max_mapnr = num_physpages = max_low_pfn;
-#endif
- high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
-
- totalram_pages += free_all_bootmem();
- totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
-
- reservedpages = ram = 0;
- for (tmp = 0; tmp < max_low_pfn; tmp++)
- if (page_is_ram(tmp)) {
- ram++;
- if (PageReserved(mem_map+tmp))
- reservedpages++;
- }
-
-#ifdef CONFIG_HIGHMEM
- for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
- struct page *page = mem_map + tmp;
-
- if (!page_is_ram(tmp)) {
- SetPageReserved(page);
- continue;
- }
- ClearPageReserved(page);
- set_bit(PG_highmem, &page->flags);
- atomic_set(&page->count, 1);
- __free_page(page);
- totalhigh_pages++;
- }
- totalram_pages += totalhigh_pages;
-#endif
-
- codesize = (unsigned long) &_etext - (unsigned long) &_text;
- datasize = (unsigned long) &_edata - (unsigned long) &_etext;
- initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
-
- printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
- "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
- (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
- ram << (PAGE_SHIFT-10),
- codesize >> 10,
- reservedpages << (PAGE_SHIFT-10),
- datasize >> 10,
- initsize >> 10,
- (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
-}
-#endif /* !CONFIG_DISCONTIGMEM */
-
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
- if (start < end)
- printk(KERN_INFO "Freeing initrd memory: %ldk freed\n",
- (end - start) >> 10);
-
- for (; start < end; start += PAGE_SIZE) {
- ClearPageReserved(virt_to_page(start));
- set_page_count(virt_to_page(start), 1);
- free_page(start);
- totalram_pages++;
- }
-}
-#endif
-
-extern void prom_free_prom_memory(void);
-
-void free_initmem(void)
-{
- unsigned long addr, page;
-
- prom_free_prom_memory();
-
- addr = (unsigned long) &__init_begin;
- while (addr < (unsigned long) &__init_end) {
- page = addr;
- ClearPageReserved(virt_to_page(page));
- set_page_count(virt_to_page(page), 1);
- free_page(page);
- totalram_pages++;
- addr += PAGE_SIZE;
- }
- printk(KERN_INFO "Freeing unused kernel memory: %ldk freed\n",
- (unsigned long) (__init_end - __init_begin) >> 10);
-}
diff -puN arch/mips/mm-32/Makefile~mips-megapatch arch/mips/mm-32/Makefile
--- 25/arch/mips/mm-32/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm-32/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,19 +2,18 @@
# Makefile for the Linux/MIPS-specific parts of the memory manager.
#
-obj-y += init.o
-
-obj-$(CONFIG_CPU_TX49XX) += pg-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_R4300) += pg-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_R4X00) += pg-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_VR41XX) += pg-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_R5000) += pg-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_NEVADA) += pg-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_R5432) += pg-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_RM7000) += pg-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_R10000) += pg-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_MIPS32) += pg-r4k.o tlbex-r4k.o
-obj-$(CONFIG_CPU_MIPS64) += pg-r4k.o tlbex-r4k.o
+obj-$(CONFIG_CPU_TX49XX) += tlbex-r4k.o
+obj-$(CONFIG_CPU_R4300) += tlbex-r4k.o
+obj-$(CONFIG_CPU_R4X00) += tlbex-r4k.o
+obj-$(CONFIG_CPU_VR41XX) += tlbex-r4k.o
+obj-$(CONFIG_CPU_R5000) += tlbex-r4k.o
+obj-$(CONFIG_CPU_NEVADA) += tlbex-r4k.o
+obj-$(CONFIG_CPU_R5432) += tlbex-r4k.o
+obj-$(CONFIG_CPU_RM7000) += tlbex-r4k.o
+obj-$(CONFIG_CPU_RM9000) += tlbex-r4k.o
+obj-$(CONFIG_CPU_R10000) += tlbex-r4k.o
+obj-$(CONFIG_CPU_MIPS32) += tlbex-r4k.o
+obj-$(CONFIG_CPU_MIPS64) += tlbex-r4k.o
obj-$(CONFIG_CPU_SB1) += tlbex-r4k.o
EXTRA_AFLAGS := $(CFLAGS)
diff -puN -L arch/mips/mm-32/pg-r4k.S arch/mips/mm-32/pg-r4k.S~mips-megapatch /dev/null
--- 25/arch/mips/mm-32/pg-r4k.S
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,785 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * r4xx0.c: R4000 processor variant specific MMU/Cache routines.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
- */
-#include <linux/config.h>
-#include <asm/addrspace.h>
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include <asm/cacheops.h>
-#include <asm/mipsregs.h>
-#include <asm/offset.h>
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PGD_SIZE 0x2000
-#else
-#define PGD_SIZE 0x1000
-#endif
-
- .text
- .set noat
-
-/*
- * Zero an entire page. Basically a simple unrolled loop should do the
- * job but we want more performance by saving memory bus bandwidth. We
- * have five flavours of the routine available for:
- *
- * - 16byte cachelines and no second level cache
- * - 32byte cachelines second level cache
- * - a version which handles the buggy R4600 v1.x
- * - a version which handles the buggy R4600 v2.0
- * - Finally a last version without fancy cache games for the SC and MC
- * versions of R4000 and R4400.
- */
-
-LEAF(r4k_clear_page32_d16)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- sw zero, (a0)
- sw zero, 4(a0)
- sw zero, 8(a0)
- sw zero, 12(a0)
- addiu a0, 32
- cache Create_Dirty_Excl_D, -16(a0)
- sw zero, -16(a0)
- sw zero, -12(a0)
- sw zero, -8(a0)
- sw zero, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page32_d16)
-
-LEAF(r4k_clear_page32_d32)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- sw zero, (a0)
- sw zero, 4(a0)
- sw zero, 8(a0)
- sw zero, 12(a0)
- addiu a0, 32
- sw zero, -16(a0)
- sw zero, -12(a0)
- sw zero, -8(a0)
- sw zero, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page32_d32)
-
-LEAF(r4k_clear_page_d16)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- cache Create_Dirty_Excl_D, 16(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- cache Create_Dirty_Excl_D, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- cache Create_Dirty_Excl_D, -16(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_d16)
-
-LEAF(r4k_clear_page_d32)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- cache Create_Dirty_Excl_D, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_d32)
-
-/*
- * This flavour of r4k_clear_page is for the R4600 V1.x. Cite from the
- * IDT R4600 V1.7 errata:
- *
- * 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
- * Hit_Invalidate_D and Create_Dirty_Excl_D should only be
- * executed if there is no other dcache activity. If the dcache is
- * accessed for another instruction immeidately preceding when these
- * cache instructions are executing, it is possible that the dcache
- * tag match outputs used by these cache instructions will be
- * incorrect. These cache instructions should be preceded by at least
- * four instructions that are not any kind of load or store
- * instruction.
- *
- * This is not allowed: lw
- * nop
- * nop
- * nop
- * cache Hit_Writeback_Invalidate_D
- *
- * This is allowed: lw
- * nop
- * nop
- * nop
- * nop
- * cache Hit_Writeback_Invalidate_D
- */
-
-LEAF(r4k_clear_page_r4600_v1)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: nop
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_r4600_v1)
-
-LEAF(r4k_clear_page_r4600_v2)
- .set mips3
- mfc0 a1, CP0_STATUS
- ori AT, a1, 1
- xori AT, 1
- mtc0 AT, CP0_STATUS
- nop
- nop
- nop
-
- .set volatile
- la AT, KSEG1
- lw zero, (AT)
- .set novolatile
-
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- cache Create_Dirty_Excl_D, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
-
- mfc0 AT, CP0_STATUS # local_irq_restore
- andi a1, 1
- ori AT, 1
- xori AT, 1
- or a1, AT
- mtc0 a1, CP0_STATUS
- nop
- nop
- nop
-
- jr ra
- END(r4k_clear_page_r4600_v2)
-
-/*
- * The next 4 versions are optimized for all possible scache configurations
- * of the SC / MC versions of R4000 and R4400 ...
- *
- * Todo: For even better performance we should have a routine optimized for
- * every legal combination of dcache / scache linesize. When I (Ralf) tried
- * this the kernel crashed shortly after mounting the root filesystem. CPU
- * bug? Weirdo cache instruction semantics?
- */
-
-LEAF(r4k_clear_page_s16)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- cache Create_Dirty_Excl_SD, 16(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- cache Create_Dirty_Excl_SD, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- cache Create_Dirty_Excl_SD, -16(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_s16)
-
-LEAF(r4k_clear_page_s32)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- cache Create_Dirty_Excl_SD, -32(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_s32)
-
-LEAF(r4k_clear_page_s64)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- addiu a0, 64
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_s64)
-
-LEAF(r4k_clear_page_s128)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- sd zero, (a0)
- sd zero, 8(a0)
- sd zero, 16(a0)
- sd zero, 24(a0)
- sd zero, 32(a0)
- sd zero, 40(a0)
- sd zero, 48(a0)
- sd zero, 56(a0)
- addiu a0, 128
- sd zero, -64(a0)
- sd zero, -56(a0)
- sd zero, -48(a0)
- sd zero, -40(a0)
- sd zero, -32(a0)
- sd zero, -24(a0)
- sd zero, -16(a0)
- sd zero, -8(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_clear_page_s128)
-
-/*
- * This is suboptimal for 32-bit kernels; we assume that R10000 is only used
- * with 64-bit kernels. The prefetch offsets have been experimentally tuned
- * an Origin 200.
- */
-LEAF(andes_clear_page)
- .set mips4
- LONG_ADDIU AT, a0, _PAGE_SIZE
-1: pref 7, 512(a0)
- sd zero, 0*SZREG(a0)
- sd zero, 1*SZREG(a0)
- sd zero, 2*SZREG(a0)
- sd zero, 3*SZREG(a0)
- LONG_ADDIU a0, a0, 8*SZREG
- sd zero, -4*SZREG(a0)
- sd zero, -3*SZREG(a0)
- sd zero, -2*SZREG(a0)
- sd zero, -1*SZREG(a0)
- bne AT, a0, 1b
- j ra
- END(andes_clear_page)
- .set mips0
-
-/*
- * This is still inefficient. We only can do better if we know the
- * virtual address where the copy will be accessed.
- */
-
-LEAF(r4k_copy_page_d16)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- cache Create_Dirty_Excl_D, 16(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- cache Create_Dirty_Excl_D, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- cache Create_Dirty_Excl_D, -16(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_d16)
-
-LEAF(r4k_copy_page_d32)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_D, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- cache Create_Dirty_Excl_D, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_d32)
-
-/*
- * Again a special version for the R4600 V1.x
- */
-
-LEAF(r4k_copy_page_r4600_v1)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: nop
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- nop
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_r4600_v1)
-
-LEAF(r4k_copy_page_r4600_v2)
- .set mips3
- mfc0 v1, CP0_STATUS
- ori AT, v1, 1
- xori AT, 1
-
- mtc0 AT, CP0_STATUS
- nop
- nop
- nop
-
- addiu AT, a0, _PAGE_SIZE
-1: nop
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, (a0)
- lw t1, (a1)
- lw t0, 4(a1)
- lw a3, 8(a1)
- lw a2, 12(a1)
- sw t1, (a0)
- sw t0, 4(a0)
- sw a3, 8(a0)
- sw a2, 12(a0)
- lw t1, 16(a1)
- lw t0, 20(a1)
- lw a3, 24(a1)
- lw a2, 28(a1)
- sw t1, 16(a0)
- sw t0, 20(a0)
- sw a3, 24(a0)
- sw a2, 28(a0)
- nop
- nop
- nop
- nop
- cache Create_Dirty_Excl_D, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw t1, -32(a1)
- lw t0, -28(a1)
- lw a3, -24(a1)
- lw a2, -20(a1)
- sw t1, -32(a0)
- sw t0, -28(a0)
- sw a3, -24(a0)
- sw a2, -20(a0)
- lw t1, -16(a1)
- lw t0, -12(a1)
- lw a3, -8(a1)
- lw a2, -4(a1)
- sw t1, -16(a0)
- sw t0, -12(a0)
- sw a3, -8(a0)
- sw a2, -4(a0)
- bne AT, a0, 1b
-
- mfc0 AT, CP0_STATUS # local_irq_restore
- andi v1, 1
- ori AT, 1
- xori AT, 1
- or v1, AT
- mtc0 v1, CP0_STATUS
- nop
- nop
- nop
- jr ra
- END(r4k_copy_page_r4600_v2)
-
-/*
- * These are for R4000SC / R4400MC
- */
-
-LEAF(r4k_copy_page_s16)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- cache Create_Dirty_Excl_SD, 16(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- cache Create_Dirty_Excl_SD, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- cache Create_Dirty_Excl_SD, -16(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_s16)
-
-LEAF(r4k_copy_page_s32)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- cache Create_Dirty_Excl_SD, 32(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_s32)
-
-LEAF(r4k_copy_page_s64)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- addiu a0, 64
- addiu a1, 64
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_s64)
-
-LEAF(r4k_copy_page_s128)
- .set mips3
- addiu AT, a0, _PAGE_SIZE
-1: cache Create_Dirty_Excl_SD, (a0)
- lw a3, (a1)
- lw a2, 4(a1)
- lw v1, 8(a1)
- lw v0, 12(a1)
- sw a3, (a0)
- sw a2, 4(a0)
- sw v1, 8(a0)
- sw v0, 12(a0)
- lw a3, 16(a1)
- lw a2, 20(a1)
- lw v1, 24(a1)
- lw v0, 28(a1)
- sw a3, 16(a0)
- sw a2, 20(a0)
- sw v1, 24(a0)
- sw v0, 28(a0)
- lw a3, 32(a1)
- lw a2, 36(a1)
- lw v1, 40(a1)
- lw v0, 44(a1)
- sw a3, 32(a0)
- sw a2, 36(a0)
- sw v1, 40(a0)
- sw v0, 44(a0)
- lw a3, 48(a1)
- lw a2, 52(a1)
- lw v1, 56(a1)
- lw v0, 60(a1)
- sw a3, 48(a0)
- sw a2, 52(a0)
- sw v1, 56(a0)
- sw v0, 60(a0)
- addiu a0, 128
- addiu a1, 128
- lw a3, -64(a1)
- lw a2, -60(a1)
- lw v1, -56(a1)
- lw v0, -52(a1)
- sw a3, -64(a0)
- sw a2, -60(a0)
- sw v1, -56(a0)
- sw v0, -52(a0)
- lw a3, -48(a1)
- lw a2, -44(a1)
- lw v1, -40(a1)
- lw v0, -36(a1)
- sw a3, -48(a0)
- sw a2, -44(a0)
- sw v1, -40(a0)
- sw v0, -36(a0)
- lw a3, -32(a1)
- lw a2, -28(a1)
- lw v1, -24(a1)
- lw v0, -20(a1)
- sw a3, -32(a0)
- sw a2, -28(a0)
- sw v1, -24(a0)
- sw v0, -20(a0)
- lw a3, -16(a1)
- lw a2, -12(a1)
- lw v1, -8(a1)
- lw v0, -4(a1)
- sw a3, -16(a0)
- sw a2, -12(a0)
- sw v1, -8(a0)
- sw v0, -4(a0)
- bne AT, a0, 1b
- jr ra
- END(r4k_copy_page_s128)
-
-
- .text
- .set mips4
- .set noat
-
-
-/*
- * This is suboptimal for 32-bit kernels; we assume that R10000 is only used
- * with 64-bit kernels. The prefetch offsets have been experimentally tuned
- * an Origin 200.
- */
-LEAF(andes_copy_page)
- .set mips4
- LONG_ADDIU AT, a0, _PAGE_SIZE
-1: pref 0, 2*128(a1)
- pref 1, 2*128(a0)
- LONG_L a3, 0*SZREG(a1)
- LONG_L a2, 1*SZREG(a1)
- LONG_L v1, 2*SZREG(a1)
- LONG_L v0, 3*SZREG(a1)
- LONG_S a3, 0*SZREG(a0)
- LONG_S a2, 1*SZREG(a0)
- LONG_S v1, 2*SZREG(a0)
- LONG_S v0, 3*SZREG(a0)
- LONG_ADDIU a0, a0, 8*SZREG
- LONG_ADDIU a1, a1, 8*SZREG
- LONG_L a3, -4*SZREG(a1)
- LONG_L a2, -3*SZREG(a1)
- LONG_L v1, -2*SZREG(a1)
- LONG_L v0, -1*SZREG(a1)
- LONG_S a3, -4*SZREG(a0)
- LONG_S a2, -3*SZREG(a0)
- LONG_S v1, -2*SZREG(a0)
- LONG_S v0, -1*SZREG(a0)
- bne AT, a0,1b
- j ra
- END(andes_copy_page)
- .set mips0
diff -puN arch/mips/mm-32/tlbex-r4k.S~mips-megapatch arch/mips/mm-32/tlbex-r4k.S
--- 25/arch/mips/mm-32/tlbex-r4k.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm-32/tlbex-r4k.S 2004-02-19 12:53:00.000000000 -0800
@@ -19,7 +19,6 @@
#include <asm/mipsregs.h>
#include <asm/page.h>
#include <asm/pgtable-bits.h>
-#include <asm/processor.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
#include <asm/war.h>
@@ -179,9 +178,11 @@
PTE_SRL k1, k1, 6 # convert to entrylo1
P_MTC0 k1, CP0_ENTRYLO1 # load it
b 1f
+ rm9000_tlb_hazard
tlbwr # write random tlb entry
1:
nop
+ rm9000_tlb_hazard
eret # return from trap
END(except_vec0_r4000)
@@ -452,6 +453,7 @@
#endif
invalid_tlbl:
#ifdef TLB_OPTIMIZE
+ .set mips3
/* Test present bit in entry. */
LOAD_PTE(k0, k1)
R5K_HAZARD
@@ -459,11 +461,13 @@ invalid_tlbl:
PTE_PRESENT(k0, k1, nopage_tlbl)
PTE_MAKEVALID(k0, k1)
PTE_RELOAD(k1, k0)
+ rm9000_tlb_hazard
nop
b 1f
tlbwi
1:
nop
+ rm9000_tlb_hazard
.set mips3
eret
.set mips0
@@ -485,11 +489,13 @@ nopage_tlbl:
PTE_WRITABLE(k0, k1, nopage_tlbs)
PTE_MAKEWRITE(k0, k1)
PTE_RELOAD(k1, k0)
+ rm9000_tlb_hazard
nop
b 1f
tlbwi
1:
nop
+ rm9000_tlb_hazard
.set mips3
eret
.set mips0
@@ -516,10 +522,12 @@ nopage_tlbs:
/* Now reload the entry into the tlb. */
PTE_RELOAD(k1, k0)
+ rm9000_tlb_hazard
nop
b 1f
tlbwi
1:
+ rm9000_tlb_hazard
nop
.set mips3
eret
@@ -529,4 +537,3 @@ nopage_tlbs:
nowrite_mod:
DO_FAULT(1)
END(handle_mod)
-
diff -puN -L arch/mips/mm-64/init.c arch/mips/mm-64/init.c~mips-megapatch /dev/null
--- 25/arch/mips/mm-64/init.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,296 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 2000 Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/pagemap.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/highmem.h>
-#include <linux/swap.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cachectl.h>
-#include <asm/cpu.h>
-#include <asm/dma.h>
-#include <asm/pgalloc.h>
-#include <asm/mmu_context.h>
-#include <asm/sections.h>
-#include <asm/tlb.h>
-
-DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-
-unsigned long highstart_pfn, highend_pfn;
-
-/*
- * We have up to 8 empty zeroed pages so we can map one of the right colour
- * when needed. This is necessary only on R4000 / R4400 SC and MC versions
- * where we have to avoid VCED / VECI exceptions for good performance at
- * any price. Since page is never written to after the initialization we
- * don't have to care about aliases on other CPUs.
- */
-unsigned long empty_zero_page, zero_page_mask;
-
-/*
- * Not static inline because used by IP27 special magic initialization code
- */
-unsigned long setup_zero_pages(void)
-{
- unsigned long order, size;
- struct page *page;
-
- if (cpu_has_vce)
- order = 3;
- else
- order = 0;
-
- empty_zero_page = __get_free_pages(GFP_KERNEL, order);
- if (!empty_zero_page)
- panic("Oh boy, that early out of memory?");
-
- page = virt_to_page(empty_zero_page);
- while (page < virt_to_page(empty_zero_page + (PAGE_SIZE << order))) {
- set_bit(PG_reserved, &page->flags);
- set_page_count(page, 0);
- page++;
- }
-
- size = PAGE_SIZE << order;
- zero_page_mask = (size - 1) & PAGE_MASK;
- memset((void *)empty_zero_page, 0, size);
-
- return 1UL << order;
-}
-
-#ifdef CONFIG_HIGHMEM
-pte_t *kmap_pte;
-pgprot_t kmap_prot;
-
-EXPORT_SYMBOL(kmap_prot);
-EXPORT_SYMBOL(kmap_pte);
-
-#define kmap_get_fixmap_pte(vaddr) \
- pte_offset_kernel(pmd_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr))
-
-static void __init kmap_init(void)
-{
- unsigned long kmap_vstart;
-
- /* cache the first kmap pte */
- kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
- kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
-
- kmap_prot = PAGE_KERNEL;
-}
-
-#endif /* CONFIG_HIGHMEM */
-
-#ifdef CONFIG_HIGHMEM
-static void __init fixrange_init (unsigned long start, unsigned long end,
- pgd_t *pgd_base)
-{
- pgd_t *pgd;
- pmd_t *pmd;
- pte_t *pte;
- int i, j;
- unsigned long vaddr;
-
- vaddr = start;
- i = __pgd_offset(vaddr);
- j = __pmd_offset(vaddr);
- pgd = pgd_base + i;
-
- for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
- pmd = (pmd_t *)pgd;
- for (; (j < PTRS_PER_PMD) && (vaddr != end); pmd++, j++) {
- if (pmd_none(*pmd)) {
- pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
- set_pmd(pmd, __pmd(pte));
- if (pte != pte_offset_kernel(pmd, 0))
- BUG();
- }
- vaddr += PMD_SIZE;
- }
- j = 0;
- }
-}
-#endif
-
-#ifndef CONFIG_DISCONTIGMEM
-
-extern void pagetable_init(void);
-
-void __init paging_init(void)
-{
- unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
- unsigned long max_dma, high, low;
-
- pagetable_init();
-
-#ifdef CONFIG_HIGHMEM
- kmap_init();
-#endif
-
- max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
- low = max_low_pfn;
- high = highend_pfn;
-
-#ifdef CONFIG_ISA
- if (low < max_dma)
- zones_size[ZONE_DMA] = low;
- else {
- zones_size[ZONE_DMA] = max_dma;
- zones_size[ZONE_NORMAL] = low - max_dma;
- }
-#else
- zones_size[ZONE_DMA] = low;
-#endif
-#ifdef CONFIG_HIGHMEM
- zones_size[ZONE_HIGHMEM] = high - low;
-#endif
-
- free_area_init(zones_size);
-}
-
-#define PFN_UP(x) (((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
-#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
-
-static inline int page_is_ram(unsigned long pagenr)
-{
- int i;
-
- for (i = 0; i < boot_mem_map.nr_map; i++) {
- unsigned long addr, end;
-
- if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
- /* not usable memory */
- continue;
-
- addr = PFN_UP(boot_mem_map.map[i].addr);
- end = PFN_DOWN(boot_mem_map.map[i].addr +
- boot_mem_map.map[i].size);
-
- if (pagenr >= addr && pagenr < end)
- return 1;
- }
-
- return 0;
-}
-
-void __init mem_init(void)
-{
- unsigned long codesize, reservedpages, datasize, initsize;
- unsigned long tmp, ram;
-
-#ifdef CONFIG_HIGHMEM
- highstart_pfn = (KSEG1 - KSEG0) >> PAGE_SHIFT;
- highmem_start_page = mem_map + highstart_pfn;
-#ifdef CONFIG_DISCONTIGMEM
-#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
-#endif
- max_mapnr = num_physpages = highend_pfn;
-#else
- max_mapnr = num_physpages = max_low_pfn;
-#endif
- high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
-
- totalram_pages += free_all_bootmem();
- totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
-
- reservedpages = ram = 0;
- for (tmp = 0; tmp < max_low_pfn; tmp++)
- if (page_is_ram(tmp)) {
- ram++;
- if (PageReserved(mem_map+tmp))
- reservedpages++;
- }
-
-#ifdef CONFIG_HIGHMEM
- for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
- struct page *page = mem_map + tmp;
-
- if (!page_is_ram(tmp)) {
- SetPageReserved(page);
- continue;
- }
- ClearPageReserved(page);
- set_bit(PG_highmem, &page->flags);
- atomic_set(&page->count, 1);
- __free_page(page);
- totalhigh_pages++;
- }
- totalram_pages += totalhigh_pages;
-#endif
-
- codesize = (unsigned long) &_etext - (unsigned long) &_text;
- datasize = (unsigned long) &_edata - (unsigned long) &_etext;
- initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
-
- printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
- "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
- (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
- ram << (PAGE_SHIFT-10),
- codesize >> 10,
- reservedpages << (PAGE_SHIFT-10),
- datasize >> 10,
- initsize >> 10,
- (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
-}
-#endif /* !CONFIG_DISCONTIGMEM */
-
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
- /* Switch from KSEG0 to XKPHYS addresses */
- start = (unsigned long)phys_to_virt(CPHYSADDR(start));
- end = (unsigned long)phys_to_virt(CPHYSADDR(end));
-
- if (start < end)
- printk(KERN_INFO "Freeing initrd memory: %ldk freed\n",
- (end - start) >> 10);
-
- for (; start < end; start += PAGE_SIZE) {
- ClearPageReserved(virt_to_page(start));
- set_page_count(virt_to_page(start), 1);
- free_page(start);
- totalram_pages++;
- }
-}
-#endif
-
-extern void prom_free_prom_memory(void);
-
-void free_initmem(void)
-{
- unsigned long addr, page;
-
- prom_free_prom_memory();
-
- addr = (unsigned long) &__init_begin;
- while (addr < (unsigned long) &__init_end) {
- page = PAGE_OFFSET | CPHYSADDR(addr);
- ClearPageReserved(virt_to_page(page));
- set_page_count(virt_to_page(page), 1);
- free_page(page);
- totalram_pages++;
- addr += PAGE_SIZE;
- }
- printk(KERN_INFO "Freeing unused kernel memory: %ldk freed\n",
- (unsigned long) (__init_end - __init_begin) >> 10);
-}
diff -puN arch/mips/mm-64/Makefile~mips-megapatch arch/mips/mm-64/Makefile
--- 25/arch/mips/mm-64/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm-64/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,17 +2,18 @@
# Makefile for the Linux/MIPS-specific parts of the memory manager.
#
-obj-y := init.o tlbex-r4k.o
+obj-y := tlbex-r4k.o
-obj-$(CONFIG_CPU_R4300) += pg-r4k.o tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R4X00) += pg-r4k.o tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R5000) += pg-r4k.o tlb-glue-r4k.o
-obj-$(CONFIG_CPU_NEVADA) += pg-r4k.o tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R5432) += pg-r4k.o tlb-glue-r4k.o
-obj-$(CONFIG_CPU_RM7000) += pg-r4k.o tlb-glue-r4k.o
-obj-$(CONFIG_CPU_R10000) += pg-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R4300) += tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R4X00) += tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R5000) += tlb-glue-r4k.o
+obj-$(CONFIG_CPU_NEVADA) += tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R5432) += tlb-glue-r4k.o
+obj-$(CONFIG_CPU_RM7000) += tlb-glue-r4k.o
+obj-$(CONFIG_CPU_RM9000) += tlb-glue-r4k.o
+obj-$(CONFIG_CPU_R10000) += tlb-glue-r4k.o
obj-$(CONFIG_CPU_SB1) += tlb-glue-sb1.o
-obj-$(CONFIG_CPU_MIPS64) += pg-r4k.o tlb-glue-r4k.o
+obj-$(CONFIG_CPU_MIPS64) += tlb-glue-r4k.o
#
# Debug TLB exception handler, currently unused
diff -puN -L arch/mips/mm-64/pg-r4k.c arch/mips/mm-64/pg-r4k.c~mips-megapatch /dev/null
--- 25/arch/mips/mm-64/pg-r4k.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,708 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997, 98, 99, 2000, 01, 02, 03 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2000 Kanoj Sarcar (kanoj@sgi.com)
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-
-#include <asm/cacheops.h>
-#include <asm/io.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-#include <asm/bootinfo.h>
-#include <asm/mmu_context.h>
-#include <asm/cpu.h>
-
-/*
- * Zero an entire page. Basically a simple unrolled loop should do the
- * job but we want more performance by saving memory bus bandwidth. We
- * have five flavours of the routine available for:
- *
- * - 16byte cachelines and no second level cache
- * - 32byte cachelines second level cache
- * - a version which handles the buggy R4600 v1.x
- * - a version which handles the buggy R4600 v2.0
- * - Finally a last version without fancy cache games for the SC and MC
- * versions of R4000 and R4400.
- */
-
-void r4k_clear_page_d16(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "cache\t%3,16(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "cache\t%3,-16(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
- : "memory");
-}
-
-void r4k_clear_page_d32(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
- : "memory");
-}
-
-
-/*
- * This flavour of r4k_clear_page is for the R4600 V1.x. Cite from the
- * IDT R4600 V1.7 errata:
- *
- * 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
- * Hit_Invalidate_D and Create_Dirty_Excl_D should only be
- * executed if there is no other dcache activity. If the dcache is
- * accessed for another instruction immeidately preceding when these
- * cache instructions are executing, it is possible that the dcache
- * tag match outputs used by these cache instructions will be
- * incorrect. These cache instructions should be preceded by at least
- * four instructions that are not any kind of load or store
- * instruction.
- *
- * This is not allowed: lw
- * nop
- * nop
- * nop
- * cache Hit_Writeback_Invalidate_D
- *
- * This is allowed: lw
- * nop
- * nop
- * nop
- * nop
- * cache Hit_Writeback_Invalidate_D
- */
-void r4k_clear_page_r4600_v1(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tnop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "cache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
- : "memory");
-}
-
-/*
- * And this one is for the R4600 V2.0
- */
-void r4k_clear_page_r4600_v2(void * page)
-{
- unsigned int flags;
-
- local_irq_save(flags);
- *(volatile unsigned int *)KSEG1;
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
- : "memory");
- local_irq_restore(flags);
-}
-
-/*
- * The next 4 versions are optimized for all possible scache configurations
- * of the SC / MC versions of R4000 and R4400 ...
- *
- * Todo: For even better performance we should have a routine optimized for
- * every legal combination of dcache / scache linesize. When I (Ralf) tried
- * this the kernel crashed shortly after mounting the root filesystem. CPU
- * bug? Weirdo cache instruction semantics?
- */
-void r4k_clear_page_s16(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "cache\t%3,16(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "cache\t%3,-16(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
- : "memory");
-}
-
-void r4k_clear_page_s32(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "cache\t%3,-32(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
- : "memory");
-}
-
-void r4k_clear_page_s64(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
- : "memory");
-}
-
-void r4k_clear_page_s128(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tcache\t%3,(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "sd\t$0,32(%0)\n\t"
- "sd\t$0,40(%0)\n\t"
- "sd\t$0,48(%0)\n\t"
- "sd\t$0,56(%0)\n\t"
- "daddiu\t%0,128\n\t"
- "sd\t$0,-64(%0)\n\t"
- "sd\t$0,-56(%0)\n\t"
- "sd\t$0,-48(%0)\n\t"
- "sd\t$0,-40(%0)\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
- : "memory");
-}
-
-/*
- * This version has been tuned on an Origin. For other machines the arguments
- * of the pref instructin may have to be tuned differently.
- */
-void andes_clear_page(void * page)
-{
- __asm__ __volatile__(
- ".set\tpush\n\t"
- ".set\tmips4\n\t"
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%2\n"
- "1:\tpref 7,512(%0)\n\t"
- "sd\t$0,(%0)\n\t"
- "sd\t$0,8(%0)\n\t"
- "sd\t$0,16(%0)\n\t"
- "sd\t$0,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "sd\t$0,-32(%0)\n\t"
- "sd\t$0,-24(%0)\n\t"
- "sd\t$0,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sd\t$0,-8(%0)\n\t"
- ".set\tpop"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE)
- : "memory");
-}
-
-
-/*
- * This is still inefficient. We only can do better if we know the
- * virtual address where the copy will be accessed.
- */
-
-void r4k_copy_page_d16(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "cache\t%7,16(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "cache\t%7,-16(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_D));
-}
-
-void r4k_copy_page_d32(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_D));
-}
-
-/*
- * Again a special version for the R4600 V1.x
- */
-void r4k_copy_page_r4600_v1(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tnop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_D));
-}
-
-void r4k_copy_page_r4600_v2(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
- unsigned int flags;
-
- local_irq_save(flags);
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tnop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_D));
- local_irq_restore(flags);
-}
-
-/*
- * These are for R4000SC / R4400MC
- */
-void r4k_copy_page_s16(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "cache\t%7,16(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "cache\t%7,-16(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_SD));
-}
-
-void r4k_copy_page_s32(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "cache\t%7,32(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_SD));
-}
-
-void r4k_copy_page_s64(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%6\n"
- "1:\tcache\t%7,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "ld\t%2,16(%1)\n\t"
- "ld\t%3,24(%1)\n\t"
- "sd\t%2,16(%0)\n\t"
- "sd\t%3,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "ld\t%2,-16(%1)\n\t"
- "ld\t%3,-8(%1)\n\t"
- "sd\t%2,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%3,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
- :"0" (to), "1" (from), "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_SD));
-}
-
-void r4k_copy_page_s128(void * to, void * from)
-{
- unsigned long dummy1, dummy2;
- unsigned long reg1, reg2, reg3, reg4;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%8\n"
- "1:\tcache\t%9,(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "ld\t%4,16(%1)\n\t"
- "ld\t%5,24(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "sd\t%4,16(%0)\n\t"
- "sd\t%5,24(%0)\n\t"
- "ld\t%2,32(%1)\n\t"
- "ld\t%3,40(%1)\n\t"
- "ld\t%4,48(%1)\n\t"
- "ld\t%5,56(%1)\n\t"
- "sd\t%2,32(%0)\n\t"
- "sd\t%3,40(%0)\n\t"
- "sd\t%4,48(%0)\n\t"
- "sd\t%5,56(%0)\n\t"
- "daddiu\t%0,128\n\t"
- "daddiu\t%1,128\n\t"
- "ld\t%2,-64(%1)\n\t"
- "ld\t%3,-56(%1)\n\t"
- "ld\t%4,-48(%1)\n\t"
- "ld\t%5,-40(%1)\n\t"
- "sd\t%2,-64(%0)\n\t"
- "sd\t%3,-56(%0)\n\t"
- "sd\t%4,-48(%0)\n\t"
- "sd\t%5,-40(%0)\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "ld\t%4,-16(%1)\n\t"
- "ld\t%5,-8(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "sd\t%4,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%5,-8(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- :"=r" (dummy1), "=r" (dummy2),
- "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
- :"0" (to), "1" (from),
- "I" (PAGE_SIZE),
- "i" (Create_Dirty_Excl_SD));
-}
-
-/*
- * This version has been tuned on an Origin. For other machines the arguments
- * of the pref instructin may have to be tuned differently.
- */
-void andes_copy_page(void * to, void * from)
-{
- unsigned long dummy1, dummy2, reg1, reg2, reg3, reg4;
-
- __asm__ __volatile__(
- ".set\tpush\n\t"
- ".set\tmips4\n\t"
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "daddiu\t$1,%0,%8\n"
- "1:\tpref\t0,2*128(%1)\n\t"
- "pref\t1,2*128(%0)\n\t"
- "ld\t%2,(%1)\n\t"
- "ld\t%3,8(%1)\n\t"
- "ld\t%4,16(%1)\n\t"
- "ld\t%5,24(%1)\n\t"
- "sd\t%2,(%0)\n\t"
- "sd\t%3,8(%0)\n\t"
- "sd\t%4,16(%0)\n\t"
- "sd\t%5,24(%0)\n\t"
- "daddiu\t%0,64\n\t"
- "daddiu\t%1,64\n\t"
- "ld\t%2,-32(%1)\n\t"
- "ld\t%3,-24(%1)\n\t"
- "ld\t%4,-16(%1)\n\t"
- "ld\t%5,-8(%1)\n\t"
- "sd\t%2,-32(%0)\n\t"
- "sd\t%3,-24(%0)\n\t"
- "sd\t%4,-16(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- " sd\t%5,-8(%0)\n\t"
- ".set\tpop\n\t"
- :"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2),
- "=&r" (reg3), "=&r" (reg4)
- :"0" (to), "1" (from), "I" (PAGE_SIZE));
-}
diff -puN arch/mips/mm-64/tlbex-r4k.S~mips-megapatch arch/mips/mm-64/tlbex-r4k.S
--- 25/arch/mips/mm-64/tlbex-r4k.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm-64/tlbex-r4k.S 2004-02-19 12:53:00.000000000 -0800
@@ -10,7 +10,9 @@
#include <linux/config.h>
#include <linux/init.h>
#include <linux/threads.h>
+
#include <asm/asm.h>
+#include <asm/hazards.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
@@ -133,9 +135,11 @@ LEAF(handle_vec1_r4k)
ld k0, 0(k1) # get even pte
ld k1, 8(k1) # get odd pte
PTE_RELOAD k0 k1
+ rm9000_tlb_hazard
b 1f
tlbwr
1: nop
+ rm9000_tlb_hazard
eret
9: # handle the vmalloc range
@@ -143,9 +147,11 @@ LEAF(handle_vec1_r4k)
ld k0, 0(k1) # get even pte
ld k1, 8(k1) # get odd pte
PTE_RELOAD k0 k1
+ rm9000_tlb_hazard
b 1f
tlbwr
1: nop
+ rm9000_tlb_hazard
eret
END(handle_vec1_r4k)
@@ -173,8 +179,10 @@ LEAF(handle_vec1_r10k)
ld k0, 0(k1) # get even pte
ld k1, 8(k1) # get odd pte
PTE_RELOAD k0 k1
+ rm9000_tlb_hazard
nop
tlbwr
+ rm9000_tlb_hazard
eret
9: # handle the vmalloc range
@@ -182,8 +190,10 @@ LEAF(handle_vec1_r10k)
ld k0, 0(k1) # get even pte
ld k1, 8(k1) # get odd pte
PTE_RELOAD k0 k1
+ rm9000_tlb_hazard
nop
tlbwr
+ rm9000_tlb_hazard
eret
END(handle_vec1_r10k)
@@ -191,7 +201,11 @@ END(handle_vec1_r10k)
.align 5
LEAF(invalid_vmalloc_address)
.set noat
+ SAVE_ALL
+ CLI
+ dmfc0 t0, CP0_BADVADDR
+ sd t0, PT_BVADDR(sp)
+ move a0, sp
+ jal show_regs
PANIC("Invalid kernel address")
-1: b 1b
- nop
END(invalid_vmalloc_address)
diff -puN arch/mips/mm/cache.c~mips-megapatch arch/mips/mm/cache.c
--- 25/arch/mips/mm/cache.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/cache.c 2004-02-19 12:53:00.000000000 -0800
@@ -5,12 +5,45 @@
*
* Copyright (C) 1994 - 2003 by Ralf Baechle
*/
+#include <linux/config.h>
+#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/cacheflush.h>
+#include <asm/processor.h>
+#include <asm/cpu.h>
+#include <asm/cpu-features.h>
+
+/* Cache operations. */
+void (*flush_cache_all)(void);
+void (*__flush_cache_all)(void);
+void (*flush_cache_mm)(struct mm_struct *mm);
+void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
+ unsigned long end);
+void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
+void (*flush_icache_range)(unsigned long start, unsigned long end);
+void (*flush_icache_page)(struct vm_area_struct *vma, struct page *page);
+
+/* MIPS specific cache operations */
+void (*flush_cache_sigtramp)(unsigned long addr);
+void (*flush_data_cache_page)(unsigned long addr);
+void (*flush_icache_all)(void);
+
+#ifdef CONFIG_DMA_NONCOHERENT
+
+/* DMA cache operations. */
+void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
+void (*_dma_cache_wback)(unsigned long start, unsigned long size);
+void (*_dma_cache_inv)(unsigned long start, unsigned long size);
+
+EXPORT_SYMBOL(_dma_cache_wback_inv);
+EXPORT_SYMBOL(_dma_cache_wback);
+EXPORT_SYMBOL(_dma_cache_inv);
+
+#endif /* CONFIG_DMA_NONCOHERENT */
asmlinkage int sys_cacheflush(void *addr, int bytes, int cache)
{
@@ -61,3 +94,59 @@ void __update_cache(struct vm_area_struc
}
EXPORT_SYMBOL(flush_dcache_page);
+
+extern void ld_mmu_r23000(void);
+extern void ld_mmu_r4xx0(void);
+extern void ld_mmu_tx39(void);
+extern void ld_mmu_r6000(void);
+extern void ld_mmu_tfp(void);
+extern void ld_mmu_andes(void);
+extern void ld_mmu_sb1(void);
+
+void __init cpu_cache_init(void)
+{
+ if (cpu_has_4ktlb) {
+#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \
+ defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \
+ defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432) || \
+ defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32) || \
+ defined(CONFIG_CPU_MIPS64) || defined(CONFIG_CPU_TX49XX) || \
+ defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000)
+ ld_mmu_r4xx0();
+#endif
+ } else switch (current_cpu_data.cputype) {
+#ifdef CONFIG_CPU_R3000
+ case CPU_R2000:
+ case CPU_R3000:
+ case CPU_R3000A:
+ case CPU_R3081E:
+ ld_mmu_r23000();
+ break;
+#endif
+#ifdef CONFIG_CPU_TX39XX
+ case CPU_TX3912:
+ case CPU_TX3922:
+ case CPU_TX3927:
+ ld_mmu_tx39();
+ break;
+#endif
+#ifdef CONFIG_CPU_R10000
+ case CPU_R10000:
+ case CPU_R12000:
+ ld_mmu_r4xx0();
+ break;
+#endif
+#ifdef CONFIG_CPU_SB1
+ case CPU_SB1:
+ ld_mmu_sb1();
+ break;
+#endif
+
+ case CPU_R8000:
+ panic("R8000 is unsupported");
+ break;
+
+ default:
+ panic("Yeee, unsupported cache architecture.");
+ }
+}
diff -puN arch/mips/mm/cerr-sb1.c~mips-megapatch arch/mips/mm/cerr-sb1.c
--- 25/arch/mips/mm/cerr-sb1.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/cerr-sb1.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2001 Broadcom Corporation
+ * Copyright (C) 2001,2002,2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -15,7 +15,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-
+#include <linux/config.h>
#include <linux/sched.h>
#include <asm/mipsregs.h>
#include <asm/sibyte/sb1250.h>
@@ -25,7 +25,7 @@
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_scd.h>
#endif
-
+
/* SB1 definitions */
/* XXX should come from config1 XXX */
@@ -141,11 +141,11 @@ static void check_bus_watcher(void)
uint32_t status, l2_err, memio_err;
/* Destructive read, clears register and interrupt */
- status = csr_in32(IO_SPACE_BASE | A_SCD_BUS_ERR_STATUS);
+ status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS));
/* Bit 31 is always on, but there's no #define for that */
if (status & ~(1UL << 31)) {
- l2_err = csr_in32(IO_SPACE_BASE | A_BUS_L2_ERRORS);
- memio_err = csr_in32(IO_SPACE_BASE | A_BUS_MEM_IO_ERRORS);
+ l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS));
+ memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS));
prom_printf("Bus watcher error counters: %08x %08x\n", l2_err, memio_err);
prom_printf("\nLast recorded signature:\n");
prom_printf("Request %02x from %d, answered by %d with Dcode %d\n",
@@ -192,7 +192,9 @@ asmlinkage void sb1_cache_error(void)
prom_printf(" c0_cerr_i == %08x", cerr_i);
breakout_cerri(cerr_i);
if (CP0_CERRI_IDX_VALID(cerr_i)) {
- if ((eepc & SB1_CACHE_INDEX_MASK) != (cerr_i & SB1_CACHE_INDEX_MASK))
+ /* Check index of EPC, allowing for delay slot */
+ if (((eepc & SB1_CACHE_INDEX_MASK) != (cerr_i & SB1_CACHE_INDEX_MASK)) &&
+ ((eepc & SB1_CACHE_INDEX_MASK) != ((cerr_i & SB1_CACHE_INDEX_MASK) - 4)))
prom_printf(" cerr_i idx doesn't match eepc\n");
else {
res = extract_ic(cerr_i & SB1_CACHE_INDEX_MASK,
diff -puN arch/mips/mm/cex-sb1.S~mips-megapatch arch/mips/mm/cex-sb1.S
--- 25/arch/mips/mm/cex-sb1.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/cex-sb1.S 2004-02-19 12:53:00.000000000 -0800
@@ -22,40 +22,122 @@
#include <asm/regdef.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
+#include <asm/cacheops.h>
+#include <asm/processor.h>
#include <asm/sibyte/board.h>
- .text
- .set noat
- .set mips4
+#define C0_ERRCTL $26 /* CP0: Error info */
+#define C0_CERR_I $27 /* CP0: Icache error */
+#define C0_CERR_D $27,1 /* CP0: Dcache error */
+
+ /*
+ * Based on SiByte sample software cache-err/cerr.S
+ * CVS revision 1.8. Only the 'unrecoverable' case
+ * is changed.
+ */
__INIT
-
- /* Cache Error handler for SB1 */
- LEAF(except_vec2_sb1)
- mfc0 k1, $26
- # check if error was recoverable
- bltz k1, leave_cerr
-#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
- # look for signature of spurious CErr
- lui k0, 0x4000
- bne k0, k1, 1f
- .word 0x401Bd801 # mfc0 k1, $27, 1
- lui k0, 0xffe0
- and k1, k0, k1
- lui k0, 0x0200
- beq k0, k1, leave_cerr
-1:
-#endif
- j handle_vec2_sb1
-leave_cerr:
- # clear/unlock the registers
- mtc0 zero, $26
- mtc0 zero, $27
- .word 0x4080d801 # mtc0 zero, $27, 1
- .word 0x4080d803 # mtc0 zero, $27, 3
+ .set mips64
+ .set noreorder
+ .set noat
+
+ /*
+ * sb1_cerr_vec: code to be copied to the Cache Error
+ * Exception vector. The code must be pushed out to memory
+ * (either by copying to Kseg0 and Kseg1 both, or by flushing
+ * the L1 and L2) since it is fetched as 0xa0000100.
+ *
+ * NOTE: Be sure this handler is at most 28 instructions long
+ * since the final 16 bytes of the exception vector memory
+ * (0x170-0x17f) are used to preserve k0, k1, and ra.
+ */
+
+LEAF(except_vec2_sb1)
+ /*
+ * If this error is recoverable, we need to exit the handler
+ * without having dirtied any registers. To do this,
+ * save/restore k0 and k1 from low memory (Useg is direct
+ * mapped while ERL=1). Note that we can't save to a
+ * CPU-specific location without ruining a register in the
+ * process. This means we are vulnerable to data corruption
+ * whenever the handler is reentered by a second CPU.
+ */
+ sd k0,0x170($0)
+ sd k1,0x178($0)
+
+ /*
+ * M_ERRCTL_RECOVERABLE is bit 31, which makes it easy to tell
+ * if we can fast-path out of here for a h/w-recovered error.
+ */
+ mfc0 k1,C0_ERRCTL
+ bgtz k1,attempt_recovery
+ sll k0,k1,1
+
+recovered_dcache:
+ /*
+ * Unlock CacheErr-D (which in turn unlocks CacheErr-DPA).
+ * Ought to log the occurence of this recovered dcache error.
+ */
+ b recovered
+ mtc0 $0,C0_CERR_D
+
+attempt_recovery:
+ /*
+ * k0 has C0_ERRCTL << 1, which puts 'DC' at bit 31. Any
+ * Dcache errors we can recover from will take more extensive
+ * processing. For now, they are considered "unrecoverable".
+ * Note that 'DC' becoming set (outside of ERL mode) will
+ * cause 'IC' to clear; so if there's an Icache error, we'll
+ * only find out about it if we recover from this error and
+ * continue executing.
+ */
+ bltz k0,unrecoverable
+ sll k0,1
+
+ /*
+ * k0 has C0_ERRCTL << 2, which puts 'IC' at bit 31. If an
+ * Icache error isn't indicated, I'm not sure why we got here.
+ * Consider that case "unrecoverable" for now.
+ */
+ bgez k0,unrecoverable
+
+attempt_icache_recovery:
+ /*
+ * External icache errors are due to uncorrectable ECC errors
+ * in the L2 cache or Memory Controller and cannot be
+ * recovered here.
+ */
+ mfc0 k0,C0_CERR_I /* delay slot */
+ li k1,1 << 26 /* ICACHE_EXTERNAL */
+ and k1,k0
+ bnez k1,unrecoverable
+ andi k0,0x1fe0
+
+ /*
+ * Since the error is internal, the 'IDX' field from
+ * CacheErr-I is valid and we can just invalidate all blocks
+ * in that set.
+ */
+ cache Index_Invalidate_I,(0<<13)(k0)
+ cache Index_Invalidate_I,(1<<13)(k0)
+ cache Index_Invalidate_I,(2<<13)(k0)
+ cache Index_Invalidate_I,(3<<13)(k0)
+
+ /* Ought to log this recovered icache error */
+
+recovered:
+ /* Restore the saved registers */
+ ld k0,0x170($0)
+ ld k1,0x178($0)
eret
- END(except_vec2_sb1)
+
+unrecoverable:
+ /* Unrecoverable Icache or Dcache error; log it and/or fail */
+ j handle_vec2_sb1
+ nop
+
+END(except_vec2_sb1)
__FINIT
@@ -75,7 +157,16 @@ leave_cerr:
mfc0 k0, CP0_STATUS
sll k0, k0, 3 # check CU0 (kernel?)
bltz k0, 2f
+ nop
+
+ /* Get a valid Kseg0 stack pointer. Any task's stack pointer
+ * will do, although if we ever want to resume execution we
+ * better not have corrupted any state. */
get_saved_sp
-2: j sb1_cache_error
+ move sp, k1
+
+2:
+ j sb1_cache_error
+ nop
END(handle_vec2_sb1)
diff -puN arch/mips/mm/c-r3k.c~mips-megapatch arch/mips/mm/c-r3k.c
--- 25/arch/mips/mm/c-r3k.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/c-r3k.c 2004-02-19 12:53:00.000000000 -0800
@@ -23,9 +23,6 @@
#include <asm/bootinfo.h>
#include <asm/cpu.h>
-void r3k_clear_page(void * page);
-void r3k_copy_page(void * to, void * from);
-
static unsigned long icache_size, dcache_size; /* Size in bytes */
static unsigned long icache_lsize, dcache_lsize; /* Size in bytes */
@@ -244,6 +241,7 @@ static inline void r3k_flush_cache_all(v
static inline void r3k___flush_cache_all(void)
{
+ r3k_flush_dcache_range(KSEG0, KSEG0 + dcache_size);
r3k_flush_icache_range(KSEG0, KSEG0 + icache_size);
}
@@ -319,8 +317,8 @@ static void r3k_dma_cache_wback_inv(unsi
void __init ld_mmu_r23000(void)
{
- _clear_page = r3k_clear_page;
- _copy_page = r3k_copy_page;
+ extern void build_clear_page(void);
+ extern void build_copy_page(void);
r3k_probe_cache();
@@ -341,4 +339,7 @@ void __init ld_mmu_r23000(void)
icache_size >> 10, icache_lsize);
printk("Primary data cache %ldkB, linesize %ld bytes.\n",
dcache_size >> 10, dcache_lsize);
+
+ build_clear_page();
+ build_copy_page();
}
diff -puN arch/mips/mm/c-r4k.c~mips-megapatch arch/mips/mm/c-r4k.c
--- 25/arch/mips/mm/c-r4k.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/c-r4k.c 2004-02-19 12:53:00.000000000 -0800
@@ -18,6 +18,7 @@
#include <asm/bootinfo.h>
#include <asm/cacheops.h>
#include <asm/cpu.h>
+#include <asm/cpu-features.h>
#include <asm/io.h>
#include <asm/page.h>
#include <asm/pgtable.h>
@@ -28,27 +29,6 @@
static unsigned long icache_size, dcache_size, scache_size;
-extern void andes_clear_page(void * page);
-extern void r4k_clear_page32_d16(void * page);
-extern void r4k_clear_page32_d32(void * page);
-extern void r4k_clear_page_d16(void * page);
-extern void r4k_clear_page_d32(void * page);
-extern void r4k_clear_page_r4600_v1(void * page);
-extern void r4k_clear_page_r4600_v2(void * page);
-extern void r4k_clear_page_s16(void * page);
-extern void r4k_clear_page_s32(void * page);
-extern void r4k_clear_page_s64(void * page);
-extern void r4k_clear_page_s128(void * page);
-extern void andes_copy_page(void * to, void * from);
-extern void r4k_copy_page_d16(void * to, void * from);
-extern void r4k_copy_page_d32(void * to, void * from);
-extern void r4k_copy_page_r4600_v1(void * to, void * from);
-extern void r4k_copy_page_r4600_v2(void * to, void * from);
-extern void r4k_copy_page_s16(void * to, void * from);
-extern void r4k_copy_page_s32(void * to, void * from);
-extern void r4k_copy_page_s64(void * to, void * from);
-extern void r4k_copy_page_s128(void * to, void * from);
-
/*
* Dummy cache handling routines for machines without boardcaches
*/
@@ -63,247 +43,215 @@ static struct bcache_ops no_sc_ops = {
struct bcache_ops *bcops = &no_sc_ops;
+#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x2010)
+#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x2020)
+
#define R4600_HIT_CACHEOP_WAR_IMPL \
do { \
- if (R4600_V2_HIT_CACHEOP_WAR && \
- (read_c0_prid() & 0xfff0) == 0x2020) { /* R4600 V2.0 */\
+ if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) \
*(volatile unsigned long *)KSEG1; \
- } \
if (R4600_V1_HIT_CACHEOP_WAR) \
__asm__ __volatile__("nop;nop;nop;nop"); \
} while (0)
-static void r4k_blast_dcache_page(unsigned long addr)
-{
- static void *l = &&init;
- unsigned long dc_lsize;
-
- goto *l;
+static void (*r4k_blast_dcache_page)(unsigned long addr);
-dc_16:
- blast_dcache16_page(addr);
- return;
-
-dc_32:
+static inline void r4k_blast_dcache_page_dc32(unsigned long addr)
+{
R4600_HIT_CACHEOP_WAR_IMPL;
blast_dcache32_page(addr);
- return;
+}
-init:
- dc_lsize = current_cpu_data.dcache.linesz;
+static inline void r4k_blast_dcache_page_setup(void)
+{
+ unsigned long dc_lsize = cpu_dcache_line_size();
if (dc_lsize == 16)
- l = &&dc_16;
+ r4k_blast_dcache_page = blast_dcache16_page;
else if (dc_lsize == 32)
- l = &&dc_32;
- goto *l;
+ r4k_blast_dcache_page = r4k_blast_dcache_page_dc32;
}
-static void r4k_blast_dcache_page_indexed(unsigned long addr)
-{
- static void *l = &&init;
- unsigned long dc_lsize;
-
- goto *l;
-
-dc_16:
- blast_dcache16_page_indexed(addr);
- return;
-
-dc_32:
- blast_dcache32_page_indexed(addr);
- return;
+static void (* r4k_blast_dcache_page_indexed)(unsigned long addr);
-init:
- dc_lsize = current_cpu_data.dcache.linesz;
+static inline void r4k_blast_dcache_page_indexed_setup(void)
+{
+ unsigned long dc_lsize = cpu_dcache_line_size();
if (dc_lsize == 16)
- l = &&dc_16;
+ r4k_blast_dcache_page_indexed = blast_dcache16_page_indexed;
else if (dc_lsize == 32)
- l = &&dc_32;
- goto *l;
+ r4k_blast_dcache_page_indexed = blast_dcache32_page_indexed;
}
-static void r4k_blast_dcache(void)
-{
- static void *l = &&init;
- unsigned long dc_lsize;
-
- goto *l;
+static void (* r4k_blast_dcache)(void);
-dc_16:
- blast_dcache16();
- return;
-
-dc_32:
- blast_dcache32();
- return;
-
-init:
- dc_lsize = current_cpu_data.dcache.linesz;
+static void r4k_blast_dcache_setup(void)
+{
+ unsigned long dc_lsize = cpu_dcache_line_size();
if (dc_lsize == 16)
- l = &&dc_16;
+ r4k_blast_dcache = blast_dcache16;
else if (dc_lsize == 32)
- l = &&dc_32;
- goto *l;
+ r4k_blast_dcache = blast_dcache32;
}
-static void r4k_blast_icache_page(unsigned long addr)
-{
- unsigned long ic_lsize = current_cpu_data.icache.linesz;
- static void *l = &&init;
-
- goto *l;
+/* force code alignment (used for TX49XX_ICACHE_INDEX_INV_WAR) */
+#define JUMP_TO_ALIGN(order) \
+ __asm__ __volatile__( \
+ "b\t1f\n\t" \
+ ".align\t" #order "\n\t" \
+ "1:\n\t" \
+ )
+#define CACHE32_UNROLL32_ALIGN JUMP_TO_ALIGN(10) /* 32 * 32 = 1024 */
+#define CACHE32_UNROLL32_ALIGN2 JUMP_TO_ALIGN(11)
-ic_16:
- blast_icache16_page(addr);
- return;
-
-ic_32:
- blast_icache32_page(addr);
- return;
+static inline void blast_r4600_v1_icache32(void)
+{
+ unsigned long flags;
-ic_64:
- blast_icache64_page(addr);
- return;
+ local_irq_save(flags);
+ blast_icache32();
+ local_irq_restore(flags);
+}
-init:
- if (ic_lsize == 16)
- l = &&ic_16;
- else if (ic_lsize == 32)
- l = &&ic_32;
- else if (ic_lsize == 64)
- l = &&ic_64;
- goto *l;
+static inline void tx49_blast_icache32(void)
+{
+ unsigned long start = INDEX_BASE;
+ unsigned long end = start + current_cpu_data.icache.waysize;
+ unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
+ unsigned long ws_end = current_cpu_data.icache.ways <<
+ current_cpu_data.icache.waybit;
+ unsigned long ws, addr;
+
+ CACHE32_UNROLL32_ALIGN2;
+ /* I'm in even chunk. blast odd chunks */
+ for (ws = 0; ws < ws_end; ws += ws_inc)
+ for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
+ cache32_unroll32(addr|ws,Index_Invalidate_I);
+ CACHE32_UNROLL32_ALIGN;
+ /* I'm in odd chunk. blast even chunks */
+ for (ws = 0; ws < ws_end; ws += ws_inc)
+ for (addr = start; addr < end; addr += 0x400 * 2)
+ cache32_unroll32(addr|ws,Index_Invalidate_I);
}
-static void r4k_blast_icache_page_indexed(unsigned long addr)
+static inline void blast_icache32_r4600_v1_page_indexed(unsigned long page)
{
- unsigned long ic_lsize = current_cpu_data.icache.linesz;
- static void *l = &&init;
+ unsigned long flags;
- goto *l;
+ local_irq_save(flags);
+ blast_icache32_page_indexed(page);
+ local_irq_restore(flags);
+}
-ic_16:
- blast_icache16_page_indexed(addr);
- return;
+static inline void tx49_blast_icache32_page_indexed(unsigned long page)
+{
+ unsigned long start = page;
+ unsigned long end = start + PAGE_SIZE;
+ unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
+ unsigned long ws_end = current_cpu_data.icache.ways <<
+ current_cpu_data.icache.waybit;
+ unsigned long ws, addr;
+
+ CACHE32_UNROLL32_ALIGN2;
+ /* I'm in even chunk. blast odd chunks */
+ for (ws = 0; ws < ws_end; ws += ws_inc)
+ for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
+ cache32_unroll32(addr|ws,Index_Invalidate_I);
+ CACHE32_UNROLL32_ALIGN;
+ /* I'm in odd chunk. blast even chunks */
+ for (ws = 0; ws < ws_end; ws += ws_inc)
+ for (addr = start; addr < end; addr += 0x400 * 2)
+ cache32_unroll32(addr|ws,Index_Invalidate_I);
+}
-ic_32:
- blast_icache32_page_indexed(addr);
- return;
+static void (* r4k_blast_icache_page)(unsigned long addr);
-ic_64:
- blast_icache64_page_indexed(addr);
- return;
+static inline void r4k_blast_icache_page_setup(void)
+{
+ unsigned long ic_lsize = cpu_icache_line_size();
-init:
if (ic_lsize == 16)
- l = &&ic_16;
+ r4k_blast_icache_page = blast_icache16_page;
else if (ic_lsize == 32)
- l = &&ic_32;
+ r4k_blast_icache_page = blast_icache32_page;
else if (ic_lsize == 64)
- l = &&ic_64;
- goto *l;
+ r4k_blast_icache_page = blast_icache64_page;
}
-static void r4k_blast_icache(void)
-{
- unsigned long ic_lsize = current_cpu_data.icache.linesz;
- static void *l = &&init;
- goto *l;
+static void (* r4k_blast_icache_page_indexed)(unsigned long addr);
-ic_16:
- blast_icache16();
- return;
-
-ic_32:
- blast_icache32();
- return;
-
-ic_64:
- blast_icache64();
- return;
+static inline void r4k_blast_icache_page_indexed_setup(void)
+{
+ unsigned long ic_lsize = cpu_icache_line_size();
-init:
if (ic_lsize == 16)
- l = &&ic_16;
- else if (ic_lsize == 32)
- l = &&ic_32;
- else if (ic_lsize == 64)
- l = &&ic_64;
- goto *l;
+ r4k_blast_icache_page_indexed = blast_icache16_page_indexed;
+ else if (ic_lsize == 32) {
+ if (TX49XX_ICACHE_INDEX_INV_WAR)
+ r4k_blast_icache_page_indexed =
+ tx49_blast_icache32_page_indexed;
+ else if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x())
+ r4k_blast_icache_page_indexed =
+ blast_icache32_r4600_v1_page_indexed;
+ else
+ r4k_blast_icache_page_indexed =
+ blast_icache32_page_indexed;
+ } else if (ic_lsize == 64)
+ r4k_blast_icache_page_indexed = blast_icache64_page_indexed;
}
-static void r4k_blast_scache_page(unsigned long addr)
-{
- unsigned long sc_lsize = current_cpu_data.scache.linesz;
- static void *l = &&init;
-
- goto *l;
+static void (* r4k_blast_icache)(void);
-sc_16:
- blast_scache16_page(addr);
- return;
+static inline void r4k_blast_icache_setup(void)
+{
+ unsigned long ic_lsize = cpu_icache_line_size();
-sc_32:
- blast_scache32_page(addr);
- return;
+ if (ic_lsize == 16)
+ r4k_blast_icache = blast_icache16;
+ else if (ic_lsize == 32) {
+ if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x())
+ r4k_blast_icache = blast_r4600_v1_icache32;
+ else if (TX49XX_ICACHE_INDEX_INV_WAR)
+ r4k_blast_icache = tx49_blast_icache32;
+ else
+ r4k_blast_icache = blast_icache32;
+ } else if (ic_lsize == 64)
+ r4k_blast_icache = blast_icache64;
+}
-sc_64:
- blast_scache64_page(addr);
- return;
+static void (* r4k_blast_scache_page)(unsigned long addr);
-sc_128:
- blast_scache128_page(addr);
- return;
+static inline void r4k_blast_scache_page_setup(void)
+{
+ unsigned long sc_lsize = cpu_scache_line_size();
-init:
if (sc_lsize == 16)
- l = &&sc_16;
+ r4k_blast_scache_page = blast_scache16_page;
else if (sc_lsize == 32)
- l = &&sc_32;
+ r4k_blast_scache_page = blast_scache32_page;
else if (sc_lsize == 64)
- l = &&sc_64;
+ r4k_blast_scache_page = blast_scache64_page;
else if (sc_lsize == 128)
- l = &&sc_128;
- goto *l;
+ r4k_blast_scache_page = blast_scache128_page;
}
-static void r4k_blast_scache(void)
-{
- unsigned long sc_lsize = current_cpu_data.scache.linesz;
- static void *l = &&init;
-
- goto *l;
-
-sc_16:
- blast_scache16();
- return;
-
-sc_32:
- blast_scache32();
- return;
-
-sc_64:
- blast_scache64();
- return;
+static void (* r4k_blast_scache)(void);
-sc_128:
- blast_scache128();
- return;
+static inline void r4k_blast_scache_setup(void)
+{
+ unsigned long sc_lsize = cpu_scache_line_size();
-init:
if (sc_lsize == 16)
- l = &&sc_16;
+ r4k_blast_scache = blast_scache16;
else if (sc_lsize == 32)
- l = &&sc_32;
+ r4k_blast_scache = blast_scache32;
else if (sc_lsize == 64)
- l = &&sc_64;
+ r4k_blast_scache = blast_scache64;
else if (sc_lsize == 128)
- l = &&sc_128;
- goto *l;
+ r4k_blast_scache = blast_scache128;
}
static void r4k_flush_cache_all(void)
@@ -334,11 +282,16 @@ static void r4k___flush_cache_all(void)
static void r4k_flush_cache_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end)
{
- if (cpu_context(smp_processor_id(), vma->vm_mm) != 0) {
+ int exec;
+
+ if (!(cpu_context(smp_processor_id(), vma->vm_mm)))
+ return;
+
+ exec = vma->vm_flags & VM_EXEC;
+ if (cpu_has_dc_aliases || exec)
r4k_blast_dcache();
- if (vma->vm_flags & VM_EXEC)
- r4k_blast_icache();
- }
+ if (exec)
+ r4k_blast_icache();
}
static void r4k_flush_cache_mm(struct mm_struct *mm)
@@ -410,7 +363,7 @@ static void r4k_flush_cache_page(struct
* Do indexed flush, too much work to get the (possible) TLB refills
* to work correctly.
*/
- page = (KSEG0 + (page & (dcache_size - 1)));
+ page = INDEX_BASE + (page & (dcache_size - 1));
if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc))
r4k_blast_dcache_page_indexed(page);
if (exec) {
@@ -493,7 +446,9 @@ static void r4k_flush_icache_page(struct
*/
if (cpu_has_subset_pcaches) {
unsigned long addr = (unsigned long) page_address(page);
+
r4k_blast_scache_page(addr);
+ ClearPageDcacheDirty(page);
return;
}
@@ -501,6 +456,7 @@ static void r4k_flush_icache_page(struct
if (!cpu_has_ic_fills_f_dc) {
unsigned long addr = (unsigned long) page_address(page);
r4k_blast_dcache_page(addr);
+ ClearPageDcacheDirty(page);
}
/*
@@ -516,7 +472,7 @@ static void r4k_flush_icache_page(struct
r4k_blast_icache();
}
-#ifdef CONFIG_NONCOHERENT_IO
+#ifdef CONFIG_DMA_NONCOHERENT
static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
{
@@ -606,7 +562,7 @@ static void r4k_dma_cache_inv(unsigned l
bc_inv(addr, size);
}
-#endif /* CONFIG_NONCOHERENT_IO */
+#endif /* CONFIG_DMA_NONCOHERENT */
/*
* While we're protected against bad userland addresses we don't care
@@ -621,6 +577,26 @@ static void r4k_flush_cache_sigtramp(uns
R4600_HIT_CACHEOP_WAR_IMPL;
protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
protected_flush_icache_line(addr & ~(ic_lsize - 1));
+ if (MIPS4K_ICACHE_REFILL_WAR) {
+ __asm__ __volatile__ (
+ ".set push\n\t"
+ ".set noat\n\t"
+ ".set mips3\n\t"
+#if CONFIG_MIPS32
+ "la $at,1f\n\t"
+#endif
+#if CONFIG_MIPS64
+ "dla $at,1f\n\t"
+#endif
+ "cache %0,($at)\n\t"
+ "nop; nop; nop\n"
+ "1:\n\t"
+ ".set pop"
+ :
+ : "i" (Hit_Invalidate_I));
+ }
+ if (MIPS_CACHE_SYNC_WAR)
+ __asm__ __volatile__ ("sync");
}
static void r4k_flush_icache_all(void)
@@ -638,7 +614,7 @@ static inline void rm7k_erratum31(void)
write_c0_taglo(0);
write_c0_taghi(0);
- for (addr = KSEG0; addr <= KSEG0 + 4096; addr += ic_lsize) {
+ for (addr = INDEX_BASE; addr <= INDEX_BASE + 4096; addr += ic_lsize) {
__asm__ __volatile__ (
".set noreorder\n\t"
".set mips3\n\t"
@@ -687,6 +663,8 @@ static void __init probe_pcache(void)
c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
c->dcache.ways = 2;
c->dcache.waybit= ffs(dcache_size/2) - 1;
+
+ c->options |= MIPS_CPU_CACHE_CDEX_P;
break;
case CPU_R5432:
@@ -700,6 +678,8 @@ static void __init probe_pcache(void)
c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
c->dcache.ways = 2;
c->dcache.waybit = 0;
+
+ c->options |= MIPS_CPU_CACHE_CDEX_P;
break;
case CPU_TX49XX:
@@ -712,6 +692,8 @@ static void __init probe_pcache(void)
c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
c->dcache.ways = 4;
c->dcache.waybit = 0;
+
+ c->options |= MIPS_CPU_CACHE_CDEX_P;
break;
case CPU_R4000PC:
@@ -730,6 +712,8 @@ static void __init probe_pcache(void)
c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
c->dcache.ways = 1;
c->dcache.waybit = 0; /* does not matter */
+
+ c->options |= MIPS_CPU_CACHE_CDEX_P;
break;
case CPU_R10000:
@@ -743,9 +727,20 @@ static void __init probe_pcache(void)
c->dcache.linesz = 32;
c->dcache.ways = 2;
c->dcache.waybit = 0;
+
+ c->options |= MIPS_CPU_PREFETCH;
break;
+ case CPU_VR4133:
+ write_c0_config(config & ~CONF_EB);
case CPU_VR4131:
+ /* Workaround for cache instruction bug of VR4131 */
+ if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U ||
+ c->processor_id == 0x0c82U) {
+ config &= ~0x00000030U;
+ config |= 0x00410000U;
+ write_c0_config(config);
+ }
icache_size = 1 << (10 + ((config & CONF_IC) >> 9));
c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
c->icache.ways = 2;
@@ -755,6 +750,8 @@ static void __init probe_pcache(void)
c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
c->dcache.ways = 2;
c->dcache.waybit = ffs(dcache_size/2) - 1;
+
+ c->options |= MIPS_CPU_CACHE_CDEX_P;
break;
case CPU_VR41XX:
@@ -772,11 +769,14 @@ static void __init probe_pcache(void)
c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
c->dcache.ways = 1;
c->dcache.waybit = 0; /* does not matter */
+
+ c->options |= MIPS_CPU_CACHE_CDEX_P;
break;
case CPU_RM7000:
rm7k_erratum31();
+ case CPU_RM9000:
icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
c->icache.ways = 4;
@@ -786,6 +786,8 @@ static void __init probe_pcache(void)
c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
c->dcache.ways = 4;
c->dcache.waybit = ffs(dcache_size / c->dcache.ways) - 1;
+
+ c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
break;
default:
@@ -810,6 +812,9 @@ static void __init probe_pcache(void)
c->icache.linesz;
c->icache.waybit = ffs(icache_size/c->icache.ways) - 1;
+ if (config & 0x8) /* VI bit */
+ c->icache.flags |= MIPS_CACHE_VTAG;
+
/*
* Now probe the MIPS32 / MIPS64 data cache.
*/
@@ -826,6 +831,8 @@ static void __init probe_pcache(void)
c->dcache.ways *
c->dcache.linesz;
c->dcache.waybit = ffs(dcache_size/c->dcache.ways) - 1;
+
+ c->options |= MIPS_CPU_PREFETCH;
break;
}
@@ -859,9 +866,6 @@ static void __init probe_pcache(void)
if (c->dcache.waysize > PAGE_SIZE)
c->dcache.flags |= MIPS_CACHE_ALIASES;
- if (config & 0x8) /* VI bit */
- c->icache.flags |= MIPS_CACHE_VTAG;
-
switch (c->cputype) {
case CPU_20KC:
/*
@@ -949,71 +953,6 @@ static int __init probe_scache(void)
return 1;
}
-static void __init setup_noscache_funcs(void)
-{
- unsigned int prid;
-
- switch (current_cpu_data.dcache.linesz) {
- case 16:
- if (cpu_has_64bits)
- _clear_page = r4k_clear_page_d16;
- else
- _clear_page = r4k_clear_page32_d16;
- _copy_page = r4k_copy_page_d16;
-
- break;
- case 32:
- prid = read_c0_prid() & 0xfff0;
- if (prid == 0x2010) { /* R4600 V1.7 */
- _clear_page = r4k_clear_page_r4600_v1;
- _copy_page = r4k_copy_page_r4600_v1;
- } else if (prid == 0x2020) { /* R4600 V2.0 */
- _clear_page = r4k_clear_page_r4600_v2;
- _copy_page = r4k_copy_page_r4600_v2;
- } else {
- if (cpu_has_64bits)
- _clear_page = r4k_clear_page_d32;
- else
- _clear_page = r4k_clear_page32_d32;
- _copy_page = r4k_copy_page_d32;
- }
- break;
- }
-}
-
-static void __init setup_scache_funcs(void)
-{
- struct cpuinfo_mips *c = ¤t_cpu_data;
-
- if (c->dcache.linesz > c->scache.linesz)
- panic("Invalid primary cache configuration detected");
-
- if (c->cputype == CPU_R10000 || c->cputype == CPU_R12000) {
- _clear_page = andes_clear_page;
- _copy_page = andes_copy_page;
- return;
- }
-
- switch (c->scache.linesz) {
- case 16:
- _clear_page = r4k_clear_page_s16;
- _copy_page = r4k_copy_page_s16;
- break;
- case 32:
- _clear_page = r4k_clear_page_s32;
- _copy_page = r4k_copy_page_s32;
- break;
- case 64:
- _clear_page = r4k_clear_page_s64;
- _copy_page = r4k_copy_page_s64;
- break;
- case 128:
- _clear_page = r4k_clear_page_s128;
- _copy_page = r4k_copy_page_s128;
- break;
- }
-}
-
typedef int (*probe_func_t)(unsigned long);
extern int r5k_sc_init(void);
extern int rm7k_sc_init(void);
@@ -1031,14 +970,14 @@ static void __init setup_scache(void)
* Linux memory managment.
*/
switch (c->cputype) {
- case CPU_R4000PC:
case CPU_R4000SC:
case CPU_R4000MC:
- case CPU_R4400PC:
case CPU_R4400SC:
case CPU_R4400MC:
probe_scache_kseg1 = (probe_func_t) (KSEG1ADDR(&probe_scache));
sc_present = probe_scache_kseg1(config);
+ if (sc_present)
+ c->options |= MIPS_CPU_CACHE_CDEX_S;
break;
case CPU_R10000:
@@ -1052,14 +991,13 @@ static void __init setup_scache(void)
case CPU_R5000:
case CPU_NEVADA:
- setup_noscache_funcs();
#ifdef CONFIG_R5000_CPU_SCACHE
r5k_sc_init();
#endif
return;
case CPU_RM7000:
- setup_noscache_funcs();
+ case CPU_RM9000:
#ifdef CONFIG_RM7000_CPU_SCACHE
rm7k_sc_init();
#endif
@@ -1069,10 +1007,8 @@ static void __init setup_scache(void)
sc_present = 0;
}
- if (!sc_present) {
- setup_noscache_funcs();
+ if (!sc_present)
return;
- }
if ((c->isa_level == MIPS_CPU_ISA_M32 ||
c->isa_level == MIPS_CPU_ISA_M64) &&
@@ -1088,7 +1024,6 @@ static void __init setup_scache(void)
scache_size >> 10, way_string[c->scache.ways], c->scache.linesz);
c->options |= MIPS_CPU_SUBSET_CACHES;
- setup_scache_funcs();
}
static inline void coherency_setup(void)
@@ -1112,29 +1047,38 @@ static inline void coherency_setup(void)
clear_c0_config(CONF_CU);
break;
}
-
}
void __init ld_mmu_r4xx0(void)
{
+ extern void build_clear_page(void);
+ extern void build_copy_page(void);
extern char except_vec2_generic;
struct cpuinfo_mips *c = ¤t_cpu_data;
/* Default cache error handler for R4000 and R5000 family */
- memcpy((void *)(KSEG0 + 0x100), &except_vec2_generic, 0x80);
- memcpy((void *)(KSEG1 + 0x100), &except_vec2_generic, 0x80);
+ memcpy((void *)(CAC_BASE + 0x100), &except_vec2_generic, 0x80);
+ memcpy((void *)(UNCAC_BASE + 0x100), &except_vec2_generic, 0x80);
probe_pcache();
setup_scache();
- coherency_setup();
if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
c->dcache.flags |= MIPS_CACHE_ALIASES;
+ r4k_blast_dcache_page_setup();
+ r4k_blast_dcache_page_indexed_setup();
+ r4k_blast_dcache_setup();
+ r4k_blast_icache_page_setup();
+ r4k_blast_icache_page_indexed_setup();
+ r4k_blast_icache_setup();
+ r4k_blast_scache_page_setup();
+ r4k_blast_scache_setup();
+
/*
* Some MIPS32 and MIPS64 processors have physically indexed caches.
* This code supports virtually indexed processors and will be
- * unnecessarily unefficient on physically indexed processors.
+ * unnecessarily inefficient on physically indexed processors.
*/
shm_align_mask = max_t( unsigned long,
c->dcache.sets * c->dcache.linesz - 1,
@@ -1152,11 +1096,15 @@ void __init ld_mmu_r4xx0(void)
flush_data_cache_page = r4k_flush_data_cache_page;
flush_icache_range = r4k_flush_icache_range;
-#ifdef CONFIG_NONCOHERENT_IO
+#ifdef CONFIG_DMA_NONCOHERENT
_dma_cache_wback_inv = r4k_dma_cache_wback_inv;
_dma_cache_wback = r4k_dma_cache_wback_inv;
_dma_cache_inv = r4k_dma_cache_inv;
#endif
__flush_cache_all();
+ coherency_setup();
+
+ build_clear_page();
+ build_copy_page();
}
diff -puN arch/mips/mm/c-sb1.c~mips-megapatch arch/mips/mm/c-sb1.c
--- 25/arch/mips/mm/c-sb1.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/c-sb1.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,7 +1,7 @@
/*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
* Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 2000, 2001 Broadcom Corporation
+ * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -25,14 +25,7 @@
#include <asm/cpu.h>
#include <asm/uaccess.h>
-#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
extern void sb1_dma_init(void);
-extern void sb1_clear_page_dma(void * page);
-extern void sb1_copy_page_dma(void * to, void * from);
-#else
-extern void sb1_clear_page(void * page);
-extern void sb1_copy_page(void * to, void * from);
-#endif
/* These are probed at ld_mmu time */
static unsigned long icache_size;
@@ -85,6 +78,11 @@ static unsigned int dcache_range_cutoff;
" sync \n" \
" .set mips0")
+#define mispredict() \
+ __asm__ __volatile__( \
+ " bnezl $0, 1f \n" /* Force mispredict */ \
+ "1: \n");
+
/*
* Writeback and invalidate the entire dcache
*/
@@ -107,14 +105,18 @@ static inline void __sb1_writeback_inv_d
static inline void __sb1_writeback_inv_dcache_range(unsigned long start,
unsigned long end)
{
+ unsigned long index;
+
start &= ~(dcache_line_size - 1);
end = (end + dcache_line_size - 1) & ~(dcache_line_size - 1);
while (start != end) {
- cache_set_op(Index_Writeback_Inv_D, start);
- cache_set_op(Index_Writeback_Inv_D, start ^ (1<<12));
+ index = start & dcache_index_mask;
+ cache_set_op(Index_Writeback_Inv_D, index);
+ cache_set_op(Index_Writeback_Inv_D, index ^ (1<<12));
start += dcache_line_size;
}
+ sync();
}
/*
@@ -194,6 +196,7 @@ static void sb1_flush_cache_page(struct
if (!(vma->vm_flags & VM_EXEC))
return;
+ addr &= PAGE_MASK;
args.vma = vma;
args.addr = addr;
on_each_cpu(sb1_flush_cache_page_ipi, (void *) &args, 1, 1);
@@ -219,11 +222,7 @@ static inline void __sb1_flush_icache_ra
cache_set_op(Index_Invalidate_I, start & icache_index_mask);
start += icache_line_size;
}
-
- __asm__ __volatile__(
- " bnezl $0, 1f \n" /* Force mispredict */
- "1: \n");
-
+ mispredict();
sync();
}
@@ -362,31 +361,10 @@ asm("sb1_flush_icache_page = local_sb1_f
*/
static void local_sb1_flush_cache_sigtramp(unsigned long addr)
{
- __asm__ __volatile__ (
- " .set push \n"
- " .set noreorder \n"
- " .set noat \n"
- " .set mips4 \n"
- " cache %2, (0<<13)(%0) \n" /* Index-inval this address */
- " cache %2, (1<<13)(%0) \n" /* Index-inval this address */
- " cache %2, (2<<13)(%0) \n" /* Index-inval this address */
- " cache %2, (3<<13)(%0) \n" /* Index-inval this address */
- " xori $1, %0, 1<<12 \n" /* Flip index bit 12 */
- " cache %2, (0<<13)($1) \n" /* Index-inval this address */
- " cache %2, (1<<13)($1) \n" /* Index-inval this address */
- " cache %2, (2<<13)($1) \n" /* Index-inval this address */
- " cache %2, (3<<13)($1) \n" /* Index-inval this address */
- " cache %3, (0<<13)(%1) \n" /* Index-inval this address */
- " cache %3, (1<<13)(%1) \n" /* Index-inval this address */
- " cache %3, (2<<13)(%1) \n" /* Index-inval this address */
- " cache %3, (3<<13)(%1) \n" /* Index-inval this address */
- " bnezl $0, 1f \n" /* Force mispredict */
- " nop \n"
- "1: \n"
- " .set pop \n"
- :
- : "r" (addr & dcache_index_mask), "r" (addr & icache_index_mask),
- "i" (Index_Writeback_Inv_D), "i" (Index_Invalidate_I));
+ cache_set_op(Index_Writeback_Inv_D, addr & dcache_index_mask);
+ cache_set_op(Index_Writeback_Inv_D, (addr ^ (1<<12)) & dcache_index_mask);
+ cache_set_op(Index_Invalidate_I, addr & icache_index_mask);
+ mispredict();
}
#ifdef CONFIG_SMP
@@ -504,20 +482,17 @@ static __init void probe_cache_sizes(voi
void ld_mmu_sb1(void)
{
extern char except_vec2_sb1;
+ extern char handle_vec2_sb1;
/* Special cache error handler for SB1 */
- memcpy((void *)(KSEG0 + 0x100), &except_vec2_sb1, 0x80);
- memcpy((void *)(KSEG1 + 0x100), &except_vec2_sb1, 0x80);
+ memcpy((void *)(CAC_BASE + 0x100), &except_vec2_sb1, 0x80);
+ memcpy((void *)(UNCAC_BASE + 0x100), &except_vec2_sb1, 0x80);
+ memcpy((void *)KSEG1ADDR(&handle_vec2_sb1), &handle_vec2_sb1, 0x80);
probe_cache_sizes();
#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
- _clear_page = sb1_clear_page_dma;
- _copy_page = sb1_copy_page_dma;
sb1_dma_init();
-#else
- _clear_page = sb1_clear_page;
- _copy_page = sb1_copy_page;
#endif
/*
@@ -526,7 +501,6 @@ void ld_mmu_sb1(void)
* occur
*/
flush_cache_range = (void *) sb1_nop;
- flush_cache_page = sb1_flush_cache_page;
flush_cache_mm = (void (*)(struct mm_struct *))sb1_nop;
flush_cache_all = sb1_nop;
@@ -535,6 +509,9 @@ void ld_mmu_sb1(void)
flush_icache_page = sb1_flush_icache_page;
flush_icache_all = __sb1_flush_icache_all; /* local only */
+ /* This implies an Icache flush too, so can't be nop'ed */
+ flush_cache_page = sb1_flush_cache_page;
+
flush_cache_sigtramp = sb1_flush_cache_sigtramp;
flush_data_cache_page = (void *) sb1_nop;
@@ -547,13 +524,15 @@ void ld_mmu_sb1(void)
* This is the only way to force the update of K0 to complete
* before subsequent instruction fetch.
*/
- write_c0_epc(&&here);
-here:
__asm__ __volatile__(
+ " .set noat \n"
" .set noreorder \n"
" .set mips3\n\t \n"
+ " la $1, 1f \n"
+ " mtc0 $1, $14 \n"
" eret \n"
- " .set mips0\n\t \n"
+ "1: .set mips0\n\t \n"
+ " .set at \n"
" .set reorder"
:
:
diff -puN arch/mips/mm/c-tx39.c~mips-megapatch arch/mips/mm/c-tx39.c
--- 25/arch/mips/mm/c-tx39.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/c-tx39.c 2004-02-19 12:53:00.000000000 -0800
@@ -28,9 +28,6 @@ static unsigned long icache_size, dcache
#include <asm/r4kcache.h>
-extern void r3k_clear_page(void * page);
-extern void r3k_copy_page(void * to, void * from);
-
extern int r3k_have_wired_reg; /* in r3k-tlb.c */
/* This sequence is required to ensure icache is disabled immediately */
@@ -410,11 +407,10 @@ static __init void tx39_probe_cache(void
void __init ld_mmu_tx39(void)
{
+ extern void build_clear_page(void);
+ extern void build_copy_page(void);
unsigned long config;
- _clear_page = r3k_clear_page;
- _copy_page = r3k_copy_page;
-
config = read_c0_conf();
config &= ~TX39_CONF_WBON;
write_c0_conf(config);
@@ -489,4 +485,7 @@ void __init ld_mmu_tx39(void)
icache_size >> 10, current_cpu_data.icache.linesz);
printk("Primary data cache %ldkb, linesize %d bytes\n",
dcache_size >> 10, current_cpu_data.dcache.linesz);
+
+ build_clear_page();
+ build_copy_page();
}
diff -puN /dev/null arch/mips/mm/dma-coherent.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/mm/dma-coherent.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,215 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
+ * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
+ * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/pci.h>
+
+#include <asm/cache.h>
+#include <asm/io.h>
+
+void *dma_alloc_noncoherent(struct device *dev, size_t size,
+ dma_addr_t * dma_handle, int gfp)
+{
+ void *ret;
+ /* ignore region specifiers */
+ gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
+
+ if (dev == NULL || (*dev->dma_mask < 0xffffffff))
+ gfp |= GFP_DMA;
+ ret = (void *) __get_free_pages(gfp, get_order(size));
+
+ if (ret != NULL) {
+ memset(ret, 0, size);
+ *dma_handle = virt_to_phys(ret);
+ }
+
+ return ret;
+}
+
+EXPORT_SYMBOL(dma_alloc_noncoherent);
+
+void *dma_alloc_coherent(struct device *dev, size_t size,
+ dma_addr_t * dma_handle, int gfp)
+ __attribute__((alias("dma_alloc_noncoherent")));
+
+EXPORT_SYMBOL(dma_alloc_coherent);
+
+void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
+ dma_addr_t dma_handle)
+{
+ unsigned long addr = (unsigned long) vaddr;
+
+ free_pages(addr, get_order(size));
+}
+
+EXPORT_SYMBOL(dma_free_noncoherent);
+
+void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
+ dma_addr_t dma_handle) __attribute__((alias("dma_free_noncoherent")));
+
+EXPORT_SYMBOL(dma_free_coherent);
+
+dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+
+ return __pa(ptr);
+}
+
+EXPORT_SYMBOL(dma_map_single);
+
+void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_unmap_single);
+
+int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+ enum dma_data_direction direction)
+{
+ int i;
+
+ BUG_ON(direction == DMA_NONE);
+
+ for (i = 0; i < nents; i++, sg++) {
+ sg->dma_address = (dma_addr_t)page_to_phys(sg->page) + sg->offset;
+ }
+
+ return nents;
+}
+
+EXPORT_SYMBOL(dma_map_sg);
+
+dma_addr_t dma_map_page(struct device *dev, struct page *page,
+ unsigned long offset, size_t size, enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+
+ return page_to_phys(page) + offset;
+}
+
+EXPORT_SYMBOL(dma_map_page);
+
+void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_unmap_page);
+
+void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_unmap_sg);
+
+void dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_sync_single);
+
+void dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
+ unsigned long offset, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_sync_single_range);
+
+void dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_sync_sg);
+
+int dma_supported(struct device *dev, u64 mask)
+{
+ /*
+ * we fall back to GFP_DMA when the mask isn't all 1s,
+ * so we can't guarantee allocations that must be
+ * within a tighter range than GFP_DMA..
+ */
+ if (mask < 0x00ffffff)
+ return 0;
+
+ return 1;
+}
+
+EXPORT_SYMBOL(dma_supported);
+
+int dma_is_consistent(dma_addr_t dma_addr)
+{
+ return 1;
+}
+
+EXPORT_SYMBOL(dma_is_consistent);
+
+void dma_cache_sync(void *vaddr, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_cache_sync);
+
+/* The DAC routines are a PCIism.. */
+
+#ifdef CONFIG_PCI
+
+#include <linux/pci.h>
+
+dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
+ struct page *page, unsigned long offset, int direction)
+{
+ return (dma64_addr_t)page_to_phys(page) + offset;
+}
+
+EXPORT_SYMBOL(pci_dac_page_to_dma);
+
+struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
+ dma64_addr_t dma_addr)
+{
+ return mem_map + (dma_addr >> PAGE_SHIFT);
+}
+
+EXPORT_SYMBOL(pci_dac_dma_to_page);
+
+unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
+ dma64_addr_t dma_addr)
+{
+ return dma_addr & ~PAGE_MASK;
+}
+
+EXPORT_SYMBOL(pci_dac_dma_to_offset);
+
+void pci_dac_dma_sync_single(struct pci_dev *pdev,
+ dma64_addr_t dma_addr, size_t len, int direction)
+{
+ BUG_ON(direction == PCI_DMA_NONE);
+}
+
+EXPORT_SYMBOL(pci_dac_dma_sync_single);
+
+#endif /* CONFIG_PCI */
diff -puN /dev/null arch/mips/mm/dma-ip27.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/mm/dma-ip27.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,217 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
+ * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
+ * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
+ */
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/pci.h>
+
+#include <asm/cache.h>
+#include <asm/pci/bridge.h>
+
+#define pdev_to_baddr(pdev, addr) \
+ (BRIDGE_CONTROLLER(pdev->bus)->baddr + (addr))
+#define dev_to_baddr(dev, addr) \
+ pdev_to_baddr(to_pci_dev(dev), (addr))
+
+void *dma_alloc_noncoherent(struct device *dev, size_t size,
+ dma_addr_t * dma_handle, int gfp)
+{
+ void *ret;
+
+ /* ignore region specifiers */
+ gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
+
+ if (dev == NULL || (*dev->dma_mask < 0xffffffff))
+ gfp |= GFP_DMA;
+ ret = (void *) __get_free_pages(gfp, get_order(size));
+
+ if (ret != NULL) {
+ memset(ret, 0, size);
+ *dma_handle = dev_to_baddr(dev, virt_to_phys(ret));
+ }
+
+ return ret;
+}
+
+EXPORT_SYMBOL(dma_alloc_noncoherent);
+
+void *dma_alloc_coherent(struct device *dev, size_t size,
+ dma_addr_t * dma_handle, int gfp)
+ __attribute__((alias("dma_alloc_noncoherent")));
+
+EXPORT_SYMBOL(dma_alloc_coherent);
+
+void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
+ dma_addr_t dma_handle)
+{
+ unsigned long addr = (unsigned long) vaddr;
+
+ free_pages(addr, get_order(size));
+}
+
+EXPORT_SYMBOL(dma_free_noncoherent);
+
+void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
+ dma_addr_t dma_handle) __attribute__((alias("dma_free_noncoherent")));
+
+EXPORT_SYMBOL(dma_free_coherent);
+
+dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+
+ return dev_to_baddr(dev, __pa(ptr));
+}
+
+EXPORT_SYMBOL(dma_map_single);
+
+void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_unmap_single);
+
+int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+ enum dma_data_direction direction)
+{
+ int i;
+
+ BUG_ON(direction == DMA_NONE);
+
+ for (i = 0; i < nents; i++, sg++) {
+ sg->dma_address = (dma_addr_t) dev_to_baddr(dev,
+ page_to_phys(sg->page) + sg->offset);
+ }
+
+ return nents;
+}
+
+EXPORT_SYMBOL(dma_map_sg);
+
+dma_addr_t dma_map_page(struct device *dev, struct page *page,
+ unsigned long offset, size_t size, enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+
+ return dev_to_baddr(dev, page_to_phys(page) + offset);
+}
+
+EXPORT_SYMBOL(dma_map_page);
+
+void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_unmap_page);
+
+void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_unmap_sg);
+
+void dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_sync_single);
+
+void dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
+ unsigned long offset, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_sync_single_range);
+
+void dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_sync_sg);
+
+int dma_supported(struct device *dev, u64 mask)
+{
+ /*
+ * we fall back to GFP_DMA when the mask isn't all 1s,
+ * so we can't guarantee allocations that must be
+ * within a tighter range than GFP_DMA..
+ */
+ if (mask < 0x00ffffff)
+ return 0;
+
+ return 1;
+}
+
+EXPORT_SYMBOL(dma_supported);
+
+int dma_is_consistent(dma_addr_t dma_addr)
+{
+ return 1;
+}
+
+EXPORT_SYMBOL(dma_is_consistent);
+
+void dma_cache_sync(void *vaddr, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+}
+
+EXPORT_SYMBOL(dma_cache_sync);
+
+dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
+ struct page *page, unsigned long offset, int direction)
+{
+ dma64_addr_t addr = page_to_phys(page) + offset;
+
+ return (dma64_addr_t) pdev_to_baddr(pdev, addr);
+}
+
+EXPORT_SYMBOL(dma_cache_sync);
+
+struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
+ dma64_addr_t dma_addr)
+{
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(pdev->bus);
+
+ return pfn_to_page((dma_addr - bc->baddr) >> PAGE_SHIFT);
+}
+
+EXPORT_SYMBOL(pci_dac_dma_to_page);
+
+unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
+ dma64_addr_t dma_addr)
+{
+ return dma_addr & ~PAGE_MASK;
+}
+
+EXPORT_SYMBOL(pci_dac_dma_to_offset);
+
+void pci_dac_dma_sync_single(struct pci_dev *pdev,
+ dma64_addr_t dma_addr, size_t len, int direction)
+{
+ BUG_ON(direction == PCI_DMA_NONE);
+}
+
+EXPORT_SYMBOL(pci_dac_dma_sync_single);
diff -puN /dev/null arch/mips/mm/dma-noncoherent.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/mm/dma-noncoherent.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,342 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
+ * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
+ * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/dma-mapping.h>
+
+#include <asm/cache.h>
+#include <asm/io.h>
+
+/*
+ * Warning on the terminology - Linux calls an uncached area coherent;
+ * MIPS terminology calls memory areas with hardware maintained coherency
+ * coherent.
+ */
+
+void *dma_alloc_noncoherent(struct device *dev, size_t size,
+ dma_addr_t * dma_handle, int gfp)
+{
+ void *ret;
+ /* ignore region specifiers */
+ gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
+
+ if (dev == NULL || (*dev->dma_mask < 0xffffffff))
+ gfp |= GFP_DMA;
+ ret = (void *) __get_free_pages(gfp, get_order(size));
+
+ if (ret != NULL) {
+ memset(ret, 0, size);
+ *dma_handle = virt_to_phys(ret);
+ }
+
+ return ret;
+}
+
+EXPORT_SYMBOL(dma_alloc_noncoherent);
+
+void *dma_alloc_coherent(struct device *dev, size_t size,
+ dma_addr_t * dma_handle, int gfp)
+{
+ void *ret;
+
+ ret = dma_alloc_noncoherent(dev, size, dma_handle, gfp);
+ if (ret) {
+ dma_cache_wback_inv((unsigned long) ret, size);
+ ret = UNCAC_ADDR(ret);
+ }
+
+ return ret;
+}
+
+EXPORT_SYMBOL(dma_alloc_coherent);
+
+void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
+ dma_addr_t dma_handle)
+{
+ free_pages((unsigned long) vaddr, get_order(size));
+}
+
+EXPORT_SYMBOL(dma_free_noncoherent);
+
+void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
+ dma_addr_t dma_handle)
+{
+ unsigned long addr = (unsigned long) vaddr;
+
+ addr = CAC_ADDR(addr);
+ free_pages(addr, get_order(size));
+}
+
+EXPORT_SYMBOL(dma_free_coherent);
+
+static inline void __dma_sync(unsigned long addr, size_t size,
+ enum dma_data_direction direction)
+{
+ switch (direction) {
+ case DMA_TO_DEVICE:
+ dma_cache_wback(addr, size);
+ break;
+
+ case DMA_FROM_DEVICE:
+ dma_cache_inv(addr, size);
+ break;
+
+ case DMA_BIDIRECTIONAL:
+ dma_cache_wback_inv(addr, size);
+ break;
+
+ default:
+ BUG();
+ }
+}
+
+dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
+ enum dma_data_direction direction)
+{
+ unsigned long addr = (unsigned long) ptr;
+
+ switch (direction) {
+ case DMA_TO_DEVICE:
+ dma_cache_wback(addr, size);
+ break;
+
+ case DMA_FROM_DEVICE:
+ dma_cache_inv(addr, size);
+ break;
+
+ case DMA_BIDIRECTIONAL:
+ dma_cache_wback_inv(addr, size);
+ break;
+
+ default:
+ BUG();
+ }
+
+ return virt_to_phys(ptr);
+}
+
+EXPORT_SYMBOL(dma_map_single);
+
+void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+ enum dma_data_direction direction)
+{
+ unsigned long addr;
+ addr = dma_addr + PAGE_OFFSET;
+
+ switch (direction) {
+ case DMA_TO_DEVICE:
+ //dma_cache_wback(addr, size);
+ break;
+
+ case DMA_FROM_DEVICE:
+ //dma_cache_inv(addr, size);
+ break;
+
+ case DMA_BIDIRECTIONAL:
+ //dma_cache_wback_inv(addr, size);
+ break;
+
+ default:
+ BUG();
+ }
+}
+
+EXPORT_SYMBOL(dma_unmap_single);
+
+int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+ enum dma_data_direction direction)
+{
+ int i;
+
+ BUG_ON(direction == DMA_NONE);
+
+ for (i = 0; i < nents; i++, sg++) {
+ unsigned long addr;
+
+ addr = (unsigned long) page_address(sg->page);
+ if (addr)
+ __dma_sync(addr + sg->offset, sg->length, direction);
+ sg->dma_address = (dma_addr_t)
+ (page_to_phys(sg->page) + sg->offset);
+ }
+
+ return nents;
+}
+
+EXPORT_SYMBOL(dma_map_sg);
+
+dma_addr_t dma_map_page(struct device *dev, struct page *page,
+ unsigned long offset, size_t size, enum dma_data_direction direction)
+{
+ unsigned long addr;
+
+ BUG_ON(direction == DMA_NONE);
+
+ addr = (unsigned long) page_address(page) + offset;
+ dma_cache_wback_inv(addr, size);
+
+ return page_to_phys(page) + offset;
+}
+
+EXPORT_SYMBOL(dma_map_page);
+
+void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
+ enum dma_data_direction direction)
+{
+ BUG_ON(direction == DMA_NONE);
+
+ if (direction != DMA_TO_DEVICE) {
+ unsigned long addr;
+
+ addr = dma_address + PAGE_OFFSET;
+ dma_cache_wback_inv(addr, size);
+ }
+}
+
+EXPORT_SYMBOL(dma_unmap_page);
+
+void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
+ enum dma_data_direction direction)
+{
+ unsigned long addr;
+ int i;
+
+ BUG_ON(direction == DMA_NONE);
+
+ if (direction == DMA_TO_DEVICE)
+ return;
+
+ for (i = 0; i < nhwentries; i++, sg++) {
+ addr = (unsigned long) page_address(sg->page);
+ if (!addr)
+ continue;
+ dma_cache_wback_inv(addr + sg->offset, sg->length);
+ }
+}
+
+EXPORT_SYMBOL(dma_unmap_sg);
+
+void dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size,
+ enum dma_data_direction direction)
+{
+ unsigned long addr;
+
+ BUG_ON(direction == DMA_NONE);
+
+ addr = dma_handle + PAGE_OFFSET;
+ __dma_sync(addr, size, direction);
+}
+
+EXPORT_SYMBOL(dma_sync_single);
+
+void dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
+ unsigned long offset, size_t size, enum dma_data_direction direction)
+{
+ unsigned long addr;
+
+ BUG_ON(direction == DMA_NONE);
+
+ addr = dma_handle + offset + PAGE_OFFSET;
+ __dma_sync(addr, size, direction);
+}
+
+EXPORT_SYMBOL(dma_sync_single_range);
+
+void dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
+ enum dma_data_direction direction)
+{
+ int i;
+
+ BUG_ON(direction == DMA_NONE);
+
+ /* Make sure that gcc doesn't leave the empty loop body. */
+ for (i = 0; i < nelems; i++, sg++)
+ __dma_sync((unsigned long)page_address(sg->page),
+ sg->length, direction);
+}
+
+EXPORT_SYMBOL(dma_sync_sg);
+
+int dma_supported(struct device *dev, u64 mask)
+{
+ /*
+ * we fall back to GFP_DMA when the mask isn't all 1s,
+ * so we can't guarantee allocations that must be
+ * within a tighter range than GFP_DMA..
+ */
+ if (mask < 0x00ffffff)
+ return 0;
+
+ return 1;
+}
+
+EXPORT_SYMBOL(dma_supported);
+
+int dma_is_consistent(dma_addr_t dma_addr)
+{
+ return 1;
+}
+
+EXPORT_SYMBOL(dma_is_consistent);
+
+void dma_cache_sync(void *vaddr, size_t size, enum dma_data_direction direction)
+{
+ if (direction == DMA_NONE)
+ return;
+
+ dma_cache_wback_inv((unsigned long)vaddr, size);
+}
+
+EXPORT_SYMBOL(dma_cache_sync);
+
+/* The DAC routines are a PCIism.. */
+
+#ifdef CONFIG_PCI
+
+#include <linux/pci.h>
+
+dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
+ struct page *page, unsigned long offset, int direction)
+{
+ return (dma64_addr_t)page_to_phys(page) + offset;
+}
+
+EXPORT_SYMBOL(pci_dac_page_to_dma);
+
+struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
+ dma64_addr_t dma_addr)
+{
+ return mem_map + (dma_addr >> PAGE_SHIFT);
+}
+
+EXPORT_SYMBOL(pci_dac_dma_to_page);
+
+unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
+ dma64_addr_t dma_addr)
+{
+ return dma_addr & ~PAGE_MASK;
+}
+
+EXPORT_SYMBOL(pci_dac_dma_to_offset);
+
+void pci_dac_dma_sync_single(struct pci_dev *pdev,
+ dma64_addr_t dma_addr, size_t len, int direction)
+{
+ BUG_ON(direction == PCI_DMA_NONE);
+
+ dma_cache_wback_inv(dma_addr + PAGE_OFFSET, len);
+}
+
+EXPORT_SYMBOL(pci_dac_dma_sync_single);
+
+#endif /* CONFIG_PCI */
diff -puN /dev/null arch/mips/mm/extable.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/mm/extable.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,21 @@
+/*
+ * linux/arch/mips/mm/extable.c
+ */
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <asm/branch.h>
+#include <asm/uaccess.h>
+
+int fixup_exception(struct pt_regs *regs)
+{
+ const struct exception_table_entry *fixup;
+
+ fixup = search_exception_tables(exception_epc(regs));
+ if (fixup) {
+ regs->cp0_epc = fixup->nextinsn;
+
+ return 1;
+ }
+
+ return 0;
+}
diff -puN arch/mips/mm/fault.c~mips-megapatch arch/mips/mm/fault.c
--- 25/arch/mips/mm/fault.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/fault.c 2004-02-19 12:53:00.000000000 -0800
@@ -5,7 +5,6 @@
*
* Copyright (C) 1995 - 2000 by Ralf Baechle
*/
-#include <linux/config.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
@@ -18,7 +17,6 @@
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
-#include <linux/version.h>
#include <linux/vt_kern.h> /* For unblank_screen() */
#include <linux/module.h>
@@ -30,13 +28,6 @@
#include <asm/uaccess.h>
#include <asm/ptrace.h>
-#define development_version (LINUX_VERSION_CODE & 0x100)
-
-/*
- * Macro for exception fixup code to access integer registers.
- */
-#define dpf_reg(r) (regs->regs[r])
-
/*
* This routine handles page faults. It determines the address,
* and the problem, and then passes it off to one of the appropriate
@@ -45,19 +36,20 @@
asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write,
unsigned long address)
{
- struct vm_area_struct * vma;
+ struct vm_area_struct * vma = NULL;
struct task_struct *tsk = current;
struct mm_struct *mm = tsk->mm;
- const struct exception_table_entry *fixup;
- const int szlong = sizeof(unsigned long);
+ const int field = sizeof(unsigned long) * 2;
siginfo_t info;
#if 0
printk("Cpu%d[%s:%d:%0*lx:%ld:%0*lx]\n", smp_processor_id(),
- current->comm, current->pid, szlong, address, write,
- szlong, regs->cp0_epc);
+ current->comm, current->pid, field, address, write,
+ field, regs->cp0_epc);
#endif
+ info.si_code = SEGV_MAPERR;
+
/*
* We fault-in kernel-space virtual memory on-demand. The
* 'reference' page table is init_mm.pgd.
@@ -67,16 +59,15 @@ asmlinkage void do_page_fault(struct pt_
* only copy the information from the master page table,
* nothing more.
*/
- if (address >= VMALLOC_START)
+ if (unlikely(address >= VMALLOC_START))
goto vmalloc_fault;
- info.si_code = SEGV_MAPERR;
/*
* If we're in an interrupt or have no user
* context, we must not take the fault..
*/
if (in_atomic() || !mm)
- goto no_context;
+ goto bad_area_nosemaphore;
down_read(&mm->mmap_sem);
vma = find_vma(mm, address);
@@ -134,6 +125,7 @@ survive:
bad_area:
up_read(&mm->mmap_sem);
+bad_area_nosemaphore:
/* User mode accesses just cause a SIGSEGV */
if (user_mode(regs)) {
tsk->thread.cp0_badvaddr = address;
@@ -143,9 +135,9 @@ bad_area:
"invalid %s\n%0*lx (epc == %0*lx, ra == %0*lx)\n",
tsk->comm,
write ? "write access to" : "read access from",
- szlong, address,
- szlong, (unsigned long) regs->cp0_epc,
- szlong, (unsigned long) regs->regs[31]);
+ field, address,
+ field, (unsigned long) regs->cp0_epc,
+ field, (unsigned long) regs->regs[31]);
#endif
info.si_signo = SIGSEGV;
info.si_errno = 0;
@@ -157,15 +149,8 @@ bad_area:
no_context:
/* Are we prepared to handle this kernel fault? */
- fixup = search_exception_tables(exception_epc(regs));
- if (fixup) {
- unsigned long new_epc = fixup->nextinsn;
-
- tsk->thread.cp0_baduaddr = address;
- if (development_version)
- printk(KERN_DEBUG "%s: Exception at [<%lx>] (%lx)\n",
- tsk->comm, regs->cp0_epc, new_epc);
- regs->cp0_epc = new_epc;
+ if (fixup_exception(regs)) {
+ current->thread.cp0_baduaddr = address;
return;
}
@@ -178,8 +163,8 @@ no_context:
printk(KERN_ALERT "CPU %d Unable to handle kernel paging request at "
"virtual address %0*lx, epc == %0*lx, ra == %0*lx\n",
- smp_processor_id(), szlong, address, szlong, regs->cp0_epc,
- szlong, regs->regs[31]);
+ smp_processor_id(), field, address, field, regs->cp0_epc,
+ field, regs->regs[31]);
die("Oops", regs);
/*
@@ -201,6 +186,10 @@ out_of_memory:
do_sigbus:
up_read(&mm->mmap_sem);
+ /* Kernel mode? Handle exceptions or die */
+ if (!user_mode(regs))
+ goto no_context;
+
/*
* Send a sigbus, regardless of whether we were in kernel
* or user mode.
@@ -212,10 +201,6 @@ do_sigbus:
info.si_addr = (void *) address;
force_sig_info(SIGBUS, &info, tsk);
- /* Kernel mode? Handle exceptions or die */
- if (!user_mode(regs))
- goto no_context;
-
return;
vmalloc_fault:
diff -puN arch/mips/mm/highmem.c~mips-megapatch arch/mips/mm/highmem.c
--- 25/arch/mips/mm/highmem.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/highmem.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,3 +1,4 @@
+#include <linux/config.h>
#include <linux/module.h>
#include <linux/highmem.h>
#include <asm/tlbflush.h>
diff -puN /dev/null arch/mips/mm/init.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/mm/init.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,306 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 2000 Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/pagemap.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+#include <linux/highmem.h>
+#include <linux/swap.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cachectl.h>
+#include <asm/cpu.h>
+#include <asm/dma.h>
+#include <asm/pgalloc.h>
+#include <asm/mmu_context.h>
+#include <asm/sections.h>
+#include <asm/tlb.h>
+
+DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
+
+unsigned long highstart_pfn, highend_pfn;
+
+/*
+ * We have up to 8 empty zeroed pages so we can map one of the right colour
+ * when needed. This is necessary only on R4000 / R4400 SC and MC versions
+ * where we have to avoid VCED / VECI exceptions for good performance at
+ * any price. Since page is never written to after the initialization we
+ * don't have to care about aliases on other CPUs.
+ */
+unsigned long empty_zero_page, zero_page_mask;
+
+/*
+ * Not static inline because used by IP27 special magic initialization code
+ */
+unsigned long setup_zero_pages(void)
+{
+ unsigned long order, size;
+ struct page *page;
+
+ if (cpu_has_vce)
+ order = 3;
+ else
+ order = 0;
+
+ empty_zero_page = __get_free_pages(GFP_KERNEL, order);
+ if (!empty_zero_page)
+ panic("Oh boy, that early out of memory?");
+
+ page = virt_to_page(empty_zero_page);
+ while (page < virt_to_page(empty_zero_page + (PAGE_SIZE << order))) {
+ set_bit(PG_reserved, &page->flags);
+ set_page_count(page, 0);
+ page++;
+ }
+
+ size = PAGE_SIZE << order;
+ zero_page_mask = (size - 1) & PAGE_MASK;
+ memset((void *)empty_zero_page, 0, size);
+
+ return 1UL << order;
+}
+
+#ifdef CONFIG_HIGHMEM
+pte_t *kmap_pte;
+pgprot_t kmap_prot;
+
+EXPORT_SYMBOL(kmap_prot);
+EXPORT_SYMBOL(kmap_pte);
+
+#define kmap_get_fixmap_pte(vaddr) \
+ pte_offset_kernel(pmd_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr))
+
+static void __init kmap_init(void)
+{
+ unsigned long kmap_vstart;
+
+ /* cache the first kmap pte */
+ kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
+ kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
+
+ kmap_prot = PAGE_KERNEL;
+}
+
+#ifdef CONFIG_MIPS64
+static void __init fixrange_init(unsigned long start, unsigned long end,
+ pgd_t *pgd_base)
+{
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+ int i, j;
+ unsigned long vaddr;
+
+ vaddr = start;
+ i = __pgd_offset(vaddr);
+ j = __pmd_offset(vaddr);
+ pgd = pgd_base + i;
+
+ for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
+ pmd = (pmd_t *)pgd;
+ for (; (j < PTRS_PER_PMD) && (vaddr != end); pmd++, j++) {
+ if (pmd_none(*pmd)) {
+ pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
+ set_pmd(pmd, __pmd(pte));
+ if (pte != pte_offset_kernel(pmd, 0))
+ BUG();
+ }
+ vaddr += PMD_SIZE;
+ }
+ j = 0;
+ }
+}
+#endif /* CONFIG_MIPS64 */
+#endif /* CONFIG_HIGHMEM */
+
+#ifndef CONFIG_DISCONTIGMEM
+extern void pagetable_init(void);
+
+void __init paging_init(void)
+{
+ unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
+ unsigned long max_dma, high, low;
+
+ pagetable_init();
+
+#ifdef CONFIG_HIGHMEM
+ kmap_init();
+#endif
+
+ max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
+ low = max_low_pfn;
+ high = highend_pfn;
+
+#ifdef CONFIG_ISA
+ if (low < max_dma)
+ zones_size[ZONE_DMA] = low;
+ else {
+ zones_size[ZONE_DMA] = max_dma;
+ zones_size[ZONE_NORMAL] = low - max_dma;
+ }
+#else
+ zones_size[ZONE_DMA] = low;
+#endif
+#ifdef CONFIG_HIGHMEM
+ if (cpu_has_dc_aliases) {
+ printk(KERN_WARNING "This processor doesn't support highmem.");
+ if (high - low)
+ printk(" %dk highmem ignored", high - low);
+ printk("\n");
+ } else
+ zones_size[ZONE_HIGHMEM] = high - low;
+#endif
+
+ free_area_init(zones_size);
+}
+
+#define PFN_UP(x) (((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
+#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
+
+static inline int page_is_ram(unsigned long pagenr)
+{
+ int i;
+
+ for (i = 0; i < boot_mem_map.nr_map; i++) {
+ unsigned long addr, end;
+
+ if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
+ /* not usable memory */
+ continue;
+
+ addr = PFN_UP(boot_mem_map.map[i].addr);
+ end = PFN_DOWN(boot_mem_map.map[i].addr +
+ boot_mem_map.map[i].size);
+
+ if (pagenr >= addr && pagenr < end)
+ return 1;
+ }
+
+ return 0;
+}
+
+void __init mem_init(void)
+{
+ unsigned long codesize, reservedpages, datasize, initsize;
+ unsigned long tmp, ram;
+
+#ifdef CONFIG_HIGHMEM
+ highstart_pfn = (KSEG1 - KSEG0) >> PAGE_SHIFT;
+ highmem_start_page = mem_map + highstart_pfn;
+#ifdef CONFIG_DISCONTIGMEM
+#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
+#endif
+ max_mapnr = num_physpages = highend_pfn;
+#else
+ max_mapnr = num_physpages = max_low_pfn;
+#endif
+ high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
+
+ totalram_pages += free_all_bootmem();
+ totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
+
+ reservedpages = ram = 0;
+ for (tmp = 0; tmp < max_low_pfn; tmp++)
+ if (page_is_ram(tmp)) {
+ ram++;
+ if (PageReserved(mem_map+tmp))
+ reservedpages++;
+ }
+
+#ifdef CONFIG_HIGHMEM
+ for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
+ struct page *page = mem_map + tmp;
+
+ if (!page_is_ram(tmp)) {
+ SetPageReserved(page);
+ continue;
+ }
+ ClearPageReserved(page);
+ set_bit(PG_highmem, &page->flags);
+ atomic_set(&page->count, 1);
+ __free_page(page);
+ totalhigh_pages++;
+ }
+ totalram_pages += totalhigh_pages;
+#endif
+
+ codesize = (unsigned long) &_etext - (unsigned long) &_text;
+ datasize = (unsigned long) &_edata - (unsigned long) &_etext;
+ initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
+
+ printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
+ "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
+ (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+ ram << (PAGE_SHIFT-10),
+ codesize >> 10,
+ reservedpages << (PAGE_SHIFT-10),
+ datasize >> 10,
+ initsize >> 10,
+ (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
+}
+#endif /* !CONFIG_DISCONTIGMEM */
+
+#ifdef CONFIG_BLK_DEV_INITRD
+void free_initrd_mem(unsigned long start, unsigned long end)
+{
+#ifdef CONFIG_MIPS64
+ /* Switch from KSEG0 to XKPHYS addresses */
+ start = (unsigned long)phys_to_virt(CPHYSADDR(start));
+ end = (unsigned long)phys_to_virt(CPHYSADDR(end));
+#endif
+ if (start < end)
+ printk(KERN_INFO "Freeing initrd memory: %ldk freed\n",
+ (end - start) >> 10);
+
+ for (; start < end; start += PAGE_SIZE) {
+ ClearPageReserved(virt_to_page(start));
+ set_page_count(virt_to_page(start), 1);
+ free_page(start);
+ totalram_pages++;
+ }
+}
+#endif
+
+extern unsigned long prom_free_prom_memory(void);
+
+void free_initmem(void)
+{
+ unsigned long addr, page, freed;
+
+ freed = prom_free_prom_memory();
+
+ addr = (unsigned long) &__init_begin;
+ while (addr < (unsigned long) &__init_end) {
+#ifdef CONFIG_MIPS64
+ page = PAGE_OFFSET | CPHYSADDR(addr);
+#else
+ page = addr;
+#endif
+ ClearPageReserved(virt_to_page(page));
+ set_page_count(virt_to_page(page), 1);
+ free_page(page);
+ totalram_pages++;
+ freed += PAGE_SIZE;
+ addr += PAGE_SIZE;
+ }
+ printk(KERN_INFO "Freeing unused kernel memory: %ldk freed\n",
+ freed >> 10);
+}
diff -puN -L arch/mips/mm/loadmmu.c arch/mips/mm/loadmmu.c~mips-megapatch /dev/null
--- 25/arch/mips/mm/loadmmu.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,120 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997, 1999, 2000, 2001, 2002, 2003 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 1999 Silicon Graphics, Inc.
- * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-
-/* memory functions */
-void (*_clear_page)(void * page);
-void (*_copy_page)(void * to, void * from);
-
-/* Cache operations. */
-void (*flush_cache_all)(void);
-void (*__flush_cache_all)(void);
-void (*flush_cache_mm)(struct mm_struct *mm);
-void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
- unsigned long end);
-void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
-void (*flush_icache_range)(unsigned long start, unsigned long end);
-void (*flush_icache_page)(struct vm_area_struct *vma, struct page *page);
-
-/* MIPS specific cache operations */
-void (*flush_cache_sigtramp)(unsigned long addr);
-void (*flush_data_cache_page)(unsigned long addr);
-void (*flush_icache_all)(void);
-
-#ifdef CONFIG_NONCOHERENT_IO
-
-/* DMA cache operations. */
-void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
-void (*_dma_cache_wback)(unsigned long start, unsigned long size);
-void (*_dma_cache_inv)(unsigned long start, unsigned long size);
-
-EXPORT_SYMBOL(_dma_cache_wback_inv);
-EXPORT_SYMBOL(_dma_cache_wback);
-EXPORT_SYMBOL(_dma_cache_inv);
-
-#endif /* CONFIG_NONCOHERENT_IO */
-
-extern void ld_mmu_r23000(void);
-extern void ld_mmu_r4xx0(void);
-extern void ld_mmu_tx39(void);
-extern void ld_mmu_r6000(void);
-extern void ld_mmu_tfp(void);
-extern void ld_mmu_andes(void);
-extern void ld_mmu_sb1(void);
-extern void sb1_tlb_init(void);
-extern void r3k_tlb_init(void);
-extern void r4k_tlb_init(void);
-extern void sb1_tlb_init(void);
-
-void __init load_mmu(void)
-{
- if (cpu_has_4ktlb) {
-#if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \
- defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \
- defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432) || \
- defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32) || \
- defined(CONFIG_CPU_MIPS64) || defined(CONFIG_CPU_TX49XX) || \
- defined(CONFIG_CPU_RM7000)
- ld_mmu_r4xx0();
- r4k_tlb_init();
-#endif
- } else switch (current_cpu_data.cputype) {
-#ifdef CONFIG_CPU_R3000
- case CPU_R2000:
- case CPU_R3000:
- case CPU_R3000A:
- case CPU_R3081E:
- ld_mmu_r23000();
- r3k_tlb_init();
- break;
-#endif
-#ifdef CONFIG_CPU_TX39XX
- case CPU_TX3912:
- case CPU_TX3922:
- case CPU_TX3927:
- ld_mmu_tx39();
- r3k_tlb_init();
- break;
-#endif
-#ifdef CONFIG_CPU_R10000
- case CPU_R10000:
- case CPU_R12000:
- ld_mmu_r4xx0();
- andes_tlb_init();
- break;
-#endif
-#ifdef CONFIG_CPU_SB1
- case CPU_SB1:
- ld_mmu_sb1();
- sb1_tlb_init();
- break;
-#endif
-
- case CPU_R8000:
- panic("R8000 is unsupported");
- break;
-
- default:
- panic("Yeee, unsupported mmu/cache architecture.");
- }
-}
diff -puN arch/mips/mm/Makefile~mips-megapatch arch/mips/mm/Makefile
--- 25/arch/mips/mm/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -2,30 +2,38 @@
# Makefile for the Linux/MIPS-specific parts of the memory manager.
#
-obj-y += cache.o fault.o loadmmu.o pgtable.o
+obj-y += cache.o extable.o fault.o init.o pgtable.o
obj-$(CONFIG_MIPS32) += ioremap.o pgtable-32.o
obj-$(CONFIG_MIPS64) += pgtable-64.o
obj-$(CONFIG_HIGHMEM) += highmem.o
-obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_MIPS64) += c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_NEVADA) += c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_R10000) += c-r4k.o cex-gen.o tlb-andes.o
-obj-$(CONFIG_CPU_R3000) += pg-r3k.o c-r3k.o tlb-r3k.o tlbex-r3k.o
-obj-$(CONFIG_CPU_R4300) += c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_R4X00) += c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_R5000) += c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_R5432) += c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_MIPS64) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_NEVADA) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_R10000) += c-r4k.o cex-gen.o pg-r4k.o tlb-andes.o
+obj-$(CONFIG_CPU_R3000) += c-r3k.o tlb-r3k.o pg-r4k.o tlbex-r3k.o
+obj-$(CONFIG_CPU_R4300) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_R4X00) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_R5000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_R5432) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_RM9000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
obj-$(CONFIG_CPU_SB1) += c-sb1.o cerr-sb1.o cex-sb1.o pg-sb1.o \
tlb-sb1.o
-obj-$(CONFIG_CPU_TX39XX) += c-tx39.o pg-r3k.o tlb-r3k.o tlbex-r3k.o
-obj-$(CONFIG_CPU_TX49XX) += c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_VR41XX) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_TX39XX) += c-tx39.o pg-r4k.o tlb-r3k.o tlbex-r3k.o
+obj-$(CONFIG_CPU_TX49XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
+obj-$(CONFIG_CPU_VR41XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
obj-$(CONFIG_CPU_RM7000) += sc-rm7k.o
obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o
obj-$(CONFIG_SGI_IP22) += sc-ip22.o
+#
+# Choose one DMA coherency model
+#
+obj-$(CONFIG_DMA_COHERENT) += dma-coherent.o
+obj-$(CONFIG_DMA_NONCOHERENT) += dma-noncoherent.o
+obj-$(CONFIG_DMA_IP27) += dma-ip27.o
+
EXTRA_AFLAGS := $(CFLAGS)
diff -puN -L arch/mips/mm/pg-r3k.c arch/mips/mm/pg-r3k.c~mips-megapatch /dev/null
--- 25/arch/mips/mm/pg-r3k.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,81 +0,0 @@
-/*
- * Copyright (C) 2001 Ralf Baechle (ralf@gnu.org)
- */
-#include <linux/sched.h>
-#include <linux/mm.h>
-
-/* page functions */
-void r3k_clear_page(void * page)
-{
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "addiu\t$1,%0,%2\n"
- "1:\tsw\t$0,(%0)\n\t"
- "sw\t$0,4(%0)\n\t"
- "sw\t$0,8(%0)\n\t"
- "sw\t$0,12(%0)\n\t"
- "addiu\t%0,32\n\t"
- "sw\t$0,-16(%0)\n\t"
- "sw\t$0,-12(%0)\n\t"
- "sw\t$0,-8(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sw\t$0,-4(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (page)
- : "0" (page), "I" (PAGE_SIZE)
- : "memory");
-}
-
-void r3k_copy_page(void * to, void * from)
-{
- unsigned long dummy1, dummy2;
- unsigned long reg1, reg2, reg3, reg4;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "addiu\t$1,%0,%8\n"
- "1:\tlw\t%2,(%1)\n\t"
- "lw\t%3,4(%1)\n\t"
- "lw\t%4,8(%1)\n\t"
- "lw\t%5,12(%1)\n\t"
- "sw\t%2,(%0)\n\t"
- "sw\t%3,4(%0)\n\t"
- "sw\t%4,8(%0)\n\t"
- "sw\t%5,12(%0)\n\t"
- "lw\t%2,16(%1)\n\t"
- "lw\t%3,20(%1)\n\t"
- "lw\t%4,24(%1)\n\t"
- "lw\t%5,28(%1)\n\t"
- "sw\t%2,16(%0)\n\t"
- "sw\t%3,20(%0)\n\t"
- "sw\t%4,24(%0)\n\t"
- "sw\t%5,28(%0)\n\t"
- "addiu\t%0,64\n\t"
- "addiu\t%1,64\n\t"
- "lw\t%2,-32(%1)\n\t"
- "lw\t%3,-28(%1)\n\t"
- "lw\t%4,-24(%1)\n\t"
- "lw\t%5,-20(%1)\n\t"
- "sw\t%2,-32(%0)\n\t"
- "sw\t%3,-28(%0)\n\t"
- "sw\t%4,-24(%0)\n\t"
- "sw\t%5,-20(%0)\n\t"
- "lw\t%2,-16(%1)\n\t"
- "lw\t%3,-12(%1)\n\t"
- "lw\t%4,-8(%1)\n\t"
- "lw\t%5,-4(%1)\n\t"
- "sw\t%2,-16(%0)\n\t"
- "sw\t%3,-12(%0)\n\t"
- "sw\t%4,-8(%0)\n\t"
- "bne\t$1,%0,1b\n\t"
- "sw\t%5,-4(%0)\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (dummy1), "=r" (dummy2),
- "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
- : "0" (to), "1" (from),
- "I" (PAGE_SIZE));
-}
diff -puN /dev/null arch/mips/mm/pg-r4k.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/mm/pg-r4k.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,486 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/proc_fs.h>
+
+#include <asm/cacheops.h>
+#include <asm/inst.h>
+#include <asm/io.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/prefetch.h>
+#include <asm/system.h>
+#include <asm/bootinfo.h>
+#include <asm/mipsregs.h>
+#include <asm/mmu_context.h>
+#include <asm/cpu.h>
+#include <asm/war.h>
+
+#define half_scache_line_size() (cpu_scache_line_size() >> 1)
+
+/*
+ * Maximum sizes:
+ *
+ * R4000 128 bytes S-cache: 0x58 bytes
+ * R4600 v1.7: 0x5c bytes
+ * R4600 v2.0: 0x60 bytes
+ * With prefetching, 16 byte strides 0xa0 bytes
+ */
+
+static unsigned int clear_page_array[0x130 / 4];
+
+void clear_page(void * page) __attribute__((alias("clear_page_array")));
+
+EXPORT_SYMBOL(clear_page);
+
+/*
+ * Maximum sizes:
+ *
+ * R4000 128 bytes S-cache: 0x11c bytes
+ * R4600 v1.7: 0x080 bytes
+ * R4600 v2.0: 0x07c bytes
+ * With prefetching, 16 byte strides 0x0b8 bytes
+ */
+static unsigned int copy_page_array[0x148 / 4];
+
+void copy_page(void *to, void *from) __attribute__((alias("copy_page_array")));
+
+EXPORT_SYMBOL(copy_page);
+
+/*
+ * An address fits into a single register so it's safe to use 64-bit registers
+ * if we have 64-bit adresses.
+ */
+#define cpu_has_64bit_registers cpu_has_64bit_addresses
+
+/*
+ * This is suboptimal for 32-bit kernels; we assume that R10000 is only used
+ * with 64-bit kernels. The prefetch offsets have been experimentally tuned
+ * an Origin 200.
+ */
+static int pref_offset_clear __initdata = 512;
+static int pref_offset_copy __initdata = 256;
+
+static unsigned int pref_src_mode __initdata;
+static unsigned int pref_dst_mode __initdata;
+
+static int load_offset __initdata;
+static int store_offset __initdata;
+
+static unsigned int __initdata *dest, *epc;
+
+static unsigned int instruction_pending;
+static union mips_instruction delayed_mi;
+
+static void __init emit_instruction(union mips_instruction mi)
+{
+ if (instruction_pending)
+ *epc++ = delayed_mi.word;
+
+ instruction_pending = 1;
+ delayed_mi = mi;
+}
+
+static inline void flush_delay_slot_or_nop(void)
+{
+ if (instruction_pending) {
+ *epc++ = delayed_mi.word;
+ instruction_pending = 0;
+ return;
+ }
+
+ *epc++ = 0;
+}
+
+static inline unsigned int *label(void)
+{
+ if (instruction_pending) {
+ *epc++ = delayed_mi.word;
+ instruction_pending = 0;
+ }
+
+ return epc;
+}
+
+static inline void build_insn_word(unsigned int word)
+{
+ union mips_instruction mi;
+
+ mi.word = word;
+
+ emit_instruction(mi);
+}
+
+static inline void build_nop(void)
+{
+ build_insn_word(0); /* nop */
+}
+
+static inline void build_src_pref(int advance)
+{
+ if (!(load_offset & (cpu_dcache_line_size() - 1))) {
+ union mips_instruction mi;
+
+ mi.i_format.opcode = pref_op;
+ mi.i_format.rs = 5; /* $a1 */
+ mi.i_format.rt = pref_src_mode;
+ mi.i_format.simmediate = load_offset + advance;
+
+ emit_instruction(mi);
+ }
+}
+
+static inline void __build_load_reg(int reg)
+{
+ union mips_instruction mi;
+ unsigned int width;
+
+ if (cpu_has_64bit_registers) {
+ mi.i_format.opcode = ld_op;
+ width = 8;
+ } else {
+ mi.i_format.opcode = lw_op;
+ width = 4;
+ }
+ mi.i_format.rs = 5; /* $a1 */
+ mi.i_format.rt = reg; /* $reg */
+ mi.i_format.simmediate = load_offset;
+
+ load_offset += width;
+ emit_instruction(mi);
+}
+
+static inline void build_load_reg(int reg)
+{
+ if (cpu_has_prefetch)
+ build_src_pref(pref_offset_copy);
+
+ __build_load_reg(reg);
+}
+
+static inline void build_dst_pref(int advance)
+{
+ if (!(store_offset & (cpu_dcache_line_size() - 1))) {
+ union mips_instruction mi;
+
+ mi.i_format.opcode = pref_op;
+ mi.i_format.rs = 4; /* $a0 */
+ mi.i_format.rt = pref_dst_mode;
+ mi.i_format.simmediate = store_offset + advance;
+
+ emit_instruction(mi);
+ }
+}
+
+static inline void build_cdex_s(void)
+{
+ union mips_instruction mi;
+
+ if ((store_offset & (cpu_scache_line_size() - 1)))
+ return;
+
+ mi.c_format.opcode = cache_op;
+ mi.c_format.rs = 4; /* $a0 */
+ mi.c_format.c_op = 3; /* Create Dirty Exclusive */
+ mi.c_format.cache = 3; /* Secondary Data Cache */
+ mi.c_format.simmediate = store_offset;
+
+ emit_instruction(mi);
+}
+
+static inline void build_cdex_p(void)
+{
+ union mips_instruction mi;
+
+ if (store_offset & (cpu_dcache_line_size() - 1))
+ return;
+
+ if (R4600_V1_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2010)) {
+ build_nop();
+ build_nop();
+ build_nop();
+ build_nop();
+ }
+
+ if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020))
+ build_insn_word(0x8c200000); /* lw $zero, ($at) */
+
+ mi.c_format.opcode = cache_op;
+ mi.c_format.rs = 4; /* $a0 */
+ mi.c_format.c_op = 3; /* Create Dirty Exclusive */
+ mi.c_format.cache = 1; /* Data Cache */
+ mi.c_format.simmediate = store_offset;
+
+ emit_instruction(mi);
+}
+
+static void __build_store_reg(int reg)
+{
+ union mips_instruction mi;
+ unsigned int width;
+
+ if (cpu_has_64bit_gp_regs ||
+ (cpu_has_64bit_zero_reg && reg == 0)) {
+ mi.i_format.opcode = sd_op;
+ width = 8;
+ } else {
+ mi.i_format.opcode = sw_op;
+ width = 4;
+ }
+ mi.i_format.rs = 4; /* $a0 */
+ mi.i_format.rt = reg; /* $reg */
+ mi.i_format.simmediate = store_offset;
+
+ store_offset += width;
+ emit_instruction(mi);
+}
+
+static inline void build_store_reg(int reg)
+{
+ if (cpu_has_prefetch)
+ if (reg)
+ build_dst_pref(pref_offset_copy);
+ else
+ build_dst_pref(pref_offset_clear);
+ else if (cpu_has_cache_cdex_s)
+ build_cdex_s();
+ else if (cpu_has_cache_cdex_p)
+ build_cdex_p();
+
+ __build_store_reg(reg);
+}
+
+static inline void build_addiu_a2_a0(unsigned long offset)
+{
+ union mips_instruction mi;
+
+ BUG_ON(offset > 0x7fff);
+
+ mi.i_format.opcode = cpu_has_64bit_addresses ? daddiu_op : addiu_op;
+ mi.i_format.rs = 4; /* $a0 */
+ mi.i_format.rt = 6; /* $a2 */
+ mi.i_format.simmediate = offset;
+
+ emit_instruction(mi);
+}
+
+static inline void build_addiu_a1(unsigned long offset)
+{
+ union mips_instruction mi;
+
+ BUG_ON(offset > 0x7fff);
+
+ mi.i_format.opcode = cpu_has_64bit_addresses ? daddiu_op : addiu_op;
+ mi.i_format.rs = 5; /* $a1 */
+ mi.i_format.rt = 5; /* $a1 */
+ mi.i_format.simmediate = offset;
+
+ load_offset -= offset;
+
+ emit_instruction(mi);
+}
+
+static inline void build_addiu_a0(unsigned long offset)
+{
+ union mips_instruction mi;
+
+ BUG_ON(offset > 0x7fff);
+
+ mi.i_format.opcode = cpu_has_64bit_addresses ? daddiu_op : addiu_op;
+ mi.i_format.rs = 4; /* $a0 */
+ mi.i_format.rt = 4; /* $a0 */
+ mi.i_format.simmediate = offset;
+
+ store_offset -= offset;
+
+ emit_instruction(mi);
+}
+
+static inline void build_bne(unsigned int *dest)
+{
+ union mips_instruction mi;
+
+ mi.i_format.opcode = bne_op;
+ mi.i_format.rs = 6; /* $a2 */
+ mi.i_format.rt = 4; /* $a0 */
+ mi.i_format.simmediate = dest - epc - 1;
+
+ *epc++ = mi.word;
+ flush_delay_slot_or_nop();
+}
+
+static inline void build_jr_ra(void)
+{
+ union mips_instruction mi;
+
+ mi.r_format.opcode = spec_op;
+ mi.r_format.rs = 31;
+ mi.r_format.rt = 0;
+ mi.r_format.rd = 0;
+ mi.r_format.re = 0;
+ mi.r_format.func = jr_op;
+
+ *epc++ = mi.word;
+ flush_delay_slot_or_nop();
+}
+
+void __init build_clear_page(void)
+{
+ unsigned int loop_start;
+
+ epc = (unsigned int *) &clear_page_array;
+ instruction_pending = 0;
+ store_offset = 0;
+
+ if (cpu_has_prefetch) {
+ switch (current_cpu_data.cputype) {
+ case CPU_R10000:
+ case CPU_R12000:
+ pref_src_mode = Pref_LoadStreamed;
+ pref_dst_mode = Pref_StoreRetained;
+ break;
+ default:
+ pref_src_mode = Pref_LoadStreamed;
+ pref_dst_mode = Pref_PrepareForStore;
+ break;
+ }
+ }
+
+ build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_clear : 0));
+
+ if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020))
+ build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
+
+dest = label();
+ do {
+ build_store_reg(0);
+ build_store_reg(0);
+ build_store_reg(0);
+ build_store_reg(0);
+ } while (store_offset < half_scache_line_size());
+ build_addiu_a0(2 * store_offset);
+ loop_start = store_offset;
+ do {
+ build_store_reg(0);
+ build_store_reg(0);
+ build_store_reg(0);
+ build_store_reg(0);
+ } while ((store_offset - loop_start) < half_scache_line_size());
+ build_bne(dest);
+
+ if (cpu_has_prefetch && pref_offset_clear) {
+ build_addiu_a2_a0(pref_offset_clear);
+ dest = label();
+ loop_start = store_offset;
+ do {
+ __build_store_reg(0);
+ __build_store_reg(0);
+ __build_store_reg(0);
+ __build_store_reg(0);
+ } while ((store_offset - loop_start) < half_scache_line_size());
+ build_addiu_a0(2 * store_offset);
+ loop_start = store_offset;
+ do {
+ __build_store_reg(0);
+ __build_store_reg(0);
+ __build_store_reg(0);
+ __build_store_reg(0);
+ } while ((store_offset - loop_start) < half_scache_line_size());
+ build_bne(dest);
+ }
+
+ build_jr_ra();
+
+ flush_icache_range((unsigned long)&clear_page_array,
+ (unsigned long) epc);
+
+ BUG_ON(epc > clear_page_array + ARRAY_SIZE(clear_page_array));
+}
+
+void __init build_copy_page(void)
+{
+ unsigned int loop_start;
+
+ epc = (unsigned int *) ©_page_array;
+ store_offset = load_offset = 0;
+ instruction_pending = 0;
+
+ build_addiu_a2_a0(PAGE_SIZE - (cpu_has_prefetch ? pref_offset_copy : 0));
+
+ if (R4600_V2_HIT_CACHEOP_WAR && ((read_c0_prid() & 0xfff0) == 0x2020))
+ build_insn_word(0x3c01a000); /* lui $at, 0xa000 */
+
+dest = label();
+ loop_start = store_offset;
+ do {
+ build_load_reg( 8);
+ build_load_reg( 9);
+ build_load_reg(10);
+ build_load_reg(11);
+ build_store_reg( 8);
+ build_store_reg( 9);
+ build_store_reg(10);
+ build_store_reg(11);
+ } while ((store_offset - loop_start) < half_scache_line_size());
+ build_addiu_a0(2 * store_offset);
+ build_addiu_a1(2 * load_offset);
+ loop_start = store_offset;
+ do {
+ build_load_reg( 8);
+ build_load_reg( 9);
+ build_load_reg(10);
+ build_load_reg(11);
+ build_store_reg( 8);
+ build_store_reg( 9);
+ build_store_reg(10);
+ build_store_reg(11);
+ } while ((store_offset - loop_start) < half_scache_line_size());
+ build_bne(dest);
+
+ if (cpu_has_prefetch && pref_offset_copy) {
+ build_addiu_a2_a0(pref_offset_copy);
+ dest = label();
+ loop_start = store_offset;
+ do {
+ __build_load_reg( 8);
+ __build_load_reg( 9);
+ __build_load_reg(10);
+ __build_load_reg(11);
+ __build_store_reg( 8);
+ __build_store_reg( 9);
+ __build_store_reg(10);
+ __build_store_reg(11);
+ } while ((store_offset - loop_start) < half_scache_line_size());
+ build_addiu_a0(2 * store_offset);
+ build_addiu_a1(2 * load_offset);
+ loop_start = store_offset;
+ do {
+ __build_load_reg( 8);
+ __build_load_reg( 9);
+ __build_load_reg(10);
+ __build_load_reg(11);
+ __build_store_reg( 8);
+ __build_store_reg( 9);
+ __build_store_reg(10);
+ __build_store_reg(11);
+ } while ((store_offset - loop_start) < half_scache_line_size());
+ build_bne(dest);
+ }
+
+ build_jr_ra();
+
+ flush_icache_range((unsigned long)©_page_array,
+ (unsigned long) epc);
+
+ BUG_ON(epc > copy_page_array + ARRAY_SIZE(copy_page_array));
+}
diff -puN arch/mips/mm/pg-sb1.c~mips-megapatch arch/mips/mm/pg-sb1.c
--- 25/arch/mips/mm/pg-sb1.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/pg-sb1.c 2004-02-19 12:53:00.000000000 -0800
@@ -22,6 +22,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#include <linux/config.h>
+#include <linux/module.h>
#include <linux/sched.h>
#include <linux/smp.h>
@@ -38,8 +39,11 @@
#define SB1_PREF_STORE_STREAMED_HINT "5"
#endif
-/* These are the functions hooked by the memory management function pointers */
-void sb1_clear_page(void *page)
+#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
+static inline void clear_page_cpu(void *page)
+#else
+void clear_page(void *page)
+#endif
{
unsigned char *addr = (unsigned char *) page;
unsigned char *end = addr + PAGE_SIZE;
@@ -77,7 +81,11 @@ void sb1_clear_page(void *page)
} while (addr != end);
}
-void sb1_copy_page(void *to, void *from)
+#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
+static inline void copy_page_cpu(void *to, void *from)
+#else
+void copy_page(void *to, void *from)
+#endif
{
unsigned char *src = from;
unsigned char *dst = to;
@@ -157,55 +165,58 @@ void sb1_dma_init(void)
uint64_t base_val = PHYSADDR(&page_descr[cpu]) | V_DM_DSCR_BASE_RINGSZ(1);
__raw_writeq(base_val,
- IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE));
+ IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
__raw_writeq(base_val | M_DM_DSCR_BASE_RESET,
- IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE));
+ IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
__raw_writeq(base_val | M_DM_DSCR_BASE_ENABL,
- IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE));
+ IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
}
-void sb1_clear_page_dma(void *page)
+void clear_page(void *page)
{
int cpu = smp_processor_id();
/* if the page is above Kseg0, use old way */
- if (KSEGX(page) != K0BASE)
- return sb1_clear_page(page);
+ if (KSEGX(page) != CAC_BASE)
+ return clear_page_cpu(page);
page_descr[cpu].dscr_a = PHYSADDR(page) | M_DM_DSCRA_ZERO_MEM | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
page_descr[cpu].dscr_b = V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
- __raw_writeq(1, IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_COUNT));
+ __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
/*
* Don't really want to do it this way, but there's no
* reliable way to delay completion detection.
*/
- while (!(__raw_readq(IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) & M_DM_DSCR_BASE_INTERRUPT))
+ while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) & M_DM_DSCR_BASE_INTERRUPT)))
;
- __raw_readq(IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE));
+ __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
}
-void sb1_copy_page_dma(void *to, void *from)
+void copy_page(void *to, void *from)
{
unsigned long from_phys = PHYSADDR(from);
unsigned long to_phys = PHYSADDR(to);
int cpu = smp_processor_id();
/* if either page is above Kseg0, use old way */
- if ((KSEGX(to) != K0BASE) || (KSEGX(from) != K0BASE))
- return sb1_copy_page(to, from);
+ if ((KSEGX(to) != CAC_BASE) || (KSEGX(from) != CAC_BASE))
+ return copy_page_cpu(to, from);
page_descr[cpu].dscr_a = PHYSADDR(to_phys) | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
page_descr[cpu].dscr_b = PHYSADDR(from_phys) | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
- __raw_writeq(1, IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_COUNT));
+ __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
/*
* Don't really want to do it this way, but there's no
* reliable way to delay completion detection.
*/
- while (!(__raw_readq(IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) & M_DM_DSCR_BASE_INTERRUPT))
+ while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) & M_DM_DSCR_BASE_INTERRUPT)))
;
- __raw_readq(IO_SPACE_BASE + A_DM_REGISTER(cpu, R_DM_DSCR_BASE));
+ __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
}
#endif
+
+EXPORT_SYMBOL(clear_page);
+EXPORT_SYMBOL(copy_page);
diff -puN arch/mips/mm/pgtable-32.c~mips-megapatch arch/mips/mm/pgtable-32.c
--- 25/arch/mips/mm/pgtable-32.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/pgtable-32.c 2004-02-19 12:53:00.000000000 -0800
@@ -5,8 +5,11 @@
*
* Copyright (C) 2003 by Ralf Baechle
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <linux/mm.h>
+#include <linux/bootmem.h>
+#include <linux/highmem.h>
#include <asm/pgtable.h>
void pgd_init(unsigned long page)
@@ -26,6 +29,37 @@ void pgd_init(unsigned long page)
}
}
+#ifdef CONFIG_HIGHMEM
+static void __init fixrange_init (unsigned long start, unsigned long end,
+ pgd_t *pgd_base)
+{
+ pgd_t *pgd;
+ pmd_t *pmd;
+ pte_t *pte;
+ int i, j;
+ unsigned long vaddr;
+
+ vaddr = start;
+ i = __pgd_offset(vaddr);
+ j = __pmd_offset(vaddr);
+ pgd = pgd_base + i;
+
+ for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
+ pmd = (pmd_t *)pgd;
+ for (; (j < PTRS_PER_PMD) && (vaddr != end); pmd++, j++) {
+ if (pmd_none(*pmd)) {
+ pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
+ set_pmd(pmd, __pmd((unsigned long)pte));
+ if (pte != pte_offset_kernel(pmd, 0))
+ BUG();
+ }
+ vaddr += PMD_SIZE;
+ }
+ j = 0;
+ }
+}
+#endif
+
void __init pagetable_init(void)
{
#ifdef CONFIG_HIGHMEM
diff -puN arch/mips/mm/pgtable-64.c~mips-megapatch arch/mips/mm/pgtable-64.c
--- 25/arch/mips/mm/pgtable-64.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/pgtable-64.c 2004-02-19 12:53:00.000000000 -0800
@@ -64,7 +64,7 @@ void __init pagetable_init(void)
memset((void *)kptbl, 0, PAGE_SIZE << PGD_ORDER);
memset((void *)kpmdtbl, 0, PAGE_SIZE);
- set_pgd(swapper_pg_dir, __pgd(kpmdtbl));
+ set_pgd(swapper_pg_dir, __pgd((unsigned long)kpmdtbl));
/*
* The 64-bit kernel uses a flat pagetable for it's kernel mappings ...
diff -puN arch/mips/mm/pgtable.c~mips-megapatch arch/mips/mm/pgtable.c
--- 25/arch/mips/mm/pgtable.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/pgtable.c 2004-02-19 12:53:00.000000000 -0800
@@ -4,6 +4,7 @@
void show_mem(void)
{
+#ifndef CONFIG_DISCONTIGMEM /* XXX(hch): later.. */
int pfn, total = 0, reserved = 0;
int shared = 0, cached = 0;
int highmem = 0;
@@ -30,4 +31,5 @@ void show_mem(void)
printk("%d reserved pages\n",reserved);
printk("%d pages shared\n",shared);
printk("%d pages swap cached\n",cached);
+#endif
}
diff -puN arch/mips/mm/sc-r5k.c~mips-megapatch arch/mips/mm/sc-r5k.c
--- 25/arch/mips/mm/sc-r5k.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/sc-r5k.c 2004-02-19 12:53:00.000000000 -0800
@@ -14,6 +14,7 @@
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/mmu_context.h>
+#include <asm/r4kcache.h>
/* Secondary cache size in bytes, if present. */
static unsigned long scache_size;
@@ -21,24 +22,13 @@ static unsigned long scache_size;
#define SC_LINE 32
#define SC_PAGE (128*SC_LINE)
-#define cache_op(base,op) \
-__asm__ __volatile__(" \
- .set noreorder; \
- .set mips3; \
- cache %1, (%0); \
- .set mips0; \
- .set reorder" \
- : \
- : "r" (base), \
- "i" (op));
-
static inline void blast_r5000_scache(void)
{
- unsigned long start = KSEG0;
- unsigned long end = KSEG0 + scache_size;
+ unsigned long start = INDEX_BASE;
+ unsigned long end = start + scache_size;
while(start < end) {
- cache_op(start, R5K_Page_Invalidate_S);
+ cache_op(R5K_Page_Invalidate_S, start);
start += SC_PAGE;
}
}
@@ -59,7 +49,7 @@ static void r5k_dma_cache_inv_sc(unsigne
a = addr & ~(SC_PAGE - 1);
end = (addr + size - 1) & ~(SC_PAGE - 1);
while (a <= end) {
- cache_op(a, R5K_Page_Invalidate_S);
+ cache_op(R5K_Page_Invalidate_S, a);
a += SC_PAGE;
}
}
@@ -69,7 +59,7 @@ static void r5k_sc_enable(void)
unsigned long flags;
local_irq_save(flags);
- change_c0_config(R5K_CONF_SE, R5K_CONF_SE);
+ set_c0_config(R5K_CONF_SE);
blast_r5000_scache();
local_irq_restore(flags);
}
@@ -80,7 +70,7 @@ static void r5k_sc_disable(void)
local_irq_save(flags);
blast_r5000_scache();
- change_c0_config(R5K_CONF_SE, 0);
+ clear_c0_config(R5K_CONF_SE);
local_irq_restore(flags);
}
diff -puN arch/mips/mm/sc-rm7k.c~mips-megapatch arch/mips/mm/sc-rm7k.c
--- 25/arch/mips/mm/sc-rm7k.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/sc-rm7k.c 2004-02-19 12:53:00.000000000 -0800
@@ -129,7 +129,7 @@ static __init void rm7k_sc_enable(void)
static void rm7k_sc_disable(void)
{
- set_c0_config(1<<3); /* CONF_SE */
+ clear_c0_config(1<<3); /* CONF_SE */
}
static inline int __init rm7k_sc_probe(void)
@@ -140,11 +140,11 @@ static inline int __init rm7k_sc_probe(v
if ((config >> 31) & 1)
return 0;
- printk(KERN_INFO "Secondary cache size %ldK, linesize 32 bytes.\n",
+ printk(KERN_INFO "Secondary cache size %ldK, linesize %ld bytes.\n",
(scache_size >> 10), sc_lsize);
- if ((config >> 3) & 1)
- return;
+ if ((config >> 3) & 1) /* CONF_SE */
+ return 1;
printk(KERN_INFO "Enabling secondary cache...");
func();
diff -puN arch/mips/mm/tlb-andes.c~mips-megapatch arch/mips/mm/tlb-andes.c
--- 25/arch/mips/mm/tlb-andes.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/tlb-andes.c 2004-02-19 12:53:00.000000000 -0800
@@ -7,6 +7,7 @@
* Copyright (C) 1999 Silicon Graphics, Inc.
* Copyright (C) 2000 Kanoj Sarcar (kanoj@sgi.com)
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
@@ -16,6 +17,9 @@
#include <asm/system.h>
#include <asm/mmu_context.h>
+extern void except_vec0_generic(void);
+extern void except_vec0_r4000(void);
+extern void except_vec1_generic(void);
extern void except_vec1_r10k(void);
#define NTLB_ENTRIES 64
@@ -235,7 +239,7 @@ void __update_tlb(struct vm_area_struct
local_irq_restore(flags);
}
-void __init andes_tlb_init(void)
+void __init tlb_init(void)
{
/*
* You should never change this register:
@@ -253,5 +257,14 @@ void __init andes_tlb_init(void)
/* Did I tell you that ARC SUCKS? */
- memcpy((void *)KSEG1 + 0x080, except_vec1_r10k, 0x80);
+#ifdef CONFIG_MIPS32
+ memcpy((void *)KSEG0, &except_vec0_r4000, 0x80);
+ memcpy((void *)(KSEG0 + 0x080), &except_vec1_generic, 0x80);
+ flush_icache_range(KSEG0, KSEG0 + 0x100);
+#endif
+#ifdef CONFIG_MIPS64
+ memcpy((void *)(CKSEG0 + 0x000), &except_vec0_generic, 0x80);
+ memcpy((void *)(CKSEG0 + 0x080), except_vec1_r10k, 0x80);
+ flush_icache_range(CKSEG0 + 0x80, CKSEG0 + 0x100);
+#endif
}
diff -puN arch/mips/mm/tlbex-r3k.S~mips-megapatch arch/mips/mm/tlbex-r3k.S
--- 25/arch/mips/mm/tlbex-r3k.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/tlbex-r3k.S 2004-02-19 12:53:00.000000000 -0800
@@ -19,7 +19,6 @@
#include <asm/mipsregs.h>
#include <asm/page.h>
#include <asm/pgtable-bits.h>
-#include <asm/processor.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
diff -puN arch/mips/mm/tlb-r3k.c~mips-megapatch arch/mips/mm/tlb-r3k.c
--- 25/arch/mips/mm/tlb-r3k.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/tlb-r3k.c 2004-02-19 12:53:00.000000000 -0800
@@ -10,7 +10,6 @@
* Copyright (C) 2002 Ralf Baechle
* Copyright (C) 2002 Maciej W. Rozycki
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
@@ -282,7 +281,7 @@ void __init add_wired_entry(unsigned lon
}
}
-void __init r3k_tlb_init(void)
+void __init tlb_init(void)
{
local_flush_tlb_all();
memcpy((void *)KSEG0, &except_vec0_r2300, 0x80);
diff -puN arch/mips/mm/tlb-r4k.c~mips-megapatch arch/mips/mm/tlb-r4k.c
--- 25/arch/mips/mm/tlb-r4k.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/tlb-r4k.c 2004-02-19 12:53:00.000000000 -0800
@@ -19,9 +19,11 @@
#include <asm/pgtable.h>
#include <asm/system.h>
+extern void except_vec0_generic(void);
extern void except_vec0_nevada(void);
extern void except_vec0_r4000(void);
extern void except_vec0_r4600(void);
+extern void except_vec1_generic(void);
extern void except_vec1_r4k(void);
/* CP0 hazard avoidance. */
@@ -50,7 +52,7 @@ void local_flush_tlb_all(void)
* Make sure all entries differ. If they're not different
* MIPS32 will take revenge ...
*/
- write_c0_entryhi(KSEG0 + entry * 0x2000);
+ write_c0_entryhi(CKSEG0 + (entry << (PAGE_SHIFT + 1)));
write_c0_index(entry);
BARRIER;
tlb_write_indexed();
@@ -104,7 +106,8 @@ void local_flush_tlb_range(struct vm_are
if (idx < 0)
continue;
/* Make sure all entries differ. */
- write_c0_entryhi(KSEG0 + idx * 0x2000);
+ write_c0_entryhi(CKSEG0 +
+ (idx << (PAGE_SHIFT + 1)));
BARRIER;
tlb_write_indexed();
BARRIER;
@@ -146,7 +149,7 @@ void local_flush_tlb_kernel_range(unsign
if (idx < 0)
continue;
/* Make sure all entries differ. */
- write_c0_entryhi(KSEG0 + idx * 0x2000);
+ write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1)));
BARRIER;
tlb_write_indexed();
BARRIER;
@@ -180,7 +183,7 @@ void local_flush_tlb_page(struct vm_area
if (idx < 0)
goto finish;
/* Make sure all entries differ. */
- write_c0_entryhi(KSEG0 + idx * 0x2000);
+ write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1)));
BARRIER;
tlb_write_indexed();
@@ -212,7 +215,7 @@ void local_flush_tlb_one(unsigned long p
write_c0_entrylo1(0);
if (idx >= 0) {
/* Make sure all entries differ. */
- write_c0_entryhi(KSEG0+(idx<<(PAGE_SHIFT+1)));
+ write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1)));
BARRIER;
tlb_write_indexed();
}
@@ -378,25 +381,25 @@ out:
static void __init probe_tlb(unsigned long config)
{
- unsigned int prid, config1;
+ struct cpuinfo_mips *c = ¤t_cpu_data;
+ unsigned int reg;
- prid = read_c0_prid() & ASID_MASK;
- if (prid == PRID_IMP_RM7000 || !(config & (1 << 31)))
- /*
- * Not a MIPS32/MIPS64 CPU.. Config 1 register not
- * supported, we assume R4k style. Cpu probing already figured
- * out the number of tlb entries.
- */
+ /*
+ * If this isn't a MIPS32 / MIPS64 compliant CPU. Config 1 register
+ * is not supported, we assume R4k style. Cpu probing already figured
+ * out the number of tlb entries.
+ */
+ if ((c->processor_id & 0xff0000) == PRID_COMP_LEGACY)
return;
- config1 = read_c0_config1();
+ reg = read_c0_config1();
if (!((config >> 7) & 3))
- panic("No MMU present");
- else
- current_cpu_data.tlbsize = ((config1 >> 25) & 0x3f) + 1;
+ panic("No TLB present");
+
+ c->tlbsize = ((reg >> 25) & 0x3f) + 1;
}
-void __init r4k_tlb_init(void)
+void __init tlb_init(void)
{
unsigned int config = read_c0_config();
@@ -408,7 +411,7 @@ void __init r4k_tlb_init(void)
* be set for 4kb pages.
*/
probe_tlb(config);
- write_c0_pagemask(PM_4K);
+ write_c0_pagemask(PM_DEFAULT_MASK);
write_c0_wired(0);
temp_tlb_entry = current_cpu_data.tlbsize - 1;
local_flush_tlb_all();
@@ -420,10 +423,12 @@ void __init r4k_tlb_init(void)
memcpy((void *)KSEG0, &except_vec0_r4600, 0x80);
else
memcpy((void *)KSEG0, &except_vec0_r4000, 0x80);
- flush_icache_range(KSEG0, KSEG0 + 0x80);
+ memcpy((void *)(KSEG0 + 0x080), &except_vec1_generic, 0x80);
+ flush_icache_range(KSEG0, KSEG0 + 0x100);
#endif
#ifdef CONFIG_MIPS64
- memcpy((void *)(KSEG0 + 0x80), except_vec1_r4k, 0x80);
- flush_icache_range(KSEG0 + 0x80, KSEG0 + 0x100);
+ memcpy((void *)(CKSEG0 + 0x00), &except_vec0_generic, 0x80);
+ memcpy((void *)(CKSEG0 + 0x80), except_vec1_r4k, 0x80);
+ flush_icache_range(CKSEG0 + 0x80, CKSEG0 + 0x100);
#endif
}
diff -puN arch/mips/mm/tlb-sb1.c~mips-megapatch arch/mips/mm/tlb-sb1.c
--- 25/arch/mips/mm/tlb-sb1.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/mm/tlb-sb1.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,7 +1,7 @@
/*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
* Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 2000, 2001 Broadcom Corporation
+ * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -18,12 +18,21 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#include <linux/config.h>
+#include <linux/init.h>
#include <asm/mmu_context.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
+#ifdef CONFIG_MIPS32
extern void except_vec0_sb1(void);
+extern void except_vec1_generic(void);
+#endif
+#ifdef CONFIG_MIPS64
+extern void except_vec0_generic(void);
extern void except_vec1_sb1(void);
+#endif
+
+#define UNIQUE_ENTRYHI(idx) (KSEG0 + ((idx) << (PAGE_SHIFT + 1)))
/* Dump the current entry* and pagemask registers */
static inline void dump_cur_tlb_regs(void)
@@ -96,10 +105,13 @@ void local_flush_tlb_all(void)
old_ctx = read_c0_entryhi() & ASID_MASK;
write_c0_entrylo0(0);
write_c0_entrylo1(0);
- for (entry = 0; entry < current_cpu_data.tlbsize; entry++) {
- write_c0_entryhi(KSEG0 + (PAGE_SIZE << 1) * entry);
+
+ entry = read_c0_wired();
+ while (entry < current_cpu_data.tlbsize) {
+ write_c0_entryhi(UNIQUE_ENTRYHI(entry));
write_c0_index(entry);
tlb_write_indexed();
+ entry++;
}
write_c0_entryhi(old_ctx);
local_irq_restore(flags);
@@ -111,7 +123,7 @@ void local_flush_tlb_all(void)
* Use increments of the maximum page size (16MB), and check for duplicate
* entries before doing a given write. Then, when we're safe from collisions
* with the firmware, go back and give all the entries invalid addresses with
- * the normal flush routine.
+ * the normal flush routine. Wired entries will be killed as well!
*/
void sb1_sanitize_tlb(void)
{
@@ -165,7 +177,7 @@ void local_flush_tlb_range(struct vm_are
idx = read_c0_index();
write_c0_entrylo0(0);
write_c0_entrylo1(0);
- write_c0_entryhi(KSEG0 + (idx << (PAGE_SHIFT+1)));
+ write_c0_entryhi(UNIQUE_ENTRYHI(idx));
if (idx < 0)
continue;
tlb_write_indexed();
@@ -203,7 +215,7 @@ void local_flush_tlb_kernel_range(unsign
idx = read_c0_index();
write_c0_entrylo0(0);
write_c0_entrylo1(0);
- write_c0_entryhi(KSEG0 + (idx << (PAGE_SHIFT+1)));
+ write_c0_entryhi(UNIQUE_ENTRYHI(idx));
if (idx < 0)
continue;
tlb_write_indexed();
@@ -231,10 +243,10 @@ void local_flush_tlb_page(struct vm_area
idx = read_c0_index();
write_c0_entrylo0(0);
write_c0_entrylo1(0);
- if(idx < 0)
+ if (idx < 0)
goto finish;
/* Make sure all entries differ. */
- write_c0_entryhi(KSEG0+(idx<<(PAGE_SHIFT+1)));
+ write_c0_entryhi(UNIQUE_ENTRYHI(idx));
tlb_write_indexed();
finish:
write_c0_entryhi(oldpid);
@@ -243,29 +255,30 @@ void local_flush_tlb_page(struct vm_area
}
/*
- * This one is only used for pages with the global bit set so we don't care
- * much about the ASID.
+ * Remove one kernel space TLB entry. This entry is assumed to be marked
+ * global so we don't do the ASID thing.
*/
void local_flush_tlb_one(unsigned long page)
{
unsigned long flags;
int oldpid, idx;
- local_irq_save(flags);
page &= (PAGE_MASK << 1);
oldpid = read_c0_entryhi() & ASID_MASK;
+
+ local_irq_save(flags);
write_c0_entryhi(page);
tlb_probe();
idx = read_c0_index();
- write_c0_entrylo0(0);
- write_c0_entrylo1(0);
if (idx >= 0) {
/* Make sure all entries differ. */
- write_c0_entryhi(KSEG0+(idx<<(PAGE_SHIFT+1)));
+ write_c0_entryhi(UNIQUE_ENTRYHI(idx));
+ write_c0_entrylo0(0);
+ write_c0_entrylo1(0);
tlb_write_indexed();
}
- write_c0_entryhi(oldpid);
+ write_c0_entryhi(oldpid);
local_irq_restore(flags);
}
@@ -315,14 +328,43 @@ void __update_tlb(struct vm_area_struct
local_irq_restore(flags);
}
+void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+ unsigned long entryhi, unsigned long pagemask)
+{
+ unsigned long flags;
+ unsigned long wired;
+ unsigned long old_pagemask;
+ unsigned long old_ctx;
+
+ local_irq_save(flags);
+ old_ctx = read_c0_entryhi() & 0xff;
+ old_pagemask = read_c0_pagemask();
+ wired = read_c0_wired();
+ write_c0_wired(wired + 1);
+ write_c0_index(wired);
+
+ write_c0_pagemask(pagemask);
+ write_c0_entryhi(entryhi);
+ write_c0_entrylo0(entrylo0);
+ write_c0_entrylo1(entrylo1);
+ tlb_write_indexed();
+
+ write_c0_entryhi(old_ctx);
+ write_c0_pagemask(old_pagemask);
+
+ local_flush_tlb_all();
+ local_irq_restore(flags);
+}
+
/*
* This is called from loadmmu.c. We have to set up all the
* memory management function pointers, as well as initialize
* the caches and tlbs
*/
-void sb1_tlb_init(void)
+void tlb_init(void)
{
- write_c0_pagemask(PM_4K);
+ write_c0_pagemask(PM_DEFAULT_MASK);
+ write_c0_wired(0);
/*
* We don't know what state the firmware left the TLB's in, so this is
@@ -332,11 +374,13 @@ void sb1_tlb_init(void)
sb1_sanitize_tlb();
#ifdef CONFIG_MIPS32
- memcpy((void *)KSEG0, except_vec0_sb1, 0x80);
- flush_icache_range(KSEG0, KSEG0 + 0x80);
+ memcpy((void *)KSEG0, &except_vec0_sb1, 0x80);
+ memcpy((void *)(KSEG0 + 0x080), &except_vec1_generic, 0x80);
+ flush_icache_range(KSEG0, KSEG0 + 0x100);
#endif
#ifdef CONFIG_MIPS64
- memcpy((void *)KSEG0 + 0x80, except_vec1_sb1, 0x80);
- flush_icache_range(KSEG0 + 0x80, KSEG0 + 0x100);
+ memcpy((void *)CKSEG0, &except_vec0_generic, 0x80);
+ memcpy((void *)(CKSEG0 + 0x80), &except_vec1_sb1, 0x80);
+ flush_icache_range(CKSEG0, CKSEG0 + 0x100);
#endif
}
diff -puN /dev/null arch/mips/momentum/jaguar_atx/dbg_io.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/momentum/jaguar_atx/dbg_io.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,126 @@
+#include <linux/config.h>
+
+#if defined(CONFIG_REMOTE_DEBUG)
+
+#include <asm/serial.h> /* For the serial port location and base baud */
+
+/* --- CONFIG --- */
+
+typedef unsigned char uint8;
+typedef unsigned int uint32;
+
+/* --- END OF CONFIG --- */
+
+#define UART16550_BAUD_2400 2400
+#define UART16550_BAUD_4800 4800
+#define UART16550_BAUD_9600 9600
+#define UART16550_BAUD_19200 19200
+#define UART16550_BAUD_38400 38400
+#define UART16550_BAUD_57600 57600
+#define UART16550_BAUD_115200 115200
+
+#define UART16550_PARITY_NONE 0
+#define UART16550_PARITY_ODD 0x08
+#define UART16550_PARITY_EVEN 0x18
+#define UART16550_PARITY_MARK 0x28
+#define UART16550_PARITY_SPACE 0x38
+
+#define UART16550_DATA_5BIT 0x0
+#define UART16550_DATA_6BIT 0x1
+#define UART16550_DATA_7BIT 0x2
+#define UART16550_DATA_8BIT 0x3
+
+#define UART16550_STOP_1BIT 0x0
+#define UART16550_STOP_2BIT 0x4
+
+/* ----------------------------------------------------- */
+
+/* === CONFIG === */
+
+/* [jsun] we use the second serial port for kdb */
+#define BASE OCELOT_SERIAL1_BASE
+#define MAX_BAUD OCELOT_BASE_BAUD
+
+/* === END OF CONFIG === */
+
+#define REG_OFFSET 4
+
+/* register offset */
+#define OFS_RCV_BUFFER 0
+#define OFS_TRANS_HOLD 0
+#define OFS_SEND_BUFFER 0
+#define OFS_INTR_ENABLE (1*REG_OFFSET)
+#define OFS_INTR_ID (2*REG_OFFSET)
+#define OFS_DATA_FORMAT (3*REG_OFFSET)
+#define OFS_LINE_CONTROL (3*REG_OFFSET)
+#define OFS_MODEM_CONTROL (4*REG_OFFSET)
+#define OFS_RS232_OUTPUT (4*REG_OFFSET)
+#define OFS_LINE_STATUS (5*REG_OFFSET)
+#define OFS_MODEM_STATUS (6*REG_OFFSET)
+#define OFS_RS232_INPUT (6*REG_OFFSET)
+#define OFS_SCRATCH_PAD (7*REG_OFFSET)
+
+#define OFS_DIVISOR_LSB (0*REG_OFFSET)
+#define OFS_DIVISOR_MSB (1*REG_OFFSET)
+
+
+/* memory-mapped read/write of the port */
+#define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
+#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
+
+void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
+{
+ /* disable interrupts */
+ UART16550_WRITE(OFS_INTR_ENABLE, 0);
+
+ /* set up buad rate */
+ {
+ uint32 divisor;
+
+ /* set DIAB bit */
+ UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
+
+ /* set divisor */
+ divisor = MAX_BAUD / baud;
+ UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
+ UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
+
+ /* clear DIAB bit */
+ UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
+ }
+
+ /* set data format */
+ UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
+}
+
+static int remoteDebugInitialized = 0;
+
+uint8 getDebugChar(void)
+{
+ if (!remoteDebugInitialized) {
+ remoteDebugInitialized = 1;
+ debugInit(UART16550_BAUD_38400,
+ UART16550_DATA_8BIT,
+ UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+ }
+
+ while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
+ return UART16550_READ(OFS_RCV_BUFFER);
+}
+
+
+int putDebugChar(uint8 byte)
+{
+ if (!remoteDebugInitialized) {
+ remoteDebugInitialized = 1;
+ debugInit(UART16550_BAUD_38400,
+ UART16550_DATA_8BIT,
+ UART16550_PARITY_NONE, UART16550_STOP_1BIT);
+ }
+
+ while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
+ UART16550_WRITE(OFS_SEND_BUFFER, byte);
+ return 1;
+}
+
+#endif
diff -puN /dev/null arch/mips/momentum/jaguar_atx/int-handler.S
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/momentum/jaguar_atx/int-handler.S 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,129 @@
+/*
+ * Copyright 2002 Momentum Computer Inc.
+ * Author: Matthew Dharm <mdharm@momenco.com>
+ *
+ * Based on work:
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * First-level interrupt dispatcher for Jaguar-ATX board.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+#include "jaguar_atx_fpga.h"
+
+/*
+ * First level interrupt dispatcher for Ocelot-CS board
+ */
+ .align 5
+ NESTED(jaguar_handle_int, PT_SIZE, sp)
+ SAVE_ALL
+ CLI
+ .set at
+ mfc0 t0, CP0_CAUSE
+ mfc0 t2, CP0_STATUS
+
+ and t0, t2
+
+ andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */
+ bnez t1, ll_sw0_irq
+ andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */
+ bnez t1, ll_sw1_irq
+ andi t1, t0, STATUSF_IP2 /* int0 hardware line */
+ bnez t1, ll_pcixa_irq
+ andi t1, t0, STATUSF_IP3 /* int1 hardware line */
+ bnez t1, ll_pcixb_irq
+ andi t1, t0, STATUSF_IP4 /* int2 hardware line */
+ bnez t1, ll_pcia_irq
+ andi t1, t0, STATUSF_IP5 /* int3 hardware line */
+ bnez t1, ll_pcib_irq
+ andi t1, t0, STATUSF_IP6 /* int4 hardware line */
+ bnez t1, ll_uart_irq
+ andi t1, t0, STATUSF_IP7 /* cpu timer */
+ bnez t1, ll_cputimer_irq
+
+ nop
+ nop
+
+ /* now look at extended interrupts */
+ mfc0 t0, CP0_CAUSE
+ cfc0 t1, CP0_S1_INTCONTROL
+
+ /* shift the mask 8 bits left to line up the bits */
+ sll t2, t1, 8
+
+ and t0, t2
+ srl t0, t0, 16
+
+ andi t1, t0, STATUSF_IP8 /* int6 hardware line */
+ bnez t1, ll_mv64340_decode_irq
+
+ nop
+ nop
+
+ .set reorder
+
+ /* wrong alarm or masked ... */
+ j spurious_interrupt
+ nop
+ END(jaguar_handle_int)
+
+ .align 5
+ll_sw0_irq:
+ li a0, 0
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+ll_sw1_irq:
+ li a0, 1
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+ll_pcixa_irq:
+ li a0, 2
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_pcixb_irq:
+ li a0, 3
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_pcia_irq:
+ li a0, 4
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_pcib_irq:
+ li a0, 5
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_uart_irq:
+ li a0, 6
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_cputimer_irq:
+ li a0, 7
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_mv64340_decode_irq:
+ move a0, sp
+ jal ll_mv64340_irq
+ j ret_from_irq
diff -puN /dev/null arch/mips/momentum/jaguar_atx/irq.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/momentum/jaguar_atx/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,90 @@
+/*
+ * Copyright (C) 2002 Momentum Computer, Inc.
+ * Author: Matthew Dharm, mdharm@momenco.com
+ *
+ * Based on work by:
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Author: RidgeRun, Inc.
+ * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <asm/bootinfo.h>
+#include <asm/mipsregs.h>
+
+extern asmlinkage void jaguar_handle_int(void);
+extern void mv64340_irq_init(void);
+
+static struct irqaction cascade_mv64340 = {
+ no_action, SA_INTERRUPT, 0, "cascade via MV64340", NULL, NULL
+};
+
+static struct irqaction unused_irq = {
+ no_action, SA_INTERRUPT, 0, "unused", NULL, NULL
+};
+
+void __init init_IRQ(void)
+{
+ /*
+ * Clear all of the interrupts while we change the able around a bit.
+ * int-handler is not on bootstrap
+ */
+ clear_c0_status(ST0_IM);
+
+ /* Sets the first-level interrupt dispatcher. */
+ set_except_vector(0, jaguar_handle_int);
+ init_generic_irq();
+ mips_cpu_irq_init(0);
+ rm7k_cpu_irq_init(8);
+
+ /* set up the cascading interrupts */
+ setup_irq(8, &cascade_mv64340);
+
+ /* mark unconnected IRQs as unconnected */
+ setup_irq(9, &unused_irq);
+
+ /* mark un-used IRQ numbers as unconnected */
+ setup_irq(10, &unused_irq);
+ setup_irq(13, &unused_irq);
+ setup_irq(14, &unused_irq);
+
+ mv64340_irq_init();
+
+#ifdef CONFIG_REMOTE_DEBUG
+ printk("start kgdb ...\n");
+ set_debug_traps();
+ breakpoint(); /* you may move this line to whereever you want :-) */
+#endif
+}
diff -puN /dev/null arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,56 @@
+/*
+ * Jaguar-ATX Board Register Definitions
+ *
+ * (C) 2002 Momentum Computer Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifndef __JAGUAR_ATX_FPGA_H__
+#define __JAGUAR_ATX_FPGA_H__
+
+#include <linux/config.h>
+
+#ifdef CONFIG_MIPS64
+#define JAGUAR_ATX_CS0_ADDR (0xfffffffffc000000)
+#else
+#define JAGUAR_ATX_CS0_ADDR (0xfc000000)
+#endif
+
+#define JAGUAR_ATX_REG_BOARDREV 0x0
+#define JAGUAR_ATX_REG_FPGA_REV 0x1
+#define JAGUAR_ATX_REG_FPGA_TYPE 0x2
+#define JAGUAR_ATX_REG_RESET_STATUS 0x3
+#define JAGUAR_ATX_REG_BOARD_STATUS 0x4
+#define JAGUAR_ATX_REG_RESERVED1 0x5
+#define JAGUAR_ATX_REG_SET 0x6
+#define JAGUAR_ATX_REG_CLR 0x7
+#define JAGUAR_ATX_REG_EEPROM_MODE 0x9
+#define JAGUAR_ATX_REG_RESERVED2 0xa
+#define JAGUAR_ATX_REG_RESERVED3 0xb
+#define JAGUAR_ATX_REG_RESERVED4 0xc
+#define JAGUAR_ATX_REG_PHY_INTSTAT 0xd
+#define JAGUAR_ATX_REG_RESERVED5 0xe
+#define JAGUAR_ATX_REG_RESERVED6 0xf
+
+#define JAGUAR_FPGA_WRITE(x,y) writeb(x,JAGUAR_ATX_CS0_ADDR+JAGUAR_ATX_REG_##y)
+#define JAGUAR_FPGA_READ(x) readb(JAGUAR_ATX_CS0_ADDR + JAGUAR_ATX_REG_##x)
+
+#endif
diff -puN /dev/null arch/mips/momentum/jaguar_atx/Makefile
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/momentum/jaguar_atx/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,12 @@
+#
+# Makefile for Momentum Computer's Jaguar-ATX board.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+obj-y += mv-irq.o int-handler.o irq.o pci-irq.o prom.o reset.o setup.o
+obj-$(CONFIG_PCI) += pci.o
+
+obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o
diff -puN /dev/null arch/mips/momentum/jaguar_atx/mv-irq.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/momentum/jaguar_atx/mv-irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,162 @@
+/*
+ * Copyright 2002 Momentum Computer
+ * Author: mdharm@momenco.com
+ *
+ * arch/mips/momentum/jaguar_atx/mv-irq.c
+ * Interrupt routines for mv64340. Interrupt numbers are assigned from
+ * MV64340_IRQ_BASE to MV64340_IRQ_BASE + 63.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <asm/ptrace.h>
+#include <linux/sched.h>
+#include <linux/kernel_stat.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mv64340.h>
+
+#define MV64340_IRQ_BASE 16
+
+static inline int ls1bit32(unsigned int x)
+{
+ int b = 31, s;
+
+ s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
+ s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
+ s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
+ s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
+ s = 1; if (x << 1 == 0) s = 0; b -= s;
+
+ return b;
+}
+
+/* mask off an interrupt -- 1 is enable, 0 is disable */
+static inline void mask_mv64340_irq(unsigned int irq)
+{
+ uint32_t value;
+
+ if (irq < (MV64340_IRQ_BASE + 32)) {
+ MV_READ(MV64340_INTERRUPT0_MASK_0_LOW, &value);
+ value &= ~(1 << (irq - MV64340_IRQ_BASE));
+ MV_WRITE(MV64340_INTERRUPT0_MASK_0_LOW, value);
+ } else {
+ MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH, &value);
+ value &= ~(1 << (irq - (MV64340_IRQ_BASE - 32)));
+ MV_WRITE(MV64340_INTERRUPT0_MASK_0_HIGH, value);
+ }
+}
+
+/* unmask an interrupt -- 1 is enable, 0 is disable */
+static inline void unmask_mv64340_irq(unsigned int irq)
+{
+ uint32_t value;
+
+ if (irq < (MV64340_IRQ_BASE + 32)) {
+ MV_READ(MV64340_INTERRUPT0_MASK_0_LOW, &value);
+ value |= 1 << (irq - MV64340_IRQ_BASE);
+ MV_WRITE(MV64340_INTERRUPT0_MASK_0_LOW, value);
+ } else {
+ MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH, &value);
+ value |= 1 << (irq - (MV64340_IRQ_BASE - 32));
+ MV_WRITE(MV64340_INTERRUPT0_MASK_0_HIGH, value);
+ }
+}
+
+/*
+ * Enables the IRQ on Marvell Chip
+ */
+static void enable_mv64340_irq(unsigned int irq)
+{
+ unmask_mv64340_irq(irq);
+}
+
+/*
+ * Initialize the IRQ on Marvell Chip
+ */
+static unsigned int startup_mv64340_irq(unsigned int irq)
+{
+ unmask_mv64340_irq(irq);
+ return 0;
+}
+
+/*
+ * Disables the IRQ on Marvell Chip
+ */
+static void disable_mv64340_irq(unsigned int irq)
+{
+ mask_mv64340_irq(irq);
+}
+
+/*
+ * Masks and ACKs an IRQ
+ */
+static void mask_and_ack_mv64340_irq(unsigned int irq)
+{
+ mask_mv64340_irq(irq);
+}
+
+/*
+ * End IRQ processing
+ */
+static void end_mv64340_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ unmask_mv64340_irq(irq);
+}
+
+/*
+ * Interrupt handler for interrupts coming from the Marvell chip.
+ * It could be built in ethernet ports etc...
+ */
+void ll_mv64340_irq(struct pt_regs *regs)
+{
+ unsigned int irq_src_low, irq_src_high;
+ unsigned int irq_mask_low, irq_mask_high;
+
+ /* read the interrupt status registers */
+ MV_READ(MV64340_INTERRUPT0_MASK_0_LOW, &irq_mask_low);
+ MV_READ(MV64340_INTERRUPT0_MASK_0_HIGH, &irq_mask_high);
+ MV_READ(MV64340_MAIN_INTERRUPT_CAUSE_LOW, &irq_src_low);
+ MV_READ(MV64340_MAIN_INTERRUPT_CAUSE_HIGH, &irq_src_high);
+
+ /* mask for just the interrupts we want */
+ irq_src_low &= irq_mask_low;
+ irq_src_high &= irq_mask_high;
+
+ if (irq_src_low)
+ do_IRQ(ls1bit32(irq_src_low) + MV64340_IRQ_BASE, regs);
+ else
+ do_IRQ(ls1bit32(irq_src_high) + MV64340_IRQ_BASE + 32, regs);
+}
+
+#define shutdown_mv64340_irq disable_mv64340_irq
+
+struct hw_interrupt_type mv64340_irq_type = {
+ "MV-64340",
+ startup_mv64340_irq,
+ shutdown_mv64340_irq,
+ enable_mv64340_irq,
+ disable_mv64340_irq,
+ mask_and_ack_mv64340_irq,
+ end_mv64340_irq,
+ NULL
+};
+
+void mv64340_irq_init(void)
+{
+ int i;
+
+ /* Reset irq handlers pointers to NULL */
+ for (i = MV64340_IRQ_BASE; i < (MV64340_IRQ_BASE + 64); i++) {
+ irq_desc[i].status = IRQ_DISABLED;
+ irq_desc[i].action = 0;
+ irq_desc[i].depth = 2;
+ irq_desc[i].handler = &mv64340_irq_type;
+ }
+}
diff -puN /dev/null arch/mips/momentum/jaguar_atx/pci.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/momentum/jaguar_atx/pci.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,55 @@
+/*
+ * Copyright 2002 Momentum Computer
+ * Author: Matthew Dharm <mdharm@momenco.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <asm/pci.h>
+#include <asm/io.h>
+#include <asm/mv64340.h>
+
+void mv64340_board_pcibios_fixup_bus(struct pci_bus* c);
+
+struct pci_fixup pcibios_fixups[] = {
+ {0}
+};
+
+void __init pcibios_fixup_bus(struct pci_bus *c)
+{
+ mv64340_board_pcibios_fixup_bus(c);
+}
+
+void __init pcibios_init(void)
+{
+ /* Reset PCI I/O and PCI MEM values */
+ ioport_resource.start = 0xe0000000;
+ ioport_resource.end = 0xe0000000 + 0x20000000 - 1;
+ iomem_resource.start = 0xc0000000;
+ iomem_resource.end = 0xc0000000 + 0x20000000 - 1;
+
+ pci_scan_bus(0, &mv64340_bus0_pci_ops, NULL);
+ pci_scan_bus(1, &mv64340_bus1_pci_ops, NULL);
+}
diff -puN /dev/null arch/mips/momentum/jaguar_atx/pci-irq.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/momentum/jaguar_atx/pci-irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2002 Momentum Computer Inc.
+ * Author: Matthew Dharm <mdharm@momenco.com>
+ *
+ * Based on work for the Linux port to the Ocelot board, which is
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * arch/mips/momentum/jaguar/pci.c
+ * Board-specific PCI routines for mv64340 controller.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <asm/pci.h>
+
+
+void __init mv64340_board_pcibios_fixup_bus(struct pci_bus *bus)
+{
+ struct pci_bus *current_bus = bus;
+ struct pci_dev *devices;
+ struct list_head *devices_link;
+ u16 cmd;
+
+ /* loop over all known devices on this bus */
+ list_for_each(devices_link, &(current_bus->devices)) {
+
+ devices = pci_dev_b(devices_link);
+ if (devices == NULL)
+ continue;
+
+ if ((current_bus->number == 0) &&
+ (PCI_SLOT(devices->devfn) == 1)) {
+ /* PCI-X A */
+ devices->irq = 3;
+ } else if ((current_bus->number == 0) &&
+ (PCI_SLOT(devices->devfn) == 2)) {
+ /* PCI-X B */
+ devices->irq = 4;
+ } else if ((current_bus->number == 1) &&
+ (PCI_SLOT(devices->devfn) == 1)) {
+ /* PCI A */
+ devices->irq = 5;
+ } else if ((current_bus->number == 1) &&
+ (PCI_SLOT(devices->devfn) == 2)) {
+ /* PCI B */
+ devices->irq = 6;
+ } else {
+ /* We don't have assign interrupts for other devices. */
+ devices->irq = 0xff;
+ }
+
+ /* Assign an interrupt number for the device */
+ bus->ops->write_byte(devices, PCI_INTERRUPT_LINE, devices->irq);
+
+ /* enable master for everything but the MV-64340 */
+ if (((current_bus->number != 0) && (current_bus->number != 1))
+ || (PCI_SLOT(devices->devfn) != 0)) {
+ bus->ops->read_word(devices, PCI_COMMAND, &cmd);
+ cmd |= PCI_COMMAND_MASTER;
+ bus->ops->write_word(devices, PCI_COMMAND, cmd);
+ }
+ }
+}
diff -puN /dev/null arch/mips/momentum/jaguar_atx/prom.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/momentum/jaguar_atx/prom.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,248 @@
+/*
+ * Copyright 2002 Momentum Computer Inc.
+ * Author: Matthew Dharm <mdharm@momenco.com>
+ *
+ * Louis Hamilton, Red Hat, Inc.
+ * hamilton@redhat.com [MIPS64 modifications]
+ *
+ * Based on Ocelot Linux port, which is
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <asm/mv64340.h>
+
+#include "jaguar_atx_fpga.h"
+
+
+struct callvectors {
+ int (*open) (char*, int, int);
+ int (*close) (int);
+ int (*read) (int, void*, int);
+ int (*write) (int, void*, int);
+ off_t (*lseek) (int, off_t, int);
+ int (*printf) (const char*, ...);
+ void (*cacheflush) (void);
+ char* (*gets) (char*);
+};
+
+struct callvectors* debug_vectors;
+
+extern unsigned long mv64340_base;
+extern unsigned long cpu_clock;
+
+#ifdef CONFIG_MV64340_ETH
+extern unsigned char prom_mac_addr_base[6];
+#endif
+
+const char *get_system_type(void)
+{
+ return "Momentum Jaguar-ATX";
+}
+
+#ifdef CONFIG_MV64340_ETH
+static void burn_clocks(void)
+{
+ int i;
+
+ /* this loop should burn at least 1us -- this should be plenty */
+ for (i = 0; i < 0x10000; i++)
+ ;
+}
+
+static u8 exchange_bit(u8 val, u8 cs)
+{
+ /* place the data */
+ JAGUAR_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
+ burn_clocks();
+
+ /* turn the clock on */
+ JAGUAR_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
+ burn_clocks();
+
+ /* turn the clock off and read-strobe */
+ JAGUAR_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
+
+ /* return the data */
+ return ((JAGUAR_FPGA_READ(EEPROM_MODE) >> 3) & 0x1);
+}
+
+void get_mac(char dest[6])
+{
+ u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+ int i,j;
+
+ for (i = 0; i < 12; i++)
+ exchange_bit(read_opcode[i], 1);
+
+ for (j = 0; j < 6; j++) {
+ dest[j] = 0;
+ for (i = 0; i < 8; i++) {
+ dest[j] <<= 1;
+ dest[j] |= exchange_bit(0, 1);
+ }
+ }
+
+ /* turn off CS */
+ exchange_bit(0,0);
+}
+#endif
+
+
+#ifdef CONFIG_MIPS64
+
+unsigned long signext(unsigned long addr)
+{
+ addr &= 0xffffffff;
+ return (unsigned long)((int)addr);
+}
+
+void *get_arg(unsigned long args, int arc)
+{
+ unsigned long ul;
+ unsigned char *puc, uc;
+
+ args += (arc * 4);
+ ul = (unsigned long)signext(args);
+ puc = (unsigned char *)ul;
+ if (puc == 0)
+ return (void *)0;
+
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+ uc = *puc++;
+ ul = (unsigned long)uc;
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 8);
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 16);
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 24);
+#else
+ uc = *puc++;
+ ul = ((unsigned long)uc) << 24;
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 16);
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 8);
+ uc = *puc++;
+ ul |= ((unsigned long)uc);
+#endif
+ ul = signext(ul);
+ return (void *)ul;
+}
+
+char *arg64(unsigned long addrin, int arg_index)
+{
+ unsigned long args;
+ char *p;
+ args = signext(addrin);
+ p = (char *)get_arg(args, arg_index);
+ return p;
+}
+#endif /* CONFIG_MIPS64 */
+
+/* PMON passes arguments in C main() style */
+void __init prom_init(void)
+{
+ int argc = fw_arg0;
+ char **arg = (char **) fw_arg1;
+ char **env = (char **) fw_arg2;
+ int i;
+#ifdef CONFIG_MIPS64
+ char *ptr;
+
+ printk("Mips64 Jaguar-ATX\n");
+ /* save the PROM vectors for debugging use */
+ debug_vectors = (struct callvectors *)signext((unsigned long)cv);
+
+ /* arg[0] is "g", the rest is boot parameters */
+ arcs_cmdline[0] = '\0';
+
+ for (i = 1; i < argc; i++) {
+ ptr = (char *)arg64((unsigned long)arg, i);
+ if ((strlen(arcs_cmdline) + strlen(ptr) + 1) >=
+ sizeof(arcs_cmdline))
+ break;
+ strcat(arcs_cmdline, ptr);
+ strcat(arcs_cmdline, " ");
+ }
+
+ i = 0;
+ while (1) {
+ ptr = (char *)arg64((unsigned long)env, i);
+ if (! ptr)
+ break;
+
+ if (strncmp("gtbase", ptr, strlen("gtbase")) == 0) {
+ mv64340_base = simple_strtol(ptr + strlen("gtbase="),
+ NULL, 16);
+
+ if ((mv64340_base & 0xffffffff00000000) == 0)
+ mv64340_base |= 0xffffffff00000000;
+
+ printk("mv64340_base set to 0x%016lx\n", mv64340_base);
+ }
+ if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) {
+ cpu_clock = simple_strtol(ptr + strlen("cpuclock="),
+ NULL, 10);
+ printk("cpu_clock set to %d\n", cpu_clock);
+ }
+ i++;
+ }
+ printk("arcs_cmdline: %s\n", arcs_cmdline);
+
+#else /* CONFIG_MIPS64 */
+ /* save the PROM vectors for debugging use */
+ debug_vectors = cv;
+
+ /* arg[0] is "g", the rest is boot parameters */
+ arcs_cmdline[0] = '\0';
+ for (i = 1; i < argc; i++) {
+ if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
+ >= sizeof(arcs_cmdline))
+ break;
+ strcat(arcs_cmdline, arg[i]);
+ strcat(arcs_cmdline, " ");
+ }
+
+ while (*env) {
+ if (strncmp("gtbase", *env, strlen("gtbase")) == 0) {
+ mv64340_base = simple_strtol(*env + strlen("gtbase="),
+ NULL, 16);
+ }
+ if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) {
+ cpu_clock = simple_strtol(*env + strlen("cpuclock="),
+ NULL, 10);
+ }
+ env++;
+ }
+#endif /* CONFIG_MIPS64 */
+ mips_machgroup = MACH_GROUP_MOMENCO;
+ mips_machtype = MACH_MOMENCO_JAGUAR_ATX;
+
+#ifdef CONFIG_MV64340_ETH
+ /* get the base MAC address for on-board ethernet ports */
+ get_mac(prom_mac_addr_base);
+#endif
+
+#ifndef CONFIG_MIPS64
+ debug_vectors->printf("Booting Linux kernel...\n");
+#endif
+}
+
+unsigned long __init prom_free_prom_memory(void)
+{
+ return 0;
+}
diff -puN /dev/null arch/mips/momentum/jaguar_atx/reset.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/momentum/jaguar_atx/reset.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,57 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Copyright (C) 1997, 2001 Ralf Baechle
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * Copyright (C) 2002 Momentum Computer Inc.
+ * Author: Matthew Dharm <mdharm@momenco.com>
+ *
+ * Louis Hamilton, Red Hat, Inc.
+ * hamilton@redhat.com [MIPS64 modifications]
+ */
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+#include <linux/delay.h>
+
+void momenco_jaguar_restart(char *command)
+{
+ /* base address of timekeeper portion of part */
+#ifdef CONFIG_MIPS64
+ void *nvram = (void*) 0xfffffffffc807000;
+#else
+ void *nvram = (void*) 0xfc807000;
+#endif
+ /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */
+ writeb(0x84, nvram + 0xff7);
+
+ /* wait for the watchdog to go off */
+ mdelay(100+(1000/16));
+
+ /* if the watchdog fails for some reason, let people know */
+ printk(KERN_NOTICE "Watchdog reset failed\n");
+}
+
+void momenco_jaguar_halt(void)
+{
+ printk(KERN_NOTICE "\n** You can safely turn off the power\n");
+ while (1)
+ __asm__(".set\tmips3\n\t"
+ "wait\n\t"
+ ".set\tmips0");
+}
+
+void momenco_jaguar_power_off(void)
+{
+ momenco_jaguar_halt();
+}
diff -puN /dev/null arch/mips/momentum/jaguar_atx/setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/momentum/jaguar_atx/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,360 @@
+/*
+ * setup.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Momentum Computer Jaguar-ATX board dependent boot routines
+ *
+ * Copyright (C) 1996, 1997, 2001 Ralf Baechle
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Copyright (C) 2001 Red Hat, Inc.
+ * Copyright (C) 2002 Momentum Computer
+ *
+ * Author: Matthew Dharm, Momentum Computer
+ * mdharm@momenco.com
+ *
+ * Louis Hamilton, Red Hat, Inc.
+ * hamilton@redhat.com [MIPS64 modifications]
+ *
+ * Author: RidgeRun, Inc.
+ * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/ioport.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/timex.h>
+#include <linux/vmalloc.h>
+#include <asm/time.h>
+#include <asm/bootinfo.h>
+#include <asm/page.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/pci.h>
+#include <asm/processor.h>
+#include <asm/ptrace.h>
+#include <asm/reboot.h>
+#include <linux/bootmem.h>
+#include <linux/blk.h>
+#include <asm/mv64340.h>
+#include "jaguar_atx_fpga.h"
+
+
+unsigned long mv64340_base;
+extern unsigned long mv64340_sram_base;
+unsigned long cpu_clock;
+
+/* These functions are used for rebooting or halting the machine*/
+extern void momenco_jaguar_restart(char *command);
+extern void momenco_jaguar_halt(void);
+extern void momenco_jaguar_power_off(void);
+
+void momenco_time_init(void);
+
+static char reset_reason;
+
+#define ENTRYLO(x) ((pte_val(mk_pte_phys((x), PAGE_KERNEL_UNCACHED)) >> 6)|1)
+
+void __init bus_error_init(void) { /* nothing */ }
+
+/* setup code for a handoff from a version 2 PMON 2000 PROM */
+void PMON_v2_setup(void)
+{
+ /* Some wired TLB entries for the MV64340 and perhiperals. The
+ MV64340 is going to be hit on every IRQ anyway - there's
+ absolutely no point in letting it be a random TLB entry, as
+ it'll just cause needless churning of the TLB. And we use
+ the other half for the serial port, which is just a PITA
+ otherwise :)
+
+ Device Physical Virtual
+ MV64340 Internal Regs 0xf4000000 0xf4000000
+ Ocelot-C[S] PLD (CS0) 0xfc000000 0xfc000000
+ NVRAM (CS1) 0xfc800000 0xfc800000
+ UARTs (CS2) 0xfd000000 0xfd000000
+ Internal SRAM 0xfe000000 0xfe000000
+ M-Systems DOC (CS3) 0xff000000 0xff000000
+ */
+ printk("PMON_v2_setup\n");
+
+#ifdef CONFIG_MIPS64
+ /* marvell and extra space */
+ add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xfffffffff4000000, PM_64K);
+ /* fpga, rtc, and uart */
+ add_wired_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfd000000), 0xfffffffffc000000, PM_16M);
+ /* m-sys and internal SRAM */
+ add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfffffffffe000000, PM_16M);
+
+ mv64340_base = 0xfffffffff4000000;
+ mv64340_sram_base = 0xfffffffffe000000;
+#else
+ /* marvell and extra space */
+ add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xf4000000, PM_64K);
+ /* fpga, rtc, and uart */
+ add_wired_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfd000000), 0xfc000000, PM_16M);
+ /* m-sys and internal SRAM */
+ add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfe000000, PM_16M);
+
+ mv64340_base = 0xf4000000;
+ mv64340_sram_base = 0xfe000000;
+#endif
+}
+
+#define CONV_BCD_TO_BIN(val) (((val) & 0xf) + (((val) >> 4) * 10))
+#define CONV_BIN_TO_BCD(val) (((val) % 10) + (((val) / 10) << 4))
+
+unsigned long m48t37y_get_time(void)
+{
+#ifdef CONFIG_MIPS64
+ unsigned char *rtc_base = (unsigned char*)0xfffffffffc800000;
+#else
+ unsigned char *rtc_base = (unsigned char*)0xfc800000;
+#endif
+ unsigned int year, month, day, hour, min, sec;
+
+ /* stop the update */
+ rtc_base[0x7ff8] = 0x40;
+
+ year = CONV_BCD_TO_BIN(rtc_base[0x7fff]);
+ year += CONV_BCD_TO_BIN(rtc_base[0x7ff1]) * 100;
+
+ month = CONV_BCD_TO_BIN(rtc_base[0x7ffe]);
+
+ day = CONV_BCD_TO_BIN(rtc_base[0x7ffd]);
+
+ hour = CONV_BCD_TO_BIN(rtc_base[0x7ffb]);
+ min = CONV_BCD_TO_BIN(rtc_base[0x7ffa]);
+ sec = CONV_BCD_TO_BIN(rtc_base[0x7ff9]);
+
+ /* start the update */
+ rtc_base[0x7ff8] = 0x00;
+
+ return mktime(year, month, day, hour, min, sec);
+}
+
+int m48t37y_set_time(unsigned long sec)
+{
+#ifdef CONFIG_MIPS64
+ unsigned char *rtc_base = (unsigned char*)0xfffffffffc800000;
+#else
+ unsigned char *rtc_base = (unsigned char*)0xfc800000;
+#endif
+ struct rtc_time tm;
+
+ /* convert to a more useful format -- note months count from 0 */
+ to_tm(sec, &tm);
+ tm.tm_mon += 1;
+
+ /* enable writing */
+ rtc_base[0x7ff8] = 0x80;
+
+ /* year */
+ rtc_base[0x7fff] = CONV_BIN_TO_BCD(tm.tm_year % 100);
+ rtc_base[0x7ff1] = CONV_BIN_TO_BCD(tm.tm_year / 100);
+
+ /* month */
+ rtc_base[0x7ffe] = CONV_BIN_TO_BCD(tm.tm_mon);
+
+ /* day */
+ rtc_base[0x7ffd] = CONV_BIN_TO_BCD(tm.tm_mday);
+
+ /* hour/min/sec */
+ rtc_base[0x7ffb] = CONV_BIN_TO_BCD(tm.tm_hour);
+ rtc_base[0x7ffa] = CONV_BIN_TO_BCD(tm.tm_min);
+ rtc_base[0x7ff9] = CONV_BIN_TO_BCD(tm.tm_sec);
+
+ /* day of week -- not really used, but let's keep it up-to-date */
+ rtc_base[0x7ffc] = CONV_BIN_TO_BCD(tm.tm_wday + 1);
+
+ /* disable writing */
+ rtc_base[0x7ff8] = 0x00;
+
+ return 0;
+}
+
+void momenco_timer_setup(struct irqaction *irq)
+{
+ setup_irq(8, irq);
+}
+
+void momenco_time_init(void)
+{
+ mips_hpt_frequency = cpu_clock / 2;
+ board_timer_setup = momenco_timer_setup;
+
+ rtc_get_time = m48t37y_get_time;
+ rtc_set_time = m48t37y_set_time;
+}
+
+static void __init momenco_jaguar_atx_setup(void)
+{
+ unsigned int tmpword;
+
+ board_time_init = momenco_time_init;
+
+ _machine_restart = momenco_jaguar_restart;
+ _machine_halt = momenco_jaguar_halt;
+ _machine_power_off = momenco_jaguar_power_off;
+
+ /*
+ * initrd_start = (ulong)jaguar_initrd_start;
+ * initrd_end = (ulong)jaguar_initrd_start + (ulong)jaguar_initrd_size;
+ * initrd_below_start_ok = 1;
+ */
+
+ /* do handoff reconfiguration */
+ PMON_v2_setup();
+
+ /* shut down ethernet ports, just to be sure our memory doesn't get
+ * corrupted by random ethernet traffic.
+ */
+ MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8);
+ MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8);
+ MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(2), 0xff << 8);
+ MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8);
+ MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8);
+ MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(2), 0xff << 8);
+ do {}
+ while (MV_READ_DATA(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff);
+ do {}
+ while (MV_READ_DATA(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff);
+ do {}
+ while (MV_READ_DATA(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(2)) & 0xff);
+ do {}
+ while (MV_READ_DATA(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff);
+ do {}
+ while (MV_READ_DATA(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff);
+ do {}
+ while (MV_READ_DATA(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(2)) & 0xff);
+ MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0), MV_READ_DATA(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1);
+ MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1), MV_READ_DATA(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1);
+ MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(2), MV_READ_DATA(MV64340_ETH_PORT_SERIAL_CONTROL_REG(2)) & ~1);
+
+ /* Turn off the Bit-Error LED */
+ JAGUAR_FPGA_WRITE(0x80, CLR);
+
+ tmpword = JAGUAR_FPGA_READ(BOARDREV);
+ if (tmpword < 26)
+ printk("Momentum Jaguar-ATX: Board Assembly Rev. %c\n",
+ 'A'+tmpword);
+ else
+ printk("Momentum Jaguar-ATX: Board Assembly Revision #0x%x\n",
+ tmpword);
+
+ tmpword = JAGUAR_FPGA_READ(FPGA_REV);
+ printk("FPGA Rev: %d.%d\n", tmpword>>4, tmpword&15);
+ tmpword = JAGUAR_FPGA_READ(RESET_STATUS);
+ printk("Reset reason: 0x%x\n", tmpword);
+ switch (tmpword) {
+ case 0x1:
+ printk(" - Power-up reset\n");
+ break;
+ case 0x2:
+ printk(" - Push-button reset\n");
+ break;
+ case 0x8:
+ printk(" - Watchdog reset\n");
+ break;
+ case 0x10:
+ printk(" - JTAG reset\n");
+ break;
+ default:
+ printk(" - Unknown reset cause\n");
+ }
+ reset_reason = tmpword;
+ JAGUAR_FPGA_WRITE(0xff, RESET_STATUS);
+
+ tmpword = JAGUAR_FPGA_READ(BOARD_STATUS);
+ printk("Board Status register: 0x%02x\n", tmpword);
+ printk(" - User jumper: %s\n", (tmpword & 0x80)?"installed":"absent");
+ printk(" - Boot flash write jumper: %s\n", (tmpword&0x40)?"installed":"absent");
+
+ /* 256MiB of RM9000x2 DDR */
+// add_memory_region(0x0, 0x100<<20, BOOT_MEM_RAM);
+
+ /* 128MiB of MV-64340 DDR */
+// add_memory_region(0x100<<20, 0x80<<20, BOOT_MEM_RAM);
+
+ /* XXX Memory configuration should be picked up from PMON2k */
+#ifdef CONFIG_JAGUAR_DMALOW
+ printk("Jaguar ATX DMA-low mode set\n");
+ add_memory_region(0x00000000, 0x08000000, BOOT_MEM_RAM);
+ add_memory_region(0x08000000, 0x10000000, BOOT_MEM_RAM);
+#else
+ /* 128MiB of MV-64340 DDR RAM */
+ printk("Jaguar ATX DMA-low mode is not set\n");
+ add_memory_region(0x100<<20, 0x80<<20, BOOT_MEM_RAM);
+#endif
+
+#ifdef GEMDEBUG_TRACEBUFFER
+ {
+ unsigned int tbControl;
+ tbControl =
+ 0 << 26 | /* post trigger delay 0 */
+ 0x2 << 16 | /* sequential trace mode */
+ // 0x0 << 16 | /* non-sequential trace mode */
+ // 0xf << 4 | /* watchpoints disabled */
+ 2 << 2 | /* armed */
+ 2 ; /* interrupt disabled */
+ printk ("setting tbControl = %08lx\n", tbControl);
+ write_32bit_cp0_set1_register($22, tbControl);
+ __asm__ __volatile__(".set noreorder\n\t" \
+ "nop; nop; nop; nop; nop; nop;\n\t" \
+ "nop; nop; nop; nop; nop; nop;\n\t" \
+ ".set reorder\n\t");
+
+ }
+#endif
+}
+
+early_initcall(momenco_jaguar_atx_setup);
+
+
+#ifndef CONFIG_MIPS64
+/* This needs to be one of the first initcalls, because no I/O port access
+ can work before this */
+static int io_base_ioremap(void)
+{
+ /* we're mapping PCI accesses from 0xc0000000 to 0xf0000000 */
+ void *io_remap_range = ioremap(0xc0000000, 0x30000000);
+
+ printk("*** io_base_ioremap\n");
+ if (!io_remap_range) {
+ panic("Could not ioremap I/O port range");
+ }
+ printk("io_remap_range set at 0x%08x\n", (uint32_t)io_remap_range);
+ set_io_port_base(io_remap_range - 0xc0000000);
+
+ return 0;
+}
+
+module_init(io_base_ioremap);
+#endif
diff -puN arch/mips/momentum/ocelot_c/cpci-irq.c~mips-megapatch arch/mips/momentum/ocelot_c/cpci-irq.c
--- 25/arch/mips/momentum/ocelot_c/cpci-irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_c/cpci-irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -22,7 +22,6 @@
#include <linux/irq.h>
#include <linux/kernel.h>
#include <asm/ptrace.h>
-#include <linux/config.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <asm/io.h>
diff -puN arch/mips/momentum/ocelot_c/int-handler.S~mips-megapatch arch/mips/momentum/ocelot_c/int-handler.S
--- 25/arch/mips/momentum/ocelot_c/int-handler.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_c/int-handler.S 2004-02-19 12:53:00.000000000 -0800
@@ -12,8 +12,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#define __ASSEMBLY__
-#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
diff -puN arch/mips/momentum/ocelot_c/irq.c~mips-megapatch arch/mips/momentum/ocelot_c/irq.c
--- 25/arch/mips/momentum/ocelot_c/irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_c/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -28,6 +28,7 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
+#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
@@ -47,120 +48,31 @@
#include <asm/mipsregs.h>
#include <asm/system.h>
-
-static spinlock_t irq_lock = SPIN_LOCK_UNLOCKED;
-
-/* Function for careful CP0 interrupt mask access */
-static inline void modify_cp0_intmask(unsigned clr_mask_in, unsigned set_mask_in)
-{
- unsigned long status;
- unsigned clr_mask;
- unsigned set_mask;
-
- /* do the low 8 bits first */
- clr_mask = 0xff & clr_mask_in;
- set_mask = 0xff & set_mask_in;
- status = read_c0_status();
- status &= ~((clr_mask & 0xFF) << 8);
- status |= (set_mask & 0xFF) << 8;
- write_c0_status(status);
-}
-
-static inline void mask_irq(unsigned int irq)
-{
- modify_cp0_intmask(irq, 0);
-}
-
-static inline void unmask_irq(unsigned int irq)
-{
- modify_cp0_intmask(0, irq);
-}
-
-static void enable_cp7000_irq(unsigned int irq)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&irq_lock, flags);
- unmask_irq(1 << irq);
- spin_unlock_irqrestore(&irq_lock, flags);
-}
-
-static unsigned int startup_cp7000_irq(unsigned int irq)
-{
- enable_cp7000_irq(irq);
-
- return 0; /* never anything pending */
-}
-
-static void disable_cp7000_irq(unsigned int irq)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&irq_lock, flags);
- mask_irq(1 << irq);
- spin_unlock_irqrestore(&irq_lock, flags);
-}
-
-#define shutdown_cp7000_irq disable_cp7000_irq
-
-static void mask_and_ack_cp7000_irq(unsigned int irq)
-{
- mask_irq(1 << irq);
-}
-
-static void end_cp7000_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- unmask_irq(1 << irq);
-}
-
-static struct hw_interrupt_type cp7000_hpcdma_irq_type = {
-#ifdef CONFIG_CPU_SR71000
- "SR71000",
-#else
- "RM7000",
-#endif
- startup_cp7000_irq,
- shutdown_cp7000_irq,
- enable_cp7000_irq,
- disable_cp7000_irq,
- mask_and_ack_cp7000_irq,
- end_cp7000_irq,
- NULL
-};
-
extern asmlinkage void ocelot_handle_int(void);
extern void mv64340_irq_init(void);
extern void uart_irq_init(void);
extern void cpci_irq_init(void);
-static struct irqaction cascade_fpga =
- { no_action, SA_INTERRUPT, 0, "cascade via FPGA", NULL, NULL };
-static struct irqaction cascade_mv64340 =
- { no_action, SA_INTERRUPT, 0, "cascade via MV64340", NULL, NULL };
+static struct irqaction cascade_fpga = {
+ no_action, SA_INTERRUPT, 0, "cascade via FPGA", NULL, NULL
+};
+
+static struct irqaction cascade_mv64340 = {
+ no_action, SA_INTERRUPT, 0, "cascade via MV64340", NULL, NULL
+};
void __init init_IRQ(void)
{
- int i;
-
/*
* Clear all of the interrupts while we change the able around a bit.
* int-handler is not on bootstrap
*/
- clear_c0_status(ST0_IM | ST0_BEV);
- __cli();
+ clear_c0_status(ST0_IM);
/* Sets the first-level interrupt dispatcher. */
set_except_vector(0, ocelot_handle_int);
init_generic_irq();
-
- /* set up handler for first 8 IRQs as the CPU */
- for (i = 0; i < 8; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &cp7000_hpcdma_irq_type;
- }
+ mips_cpu_irq_init(0);
/* set up the cascading interrupts */
setup_irq(3, &cascade_fpga);
@@ -176,7 +88,4 @@ void __init init_IRQ(void)
set_debug_traps();
breakpoint(); /* you may move this line to whereever you want :-) */
#endif
-#ifdef CONFIG_GDB_CONSOLE
- register_gdb_console();
-#endif
}
diff -puN arch/mips/momentum/ocelot_c/mv-irq.c~mips-megapatch arch/mips/momentum/ocelot_c/mv-irq.c
--- 25/arch/mips/momentum/ocelot_c/mv-irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_c/mv-irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -4,7 +4,7 @@
*
* arch/mips/momentum/ocelot_c/mv-irq.c
* Interrupt routines for mv64340. Interrupt numbers are assigned from
- * MV64340_IRQ_BASE to MV64340_IRQ_BASE+64.
+ * MV64340_IRQ_BASE to MV64340_IRQ_BASE+63.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -17,7 +17,6 @@
#include <linux/irq.h>
#include <linux/kernel.h>
#include <asm/ptrace.h>
-#include <linux/config.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <asm/io.h>
diff -puN arch/mips/momentum/ocelot_c/ocelot_c_fpga.h~mips-megapatch arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
--- 25/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h 2004-02-19 12:53:00.000000000 -0800
@@ -22,11 +22,21 @@
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Louis Hamilton, Red Hat, Inc.
+ * hamilton@redhat.com [MIPS64 modifications]
*/
+
#ifndef __OCELOT_C_FPGA_H__
#define __OCELOT_C_FPGA_H__
-#define OCELOT_C_CS0_ADDR (0xfc000000)
+#include <linux/config.h>
+
+#ifdef CONFIG_MIPS64
+#define OCELOT_C_CS0_ADDR (0xfffffffffc000000)
+#else
+#define OCELOT_C_CS0_ADDR (0xfc000000)
+#endif
#define OCELOT_C_REG_BOARDREV 0x0
#define OCELOT_C_REG_FPGA_REV 0x1
diff -puN arch/mips/momentum/ocelot_c/pci-irq.c~mips-megapatch arch/mips/momentum/ocelot_c/pci-irq.c
--- 25/arch/mips/momentum/ocelot_c/pci-irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_c/pci-irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -17,7 +17,6 @@
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
-#include <linux/version.h>
#include <linux/init.h>
#include <asm/pci.h>
diff -puN arch/mips/momentum/ocelot_c/prom.c~mips-megapatch arch/mips/momentum/ocelot_c/prom.c
--- 25/arch/mips/momentum/ocelot_c/prom.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_c/prom.c 2004-02-19 12:53:00.000000000 -0800
@@ -2,6 +2,9 @@
* Copyright 2002 Momentum Computer Inc.
* Author: Matthew Dharm <mdharm@momenco.com>
*
+ * Louis Hamilton, Red Hat, Inc.
+ * hamilton@redhat.com [MIPS64 modifications]
+ *
* Based on Ocelot Linux port, which is
* Copyright 2001 MontaVista Software Inc.
* Author: jsun@mvista.com or jsun@junsun.net
@@ -35,7 +38,6 @@ struct callvectors {
};
struct callvectors* debug_vectors;
-char arcs_cmdline[CL_SIZE];
extern unsigned long mv64340_base;
extern unsigned long cpu_clock;
@@ -101,11 +103,110 @@ void get_mac(char dest[6])
}
#endif
+
+#ifdef CONFIG_MIPS64
+
+unsigned long signext(unsigned long addr)
+{
+ addr &= 0xffffffff;
+ return (unsigned long)((int)addr);
+}
+
+void *get_arg(unsigned long args, int arc)
+{
+ unsigned long ul;
+ unsigned char *puc, uc;
+
+ args += (arc * 4);
+ ul = (unsigned long)signext(args);
+ puc = (unsigned char *)ul;
+ if (puc == 0)
+ return (void *)0;
+
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+ uc = *puc++;
+ ul = (unsigned long)uc;
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 8);
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 16);
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 24);
+#else /* CONFIG_CPU_LITTLE_ENDIAN */
+ uc = *puc++;
+ ul = ((unsigned long)uc) << 24;
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 16);
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 8);
+ uc = *puc++;
+ ul |= ((unsigned long)uc);
+#endif /* CONFIG_CPU_LITTLE_ENDIAN */
+ ul = signext(ul);
+ return (void *)ul;
+}
+
+char *arg64(unsigned long addrin, int arg_index)
+{
+ unsigned long args;
+ char *p;
+ args = signext(addrin);
+ p = (char *)get_arg(args, arg_index);
+ return p;
+}
+#endif /* CONFIG_MIPS64 */
+
+
/* [jsun@junsun.net] PMON passes arguments in C main() style */
-void __init prom_init(int argc, char **arg, char** env, struct callvectors *cv)
+void __init prom_init(void)
{
+ int argc = fw_arg0;
+ char **arg = (char **) fw_arg1;
+ char **env = (char **) fw_arg2;
int i;
+#ifdef CONFIG_MIPS64
+ char *ptr;
+
+ printk("prom_init - MIPS64\n");
+ /* save the PROM vectors for debugging use */
+ debug_vectors = (struct callvectors *)signext((unsigned long)cv);
+
+ /* arg[0] is "g", the rest is boot parameters */
+ arcs_cmdline[0] = '\0';
+
+ for (i = 1; i < argc; i++) {
+ ptr = (char *)arg64((unsigned long)arg, i);
+ if ((strlen(arcs_cmdline) + strlen(ptr) + 1) >=
+ sizeof(arcs_cmdline))
+ break;
+ strcat(arcs_cmdline, ptr);
+ strcat(arcs_cmdline, " ");
+ }
+ i = 0;
+ while (1) {
+ ptr = (char *)arg64((unsigned long)env, i);
+ if (! ptr)
+ break;
+
+ if (strncmp("gtbase", ptr, strlen("gtbase")) == 0) {
+ mv64340_base = simple_strtol(ptr + strlen("gtbase="),
+ NULL, 16);
+
+ if ((mv64340_base & 0xffffffff00000000) == 0)
+ mv64340_base |= 0xffffffff00000000;
+
+ printk("mv64340_base set to 0x%016lx\n", mv64340_base);
+ }
+ if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) {
+ cpu_clock = simple_strtol(ptr + strlen("cpuclock="),
+ NULL, 10);
+ printk("cpu_clock set to %d\n", cpu_clock);
+ }
+ i++;
+ }
+ printk("arcs_cmdline: %s\n", arcs_cmdline);
+#else /* CONFIG_MIPS64 */
/* save the PROM vectors for debugging use */
debug_vectors = cv;
@@ -119,9 +220,6 @@ void __init prom_init(int argc, char **a
strcat(arcs_cmdline, " ");
}
- mips_machgroup = MACH_GROUP_MOMENCO;
- mips_machtype = MACH_MOMENCO_OCELOT_C;
-
while (*env) {
if (strncmp("gtbase", *env, strlen("gtbase")) == 0) {
mv64340_base = simple_strtol(*env + strlen("gtbase="),
@@ -133,19 +231,22 @@ void __init prom_init(int argc, char **a
}
env++;
}
+#endif /* CONFIG_MIPS64 */
+
+ mips_machgroup = MACH_GROUP_MOMENCO;
+ mips_machtype = MACH_MOMENCO_OCELOT_C;
#ifdef CONFIG_MV64340_ETH
/* get the base MAC address for on-board ethernet ports */
get_mac(prom_mac_addr_base);
#endif
+#ifndef CONFIG_MIPS64
debug_vectors->printf("Booting Linux kernel...\n");
+#endif
}
-void __init prom_free_prom_memory(void)
-{
-}
-
-void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/momentum/ocelot_c/reset.c~mips-megapatch arch/mips/momentum/ocelot_c/reset.c
--- 25/arch/mips/momentum/ocelot_c/reset.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_c/reset.c 2004-02-19 12:53:00.000000000 -0800
@@ -10,7 +10,11 @@
*
* Copyright (C) 2002 Momentum Computer Inc.
* Author: Matthew Dharm <mdharm@momenco.com>
+ *
+ * Louis Hamilton, Red Hat, Inc.
+ * hamilton@redhat.com [MIPS64 modifications]
*/
+#include <linux/config.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/io.h>
@@ -23,7 +27,12 @@
void momenco_ocelot_restart(char *command)
{
/* base address of timekeeper portion of part */
- void *nvram = (void*) 0xfc807000;
+ void *nvram = (void *)
+#ifdef CONFIG_MIPS64
+ 0xfffffffffc807000;
+#else
+ 0xfc807000;
+#endif
/* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */
writeb(0x84, nvram + 0xff7);
diff -puN arch/mips/momentum/ocelot_c/setup.c~mips-megapatch arch/mips/momentum/ocelot_c/setup.c
--- 25/arch/mips/momentum/ocelot_c/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_c/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -10,6 +10,9 @@
* Author: Matthew Dharm, Momentum Computer
* mdharm@momenco.com
*
+ * Louis Hamilton, Red Hat, Inc.
+ * hamilton@redhat.com [MIPS64 modifications]
+ *
* Author: RidgeRun, Inc.
* glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
*
@@ -37,11 +40,11 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
+#include <linux/config.h>
#include <linux/bcd.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
-#include <linux/mc146818rtc.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/ioport.h>
@@ -53,21 +56,19 @@
#include <asm/time.h>
#include <asm/bootinfo.h>
#include <asm/page.h>
-#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/reboot.h>
-#include <asm/mc146818rtc.h>
-#include <linux/version.h>
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#include <asm/mv64340.h>
#include "ocelot_c_fpga.h"
unsigned long mv64340_base;
+extern unsigned long mv64340_sram_base;
unsigned long cpu_clock;
/* These functions are used for rebooting or halting the machine*/
@@ -79,6 +80,7 @@ void momenco_time_init(void);
static char reset_reason;
+void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, unsigned long entryhi, unsigned long pagemask);
#define ENTRYLO(x) ((pte_val(mk_pte_phys((x), PAGE_KERNEL_UNCACHED)) >> 6)|1)
/* setup code for a handoff from a version 2 PMON 2000 PROM */
@@ -99,7 +101,19 @@ void PMON_v2_setup(void)
Internal SRAM 0xfe000000 0xfe000000
M-Systems DOC (CS3) 0xff000000 0xff000000
*/
+ printk("PMON_v2_setup\n");
+#ifdef CONFIG_MIPS64
+ /* marvell and extra space */
+ add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xfffffffff4000000, PM_64K);
+ /* fpga, rtc, and uart */
+ add_wired_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfd000000), 0xfffffffffc000000, PM_16M);
+ /* m-sys and internal SRAM */
+ add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfffffffffe000000, PM_16M);
+
+ mv64340_base = 0xfffffffff4000000;
+ mv64340_sram_base = 0xfffffffffe000000;
+#else
/* marvell and extra space */
add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xf4000000, PM_64K);
/* fpga, rtc, and uart */
@@ -108,11 +122,17 @@ void PMON_v2_setup(void)
add_wired_entry(ENTRYLO(0xfe000000), ENTRYLO(0xff000000), 0xfe000000, PM_16M);
mv64340_base = 0xf4000000;
+ mv64340_sram_base = 0xfe000000;
+#endif
}
unsigned long m48t37y_get_time(void)
{
+#ifdef CONFIG_MIPS64
+ unsigned char *rtc_base = (unsigned char*)0xfffffffffc800000;
+#else
unsigned char* rtc_base = (unsigned char*)0xfc800000;
+#endif
unsigned int year, month, day, hour, min, sec;
/* stop the update */
@@ -137,7 +157,11 @@ unsigned long m48t37y_get_time(void)
int m48t37y_set_time(unsigned long sec)
{
+#ifdef CONFIG_MIPS64
+ unsigned char* rtc_base = (unsigned char*)0xfffffffffc800000;
+#else
unsigned char* rtc_base = (unsigned char*)0xfc800000;
+#endif
struct rtc_time tm;
/* convert to a more useful format -- note months count from 0 */
@@ -179,19 +203,20 @@ void momenco_timer_setup(struct irqactio
void momenco_time_init(void)
{
#ifdef CONFIG_CPU_SR71000
- mips_counter_frequency = cpu_clock;
+ mips_hpt_frequency = cpu_clock;
#elif defined(CONFIG_CPU_RM7000)
- mips_counter_frequency = cpu_clock / 2;
+ mips_hpt_frequency = cpu_clock / 2;
#else
#error Unknown CPU for this board
#endif
+ printk("momenco_time_init cpu_clock=%d\n", cpu_clock);
board_timer_setup = momenco_timer_setup;
rtc_get_time = m48t37y_get_time;
rtc_set_time = m48t37y_set_time;
}
-void __init momenco_ocelot_c_setup(void)
+static void __init momenco_ocelot_c_setup(void)
{
unsigned int tmpword;
@@ -307,6 +332,9 @@ void __init momenco_ocelot_c_setup(void)
}
}
+early_initcall(momenco_ocelot_c_setup);
+
+#ifndef CONFIG_MIPS64
/* This needs to be one of the first initcalls, because no I/O port access
can work before this */
static int io_base_ioremap(void)
@@ -324,3 +352,4 @@ static int io_base_ioremap(void)
}
module_init(io_base_ioremap);
+#endif
diff -puN arch/mips/momentum/ocelot_c/uart-irq.c~mips-megapatch arch/mips/momentum/ocelot_c/uart-irq.c
--- 25/arch/mips/momentum/ocelot_c/uart-irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_c/uart-irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -17,7 +17,6 @@
#include <linux/irq.h>
#include <linux/kernel.h>
#include <asm/ptrace.h>
-#include <linux/config.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <asm/io.h>
diff -puN arch/mips/momentum/ocelot_g/gt-irq.c~mips-megapatch arch/mips/momentum/ocelot_g/gt-irq.c
--- 25/arch/mips/momentum/ocelot_g/gt-irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_g/gt-irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -15,7 +15,6 @@
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <asm/ptrace.h>
-#include <linux/config.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <asm/io.h>
diff -puN arch/mips/momentum/ocelot_g/int-handler.S~mips-megapatch arch/mips/momentum/ocelot_g/int-handler.S
--- 25/arch/mips/momentum/ocelot_g/int-handler.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_g/int-handler.S 2004-02-19 12:53:00.000000000 -0800
@@ -9,8 +9,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#define __ASSEMBLY__
-#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
diff -puN arch/mips/momentum/ocelot_g/irq.c~mips-megapatch arch/mips/momentum/ocelot_g/irq.c
--- 25/arch/mips/momentum/ocelot_g/irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_g/irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -28,6 +28,7 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
+#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
@@ -44,120 +45,27 @@
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
+#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
-
-static spinlock_t rm7000_irq_lock = SPIN_LOCK_UNLOCKED;
-
-/* Function for careful CP0 interrupt mask access */
-static inline void modify_cp0_intmask(unsigned clr_mask_in, unsigned set_mask_in)
-{
- unsigned long status;
- unsigned clr_mask;
- unsigned set_mask;
-
- /* do the low 8 bits first */
- clr_mask = 0xff & clr_mask_in;
- set_mask = 0xff & set_mask_in;
- status = read_c0_status();
- status &= ~((clr_mask & 0xFF) << 8);
- status |= (set_mask & 0xFF) << 8;
- write_c0_status(status);
-
- /* do the high 8 bits */
- clr_mask = 0xff & (clr_mask_in >> 8);
- set_mask = 0xff & (set_mask_in >> 8);
- status = read_c0_intcontrol();
- status &= ~((clr_mask & 0xFF) << 8);
- status |= (set_mask & 0xFF) << 8;
- write_c0_intrcontrol(status);
-}
-
-static inline void mask_irq(unsigned int irq)
-{
- modify_cp0_intmask(irq, 0);
-}
-
-static inline void unmask_irq(unsigned int irq)
-{
- modify_cp0_intmask(0, irq);
-}
-
-static void enable_cp7000_irq(unsigned int irq)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&rm7000_irq_lock, flags);
- unmask_irq(1 << irq);
- spin_unlock_irqrestore(&rm7000_irq_lock, flags);
-}
-
-static unsigned int startup_cp7000_irq(unsigned int irq)
-{
- enable_cp7000_irq(irq);
-
- return 0; /* never anything pending */
-}
-
-static void disable_cp7000_irq(unsigned int irq)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&rm7000_irq_lock, flags);
- mask_irq(1 << irq);
- spin_unlock_irqrestore(&rm7000_irq_lock, flags);
-}
-
-#define shutdown_cp7000_irq disable_cp7000_irq
-
-static void mask_and_ack_cp7000_irq(unsigned int irq)
-{
- mask_irq(1 << irq);
-}
-
-static void end_cp7000_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- unmask_irq(1 << irq);
-}
-
-static struct hw_interrupt_type cp7000_hpcdma_irq_type = {
- "CP7000",
- startup_cp7000_irq,
- shutdown_cp7000_irq,
- enable_cp7000_irq,
- disable_cp7000_irq,
- mask_and_ack_cp7000_irq,
- end_cp7000_irq,
- NULL
-};
-
-
extern asmlinkage void ocelot_handle_int(void);
extern void gt64240_irq_init(void);
void __init init_IRQ(void)
{
- int i;
-
/*
* Clear all of the interrupts while we change the able around a bit.
* int-handler is not on bootstrap
*/
- clear_c0_status(ST0_IM | ST0_BEV);
+ clear_c0_status(ST0_IM);
local_irq_disable();
/* Sets the first-level interrupt dispatcher. */
set_except_vector(0, ocelot_handle_int);
init_generic_irq();
-
- for (i = 0; i <= 15; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &cp7000_hpcdma_irq_type;
- }
+ mips_cpu_irq_init(0);
+ rm7k_cpu_irq_init(8);
gt64240_irq_init();
@@ -166,7 +74,4 @@ void __init init_IRQ(void)
set_debug_traps();
breakpoint(); /* you may move this line to whereever you want :-) */
#endif
-#ifdef CONFIG_GDB_CONSOLE
- register_gdb_console();
-#endif
}
diff -puN arch/mips/momentum/ocelot_g/pci-irq.c~mips-megapatch arch/mips/momentum/ocelot_g/pci-irq.c
--- 25/arch/mips/momentum/ocelot_g/pci-irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_g/pci-irq.c 2004-02-19 12:53:00.000000000 -0800
@@ -17,7 +17,6 @@
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
-#include <linux/version.h>
#include <linux/init.h>
#include <asm/pci.h>
diff -puN arch/mips/momentum/ocelot_g/prom.c~mips-megapatch arch/mips/momentum/ocelot_g/prom.c
--- 25/arch/mips/momentum/ocelot_g/prom.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_g/prom.c 2004-02-19 12:53:00.000000000 -0800
@@ -35,7 +35,6 @@ struct callvectors {
};
struct callvectors* debug_vectors;
-char arcs_cmdline[CL_SIZE];
extern unsigned long gt64240_base;
extern unsigned long bus_clock;
@@ -50,10 +49,14 @@ const char *get_system_type(void)
}
/* [jsun@junsun.net] PMON passes arguments in C main() style */
-void __init prom_init(int argc, char **arg, char** env, struct callvectors *cv)
+void __init prom_init(void)
{
- int i;
uint32_t tmp;
+ int argc = fw_arg0;
+ char **arg = (char **) fw_arg1;
+ char **env = (char **) fw_arg2;
+ struct callvectors *cv = (struct callvectors *) fw_arg3;
+ int i;
/* save the PROM vectors for debugging use */
debug_vectors = cv;
@@ -91,10 +94,7 @@ void __init prom_init(int argc, char **a
debug_vectors->printf("Booting Linux kernel...\n");
}
-void __init prom_free_prom_memory(void)
-{
-}
-
-void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/momentum/ocelot_g/setup.c~mips-megapatch arch/mips/momentum/ocelot_g/setup.c
--- 25/arch/mips/momentum/ocelot_g/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/momentum/ocelot_g/setup.c 2004-02-19 12:53:00.000000000 -0800
@@ -39,10 +39,10 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
-#include <linux/mc146818rtc.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/ioport.h>
@@ -54,22 +54,17 @@
#include <asm/time.h>
#include <asm/bootinfo.h>
#include <asm/page.h>
-#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/reboot.h>
-#include <asm/mc146818rtc.h>
-#include <linux/version.h>
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#include "gt64240.h"
#include "ocelot_pld.h"
-extern struct rtc_ops no_rtc_ops;
-
#ifdef CONFIG_GALILLEO_GT64240_ETH
extern unsigned char prom_mac_addr_base[6];
#endif
@@ -120,7 +115,7 @@ void PMON_v2_setup(void)
gt64240_base = 0xf4000000;
}
-void __init momenco_ocelot_g_setup(void)
+static void __init momenco_ocelot_g_setup(void)
{
void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache);
unsigned int tmpword;
@@ -136,7 +131,6 @@ void __init momenco_ocelot_g_setup(void)
* initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size;
* initrd_below_start_ok = 1;
*/
- rtc_ops = &no_rtc_ops;
/* do handoff reconfiguration */
PMON_v2_setup();
@@ -203,6 +197,8 @@ void __init momenco_ocelot_g_setup(void)
GT_WRITE(0x468, 0xfef73);
}
+early_initcall(momenco_ocelot_g_setup);
+
extern int rm7k_tcache_enabled;
/*
* This runs in KSEG1. See the verbiage in rm7k.c::probe_scache()
diff -puN -L arch/mips/pci/common.c arch/mips/pci/common.c~mips-megapatch /dev/null
--- 25/arch/mips/pci/common.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,72 +0,0 @@
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-
-void __init pcibios_fixup_bus(struct pci_bus *b)
-{
-}
-
-static int pcibios_enable_resources(struct pci_dev *dev, int mask)
-{
- u16 cmd, old_cmd;
- int idx;
- struct resource *r;
-
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
- old_cmd = cmd;
- for (idx = 0; idx < 6; idx++) {
- /* Only set up the requested stuff */
- if (!(mask & (1 << idx)))
- continue;
-
- r = &dev->resource[idx];
- if (!r->start && r->end) {
- printk(KERN_ERR
- "PCI: Device %s not available because of resource collisions\n",
- pci_name(dev));
- return -EINVAL;
- }
- if (r->flags & IORESOURCE_IO)
- cmd |= PCI_COMMAND_IO;
- if (r->flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
- if (dev->resource[PCI_ROM_RESOURCE].start)
- cmd |= PCI_COMMAND_MEMORY;
- if (cmd != old_cmd) {
- printk("PCI: Enabling device %s (%04x -> %04x)\n",
- pci_name(dev), old_cmd, cmd);
- pci_write_config_word(dev, PCI_COMMAND, cmd);
- }
- return 0;
-}
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- int err;
-
- if ((err = pcibios_enable_resources(dev, mask)) < 0)
- return err;
-
- return 0;
-}
-
-void __init pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
- panic("Uhhoh called pcibios_align_resource");
-}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 1;
-}
-
-char *pcibios_setup(char *str)
-{
- return str;
-}
-
-struct pci_fixup pcibios_fixups[] = {
- {0}
-};
diff -puN /dev/null arch/mips/pci/fixup-atlas.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/fixup-atlas.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,72 @@
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <asm/mips-boards/atlasint.h>
+
+#define INTD ATLASINT_INTD
+#define INTC ATLASINT_INTC
+#define INTB ATLASINT_INTB
+#define INTA ATLASINT_INTA
+#define SCSI ATLASINT_SCSI
+#define ETH ATLASINT_ETH
+
+static char irq_tab[][5] __initdata = {
+ /* INTA INTB INTC INTD */
+ {0, 0, 0, 0, 0 }, /* 0: Unused */
+ {0, 0, 0, 0, 0 }, /* 1: Unused */
+ {0, 0, 0, 0, 0 }, /* 2: Unused */
+ {0, 0, 0, 0, 0 }, /* 3: Unused */
+ {0, 0, 0, 0, 0 }, /* 4: Unused */
+ {0, 0, 0, 0, 0 }, /* 5: Unused */
+ {0, 0, 0, 0, 0 }, /* 6: Unused */
+ {0, 0, 0, 0, 0 }, /* 7: Unused */
+ {0, 0, 0, 0, 0 }, /* 8: Unused */
+ {0, 0, 0, 0, 0 }, /* 9: Unused */
+ {0, 0, 0, 0, 0 }, /* 10: Unused */
+ {0, 0, 0, 0, 0 }, /* 11: Unused */
+ {0, 0, 0, 0, 0 }, /* 12: Unused */
+ {0, 0, 0, 0, 0 }, /* 13: Unused */
+ {0, 0, 0, 0, 0 }, /* 14: Unused */
+ {0, 0, 0, 0, 0 }, /* 15: Unused */
+ {0, SCSI, 0, 0, 0 }, /* 16: SYM53C810A SCSI */
+ {0, 0, 0, 0, 0 }, /* 17: Core */
+ {0, INTA, INTB, INTC, INTD }, /* 18: PCI Slot 1 */
+ {0, ETH, 0, 0, 0 }, /* 19: SAA9730 Ethernet */
+ {0, 0, 0, 0, 0 }, /* 20: PCI Slot 3 */
+ {0, 0, 0, 0, 0 } /* 21: PCI Slot 4 */
+};
+
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ return irq_tab[slot][pin];
+}
+
+void __init pcibios_fixup_irqs(void)
+{
+}
+
+#if CONFIG_KGDB
+/*
+ * The PCI scan may have moved the saa9730 I/O address, so reread
+ * the address here.
+ * This does mean that it's not possible to debug the PCI bus configuration
+ * code, but it is better than nothing...
+ */
+
+static void atlas_saa9730_base_fixup (struct pci_dev *pdev)
+{
+ extern void *saa9730_base;
+ if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19)
+ (void) pci_read_config_dword (pdev, 0x14, (u32 *)&saa9730_base);
+ printk ("saa9730_base = %x\n", saa9730_base);
+}
+
+#endif
+
+
+struct pci_fixup pcibios_fixups[] __initdata = {
+#ifdef CONFIG_KGDB
+ {PCI_FIXUP_HEADER, PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
+ atlas_saa9730_base_fixup},
+#endif
+ { 0 }
+};
diff -puN arch/mips/pci/fixup-au1000.c~mips-megapatch arch/mips/pci/fixup-au1000.c
--- 25/arch/mips/pci/fixup-au1000.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/fixup-au1000.c 2004-02-19 12:53:00.000000000 -0800
@@ -32,93 +32,31 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <asm/au1000.h>
+#include <asm/mach-au1x00/au1000.h>
//#include <asm/pb1500.h>
#ifdef CONFIG_MIPS_PB1000
-#include <asm/pb1000.h>
+#include <asm/mach-pb1x00/pb1000.h>
#endif
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
+/*
+ * Shortcut
+ */
+#define INTA AU1000_PCI_INTA
+#define INTB AU1000_PCI_INTB
-static void fixup_resource(int r_num, struct pci_dev *dev);
-#ifdef CONFIG_SOC_AU1500
-static unsigned long virt_io_addr;
+static char irq_tab_alchemy[][5] __initdata = {
+ [11] = { -1, INTA, INTA, INTA, INTA },
+ [12] = { -1, INTA, INTA, INTA, INTA }
+#if defined( CONFIG_SOC_AU1550 )
+ [13] = { -1, INTB, INTB, INTB, INTB }
#endif
+};
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
- /* will need to fixup IO resources */
-}
-
-void __init pcibios_fixup(void)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
-#ifdef CONFIG_SOC_AU1500
- int i;
- struct pci_dev *dev;
-
- virt_io_addr = (unsigned long) ioremap(Au1500_PCI_IO_START,
- Au1500_PCI_IO_END -
- Au1500_PCI_IO_START + 1);
-
- if (!virt_io_addr) {
- printk(KERN_ERR "Unable to ioremap pci space\n");
- return;
- }
-
- set_io_port_base(virt_io_addr);
-#endif
-
-#ifdef CONFIG_MIPS_PB1000 /* This is truly board specific */
- unsigned long pci_mem_start = (unsigned long) PCI_MEM_START;
-
- au_writel(0, PCI_BRIDGE_CONFIG); // set extend byte to 0
- au_writel(0, SDRAM_MBAR); // set mbar to 0
- au_writel(0x2, SDRAM_CMD); // enable memory accesses
- au_sync_delay(1);
-
- // set extend byte to mbar of ext slot
- au_writel(((pci_mem_start >> 24) & 0xff) |
- (1 << 8 | 1 << 9 | 1 << 10 | 1 << 27),
- PCI_BRIDGE_CONFIG);
- DBG("Set bridge config to %x\n", au_readl(PCI_BRIDGE_CONFIG));
-#endif
+ return irq_tab_alchemy[slot][pin];
}
-void __init pcibios_fixup_irqs(void)
-{
-#ifdef CONFIG_SOC_AU1500
- unsigned int slot, func;
- unsigned char pin;
- struct pci_dev *dev = NULL;
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- if (dev->bus->number != 0)
- return;
-
- dev->irq = 0xff;
- slot = PCI_SLOT(dev->devfn);
- switch (slot) {
- case 12:
- case 13:
- dev->irq = AU1000_PCI_INTA;
- break;
-
- }
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- DBG("slot %d irq %d\n", slot, dev->irq);
- }
-#endif
-}
-unsigned int pcibios_assign_all_busses(void)
-{
- return 0;
-}
-
-static void fixup_resource(int r_num, struct pci_dev *dev)
-{
-}
+struct pci_fixup pcibios_fixups[] __initdata = {
+ { 0 }
+};
diff -puN arch/mips/pci/fixup-capcella.c~mips-megapatch arch/mips/pci/fixup-capcella.c
--- 25/arch/mips/pci/fixup-capcella.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/fixup-capcella.c 2004-02-19 12:53:00.000000000 -0800
@@ -18,55 +18,23 @@
#include <asm/vr41xx/capcella.h>
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
-}
-
-void __init pcibios_fixup(void)
-{
-}
-
-void __init pcibios_fixup_irqs(void)
-{
- struct pci_dev *dev = NULL;
- u8 slot, func, pin;
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- slot = PCI_SLOT(dev->devfn);
- func = PCI_FUNC(dev->devfn);
- dev->irq = 0;
-
- switch (slot) {
- case 11:
- dev->irq = RTL8139_1_IRQ;
- break;
- case 12:
- dev->irq = RTL8139_2_IRQ;
- break;
- case 14:
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- switch (pin) {
- case 1:
- dev->irq = PC104PLUS_INTA_IRQ;
- break;
- case 2:
- dev->irq = PC104PLUS_INTB_IRQ;
- break;
- case 3:
- dev->irq = PC104PLUS_INTC_IRQ;
- break;
- case 4:
- dev->irq = PC104PLUS_INTD_IRQ;
- break;
- }
- break;
- }
-
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
-}
+/*
+ * Shortcuts
+ */
+#define INT1 RTL8139_1_IRQ
+#define INT2 RTL8139_2_IRQ
+#define INTA PC104PLUS_INTA_IRQ
+#define INTB PC104PLUS_INTB_IRQ
+#define INTC PC104PLUS_INTC_IRQ
+#define INTD PC104PLUS_INTD_IRQ
+
+static char irq_tab_capcella[][5] __initdata = {
+ [11] = { -1, INT1, INT1, INT1, INT1 },
+ [12] = { -1, INT2, INT2, INT2, INT2 },
+ [14] = { -1, INTA, INTB, INTC, INTD }
+};
-unsigned int pcibios_assign_all_busses(void)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
- return 0;
+ return irq_tab_capcella[slot][pin];
}
diff -puN /dev/null arch/mips/pci/fixup-cobalt.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/fixup-cobalt.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,108 @@
+/*
+ * Cobalt Qube/Raq PCI support
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 1996, 1997, 2002, 2003 by Ralf Baechle
+ * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/pci.h>
+#include <asm/io.h>
+#include <asm/gt64120.h>
+
+#include <asm/cobalt/cobalt.h>
+
+extern int cobalt_board_id;
+
+static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev)
+{
+ unsigned short cfgword;
+ unsigned char lt;
+
+ /* Enable Bus Mastering and fast back to back. */
+ pci_read_config_word(dev, PCI_COMMAND, &cfgword);
+ cfgword |= (PCI_COMMAND_FAST_BACK | PCI_COMMAND_MASTER);
+ pci_write_config_word(dev, PCI_COMMAND, cfgword);
+
+ /* Enable both ide interfaces. ROM only enables primary one. */
+ pci_write_config_byte(dev, 0x40, 0xb);
+
+ /* Set latency timer to reasonable value. */
+ pci_read_config_byte(dev, PCI_LATENCY_TIMER, <);
+ if (lt < 64)
+ pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
+ pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7);
+}
+
+static void qube_raq_galileo_fixup(struct pci_dev *dev)
+{
+ unsigned short galileo_id;
+
+ /* Fix PCI latency-timer and cache-line-size values in Galileo
+ * host bridge.
+ */
+ pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
+ pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7);
+
+ /*
+ * On all machines prior to Q2, we had the STOP line disconnected
+ * from Galileo to VIA on PCI. The new Galileo does not function
+ * correctly unless we have it connected.
+ *
+ * Therefore we must set the disconnect/retry cycle values to
+ * something sensible when using the new Galileo.
+ */
+ pci_read_config_word(dev, PCI_REVISION_ID, &galileo_id);
+ galileo_id &= 0xff; /* mask off class info */
+ if (galileo_id >= 0x10) {
+ /* New Galileo, assumes PCI stop line to VIA is connected. */
+ GALILEO_OUTL(0x4020, GT_PCI0_TOR_OFS);
+ } else if (galileo_id == 0x1 || galileo_id == 0x2) {
+ signed int timeo;
+ /* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */
+ timeo = GALILEO_INL(GT_PCI0_TOR_OFS);
+ /* Old Galileo, assumes PCI STOP line to VIA is disconnected. */
+ GALILEO_OUTL(0xffff, GT_PCI0_TOR_OFS);
+ }
+}
+
+struct pci_fixup pcibios_fixups[] __initdata = {
+ {PCI_FIXUP_HEADER, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
+ qube_raq_via_bmIDE_fixup},
+ {PCI_FIXUP_HEADER, PCI_VENDOR_ID_GALILEO, PCI_ANY_ID,
+ qube_raq_galileo_fixup},
+ 0
+};
+
+static char irq_tab_cobalt[] __initdata = {
+ [COBALT_PCICONF_CPU] = 0,
+ [COBALT_PCICONF_ETH0] = COBALT_ETH0_IRQ,
+ [COBALT_PCICONF_RAQSCSI] = COBALT_SCSI_IRQ,
+ [COBALT_PCICONF_VIA] = 0,
+ [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ,
+ [COBALT_PCICONF_ETH1] = COBALT_ETH1_IRQ
+};
+
+static char irq_tab_raq2[] __initdata = {
+ [COBALT_PCICONF_CPU] = 0,
+ [COBALT_PCICONF_ETH0] = COBALT_ETH0_IRQ,
+ [COBALT_PCICONF_RAQSCSI] = COBALT_RAQ_SCSI_IRQ,
+ [COBALT_PCICONF_VIA] = 0,
+ [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ,
+ [COBALT_PCICONF_ETH1] = COBALT_ETH1_IRQ
+};
+
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ if (cobalt_board_id == COBALT_BRD_ID_RAQ2)
+ return irq_tab_raq2[slot];
+
+ return irq_tab_cobalt[slot];
+}
diff -puN /dev/null arch/mips/pci/fixup-ddb5074.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/fixup-ddb5074.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,24 @@
+/*
+ * It's nice to have the LEDs on the GPIO pins available for debugging
+ */
+static void ddb5074_fixup(struct pci_dev *dev)
+{
+ extern struct pci_dev *pci_pmu;
+ u8 t8;
+
+ pci_pmu = dev; /* for LEDs D2 and D3 */
+ /* Program the lines for LEDs D2 and D3 to output */
+ pci_read_config_byte(dev, 0x7d, &t8);
+ t8 |= 0xc0;
+ pci_write_config_byte(dev, 0x7d, t8);
+ /* Turn LEDs D2 and D3 off */
+ pci_read_config_byte(dev, 0x7e, &t8);
+ t8 |= 0xc0;
+ pci_write_config_byte(dev, 0x7e, t8);
+}
+
+struct pci_fixup pcibios_fixups[] __initdata = {
+ { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
+ ddb5074_fixup },
+ {0}
+};
diff -puN /dev/null arch/mips/pci/fixup-ddb5477.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/fixup-ddb5477.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,80 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Board specific pci fixups.
+ *
+ * Copyright 2001, 2002, 2003 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+static void ddb5477_fixup(struct pci_dev *dev)
+{
+ u8 old;
+
+ printk(KERN_NOTICE "Enabling ALI M1533/35 PS2 keyboard/mouse.\n");
+ pci_read_config_byte(dev, 0x41, &old);
+ pci_write_config_byte(dev, 0x41, old | 0xd0);
+}
+
+/*
+ * Fixup baseboard AMD chip so that tx does not underflow.
+ * bcr_18 |= 0x0800
+ * This sets NOUFLO bit which makes tx not start until whole pkt
+ * is fetched to the chip.
+ */
+#define PCNET32_WIO_RDP 0x10
+#define PCNET32_WIO_RAP 0x12
+#define PCNET32_WIO_RESET 0x14
+#define PCNET32_WIO_BDP 0x16
+
+static void ddb5477_amd_lance_fixup(struct pci_dev *dev)
+{
+ unsigned long ioaddr;
+ u16 temp;
+
+ ioaddr = pci_resource_start(dev, 0);
+
+ inw(ioaddr + PCNET32_WIO_RESET); /* reset chip */
+
+ /* bcr_18 |= 0x0800 */
+ outw(18, ioaddr + PCNET32_WIO_RAP);
+ temp = inw(ioaddr + PCNET32_WIO_BDP);
+ temp |= 0x0800;
+ outw(18, ioaddr + PCNET32_WIO_RAP);
+ outw(temp, ioaddr + PCNET32_WIO_BDP);
+}
+
+struct pci_fixup pcibios_fixups[] __initdata = {
+ { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
+ ddb5477_fixup },
+ { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1535,
+ ddb5477_fixup },
+ { PCI_FIXUP_FINAL, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE,
+ ddb5477_amd_lance_fixup },
+ {0}
+};
diff -puN arch/mips/pci/fixup-eagle.c~mips-megapatch arch/mips/pci/fixup-eagle.c
--- 25/arch/mips/pci/fixup-eagle.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/fixup-eagle.c 2004-02-19 12:53:00.000000000 -0800
@@ -1,46 +1,14 @@
/*
- * FILE NAME
- * arch/mips/vr41xx/nec-eagle/pci_fixup.c
+ * arch/mips/vr41xx/nec-eagle/pci_fixup.c
*
- * BRIEF MODULE DESCRIPTION
- * The NEC Eagle/Hawk Board specific PCI fixups.
+ * The NEC Eagle/Hawk Board specific PCI fixups.
*
- * Author: Yoichi Yuasa
- * yyuasa@mvista.com or source@mvista.com
+ * Author: Yoichi Yuasa <you@mvista.com, or source@mvista.com>
*
- * Copyright 2001,2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-/*
- * Changes:
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * - Moved mips_pci_channels[] to arch/mips/vr41xx/vr4122/eagle/setup.c.
- * - Added support for NEC Hawk.
- *
- * Paul Mundt <lethal@chaoticdreams.org>
- * - Fix empty break statements.
- *
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * - New creation, NEC Eagle is supported.
+ * 2001-2002,2004 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
*/
#include <linux/init.h>
#include <linux/pci.h>
@@ -48,119 +16,45 @@
#include <asm/vr41xx/eagle.h>
#include <asm/vr41xx/vrc4173.h>
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
-}
+/*
+ * Shortcuts
+ */
+#define INTA CP_INTA_IRQ
+#define INTB CP_INTB_IRQ
+#define INTC CP_INTC_IRQ
+#define INTD CP_INTD_IRQ
+#define PCMCIA1 VRC4173_PCMCIA1_IRQ
+#define PCMCIA2 VRC4173_PCMCIA2_IRQ
+#define LAN LANINTA_IRQ
+#define SLOT PCISLOT_IRQ
+
+static char irq_tab_eagle[][5] __initdata = {
+ [ 8] = { 0, INTA, INTB, INTC, INTD },
+ [ 9] = { 0, INTD, INTA, INTB, INTC },
+ [10] = { 0, INTC, INTD, INTA, INTB },
+ [12] = { 0, PCMCIA1, 0, 0, 0 },
+ [13] = { 0, PCMCIA2, 0, 0, 0 },
+ [28] = { 0, LAN, 0, 0, 0 },
+ [29] = { 0, SLOT, INTB, INTC, INTD },
+};
-void __init pcibios_fixup(void)
-{
-}
+/*
+ * This is a multifunction device.
+ */
+static char irq_func_tab[] __initdata = {
+ VRC4173_CASCADE_IRQ,
+ VRC4173_AC97_IRQ,
+ VRC4173_USB_IRQ
+};
-void __init pcibios_fixup_irqs(void)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
- struct pci_dev *dev = NULL;
- u8 slot, func, pin;
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- slot = PCI_SLOT(dev->devfn);
- func = PCI_FUNC(dev->devfn);
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- dev->irq = 0;
-
- switch (slot) {
- case 8:
- switch (pin) {
- case 1:
- dev->irq = CP_INTA_IRQ;
- break;
- case 2:
- dev->irq = CP_INTB_IRQ;
- break;
- case 3:
- dev->irq = CP_INTC_IRQ;
- break;
- case 4:
- dev->irq = CP_INTD_IRQ;
- break;
- }
- break;
- case 9:
- switch (pin) {
- case 1:
- dev->irq = CP_INTD_IRQ;
- break;
- case 2:
- dev->irq = CP_INTA_IRQ;
- break;
- case 3:
- dev->irq = CP_INTB_IRQ;
- break;
- case 4:
- dev->irq = CP_INTC_IRQ;
- break;
- }
- break;
- case 10:
- switch (pin) {
- case 1:
- dev->irq = CP_INTC_IRQ;
- break;
- case 2:
- dev->irq = CP_INTD_IRQ;
- break;
- case 3:
- dev->irq = CP_INTA_IRQ;
- break;
- case 4:
- dev->irq = CP_INTB_IRQ;
- break;
- }
- break;
- case 12:
- dev->irq = VRC4173_PCMCIA1_IRQ;
- break;
- case 13:
- dev->irq = VRC4173_PCMCIA2_IRQ;
- break;
- case 28:
- dev->irq = LANINTA_IRQ;
- break;
- case 29:
- switch (pin) {
- case 1:
- dev->irq = PCISLOT_IRQ;
- break;
- case 2:
- dev->irq = CP_INTB_IRQ;
- break;
- case 3:
- dev->irq = CP_INTC_IRQ;
- break;
- case 4:
- dev->irq = CP_INTD_IRQ;
- break;
- }
- break;
- case 30:
- switch (func) {
- case 0:
- dev->irq = VRC4173_CASCADE_IRQ;
- break;
- case 1:
- dev->irq = VRC4173_AC97_IRQ;
- break;
- case 2:
- dev->irq = VRC4173_USB_IRQ;
- break;
- }
- break;
- }
+ if (slot == 30)
+ return irq_func_tab[PCI_FUNC(dev->devfn)];
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
+ return irq_tab_eagle[slot][pin];
}
-unsigned int pcibios_assign_all_busses(void)
-{
- return 0;
-}
+struct pci_fixup pcibios_fixups[] __initdata = {
+ { .pass = 0, },
+};
diff -puN /dev/null arch/mips/pci/fixup-ev64120.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/fixup-ev64120.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,34 @@
+#include <linux/pci.h>
+#include <linux/init.h>
+
+int pci_range_ck(unsigned char bus, unsigned char dev)
+{
+ if (((bus == 0) || (bus == 1)) && (dev >= 6) && (dev <= 8))
+ return 0;
+
+ return -1;
+}
+
+/*
+ * After detecting all agents over the PCI , this function is called
+ * in order to give an interrupt number for each PCI device starting
+ * from IRQ 20. It does also enables master for each device.
+ */
+void __devinit pcibios_fixup_bus(struct pci_bus *bus)
+{
+ unsigned int irq = 20;
+ struct pci_bus *current_bus = bus;
+ struct pci_dev *dev;
+ struct list_head *devices_link;
+
+ list_for_each(devices_link, &(current_bus->devices)) {
+ dev = pci_dev_b(devices_link);
+ if (dev != NULL) {
+ dev->irq = irq++;
+
+ /* Assign an interrupt number for the device */
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
+ pcibios_set_master(dev);
+ }
+ }
+}
diff -puN /dev/null arch/mips/pci/fixup-ev96100.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/fixup-ev96100.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,42 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * EV96100 Board specific pci fixups.
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+
+static char irq_tab_ev96100[][5] __initdata = {
+ [8] = { 0, 5, 5, 5, 5 },
+ [9] = { 0, 2, 2, 2, 2 }
+};
+
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ return irq_tab_ev96100[slot][pin];
+}
diff -puN /dev/null arch/mips/pci/fixup-ip32.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/fixup-ip32.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,50 @@
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <asm/pci_channel.h>
+#include <asm/ip32/ip32_ints.h>
+/*
+ * O2 has up to 5 PCI devices connected into the MACE bridge. The device
+ * map looks like this:
+ *
+ * 0 aic7xxx 0
+ * 1 aic7xxx 1
+ * 2 expansion slot
+ * 3 N/C
+ * 4 N/C
+ */
+
+#define SCSI0 MACEPCI_SCSI0_IRQ
+#define SCSI1 MACEPCI_SCSI1_IRQ
+#define INTA0 MACEPCI_SLOT0_IRQ
+#define INTA1 MACEPCI_SLOT1_IRQ
+#define INTA2 MACEPCI_SLOT2_IRQ
+#define INTB MACEPCI_SHARED0_IRQ
+#define INTC MACEPCI_SHARED1_IRQ
+#define INTD MACEPCI_SHARED2_IRQ
+static char irq_tab_mace[][5] __initdata = {
+ /* Dummy INT#A INT#B INT#C INT#D */
+ {0, 0, 0, 0, 0}, /* This is placeholder row - never used */
+ {0, SCSI0, SCSI0, SCSI0, SCSI0},
+ {0, SCSI1, SCSI1, SCSI1, SCSI1},
+ {0, INTA0, INTB, INTC, INTD},
+ {0, INTA1, INTC, INTD, INTB},
+ {0, INTA2, INTD, INTB, INTC},
+};
+
+
+/*
+ * Given a PCI slot number (a la PCI_SLOT(...)) and the interrupt pin of
+ * the device (1-4 => A-D), tell what irq to use. Note that we don't
+ * in theory have slots 4 and 5, and we never normally use the shared
+ * irqs. I suppose a device without a pin A will thank us for doing it
+ * right if there exists such a broken piece of crap.
+ */
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ return irq_tab_mace[slot][pin];
+}
+
+struct pci_fixup pcibios_fixups[] = {
+ {0}
+};
diff -puN arch/mips/pci/fixup-ite8172g.c~mips-megapatch arch/mips/pci/fixup-ite8172g.c
--- 25/arch/mips/pci/fixup-ite8172g.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/fixup-ite8172g.c 2004-02-19 12:53:00.000000000 -0800
@@ -35,155 +35,40 @@
#include <asm/it8172/it8172_pci.h>
#include <asm/it8172/it8172_int.h>
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
-}
+/*
+ * Shortcuts
+ */
+#define INTA IT8172_PCI_INTA_IRQ
+#define INTB IT8172_PCI_INTB_IRQ
+#define INTC IT8172_PCI_INTC_IRQ
+#define INTD IT8172_PCI_INTD_IRQ
+
+static const int internal_func_irqs[7] __initdata = {
+ IT8172_AC97_IRQ,
+ IT8172_DMA_IRQ,
+ IT8172_CDMA_IRQ,
+ IT8172_USB_IRQ,
+ IT8172_BRIDGE_MASTER_IRQ,
+ IT8172_IDE_IRQ,
+ IT8172_MC68K_IRQ
+};
+
+static char irq_tab_ite8172g[][5] __initdata = {
+ [0x10] = { 0, INTA, INTB, INTC, INTD },
+ [0x11] = { 0, INTA, INTB, INTC, INTD },
+ [0x12] = { 0, INTB, INTC, INTD, INTA },
+ [0x13] = { 0, INTC, INTD, INTA, INTB },
+ [0x14] = { 0, INTD, INTA, INTB, INTC },
+};
-void __init pcibios_fixup(void)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
-}
-
-void __init pcibios_fixup_irqs(void)
-{
- unsigned int slot, func;
- unsigned char pin;
- struct pci_dev *dev = NULL;
-
- const int internal_func_irqs[7] = {
- IT8172_AC97_IRQ,
- IT8172_DMA_IRQ,
- IT8172_CDMA_IRQ,
- IT8172_USB_IRQ,
- IT8172_BRIDGE_MASTER_IRQ,
- IT8172_IDE_IRQ,
- IT8172_MC68K_IRQ
- };
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- if (dev->bus->number != 0)
- return;
-
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- slot = PCI_SLOT(dev->devfn);
- func = PCI_FUNC(dev->devfn);
-
- switch (slot) {
- case 0x01:
- /*
- * Internal device 1 is actually 7 different
- * internal devices on the IT8172G (a multi-
- * function device).
- */
- if (func < 7)
- dev->irq = internal_func_irqs[func];
- break;
- case 0x10:
- switch (pin) {
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- case 0x11:
- switch (pin) {
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- case 0x12:
- switch (pin) {
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- case 0x13:
- switch (pin) {
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- case 0x14:
- switch (pin) {
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
+ /*
+ * Internal device 1 is actually 7 different internal devices on the
+ * IT8172G (a multifunction device).
+ */
+ if (slot == 1)
+ return internal_func_irqs[PCI_FUNC(dev->devfn)];
- }
- break;
- default:
- continue; /* do nothing */
- }
-#ifdef DEBUG
- printk("irq fixup: slot %d, int line %d, int number %d\n",
- slot, pin, dev->irq);
-#endif
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
+ return irq_tab_ite8172g[slot][pin];
}
diff -puN arch/mips/pci/fixup-ivr.c~mips-megapatch arch/mips/pci/fixup-ivr.c
--- 25/arch/mips/pci/fixup-ivr.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/fixup-ivr.c 2004-02-19 12:53:00.000000000 -0800
@@ -36,118 +36,34 @@
#include <asm/it8172/it8172_pci.h>
#include <asm/it8172/it8172_int.h>
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
-}
-
-void __init pcibios_fixup(void)
-{
-}
+/*
+ * Shortcuts
+ */
+#define INTA IT8172_PCI_INTA_IRQ
+#define INTB IT8172_PCI_INTB_IRQ
+#define INTC IT8172_PCI_INTC_IRQ
+#define INTD IT8172_PCI_INTD_IRQ
+
+static const int internal_func_irqs[7] __initdata = {
+ IT8172_AC97_IRQ,
+ IT8172_DMA_IRQ,
+ IT8172_CDMA_IRQ,
+ IT8172_USB_IRQ,
+ IT8172_BRIDGE_MASTER_IRQ,
+ IT8172_IDE_IRQ,
+ IT8172_MC68K_IRQ
+};
+
+static char irq_tab_ivr[][5] __initdata = {
+ [0x11] = { INTC, INTC, INTD, INTA, INTB }, /* Realtek RTL-8139 */
+ [0x12] = { INTB, INTB, INTB, INTC, INTC }, /* IVR slot */
+ [0x13] = { INTA, INTA, INTB, INTC, INTD } /* Expansion slot */
+};
-void __init pcibios_fixup_irqs(void)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
- unsigned int slot, func;
- unsigned char pin;
- struct pci_dev *dev = NULL;
-
- const int internal_func_irqs[7] = {
- IT8172_AC97_IRQ,
- IT8172_DMA_IRQ,
- IT8172_CDMA_IRQ,
- IT8172_USB_IRQ,
- IT8172_BRIDGE_MASTER_IRQ,
- IT8172_IDE_IRQ,
- IT8172_MC68K_IRQ
- };
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- if (dev->bus->number != 0)
- return;
-
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- slot = PCI_SLOT(dev->devfn);
- func = PCI_FUNC(dev->devfn);
-
- switch (slot) {
- case 0x01:
- /*
- * Internal device 1 is actually 7 different
- * internal devices on the IT8172G (multi-function
- * device).
- */
- if (func < 7)
- dev->irq = internal_func_irqs[func];
- break;
- case 0x11: // Realtek RTL-8139
- switch (pin) {
- case 0: /* pin A, hardware bug */
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- case 0x12: // ivr slot
- switch (pin) {
- case 0: /* pin A, hardware bug */
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
-
- }
- break;
- case 0x13: // expansion slot
- switch (pin) {
- case 0: /* pin A, hardware bug */
- case 1: /* pin A */
- dev->irq = IT8172_PCI_INTA_IRQ;
- break;
- case 2: /* pin B */
- dev->irq = IT8172_PCI_INTB_IRQ;
- break;
- case 3: /* pin C */
- dev->irq = IT8172_PCI_INTC_IRQ;
- break;
- case 4: /* pin D */
- dev->irq = IT8172_PCI_INTD_IRQ;
- break;
- default:
- dev->irq = 0xff;
- break;
+ if (slot == 1)
+ return internal_func_irqs[PCI_FUNC(dev->devfn)];
- }
- break;
- default:
- break;
- }
-#ifdef DEBUG
- printk("irq fixup: slot %d, int line %d, int number %d\n",
- slot, pin, dev->irq);
-#endif
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
+ return irq_tab_ivr[slot][pin];
}
diff -puN arch/mips/pci/fixup-jmr3927.c~mips-megapatch arch/mips/pci/fixup-jmr3927.c
--- 25/arch/mips/pci/fixup-jmr3927.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/fixup-jmr3927.c 2004-02-19 12:53:00.000000000 -0800
@@ -34,51 +34,27 @@
#include <asm/jmr3927/jmr3927.h>
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
- /* will need to fixup IO resources */
-}
-
-void __init pcibios_fixup(void)
-{
- /* nothing to do here */
-}
-
-int pci_get_irq(struct pci_dev *dev, int pin)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
unsigned char irq = pin;
/* IRQ rotation (PICMG) */
irq--; /* 0-3 */
if (dev->bus->parent == NULL &&
- PCI_SLOT(dev->devfn) == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
+ slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
/* PCI CardSlot (IDSEL=A23, DevNu=12) */
/* PCIA => PCIC (IDSEL=A23) */
/* NOTE: JMR3927 JP1 must be set to OPEN */
irq = (irq + 2) % 4;
} else if (dev->bus->parent == NULL &&
- PCI_SLOT(dev->devfn) ==
- TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
+ slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
/* PCI CardSlot (IDSEL=A22, DevNu=11) */
/* PCIA => PCIA (IDSEL=A22) */
/* NOTE: JMR3927 JP1 must be set to OPEN */
irq = (irq + 0) % 4;
} else {
/* PCI Backplane */
- irq = (irq + 3 + PCI_SLOT(dev->devfn)) % 4;
-#if 0 /* ??? */
- for (bus = dev->bus; bus->parent != NULL;
- bus = bus->parent) {
- irq = (irq + 3 + PCI_SLOT(bus->self->devfn)) % 4;
- }
-#endif
+ irq = (irq + 3 + slot) % 4;
}
irq++; /* 1-4 */
@@ -101,7 +77,7 @@ int pci_get_irq(struct pci_dev *dev, int
/* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */
if (dev->bus->parent == NULL &&
- PCI_SLOT(dev->devfn) == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) {
+ slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) {
extern int jmr3927_ether1_irq;
/* check this irq line was reserved for ether1 */
if (jmr3927_ether1_irq != JMR3927_IRQ_ETHER0)
@@ -112,27 +88,12 @@ int pci_get_irq(struct pci_dev *dev, int
return irq;
}
-void __init pcibios_fixup_irqs(void)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
- unsigned char irq;
- struct pci_dev *dev = NULL;
+ /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
+ if (!(dev->vendor == PCI_VENDOR_ID_EFAR &&
+ dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1))
+ return pci_get_irq(dev, pin);
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq);
- if (irq == 0)
- return;
-
- /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
- if (!(dev->vendor == PCI_VENDOR_ID_EFAR &&
- dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1)) {
- irq = pci_get_irq(dev, irq);
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
- irq);
- }
-
- pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
- printk(KERN_INFO "PCI: %02x:%02x IRQ %02x\n",
- dev->bus->number, dev->devfn, irq);
- dev->irq = irq;
- }
+ dev->irq = irq;
}
diff -puN /dev/null arch/mips/pci/fixup-malta.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/fixup-malta.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,105 @@
+#include <linux/init.h>
+#include <linux/pci.h>
+
+/* PCI interrupt pins */
+#define PCIA 1
+#define PCIB 2
+#define PCIC 3
+#define PCID 4
+
+/* This table is filled in by interrogating the PIIX4 chip */
+static char pci_irq[5] __initdata;
+
+static char irq_tab[][5] __initdata = {
+ /* INTA INTB INTC INTD */
+ {0, 0, 0, 0, 0 }, /* 0: GT64120 PCI bridge */
+ {0, 0, 0, 0, 0 }, /* 1: Unused */
+ {0, 0, 0, 0, 0 }, /* 2: Unused */
+ {0, 0, 0, 0, 0 }, /* 3: Unused */
+ {0, 0, 0, 0, 0 }, /* 4: Unused */
+ {0, 0, 0, 0, 0 }, /* 5: Unused */
+ {0, 0, 0, 0, 0 }, /* 6: Unused */
+ {0, 0, 0, 0, 0 }, /* 7: Unused */
+ {0, 0, 0, 0, 0 }, /* 8: Unused */
+ {0, 0, 0, 0, 0 }, /* 9: Unused */
+ {0, 0, 0, 0, PCID }, /* 10: PIIX4 USB */
+ {0, PCIB, 0, 0, 0 }, /* 11: AMD 79C973 Ethernet */
+ {0, PCIC, 0, 0, 0 }, /* 12: Crystal 4281 Sound */
+ {0, 0, 0, 0, 0 }, /* 13: Unused */
+ {0, 0, 0, 0, 0 }, /* 14: Unused */
+ {0, 0, 0, 0, 0 }, /* 15: Unused */
+ {0, 0, 0, 0, 0 }, /* 16: Unused */
+ {0, 0, 0, 0, 0 }, /* 17: Bonito/SOC-it PCI Bridge*/
+ {0, PCIA, PCIB, PCIC, PCID }, /* 18: PCI Slot 1 */
+ {0, PCIB, PCIC, PCID, PCIA }, /* 19: PCI Slot 2 */
+ {0, PCIC, PCID, PCIA, PCIB }, /* 20: PCI Slot 3 */
+ {0, PCID, PCIA, PCIB, PCIC } /* 21: PCI Slot 4 */
+};
+
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ int virq;
+ virq = irq_tab[slot][pin];
+ return pci_irq[virq];
+}
+
+void __init pcibios_fixup_irqs(void)
+{
+}
+
+
+static void __init malta_piix_func0_fixup(struct pci_dev *pdev)
+{
+ unsigned char reg_val;
+ static int piixirqmap[16] __initdata = { /* PIIX PIRQC[A:D] irq mappings */
+ 0, 0, 0, 3,
+ 4, 5, 6, 7,
+ 0, 9, 10, 11,
+ 12, 0, 14, 15
+ };
+ int i;
+
+ /* Interrogate PIIX4 to get PCI IRQ mapping */
+ for (i = 0; i <= 3; i++) {
+ pci_read_config_byte(pdev, 0x60+i, ®_val);
+ if (reg_val & 0x80)
+ pci_irq[PCIA+i] = 0; /* Disabled */
+ else
+ pci_irq[PCIA+i] = piixirqmap[reg_val & 15];
+ }
+
+ /* Done by YAMON 2.00 onwards */
+ if (PCI_SLOT(pdev->devfn) == 10) {
+ /*
+ * Set top of main memory accessible by ISA or DMA
+ * devices to 16 Mb.
+ */
+ pci_read_config_byte(pdev, 0x69, ®_val);
+ pci_write_config_byte(pdev, 0x69, reg_val | 0xf0);
+ }
+}
+
+
+static void __init malta_piix_func1_fixup(struct pci_dev *pdev)
+{
+ unsigned char reg_val;
+
+ /* Done by YAMON 2.02 onwards */
+ if (PCI_SLOT(pdev->devfn) == 10) {
+ /*
+ * IDE Decode enable.
+ */
+ pci_read_config_byte(pdev, 0x41, ®_val);
+ pci_write_config_byte(pdev, 0x41, reg_val|0x80);
+ pci_read_config_byte(pdev, 0x43, ®_val);
+ pci_write_config_byte(pdev, 0x43, reg_val|0x80);
+ }
+}
+
+struct pci_fixup pcibios_fixups[] __initdata = {
+ {PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
+ malta_piix_func0_fixup},
+ {PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB,
+ malta_piix_func1_fixup},
+ { 0 }
+};
diff -puN arch/mips/pci/fixup-ocelot.c~mips-megapatch arch/mips/pci/fixup-ocelot.c
--- 25/arch/mips/pci/fixup-ocelot.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/fixup-ocelot.c 2004-02-19 12:53:00.000000000 -0800
@@ -13,12 +13,11 @@
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
-#include <linux/version.h>
#include <linux/init.h>
#include <asm/pci.h>
-void __devinit gt64120_board_pcibios_fixup_bus(struct pci_bus *bus)
+void __devinit pcibios_fixup_bus(struct pci_bus *bus)
{
struct pci_bus *current_bus = bus;
struct pci_dev *devices;
@@ -38,8 +37,7 @@ void __devinit gt64120_board_pcibios_fix
*/
if ((devices->vendor != 0x8086) ||
(devices->device != 0x1209)) {
- panic
- ("gt64120_board_pcibios_fixup_bus: found "
+ panic("pcibios_fixup_bus: found "
"unexpected PCI device in slot 1.");
}
devices->irq = 2; /* irq_nr is 2 for INT0 */
diff -puN /dev/null arch/mips/pci/fixup-rbtx4927.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/fixup-rbtx4927.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,223 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Board specific pci fixups for the Toshiba rbtx4927
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/tx4927/tx4927.h>
+#include <asm/tx4927/tx4927_pci.h>
+
+#undef DEBUG
+#ifdef DEBUG
+#define DBG(x...) printk(x)
+#else
+#define DBG(x...)
+#endif
+
+/* look up table for backplane pci irq for slots 17-20 by pin # */
+static unsigned char backplane_pci_irq[4][4] = {
+ /* PJ6 SLOT: 17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,
+ /* PJ6 SLOT: 17, PIN: 2 */
+ TX4927_IRQ_IOC_PCIB,
+ /* PJ6 SLOT: 17, PIN: 3 */
+ TX4927_IRQ_IOC_PCIC,
+ /* PJ6 SLOT: 17, PIN: 4 */
+ TX4927_IRQ_IOC_PCID},
+ /* SB SLOT: 18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,
+ /* SB SLOT: 18, PIN: 2 */
+ TX4927_IRQ_IOC_PCIC,
+ /* SB SLOT: 18, PIN: 3 */
+ TX4927_IRQ_IOC_PCID,
+ /* SB SLOT: 18, PIN: 4 */
+ TX4927_IRQ_IOC_PCIA},
+ /* PJ5 SLOT: 19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,
+ /* PJ5 SLOT: 19, PIN: 2 */
+ TX4927_IRQ_IOC_PCID,
+ /* PJ5 SLOT: 19, PIN: 3 */
+ TX4927_IRQ_IOC_PCIA,
+ /* PJ5 SLOT: 19, PIN: 4 */
+ TX4927_IRQ_IOC_PCIB},
+ /* PJ4 SLOT: 20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,
+ /* PJ4 SLOT: 20, PIN: 2 */
+ TX4927_IRQ_IOC_PCIA,
+ /* PJ4 SLOT: 20, PIN: 3 */
+ TX4927_IRQ_IOC_PCIB,
+ /* PJ4 SLOT: 20, PIN: 4 */
+ TX4927_IRQ_IOC_PCIC}
+};
+
+int pci_get_irq(struct pci_dev *dev, int pin)
+{
+ unsigned char irq = pin;
+
+ DBG("pci_get_irq: pin is %d\n", pin);
+ /* IRQ rotation */
+ irq--; /* 0-3 */
+ if (dev->bus->parent == NULL &&
+ PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
+ printk("Onboard PCI_SLOT(dev->devfn) is %d\n",
+ PCI_SLOT(dev->devfn));
+ /* IDSEL=A23 is tx4927 onboard pci slot */
+ irq = (irq + PCI_SLOT(dev->devfn)) % 4;
+ irq++; /* 1-4 */
+ DBG("irq is now %d\n", irq);
+
+ switch (irq) {
+ case 1:
+ irq = TX4927_IRQ_IOC_PCIA;
+ break;
+ case 2:
+ irq = TX4927_IRQ_IOC_PCIB;
+ break;
+ case 3:
+ irq = TX4927_IRQ_IOC_PCIC;
+ break;
+ case 4:
+ irq = TX4927_IRQ_IOC_PCID;
+ break;
+ }
+ } else {
+ /* PCI Backplane */
+ DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n",
+ PCI_SLOT(dev->devfn));
+ irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];
+ }
+ DBG("assigned irq %d\n", irq);
+ return irq;
+}
+
+
+#ifdef TX4927_SUPPORT_PCI_66
+extern int tx4927_pci66;
+extern void tx4927_pci66_setup(void);
+#endif
+extern void tx4927_pci_setup(void);
+
+#ifdef TX4927_SUPPORT_PCI_66
+int tx4927_pci66_check(void)
+{
+ struct pci_dev *dev;
+ unsigned short stat;
+ int cap66 = 1;
+
+ if (tx4927_pci66 < 0)
+ return 0;
+
+ /* check 66MHz capability */
+ pci_for_each_dev(dev) {
+ if (cap66) {
+ pci_read_config_word(dev, PCI_STATUS, &stat);
+ if (!(stat & PCI_STATUS_66MHZ)) {
+ printk(KERN_INFO
+ "PCI: %02x:%02x not 66MHz capable.\n",
+ dev->bus->number, dev->devfn);
+ cap66 = 0;
+ }
+ }
+ }
+ return cap66;
+}
+#endif
+
+void __init pcibios_fixup_irqs(void)
+{
+ unsigned char pin;
+ unsigned char irq;
+ struct pci_dev *dev;
+ unsigned int id;
+
+#ifdef TX4927_SUPPORT_PCI_66
+ if (tx4927_pci66_check()) {
+ tx4927_pci66_setup();
+ tx4927_pci_setup(); /* Reinitialize PCIC */
+ }
+#endif
+
+ pci_for_each_dev(dev) {
+ DBG("FIXUP:\n");
+ DBG(" devfn=0x%02x (0x%02x:0x%02x)\n",
+ dev->devfn, PCI_SLOT(dev->devfn),
+ PCI_FUNC(dev->devfn));
+
+ pci_read_config_dword(dev, PCI_VENDOR_ID, &id);
+ DBG(" id=0x%08x\n", id);
+
+ pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
+ DBG(" line=0x%02x/%d\n", irq, irq);
+
+ pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+ DBG(" pin=%d\n", pin);
+
+#ifdef DEBUG
+ {
+ unsigned int tmp;
+ pci_read_config_dword(dev, 0x10, &tmp);
+ DBG(" bar0:0x10=0x%08x\n", tmp);
+ pci_read_config_dword(dev, 0x14, &tmp);
+ DBG(" bar1:0x14=0x%08x\n", tmp);
+ pci_read_config_dword(dev, 0x1c, &tmp);
+ DBG(" bar2:0x1c=0x%08x\n", tmp);
+ pci_read_config_dword(dev, 0x20, &tmp);
+ DBG(" bar3:0x20=0x%08x\n", tmp);
+ pci_read_config_dword(dev, 0x24, &tmp);
+ DBG(" bar4:0x24=0x%08x\n", tmp);
+ }
+#endif
+
+ irq = 0;
+
+ if (id == 0x91301055) { /* ide */
+ irq = 14;
+ }
+
+ if (pin == 0) {
+ DBG(" auto irq (now=%d) -- skipping pin=0\n", irq);
+ } else if (irq) {
+ DBG(" auto irq (now=%d) -- skipping hardcoded irq\n", irq);
+ } else {
+ DBG(" auto irq (was=%d)\n", irq);
+ irq = pci_get_irq(dev, pin);
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
+ irq);
+ dev->irq = irq;
+ DBG(" auto irq (now=%d)\n", irq);
+ }
+
+ pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
+ printk(KERN_INFO
+ "PCI: 0x%02x:0x%02x(0x%02x,0x%02x) IRQ=%d\n",
+ dev->bus->number, dev->devfn, PCI_SLOT(dev->devfn),
+ PCI_FUNC(dev->devfn), irq);
+
+ }
+}
diff -puN -L arch/mips/pci/fixups-ev96100.c arch/mips/pci/fixups-ev96100.c~mips-megapatch /dev/null
--- 25/arch/mips/pci/fixups-ev96100.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,91 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * EV96100 Board specific pci fixups.
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci_ids.h>
-
-#include <asm/gt64120.h>
-#include <asm/galileo-boards/ev96100.h>
-
-extern unsigned short get_gt_devid(void);
-
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
-}
-
-void __init pcibios_fixup(void)
-{
-}
-
-void __init pcibios_fixup_irqs(void)
-{
- struct pci_dev *dev = NULL;
- unsigned int slot;
- u32 vendor;
- unsigned short gt_devid = get_gt_devid();
-
- /*
- ** EV96100/A interrupt routing for pci bus 0
- **
- ** Note: EV96100A board with irq jumper set on 'VxWorks'
- ** for EV96100 compatibility.
- */
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- if (dev->bus->number != 0)
- return;
-
- slot = PCI_SLOT(dev->devfn);
- pci_read_config_dword(dev, PCI_SUBSYSTEM_VENDOR_ID,
- &vendor);
-
-#ifdef DEBUG
- printk("devfn %x, slot %d devid %x\n",
- dev->devfn, slot, gt_devid);
-#endif
-
- /* fixup irq line based on slot # */
- if (slot == 8) {
- dev->irq = 5;
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
- dev->irq);
- } else if (slot == 9) {
- dev->irq = 2;
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
- dev->irq);
- }
- }
-}
-unsigned int pcibios_assign_all_busses(void)
-{
- return 0;
-}
diff -puN /dev/null arch/mips/pci/fixup-sni.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/fixup-sni.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,88 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * SNI specific PCI support for RM200/RM300.
+ *
+ * Copyright (C) 1997 - 2000, 2003 Ralf Baechle
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+
+#include <asm/mipsregs.h>
+#include <asm/pci_channel.h>
+#include <asm/sni.h>
+
+/*
+ * Shortcuts ...
+ */
+#define SCSI PCIMT_IRQ_SCSI
+#define ETH PCIMT_IRQ_ETHERNET
+#define INTA PCIMT_IRQ_INTA
+#define INTB PCIMT_IRQ_INTB
+#define INTC PCIMT_IRQ_INTC
+#define INTD PCIMT_IRQ_INTD
+
+/*
+ * Device 0: PCI EISA Bridge (directly routed)
+ * Device 1: NCR53c810 SCSI (directly routed)
+ * Device 2: PCnet32 Ethernet (directly routed)
+ * Device 3: VGA (routed to INTB)
+ * Device 4: Unused
+ * Device 5: Slot 2
+ * Device 6: Slot 3
+ * Device 7: Slot 4
+ *
+ * Documentation says the VGA is device 5 and device 3 is unused but that
+ * seem to be a documentation error. At least on my RM200C the Cirrus
+ * Logic CL-GD5434 VGA is device 3.
+ */
+static char irq_tab_rm200[8][5] __initdata = {
+ /* INTA INTB INTC INTD */
+ { 0, 0, 0, 0, 0 }, /* EISA bridge */
+ { SCSI, SCSI, SCSI, SCSI, SCSI }, /* SCSI */
+ { ETH, ETH, ETH, ETH, ETH }, /* Ethernet */
+ { INTB, INTB, INTB, INTB, INTB }, /* VGA */
+ { 0, 0, 0, 0, 0 }, /* Unused */
+ { 0, INTB, INTC, INTD, INTA }, /* Slot 2 */
+ { 0, INTC, INTD, INTA, INTB }, /* Slot 3 */
+ { 0, INTD, INTA, INTB, INTC }, /* Slot 4 */
+};
+
+/*
+ * In Revision D of the RM300 Device 2 has become a normal purpose Slot 1
+ *
+ * The VGA card is optional for RM300 systems.
+ */
+static char irq_tab_rm300d[8][5] __initdata = {
+ /* INTA INTB INTC INTD */
+ { 0, 0, 0, 0, 0 }, /* EISA bridge */
+ { SCSI, SCSI, SCSI, SCSI, SCSI }, /* SCSI */
+ { 0, INTC, INTD, INTA, INTB }, /* Slot 1 */
+ { INTB, INTB, INTB, INTB, INTB }, /* VGA */
+ { 0, 0, 0, 0, 0 }, /* Unused */
+ { 0, INTB, INTC, INTD, INTA }, /* Slot 2 */
+ { 0, INTC, INTD, INTA, INTB }, /* Slot 3 */
+ { 0, INTD, INTA, INTB, INTC }, /* Slot 4 */
+};
+
+static inline int is_rm300_revd(void)
+{
+ unsigned char csmsr = *(volatile unsigned char *)PCIMT_CSMSR;
+
+ return (csmsr & 0xa0) == 0x20;
+}
+
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ if (is_rm300_revd())
+ return irq_tab_rm300d[slot][pin];
+
+ return irq_tab_rm200[slot][pin];
+}
+
+struct pci_fixup pcibios_fixups[] = {
+ {0}
+};
diff -puN arch/mips/pci/fixup-tb0226.c~mips-megapatch arch/mips/pci/fixup-tb0226.c
--- 25/arch/mips/pci/fixup-tb0226.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/fixup-tb0226.c 2004-02-19 12:53:00.000000000 -0800
@@ -18,14 +18,6 @@
#include <asm/vr41xx/tb0226.h>
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
-}
-
-void __init pcibios_fixup(void)
-{
-}
-
void __init pcibios_fixup_irqs(void)
{
struct pci_dev *dev = NULL;
@@ -84,8 +76,3 @@ void __init pcibios_fixup_irqs(void)
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
}
}
-
-unsigned int pcibios_assign_all_busses(void)
-{
- return 0;
-}
diff -puN arch/mips/pci/fixup-tb0229.c~mips-megapatch arch/mips/pci/fixup-tb0229.c
--- 25/arch/mips/pci/fixup-tb0229.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/fixup-tb0229.c 2004-02-19 12:53:00.000000000 -0800
@@ -19,14 +19,6 @@
#include <asm/vr41xx/tb0229.h>
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
-}
-
-void __init pcibios_fixup(void)
-{
-}
-
void __init pcibios_fixup_irqs(void)
{
#ifdef CONFIG_TANBAC_TB0219
@@ -70,8 +62,3 @@ void __init pcibios_fixup_irqs(void)
}
#endif
}
-
-unsigned int pcibios_assign_all_busses(void)
-{
- return 0;
-}
diff -puN arch/mips/pci/fixup-victor-mpc30x.c~mips-megapatch arch/mips/pci/fixup-victor-mpc30x.c
--- 25/arch/mips/pci/fixup-victor-mpc30x.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/fixup-victor-mpc30x.c 2004-02-19 12:53:00.000000000 -0800
@@ -19,54 +19,30 @@
#include <asm/vr41xx/vrc4173.h>
#include <asm/vr41xx/mpc30x.h>
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
-}
-
-void __init pcibios_fixup(void)
-{
-}
+/*
+ * Shortcuts
+ */
+#define PCMCIA1 VRC4173_PCMCIA1_IRQ
+#define PCMCIA2 VRC4173_PCMCIA2_IRQ
+#define MQ MQ200_IRQ
+
+static const int internal_func_irqs[8] __initdata = {
+ VRC4173_CASCADE_IRQ,
+ VRC4173_AC97_IRQ,
+ VRC4173_USB_IRQ,
+
+};
+
+static char irq_tab_mpc30x[][5] __initdata = {
+ [12] = { PCMCIA1, PCMCIA1, 0, 0 },
+ [13] = { PCMCIA2, PCMCIA2, 0, 0 },
+ [29] = { MQ, MQ, 0, 0 }, /* mediaQ MQ-200 */
+};
-void __init pcibios_fixup_irqs(void)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
- struct pci_dev *dev = NULL;
- u8 slot, func;
+ if (slot == 30)
+ return internal_func_irqs[PCI_FUNC(dev->devfn)];
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- slot = PCI_SLOT(dev->devfn);
- func = PCI_FUNC(dev->devfn);
- dev->irq = 0;
-
- switch (slot) {
- case 12: /* NEC VRC4173 CARDU1 */
- dev->irq = VRC4173_PCMCIA1_IRQ;
- break;
- case 13: /* NEC VRC4173 CARDU2 */
- dev->irq = VRC4173_PCMCIA2_IRQ;
- break;
- case 29: /* mediaQ MQ-200 */
- dev->irq = MQ200_IRQ;
- break;
- case 30:
- switch (func) {
- case 0: /* NEC VRC4173 */
- dev->irq = VRC4173_CASCADE_IRQ;
- break;
- case 1: /* NEC VRC4173 AC97U */
- dev->irq = VRC4173_AC97_IRQ;
- break;
- case 2: /* NEC VRC4173 USBU */
- dev->irq = VRC4173_USB_IRQ;
- break;
- }
- break;
- }
-
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
-}
-
-unsigned int pcibios_assign_all_busses(void)
-{
- return 0;
+ return irq_tab_mpc30x[slot][pin];
}
diff -puN /dev/null arch/mips/pci/fixup-yosemite.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/fixup-yosemite.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2003 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+
+static char irq_tab_yosemite[8][5] __initdata = {
+ /* INTA INTB INTC INTD */
+ { -1, -1, -1, -1, -1 },
+ { -1, 3, 3, 3, 3 },
+ { -1, 4, 4, 4, 4 },
+ { -1, -1, -1, -1, -1 },
+ { -1, -1, -1, -1, -1 },
+ { -1, -1, -1, -1, -1 },
+ { -1, -1, -1, -1, -1 },
+ { -1, -1, -1, -1, -1 },
+};
+
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ return irq_tab_yosemite[slot][pin];
+}
+
+struct pci_fixup pcibios_fixups[] = {
+ {0}
+};
diff -puN arch/mips/pci/Makefile~mips-megapatch arch/mips/pci/Makefile
--- 25/arch/mips/pci/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/Makefile 2004-02-19 12:53:00.000000000 -0800
@@ -1,36 +1,50 @@
#
# Makefile for the PCI specific kernel interface routines under Linux.
#
-# This is all organized on a per system base which is horribly wrong and
-# really wants a cleanup. You have been warned.
+
+obj-y += pci.o
+
+#
+# PCI bus host bridge specific code
#
+obj-$(CONFIG_ITE_BOARD_GEN) += ops-it8172.o
+obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
+obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o
+obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o
+obj-$(CONFIG_MIPS_GT96100) += ops-gt96100.o
+obj-$(CONFIG_MIPS_MV64340) += ops-mv64340.o
+obj-$(CONFIG_MIPS_MSC) += ops-msc.o
+obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
+obj-$(CONFIG_MIPS_TX3927) += ops-jmr3927.o
-obj-$(CONFIG_NEW_PCI) += pci.o
-obj-$(CONFIG_PCI_AUTO) += pci-auto.o
-obj-$(CONFIG_DDB5074) += pci-ddb5074.o ops-ddb5074.o
-obj-$(CONFIG_DDB5476) += pci-ddb5476.o ops-ddb5476.o
-obj-$(CONFIG_DDB5477) += pci-ddb5477.o ops-ddb5477.o
+#
+# These are still pretty much in the old state, watch, go blind.
+#
+obj-$(CONFIG_DDB5074) += fixup-ddb5074.o pci-ddb5074.o ops-ddb5074.o
+obj-$(CONFIG_DDB5476) += ops-ddb5476.o pci-ddb5476.o
+obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o
obj-$(CONFIG_HP_LASERJET) += pci-hplj.o
-obj-$(CONFIG_ITE_BOARD_GEN) += ops-it8172.o
-obj-$(CONFIG_LASAT) += pci-lasat.o common.o
-obj-$(CONFIG_MIPS_BOARDS_GEN) += pci-mips.o
-obj-$(CONFIG_MIPS_COBALT) += pci-cobalt.o
-obj-$(CONFIG_MIPS_EV64120) += ops-ev64120.o
-obj-$(CONFIG_MIPS_EV96100) += fixup-ev96100.o ops-ev96100.o
+obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
+obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
+obj-$(CONFIG_MIPS_EV96100) += fixup-ev64120.o
+obj-$(CONFIG_MIPS_EV96100) += fixup-ev96100.o pci-ev96100.o
obj-$(CONFIG_MIPS_ITE8172) += fixup-ite8172g.o
obj-$(CONFIG_MIPS_IVR) += fixup-ivr.o
-obj-$(CONFIG_MIPS_PB1500) += fixups-au1000.o ops-au1000.o
-obj-$(CONFIG_MOMENCO_OCELOT) += fixups-ocelot.o ops-ocelot.o
+obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
+obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o
+obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o
+obj-$(CONFIG_MOMENCO_OCELOT_C) += pci-ocelot-c.o
+obj-$(CONFIG_MOMENCO_OCELOT_G) += pci-ocelot-g.o
obj-$(CONFIG_NEC_EAGLE) += fixup-eagle.o ops-vrc4173.o
+obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o
obj-$(CONFIG_SGI_IP27) += pci-ip27.o
-obj-$(CONFIG_SGI_IP32) += pci-ip32.o
+obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o
obj-$(CONFIG_SIBYTE_SB1250) += pci-sb1250.o
-obj-$(CONFIG_SNI_RM200_PCI) += pci-sni.o
+obj-$(CONFIG_SNI_RM200_PCI) += fixup-sni.o ops-sni.o
obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
obj-$(CONFIG_TANBAC_TB0229) += fixup-tb0229.o
-obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o ops-jmr3927.o
-#obj-$(CONFIG_MOMENCO_OCELOT_C) += pci-ocelot-c.o
-obj-$(CONFIG_MOMENCO_OCELOT_G) += pci-ocelot-g.o
+obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o pci-jmr3927.o
+obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o ops-tx4927.o
obj-$(CONFIG_VICTOR_MPC30X) += fixup-capcella.o
-obj-$(CONFIG_VR41XX_COMMON) += pci-vr41xx.o
+obj-$(CONFIG_MACH_VR41XX) += pci-vr41xx.o
obj-$(CONFIG_ZAO_CAPCELLA) += fixup-victor-mpc30x.o
diff -puN arch/mips/pci/ops-au1000.c~mips-megapatch arch/mips/pci/ops-au1000.c
--- 25/arch/mips/pci/ops-au1000.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/ops-au1000.c 2004-02-19 12:53:00.000000000 -0800
@@ -34,47 +34,14 @@
#include <linux/kernel.h>
#include <linux/init.h>
-#include <asm/au1000.h>
+#include <asm/mach-au1x00/au1000.h>
#ifdef CONFIG_MIPS_PB1000
-#include <asm/pb1000.h>
+#include <asm/mac-pb1x00/pb1000.h>
#endif
-#include <asm/pci_channel.h>
#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-/* TBD */
-static struct resource pci_io_resource = {
- "pci IO space",
- (u32) PCI_IO_START,
- (u32) PCI_IO_END,
- IORESOURCE_IO
-};
-
-static struct resource pci_mem_resource = {
- "pci memory space",
- (u32) PCI_MEM_START,
- (u32) PCI_MEM_END,
- IORESOURCE_MEM
-};
-
-extern struct pci_ops au1x_pci_ops;
-
-struct pci_channel mips_pci_channels[] = {
- {&au1x_pci_ops, &pci_io_resource, &pci_mem_resource,
- PCI_FIRST_DEVFN, PCI_LAST_DEVFN},
- {(struct pci_ops *) NULL, (struct resource *) NULL,
- (struct resource *) NULL, (int) NULL, (int) NULL}
-};
-
-
#ifdef CONFIG_MIPS_PB1000
/*
* "Bus 2" is really the first and only external slot on the pb1000.
@@ -102,12 +69,6 @@ static int config_access(unsigned char a
}
au_sync_udelay(1);
- DBG("config_access: %d bus %d dev_fn %x at %x *data %x, conf %x\n",
- access_type, bus, dev_fn, where, *data, config);
-
- DBG("bridge config reg: %x (%x)\n", au_readl(PCI_BRIDGE_CONFIG),
- *data);
-
if (au_readl(PCI_BRIDGE_CONFIG) & (1 << 16)) {
*data = 0xffffffff;
return -1;
@@ -178,20 +139,11 @@ static int config_access(unsigned char a
}
au_sync_udelay(2);
-
- DBG("config_access: %d bus %d device %d at %x *data %x, conf %x\n",
- access_type, bus->number, device, where, *data, config);
-
/* unmap io space */
iounmap((void *) cfg_addr);
/* check master abort */
status = au_readl(Au1500_PCI_STATCMD);
-#if 0
- if (access_type == PCI_ACCESS_READ) {
- printk("read data: %x\n", *data);
- }
-#endif
if (status & (1 << 29)) {
*data = 0xffffffff;
return -1;
@@ -268,9 +220,6 @@ write_config_word(struct pci_bus *bus, u
{
u32 data = 0;
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return -1;
@@ -288,9 +237,6 @@ static int
write_config_dword(struct pci_bus *bus, unsigned int devfn, int where,
u32 val)
{
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val))
return -1;
diff -puN /dev/null arch/mips/pci/ops-bonito64.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-bonito64.c 2004-02-19 12:53:00.000000000 -0800
@@ -0,0 +1,196 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * MIPS boards specific PCI support.
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/mips-boards/bonito64.h>
+
+#define PCI_ACCESS_READ 0
+#define PCI_ACCESS_WRITE 1
+
+/*
+ * PCI configuration cycle AD bus definition
+ */
+/* Type 0 */
+#define PCI_CFG_TYPE0_REG_SHF 0
+#define PCI_CFG_TYPE0_FUNC_SHF 8
+
+/* Type 1 */
+#define PCI_CFG_TYPE1_REG_SHF 0
+#define PCI_CFG_TYPE1_FUNC_SHF 8
+#define PCI_CFG_TYPE1_DEV_SHF 11
+#define PCI_CFG_TYPE1_BUS_SHF 16
+
+static int bonito64_pcibios_config_access(unsigned char access_type,
+ struct pci_bus *bus,
+ unsigned int devfn, int where,
+ u32 * data)
+{
+ unsigned char busnum = bus->number;
+ u32 dummy;
+ u64 pci_addr;
+
+ /* Algorithmics Bonito64 system controller. */
+
+ if ((busnum == 0) && (PCI_SLOT(devfn) > 21)) {
+ /* We number bus 0 devices from 0..21 */
+ return -1;
+ }
+
+#ifdef CONFIG_MIPS_BOARDS_GEN
+ if ((busnum == 0) && (PCI_SLOT(devfn) == 17)) {
+ /* MIPS Core boards have Bonito connected as device 17 */
+ return -1;
+ }
+#endif
+
+ /* Clear cause register bits */
+ BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR |
+ BONITO_PCICMD_MTABORT_CLR);
+
+ /*
+ * Setup pattern to be used as PCI "address" for
+ * Type 0 cycle
+ */
+ if (busnum == 0) {
+ /* IDSEL */
+ pci_addr = (u64) 1 << (PCI_SLOT(devfn) + 10);
+ } else {
+ /* Bus number */
+ pci_addr = busnum << PCI_CFG_TYPE1_BUS_SHF;
+
+ /* Device number */
+ pci_addr |=
+ PCI_SLOT(devfn) << PCI_CFG_TYPE1_DEV_SHF;
+ }
+
+ /* Function (same for Type 0/1) */
+ pci_addr |= PCI_FUNC(devfn) << PCI_CFG_TYPE0_FUNC_SHF;
+
+ /* Register number (same for Type 0/1) */
+ pci_addr |= (where & ~0x3) << PCI_CFG_TYPE0_REG_SHF;
+
+ if (busnum == 0) {
+ /* Type 0 */
+ BONITO_PCIMAP_CFG = pci_addr >> 16;
+ } else {
+ /* Type 1 */
+ BONITO_PCIMAP_CFG = (pci_addr >> 16) | 0x10000;
+ }
+
+ pci_addr &= 0xffff;
+
+ /* Flush Bonito register block */
+ dummy = BONITO_PCIMAP_CFG;
+ iob(); /* sync */
+
+ /* Perform access */
+ if (access_type == PCI_ACCESS_WRITE) {
+ *(volatile u32 *) (_pcictrl_bonito_pcicfg + (u32)pci_addr) = *(u32 *) data;
+
+ /* Wait till done */
+ while (BONITO_PCIMSTAT & 0xF);
+ } else {
+ *(u32 *) data = *(volatile u32 *) (_pcictrl_bonito_pcicfg + (u32)pci_addr);
+ }
+
+ /* Detect Master/Target abort */
+ if (BONITO_PCICMD & (BONITO_PCICMD_MABORT_CLR |
+ BONITO_PCICMD_MTABORT_CLR)) {
+ /* Error occurred */
+
+ /* Clear bits */
+ BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR |
+ BONITO_PCICMD_MTABORT_CLR);
+
+ return -1;
+ }
+
+ return 0;
+}
+
+
+/*
+ * We can't address 8 and 16 bit words directly. Instead we have to
+ * read/write a 32bit word and mask/modify the data we actually want.
+ */
+static int bonito64_pcibios_read(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 * val)
+{
+ u32 data = 0;
+
+ if ((size == 2) && (where & 1))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+ else if ((size == 4) && (where & 3))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+
+ if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
+ &data))
+ return -1;
+
+ if (size == 1)
+ *val = (data >> ((where & 3) << 3)) & 0xff;
+ else if (size == 2)
+ *val = (data >> ((where & 3) << 3)) & 0xffff;
+ else
+ *val = data;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int bonito64_pcibios_write(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
+{
+ u32 data = 0;
+
+ if ((size == 2) && (where & 1))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+ else if ((size == 4) && (where & 3))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+
+ if (size == 4)
+ data = val;
+ else {
+ if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
+ where, &data))
+ return -1;
+
+ if (size == 1)
+ data = (data & ~(0xff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ else if (size == 2)
+ data = (data & ~(0xffff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ }
+
+ if (bonito64_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
+ &data))
+ return -1;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops bonito64_pci_ops = {
+ .read = bonito64_pcibios_read,
+ .write = bonito64_pcibios_write
+};
diff -puN arch/mips/pci/ops-ddb5074.c~mips-megapatch arch/mips/pci/ops-ddb5074.c
--- 25/arch/mips/pci/ops-ddb5074.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/ops-ddb5074.c 2004-02-19 12:53:00.000000000 -0800
@@ -14,7 +14,6 @@
* option) any later version.
*
*/
-#include <linux/config.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/types.h>
@@ -270,66 +269,3 @@ struct pci_ops ddb5476_ext_pci_ops = {
extpci_write_config_word,
extpci_write_config_dword
};
-
-
-#if defined(CONFIG_RUNTIME_DEBUG)
-void jsun_scan_pci_bus(void)
-{
- struct pci_bus bus;
- struct pci_dev dev;
- unsigned int devfn;
- int j;
-
- pci_config_workaround = 0;
-
- bus.parent = NULL; /* we scan the top level only */
- dev.bus = &bus;
- dev.sysdata = NULL;
-
- /* scan ext pci bus and io pci bus */
- for (j = 0; j < 1; j++) {
- printk(KERN_INFO "scan ddb5476 external PCI bus:\n");
- bus.ops = &ddb5476_ext_pci_ops;
-
- for (devfn = 0; devfn < 0x100; devfn += 8) {
- u32 temp;
- u16 temp16;
- u8 temp8;
- int i;
-
- dev.devfn = devfn;
- db_verify(pci_read_config_dword(&dev, 0, &temp),
- == PCIBIOS_SUCCESSFUL);
- if (temp == 0xffffffff)
- continue;
-
- printk(KERN_INFO "slot %d: (addr %d) \n",
- devfn / 8, 11 + devfn / 8);
-
- /* verify read word and byte */
- db_verify(pci_read_config_word(&dev, 2, &temp16),
- == PCIBIOS_SUCCESSFUL);
- db_assert(temp16 == (temp >> 16));
- db_verify(pci_read_config_byte(&dev, 3, &temp8),
- == PCIBIOS_SUCCESSFUL);
- db_assert(temp8 == (temp >> 24));
- db_verify(pci_read_config_byte(&dev, 1, &temp8),
- == PCIBIOS_SUCCESSFUL);
- db_assert(temp8 == ((temp >> 8) & 0xff));
-
- for (i = 0; i < 16; i++) {
- if ((i % 4) == 0)
- printk(KERN_INFO);
- db_verify(pci_read_config_dword
- (&dev, i * 4, &temp),
- == PCIBIOS_SUCCESSFUL);
- printk("\t%08X", temp);
- if ((i % 4) == 3)
- printk("\n");
- }
- }
- }
-
- pci_config_workaround = 1;
-}
-#endif
diff -puN arch/mips/pci/ops-ddb5476.c~mips-megapatch arch/mips/pci/ops-ddb5476.c
--- 25/arch/mips/pci/ops-ddb5476.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/ops-ddb5476.c 2004-02-19 12:53:00.000000000 -0800
@@ -14,7 +14,6 @@
* option) any later version.
*
*/
-#include <linux/config.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/types.h>
@@ -285,66 +284,3 @@ struct pci_ops ddb5476_ext_pci_ops = {
extpci_write_config_word,
extpci_write_config_dword
};
-
-
-#if defined(CONFIG_RUNTIME_DEBUG)
-void jsun_scan_pci_bus(void)
-{
- struct pci_bus bus;
- struct pci_dev dev;
- unsigned int devfn;
- int j;
-
- pci_config_workaround = 0;
-
- bus.parent = NULL; /* we scan the top level only */
- dev.bus = &bus;
- dev.sysdata = NULL;
-
- /* scan ext pci bus and io pci bus */
- for (j = 0; j < 1; j++) {
- printk(KERN_INFO "scan ddb5476 external PCI bus:\n");
- bus.ops = &ddb5476_ext_pci_ops;
-
- for (devfn = 0; devfn < 0x100; devfn += 8) {
- u32 temp;
- u16 temp16;
- u8 temp8;
- int i;
-
- dev.devfn = devfn;
- db_verify(pci_read_config_dword(&dev, 0, &temp),
- == PCIBIOS_SUCCESSFUL);
- if (temp == 0xffffffff)
- continue;
-
- printk(KERN_INFO "slot %d: (addr %d) \n",
- devfn / 8, 11 + devfn / 8);
-
- /* verify read word and byte */
- db_verify(pci_read_config_word(&dev, 2, &temp16),
- == PCIBIOS_SUCCESSFUL);
- db_assert(temp16 == (temp >> 16));
- db_verify(pci_read_config_byte(&dev, 3, &temp8),
- == PCIBIOS_SUCCESSFUL);
- db_assert(temp8 == (temp >> 24));
- db_verify(pci_read_config_byte(&dev, 1, &temp8),
- == PCIBIOS_SUCCESSFUL);
- db_assert(temp8 == ((temp >> 8) & 0xff));
-
- for (i = 0; i < 16; i++) {
- if ((i % 4) == 0)
- printk(KERN_INFO);
- db_verify(pci_read_config_dword
- (&dev, i * 4, &temp),
- == PCIBIOS_SUCCESSFUL);
- printk("\t%08X", temp);
- if ((i % 4) == 3)
- printk("\n");
- }
- }
- }
-
- pci_config_workaround = 1;
-}
-#endif
diff -puN arch/mips/pci/ops-ddb5477.c~mips-megapatch arch/mips/pci/ops-ddb5477.c
--- 25/arch/mips/pci/ops-ddb5477.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/ops-ddb5477.c 2004-02-19 12:53:00.000000000 -0800
@@ -67,7 +67,7 @@ static inline u32 ddb_access_config_base
{
u32 pci_addr = 0;
u32 pciinit_offset = 0;
- u32 virt_addr = swap->config_base;
+ u32 virt_addr;
u32 option;
/* minimum pdar (window) size is 2MB */
@@ -127,39 +127,41 @@ static inline void ddb_close_config_base
}
static int read_config_dword(struct pci_config_swap *swap,
- struct pci_bus *bus, u32 where, u32 * val)
+ struct pci_bus *bus, u32 devfn, u32 where,
+ u32 * val)
{
- u32 bus, slot_num, func_num;
+ u32 bus_num, slot_num, func_num;
u32 base;
db_assert((where & 3) == 0);
db_assert(where < (1 << 8));
/* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
+ if (bus->parent != NULL) {
+ bus_num = bus->number;
+ db_assert(bus_num != 0);
} else {
- bus = 0;
+ bus_num = 0;
}
- slot_num = PCI_SLOT(dev->devfn);
- func_num = PCI_FUNC(dev->devfn);
- base = ddb_access_config_base(swap, bus, slot_num);
+ slot_num = PCI_SLOT(devfn);
+ func_num = PCI_FUNC(devfn);
+ base = ddb_access_config_base(swap, bus_num, slot_num);
*val = *(volatile u32 *) (base + (func_num << 8) + where);
ddb_close_config_base(swap);
return PCIBIOS_SUCCESSFUL;
}
static int read_config_word(struct pci_config_swap *swap,
- struct pci_bus *bus, u32 where, u16 * val)
+ struct pci_bus *bus, u32 devfn, u32 where,
+ u16 * val)
{
int status;
u32 result;
db_assert((where & 1) == 0);
- status = read_config_dword(swap, bus, where & ~3, &result);
+ status = read_config_dword(swap, bus, devfn, where & ~3, &result);
if (where & 2)
result >>= 16;
*val = result & 0xffff;
@@ -167,13 +169,13 @@ static int read_config_word(struct pci_c
}
static int read_config_byte(struct pci_config_swap *swap,
- struct pci_bus *bus, unsigned int devfn,
+ struct pci_bus *bus, u32 devfn, u32 where,
u8 * val)
{
int status;
u32 result;
- status = read_config_dword(swap, bus, where & ~3, &result);
+ status = read_config_dword(swap, bus, devfn, where & ~3, &result);
if (where & 1)
result >>= 8;
if (where & 2)
@@ -184,10 +186,10 @@ static int read_config_byte(struct pci_c
}
static int write_config_dword(struct pci_config_swap *swap,
- struct pci_bus *bus, unsigned int devfn,
+ struct pci_bus *bus, u32 devfn, u32 where,
u32 val)
{
- u32 busno, slot_num, func_num;
+ u32 bus_num, slot_num, func_num;
u32 base;
db_assert((where & 3) == 0);
@@ -195,30 +197,29 @@ static int write_config_dword(struct pci
/* check if the bus is top-level */
if (bus->parent != NULL) {
- busno = bus->number;
- db_assert(busno != 0);
+ bus_num = bus->number;
+ db_assert(bus_num != 0);
} else {
- busno = 0;
+ bus_num = 0;
}
slot_num = PCI_SLOT(devfn);
func_num = PCI_FUNC(devfn);
- base = ddb_access_config_base(swap, busno, slot_num);
+ base = ddb_access_config_base(swap, bus_num, slot_num);
*(volatile u32 *) (base + (func_num << 8) + where) = val;
ddb_close_config_base(swap);
return PCIBIOS_SUCCESSFUL;
}
static int write_config_word(struct pci_config_swap *swap,
- struct pci_bus *bus, unsigned int devfn,
- int where, u16 val)
+ struct pci_bus *bus, u32 devfn, u32 where, u16 val)
{
int status, shift = 0;
u32 result;
db_assert((where & 1) == 0);
- status = read_config_dword(swap, dev, where & ~3, &result);
+ status = read_config_dword(swap, bus, devfn, where & ~3, &result);
if (status != PCIBIOS_SUCCESSFUL)
return status;
@@ -226,17 +227,16 @@ static int write_config_word(struct pci_
shift += 16;
result &= ~(0xffff << shift);
result |= val << shift;
- return write_config_dword(swap, dev, where & ~3, result);
+ return write_config_dword(swap, bus, devfn, where & ~3, result);
}
static int write_config_byte(struct pci_config_swap *swap,
- struct pci_bus *bus, unsigned int devfn,
- int where, u8 val)
+ struct pci_bus *bus, u32 devfn, u32 where, u8 val)
{
int status, shift = 0;
u32 result;
- status = read_config_dword(swap, dev, where & ~3, &result);
+ status = read_config_dword(swap, bus, devfn, where & ~3, &result);
if (status != PCIBIOS_SUCCESSFUL)
return status;
@@ -246,28 +246,25 @@ static int write_config_byte(struct pci_
shift += 8;
result &= ~(0xff << shift);
result |= val << shift;
- return write_config_dword(swap, dev, where & ~3, result);
+ return write_config_dword(swap, bus, devfn, where & ~3, result);
}
-/*
- * Dump solution for now so I don't break hw I can't test on ...
- */
-#define MAKE_PCI_OPS(prefix, rw, unitname, unittype, pciswap) \
-static int prefix##_##rw##_config(struct pci_bus *bus, int where, int size, unittype val) \
+#define MAKE_PCI_OPS(prefix, rw, pciswap, star) \
+static int prefix##_##rw##_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 star val) \
{ \
if (size == 1) \
- return rw##_config_byte(pciswap, bus, where, val); \
+ return rw##_config_byte(pciswap, bus, devfn, where, (u8 star)val); \
else if (size == 2) \
- return rw##_config_word(pciswap, bus, where, val); \
+ return rw##_config_word(pciswap, bus, devfn, where, (u16 star)val); \
/* Size must be 4 */ \
- return rw##_config_dword(pciswap, bus, where, val); \
+ return rw##_config_dword(pciswap, bus, devfn, where, val); \
}
-MAKE_PCI_OPS(extpci, read, &ext_pci_swap)
- MAKE_PCI_OPS(extpci, write, &ext_pci_swap)
+MAKE_PCI_OPS(extpci, read, &ext_pci_swap, *)
+MAKE_PCI_OPS(extpci, write, &ext_pci_swap,)
- MAKE_PCI_OPS(iopci, read, &io_pci_swap)
- MAKE_PCI_OPS(iopci, write, &io_pci_swap)
+MAKE_PCI_OPS(iopci, read, &io_pci_swap, *)
+MAKE_PCI_OPS(iopci, write, &io_pci_swap,)
struct pci_ops ddb5477_ext_pci_ops = {
.read = extpci_read_config,
diff -puN -L arch/mips/pci/ops-ev64120.c arch/mips/pci/ops-ev64120.c~mips-megapatch /dev/null
--- 25/arch/mips/pci/ops-ev64120.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,1201 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * Galileo Evaluation Boards PCI support.
- *
- * The general-purpose functions to read/write and configure the GT64120A's
- * PCI registers (function names start with pci0 or pci1) are either direct
- * copies of functions written by Galileo Technology, or are modifications
- * of their functions to work with Linux 2.4 vs Linux 2.2. These functions
- * are Copyright - Galileo Technology.
- *
- * Other functions are derived from other MIPS PCI implementations, or were
- * written by RidgeRun, Inc, Copyright (C) 2000 RidgeRun, Inc.
- * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/version.h>
-#include <asm/pci.h>
-#include <asm/io.h>
-#include <asm/galileo-boards/ev64120.h>
-#include <asm/gt64120.h>
-
-#include <linux/init.h>
-
-#undef PCI_DEBUG
-
-#ifdef PCI_DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-#define SELF 0
-
-/*
- * These functions and structures provide the BIOS scan and mapping of the PCI
- * devices.
- */
-
-#define MAX_PCI_DEVS 10
-
-struct pci_device {
- u32 slot;
- u32 BARtype[6];
- u32 BARsize[6];
-};
-
-static void __init scan_and_initialize_pci(void);
-static u32 __init scan_pci_bus(struct pci_device *pci_devices);
-static void __init allocate_pci_space(struct pci_device *pci_devices);
-
-static void __devinit galileo_pcibios_fixup_bus(struct pci_bus *bus);
-
-/*
- * The functions that actually read and write to the controller.
- * Copied from or modified from Galileo Technology code.
- */
-static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device);
-static void pci0WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data);
-static unsigned int pci1ReadConfigReg(int offset, struct pci_dev *device);
-static void pci1WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data);
-
-static void pci0MapIOspace(unsigned int pci0IoBase,
- unsigned int pci0IoLength);
-static void pci1MapIOspace(unsigned int pci1IoBase,
- unsigned int pci1IoLength);
-static void pci0MapMemory0space(unsigned int pci0Mem0Base,
- unsigned int pci0Mem0Length);
-static void pci1MapMemory0space(unsigned int pci1Mem0Base,
- unsigned int pci1Mem0Length);
-static void pci0MapMemory1space(unsigned int pci0Mem1Base,
- unsigned int pci0Mem1Length);
-static void pci1MapMemory1space(unsigned int pci1Mem1Base,
- unsigned int pci1Mem1Length);
-static unsigned int pci0GetIOspaceBase(void);
-static unsigned int pci0GetIOspaceSize(void);
-static unsigned int pci0GetMemory0Base(void);
-static unsigned int pci0GetMemory0Size(void);
-static unsigned int pci0GetMemory1Base(void);
-static unsigned int pci0GetMemory1Size(void);
-static unsigned int pci1GetIOspaceBase(void);
-static unsigned int pci1GetIOspaceSize(void);
-static unsigned int pci1GetMemory0Base(void);
-static unsigned int pci1GetMemory0Size(void);
-static unsigned int pci1GetMemory1Base(void);
-static unsigned int pci1GetMemory1Size(void);
-
-
-/* Functions to implement "pci ops" */
-static int galileo_pcibios_read_config_word(struct pci_dev *dev,
- int offset, u16 * val);
-static int galileo_pcibios_read_config_byte(struct pci_dev *dev,
- int offset, u8 * val);
-static int galileo_pcibios_read_config_dword(struct pci_dev *dev,
- int offset, u32 * val);
-static int galileo_pcibios_write_config_byte(struct pci_dev *dev,
- int offset, u8 val);
-static int galileo_pcibios_write_config_word(struct pci_dev *dev,
- int offset, u16 val);
-static int galileo_pcibios_write_config_dword(struct pci_dev *dev,
- int offset, u32 val);
-static void galileo_pcibios_set_master(struct pci_dev *dev);
-
-/*
- * General-purpose PCI functions.
- */
-
-/*
- * pci0MapIOspace - Maps PCI0 IO space for the master.
- * Inputs: base and length of pci0Io
- */
-static void pci0MapIOspace(unsigned int pci0IoBase,
- unsigned int pci0IoLength)
-{
- unsigned int pci0IoTop =
- (unsigned int) (pci0IoBase + pci0IoLength);
-
- if (pci0IoLength == 0)
- pci0IoTop++;
-
- pci0IoBase = (unsigned int) (pci0IoBase >> 21);
- pci0IoTop = (unsigned int) (((pci0IoTop - 1) & 0x0fffffff) >> 21);
- GT_WRITE(GT_PCI0IOLD_OFS, pci0IoBase);
- GT_WRITE(GT_PCI0IOHD_OFS, pci0IoTop);
-}
-
-/*
- * pci1MapIOspace - Maps PCI1 IO space for the master.
- * Inputs: base and length of pci1Io
- */
-
-static void pci1MapIOspace(unsigned int pci1IoBase,
- unsigned int pci1IoLength)
-{
- unsigned int pci1IoTop =
- (unsigned int) (pci1IoBase + pci1IoLength);
-
- if (pci1IoLength == 0)
- pci1IoTop++;
-
- pci1IoBase = (unsigned int) (pci1IoBase >> 21);
- pci1IoTop = (unsigned int) (((pci1IoTop - 1) & 0x0fffffff) >> 21);
- GT_WRITE(GT_PCI1IOLD_OFS, pci1IoBase);
- GT_WRITE(GT_PCI1IOHD_OFS, pci1IoTop);
-}
-
-/*
- * pci0MapMemory0space - Maps PCI0 memory0 space for the master.
- * Inputs: base and length of pci0Mem0
- */
-
-static void pci0MapMemory0space(unsigned int pci0Mem0Base,
- unsigned int pci0Mem0Length)
-{
- unsigned int pci0Mem0Top = pci0Mem0Base + pci0Mem0Length;
-
- if (pci0Mem0Length == 0)
- pci0Mem0Top++;
-
- pci0Mem0Base = pci0Mem0Base >> 21;
- pci0Mem0Top = ((pci0Mem0Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI0M0LD_OFS, pci0Mem0Base);
- GT_WRITE(GT_PCI0M0HD_OFS, pci0Mem0Top);
-}
-
-/*
- * pci1MapMemory0space - Maps PCI1 memory0 space for the master.
- * Inputs: base and length of pci1Mem0
- */
-
-static void pci1MapMemory0space(unsigned int pci1Mem0Base,
- unsigned int pci1Mem0Length)
-{
- unsigned int pci1Mem0Top = pci1Mem0Base + pci1Mem0Length;
-
- if (pci1Mem0Length == 0)
- pci1Mem0Top++;
-
- pci1Mem0Base = pci1Mem0Base >> 21;
- pci1Mem0Top = ((pci1Mem0Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI1M0LD_OFS, pci1Mem0Base);
- GT_WRITE(GT_PCI1M0HD_OFS, pci1Mem0Top);
-}
-
-/*
- * pci0MapMemory1space - Maps PCI0 memory1 space for the master.
- * Inputs: base and length of pci0Mem1
- */
-
-static void pci0MapMemory1space(unsigned int pci0Mem1Base,
- unsigned int pci0Mem1Length)
-{
- unsigned int pci0Mem1Top = pci0Mem1Base + pci0Mem1Length;
-
- if (pci0Mem1Length == 0)
- pci0Mem1Top++;
-
- pci0Mem1Base = pci0Mem1Base >> 21;
- pci0Mem1Top = ((pci0Mem1Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI0M1LD_OFS, pci0Mem1Base);
- GT_WRITE(GT_PCI0M1HD_OFS, pci0Mem1Top);
-
-}
-
-/*
- * pci1MapMemory1space - Maps PCI1 memory1 space for the master.
- * Inputs: base and length of pci1Mem1
- */
-
-static void pci1MapMemory1space(unsigned int pci1Mem1Base,
- unsigned int pci1Mem1Length)
-{
- unsigned int pci1Mem1Top = pci1Mem1Base + pci1Mem1Length;
-
- if (pci1Mem1Length == 0)
- pci1Mem1Top++;
-
- pci1Mem1Base = pci1Mem1Base >> 21;
- pci1Mem1Top = ((pci1Mem1Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI1M1LD_OFS, pci1Mem1Base);
- GT_WRITE(GT_PCI1M1HD_OFS, pci1Mem1Top);
-}
-
-/*
- * pci0GetIOspaceBase - Return PCI0 IO Base Address.
- * Inputs: N/A
- * Returns: PCI0 IO Base Address.
- */
-
-static unsigned int pci0GetIOspaceBase(void)
-{
- unsigned int base;
- GT_READ(GT_PCI0IOLD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci0GetIOspaceSize - Return PCI0 IO Bar Size.
- * Inputs: N/A
- * Returns: PCI0 IO Bar Size.
- */
-static unsigned int pci0GetIOspaceSize(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI0IOLD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI0IOHD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci0GetMemory0Base - Return PCI0 Memory 0 Base Address.
- * Inputs: N/A
- * Returns: PCI0 Memory 0 Base Address.
- */
-static unsigned int pci0GetMemory0Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI0M0LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci0GetMemory0Size - Return PCI0 Memory 0 Bar Size.
- * Inputs: N/A
- * Returns: PCI0 Memory 0 Bar Size.
- */
-static unsigned int pci0GetMemory0Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI0M0LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI0M0HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci0GetMemory1Base - Return PCI0 Memory 1 Base Address.
- * Inputs: N/A
- * Returns: PCI0 Memory 1 Base Address.
- */
-static unsigned int pci0GetMemory1Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI0M1LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci0GetMemory1Size - Return PCI0 Memory 1 Bar Size.
- * Inputs: N/A
- * Returns: PCI0 Memory 1 Bar Size.
- */
-
-static unsigned int pci0GetMemory1Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI0M1LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI0M1HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci1GetIOspaceBase - Return PCI1 IO Base Address.
- * Inputs: N/A
- * Returns: PCI1 IO Base Address.
- */
-
-static unsigned int pci1GetIOspaceBase(void)
-{
- unsigned int base;
- GT_READ(GT_PCI1IOLD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci1GetIOspaceSize - Return PCI1 IO Bar Size.
- * Inputs: N/A
- * Returns: PCI1 IO Bar Size.
- */
-
-static unsigned int pci1GetIOspaceSize(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI1IOLD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI1IOHD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci1GetMemory0Base - Return PCI1 Memory 0 Base Address.
- * Inputs: N/A
- * Returns: PCI1 Memory 0 Base Address.
- */
-
-static unsigned int pci1GetMemory0Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI1M0LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci1GetMemory0Size - Return PCI1 Memory 0 Bar Size.
- * Inputs: N/A
- * Returns: PCI1 Memory 0 Bar Size.
- */
-
-static unsigned int pci1GetMemory0Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI1M1LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI1M1HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci1GetMemory1Base - Return PCI1 Memory 1 Base Address.
- * Inputs: N/A
- * Returns: PCI1 Memory 1 Base Address.
- */
-
-static unsigned int pci1GetMemory1Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI1M1LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci1GetMemory1Size - Return PCI1 Memory 1 Bar Size.
- * Inputs: N/A
- * Returns: PCI1 Memory 1 Bar Size.
- */
-
-static unsigned int pci1GetMemory1Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI1M1LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI1M1HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-
-
-/*
- * pci_range_ck -
- *
- * Check if the pci device that are trying to access does really exists
- * on the evaluation board.
- *
- * Inputs :
- * bus - bus number (0 for PCI 0 ; 1 for PCI 1)
- * dev - number of device on the specific pci bus
- *
- * Outpus :
- * 0 - if OK , 1 - if failure
- */
-static __inline__ int pci_range_ck(unsigned char bus, unsigned char dev)
-{
- //DBG(KERN_INFO "p_r_c %d %d\n",bus,dev);
- if (((bus == 0) || (bus == 1)) && (dev >= 6) && (dev <= 8))
- return 0; // Bus/Device Number OK
- return -1; // Bus/Device Number not OK
-}
-
-/*
- * pciXReadConfigReg - Read from a PCI configuration register
- * - Make sure the GT is configured as a master before
- * reading from another device on the PCI.
- * - The function takes care of Big/Little endian conversion.
- * INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
- * spec)
- * pciDevNum: The device number needs to be addressed.
- * RETURNS: data , if the data == 0xffffffff check the master abort bit in the
- * cause register to make sure the data is valid
- *
- * Configuration Address 0xCF8:
- *
- * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
- * |congif|Reserved| Bus |Device|Function|Register|00|
- * |Enable| |Number|Number| Number | Number | | <=field Name
- *
- */
-static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device)
-{
- unsigned int DataForRegCf8;
- unsigned int data;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
-
- /* The casual observer might wonder why the READ is duplicated here,
- rather than immediately following the WRITE, and just have the
- swap in the "if". That's because there is a latency problem
- with trying to read immediately after setting up the address
- register. The "if" check gives enough time for the address
- to stabilize, so the READ can work.
- */
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_READ(GT_PCI0_CFGDATA_OFS, &data);
- return data;
- } else { /* The PCI is working in LE Mode so swap the Data. */
- GT_READ(GT_PCI0_CFGDATA_OFS, &data);
- return cpu_to_le32(data);
- }
-}
-
-static unsigned int pci1ReadConfigReg(int offset, struct pci_dev *device)
-{
- unsigned int DataForRegCf8;
- unsigned int data;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- /* The casual observer might wonder why the READ is duplicated here,
- rather than immediately following the WRITE, and just have the
- swap in the "if". That's because there is a latency problem
- with trying to read immediately after setting up the address
- register. The "if" check gives enough time for the address
- to stabilize, so the READ can work.
- */
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- /* when configurating our own PCI 1 L-unit the access is through
- the PCI 0 interface with reg number = reg number + 0x80 */
- DataForRegCf8 |= 0x80;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
- } else { /* The PCI is working in LE Mode so swap the Data. */
- GT_WRITE(GT_PCI1_CFGADDR_OFS, DataForRegCf8);
- }
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_READ(GT_PCI0_CFGDATA_OFS, &data);
- return data;
- } else {
- GT_READ(GT_PCI1_CFGDATA_OFS, &data);
- return cpu_to_le32(data);
- }
-}
-
-
-
-/*
- * pciXWriteConfigReg - Write to a PCI configuration register
- * - Make sure the GT is configured as a master before
- * writingto another device on the PCI.
- * - The function takes care of Big/Little endian conversion.
- * Inputs: unsigned int regOffset: The register offset as it apears in the
- * GT spec
- * (or any other PCI device spec)
- * pciDevNum: The device number needs to be addressed.
- *
- * Configuration Address 0xCF8:
- *
- * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
- * |congif|Reserved| Bus |Device|Function|Register|00|
- * |Enable| |Number|Number| Number | Number | | <=field Name
- *
- */
-static void pci0WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data)
-{
- unsigned int DataForRegCf8;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
- } else { /* configuration Transaction over the pci. */
- /* The PCI is working in LE Mode so swap the Data. */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, le32_to_cpu(data));
- }
-}
-
-static void pci1WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data)
-{
- unsigned int DataForRegCf8;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- /* There is a latency problem
- with trying to read immediately after setting up the address
- register. The "if" check gives enough time for the address
- to stabilize, so the WRITE can work.
- */
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- /* when configurating our own PCI 1 L-unit the access is through
- the PCI 0 interface with reg number = reg number + 0x80 */
- DataForRegCf8 |= 0x80;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
- } else { /* configuration Transaction over the pci. */
- /* The PCI is working in LE Mode so swap the Data. */
- GT_WRITE(GT_PCI1_CFGADDR_OFS, DataForRegCf8);
- }
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
- } else { /* configuration Transaction over the pci. */
- GT_WRITE(GT_PCI1_CFGADDR_OFS, le32_to_cpu(data));
- }
-}
-
-
-/*
- * galileo_pcibios_(read/write)_config_(dword/word/byte) -
- *
- * reads/write a dword/word/byte register from the configuration space
- * of a device.
- *
- * Inputs :
- * bus - bus number
- * dev - device number
- * offset - register offset in the configuration space
- * val - value to be written / read
- *
- * Outputs :
- * PCIBIOS_SUCCESSFUL when operation was succesfull
- * PCIBIOS_DEVICE_NOT_FOUND when the bus or dev is errorneous
- * PCIBIOS_BAD_REGISTER_NUMBER when accessing non aligned
- */
-
-static int galileo_pcibios_read_config_dword(struct pci_dev *device,
- int offset, u32 * val)
-{
- int dev, bus;
- //DBG(KERN_INFO "rcd entry \n",offset,val);
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
-
- if (pci_range_ck(bus, dev)) {
- *val = 0xffffffff;
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- if (offset & 0x3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (bus == 0)
- *val = pci0ReadConfigReg(offset, device);
-// if (bus == 1) *val = pci1ReadConfigReg (offset,device);
- DBG(KERN_INFO "rr: rcd dev %d offset %x %x\n", dev, offset, *val);
-
- /*
- * This is so that the upper PCI layer will get the correct return
- * value if we're not attached to anything.
- */
- if ((offset == 0) && (*val == 0xffffffff)) {
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int galileo_pcibios_read_config_word(struct pci_dev *device,
- int offset, u16 * val)
-{
- int dev, bus;
-
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
-
- if (pci_range_ck(bus, dev)) {
- *val = 0xffff;
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- if (offset & 0x1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (bus == 0)
- *val =
- (unsigned short) (pci0ReadConfigReg(offset, device) >>
- ((offset & ~0x3) * 8));
-// if (bus == 1) *val = (unsigned short) (pci1ReadConfigReg(offset,device) >> ((offset & ~0x3) * 8));
-
- DBG(KERN_INFO "rr: rcw dev %d offset %x %x\n", dev, offset, *val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int galileo_pcibios_read_config_byte(struct pci_dev *device,
- int offset, u8 * val)
-{
- int dev, bus;
-
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
-
- if (pci_range_ck(bus, dev)) {
- *val = 0xff;
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
-
- if (bus == 0)
- *val =
- (unsigned char) (pci0ReadConfigReg(offset, device) >>
- ((offset & ~0x3) * 8));
-// if (bus == 1) *val = (unsigned char) (pci1ReadConfigReg(offset,device) >> ((offset & ~0x3) * 8));
-
- DBG(KERN_INFO "rr: rcb dev %d offset %x %x\n", dev, offset, *val);
-
- /* This is so that the upper PCI layer will get the correct return value if
- we're not attached to anything. */
- if ((offset == 0xe) && (*val == 0xff)) {
- u32 MasterAbort;
- GT_READ(GT_INTRCAUSE_OFS, &MasterAbort);
- if (MasterAbort & 0x40000) {
- DBG(KERN_INFO "PCI Master Abort, ICR %x\n",
- MasterAbort);
- GT_WRITE(GT_INTRCAUSE_OFS,
- (MasterAbort & 0xfffbffff));
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int galileo_pcibios_write_config_dword(struct pci_dev *device,
- int offset, u32 val)
-{
- int dev, bus;
-
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
-
- if (pci_range_ck(bus, dev))
- return PCIBIOS_DEVICE_NOT_FOUND;
- if (offset & 0x3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (bus == 0)
- pci0WriteConfigReg(offset, device, val);
-// if (bus == 1) pci1WriteConfigReg (offset,device,val);
-
- DBG(KERN_INFO "rr: wcd dev %d, offset %x, val %x\n", dev, offset,
- val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-
-static int galileo_pcibios_write_config_word(struct pci_dev *device,
- int offset, u16 val)
-{
- int dev, bus;
- unsigned long tmp;
-
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
-
- if (pci_range_ck(bus, dev))
- return PCIBIOS_DEVICE_NOT_FOUND;
- if (offset & 0x1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (bus == 0)
- tmp = pci0ReadConfigReg(offset, device);
-// if (bus == 1) tmp = pci1ReadConfigReg (offset,device);
-
- if ((offset % 4) == 0)
- tmp = (tmp & 0xffff0000) | (val & 0xffff);
- if ((offset % 4) == 2)
- tmp = (tmp & 0x0000ffff) | ((val & 0xffff) << 16);
-
- if (bus == 0)
- pci0WriteConfigReg(offset, device, tmp);
-// if (bus == 1) pci1WriteConfigReg (offset,device,tmp);
- DBG(KERN_INFO "rr: wcw dev %d, offset %x, val %x\n", dev, offset,
- val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int galileo_pcibios_write_config_byte(struct pci_dev *device,
- int offset, u8 val)
-{
- int dev, bus;
- unsigned long tmp;
-
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
-
- if (pci_range_ck(bus, dev))
- return PCIBIOS_DEVICE_NOT_FOUND;
- if (bus == 0)
- tmp = pci0ReadConfigReg(offset, device);
-// if (bus == 1) tmp = pci1ReadConfigReg (offset,device);
-
- if ((offset % 4) == 0)
- tmp = (tmp & 0xffffff00) | (val & 0xff);
- if ((offset % 4) == 1)
- tmp = (tmp & 0xffff00ff) | ((val & 0xff) << 8);
- if ((offset % 4) == 2)
- tmp = (tmp & 0xff00ffff) | ((val & 0xff) << 16);
- if ((offset % 4) == 3)
- tmp = (tmp & 0x00ffffff) | ((val & 0xff) << 24);
-
- if (bus == 0)
- pci0WriteConfigReg(offset, device, tmp);
-// if (bus == 1) pci1WriteConfigReg (offset,device,tmp);
- DBG(KERN_INFO "rr: wcb dev %d, offset %x, val %x\n", dev, offset,
- val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static void galileo_pcibios_set_master(struct pci_dev *dev)
-{
- u16 cmd;
-
- DBG(KERN_INFO "rr: galileo_pcibios_set_master\n");
-
- galileo_pcibios_read_config_word(dev, PCI_COMMAND, &cmd);
- cmd |= PCI_COMMAND_MASTER;
- galileo_pcibios_write_config_word(dev, PCI_COMMAND, cmd);
- DBG("PCI: Enabling device %s (%04x)\n", pci_name(dev), cmd);
-}
-
-/* Externally-expected functions. Do not change function names */
-
-int pcibios_enable_resources(struct pci_dev *dev)
-{
- u16 cmd, old_cmd;
- u16 tmp;
- u8 tmp1;
- int idx;
- struct resource *r;
-
- DBG(KERN_INFO "rr: pcibios_enable_resources\n");
-
- galileo_pcibios_read_config_word(dev, PCI_COMMAND, &cmd);
- old_cmd = cmd;
- for (idx = 0; idx < 6; idx++) {
- r = &dev->resource[idx];
- DBG(KERN_INFO
- "rr: BAR %d, start %lx, end %lx, flags %lx\n", idx,
- r->start, r->end, r->flags);
- if (!r->start && r->end) {
- printk(KERN_ERR
- "PCI: Device %s not available because of resource collisions\n",
- pci_name(dev));
- return -EINVAL;
- }
- if (r->flags & IORESOURCE_IO)
- cmd |= PCI_COMMAND_IO;
- if (r->flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
- if (cmd != old_cmd) {
- DBG(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n",
- pci_name(dev), old_cmd, cmd);
- galileo_pcibios_write_config_word(dev, PCI_COMMAND, cmd);
- }
-
- /*
- Let's fix up the latency timer and cache line size here. Cache line size =
- 32 bytes / sizeof dword (4) = 8.
- Latency timer must be > 8. 32 is random but appears to work.
- */
- galileo_pcibios_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &tmp1);
- if (tmp1 != 8) {
- DBG(KERN_INFO
- "rr: PCI setting cache line size to 8 from %d\n",
- tmp1);
- galileo_pcibios_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
- 8);
- }
- galileo_pcibios_read_config_byte(dev, PCI_LATENCY_TIMER, &tmp1);
- if (tmp1 < 32) {
- DBG(KERN_INFO
- "rr: PCI setting latency timer to 32 from %d\n", tmp1);
- galileo_pcibios_write_config_byte(dev, PCI_LATENCY_TIMER,
- 32);
- }
-
- return 0;
-}
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- DBG(KERN_INFO "rr: pcibios_enable_device\n");
- return pcibios_enable_resources(dev);
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
- if (res->flags & IORESOURCE_IO) {
- unsigned long start = res->start;
-
- /* We need to avoid collisions with `mirrored' VGA ports
- and other strange ISA hardware, so we always want the
- addresses kilobyte aligned. */
- if (size > 0x100) {
- DBG(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%ld bytes)\n", pci_name(dev),
- dev->resource - res, size);
- }
-
- start = (start + 1024 - 1) & ~(1024 - 1);
- res->start = start;
- }
-}
-
-/*
- * structure galileo_pci_ops
- *
- * This structure holds the pointers for the PCI configuration space
- * access, and the fixup for the interrupts.
- * This structure is registered to the operating system in boot time
- */
-struct pci_ops galileo_pci_ops = {
- galileo_pcibios_read_config_byte,
- galileo_pcibios_read_config_word,
- galileo_pcibios_read_config_dword,
- galileo_pcibios_write_config_byte,
- galileo_pcibios_write_config_word,
- galileo_pcibios_write_config_dword
-};
-
-/*
- * galileo_pcibios_fixup_bus -
- *
- * After detecting all agents over the PCI , this function is called
- * in order to give an interrupt number for each PCI device starting
- * from IRQ 20. It does also enables master for each device.
- *
- * Inputs :
- * mem_start , mem_end are not relevant in MIPS architecture.
- *
- * Outpus :
- * return always mem_start
- */
-static void __devinit galileo_pcibios_fixup_bus(struct pci_bus *bus)
-{
- unsigned int Current_IRQ = 20;
- struct pci_bus *current_bus = bus;
- struct pci_dev *devices;
- struct list_head *devices_link;
-
- list_for_each(devices_link, &(current_bus->devices)) {
- devices = pci_dev_b(devices_link);
- if (devices != NULL) {
- devices->irq = Current_IRQ++;
-
- /* Assign an interrupt number for the device */
- galileo_pcibios_write_config_byte(devices,
- PCI_INTERRUPT_LINE,
- Current_IRQ);
- galileo_pcibios_set_master(devices);
-
- }
- }
-
-}
-
-struct pci_fixup pcibios_fixups[] = {
-// { PCI_FIXUP_HEADER, 0x4620, 0x11ab, galileo_pcibios_fixup },
- {0}
-};
-
-void __devinit pcibios_fixup_bus(struct pci_bus *c)
-{
- DBG(KERN_INFO "rr: pcibios_fixup_bus\n");
- galileo_pcibios_fixup_bus(c);
-}
-
-/*
- * This code was derived from Galileo Technology's example
- * and significantly reworked.
- *
- * This is very simple. It does not scan multiple function devices. It does
- * not scan behind bridges. Those would be simple to implement, but we don't
- * currently need this.
- */
-static void __init scan_and_initialize_pci(void)
-{
- struct pci_device pci_devices[MAX_PCI_DEVS];
-
- if (scan_pci_bus(pci_devices)) {
- allocate_pci_space(pci_devices);
- }
-}
-
-/*
- * This is your basic PCI scan. It goes through each slot and checks to
- * see if there's something that responds. If so, then get the size and
- * type of each of the responding BARs. Save them for later.
- */
-
-static u32 __init scan_pci_bus(struct pci_device *pci_devices)
-{
- u32 arrayCounter = 0;
- u32 memType;
- u32 memSize;
- u32 pci_slot, bar;
- u32 id;
- u32 c18RegValue;
- struct pci_dev device;
-
- DBG(KERN_INFO "rr: scan_pci_bus\n");
-
- /*
- According to PCI REV 2.1 MAX agents on the bus are 21.
- We don't bother scanning ourselves (slot 0).
- */
- for (pci_slot = 1; pci_slot < 22; pci_slot++) {
-
- device.devfn = PCI_DEVFN(pci_slot, 0);
- id = pci0ReadConfigReg(PCI_VENDOR_ID, &device);
-
- /* Check for a PCI Master Abort (nothing responds in the slot) */
- GT_READ(GT_INTRCAUSE_OFS, &c18RegValue);
- /* Clearing bit 18 of in the Cause Register 0xc18 by writting 0. */
- GT_WRITE(GT_INTRCAUSE_OFS, (c18RegValue & 0xfffbffff));
- if ((id != 0xffffffff) && !(c18RegValue & 0x40000)) {
- DBG(KERN_INFO "rr: found device %x, slot %d\n", id,
- pci_slot);
- pci_devices[arrayCounter].slot = pci_slot;
- for (bar = 0; bar < 6; bar++) {
- memType =
- pci0ReadConfigReg(PCI_BASE_ADDRESS_0 +
- (bar * 4), &device);
- pci_devices[arrayCounter].BARtype[bar] =
- memType & 1;
- pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
- (bar * 4), &device,
- 0xffffffff);
- memSize =
- pci0ReadConfigReg(PCI_BASE_ADDRESS_0 +
- (bar * 4), &device);
- if (memType & 1) { /* IO space */
- pci_devices[arrayCounter].
- BARsize[bar] =
- ~(memSize & 0xfffffffc) + 1;
- } else { /* memory space */
- pci_devices[arrayCounter].
- BARsize[bar] =
- ~(memSize & 0xfffffff0) + 1;
- }
- DBG(KERN_INFO
- "rr: BAR %d, type %d, size %x\n", bar,
- (memType & 1),
- pci_devices[arrayCounter].
- BARsize[bar]);
- } /* BAR counter */
-
- arrayCounter++;
- }
- /* found a device */
- } /* slot counter */
-
- DBG(KERN_INFO "rr: found %d devices\n", arrayCounter);
- if (arrayCounter < MAX_PCI_DEVS) {
- pci_devices[arrayCounter].slot = -1;
- }
- return (arrayCounter);
-}
-
-#define ALIGN(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
-#define MAX(val1, val2) ((val1) > (val2) ? (val1) : (val2))
-
-/*
- * This function goes through the list of devices and allocates the BARs in
- * either IO or MEM space. It does it in order of size, which will limit the
- * amount of fragmentation we have in the IO and MEM spaces.
- */
-
-static void __init allocate_pci_space(struct pci_device *pci_devices)
-{
- u32 count, maxcount, bar;
- u32 maxSize, maxDevice, maxBAR;
- u32 alignto;
- u32 base;
- u32 pci0_mem_base = pci0GetMemory0Base();
- u32 pci0_io_base = pci0GetIOspaceBase();
- struct pci_dev device;
-
- DBG(KERN_INFO "rr: allocate_pci_space\n");
-
- DBG(KERN_INFO "pci0_io_base %x\n", pci0_io_base);
- DBG(KERN_INFO "pci0_mem_base %x\n", pci0_mem_base);
-
- /* How many PCI devices do we have? */
- maxcount = MAX_PCI_DEVS;
- for (count = 0; count < MAX_PCI_DEVS; count++) {
- if (pci_devices[count].slot == -1) {
- maxcount = count;
- break;
- }
- }
-
-// DBG(KERN_INFO "Found %d devices\n", maxcount);
-
- do {
- /* Find the largest size BAR we need to allocate */
- maxSize = 0;
- for (count = 0; count < maxcount; count++) {
- for (bar = 0; bar < 6; bar++) {
- if (pci_devices[count].BARsize[bar] >
- maxSize) {
- maxSize =
- pci_devices[count].
- BARsize[bar];
- maxDevice = count;
- maxBAR = bar;
- }
- }
- }
-
- /*
- We've found the largest BAR. Allocate it into IO or
- mem space. We don't idiot check the bases to make
- sure they haven't overflowed the current size for that aperture.
-
- Don't bother to enable the device's IO or MEM space here. That will
- be done in pci_enable_resources if the device is activated by a driver.
- */
- if (maxSize) {
- device.devfn =
- PCI_DEVFN(pci_devices[maxDevice].slot, 0);
- if (pci_devices[maxDevice].BARtype[maxBAR] == 1) {
- alignto = MAX(0x1000, maxSize);
- base = ALIGN(pci0_io_base, alignto);
- pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
- (maxBAR * 4), &device,
- base | 0x1);
- pci0_io_base = base + alignto;
- DBG(KERN_INFO
- "Device %d BAR %d address %x\n",
- pci_devices[maxDevice].slot, maxBAR,
- base);
- DBG(KERN_INFO "New IO base %x\n",
- pci0_io_base);
- } else {
- alignto = MAX(0x1000, maxSize);
- base = ALIGN(pci0_mem_base, alignto);
- pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
- (maxBAR * 4), &device,
- base);
- pci0_mem_base = base + alignto;
- DBG(KERN_INFO
- "Device %d BAR %d address %x\n",
- pci_devices[maxDevice].slot, maxBAR,
- base);
- DBG(KERN_INFO "New mem base %x\n",
- pci0_mem_base);
- }
- /*
- This entry is finished. Remove it from the list we'll scan.
- */
- pci_devices[maxDevice].BARsize[maxBAR] = 0;
- }
- } while (maxSize);
-}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 1;
-}
-
-static int __init pcibios_init(void)
-{
-
- u32 tmp;
- struct pci_dev controller;
-
- controller.devfn = SELF;
-
- DBG(KERN_INFO "rr: pcibios_init\n");
- GT_READ(GT_PCI0_CMD_OFS, &tmp);
- DBG(KERN_INFO "rr: PCI0 command - %x\n", tmp);
- GT_READ(GT_PCI0_BARE_OFS, &tmp);
- DBG(KERN_INFO "rr: BAR0 - %x\n", tmp);
-
- /*
- * You have to enable bus mastering to configure any other
- * card on the bus.
- */
- tmp = pci0ReadConfigReg(PCI_COMMAND, &controller);
- DBG(KERN_INFO "rr: command/status - %x\n", tmp);
- tmp |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
- DBG(KERN_INFO "rr: new command/status - %x\n", tmp);
- pci0WriteConfigReg(PCI_COMMAND, &controller, tmp);
-
- /* This scans the PCI bus and sets up initial values. */
- scan_and_initialize_pci();
-
- /*
- * Reset PCI I/O and PCI MEM values to ones supported by EVM.
- */
- ioport_resource.start = 0x10000000;
- ioport_resource.end = 0x11ffffff; /* 32 MB */
- iomem_resource.start = 0x12000000;
- iomem_resource.end = 0x13ffffff; /* 32 MB */
-
- pci_scan_bus(0, &galileo_pci_ops, NULL);
-
- return 0;
-}
-
-subsys_initcall(pcibios_init);
-
-char *pcibios_setup(char *str)
-{
- printk(KERN_INFO "rr: pcibios_setup\n");
- /* Nothing to do for now. */
-
- return str;
-}
diff -puN -L arch/mips/pci/ops-ev96100.c arch/mips/pci/ops-ev96100.c~mips-megapatch /dev/null
--- 25/arch/mips/pci/ops-ev96100.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,264 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Galileo EV96100 board specific pci support.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This file was derived from Carsten Langgaard's
- * arch/mips/mips-boards/generic/pci.c
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/delay.h>
-#include <asm //gt64120.h>
-#include <asm/galileo-boards/ev96100.h>
-#include <asm/pci_channel.h>
-
-#define PCI_ACCESS_READ 0
-#define PCI_ACCESS_WRITE 1
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-#define GT_PCI_MEM_BASE 0x12000000
-#define GT_PCI_MEM_SIZE 0x02000000
-#define GT_PCI_IO_BASE 0x10000000
-#define GT_PCI_IO_SIZE 0x02000000
-static struct resource pci_io_resource = {
- "io pci IO space",
- 0x10000000,
- 0x10000000 + 0x02000000,
- IORESOURCE_IO
-};
-
-static struct resource pci_mem_resource = {
- "ext pci memory space",
- 0x12000000,
- 0x12000000 + 0x02000000,
- IORESOURCE_MEM
-};
-
-extern struct pci_ops gt96100_pci_ops;
-
-struct pci_channel mips_pci_channels[] = {
- {>96100_pci_ops, &pci_io_resource, &pci_mem_resource, 1, 0xff},
- {NULL, NULL, NULL, NULL, NULL}
-};
-
-int
-static gt96100_config_access(unsigned char access_type,
- struct pci_dev *dev, unsigned char where,
- u32 * data)
-{
- unsigned char bus = dev->bus->number;
- unsigned char dev_fn = dev->devfn;
- u32 intr;
-
-
- if ((bus == 0) && (dev_fn >= PCI_DEVFN(31, 0))) {
- return -1; /* Because of a bug in the galileo (for slot 31). */
- }
-
- /* Clear cause register bits */
- GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
- GT_INTRCAUSE_TARABORT0_BIT));
-
- /* Setup address */
- GT_WRITE(GT_PCI0_CFGADDR_OFS,
- (bus << GT_PCI0_CFGADDR_BUSNUM_SHF) |
- (dev_fn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
- ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
- GT_PCI0_CFGADDR_CONFIGEN_BIT);
- udelay(2);
-
-
- if (access_type == PCI_ACCESS_WRITE) {
- if (dev_fn != 0) {
- *data = le32_to_cpu(*data);
- }
- GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
- } else {
- GT_READ(GT_PCI0_CFGDATA_OFS, *data);
- if (dev_fn != 0) {
- *data = le32_to_cpu(*data);
- }
- }
-
- udelay(2);
-
- /* Check for master or target abort */
- GT_READ(GT_INTRCAUSE_OFS, intr);
-
- if (intr &
- (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT)) {
- //printk("config access error: %x:%x\n", dev_fn,where);
- /* Error occured */
-
- /* Clear bits */
- GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
- GT_INTRCAUSE_TARABORT0_BIT));
-
- if (access_type == PCI_ACCESS_READ) {
- *data = 0xffffffff;
- }
- return -1;
- }
- return 0;
-}
-
-
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static int read_config_byte(struct pci_dev *dev, int where, u8 * val)
-{
- u32 data = 0;
-
- if (gt96100_config_access(PCI_ACCESS_READ, dev, where, &data)) {
- *val = 0xff;
- return -1;
- }
-
- *val = (data >> ((where & 3) << 3)) & 0xff;
- DBG("cfg read byte: bus %d dev_fn %x where %x: val %x\n",
- dev->bus->number, dev->devfn, where, *val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-
-static int read_config_word(struct pci_dev *dev, int where, u16 * val)
-{
- u32 data = 0;
-
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (gt96100_config_access(PCI_ACCESS_READ, dev, where, &data)) {
- *val = 0xffff;
- return -1;
- }
-
- *val = (data >> ((where & 3) << 3)) & 0xffff;
- DBG("cfg read word: bus %d dev_fn %x where %x: val %x\n",
- dev->bus->number, dev->devfn, where, *val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int read_config_dword(struct pci_dev *dev, int where, u32 * val)
-{
- u32 data = 0;
-
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (gt96100_config_access(PCI_ACCESS_READ, dev, where, &data)) {
- *val = 0xffffffff;
- return -1;
- }
-
- *val = data;
- DBG("cfg read dword: bus %d dev_fn %x where %x: val %x\n",
- dev->bus->number, dev->devfn, where, *val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-
-static int write_config_byte(struct pci_dev *dev, int where, u8 val)
-{
- u32 data = 0;
-
- if (gt96100_config_access(PCI_ACCESS_READ, dev, where, &data))
- return -1;
-
- data = (data & ~(0xff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- DBG("cfg write byte: bus %d dev_fn %x where %x: val %x\n",
- dev->bus->number, dev->devfn, where, val);
-
- if (gt96100_config_access(PCI_ACCESS_WRITE, dev, where, &data))
- return -1;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int write_config_word(struct pci_dev *dev, int where, u16 val)
-{
- u32 data = 0;
-
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (gt96100_config_access(PCI_ACCESS_READ, dev, where, &data))
- return -1;
-
- data = (data & ~(0xffff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- DBG("cfg write word: bus %d dev_fn %x where %x: val %x\n",
- dev->bus->number, dev->devfn, where, val);
-
- if (gt96100_config_access(PCI_ACCESS_WRITE, dev, where, &data))
- return -1;
-
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int write_config_dword(struct pci_dev *dev, int where, u32 val)
-{
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (gt96100_config_access(PCI_ACCESS_WRITE, dev, where, &val))
- return -1;
- DBG("cfg write dword: bus %d dev_fn %x where %x: val %x\n",
- dev->bus->number, dev->devfn, where, val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops gt96100_pci_ops = {
- read_config_byte,
- read_config_word,
- read_config_dword,
- write_config_byte,
- write_config_word,
- write_config_dword
-};
diff -puN /dev/null arch/mips/pci/ops-gt64111.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-gt64111.c 2004-02-19 12:53:01.000000000 -0800
@@ -0,0 +1,100 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 1996, 1997, 2002 by Ralf Baechle
+ * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/pci.h>
+#include <asm/io.h>
+#include <asm/gt64120.h>
+
+#include <asm/cobalt/cobalt.h>
+
+/*
+ * Accessing device 31 hangs the GT64120. Not sure if this will also hang
+ * the GT64111, let's be paranoid for now.
+ */
+static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn)
+{
+ if (bus->number == 0 && devfn == PCI_DEVFN(31, 0))
+ return -1;
+
+ return 0;
+}
+
+static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 * val)
+{
+ if (pci_range_ck(bus, devfn))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ switch (size) {
+ case 4:
+ PCI_CFG_SET(devfn, where);
+ *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
+ return PCIBIOS_SUCCESSFUL;
+
+ case 2:
+ PCI_CFG_SET(devfn, (where & ~0x3));
+ *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS)
+ >> ((where & 3) * 8);
+ return PCIBIOS_SUCCESSFUL;
+
+ case 1:
+ PCI_CFG_SET(devfn, (where & ~0x3));
+ *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS)
+ >> ((where & 3) * 8);
+ return PCIBIOS_SUCCESSFUL;
+ }
+
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+}
+
+static int gt64111_pci_write_config(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
+{
+ u32 tmp;
+
+ if (pci_range_ck(bus, devfn))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ switch (size) {
+ case 4:
+ PCI_CFG_SET(devfn, where);
+ GALILEO_OUTL(val, GT_PCI0_CFGDATA_OFS);
+
+ return PCIBIOS_SUCCESSFUL;
+
+ case 2:
+ PCI_CFG_SET(devfn, (where & ~0x3));
+ tmp = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
+ tmp &= ~(0xffff << ((where & 0x3) * 8));
+ tmp |= (val << ((where & 0x3) * 8));
+ GALILEO_OUTL(tmp, GT_PCI0_CFGDATA_OFS);
+
+ return PCIBIOS_SUCCESSFUL;
+
+ case 1:
+ PCI_CFG_SET(devfn, (where & ~0x3));
+ tmp = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
+ tmp &= ~(0xff << ((where & 0x3) * 8));
+ tmp |= (val << ((where & 0x3) * 8));
+ GALILEO_OUTL(tmp, GT_PCI0_CFGDATA_OFS);
+
+ return PCIBIOS_SUCCESSFUL;
+ }
+
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+}
+
+struct pci_ops gt64111_pci_ops = {
+ .read = gt64111_pci_read_config,
+ .write = gt64111_pci_write_config,
+};
diff -puN /dev/null arch/mips/pci/ops-gt64120.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-gt64120.c 2004-02-19 12:53:01.000000000 -0800
@@ -0,0 +1,154 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+
+#include <asm/gt64120.h>
+
+#define PCI_ACCESS_READ 0
+#define PCI_ACCESS_WRITE 1
+
+/*
+ * PCI configuration cycle AD bus definition
+ */
+/* Type 0 */
+#define PCI_CFG_TYPE0_REG_SHF 0
+#define PCI_CFG_TYPE0_FUNC_SHF 8
+
+/* Type 1 */
+#define PCI_CFG_TYPE1_REG_SHF 0
+#define PCI_CFG_TYPE1_FUNC_SHF 8
+#define PCI_CFG_TYPE1_DEV_SHF 11
+#define PCI_CFG_TYPE1_BUS_SHF 16
+
+static int gt64120_pcibios_config_access(unsigned char access_type,
+ struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
+{
+ unsigned char busnum = bus->number;
+ u32 intr;
+
+ if ((busnum == 0) && (PCI_SLOT(devfn) == 0))
+ /* Galileo itself is devfn 0, don't move it around */
+ return -1;
+
+ if ((busnum == 0) && (devfn >= PCI_DEVFN(31, 0)))
+ return -1; /* Because of a bug in the galileo (for slot 31). */
+
+ /* Clear cause register bits */
+ GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
+ GT_INTRCAUSE_TARABORT0_BIT));
+
+ /* Setup address */
+ GT_WRITE(GT_PCI0_CFGADDR_OFS,
+ (busnum << GT_PCI0_CFGADDR_BUSNUM_SHF) |
+ (devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+ ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
+ GT_PCI0_CFGADDR_CONFIGEN_BIT);
+
+ if (access_type == PCI_ACCESS_WRITE) {
+ if (busnum == 0 && PCI_SLOT(devfn) == 0) {
+ /*
+ * The Galileo system controller is acting
+ * differently than other devices.
+ */
+ GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
+ } else
+ __GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
+ } else {
+ if (busnum == 0 && PCI_SLOT(devfn) == 0) {
+ /*
+ * The Galileo system controller is acting
+ * differently than other devices.
+ */
+ *data = GT_READ(GT_PCI0_CFGDATA_OFS);
+ } else
+ *data = __GT_READ(GT_PCI0_CFGDATA_OFS);
+ }
+
+ /* Check for master or target abort */
+ intr = GT_READ(GT_INTRCAUSE_OFS);
+
+ if (intr & (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT)) {
+ /* Error occurred */
+
+ /* Clear bits */
+ GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
+ GT_INTRCAUSE_TARABORT0_BIT));
+
+ return -1;
+ }
+
+ return 0;
+}
+
+
+/*
+ * We can't address 8 and 16 bit words directly. Instead we have to
+ * read/write a 32bit word and mask/modify the data we actually want.
+ */
+static int gt64120_pcibios_read(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 * val)
+{
+ u32 data = 0;
+
+ if (gt64120_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
+ &data))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ if (size == 1)
+ *val = (data >> ((where & 3) << 3)) & 0xff;
+ else if (size == 2)
+ *val = (data >> ((where & 3) << 3)) & 0xffff;
+ else
+ *val = data;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int gt64120_pcibios_write(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
+{
+ u32 data = 0;
+
+ if (size == 4)
+ data = val;
+ else {
+ if (gt64120_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
+ where, &data))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ if (size == 1)
+ data = (data & ~(0xff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ else if (size == 2)
+ data = (data & ~(0xffff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ }
+
+ if (gt64120_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
+ &data))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops gt64120_pci_ops = {
+ .read = gt64120_pcibios_read,
+ .write = gt64120_pcibios_write
+};
diff -puN /dev/null arch/mips/pci/ops-gt96100.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-gt96100.c 2004-02-19 12:53:01.000000000 -0800
@@ -0,0 +1,169 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Galileo EV96100 board specific pci support.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This file was derived from Carsten Langgaard's
+ * arch/mips/mips-boards/generic/pci.c
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/delay.h>
+#include <asm/gt64120.h>
+#include <asm/galileo-boards/ev96100.h>
+
+#define PCI_ACCESS_READ 0
+#define PCI_ACCESS_WRITE 1
+
+static int static gt96100_config_access(unsigned char access_type,
+ struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
+{
+ unsigned char bus = bus->number;
+ u32 intr;
+
+ /*
+ * Because of a bug in the galileo (for slot 31).
+ */
+ if (bus == 0 && devfn >= PCI_DEVFN(31, 0))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ /* Clear cause register bits */
+ GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
+ GT_INTRCAUSE_TARABORT0_BIT));
+
+ /* Setup address */
+ GT_WRITE(GT_PCI0_CFGADDR_OFS,
+ (bus << GT_PCI0_CFGADDR_BUSNUM_SHF) |
+ (devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
+ ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
+ GT_PCI0_CFGADDR_CONFIGEN_BIT);
+ udelay(2);
+
+
+ if (access_type == PCI_ACCESS_WRITE) {
+ if (devfn != 0)
+ *data = le32_to_cpu(*data);
+ GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
+ } else {
+ *data = GT_READ(GT_PCI0_CFGDATA_OFS);
+ if (devfn != 0)
+ *data = le32_to_cpu(*data);
+ }
+
+ udelay(2);
+
+ /* Check for master or target abort */
+ intr = GT_READ(GT_INTRCAUSE_OFS);
+
+ if (intr & (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT)) {
+ /* Error occured */
+
+ /* Clear bits */
+ GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
+ GT_INTRCAUSE_TARABORT0_BIT));
+ return -1;
+ }
+ return 0;
+}
+
+/*
+ * We can't address 8 and 16 bit words directly. Instead we have to
+ * read/write a 32bit word and mask/modify the data we actually want.
+ */
+static int gt96100_pcibios_read(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 * val)
+{
+ u32 data = 0;
+
+ if (gt96100_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ switch (size) {
+ case 1:
+ *val = (data >> ((where & 3) << 3)) & 0xff;
+ break;
+
+ case 2:
+ *val = (data >> ((where & 3) << 3)) & 0xffff;
+ break;
+
+ case 4:
+ *val = data;
+ break;
+ }
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int gt96100_pcibios_write(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
+{
+ u32 data = 0;
+
+ switch (size) {
+ case 1:
+ if (gt96100_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
+ return -1;
+
+ data = (data & ~(0xff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+
+ if (gt96100_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
+ return -1;
+
+ return PCIBIOS_SUCCESSFUL;
+
+ case 2:
+ if (gt96100_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
+ return -1;
+
+ data = (data & ~(0xffff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+
+ if (gt96100_config_access(PCI_ACCESS_WRITE, dev, where, &data))
+ return -1;
+
+
+ return PCIBIOS_SUCCESSFUL;
+
+ case 4:
+ if (gt96100_config_access(PCI_ACCESS_WRITE, dev, where, &val))
+ return -1;
+
+ return PCIBIOS_SUCCESSFUL;
+ }
+}
+
+struct pci_ops gt96100_pci_ops = {
+ .read = gt96100_pcibios_read,
+ .write = gt96100_pcibios_write
+};
diff -puN arch/mips/pci/ops-it8172.c~mips-megapatch arch/mips/pci/ops-it8172.c
--- 25/arch/mips/pci/ops-it8172.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/ops-it8172.c 2004-02-19 12:53:01.000000000 -0800
@@ -77,10 +77,10 @@ static struct resource pci_mem_resource_
extern struct pci_ops it8172_pci_ops;
-struct pci_channel mips_pci_channels[] = {
- {&it8172_pci_ops, &pci_io_resource, &pci_mem_resource_0, 0x10,
- 0xff},
- {NULL, NULL, NULL, NULL, NULL}
+struct pci_controller it8172_controller = {
+ .pci_ops = &it8172_pci_ops,
+ .io_resource = &pci_io_resource,
+ .mem_resource = &pci_mem_resource_0,
};
static int it8172_pcibios_config_access(unsigned char access_type,
@@ -212,8 +212,3 @@ struct pci_ops it8172_pci_ops = {
.read = read_config,
.write = write_config,
};
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 1;
-}
diff -puN -L arch/mips/pci/ops-jmr3927.c arch/mips/pci/ops-jmr3927.c~mips-megapatch /dev/null
--- 25/arch/mips/pci/ops-jmr3927.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,491 +0,0 @@
-/***********************************************************************
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
- *
- * Define the pci_ops for JMR3927.
- *
- * Much of the code is derived from the original DDB5074 port by
- * Geert Uytterhoeven <geert@sonycom.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/addrspace.h>
-#include <asm/pci_channel.h>
-#include <asm/jmr3927/jmr3927.h>
-#include <asm/debug.h>
-
-struct resource pci_io_resource = {
- "pci IO space",
- 0x1000, /* reserve regacy I/O space */
- 0x1000 + JMR3927_PCIIO_SIZE - 1,
- IORESOURCE_IO
-};
-
-struct resource pci_mem_resource = {
- "pci memory space",
- JMR3927_PCIMEM,
- JMR3927_PCIMEM + JMR3927_PCIMEM_SIZE - 1,
- IORESOURCE_MEM
-};
-
-extern struct pci_ops jmr3927_pci_ops;
-
-struct pci_channel mips_pci_channels[] = {
- {&jmr3927_pci_ops, &pci_io_resource, &pci_mem_resource, 0, 0xff},
- {NULL, NULL, NULL, NULL, NULL}
-};
-
-unsigned int pcibios_assign_all_busses(void)
-{
- return 1;
-}
-
-static int
-mkaddr(unsigned char bus, unsigned char dev_fn, unsigned char where,
- int *flagsp)
-{
- if (bus == 0 && dev_fn >= PCI_DEVFN(TX3927_PCIC_MAX_DEVNU, 0))
- return -1;
-
- tx3927_pcicptr->ica = ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) | (where & 0xfc);
- /* clear M_ABORT and Disable M_ABORT Int. */
- tx3927_pcicptr->pcistat |= PCI_STATUS_REC_MASTER_ABORT;
- tx3927_pcicptr->pcistatim &= ~PCI_STATUS_REC_MASTER_ABORT;
- return 0;
-}
-
-static int check_abort(int flags)
-{
- int code = PCIBIOS_SUCCESSFUL;
- if (tx3927_pcicptr->pcistat & PCI_STATUS_REC_MASTER_ABORT) {
- tx3927_pcicptr->pcistat |= PCI_STATUS_REC_MASTER_ABORT;
- tx3927_pcicptr->pcistatim |= PCI_STATUS_REC_MASTER_ABORT;
- code = PCIBIOS_DEVICE_NOT_FOUND;
- }
- return code;
-}
-
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static int jmr3927_pcibios_read_config_byte(struct pci_dev *dev,
- int where, unsigned char *val)
-{
- int flags;
- unsigned char bus, func_num;
-
- db_assert((where & 3) == 0);
- db_assert(where < (1 << 8));
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
- *val =
- *(volatile u8 *) ((ulong) & tx3927_pcicptr->icd | (where & 3));
- return check_abort(flags);
-}
-
-static int jmr3927_pcibios_read_config_word(struct pci_dev *dev,
- int where, unsigned short *val)
-{
- int flags;
- unsigned char bus, func_num;
-
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- db_assert((where & 3) == 0);
- db_assert(where < (1 << 8));
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
- *val =
- le16_to_cpu(*(volatile u16 *)
- ((ulong) & tx3927_pcicptr->icd | (where & 3)));
- return check_abort(flags);
-}
-
-static int jmr3927_pcibios_read_config_dword(struct pci_dev *dev,
- int where, unsigned int *val)
-{
- int flags;
- unsigned char bus, func_num;
-
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- db_assert((where & 3) == 0);
- db_assert(where < (1 << 8));
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
- *val = le32_to_cpu(tx3927_pcicptr->icd);
- return check_abort(flags);
-}
-
-static int jmr3927_pcibios_write_config_byte(struct pci_dev *dev,
- int where, unsigned char val)
-{
- int flags;
- unsigned char bus, func_num;
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
- *(volatile u8 *) ((ulong) & tx3927_pcicptr->icd | (where & 3)) =
- val;
- return check_abort(flags);
-}
-
-static int jmr3927_pcibios_write_config_word(struct pci_dev *dev,
- int where, unsigned short val)
-{
- int flags;
- unsigned char bus, func_num;
-
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
- *(volatile u16 *) ((ulong) & tx3927_pcicptr->icd | (where & 3)) =
- cpu_to_le16(val);
- return check_abort(flags);
-}
-
-static int jmr3927_pcibios_write_config_dword(struct pci_dev *dev,
- int where, unsigned int val)
-{
- int flags;
- unsigned char bus, func_num;
-
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
- tx3927_pcicptr->icd = cpu_to_le32(val);
- return check_abort(flags);
-}
-struct pci_ops jmr3927_pci_ops = {
- jmr3927_pcibios_read_config_byte,
- jmr3927_pcibios_read_config_word,
- jmr3927_pcibios_read_config_dword,
- jmr3927_pcibios_write_config_byte,
- jmr3927_pcibios_write_config_word,
- jmr3927_pcibios_write_config_dword
-};
-
-#ifndef JMR3927_INIT_INDIRECT_PCI
-inline unsigned long tc_readl(volatile __u32 * addr)
-{
- return readl(addr);
-}
-inline void tc_writel(unsigned long data, volatile __u32 * addr)
-{
- writel(data, addr);
-}
-#else
-unsigned long tc_readl(volatile __u32 * addr)
-{
- unsigned long val;
-
- addr = PHYSADDR(addr);
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
- (unsigned long) addr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
- (PCI_IPCIBE_ICMD_MEMREAD << PCI_IPCIBE_ICMD_SHIFT) |
- PCI_IPCIBE_IBE_LONG;
- while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
- val =
- le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
- ipcidata);
- /* clear by setting */
- tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
- return val;
-}
-void tc_writel(unsigned long data, volatile __u32 * addr)
-{
- addr = PHYSADDR(addr);
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata =
- cpu_to_le32(data);
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
- (unsigned long) addr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
- (PCI_IPCIBE_ICMD_MEMWRITE << PCI_IPCIBE_ICMD_SHIFT) |
- PCI_IPCIBE_IBE_LONG;
- while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
- /* clear by setting */
- tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
-}
-unsigned char tx_ioinb(unsigned char *addr)
-{
- unsigned long val;
- __u32 ioaddr;
- int offset;
- int byte;
-
- ioaddr = (unsigned long) addr;
- offset = ioaddr & 0x3;
- if (offset == 0)
- byte = 0x7;
- else if (offset == 1)
- byte = 0xb;
- else if (offset == 2)
- byte = 0xd;
- else if (offset == 3)
- byte = 0xe;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
- (unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
- (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
- while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
- val =
- le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
- ipcidata);
- val = val & 0xff;
- /* clear by setting */
- tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
- return val;
-}
-void tx_iooutb(unsigned long data, unsigned char *addr)
-{
- __u32 ioaddr;
- int offset;
- int byte;
-
- data = data | (data << 8) | (data << 16) | (data << 24);
- ioaddr = (unsigned long) addr;
- offset = ioaddr & 0x3;
- if (offset == 0)
- byte = 0x7;
- else if (offset == 1)
- byte = 0xb;
- else if (offset == 2)
- byte = 0xd;
- else if (offset == 3)
- byte = 0xe;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata = data;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
- (unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
- (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
- while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
- /* clear by setting */
- tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
-}
-unsigned short tx_ioinw(unsigned short *addr)
-{
- unsigned long val;
- __u32 ioaddr;
- int offset;
- int byte;
-
- ioaddr = (unsigned long) addr;
- offset = ioaddr & 0x3;
- if (offset == 0)
- byte = 0x3;
- else if (offset == 2)
- byte = 0xc;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
- (unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
- (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
- while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
- val =
- le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
- ipcidata);
- val = val & 0xffff;
- /* clear by setting */
- tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
- return val;
-
-}
-void tx_iooutw(unsigned long data, unsigned short *addr)
-{
- __u32 ioaddr;
- int offset;
- int byte;
-
- data = data | (data << 16);
- ioaddr = (unsigned long) addr;
- offset = ioaddr & 0x3;
- if (offset == 0)
- byte = 0x3;
- else if (offset == 2)
- byte = 0xc;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata = data;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
- (unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
- (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
- while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
- /* clear by setting */
- tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
-}
-unsigned long tx_ioinl(unsigned int *addr)
-{
- unsigned long val;
- __u32 ioaddr;
-
- ioaddr = (unsigned long) addr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
- (unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
- (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) |
- PCI_IPCIBE_IBE_LONG;
- while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
- val =
- le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
- ipcidata);
- /* clear by setting */
- tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
- return val;
-}
-void tx_iooutl(unsigned long data, unsigned int *addr)
-{
- __u32 ioaddr;
-
- ioaddr = (unsigned long) addr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata =
- cpu_to_le32(data);
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
- (unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
- (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) |
- PCI_IPCIBE_IBE_LONG;
- while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
- /* clear by setting */
- tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
-}
-void tx_insbyte(unsigned char *addr, void *buffer, unsigned int count)
-{
- unsigned char *ptr = (unsigned char *) buffer;
-
- while (count--) {
- *ptr++ = tx_ioinb(addr);
- }
-}
-void tx_insword(unsigned short *addr, void *buffer, unsigned int count)
-{
- unsigned short *ptr = (unsigned short *) buffer;
-
- while (count--) {
- *ptr++ = tx_ioinw(addr);
- }
-}
-void tx_inslong(unsigned int *addr, void *buffer, unsigned int count)
-{
- unsigned long *ptr = (unsigned long *) buffer;
-
- while (count--) {
- *ptr++ = tx_ioinl(addr);
- }
-}
-void tx_outsbyte(unsigned char *addr, void *buffer, unsigned int count)
-{
- unsigned char *ptr = (unsigned char *) buffer;
-
- while (count--) {
- tx_iooutb(*ptr++, addr);
- }
-}
-void tx_outsword(unsigned short *addr, void *buffer, unsigned int count)
-{
- unsigned short *ptr = (unsigned short *) buffer;
-
- while (count--) {
- tx_iooutw(*ptr++, addr);
- }
-}
-void tx_outslong(unsigned int *addr, void *buffer, unsigned int count)
-{
- unsigned long *ptr = (unsigned long *) buffer;
-
- while (count--) {
- tx_iooutl(*ptr++, addr);
- }
-}
-#endif
diff -puN /dev/null arch/mips/pci/ops-mace.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-mace.c 2004-02-19 12:53:01.000000000 -0800
@@ -0,0 +1,91 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000, 2001 Keith M Wesolowski
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/types.h>
+#include <asm/pci.h>
+#include <asm/ip32/mace.h>
+
+#if 0
+# define DPRINTK(args...) printk(args);
+#else
+# define DPRINTK(args...)
+#endif
+
+/*
+ * O2 has up to 5 PCI devices connected into the MACE bridge. The device
+ * map looks like this:
+ *
+ * 0 aic7xxx 0
+ * 1 aic7xxx 1
+ * 2 expansion slot
+ * 3 N/C
+ * 4 N/C
+ */
+
+#define chkslot(_bus,_devfn) \
+do { \
+ if ((_bus)->number > 0 || PCI_SLOT (_devfn) < 1 \
+ || PCI_SLOT (_devfn) > 3) \
+ return PCIBIOS_DEVICE_NOT_FOUND; \
+} while (0)
+
+#define mkaddr(_devfn, _reg) \
+((((_devfn) & 0xffUL) << 8) | ((_reg) & 0xfcUL))
+
+static int
+mace_pci_read_config(struct pci_bus *bus, unsigned int devfn,
+ int reg, int size, u32 *val)
+{
+ chkslot(bus, devfn);
+ mace->pci.config_addr = mkaddr(devfn, reg);
+ switch (size) {
+ case 1:
+ *val = mace->pci.config_data.b[(reg & 3) ^ 3];
+ break;
+ case 2:
+ *val = mace->pci.config_data.w[((reg >> 1) & 1) ^ 1];
+ break;
+ case 4:
+ *val = mace->pci.config_data.l;
+ break;
+ }
+
+ DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int
+mace_pci_write_config(struct pci_bus *bus, unsigned int devfn,
+ int reg, int size, u32 val)
+{
+ chkslot(bus, devfn);
+ mace->pci.config_addr = mkaddr(devfn, reg);
+ switch (size) {
+ case 1:
+ mace->pci.config_data.b[(reg & 3) ^ 3] = val;
+ break;
+ case 2:
+ mace->pci.config_data.w[((reg >> 1) & 1) ^ 1] = val;
+ break;
+ case 4:
+ mace->pci.config_data.l = val;
+ break;
+ }
+
+ DPRINTK("write%d: reg=%08x,val=%02x\n", size * 8, reg, val);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops mace_pci_ops = {
+ .read = mace_pci_read_config,
+ .write = mace_pci_write_config,
+};
diff -puN /dev/null arch/mips/pci/ops-msc.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-msc.c 2004-02-19 12:53:01.000000000 -0800
@@ -0,0 +1,161 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * MIPS boards specific PCI support.
+ *
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/mips-boards/msc01_pci.h>
+
+#define PCI_ACCESS_READ 0
+#define PCI_ACCESS_WRITE 1
+
+/*
+ * PCI configuration cycle AD bus definition
+ */
+/* Type 0 */
+#define PCI_CFG_TYPE0_REG_SHF 0
+#define PCI_CFG_TYPE0_FUNC_SHF 8
+
+/* Type 1 */
+#define PCI_CFG_TYPE1_REG_SHF 0
+#define PCI_CFG_TYPE1_FUNC_SHF 8
+#define PCI_CFG_TYPE1_DEV_SHF 11
+#define PCI_CFG_TYPE1_BUS_SHF 16
+
+static int msc_pcibios_config_access(unsigned char access_type,
+ struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
+{
+ unsigned char busnum = bus->number;
+ unsigned char type;
+ u32 intr;
+
+ if ((busnum == 0) && (PCI_SLOT(devfn) == 0))
+ return -1;
+
+ /* Clear status register bits. */
+ MSC_WRITE(MSC01_PCI_INTSTAT,
+ (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT));
+
+ /* Setup address */
+ if (busnum == 0)
+ type = 0; /* Type 0 */
+ else
+ type = 1; /* Type 1 */
+
+ MSC_WRITE(MSC01_PCI_CFGADDR,
+ ((busnum << MSC01_PCI_CFGADDR_BNUM_SHF) |
+ (PCI_SLOT(devfn) << MSC01_PCI_CFGADDR_DNUM_SHF)
+ | (PCI_FUNC(devfn) <<
+ MSC01_PCI_CFGADDR_FNUM_SHF) | ((where /
+ 4) <<
+ MSC01_PCI_CFGADDR_RNUM_SHF)
+ | (type)));
+
+ /* Perform access */
+ if (access_type == PCI_ACCESS_WRITE)
+ MSC_WRITE(MSC01_PCI_CFGDATA, *data);
+ else
+ MSC_READ(MSC01_PCI_CFGDATA, *data);
+
+ /* Detect Master/Target abort */
+ MSC_READ(MSC01_PCI_INTSTAT, intr);
+ if (intr & (MSC01_PCI_INTCFG_MA_BIT |
+ MSC01_PCI_INTCFG_TA_BIT)) {
+ /* Error occurred */
+
+ /* Clear bits */
+ MSC_READ(MSC01_PCI_INTSTAT, intr);
+ MSC_WRITE(MSC01_PCI_INTSTAT,
+ (MSC01_PCI_INTCFG_MA_BIT |
+ MSC01_PCI_INTCFG_TA_BIT));
+
+ return -1;
+ }
+
+ return 0;
+}
+
+
+/*
+ * We can't address 8 and 16 bit words directly. Instead we have to
+ * read/write a 32bit word and mask/modify the data we actually want.
+ */
+static int msc_pcibios_read(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 * val)
+{
+ u32 data = 0;
+
+ if ((size == 2) && (where & 1))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+ else if ((size == 4) && (where & 3))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+
+ if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
+ &data))
+ return -1;
+
+ if (size == 1)
+ *val = (data >> ((where & 3) << 3)) & 0xff;
+ else if (size == 2)
+ *val = (data >> ((where & 3) << 3)) & 0xffff;
+ else
+ *val = data;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int msc_pcibios_write(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
+{
+ u32 data = 0;
+
+ if ((size == 2) && (where & 1))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+ else if ((size == 4) && (where & 3))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+
+ if (size == 4)
+ data = val;
+ else {
+ if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
+ where, &data))
+ return -1;
+
+ if (size == 1)
+ data = (data & ~(0xff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ else if (size == 2)
+ data = (data & ~(0xffff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ }
+
+ if (msc_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
+ &data))
+ return -1;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops msc_pci_ops = {
+ .read = msc_pcibios_read,
+ .write = msc_pcibios_write
+};
diff -puN /dev/null arch/mips/pci/ops-mv64340.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-mv64340.c 2004-02-19 12:53:01.000000000 -0800
@@ -0,0 +1,145 @@
+/*
+ * Copyright 2002 Momentum Computer
+ * Author: Matthew Dharm <mdharm@momenco.com>
+ *
+ * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <asm/mv64340.h>
+
+/*
+ * galileo_pcibios_(read/write)_config_(dword/word/byte) -
+ *
+ * reads/write a dword/word/byte register from the configuration space
+ * of a device.
+ *
+ * Note that bus 0 and bus 1 are local, and we assume all other busses are
+ * bridged from bus 1. This is a safe assumption, since any other
+ * configuration will require major modifications to the CP7000G
+ *
+ * Inputs :
+ * bus - bus number
+ * dev - device number
+ * offset - register offset in the configuration space
+ * val - value to be written / read
+ *
+ * Outputs :
+ * PCIBIOS_SUCCESSFUL when operation was succesfull
+ * PCIBIOS_DEVICE_NOT_FOUND when the bus or dev is errorneous
+ * PCIBIOS_BAD_REGISTER_NUMBER when accessing non aligned
+ */
+
+static int mv64340_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
+ int size, u32 * val, u32 address_reg, u32 data_reg)
+{
+ u32 address;
+
+ /* Accessing device 31 crashes the MV-64340. */
+ if (PCI_SLOT(devfn) > 5)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ address = (bus->number << 16) | (dev << 11) | (func << 8) |
+ (offset & 0xfc) | 0x80000000;
+
+ /* start the configuration cycle */
+ MV_WRITE(address_reg, address);
+
+ switch (size) {
+ case 1:
+ MV_READ_8(data_reg + (offset & 0x3), val);
+ break;
+
+ case 2:
+ MV_READ_16(data_reg + (offset & 0x3), val);
+ break;
+
+ case 4:
+ MV_READ(data_reg, val);
+ break;
+ }
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int mv64340_write_config(struct pci_bus *bus, unsigned int devfn,
+ int reg, int size, u32 val, u32 address_reg, u32 data_reg)
+{
+ u32 address;
+
+ /* Accessing device 31 crashes the MV-64340. */
+ if (PCI_SLOT(devfn) > 5)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ address = (bus->number << 16) | (devfn << 8) |
+ (offset & 0xfc) | 0x80000000;
+
+ /* start the configuration cycle */
+ MV_WRITE(address_reg, address);
+
+ switch (size) {
+ case 1:
+ /* write the data */
+ MV_WRITE_8(data_reg + (offset & 0x3), val);
+ break;
+
+ case 2:
+ /* write the data */
+ MV_WRITE_16(data_reg + (offset & 0x3), val);
+ break;
+
+ case 4:
+ /* write the data */
+ MV_WRITE(data_reg, val);
+ break;
+ }
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+#define BUILD_PCI_OPS(host) \
+ \
+static int mv64340_bus ## host ## _read_config(struct pci_bus *bus, \
+ unsigned int devfn, int reg, int size, u32 * val) \
+{ \
+ return mv64340_read_config(bus, devfn, reg, size, val, \
+ MV64340_PCI_ ## host ## _CONFIG_ADDR; \
+ MV64340_PCI_ ## host ## _CONFIG_DATA_VIRTUAL_REG); \
+} \
+ \
+static int mv64340_bus ## host ## _write_config(struct pci_bus *bus, \
+ unsigned int devfn, int reg, int size, u32 val) \
+{ \
+ return mv64340_write_config(bus, devfn, reg, size, val, \
+ MV64340_PCI_ ## host ## _CONFIG_ADDR; \
+ MV64340_PCI_ ## host ## _CONFIG_DATA_VIRTUAL_REG); \
+} \
+ \
+struct pci_ops mv64340_bus ## host ## _pci_ops = { \
+ .read = mv64340_bus ## host ## _read_config, \
+ .write = mv64340_bus ## host ## _write_config \
+};
+
+BUILD_PCI_OPS(0)
+BUILD_PCI_OPS(1)
diff -puN /dev/null arch/mips/pci/ops-nile4.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-nile4.c 2004-02-19 12:53:01.000000000 -0800
@@ -0,0 +1,147 @@
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <asm/bootinfo.h>
+
+#include <asm/lasat/lasat.h>
+#include <asm/gt64120.h>
+#include <asm/nile4.h>
+
+#define PCI_ACCESS_READ 0
+#define PCI_ACCESS_WRITE 1
+
+#define LO(reg) (reg / 4)
+#define HI(reg) (reg / 4 + 1)
+
+volatile unsigned long *const vrc_pciregs = (void *) Vrc5074_BASE;
+
+static spinlock_t nile4_pci_lock;
+
+static int nile4_pcibios_config_access(unsigned char access_type,
+ struct pci_bus *bus, unsigned int devfn, int where, u32 * val)
+{
+ unsigned char busnum = bus->number;
+ u32 adr, mask, err;
+
+ if ((busnum == 0) && (PCI_SLOT(devfn) > 8))
+ /* The addressing scheme chosen leaves room for just
+ * 8 devices on the first busnum (besides the PCI
+ * controller itself) */
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ if ((busnum == 0) && (devfn == PCI_DEVFN(0, 0))) {
+ /* Access controller registers directly */
+ if (access_type == PCI_ACCESS_WRITE) {
+ vrc_pciregs[(0x200 + where) >> 2] = *val;
+ } else {
+ *val = vrc_pciregs[(0x200 + where) >> 2];
+ }
+ return PCIBIOS_SUCCESSFUL;
+ }
+
+ /* Temporarily map PCI Window 1 to config space */
+ mask = vrc_pciregs[LO(NILE4_PCIINIT1)];
+ vrc_pciregs[LO(NILE4_PCIINIT1)] = 0x0000001a | (busnum ? 0x200 : 0);
+
+ /* Clear PCI Error register. This also clears the Error Type
+ * bits in the Control register */
+ vrc_pciregs[LO(NILE4_PCIERR)] = 0;
+ vrc_pciregs[HI(NILE4_PCIERR)] = 0;
+
+ /* Setup address */
+ if (busnum == 0)
+ adr =
+ KSEG1ADDR(PCI_WINDOW1) +
+ ((1 << (PCI_SLOT(devfn) + 15)) | (PCI_FUNC(devfn) << 8)
+ | (where & ~3));
+ else
+ adr = KSEG1ADDR(PCI_WINDOW1) | (busnum << 16) | (devfn << 8) |
+ (where & ~3);
+
+ if (access_type == PCI_ACCESS_WRITE)
+ *(u32 *) adr = *val;
+ else
+ *val = *(u32 *) adr;
+
+ /* Check for master or target abort */
+ err = (vrc_pciregs[HI(NILE4_PCICTRL)] >> 5) & 0x7;
+
+ /* Restore PCI Window 1 */
+ vrc_pciregs[LO(NILE4_PCIINIT1)] = mask;
+
+ if (err)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int nile4_pcibios_read(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 * val)
+{
+ unsigned long flags;
+ u32 data = 0;
+ int err;
+
+ if ((size == 2) && (where & 1))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+ else if ((size == 4) && (where & 3))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+
+ spin_lock_irqsave(&nile4_pci_lock, flags);
+ err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
+ &data);
+ spin_unlock_irqrestore(&nile4_pci_lock, flags);
+
+ if (err)
+ return err;
+
+ if (size == 1)
+ *val = (data >> ((where & 3) << 3)) & 0xff;
+ else if (size == 2)
+ *val = (data >> ((where & 3) << 3)) & 0xffff;
+ else
+ *val = data;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int nile4_pcibios_write(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
+{
+ unsigned long flags;
+ u32 data = 0;
+ int err;
+
+ if ((size == 2) && (where & 1))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+ else if ((size == 4) && (where & 3))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+
+ spin_lock_irqsave(&nile4_pci_lock, flags);
+ err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
+ &data);
+ spin_unlock_irqrestore(&nile4_pci_lock, flags);
+
+ if (err)
+ return err;
+
+ if (size == 1)
+ data = (data & ~(0xff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ else if (size == 2)
+ data = (data & ~(0xffff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ else
+ data = val;
+
+ if (nile4_pcibios_config_access
+ (PCI_ACCESS_WRITE, bus, devfn, where, &data))
+ return -1;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops nile4_pci_ops = {
+ .read = nile4_pcibios_read,
+ .write = nile4_pcibios_write,
+};
diff -puN -L arch/mips/pci/ops-ocelot.c arch/mips/pci/ops-ocelot.c~mips-megapatch /dev/null
--- 25/arch/mips/pci/ops-ocelot.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,1056 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * Galileo Evaluation Boards PCI support.
- *
- * The general-purpose functions to read/write and configure the GT64120A's
- * PCI registers (function names start with pci0 or pci1) are either direct
- * copies of functions written by Galileo Technology, or are modifications
- * of their functions to work with Linux 2.4 vs Linux 2.2. These functions
- * are Copyright - Galileo Technology.
- *
- * Other functions are derived from other MIPS PCI implementations, or were
- * written by RidgeRun, Inc, Copyright (C) 2000 RidgeRun, Inc.
- * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/version.h>
-#include <linux/cache.h>
-#include <asm/pci.h>
-#include <asm/io.h>
-#include <asm/gt64120/gt64120.h>
-
-#include <linux/init.h>
-
-#define SELF 0
-
-/*
- * These functions and structures provide the BIOS scan and mapping of the PCI
- * devices.
- */
-
-#define MAX_PCI_DEVS 10
-
-struct pci_device {
- u32 slot;
- u32 BARtype[6];
- u32 BARsize[6];
-};
-
-static void __init scan_and_initialize_pci(void);
-static u32 __init scan_pci_bus(struct pci_device *pci_devices);
-static void __init allocate_pci_space(struct pci_device *pci_devices);
-
-/*
- * The functions that actually read and write to the controller.
- *
- * Copied from or modified from Galileo Technology code.
- */
-static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device);
-static void pci0WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data);
-static unsigned int pci1ReadConfigReg(int offset, struct pci_dev *device);
-static void pci1WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data);
-
-static void pci0MapIOspace(unsigned int pci0IoBase,
- unsigned int pci0IoLength);
-static void pci1MapIOspace(unsigned int pci1IoBase,
- unsigned int pci1IoLength);
-static void pci0MapMemory0space(unsigned int pci0Mem0Base,
- unsigned int pci0Mem0Length);
-static void pci1MapMemory0space(unsigned int pci1Mem0Base,
- unsigned int pci1Mem0Length);
-static void pci0MapMemory1space(unsigned int pci0Mem1Base,
- unsigned int pci0Mem1Length);
-static void pci1MapMemory1space(unsigned int pci1Mem1Base,
- unsigned int pci1Mem1Length);
-static unsigned int pci0GetIOspaceBase(void);
-static unsigned int pci0GetIOspaceSize(void);
-static unsigned int pci0GetMemory0Base(void);
-static unsigned int pci0GetMemory0Size(void);
-static unsigned int pci0GetMemory1Base(void);
-static unsigned int pci0GetMemory1Size(void);
-static unsigned int pci1GetIOspaceBase(void);
-static unsigned int pci1GetIOspaceSize(void);
-static unsigned int pci1GetMemory0Base(void);
-static unsigned int pci1GetMemory0Size(void);
-static unsigned int pci1GetMemory1Base(void);
-static unsigned int pci1GetMemory1Size(void);
-
-
-/* Functions to implement "pci ops" */
-static int galileo_pcibios_read(struct pci_bus *bus, unsigned int devfn,
- int offset, int size, u32 * val);
-static int galileo_pcibios_write(struct pci_bus *bus, unsigned int devfn,
- int offset, int size, u32 val);
-static void galileo_pcibios_set_master(struct pci_dev *dev);
-
-/*
- * General-purpose PCI functions.
- */
-
-/*
- * pci0MapIOspace - Maps PCI0 IO space for the master.
- * Inputs: base and length of pci0Io
- */
-
-static void pci0MapIOspace(unsigned int pci0IoBase,
- unsigned int pci0IoLength)
-{
- unsigned int pci0IoTop =
- (unsigned int) (pci0IoBase + pci0IoLength);
-
- if (pci0IoLength == 0)
- pci0IoTop++;
-
- pci0IoBase = (unsigned int) (pci0IoBase >> 21);
- pci0IoTop = (unsigned int) (((pci0IoTop - 1) & 0x0fffffff) >> 21);
- GT_WRITE(GT_PCI0IOLD_OFS, pci0IoBase);
- GT_WRITE(GT_PCI0IOHD_OFS, pci0IoTop);
-}
-
-/*
- * pci1MapIOspace - Maps PCI1 IO space for the master.
- * Inputs: base and length of pci1Io
- */
-
-static void pci1MapIOspace(unsigned int pci1IoBase,
- unsigned int pci1IoLength)
-{
- unsigned int pci1IoTop =
- (unsigned int) (pci1IoBase + pci1IoLength);
-
- if (pci1IoLength == 0)
- pci1IoTop++;
-
- pci1IoBase = (unsigned int) (pci1IoBase >> 21);
- pci1IoTop = (unsigned int) (((pci1IoTop - 1) & 0x0fffffff) >> 21);
- GT_WRITE(GT_PCI1IOLD_OFS, pci1IoBase);
- GT_WRITE(GT_PCI1IOHD_OFS, pci1IoTop);
-}
-
-/*
- * pci0MapMemory0space - Maps PCI0 memory0 space for the master.
- * Inputs: base and length of pci0Mem0
- */
-
-static void pci0MapMemory0space(unsigned int pci0Mem0Base,
- unsigned int pci0Mem0Length)
-{
- unsigned int pci0Mem0Top = pci0Mem0Base + pci0Mem0Length;
-
- if (pci0Mem0Length == 0)
- pci0Mem0Top++;
-
- pci0Mem0Base = pci0Mem0Base >> 21;
- pci0Mem0Top = ((pci0Mem0Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI0M0LD_OFS, pci0Mem0Base);
- GT_WRITE(GT_PCI0M0HD_OFS, pci0Mem0Top);
-}
-
-/*
- * pci1MapMemory0space - Maps PCI1 memory0 space for the master.
- * Inputs: base and length of pci1Mem0
- */
-
-static void pci1MapMemory0space(unsigned int pci1Mem0Base,
- unsigned int pci1Mem0Length)
-{
- unsigned int pci1Mem0Top = pci1Mem0Base + pci1Mem0Length;
-
- if (pci1Mem0Length == 0)
- pci1Mem0Top++;
-
- pci1Mem0Base = pci1Mem0Base >> 21;
- pci1Mem0Top = ((pci1Mem0Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI1M0LD_OFS, pci1Mem0Base);
- GT_WRITE(GT_PCI1M0HD_OFS, pci1Mem0Top);
-}
-
-/*
- * pci0MapMemory1space - Maps PCI0 memory1 space for the master.
- * Inputs: base and length of pci0Mem1
- */
-
-static void pci0MapMemory1space(unsigned int pci0Mem1Base,
- unsigned int pci0Mem1Length)
-{
- unsigned int pci0Mem1Top = pci0Mem1Base + pci0Mem1Length;
-
- if (pci0Mem1Length == 0)
- pci0Mem1Top++;
-
- pci0Mem1Base = pci0Mem1Base >> 21;
- pci0Mem1Top = ((pci0Mem1Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI0M1LD_OFS, pci0Mem1Base);
- GT_WRITE(GT_PCI0M1HD_OFS, pci0Mem1Top);
-
-}
-
-/*
- * pci1MapMemory1space - Maps PCI1 memory1 space for the master.
- * Inputs: base and length of pci1Mem1
- */
-
-static void pci1MapMemory1space(unsigned int pci1Mem1Base,
- unsigned int pci1Mem1Length)
-{
- unsigned int pci1Mem1Top = pci1Mem1Base + pci1Mem1Length;
-
- if (pci1Mem1Length == 0)
- pci1Mem1Top++;
-
- pci1Mem1Base = pci1Mem1Base >> 21;
- pci1Mem1Top = ((pci1Mem1Top - 1) & 0x0fffffff) >> 21;
- GT_WRITE(GT_PCI1M1LD_OFS, pci1Mem1Base);
- GT_WRITE(GT_PCI1M1HD_OFS, pci1Mem1Top);
-}
-
-/*
- * pci0GetIOspaceBase - Return PCI0 IO Base Address.
- * Inputs: N/A
- * Returns: PCI0 IO Base Address.
- */
-
-static unsigned int pci0GetIOspaceBase(void)
-{
- unsigned int base;
- GT_READ(GT_PCI0IOLD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci0GetIOspaceSize - Return PCI0 IO Bar Size.
- * Inputs: N/A
- * Returns: PCI0 IO Bar Size.
- */
-
-static unsigned int pci0GetIOspaceSize(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI0IOLD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI0IOHD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci0GetMemory0Base - Return PCI0 Memory 0 Base Address.
- * Inputs: N/A
- * Returns: PCI0 Memory 0 Base Address.
- */
-
-static unsigned int pci0GetMemory0Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI0M0LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci0GetMemory0Size - Return PCI0 Memory 0 Bar Size.
- * Inputs: N/A
- * Returns: PCI0 Memory 0 Bar Size.
- */
-
-static unsigned int pci0GetMemory0Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI0M0LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI0M0HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci0GetMemory1Base - Return PCI0 Memory 1 Base Address.
- * Inputs: N/A
- * Returns: PCI0 Memory 1 Base Address.
- */
-
-static unsigned int pci0GetMemory1Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI0M1LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci0GetMemory1Size - Return PCI0 Memory 1 Bar Size.
- * Inputs: N/A
- * Returns: PCI0 Memory 1 Bar Size.
- */
-
-static unsigned int pci0GetMemory1Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI0M1LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI0M1HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci1GetIOspaceBase - Return PCI1 IO Base Address.
- * Inputs: N/A
- * Returns: PCI1 IO Base Address.
- */
-
-static unsigned int pci1GetIOspaceBase(void)
-{
- unsigned int base;
- GT_READ(GT_PCI1IOLD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci1GetIOspaceSize - Return PCI1 IO Bar Size.
- * Inputs: N/A
- * Returns: PCI1 IO Bar Size.
- */
-
-static unsigned int pci1GetIOspaceSize(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI1IOLD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI1IOHD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci1GetMemory0Base - Return PCI1 Memory 0 Base Address.
- * Inputs: N/A
- * Returns: PCI1 Memory 0 Base Address.
- */
-
-static unsigned int pci1GetMemory0Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI1M0LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci1GetMemory0Size - Return PCI1 Memory 0 Bar Size.
- * Inputs: N/A
- * Returns: PCI1 Memory 0 Bar Size.
- */
-
-static unsigned int pci1GetMemory0Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI1M1LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI1M1HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-/*
- * pci1GetMemory1Base - Return PCI1 Memory 1 Base Address.
- * Inputs: N/A
- * Returns: PCI1 Memory 1 Base Address.
- */
-
-static unsigned int pci1GetMemory1Base(void)
-{
- unsigned int base;
- GT_READ(GT_PCI1M1LD_OFS, &base);
- base = base << 21;
- return base;
-}
-
-/*
- * pci1GetMemory1Size - Return PCI1 Memory 1 Bar Size.
- * Inputs: N/A
- * Returns: PCI1 Memory 1 Bar Size.
- */
-
-static unsigned int pci1GetMemory1Size(void)
-{
- unsigned int top, base, size;
- GT_READ(GT_PCI1M1LD_OFS, &base);
- base = base << 21;
- GT_READ(GT_PCI1M1HD_OFS, &top);
- top = (top << 21);
- size = ((top - base) & 0xfffffff);
- size = size | 0x1fffff;
- return (size + 1);
-}
-
-
-
-/*
- * pci_range_ck -
- *
- * Check if the pci device that are trying to access does really exists
- * on the evaluation board.
- *
- * Inputs :
- * bus - bus number (0 for PCI 0 ; 1 for PCI 1)
- * dev - number of device on the specific pci bus
- *
- * Outpus :
- * 0 - if OK , 1 - if failure
- */
-static __inline__ int pci_range_ck(unsigned char bus, unsigned char dev)
-{
- /*
- * We don't even pretend to handle other busses than bus 0 correctly.
- * Accessing device 31 crashes the CP7000 for some reason.
- */
- if ((bus == 0) && (dev != 31))
- return 0;
- return -1;
-}
-
-/*
- * pciXReadConfigReg - Read from a PCI configuration register
- * - Make sure the GT is configured as a master before
- * reading from another device on the PCI.
- * - The function takes care of Big/Little endian conversion.
- * INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
- * spec)
- * pciDevNum: The device number needs to be addressed.
- * RETURNS: data , if the data == 0xffffffff check the master abort bit in the
- * cause register to make sure the data is valid
- *
- * Configuration Address 0xCF8:
- *
- * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
- * |congif|Reserved| Bus |Device|Function|Register|00|
- * |Enable| |Number|Number| Number | Number | | <=field Name
- *
- */
-static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device)
-{
- unsigned int DataForRegCf8;
- unsigned int data;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
-
- /*
- * The casual observer might wonder why the READ is duplicated here,
- * rather than immediately following the WRITE, and just have the swap
- * in the "if". That's because there is a latency problem with trying
- * to read immediately after setting up the address register. The "if"
- * check gives enough time for the address to stabilize, so the READ
- * can work.
- */
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_READ(GT_PCI0_CFGDATA_OFS, &data);
- return data;
- } else { /* The PCI is working in LE Mode so swap the Data. */
- GT_READ(GT_PCI0_CFGDATA_OFS, &data);
- return cpu_to_le32(data);
- }
-}
-
-static unsigned int pci1ReadConfigReg(int offset, struct pci_dev *device)
-{
- unsigned int DataForRegCf8;
- unsigned int data;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- /*
- * The casual observer might wonder why the READ is duplicated here,
- * rather than immediately following the WRITE, and just have the
- * swap in the "if". That's because there is a latency problem
- * with trying to read immediately after setting up the address
- * register. The "if" check gives enough time for the address
- * to stabilize, so the READ can work.
- */
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- /* when configurating our own PCI 1 L-unit the access is through
- the PCI 0 interface with reg number = reg number + 0x80 */
- DataForRegCf8 |= 0x80;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
- } else { /* The PCI is working in LE Mode so swap the Data. */
- GT_WRITE(GT_PCI1_CFGADDR_OFS, DataForRegCf8);
- }
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_READ(GT_PCI0_CFGDATA_OFS, &data);
- return data;
- } else {
- GT_READ(GT_PCI1_CFGDATA_OFS, &data);
- return cpu_to_le32(data);
- }
-}
-
-
-
-/*
- * pciXWriteConfigReg - Write to a PCI configuration register
- * - Make sure the GT is configured as a master before
- * writingto another device on the PCI.
- * - The function takes care of Big/Little endian conversion.
- * Inputs: unsigned int regOffset: The register offset as it apears in the
- * GT spec
- * (or any other PCI device spec)
- * pciDevNum: The device number needs to be addressed.
- *
- * Configuration Address 0xCF8:
- *
- * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
- * |congif|Reserved| Bus |Device|Function|Register|00|
- * |Enable| |Number|Number| Number | Number | | <=field Name
- *
- */
-static void pci0WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data)
-{
- unsigned int DataForRegCf8;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
- } else { /* configuration Transaction over the pci. */
- /* The PCI is working in LE Mode so swap the Data. */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, le32_to_cpu(data));
- }
-}
-
-static void pci1WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data)
-{
- unsigned int DataForRegCf8;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- /*
- * There is a latency problem
- * with trying to read immediately after setting up the address
- * register. The "if" check gives enough time for the address
- * to stabilize, so the WRITE can work.
- */
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- /*
- * when configurating our own PCI 1 L-unit the access is through
- * the PCI 0 interface with reg number = reg number + 0x80
- */
- DataForRegCf8 |= 0x80;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
- } else { /* configuration Transaction over the pci. */
- /* The PCI is working in LE Mode so swap the Data. */
- GT_WRITE(GT_PCI1_CFGADDR_OFS, DataForRegCf8);
- }
- if (PCI_SLOT(device->devfn) == SELF) { /* This board */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
- } else { /* configuration Transaction over the pci. */
- GT_WRITE(GT_PCI1_CFGADDR_OFS, le32_to_cpu(data));
- }
-}
-
-
-/*
- * galileo_pcibios_(read/write) -
- *
- * reads/write a dword/word/byte register from the configuration space
- * of a device.
- *
- * Inputs :
- * bus - bus number
- * devfn - device function index
- * offset - register offset in the configuration space
- * size - size of value (1=byte,2=word,4-dword)
- * val - value to be written / read
- *
- * Outputs :
- * PCIBIOS_SUCCESSFUL when operation was succesfull
- * PCIBIOS_DEVICE_NOT_FOUND when the bus or dev is errorneous
- * PCIBIOS_BAD_REGISTER_NUMBER when accessing non aligned
- */
-
-static int galileo_pcibios_read(struct pci_bus *bus, unsigned int devfn,
- int offset, int size, u32 * val)
-{
- int dev, busnum;
-
- busnum = bus->number;
- dev = PCI_SLOT(devfn);
-
- if (pci_range_ck(busnum, dev)) {
- if (size == 1)
- *val = (u8) 0xff;
- else if (size == 2)
- *val = (u16) 0xffff;
- else if (size == 4)
- *val = 0xffffffff;
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- if ((size == 2) && (offset & 0x1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- else if ((size == 4) && (offset & 0x3))
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (busnum == 0) {
- if (size == 1) {
- *val = (u8) (pci0ReadConfigReg(offset, bus->dev) >>
- ((offset & ~0x3) * 8));
- } else if (size == 2) {
- *val =
- (u16) (pci0ReadConfigReg(offset, bus->dev) >>
- ((offset & ~0x3) * 8));
- } else if (size == 4) {
- *val = pci0ReadConfigReg(offset, bus->dev);
- }
- }
-
- /*
- * This is so that the upper PCI layer will get the correct return
- * value if we're not attached to anything.
- */
- switch (size) {
- case 1:
- if ((offset == 0xe) && (*val == (u8) 0xff)) {
- u32 MasterAbort;
- GT_READ(GT_INTRCAUSE_OFS, &MasterAbort);
- if (MasterAbort & 0x40000) {
- GT_WRITE(GT_INTRCAUSE_OFS,
- (MasterAbort & 0xfffbffff));
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- }
- break;
- case 4:
- if ((offset == 0) && (*val == 0xffffffff)) {
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- break}
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int galileo_pcibios_write(struct pci_bus *bus, unsigned int devfn,
- int offset, int size, u32 val)
-{
- int dev, busnum;
- unsigned long tmp;
-
- busnum = bus->number;
- dev = PCI_SLOT(devfn);
-
- if (pci_range_ck(busnum, dev))
- return PCIBIOS_DEVICE_NOT_FOUND;
- if (size == 4) {
- if (offset & 0x3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (busnum == 0)
- pci0WriteConfigReg(offset, bus->dev, val);
- //if (busnum == 1) pci1WriteConfigReg (offset,bus->dev,val);
- return PCIBIOS_SUCCESSFUL;
- }
- if ((size == 2) && (offset & 0x1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (busnum == 0) {
- tmp = pci0ReadConfigReg(offset, bus->dev);
- //if (busnum == 1) tmp = pci1ReadConfigReg (offset,bus->dev);
- if (size == 1) {
- if ((offset % 4) == 0)
- tmp =
- (tmp & 0xffffff00) | (val & (u8) 0xff);
- if ((offset % 4) == 1)
- tmp =
- (tmp & 0xffff00ff) | ((val & (u8) 0xff)
- << 8);
- if ((offset % 4) == 2)
- tmp =
- (tmp & 0xff00ffff) | ((val & (u8) 0xff)
- << 16);
- if ((offset % 4) == 3)
- tmp =
- (tmp & 0x00ffffff) | ((val & (u8) 0xff)
- << 24);
- } else if (size == 2) {
- if ((offset % 4) == 0)
- tmp =
- (tmp & 0xffff0000) | (val & (u16)
- 0xffff);
- if ((offset % 4) == 2)
- tmp =
- (tmp & 0x0000ffff) |
- ((val & (u16) 0xffff) << 16);
- }
- if (busnum == 0)
- pci0WriteConfigReg(offset, bus->dev, tmp);
- //if (busnum == 1) pci1WriteConfigReg (offset,bus->dev,tmp);
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static void galileo_pcibios_set_master(struct pci_dev *dev)
-{
- u16 cmd;
-
- galileo_pcibios_read(dev->bus, dev->devfn, PCI_COMMAND, 2, &cmd);
- cmd |= PCI_COMMAND_MASTER;
- galileo_pcibios_write(dev->bus, dev->devfn, PCI_COMMAND, 2, cmd);
-}
-
-/* Externally-expected functions. Do not change function names */
-
-int pcibios_enable_resources(struct pci_dev *dev)
-{
- u16 cmd, old_cmd;
- u8 tmp1;
- int idx;
- struct resource *r;
-
- galileo_pcibios_read(dev->bus, dev->devfn, PCI_COMMAND, 2, &cmd);
- old_cmd = cmd;
- for (idx = 0; idx < 6; idx++) {
- r = &dev->resource[idx];
- if (!r->start && r->end) {
- printk(KERN_ERR
- "PCI: Device %s not available because of "
- "resource collisions\n", pci_name(dev));
- return -EINVAL;
- }
- if (r->flags & IORESOURCE_IO)
- cmd |= PCI_COMMAND_IO;
- if (r->flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
- if (cmd != old_cmd) {
- galileo_pcibios_write(dev->bus, dev->devfn, PCI_COMMAND, 2,
- cmd);
- }
-
- /*
- * Let's fix up the latency timer and cache line size here. Cache
- * line size = 32 bytes / sizeof dword (4) = 8.
- * Latency timer must be > 8. 32 is random but appears to work.
- */
- galileo_pcibios_read(dev->bus, dev->devfn, PCI_CACHE_LINE_SIZE, 1,
- &tmp1);
- if (tmp1 != 8) {
- printk(KERN_WARNING
- "PCI setting cache line size to 8 from " "%d\n",
- tmp1);
- galileo_pcibios_write(dev->bus, dev->devfn,
- PCI_CACHE_LINE_SIZE, 1, 8);
- }
- galileo_pcibios_read(dev->bus, dev->devfn, PCI_LATENCY_TIMER, 1,
- &tmp1);
- if (tmp1 < 32) {
- printk(KERN_WARNING
- "PCI setting latency timer to 32 from %d\n", tmp1);
- galileo_pcibios_write(dev->bus, dev->devfn,
- PCI_LATENCY_TIMER, 1, 32);
- }
-
- return 0;
-}
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- return pcibios_enable_resources(dev);
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
- struct pci_dev *dev = data;
-
- if (res->flags & IORESOURCE_IO) {
- unsigned long start = res->start;
-
- /* We need to avoid collisions with `mirrored' VGA ports
- and other strange ISA hardware, so we always want the
- addresses kilobyte aligned. */
- if (size > 0x100) {
- printk(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%ld bytes)\n", pci_name(dev),
- dev->resource - res, size);
- }
-
- start = (start + 1024 - 1) & ~(1024 - 1);
- res->start = start;
- }
-}
-
-struct pci_ops galileo_pci_ops = {
- .read = galileo_pcibios_read,
- .write = galileo_pcibios_write,
-};
-
-struct pci_fixup pcibios_fixups[] = {
- {0}
-};
-
-void __devinit pcibios_fixup_bus(struct pci_bus *c)
-{
- gt64120_board_pcibios_fixup_bus(c);
-}
-
-/*
- * This code was derived from Galileo Technology's example
- * and significantly reworked.
- *
- * This is very simple. It does not scan multiple function devices. It does
- * not scan behind bridges. Those would be simple to implement, but we don't
- * currently need this.
- */
-
-static void __init scan_and_initialize_pci(void)
-{
- struct pci_device pci_devices[MAX_PCI_DEVS];
-
- if (scan_pci_bus(pci_devices)) {
- allocate_pci_space(pci_devices);
- }
-}
-
-/*
- * This is your basic PCI scan. It goes through each slot and checks to
- * see if there's something that responds. If so, then get the size and
- * type of each of the responding BARs. Save them for later.
- */
-
-static u32 __init scan_pci_bus(struct pci_device *pci_devices)
-{
- u32 arrayCounter = 0;
- u32 memType;
- u32 memSize;
- u32 pci_slot, bar;
- u32 id;
- u32 c18RegValue;
- struct pci_dev device;
-
- /*
- * According to PCI REV 2.1 MAX agents on the bus are 21.
- * We don't bother scanning ourselves (slot 0).
- */
- for (pci_slot = 1; pci_slot < 22; pci_slot++) {
-
- device.devfn = PCI_DEVFN(pci_slot, 0);
- id = pci0ReadConfigReg(PCI_VENDOR_ID, &device);
-
- /*
- * Check for a PCI Master Abort (nothing responds in the
- * slot)
- */
- GT_READ(GT_INTRCAUSE_OFS, &c18RegValue);
- /*
- * Clearing bit 18 of in the Cause Register 0xc18 by
- * writting 0.
- */
- GT_WRITE(GT_INTRCAUSE_OFS, (c18RegValue & 0xfffbffff));
- if ((id != 0xffffffff) && !(c18RegValue & 0x40000)) {
- pci_devices[arrayCounter].slot = pci_slot;
- for (bar = 0; bar < 6; bar++) {
- memType =
- pci0ReadConfigReg(PCI_BASE_ADDRESS_0 +
- (bar * 4), &device);
- pci_devices[arrayCounter].BARtype[bar] =
- memType & 1;
- pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
- (bar * 4), &device,
- 0xffffffff);
- memSize =
- pci0ReadConfigReg(PCI_BASE_ADDRESS_0 +
- (bar * 4), &device);
- if (memType & 1) { /* IO space */
- pci_devices[arrayCounter].
- BARsize[bar] =
- ~(memSize & 0xfffffffc) + 1;
- } else { /* memory space */
- pci_devices[arrayCounter].
- BARsize[bar] =
- ~(memSize & 0xfffffff0) + 1;
- }
- } /* BAR counter */
-
- arrayCounter++;
- }
- /* found a device */
- } /* slot counter */
-
- if (arrayCounter < MAX_PCI_DEVS)
- pci_devices[arrayCounter].slot = -1;
-
- return arrayCounter;
-}
-
-/*
- * This function goes through the list of devices and allocates the BARs in
- * either IO or MEM space. It does it in order of size, which will limit the
- * amount of fragmentation we have in the IO and MEM spaces.
- */
-
-static void __init allocate_pci_space(struct pci_device *pci_devices)
-{
- u32 count, maxcount, bar;
- u32 maxSize, maxDevice, maxBAR;
- u32 alignto;
- u32 base;
- u32 pci0_mem_base = pci0GetMemory0Base();
- u32 pci0_io_base = pci0GetIOspaceBase();
- struct pci_dev device;
-
- /* How many PCI devices do we have? */
- maxcount = MAX_PCI_DEVS;
- for (count = 0; count < MAX_PCI_DEVS; count++) {
- if (pci_devices[count].slot == -1) {
- maxcount = count;
- break;
- }
- }
-
- do {
- /* Find the largest size BAR we need to allocate */
- maxSize = 0;
- for (count = 0; count < maxcount; count++) {
- for (bar = 0; bar < 6; bar++) {
- if (pci_devices[count].BARsize[bar] >
- maxSize) {
- maxSize =
- pci_devices[count].
- BARsize[bar];
- maxDevice = count;
- maxBAR = bar;
- }
- }
- }
-
- /*
- * We've found the largest BAR. Allocate it into IO or
- * mem space. We don't idiot check the bases to make
- * sure they haven't overflowed the current size for that
- * aperture.
- * Don't bother to enable the device's IO or MEM space here.
- * That will be done in pci_enable_resources if the device is
- * activated by a driver.
- */
- if (maxSize) {
- device.devfn =
- PCI_DEVFN(pci_devices[maxDevice].slot, 0);
- if (pci_devices[maxDevice].BARtype[maxBAR] == 1) {
- alignto = max(0x1000U, maxSize);
- base = ALIGN(pci0_io_base, alignto);
- pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
- (maxBAR * 4), &device,
- base | 0x1);
- pci0_io_base = base + alignto;
- } else {
- alignto = max(0x1000U, maxSize);
- base = ALIGN(pci0_mem_base, alignto);
- pci0WriteConfigReg(PCI_BASE_ADDRESS_0 +
- (maxBAR * 4), &device,
- base);
- pci0_mem_base = base + alignto;
- }
- /*
- * This entry is finished. Remove it from the list
- * we'll scan.
- */
- pci_devices[maxDevice].BARsize[maxBAR] = 0;
- }
- } while (maxSize);
-}
-
-static int __init pcibios_init(void)
-{
- u32 tmp;
- struct pci_dev controller;
-
- controller.devfn = SELF;
-
- GT_READ(GT_PCI0_CMD_OFS, &tmp);
- GT_READ(GT_PCI0_BARE_OFS, &tmp);
-
- /*
- * You have to enable bus mastering to configure any other
- * card on the bus.
- */
- tmp = pci0ReadConfigReg(PCI_COMMAND, &controller);
- tmp |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
- pci0WriteConfigReg(PCI_COMMAND, &controller, tmp);
-
- /* This scans the PCI bus and sets up initial values. */
- scan_and_initialize_pci();
-
- /*
- * Reset PCI I/O and PCI MEM values to ones supported by EVM.
- */
- ioport_resource.start = GT_PCI_IO_BASE;
- ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
- iomem_resource.start = GT_PCI_MEM_BASE;
- iomem_resource.end = GT_PCI_MEM_BASE + GT_PCI_MEM_BASE - 1;
-
- pci_scan_bus(0, &galileo_pci_ops, NULL);
-
- return 0;
-}
-
-subsys_initcall(pcibios_init);
-
-/*
- * for parsing "pci=" kernel boot arguments.
- */
-char *pcibios_setup(char *str)
-{
- printk(KERN_INFO "rr: pcibios_setup\n");
- /* Nothing to do for now. */
-
- return str;
-}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 1;
-}
diff -puN /dev/null arch/mips/pci/ops-sni.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-sni.c 2004-02-19 12:53:01.000000000 -0800
@@ -0,0 +1,89 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * SNI specific PCI support for RM200/RM300.
+ *
+ * Copyright (C) 1997 - 2000, 2003 Ralf Baechle <ralf@linux-mips.org>
+ */
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/types.h>
+#include <asm/sni.h>
+
+/*
+ * It seems that on the RM200 only lower 3 bits of the 5 bit PCI device
+ * address are decoded. We therefore manually have to reject attempts at
+ * reading outside this range. Being on the paranoid side we only do this
+ * test for bus 0 and hope forwarding and decoding work properly for any
+ * subordinated busses.
+ *
+ * ASIC PCI only supports type 1 config cycles.
+ */
+static int set_config_address(unsigned char busno, unsigned int devfn, int reg)
+{
+ if ((busno > 255) || (devfn > 255) || (reg > 255))
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+
+ if (busno == 0 && devfn >= PCI_DEVFN(8, 0))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ *(volatile u32 *)PCIMT_CONFIG_ADDRESS =
+ ((busno & 0xff) << 16) |
+ ((devfn & 0xff) << 8) |
+ (reg & 0xfc);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int reg,
+ int size, u32 * val)
+{
+ int res;
+
+ if ((res = set_config_address(bus->number, devfn, reg)))
+ return res;
+
+ switch (size) {
+ case 1:
+ *val = *(volatile u8 *) (PCIMT_CONFIG_DATA + (reg & 3));
+ break;
+ case 2:
+ *val = *(volatile u16 *) (PCIMT_CONFIG_DATA + (reg & 2));
+ break;
+ case 4:
+ *val = *(volatile u32 *) PCIMT_CONFIG_DATA;
+ break;
+ }
+
+ return 0;
+}
+
+static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg,
+ int size, u32 val)
+{
+ int res;
+
+ if ((res = set_config_address(bus->number, devfn, reg)))
+ return res;
+
+ switch (size) {
+ case 1:
+ *(volatile u8 *) (PCIMT_CONFIG_DATA + (reg & 3)) = val;
+ break;
+ case 2:
+ *(volatile u16 *) (PCIMT_CONFIG_DATA + (reg & 2)) = val;
+ break;
+ case 4:
+ *(volatile u32 *) PCIMT_CONFIG_DATA = val;
+ break;
+ }
+
+ return 0;
+}
+
+struct pci_ops sni_pci_ops = {
+ .read = pcimt_read,
+ .write = pcimt_write,
+};
diff -puN /dev/null arch/mips/pci/ops-titan.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-titan.c 2004-02-19 12:53:01.000000000 -0800
@@ -0,0 +1,135 @@
+/*
+ * Copyright 2003 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/version.h>
+
+#include <asm/pci.h>
+#include <asm/io.h>
+#include <asm/titan_dep.h>
+
+/*
+ * Titan PCI Config Read Byte
+ */
+static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
+ int size, u32 * val)
+{
+ int dev, bus, func;
+ uint32_t address_reg, data_reg;
+ uint32_t address;
+
+ bus = device->bus->number;
+ dev = PCI_SLOT(device->devfn);
+ func = PCI_FUNC(device->devfn);
+
+ address_reg = TITAN_PCI_0_CONFIG_ADDRESS;
+ data_reg = TITAN_PCI_0_CONFIG_DATA;
+
+ address = (bus << 16) | (dev << 11) | (func << 8) |
+ (offset & 0xfc) | 0x80000000;
+
+ /* start the configuration cycle */
+ TITAN_WRITE(address_reg, address);
+
+ switch (size) {
+ case 1:
+ TITAN_READ_8(data_reg + (offset & 0x3), val);
+ break;
+
+ case 2:
+ TITAN_READ_16(data_reg + (offset & 0x2), val);
+ break;
+
+ case 4:
+ TITAN_READ(data_reg, val);
+ break;
+ }
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+/*
+ * Titan PCI Config Byte Write
+ */
+static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg,
+ int size, u32 val)
+{
+ uint32_t address_reg, data_reg, address;
+ int dev, bus, func;
+
+ bus = device->bus->number;
+ dev = PCI_SLOT(device->devfn);
+ func = PCI_FUNC(device->devfn);
+
+ address_reg = TITAN_PCI_0_CONFIG_ADDRESS;
+ data_reg = TITAN_PCI_0_CONFIG_DATA;
+
+ address = (bus << 16) | (dev << 11) | (func << 8) |
+ (offset & 0xfc) | 0x80000000;
+
+ /* start the configuration cycle */
+ TITAN_WRITE(address_reg, address);
+
+ /* write the data */
+ switch (size) {
+ case 1:
+ TITAN_WRITE_8(data_reg + (offset & 0x3), val);
+ break;
+
+ case 2:
+ TITAN_WRITE_16(data_reg + (offset & 0x2), val);
+ break;
+
+ case 4:
+ TITAN_WRITE(data_reg, val);
+ break;
+ }
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+/*
+ * Titan PCI structure
+ */
+struct pci_ops titan_pci_ops = {
+ titan_read_config,
+ titan_write_config,
+};
+
+void __init pcibios_init(void)
+{
+ /*
+ * XXX These values below need to change
+ */
+ ioport_resource.start = 0xe0000000;
+ ioport_resource.end = 0xe0000000 + 0x20000000 - 1;
+ iomem_resource.start = 0xc0000000;
+ iomem_resource.end = 0xc0000000 + 0x20000000 - 1;
+
+ pci_scan_bus(0, &titan_pci_ops, NULL);
+}
diff -puN /dev/null arch/mips/pci/ops-tx3927.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-tx3927.c 2004-02-19 12:53:01.000000000 -0800
@@ -0,0 +1,391 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ahennessy@mvista.com
+ *
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
+ *
+ * Define the pci_ops for JMR3927.
+ *
+ * Much of the code is derived from the original DDB5074 port by
+ * Geert Uytterhoeven <geert@sonycom.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/addrspace.h>
+#include <asm/pci_channel.h>
+#include <asm/jmr3927/jmr3927.h>
+#include <asm/debug.h>
+
+static inline int mkaddr(unsigned char bus, unsigned char dev_fn,
+ unsigned char where)
+{
+ if (bus == 0 && dev_fn >= PCI_DEVFN(TX3927_PCIC_MAX_DEVNU, 0))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ tx3927_pcicptr->ica = ((bus & 0xff) << 0x10) |
+ ((dev_fn & 0xff) << 0x08) |
+ (where & 0xfc);
+
+ /* clear M_ABORT and Disable M_ABORT Int. */
+ tx3927_pcicptr->pcistat |= PCI_STATUS_REC_MASTER_ABORT;
+ tx3927_pcicptr->pcistatim &= ~PCI_STATUS_REC_MASTER_ABORT;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static inline int check_abort(void)
+{
+ if (tx3927_pcicptr->pcistat & PCI_STATUS_REC_MASTER_ABORT)
+ tx3927_pcicptr->pcistat |= PCI_STATUS_REC_MASTER_ABORT;
+ tx3927_pcicptr->pcistatim |= PCI_STATUS_REC_MASTER_ABORT;
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int jmr3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 * val)
+{
+ int ret, busno;
+
+ /* check if the bus is top-level */
+ if (bus->parent != NULL)
+ busno = bus->number;
+
+ ret = mkaddr(busno, devfn, where);
+ if (ret)
+ return ret;
+
+ switch (size) {
+ case 1:
+ *val = *(volatile u8 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 3));
+ break;
+
+ case 2:
+ *val = le16_to_cpu(*(volatile u16 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 3)));
+ break;
+
+ case 4:
+ *val = le32_to_cpu(tx3927_pcicptr->icd);
+ break;
+ }
+
+ return check_abort();
+}
+
+static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
+{
+ int ret, busno;
+
+ /* check if the bus is top-level */
+ if (bus->parent != NULL)
+ bus = bus->number;
+ else
+ bus = 0;
+
+ ret = mkaddr(busno, devfn, where);
+ if (ret)
+ return ret;
+
+ switch (size) {
+ case 1:
+ *(volatile u8 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 3)) = val;
+ break;
+
+ case 2:
+ *(volatile u16 *) (unsigned longulong) & tx3927_pcicptr->icd | (where & 2)) =
+ cpu_to_le16(val);
+ break;
+
+ case 4:
+ tx3927_pcicptr->icd = cpu_to_le32(val);
+ }
+
+ if (tx3927_pcicptr->pcistat & PCI_STATUS_REC_MASTER_ABORT)
+ tx3927_pcicptr->pcistat |= PCI_STATUS_REC_MASTER_ABORT;
+ tx3927_pcicptr->pcistatim |= PCI_STATUS_REC_MASTER_ABORT;
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ return check_abort();
+}
+
+struct pci_ops jmr3927_pci_ops = {
+ jmr3927_pcibios_read_config,
+ jmr3927_pcibios_write_config,
+};
+
+
+#ifndef JMR3927_INIT_INDIRECT_PCI
+
+inline unsigned long tc_readl(volatile __u32 * addr)
+{
+ return readl(addr);
+}
+
+inline void tc_writel(unsigned long data, volatile __u32 * addr)
+{
+ writel(data, addr);
+}
+#else
+
+unsigned long tc_readl(volatile __u32 * addr)
+{
+ unsigned long val;
+
+ addr = PHYSADDR(addr);
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ (unsigned long) addr;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ (PCI_IPCIBE_ICMD_MEMREAD << PCI_IPCIBE_ICMD_SHIFT) |
+ PCI_IPCIBE_IBE_LONG;
+ while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
+ val =
+ le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
+ ipcidata);
+ /* clear by setting */
+ tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
+ return val;
+}
+
+void tc_writel(unsigned long data, volatile __u32 * addr)
+{
+ addr = PHYSADDR(addr);
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata =
+ cpu_to_le32(data);
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ (unsigned long) addr;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ (PCI_IPCIBE_ICMD_MEMWRITE << PCI_IPCIBE_ICMD_SHIFT) |
+ PCI_IPCIBE_IBE_LONG;
+ while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
+ /* clear by setting */
+ tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
+}
+
+unsigned char tx_ioinb(unsigned char *addr)
+{
+ unsigned long val;
+ __u32 ioaddr;
+ int offset;
+ int byte;
+
+ ioaddr = (unsigned long) addr;
+ offset = ioaddr & 0x3;
+ if (offset == 0)
+ byte = 0x7;
+ else if (offset == 1)
+ byte = 0xb;
+ else if (offset == 2)
+ byte = 0xd;
+ else if (offset == 3)
+ byte = 0xe;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ (unsigned long) ioaddr;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
+ while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
+ val =
+ le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
+ ipcidata);
+ val = val & 0xff;
+ /* clear by setting */
+ tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
+ return val;
+}
+
+void tx_iooutb(unsigned long data, unsigned char *addr)
+{
+ __u32 ioaddr;
+ int offset;
+ int byte;
+
+ data = data | (data << 8) | (data << 16) | (data << 24);
+ ioaddr = (unsigned long) addr;
+ offset = ioaddr & 0x3;
+ if (offset == 0)
+ byte = 0x7;
+ else if (offset == 1)
+ byte = 0xb;
+ else if (offset == 2)
+ byte = 0xd;
+ else if (offset == 3)
+ byte = 0xe;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata = data;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ (unsigned long) ioaddr;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
+ while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
+ /* clear by setting */
+ tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
+}
+
+unsigned short tx_ioinw(unsigned short *addr)
+{
+ unsigned long val;
+ __u32 ioaddr;
+ int offset;
+ int byte;
+
+ ioaddr = (unsigned long) addr;
+ offset = ioaddr & 0x3;
+ if (offset == 0)
+ byte = 0x3;
+ else if (offset == 2)
+ byte = 0xc;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ (unsigned long) ioaddr;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
+ while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
+ val =
+ le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
+ ipcidata);
+ val = val & 0xffff;
+ /* clear by setting */
+ tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
+ return val;
+
+}
+
+void tx_iooutw(unsigned long data, unsigned short *addr)
+{
+ __u32 ioaddr;
+ int offset;
+ int byte;
+
+ data = data | (data << 16);
+ ioaddr = (unsigned long) addr;
+ offset = ioaddr & 0x3;
+ if (offset == 0)
+ byte = 0x3;
+ else if (offset == 2)
+ byte = 0xc;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata = data;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ (unsigned long) ioaddr;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
+ while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
+ /* clear by setting */
+ tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
+}
+
+unsigned long tx_ioinl(unsigned int *addr)
+{
+ unsigned long val;
+ __u32 ioaddr;
+
+ ioaddr = (unsigned long) addr;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ (unsigned long) ioaddr;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) |
+ PCI_IPCIBE_IBE_LONG;
+ while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
+ val =
+ le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
+ ipcidata);
+ /* clear by setting */
+ tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
+ return val;
+}
+
+void tx_iooutl(unsigned long data, unsigned int *addr)
+{
+ __u32 ioaddr;
+
+ ioaddr = (unsigned long) addr;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata =
+ cpu_to_le32(data);
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ (unsigned long) ioaddr;
+ *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) |
+ PCI_IPCIBE_IBE_LONG;
+ while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
+ /* clear by setting */
+ tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
+}
+
+void tx_insbyte(unsigned char *addr, void *buffer, unsigned int count)
+{
+ unsigned char *ptr = (unsigned char *) buffer;
+
+ while (count--) {
+ *ptr++ = tx_ioinb(addr);
+ }
+}
+
+void tx_insword(unsigned short *addr, void *buffer, unsigned int count)
+{
+ unsigned short *ptr = (unsigned short *) buffer;
+
+ while (count--) {
+ *ptr++ = tx_ioinw(addr);
+ }
+}
+
+void tx_inslong(unsigned int *addr, void *buffer, unsigned int count)
+{
+ unsigned long *ptr = (unsigned long *) buffer;
+
+ while (count--) {
+ *ptr++ = tx_ioinl(addr);
+ }
+}
+
+void tx_outsbyte(unsigned char *addr, void *buffer, unsigned int count)
+{
+ unsigned char *ptr = (unsigned char *) buffer;
+
+ while (count--) {
+ tx_iooutb(*ptr++, addr);
+ }
+}
+
+void tx_outsword(unsigned short *addr, void *buffer, unsigned int count)
+{
+ unsigned short *ptr = (unsigned short *) buffer;
+
+ while (count--) {
+ tx_iooutw(*ptr++, addr);
+ }
+}
+
+void tx_outslong(unsigned int *addr, void *buffer, unsigned int count)
+{
+ unsigned long *ptr = (unsigned long *) buffer;
+
+ while (count--) {
+ tx_iooutl(*ptr++, addr);
+ }
+}
+#endif
diff -puN /dev/null arch/mips/pci/ops-tx4927.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/ops-tx4927.c 2004-02-19 12:53:01.000000000 -0800
@@ -0,0 +1,306 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ahennessy@mvista.com
+ *
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
+ *
+ * Define the pci_ops for the Toshiba rbtx4927
+ *
+ * Much of the code is derived from the original DDB5074 port by
+ * Geert Uytterhoeven <geert@sonycom.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/addrspace.h>
+#include <asm/pci_channel.h>
+#include <asm/tx4927/tx4927_pci.h>
+#include <asm/debug.h>
+
+/* initialize in setup */
+struct resource pci_io_resource = {
+ "pci IO space",
+ (PCIBIOS_MIN_IO),
+ ((PCIBIOS_MIN_IO) + (TX4927_PCIIO_SIZE)) - 1,
+ IORESOURCE_IO
+};
+
+/* initialize in setup */
+struct resource pci_mem_resource = {
+ "pci memory space",
+ TX4927_PCIMEM,
+ TX4927_PCIMEM + TX4927_PCIMEM_SIZE - 1,
+ IORESOURCE_MEM
+};
+
+extern struct pci_ops tx4927_pci_ops;
+
+/*
+ * h/w only supports devices 0x00 to 0x14
+ */
+struct pci_controller tx4927_controller = {
+ .pci_ops = &tx4927_pci_ops,
+ .io_resource = &pci_io_resource,
+ .mem_resource = &pci_mem_resource,
+};
+
+static int mkaddr(unsigned char bus, unsigned char dev_fn,
+ unsigned char where, int *flagsp)
+{
+ if (bus > 0) {
+ /* Type 1 configuration */
+ tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
+ ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;
+ } else {
+ if (dev_fn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0))
+ return -1;
+
+ /* Type 0 configuration */
+ tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
+ ((dev_fn & 0xff) << 0x08) | (where & 0xfc);
+ }
+ /* clear M_ABORT and Disable M_ABORT Int. */
+ tx4927_pcicptr->pcistatus =
+ (tx4927_pcicptr->pcistatus & 0x0000ffff) |
+ (PCI_STATUS_REC_MASTER_ABORT << 16);
+ tx4927_pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;
+ return 0;
+}
+
+static int check_abort(int flags)
+{
+ int code = PCIBIOS_SUCCESSFUL;
+ if (tx4927_pcicptr->
+ pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
+ tx4927_pcicptr->pcistatus =
+ (tx4927_pcicptr->
+ pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
+ << 16);
+ tx4927_pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT;
+ code = PCIBIOS_DEVICE_NOT_FOUND;
+ }
+ return code;
+}
+
+/*
+ * We can't address 8 and 16 bit words directly. Instead we have to
+ * read/write a 32bit word and mask/modify the data we actually want.
+ */
+static int tx4927_pcibios_read_config_byte(struct pci_dev *dev,
+ int where, unsigned char *val)
+{
+ int flags, retval;
+ unsigned char bus, func_num;
+
+ db_assert((where & 3) == 0);
+ db_assert(where < (1 << 8));
+
+ /* check if the bus is top-level */
+ if (dev->bus->parent != NULL) {
+ bus = dev->bus->number;
+ db_assert(bus != 0);
+ } else {
+ bus = 0;
+ }
+
+ func_num = PCI_FUNC(dev->devfn);
+ if (mkaddr(bus, dev->devfn, where, &flags))
+ return -1;
+#ifdef __BIG_ENDIAN
+ *val =
+ *(volatile u8 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | ((where & 3) ^ 3));
+#else
+ *val =
+ *(volatile u8 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | (where & 3));
+#endif
+ retval = check_abort(flags);
+ if (retval == PCIBIOS_DEVICE_NOT_FOUND)
+ *val = 0xff;
+ return retval;
+}
+
+static int tx4927_pcibios_read_config_word(struct pci_dev *dev,
+ int where, unsigned short *val)
+{
+ int flags, retval;
+ unsigned char bus, func_num;
+
+ if (where & 1)
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+
+ db_assert((where & 3) == 0);
+ db_assert(where < (1 << 8));
+
+ /* check if the bus is top-level */
+ if (dev->bus->parent != NULL) {
+ bus = dev->bus->number;
+ db_assert(bus != 0);
+ } else {
+ bus = 0;
+ }
+
+ func_num = PCI_FUNC(dev->devfn);
+ if (mkaddr(bus, dev->devfn, where, &flags))
+ return -1;
+#ifdef __BIG_ENDIAN
+ *val =
+ *(volatile u16 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | ((where & 3) ^ 2));
+#else
+ *val =
+ *(volatile u16 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | (where & 3));
+#endif
+ retval = check_abort(flags);
+ if (retval == PCIBIOS_DEVICE_NOT_FOUND)
+ *val = 0xffff;
+ return retval;
+}
+
+static int tx4927_pcibios_read_config_dword(struct pci_dev *dev,
+ int where, unsigned int *val)
+{
+ int flags, retval;
+ unsigned char bus, func_num;
+
+ if (where & 3)
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+
+ db_assert((where & 3) == 0);
+ db_assert(where < (1 << 8));
+
+ /* check if the bus is top-level */
+ if (dev->bus->parent != NULL) {
+ bus = dev->bus->number;
+ db_assert(bus != 0);
+ } else {
+ bus = 0;
+ }
+
+ func_num = PCI_FUNC(dev->devfn);
+ if (mkaddr(bus, dev->devfn, where, &flags))
+ return -1;
+ *val = tx4927_pcicptr->g2pcfgdata;
+ retval = check_abort(flags);
+ if (retval == PCIBIOS_DEVICE_NOT_FOUND)
+ *val = 0xffffffff;
+
+ return retval;
+}
+
+static int tx4927_pcibios_write_config_byte(struct pci_dev *dev,
+ int where, unsigned char val)
+{
+ int flags;
+ unsigned char bus, func_num;
+
+ /* check if the bus is top-level */
+ if (dev->bus->parent != NULL) {
+ bus = dev->bus->number;
+ db_assert(bus != 0);
+ } else {
+ bus = 0;
+ }
+
+ func_num = PCI_FUNC(dev->devfn);
+ if (mkaddr(bus, dev->devfn, where, &flags))
+ return -1;
+#ifdef __BIG_ENDIAN
+ *(volatile u8 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | ((where & 3) ^ 3)) = val;
+#else
+ *(volatile u8 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | (where & 3)) = val;
+#endif
+ return check_abort(flags);
+}
+
+static int tx4927_pcibios_write_config_word(struct pci_dev *dev,
+ int where, unsigned short val)
+{
+ int flags;
+ unsigned char bus, func_num;
+
+ if (where & 1)
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+
+ /* check if the bus is top-level */
+ if (dev->bus->parent != NULL) {
+ bus = dev->bus->number;
+ db_assert(bus != 0);
+ } else {
+ bus = 0;
+ }
+
+ func_num = PCI_FUNC(dev->devfn);
+ if (mkaddr(bus, dev->devfn, where, &flags))
+ return -1;
+#ifdef __BIG_ENDIAN
+ *(volatile u16 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | ((where & 3) ^ 2)) = val;
+#else
+ *(volatile u16 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | (where & 3)) = val;
+#endif
+ return check_abort(flags);
+}
+
+static int tx4927_pcibios_write_config_dword(struct pci_dev *dev,
+ int where, unsigned int val)
+{
+ int flags;
+ unsigned char bus, func_num;
+
+ if (where & 3)
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+
+ /* check if the bus is top-level */
+ if (dev->bus->parent != NULL) {
+ bus = dev->bus->number;
+ db_assert(bus != 0);
+ } else {
+ bus = 0;
+ }
+
+ func_num = PCI_FUNC(dev->devfn);
+ if (mkaddr(bus, dev->devfn, where, &flags))
+ return -1;
+ tx4927_pcicptr->g2pcfgdata = val;
+ return check_abort(flags);
+}
+
+struct pci_ops tx4927_pci_ops = {
+ tx4927_pcibios_read_config_byte,
+ tx4927_pcibios_read_config_word,
+ tx4927_pcibios_read_config_dword,
+ tx4927_pcibios_write_config_byte,
+ tx4927_pcibios_write_config_word,
+ tx4927_pcibios_write_config_dword
+};
diff -puN -L arch/mips/pci/pci-auto.c arch/mips/pci/pci-auto.c~mips-megapatch /dev/null
--- 25/arch/mips/pci/pci-auto.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,518 +0,0 @@
-/*
- * PCI autoconfiguration library
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * Copyright 2000, 2001, 2002, 2003 MontaVista Software Inc.
- * Copyright 2001 Bradley D. LaRonde <brad@ltc.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-/*
- * Modified for MIPS by Jun Sun, jsun@mvista.com
- *
- * . Simplify the interface between pci_auto and the rest: a single function.
- * . Assign resources from low address to upper address.
- * . change most int to u32.
- *
- * Further modified to include it as mips generic code, ppopov@mvista.com.
- *
- * 2001-10-26 Bradley D. LaRonde <brad@ltc.com>
- * - Add a top_bus argument to the "early config" functions so that
- * they can set a fake parent bus pointer to convince the underlying
- * pci ops to use type 1 configuration for sub busses.
- * - Set bridge base and limit registers correctly.
- * - Align io and memory base properly before and after bridge setup.
- * - Don't fall through to pci_setup_bars for bridge.
- * - Reformat the debug output to look more like lspci's output.
- *
- * 2003-04-09 Yoichi Yuasa, Alice Hennessy, Jun Sun
- * - Add cardbus bridge support, mostly copied from PPC
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-
-#include <asm/pci_channel.h>
-
-#define DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-/*
- * These functions are used early on before PCI scanning is done
- * and all of the pci_dev and pci_bus structures have been created.
- */
-static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
- int top_bus, int busnr, int devfn)
-{
- static struct pci_dev dev;
- static struct pci_bus bus;
-
- dev.bus = &bus;
- dev.sysdata = hose;
- dev.devfn = devfn;
- bus.number = busnr;
- bus.ops = hose->pci_ops;
-
- if (busnr != top_bus)
- /* Fake a parent bus structure. */
- bus.parent = &bus;
- else
- bus.parent = NULL;
-
- return &dev;
-}
-
-#define EARLY_PCI_OP(rw, size, type) \
-int early_##rw##_config_##size(struct pci_channel *hose, \
- int top_bus, int bus, int devfn, int offset, type value) \
-{ \
- return pci_##rw##_config_##size( \
- fake_pci_dev(hose, top_bus, bus, devfn), \
- offset, value); \
-}
-
-EARLY_PCI_OP(read, byte, u8 *)
- EARLY_PCI_OP(read, word, u16 *)
- EARLY_PCI_OP(read, dword, u32 *)
- EARLY_PCI_OP(write, byte, u8)
- EARLY_PCI_OP(write, word, u16)
- EARLY_PCI_OP(write, dword, u32)
-
-static struct resource *io_resource_inuse;
-static struct resource *mem_resource_inuse;
-
-static u32 pciauto_lower_iospc;
-static u32 pciauto_upper_iospc;
-
-static u32 pciauto_lower_memspc;
-static u32 pciauto_upper_memspc;
-
-void __init
-pciauto_setup_bars(struct pci_channel *hose,
- int top_bus,
- int current_bus, int pci_devfn, int bar_limit)
-{
- u32 bar_response, bar_size, bar_value;
- u32 bar, addr_mask, bar_nr = 0;
- u32 *upper_limit;
- u32 *lower_limit;
- int found_mem64 = 0;
-
- for (bar = PCI_BASE_ADDRESS_0; bar <= bar_limit; bar += 4) {
- /* Tickle the BAR and get the response */
- early_write_config_dword(hose, top_bus,
- current_bus,
- pci_devfn, bar, 0xffffffff);
- early_read_config_dword(hose, top_bus,
- current_bus,
- pci_devfn, bar, &bar_response);
-
- /* If BAR is not implemented go to the next BAR */
- if (!bar_response)
- continue;
-
- /*
- * Workaround for a BAR that doesn't use its upper word,
- * like the ALi 1535D+ PCI DC-97 Controller Modem (M5457).
- * bdl <brad@ltc.com>
- */
- if (!(bar_response & 0xffff0000))
- bar_response |= 0xffff0000;
-
- retry:
- /* Check the BAR type and set our address mask */
- if (bar_response & PCI_BASE_ADDRESS_SPACE) {
- addr_mask = PCI_BASE_ADDRESS_IO_MASK;
- upper_limit = &pciauto_upper_iospc;
- lower_limit = &pciauto_lower_iospc;
- DBG(" I/O");
- } else {
- if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
- == PCI_BASE_ADDRESS_MEM_TYPE_64)
- found_mem64 = 1;
-
- addr_mask = PCI_BASE_ADDRESS_MEM_MASK;
- upper_limit = &pciauto_upper_memspc;
- lower_limit = &pciauto_lower_memspc;
- DBG(" Mem");
- }
-
-
- /* Calculate requested size */
- bar_size = ~(bar_response & addr_mask) + 1;
-
- /* Allocate a base address */
- bar_value =
- ((*lower_limit - 1) & ~(bar_size - 1)) + bar_size;
-
- if ((bar_value + bar_size) > *upper_limit) {
- if (bar_response & PCI_BASE_ADDRESS_SPACE) {
- if (io_resource_inuse->child) {
- io_resource_inuse =
- io_resource_inuse->child;
- pciauto_lower_iospc =
- io_resource_inuse->start;
- pciauto_upper_iospc =
- io_resource_inuse->end + 1;
- goto retry;
- }
-
- } else {
- if (mem_resource_inuse->child) {
- mem_resource_inuse =
- mem_resource_inuse->child;
- pciauto_lower_memspc =
- mem_resource_inuse->start;
- pciauto_upper_memspc =
- mem_resource_inuse->end + 1;
- goto retry;
- }
- }
- DBG(" unavailable -- skipping\n");
- continue;
- }
-
- /* Write it out and update our limit */
- early_write_config_dword(hose, top_bus, current_bus,
- pci_devfn, bar, bar_value);
-
- *lower_limit = bar_value + bar_size;
-
- /*
- * If we are a 64-bit decoder then increment to the
- * upper 32 bits of the bar and force it to locate
- * in the lower 4GB of memory.
- */
- if (found_mem64) {
- bar += 4;
- early_write_config_dword(hose, top_bus,
- current_bus,
- pci_devfn,
- bar, 0x00000000);
- }
-
- DBG(" at 0x%.8x [size=0x%x]\n", bar_value, bar_size);
-
- bar_nr++;
- }
-
-}
-
-void __init
-pciauto_prescan_setup_bridge(struct pci_channel *hose,
- int top_bus,
- int current_bus, int pci_devfn, int sub_bus)
-{
- /* Configure bus number registers */
- early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
- PCI_PRIMARY_BUS, current_bus);
- early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
- PCI_SECONDARY_BUS, sub_bus + 1);
- early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
- PCI_SUBORDINATE_BUS, 0xff);
-
- /* Align memory and I/O to 1MB and 4KB boundaries. */
- pciauto_lower_memspc = (pciauto_lower_memspc + (0x100000 - 1))
- & ~(0x100000 - 1);
- pciauto_lower_iospc = (pciauto_lower_iospc + (0x1000 - 1))
- & ~(0x1000 - 1);
-
- /* Set base (lower limit) of address range behind bridge. */
- early_write_config_word(hose, top_bus, current_bus, pci_devfn,
- PCI_MEMORY_BASE,
- pciauto_lower_memspc >> 16);
- early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
- PCI_IO_BASE,
- (pciauto_lower_iospc & 0x0000f000) >> 8);
- early_write_config_word(hose, top_bus, current_bus, pci_devfn,
- PCI_IO_BASE_UPPER16,
- pciauto_lower_iospc >> 16);
-
- /* We don't support prefetchable memory for now, so disable */
- early_write_config_word(hose, top_bus, current_bus, pci_devfn,
- PCI_PREF_MEMORY_BASE, 0);
- early_write_config_word(hose, top_bus, current_bus, pci_devfn,
- PCI_PREF_MEMORY_LIMIT, 0);
-}
-
-void __init
-pciauto_postscan_setup_bridge(struct pci_channel *hose,
- int top_bus,
- int current_bus, int pci_devfn, int sub_bus)
-{
- u32 temp;
-
- /*
- * [jsun] we always bump up baselines a little, so that if there
- * nothing behind P2P bridge, we don't wind up overlapping IO/MEM
- * spaces.
- */
- pciauto_lower_memspc += 1;
- pciauto_lower_iospc += 1;
-
- /* Configure bus number registers */
- early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
- PCI_SUBORDINATE_BUS, sub_bus);
-
- /* Set upper limit of address range behind bridge. */
- early_write_config_word(hose, top_bus, current_bus, pci_devfn,
- PCI_MEMORY_LIMIT,
- pciauto_lower_memspc >> 16);
- early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
- PCI_IO_LIMIT,
- (pciauto_lower_iospc & 0x0000f000) >> 8);
- early_write_config_word(hose, top_bus, current_bus, pci_devfn,
- PCI_IO_LIMIT_UPPER16,
- pciauto_lower_iospc >> 16);
-
- /* Align memory and I/O to 1MB and 4KB boundaries. */
- pciauto_lower_memspc = (pciauto_lower_memspc + (0x100000 - 1))
- & ~(0x100000 - 1);
- pciauto_lower_iospc = (pciauto_lower_iospc + (0x1000 - 1))
- & ~(0x1000 - 1);
-
- /* Enable memory and I/O accesses, enable bus master */
- early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
- PCI_COMMAND, &temp);
- early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
- PCI_COMMAND,
- temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY
- | PCI_COMMAND_MASTER);
-}
-
-void __init
-pciauto_prescan_setup_cardbus_bridge(struct pci_channel *hose,
- int top_bus,
- int current_bus,
- int pci_devfn, int sub_bus)
-{
- /* Configure bus number registers */
- early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
- PCI_PRIMARY_BUS, current_bus);
- early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
- PCI_SECONDARY_BUS, sub_bus + 1);
- early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
- PCI_SUBORDINATE_BUS, 0xff);
-
- /* Align memory and I/O to 4KB and 4 byte boundaries. */
- pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1))
- & ~(0x1000 - 1);
- pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1))
- & ~(0x4 - 1);
-
- early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
- PCI_CB_MEMORY_BASE_0,
- pciauto_lower_memspc);
- early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
- PCI_CB_IO_BASE_0, pciauto_lower_iospc);
-}
-
-void __init
-pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose,
- int top_bus,
- int current_bus,
- int pci_devfn, int sub_bus)
-{
- u32 temp;
-
- /*
- * Configure subordinate bus number. The PCI subsystem
- * bus scan will renumber buses (reserving three additional
- * for this PCI<->CardBus bridge for the case where a CardBus
- * adapter contains a P2P or CB2CB bridge.
- */
-
- early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
- PCI_SUBORDINATE_BUS, sub_bus);
-
- /*
- * Reserve an additional 4MB for mem space and 16KB for
- * I/O space. This should cover any additional space
- * requirement of unusual CardBus devices with
- * additional bridges that can consume more address space.
- *
- * Although pcmcia-cs currently will reprogram bridge
- * windows, the goal is to add an option to leave them
- * alone and use the bridge window ranges as the regions
- * that are searched for free resources upon hot-insertion
- * of a device. This will allow a PCI<->CardBus bridge
- * configured by this routine to happily live behind a
- * P2P bridge in a system.
- */
- pciauto_lower_memspc += 0x00400000;
- pciauto_lower_iospc += 0x00004000;
-
- /* Align memory and I/O to 4KB and 4 byte boundaries. */
- pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1))
- & ~(0x1000 - 1);
- pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1))
- & ~(0x4 - 1);
- /* Set up memory and I/O filter limits, assume 32-bit I/O space */
- early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
- PCI_CB_MEMORY_LIMIT_0,
- pciauto_lower_memspc - 1);
- early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
- PCI_CB_IO_LIMIT_0,
- pciauto_lower_iospc - 1);
-
- /* Enable memory and I/O accesses, enable bus master */
- early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
- PCI_COMMAND, &temp);
- early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
- PCI_COMMAND,
- temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY
- | PCI_COMMAND_MASTER);
-}
-
-#define PCIAUTO_IDE_MODE_MASK 0x05
-
-int __init
-pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
-{
- int sub_bus;
- u32 pci_devfn, pci_class, cmdstat, found_multi = 0;
- unsigned short vid, did;
- unsigned char header_type;
- int devfn_start = 0;
- int devfn_stop = 0xff;
-
- sub_bus = current_bus;
-
- if (hose->first_devfn)
- devfn_start = hose->first_devfn;
- if (hose->last_devfn)
- devfn_stop = hose->last_devfn;
-
- for (pci_devfn = devfn_start; pci_devfn < devfn_stop; pci_devfn++) {
-
- if (PCI_FUNC(pci_devfn) && !found_multi)
- continue;
-
- early_read_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_VENDOR_ID, &vid);
-
- if (vid == 0xffff)
- continue;
-
- early_read_config_byte(hose, top_bus, current_bus,
- pci_devfn, PCI_HEADER_TYPE,
- &header_type);
-
- if (!PCI_FUNC(pci_devfn))
- found_multi = header_type & 0x80;
-
- early_read_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_DEVICE_ID, &did);
-
- early_read_config_dword(hose, top_bus, current_bus,
- pci_devfn, PCI_CLASS_REVISION,
- &pci_class);
-
- DBG("%.2x:%.2x.%x Class %.4x: %.4x:%.4x",
- current_bus, PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn),
- pci_class >> 16, vid, did);
- if (pci_class & 0xff)
- DBG(" (rev %.2x)", pci_class & 0xff);
- DBG("\n");
-
- if ((pci_class >> 16) == PCI_CLASS_BRIDGE_PCI) {
- DBG(" Bridge: primary=%.2x, secondary=%.2x\n", current_bus, sub_bus + 1);
- pciauto_setup_bars(hose, top_bus, current_bus,
- pci_devfn, PCI_BASE_ADDRESS_1);
- pciauto_prescan_setup_bridge(hose, top_bus,
- current_bus,
- pci_devfn, sub_bus);
- DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", sub_bus + 1, pciauto_lower_iospc, pciauto_lower_memspc);
- sub_bus =
- pciauto_bus_scan(hose, top_bus, sub_bus + 1);
- DBG("Back to bus %.2x\n", current_bus);
- pciauto_postscan_setup_bridge(hose, top_bus,
- current_bus,
- pci_devfn, sub_bus);
- continue;
- } else if ((pci_class >> 16) == PCI_CLASS_BRIDGE_CARDBUS) {
- DBG(" CARDBUS Bridge: primary=%.2x, secondary=%.2x\n", current_bus, sub_bus + 1);
- DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn));
- /* Place CardBus Socket/ExCA registers */
- pciauto_setup_bars(hose, top_bus, current_bus,
- pci_devfn, PCI_BASE_ADDRESS_0);
-
- pciauto_prescan_setup_cardbus_bridge(hose, top_bus,
- current_bus,
- pci_devfn,
- sub_bus);
-
- DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", sub_bus + 1, pciauto_lower_iospc, pciauto_lower_memspc);
- sub_bus =
- pciauto_bus_scan(hose, top_bus, sub_bus + 1);
- DBG("Back to bus %.2x, sub_bus is %x\n",
- current_bus, sub_bus);
- pciauto_postscan_setup_cardbus_bridge(hose,
- top_bus,
- current_bus,
- pci_devfn,
- sub_bus);
- continue;
- } else if ((pci_class >> 16) == PCI_CLASS_STORAGE_IDE) {
-
- unsigned char prg_iface;
-
- early_read_config_byte(hose, top_bus, current_bus,
- pci_devfn, PCI_CLASS_PROG,
- &prg_iface);
- if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) {
- DBG("Skipping legacy mode IDE controller\n");
- continue;
- }
- }
-
- /*
- * Found a peripheral, enable some standard
- * settings
- */
- early_read_config_dword(hose, top_bus, current_bus,
- pci_devfn, PCI_COMMAND, &cmdstat);
- early_write_config_dword(hose, top_bus, current_bus,
- pci_devfn, PCI_COMMAND,
- cmdstat | PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER);
- early_write_config_byte(hose, top_bus, current_bus,
- pci_devfn, PCI_LATENCY_TIMER,
- 0x80);
-
- /* Allocate PCI I/O and/or memory space */
- pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn,
- PCI_BASE_ADDRESS_5);
- }
- return sub_bus;
-}
-
-int __init pciauto_assign_resources(int busno, struct pci_channel *hose)
-{
- /* setup resource limits */
- io_resource_inuse = hose->io_resource;
- mem_resource_inuse = hose->mem_resource;
-
- pciauto_lower_iospc = io_resource_inuse->start;
- pciauto_upper_iospc = io_resource_inuse->end + 1;
- pciauto_lower_memspc = mem_resource_inuse->start;
- pciauto_upper_memspc = mem_resource_inuse->end + 1;
- DBG("Autoconfig PCI channel 0x%p\n", hose);
- DBG("Scanning bus %.2x, I/O 0x%.8x:0x%.8x, Mem 0x%.8x:0x%.8x\n",
- busno, pciauto_lower_iospc, pciauto_upper_iospc,
- pciauto_lower_memspc, pciauto_upper_memspc);
-
- return pciauto_bus_scan(hose, busno, busno);
-}
diff -puN arch/mips/pci/pci.c~mips-megapatch arch/mips/pci/pci.c
--- 25/arch/mips/pci/pci.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci.c 2004-02-19 12:53:01.000000000 -0800
@@ -1,233 +1,304 @@
/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * Modified to be mips generic, ppopov@mvista.com
- * arch/mips/kernel/pci.c
- * Common MIPS PCI routines.
- *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
- */
-
-/*
- * This file contains common PCI routines meant to be shared for
- * all MIPS machines.
- *
- * Strategies:
- *
- * . We rely on pci_auto.c file to assign PCI resources (MEM and IO)
- * TODO: this should be optional for some machines where they do have
- * a real "pcibios" that does resource assignment.
- *
- * . We then use pci_scan_bus() to "discover" all the resources for
- * later use by Linux.
- *
- * . We finally reply on a board supplied function, pcibios_fixup_irq(), to
- * to assign the interrupts. We may use setup-irq.c under drivers/pci
- * later.
- *
- * . Specifically, we will *NOT* use pci_assign_unassigned_resources(),
- * because we assume all PCI devices should have the resources correctly
- * assigned and recorded.
- *
- * Limitations:
*
- * . We "collapse" all IO and MEM spaces in sub-buses under a top-level bus
- * into a contiguous range.
- *
- * . In the case of Memory space, the rnage is 1:1 mapping with CPU physical
- * address space.
- *
- * . In the case of IO space, it starts from 0, and the beginning address
- * is mapped to KSEG0ADDR(mips_io_port) in the CPU physical address.
- *
- * . These are the current MIPS limitations (by ioremap, etc). In the
- * future, we may remove them.
- *
- * Credits:
- * Most of the code are derived from the pci routines from PPC and Alpha,
- * which were mostly writtne by
- * Cort Dougan, cort@fsmlabs.com
- * Matt Porter, mporter@mvista.com
- * Dave Rusling david.rusling@reo.mts.dec.com
- * David Mosberger davidm@cs.arizona.edu
+ * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/config.h>
#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/pci_channel.h>
-extern void pcibios_fixup(void);
-extern void pcibios_fixup_irqs(void);
+/*
+ * Indicate whether we respect the PCI setup left by the firmware.
+ *
+ * Make this long-lived so that we know when shutting down
+ * whether we probed only or not.
+ */
+int pci_probe_only;
-void __init pcibios_fixup_irqs(void)
-{
- struct pci_dev *dev = NULL;
- int slot_num;
+#define PCI_ASSIGN_ALL_BUSSES 1
+unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES;
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- slot_num = PCI_SLOT(dev->devfn);
- switch (slot_num) {
- case 2:
- dev->irq = 3;
- break;
- case 3:
- dev->irq = 4;
- break;
- case 4:
- dev->irq = 5;
- break;
- default:
- break;
- }
+/*
+ * The PCI controller list.
+ */
+
+struct pci_controller *hose_head, **hose_tail = &hose_head;
+struct pci_controller *pci_isa_hose;
+
+unsigned long PCIBIOS_MIN_IO = 0x0000;
+unsigned long PCIBIOS_MIN_MEM = 0;
+
+/*
+ * We need to avoid collisions with `mirrored' VGA ports
+ * and other strange ISA hardware, so we always want the
+ * addresses to be allocated in the 0x000-0x0ff region
+ * modulo 0x400.
+ *
+ * Why? Because some silly external IO cards only decode
+ * the low 10 bits of the IO address. The 0x00-0xff region
+ * is reserved for motherboard devices that decode all 16
+ * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
+ * but we want to try to avoid allocating at 0x2900-0x2bff
+ * which might have be mirrored at 0x0100-0x03ff..
+ */
+void
+pcibios_align_resource(void *data, struct resource *res,
+ unsigned long size, unsigned long align)
+{
+ struct pci_dev *dev = data;
+ struct pci_controller *hose = dev->sysdata;
+ unsigned long start = res->start;
+
+ if (res->flags & IORESOURCE_IO) {
+ /* Make sure we start at our min on all hoses */
+ if (start - hose->io_resource->start < PCIBIOS_MIN_IO)
+ start = PCIBIOS_MIN_IO + hose->io_resource->start;
+
+ /*
+ * Put everything into 0x00-0xff region modulo 0x400
+ */
+ if (start & 0x300)
+ start = (start + 0x3ff) & ~0x3ff;
+ } else if (res->flags & IORESOURCE_MEM) {
+ /* Make sure we start at our min on all hoses */
+ if (start - hose->mem_resource->start < PCIBIOS_MIN_MEM)
+ start = PCIBIOS_MIN_MEM + hose->mem_resource->start;
}
+
+ res->start = start;
}
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{ /* HP-LJ */
- int pos;
- int bases;
-
- printk("adjusting pci device: %s\n", dev->name);
-
- switch (dev->hdr_type) {
- case PCI_HEADER_TYPE_NORMAL:
- bases = 6;
- break;
- case PCI_HEADER_TYPE_BRIDGE:
- bases = 2;
- break;
- case PCI_HEADER_TYPE_CARDBUS:
- bases = 1;
- break;
- default:
- bases = 0;
- break;
- }
- for (pos = 0; pos < bases; pos++) {
- struct resource *res = &dev->resource[pos];
- if (res->start >= IO_MEM_LOGICAL_START &&
- res->end <= IO_MEM_LOGICAL_END) {
- res->start += IO_MEM_VIRTUAL_OFFSET;
- res->end += IO_MEM_VIRTUAL_OFFSET;
- }
- if (res->start >= IO_PORT_LOGICAL_START &&
- res->end <= IO_PORT_LOGICAL_END) {
- res->start += IO_PORT_VIRTUAL_OFFSET;
- res->end += IO_PORT_VIRTUAL_OFFSET;
- }
- }
+struct pci_controller * __init alloc_pci_controller(void)
+{
+ return alloc_bootmem(sizeof(struct pci_controller));
+}
+
+void __init register_pci_controller(struct pci_controller *hose)
+{
+ *hose_tail = hose;
+ hose_tail = &hose->next;
+}
+
+/* Most MIPS systems have straight-forward swizzling needs. */
+static inline u8 bridge_swizzle(u8 pin, u8 slot)
+{
+ return (((pin - 1) + slot) % 4) + 1;
}
-struct pci_fixup pcibios_fixups[] = {
- {PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID,
- pcibios_fixup_resources},
- {0}
-};
+static u8 __init common_swizzle(struct pci_dev *dev, u8 *pinp)
+{
+ u8 pin = *pinp;
-extern int pciauto_assign_resources(int busno, struct pci_channel *hose);
+ while (dev->bus->parent) {
+ pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
+ /* Move up the chain of bridges. */
+ dev = dev->bus->self;
+ }
+ *pinp = pin;
+
+ /* The slot is the slot of the last bridge. */
+ return PCI_SLOT(dev->devfn);
+}
static int __init pcibios_init(void)
{
- struct pci_channel *p;
+ struct pci_controller *hose;
struct pci_bus *bus;
- int busno;
+ int next_busno;
+ int need_domain_info = 0;
-#ifdef CONFIG_PCI_AUTO
- /* assign resources */
- busno = 0;
- for (p = mips_pci_channels; p->pci_ops != NULL; p++) {
- busno = pciauto_assign_resources(busno, p) + 1;
- }
-#endif
+ /* Scan all of the recorded PCI controllers. */
+ for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
+
+ if (request_resource(&iomem_resource, hose->mem_resource) < 0)
+ goto out;
+ if (request_resource(&ioport_resource, hose->io_resource) < 0)
+ goto out_free_mem_resource;
+
+ if (!hose->iommu)
+ PCI_DMA_BUS_IS_PHYS = 1;
+
+ bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
+ hose->bus = bus;
+ hose->need_domain_info = need_domain_info;
+ next_busno = bus->subordinate + 1;
+ /* Don't allow 8-bit bus number overflow inside the hose -
+ reserve some space for bridges. */
+ if (next_busno > 224) {
+ next_busno = 0;
+ need_domain_info = 1;
+ }
+ continue;
- /* scan the buses */
- busno = 0;
- for (p = mips_pci_channels; p->pci_ops != NULL; p++) {
- bus = pci_scan_bus(busno, p->pci_ops, p);
- busno = bus->subordinate + 1;
+out_free_mem_resource:
+ release_resource(hose->mem_resource);
+
+out:
+ printk(KERN_WARNING
+ "Skipping PCI bus scan due to resource conflict\n");
}
- /* machine dependent fixups */
- pcibios_fixup();
- /* fixup irqs (board specific routines) */
- pcibios_fixup_irqs();
+ if (!pci_probe_only)
+ pci_assign_unassigned_resources();
+ pci_fixup_irqs(common_swizzle, pcibios_map_irq);
return 0;
}
subsys_initcall(pcibios_init);
-int pcibios_enable_device(struct pci_dev *dev, int mask)
+static int pcibios_enable_resources(struct pci_dev *dev, int mask)
{
- /* pciauto_assign_resources() will enable all devices found */
+ u16 cmd, old_cmd;
+ int idx;
+ struct resource *r;
+
+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
+ old_cmd = cmd;
+ for(idx=0; idx<6; idx++) {
+ /* Only set up the requested stuff */
+ if (!(mask & (1<<idx)))
+ continue;
+
+ r = &dev->resource[idx];
+ if (!r->start && r->end) {
+ printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
+ return -EINVAL;
+ }
+ if (r->flags & IORESOURCE_IO)
+ cmd |= PCI_COMMAND_IO;
+ if (r->flags & IORESOURCE_MEM)
+ cmd |= PCI_COMMAND_MEMORY;
+ }
+ if (dev->resource[PCI_ROM_RESOURCE].start)
+ cmd |= PCI_COMMAND_MEMORY;
+ if (cmd != old_cmd) {
+ printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
+ pci_write_config_word(dev, PCI_COMMAND, cmd);
+ }
return 0;
}
-unsigned long __init pci_bridge_check_io(struct pci_dev *bridge)
+/*
+ * If we set up a device for bus mastering, we need to check the latency
+ * timer as certain crappy BIOSes forget to set it properly.
+ */
+unsigned int pcibios_max_latency = 255;
+
+void pcibios_set_master(struct pci_dev *dev)
+{
+ u8 lat;
+ pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
+ if (lat < 16)
+ lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
+ else if (lat > pcibios_max_latency)
+ lat = pcibios_max_latency;
+ else
+ return;
+ printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n",
+ pci_name(dev), lat);
+ pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
+}
+
+unsigned int pcibios_assign_all_busses(void)
+{
+ return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
+}
+
+int pcibios_enable_device(struct pci_dev *dev, int mask)
{
- u16 io;
+ int err;
+
+ if ((err = pcibios_enable_resources(dev, mask)) < 0)
+ return err;
- pci_read_config_word(bridge, PCI_IO_BASE, &io);
- if (!io) {
- pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0);
- pci_read_config_word(bridge, PCI_IO_BASE, &io);
- pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
- }
- if (io)
- return IORESOURCE_IO;
- //printk(KERN_WARNING "PCI: bridge %s does not support I/O forwarding!\n", bridge->name);
return 0;
}
+static void __init pcibios_fixup_device_resources(struct pci_dev *dev,
+ struct pci_bus *bus)
+{
+ /* Update device resources. */
+ struct pci_controller *hose = (struct pci_controller *)bus->sysdata;
+ unsigned long offset;
+ int i;
+
+ for (i = 0; i < PCI_NUM_RESOURCES; i++) {
+ if (!dev->resource[i].start)
+ continue;
+ if (dev->resource[i].flags & IORESOURCE_IO)
+ offset = hose->io_offset;
+ else if (dev->resource[i].flags & IORESOURCE_MEM)
+ offset = hose->mem_offset;
+
+ dev->resource[i].start += offset;
+ dev->resource[i].end += offset;
+ }
+}
+
void __devinit pcibios_fixup_bus(struct pci_bus *bus)
{
- /* Propogate hose info into the subordinate devices. */
+ /* Propagate hose info into the subordinate devices. */
- struct pci_channel *hose = bus->sysdata;
+ struct pci_controller *hose = bus->sysdata;
+ struct list_head *ln;
struct pci_dev *dev = bus->self;
if (!dev) {
- /* Root bus */
bus->resource[0] = hose->io_resource;
bus->resource[1] = hose->mem_resource;
- } else {
- /* This is a bridge. Do not care how it's initialized,
- just link its resources to the bus ones */
- int i;
-
- for (i = 0; i < 3; i++) {
- bus->resource[i] =
- &dev->resource[PCI_BRIDGE_RESOURCES + i];
- bus->resource[i]->name = bus->name;
- }
- bus->resource[0]->flags |= pci_bridge_check_io(dev);
- bus->resource[1]->flags |= IORESOURCE_MEM;
- /* For now, propagate hose limits to the bus;
- we'll adjust them later. */
- bus->resource[0]->end = hose->io_resource->end;
- bus->resource[1]->end = hose->mem_resource->end;
- /* Turn off downstream PF memory address range by default */
- bus->resource[2]->start = 1024 * 1024;
- bus->resource[2]->end = bus->resource[2]->start - 1;
+ } else if (pci_probe_only &&
+ (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
+ pci_read_bridge_bases(bus);
+ pcibios_fixup_device_resources(dev, bus);
+ }
+
+ for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
+ struct pci_dev *dev = pci_dev_b(ln);
+
+ if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
+ pcibios_fixup_device_resources(dev, bus);
}
}
-char *pcibios_setup(char *str)
+void __init
+pcibios_update_irq(struct pci_dev *dev, int irq)
{
- return str;
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
+}
+
+void __devinit
+pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+ struct resource *res)
+{
+ struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
+ unsigned long offset = 0;
+
+ if (res->flags & IORESOURCE_IO)
+ offset = hose->io_offset;
+ else if (res->flags & IORESOURCE_MEM)
+ offset = hose->mem_offset;
+
+ region->start = res->start - offset;
+ region->end = res->end - offset;
}
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
+#ifdef CONFIG_HOTPLUG
+EXPORT_SYMBOL(pcibios_resource_to_bus);
+#endif
+
+char *pcibios_setup(char *str)
{
- /* this should not be called */
+ return str;
}
diff -puN -L arch/mips/pci/pci-cobalt.c arch/mips/pci/pci-cobalt.c~mips-megapatch /dev/null
--- 25/arch/mips/pci/pci-cobalt.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,433 +0,0 @@
-/*
- * Cobalt Qube/Raq PCI support
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 1997, 2002 by Ralf Baechle
- * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/pci.h>
-#include <asm/io.h>
-#include <asm/gt64120.h>
-
-#include <asm/cobalt/cobalt.h>
-
-int cobalt_board_id;
-
-static void qube_expansion_slot_bist(struct pci_dev *dev)
-{
- unsigned char ctrl;
- int timeout = 100000;
-
- pci_read_config_byte(dev, PCI_BIST, &ctrl);
- if (!(ctrl & PCI_BIST_CAPABLE))
- return;
-
- pci_write_config_byte(dev, PCI_BIST, ctrl | PCI_BIST_START);
- do {
- pci_read_config_byte(dev, PCI_BIST, &ctrl);
- if (!(ctrl & PCI_BIST_START))
- break;
- } while (--timeout > 0);
- if ((timeout <= 0) || (ctrl & PCI_BIST_CODE_MASK))
- printk
- ("PCI: Expansion slot card failed BIST with code %x\n",
- (ctrl & PCI_BIST_CODE_MASK));
-}
-
-static void qube_expansion_slot_fixup(struct pci_dev *dev)
-{
- unsigned short pci_cmd;
- unsigned long ioaddr_base = 0x10108000; /* It's magic, ask Doug. */
- unsigned long memaddr_base = 0x12001000;
- int i;
-
- /* Enable bits in COMMAND so driver can talk to it. */
- pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
- pci_cmd |=
- (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
- pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
-
- /* Give it a working IRQ. */
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
- COBALT_QUBE_SLOT_IRQ);
- dev->irq = COBALT_QUBE_SLOT_IRQ;
-
- ioaddr_base += 0x2000 * PCI_FUNC(dev->devfn);
- memaddr_base += 0x2000 * PCI_FUNC(dev->devfn);
-
- /* Fixup base addresses, we only support I/O at the moment. */
- for (i = 0; i <= 5; i++) {
- unsigned int regaddr = (PCI_BASE_ADDRESS_0 + (i * 4));
- unsigned int rval, mask, size, alignme, aspace;
- unsigned long *basep = &ioaddr_base;
-
- /* Check type first, punt if non-IO. */
- pci_read_config_dword(dev, regaddr, &rval);
- aspace = (rval & PCI_BASE_ADDRESS_SPACE);
- if (aspace != PCI_BASE_ADDRESS_SPACE_IO)
- basep = &memaddr_base;
-
- /* Figure out how much it wants, if anything. */
- pci_write_config_dword(dev, regaddr, 0xffffffff);
- pci_read_config_dword(dev, regaddr, &rval);
-
- /* Unused? */
- if (rval == 0)
- continue;
-
- rval &= PCI_BASE_ADDRESS_IO_MASK;
- mask = (~rval << 1) | 0x1;
- size = (mask & rval) & 0xffffffff;
- alignme = size;
- if (alignme < 0x400)
- alignme = 0x400;
- rval = ((*basep + (alignme - 1)) & ~(alignme - 1));
- *basep = (rval + size);
- pci_write_config_dword(dev, regaddr, rval | aspace);
- dev->resource[i].start = rval;
- dev->resource[i].end = *basep - 1;
- if (aspace == PCI_BASE_ADDRESS_SPACE_IO) {
- dev->resource[i].start -= 0x10000000;
- dev->resource[i].end -= 0x10000000;
- }
- }
- qube_expansion_slot_bist(dev);
-}
-
-static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev)
-{
- unsigned short cfgword;
- unsigned char lt;
-
- /* Enable Bus Mastering and fast back to back. */
- pci_read_config_word(dev, PCI_COMMAND, &cfgword);
- cfgword |= (PCI_COMMAND_FAST_BACK | PCI_COMMAND_MASTER);
- pci_write_config_word(dev, PCI_COMMAND, cfgword);
-
- /* Enable both ide interfaces. ROM only enables primary one. */
- pci_write_config_byte(dev, 0x40, 0xb);
-
- /* Set latency timer to reasonable value. */
- pci_read_config_byte(dev, PCI_LATENCY_TIMER, <);
- if (lt < 64)
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
- pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7);
-}
-
-static void qube_raq_tulip_fixup(struct pci_dev *dev)
-{
- unsigned short pci_cmd;
-
- /* Fixup the first tulip located at device PCICONF_ETH0 */
- if (PCI_SLOT(dev->devfn) == COBALT_PCICONF_ETH0) {
- /* Setup the first Tulip */
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
- COBALT_ETH0_IRQ);
- dev->irq = COBALT_ETH0_IRQ;
-
- dev->resource[0].start = 0x100000;
- dev->resource[0].end = 0x10007f;
-
- dev->resource[1].start = 0x12000000;
- dev->resource[1].end = dev->resource[1].start + 0x3ff;
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_1,
- dev->resource[1].start);
-
- /* Fixup the second tulip located at device PCICONF_ETH1 */
- } else if (PCI_SLOT(dev->devfn) == COBALT_PCICONF_ETH1) {
-
- /* Enable the second Tulip device. */
- pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
- pci_cmd |= (PCI_COMMAND_IO | PCI_COMMAND_MASTER);
- pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
-
- /* Give it it's IRQ. */
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
- COBALT_ETH1_IRQ);
- dev->irq = COBALT_ETH1_IRQ;
-
- /* And finally, a usable I/O space allocation, right after what
- * the first Tulip uses.
- */
- dev->resource[0].start = 0x101000;
- dev->resource[0].end = 0x10107f;
-
- dev->resource[1].start = 0x12000400;
- dev->resource[1].end = dev->resource[1].start + 0x3ff;
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_1,
- dev->resource[1].start);
- }
-}
-
-static void qube_raq_scsi_fixup(struct pci_dev *dev)
-{
- unsigned short pci_cmd;
-
- /*
- * Tell the SCSI device that we expect an interrupt at
- * IRQ 7 and not the default 0.
- */
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, COBALT_SCSI_IRQ);
- dev->irq = COBALT_SCSI_IRQ;
-
- if (cobalt_board_id == COBALT_BRD_ID_RAQ2) {
-
- /* Enable the device. */
- pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
-
- pci_cmd |=
- (PCI_COMMAND_IO | PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY | PCI_COMMAND_INVALIDATE);
- pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
-
- /* Give it it's RAQ IRQ. */
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
- COBALT_RAQ_SCSI_IRQ);
- dev->irq = COBALT_RAQ_SCSI_IRQ;
-
- /* And finally, a usable I/O space allocation, right after what
- * the second Tulip uses.
- */
- dev->resource[0].start = 0x102000;
- dev->resource[0].end = dev->resource[0].start + 0xff;
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
- 0x10102000);
-
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_1,
- 0x00002000);
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_2,
- 0x00100000);
- }
-}
-
-static void qube_raq_galileo_fixup(struct pci_dev *dev)
-{
- unsigned short galileo_id;
-
- /* Fix PCI latency-timer and cache-line-size values in Galileo
- * host bridge.
- */
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
- pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7);
-
- /* On all machines prior to Q2, we had the STOP line disconnected
- * from Galileo to VIA on PCI. The new Galileo does not function
- * correctly unless we have it connected.
- *
- * Therefore we must set the disconnect/retry cycle values to
- * something sensible when using the new Galileo.
- */
- pci_read_config_word(dev, PCI_REVISION_ID, &galileo_id);
- galileo_id &= 0xff; /* mask off class info */
- if (galileo_id >= 0x10) {
- /* New Galileo, assumes PCI stop line to VIA is connected. */
- GALILEO_OUTL(0x4020, GT_PCI0_TOR_OFS);
- } else if (galileo_id == 0x1 || galileo_id == 0x2) {
- signed int timeo;
- /* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */
- timeo = GALILEO_INL(GT_PCI0_TOR_OFS);
- /* Old Galileo, assumes PCI STOP line to VIA is disconnected. */
- GALILEO_OUTL(0xffff, GT_PCI0_TOR_OFS);
- }
-}
-
-static void qube_pcibios_fixup(struct pci_dev *dev)
-{
- if (PCI_SLOT(dev->devfn) == COBALT_PCICONF_PCISLOT) {
- unsigned int tmp;
-
- /* See if there is a device in the expansion slot, if so
- * discover its resources and fixup whatever we need to
- */
- pci_read_config_dword(dev, PCI_VENDOR_ID, &tmp);
- if (tmp != 0xffffffff && tmp != 0x00000000)
- qube_expansion_slot_fixup(dev);
- }
-}
-
-struct pci_fixup pcibios_fixups[] = {
- {PCI_FIXUP_HEADER, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
- qube_raq_via_bmIDE_fixup},
- {PCI_FIXUP_HEADER, PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142,
- qube_raq_tulip_fixup},
- {PCI_FIXUP_HEADER, PCI_VENDOR_ID_GALILEO, PCI_ANY_ID,
- qube_raq_galileo_fixup},
- {PCI_FIXUP_HEADER, PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C860,
- qube_raq_scsi_fixup},
- {PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, qube_pcibios_fixup}
-};
-
-
-static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn)
-{
- if ((bus->number == 0)
- && ((PCI_SLOT(devfn) == 0)
- || ((PCI_SLOT(devfn) > 6)
- && (PCI_SLOT(devfn) <= 12))))
- return 0; /* OK device number */
-
- return -1; /* NOT ok device number */
-}
-
-#define PCI_CFG_SET(devfn,where) \
- GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \
- (PCI_FUNC (devfn) << 8) | (where)), \
- GT_PCI0_CFGADDR_OFS)
-
-
-static int qube_pci_read_config(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 * val)
-{
- switch (size) {
- case 4:
- if (where & 0x3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (pci_range_ck(bus, devfn)) {
- *val = 0xFFFFFFFF;
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- PCI_CFG_SET(devfn, where);
- *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
- return PCIBIOS_SUCCESSFUL;
-
- case 2:
- if (where & 0x1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (pci_range_ck(bus, devfn)) {
- *val = 0xffff;
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- PCI_CFG_SET(devfn, (where & ~0x3));
- *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS)
- >> ((where & 3) * 8);
- return PCIBIOS_SUCCESSFUL;
-
- case 1:
- if (pci_range_ck(bus, devfn)) {
- *val = 0xff;
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- PCI_CFG_SET(devfn, (where & ~0x3));
- *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS)
- >> ((where & 3) * 8);
- return PCIBIOS_SUCCESSFUL;
- }
-}
-
-static int qube_pci_write_config(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 val)
-{
- u32 tmp;
-
- switch (size) {
- case 4:
- if (where & 0x3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (pci_range_ck(bus, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
- PCI_CFG_SET(devfn, where);
- GALILEO_OUTL(val, GT_PCI0_CFGDATA_OFS);
-
- return PCIBIOS_SUCCESSFUL;
-
- case 2:
- if (where & 0x1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- if (pci_range_ck(bus, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
- PCI_CFG_SET(devfn, (where & ~0x3));
- tmp = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
- tmp &= ~(0xffff << ((where & 0x3) * 8));
- tmp |= (val << ((where & 0x3) * 8));
- GALILEO_OUTL(tmp, GT_PCI0_CFGDATA_OFS);
-
- return PCIBIOS_SUCCESSFUL;
-
- case 1:
-
- if (pci_range_ck(bus, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
- PCI_CFG_SET(devfn, (where & ~0x3));
- tmp = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
- tmp &= ~(0xff << ((where & 0x3) * 8));
- tmp |= (val << ((where & 0x3) * 8));
- GALILEO_OUTL(tmp, GT_PCI0_CFGDATA_OFS);
-
- return PCIBIOS_SUCCESSFUL;
- }
-}
-
-struct pci_ops qube_pci_ops = {
- .read = qube_pci_read_config,
- .write = qube_pci_write_config,
-};
-
-static int __init pcibios_init(void)
-{
- unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
-
- printk("PCI: Probing PCI hardware\n");
-
- /* Read the cobalt id register out of the PCI config space */
- PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
- cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS)
- >> ((VIA_COBALT_BRD_ID_REG & 3) * 8);
- cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
-
- printk("Cobalt Board ID: %d\n", cobalt_board_id);
-
- ioport_resource.start = 0x00000000;
- ioport_resource.end = 0x0fffffff;
-
- iomem_resource.start = 0x01000000;
- iomem_resource.end = 0xffffffff;
-
- pci_scan_bus(0, &qube_pci_ops, NULL);
-
- return 0;
-}
-
-subsys_initcall(pcibios_init);
-
-char *pcibios_setup(char *str)
-{
- return str;
-}
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- u16 cmd, status;
-
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
- pci_read_config_word(dev, PCI_STATUS, &status);
- printk("PCI: Enabling device %s (%04x %04x)\n", pci_name(dev),
- cmd, status);
- /* We'll sort this out when we know it isn't enabled ;) */
-
- return 0;
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
-
- panic("Uhhoh called pcibios_align_resource\n");
-}
-
-void __devinit pcibios_fixup_bus(struct pci_bus *bus)
-{
- /* We don't have sub-busses to fixup here */
-}
-
-unsigned int __init pcibios_assign_all_busses(void)
-{
- return 1;
-}
diff -puN arch/mips/pci/pci-ddb5074.c~mips-megapatch arch/mips/pci/pci-ddb5074.c
--- 25/arch/mips/pci/pci-ddb5074.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci-ddb5074.c 2004-02-19 12:53:02.000000000 -0800
@@ -24,9 +24,10 @@ static struct resource extpci_mem_resour
extern struct pci_ops ddb5476_ext_pci_ops;
-struct pci_channel mips_pci_channels[] = {
- {&ddb5476_ext_pci_ops, &extpci_io_resource, &extpci_mem_resource},
- {NULL, NULL, NULL}
+struct pci_controller ddb5476_controller = {
+ .pci_ops = &ddb5476_ext_pci_ops,
+ .io_resource = &extpci_io_resource,
+ .mem_resource = &extpci_mem_resource,
};
#define PCI_EXT_INTA 8
@@ -38,40 +39,19 @@ struct pci_channel mips_pci_channels[] =
#define MAX_SLOT_NUM 14
static unsigned char irq_map[MAX_SLOT_NUM] = {
- /* SLOT: 0 */ nile4_to_irq(PCI_EXT_INTE),
- /* SLOT: 1 */ nile4_to_irq(PCI_EXT_INTA),
- /* SLOT: 2 */ nile4_to_irq(PCI_EXT_INTA),
- /* SLOT: 3 */ nile4_to_irq(PCI_EXT_INTB),
- /* SLOT: 4 */ nile4_to_irq(PCI_EXT_INTC),
- /* SLOT: 5 */ nile4_to_irq(NILE4_INT_UART),
- /* SLOT: 6 */ 0xff,
- /* SLOT: 7 */ 0xff,
- /* SLOT: 8 */ 0xff,
- /* SLOT: 9 */ 0xff,
- /* SLOT: 10 */ nile4_to_irq(PCI_EXT_INTE),
- /* SLOT: 11 */ 0xff,
- /* SLOT: 12 */ 0xff,
- /* SLOT: 13 */ nile4_to_irq(PCI_EXT_INTE),
+ [ 0] = nile4_to_irq(PCI_EXT_INTE),
+ [ 1] = nile4_to_irq(PCI_EXT_INTA),
+ [ 2] = nile4_to_irq(PCI_EXT_INTA),
+ [ 3] = nile4_to_irq(PCI_EXT_INTB),
+ [ 4] = nile4_to_irq(PCI_EXT_INTC),
+ [ 5] = nile4_to_irq(NILE4_INT_UART),
+ [10] = nile4_to_irq(PCI_EXT_INTE),
+ [13] = nile4_to_irq(PCI_EXT_INTE),
};
-void __init pcibios_fixup_irqs(void)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
-
- struct pci_dev *dev = NULL;
- int slot_num;
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- slot_num = PCI_SLOT(dev->devfn);
- db_assert(slot_num < MAX_SLOT_NUM);
- printk("irq_map[%d]: %02x\n", slot_num, irq_map[slot_num]);
- db_assert(irq_map[slot_num] != 0xff);
-
- pci_write_config_byte(dev,
- PCI_INTERRUPT_LINE,
- irq_map[slot_num]);
-
- dev->irq = irq_map[slot_num];
- }
+ return irq_map[slot];
}
void __init ddb_pci_reset_bus(void)
@@ -92,38 +72,3 @@ void __init ddb_pci_reset_bus(void)
ddb_out32(DDB_PCICTRL + 4, temp);
}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- /* we hope pci_auto has assigned the bus numbers to all buses */
- return 1;
-}
-
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
-}
-
-void __init pcibios_fixup(void)
-{
- struct pci_dev *dev = NULL;
-
- while ((dev = pci_find_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
- dev)) != NULL) {
- /*
- * It's nice to have the LEDs on the GPIO pins
- * available for debugging
- */
- extern struct pci_dev *pci_pmu;
- u8 t8;
-
- pci_pmu = dev; /* for LEDs D2 and D3 */
- /* Program the lines for LEDs D2 and D3 to output */
- pci_read_config_byte(dev, 0x7d, &t8);
- t8 |= 0xc0;
- pci_write_config_byte(dev, 0x7d, t8);
- /* Turn LEDs D2 and D3 off */
- pci_read_config_byte(dev, 0x7e, &t8);
- t8 |= 0xc0;
- pci_write_config_byte(dev, 0x7e, t8);
- }
-}
diff -puN arch/mips/pci/pci-ddb5476.c~mips-megapatch arch/mips/pci/pci-ddb5476.c
--- 25/arch/mips/pci/pci-ddb5476.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci-ddb5476.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,4 +1,3 @@
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/types.h>
@@ -25,9 +24,10 @@ static struct resource extpci_mem_resour
extern struct pci_ops ddb5476_ext_pci_ops;
-struct pci_channel mips_pci_channels[] = {
- {&ddb5476_ext_pci_ops, &extpci_io_resource, &extpci_mem_resource},
- {NULL, NULL, NULL}
+struct pci_controller ddb5476_controller = {
+ .pci_ops = &ddb5476_ext_pci_ops,
+ .io_resource = &extpci_io_resource,
+ .mem_resource = &extpci_mem_resource
};
@@ -53,64 +53,21 @@ struct pci_channel mips_pci_channels[] =
*/
#define MAX_SLOT_NUM 21
static unsigned char irq_map[MAX_SLOT_NUM] = {
- /* SLOT: 0, AD:11 */ 0xff,
- /* SLOT: 1, AD:12 */ 0xff,
- /* SLOT: 2, AD:13 */ 9,
- /* USB */
- /* SLOT: 3, AD:14 */ 10,
- /* PMU */
- /* SLOT: 4, AD:15 */ 0xff,
- /* SLOT: 5, AD:16 */ 0x0,
- /* P2P bridge */
- /* SLOT: 6, AD:17 */ nile4_to_irq(PCI_EXT_INTB),
- /* SLOT: 7, AD:18 */ nile4_to_irq(PCI_EXT_INTC),
- /* SLOT: 8, AD:19 */ nile4_to_irq(PCI_EXT_INTD),
- /* SLOT: 9, AD:20 */ nile4_to_irq(PCI_EXT_INTA),
- /* SLOT: 10, AD:21 */ 0xff,
- /* SLOT: 11, AD:22 */ 0xff,
- /* SLOT: 12, AD:23 */ 0xff,
- /* SLOT: 13, AD:24 */ 14,
- /* HD controller, M5229 */
- /* SLOT: 14, AD:25 */ 0xff,
- /* SLOT: 15, AD:26 */ 0xff,
- /* SLOT: 16, AD:27 */ 0xff,
- /* SLOT: 17, AD:28 */ 0xff,
- /* SLOT: 18, AD:29 */ 0xff,
- /* SLOT: 19, AD:30 */ 0xff,
- /* SLOT: 20, AD:31 */ 0xff
+ [ 2] = 9, /* AD:13 USB */
+ [ 3] = 10, /* AD:14 PMU */
+ [ 5] = 0, /* AD:16 P2P bridge */
+ [ 6] = nile4_to_irq(PCI_EXT_INTB), /* AD:17 */
+ [ 7] = nile4_to_irq(PCI_EXT_INTC), /* AD:18 */
+ [ 8] = nile4_to_irq(PCI_EXT_INTD), /* AD:19 */
+ [ 9] = nile4_to_irq(PCI_EXT_INTA), /* AD:20 */
+ [13] = 14, /* AD:24 HD controller, M5229 */
};
-extern int vrc5477_irq_to_irq(int irq);
-void __init pcibios_fixup_irqs(void)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
- struct pci_dev *dev = NULL;
- int slot_num;
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- slot_num = PCI_SLOT(dev->devfn);
-
- /* we don't do IRQ fixup for sub-bus yet */
- if (dev->bus->parent != NULL) {
- db_run(printk
- ("Don't know how to fixup irq for PCI device %d on sub-bus %d\n",
- slot_num, dev->bus->number));
- continue;
- }
-
- db_assert(slot_num < MAX_SLOT_NUM);
- db_assert(irq_map[slot_num] != 0xff);
-
- pci_write_config_byte(dev,
- PCI_INTERRUPT_LINE,
- irq_map[slot_num]);
- dev->irq = irq_map[slot_num];
- }
+ return irq_map[slot];
}
-#if defined(CONFIG_RUNTIME_DEBUG)
-extern void jsun_scan_pci_bus(void);
-#endif
-
void __init ddb_pci_reset_bus(void)
{
u32 temp;
@@ -129,17 +86,3 @@ void __init ddb_pci_reset_bus(void)
ddb_out32(DDB_PCICTRL + 4, temp);
}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- /* we hope pci_auto has assigned the bus numbers to all buses */
- return 1;
-}
-
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
-}
-
-void __init pcibios_fixup(void)
-{
-}
diff -puN arch/mips/pci/pci-ddb5477.c~mips-megapatch arch/mips/pci/pci-ddb5477.c
--- 25/arch/mips/pci/pci-ddb5477.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci-ddb5477.c 2004-02-19 12:53:02.000000000 -0800
@@ -9,7 +9,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/types.h>
@@ -52,12 +51,19 @@ static struct resource iopci_mem_resourc
extern struct pci_ops ddb5477_ext_pci_ops;
extern struct pci_ops ddb5477_io_pci_ops;
-struct pci_channel mips_pci_channels[] = {
- {&ddb5477_ext_pci_ops, &extpci_io_resource, &extpci_mem_resource},
- {&ddb5477_io_pci_ops, &iopci_io_resource, &iopci_mem_resource},
- {NULL, NULL, NULL}
+struct pci_controller ddb5477_ext_controller = {
+ .pci_ops = &ddb5477_ext_pci_ops,
+ .io_resource = &extpci_io_resource,
+ .mem_resource = &extpci_mem_resource
};
+struct pci_controller ddb5477_io_controller = {
+ .pci_ops = &ddb5477_io_pci_ops,
+ .io_resource = &iopci_io_resource,
+ .mem_resource = &iopci_mem_resource
+};
+
+
/*
* we fix up irqs based on the slot number.
@@ -82,16 +88,11 @@ static unsigned char irq_map[MAX_SLOT_NU
/* SLOT: 1, AD:12 */ 0xff,
/* SLOT: 2, AD:13 */ 0xff,
/* SLOT: 3, AD:14 */ 0xff,
- /* SLOT: 4, AD:15 */ VRC5477_IRQ_INTA,
- /* onboard tulip */
- /* SLOT: 5, AD:16 */ VRC5477_IRQ_INTB,
- /* slot 1 */
- /* SLOT: 6, AD:17 */ VRC5477_IRQ_INTC,
- /* slot 2 */
- /* SLOT: 7, AD:18 */ VRC5477_IRQ_INTD,
- /* slot 3 */
- /* SLOT: 8, AD:19 */ VRC5477_IRQ_INTE,
- /* slot 4 */
+ /* SLOT: 4, AD:15 */ VRC5477_IRQ_INTA, /* onboard tulip */
+ /* SLOT: 5, AD:16 */ VRC5477_IRQ_INTB, /* slot 1 */
+ /* SLOT: 6, AD:17 */ VRC5477_IRQ_INTC, /* slot 2 */
+ /* SLOT: 7, AD:18 */ VRC5477_IRQ_INTD, /* slot 3 */
+ /* SLOT: 8, AD:19 */ VRC5477_IRQ_INTE, /* slot 4 */
/* SLOT: 9, AD:20 */ 0xff,
/* SLOT: 10, AD:21 */ 0xff,
/* SLOT: 11, AD:22 */ 0xff,
@@ -101,31 +102,21 @@ static unsigned char irq_map[MAX_SLOT_NU
/* SLOT: 15, AD:26 */ 0xff,
/* SLOT: 16, AD:27 */ 0xff,
/* SLOT: 17, AD:28 */ 0xff,
- /* SLOT: 18, AD:29 */ VRC5477_IRQ_IOPCI_INTC,
- /* vrc5477 ac97 */
- /* SLOT: 19, AD:30 */ VRC5477_IRQ_IOPCI_INTB,
- /* vrc5477 usb peri */
- /* SLOT: 20, AD:31 */ VRC5477_IRQ_IOPCI_INTA,
- /* vrc5477 usb host */
+ /* SLOT: 18, AD:29 */ VRC5477_IRQ_IOPCI_INTC, /* vrc5477 ac97 */
+ /* SLOT: 19, AD:30 */ VRC5477_IRQ_IOPCI_INTB, /* vrc5477 usb peri */
+ /* SLOT: 20, AD:31 */ VRC5477_IRQ_IOPCI_INTA, /* vrc5477 usb host */
};
static unsigned char rockhopperII_irq_map[MAX_SLOT_NUM] = {
/* SLOT: 0, AD:11 */ 0xff,
- /* SLOT: 1, AD:12 */ VRC5477_IRQ_INTB,
- /* onboard AMD PCNET */
+ /* SLOT: 1, AD:12 */ VRC5477_IRQ_INTB, /* onboard AMD PCNET */
/* SLOT: 2, AD:13 */ 0xff,
/* SLOT: 3, AD:14 */ 0xff,
- /* SLOT: 4, AD:15 */ 14,
- /* M5229 ide ISA irq */
- /* SLOT: 5, AD:16 */ VRC5477_IRQ_INTD,
- /* slot 3 */
- /* SLOT: 6, AD:17 */ VRC5477_IRQ_INTA,
- /* slot 4 */
- /* SLOT: 7, AD:18 */ VRC5477_IRQ_INTD,
- /* slot 5 */
- /* SLOT: 8, AD:19 */ 0,
- /* M5457 modem nop */
- /* SLOT: 9, AD:20 */ VRC5477_IRQ_INTA,
- /* slot 2 */
+ /* SLOT: 4, AD:15 */ 14, /* M5229 ide ISA irq */
+ /* SLOT: 5, AD:16 */ VRC5477_IRQ_INTD, /* slot 3 */
+ /* SLOT: 6, AD:17 */ VRC5477_IRQ_INTA, /* slot 4 */
+ /* SLOT: 7, AD:18 */ VRC5477_IRQ_INTD, /* slot 5 */
+ /* SLOT: 8, AD:19 */ 0, /* M5457 modem nop */
+ /* SLOT: 9, AD:20 */ VRC5477_IRQ_INTA, /* slot 2 */
/* SLOT: 10, AD:21 */ 0xff,
/* SLOT: 11, AD:22 */ 0xff,
/* SLOT: 12, AD:23 */ 0xff,
@@ -133,62 +124,57 @@ static unsigned char rockhopperII_irq_ma
/* SLOT: 14, AD:25 */ 0xff,
/* SLOT: 15, AD:26 */ 0xff,
/* SLOT: 16, AD:27 */ 0xff,
- /* SLOT: 17, AD:28 */ 0,
- /* M7101 PMU nop */
- /* SLOT: 18, AD:29 */ VRC5477_IRQ_IOPCI_INTC,
- /* vrc5477 ac97 */
- /* SLOT: 19, AD:30 */ VRC5477_IRQ_IOPCI_INTB,
- /* vrc5477 usb peri */
- /* SLOT: 20, AD:31 */ VRC5477_IRQ_IOPCI_INTA,
- /* vrc5477 usb host */
+ /* SLOT: 17, AD:28 */ 0, /* M7101 PMU nop */
+ /* SLOT: 18, AD:29 */ VRC5477_IRQ_IOPCI_INTC, /* vrc5477 ac97 */
+ /* SLOT: 19, AD:30 */ VRC5477_IRQ_IOPCI_INTB, /* vrc5477 usb peri */
+ /* SLOT: 20, AD:31 */ VRC5477_IRQ_IOPCI_INTA, /* vrc5477 usb host */
};
-void __init pcibios_fixup_irqs(void)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
- struct pci_dev *dev = NULL;
int slot_num;
unsigned char *slot_irq_map;
unsigned char irq;
+ /*
+ * We ignore the swizzled slot and pin values. The original
+ * pci_fixup_irq() codes largely base irq number on the dev slot
+ * numbers because except for one case they are unique even
+ * though there are multiple pci buses.
+ */
+
if (mips_machtype == MACH_NEC_ROCKHOPPERII)
slot_irq_map = rockhopperII_irq_map;
else
slot_irq_map = irq_map;
+ slot_num = PCI_SLOT(dev->devfn);
+ irq = slot_irq_map[slot_num];
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- slot_num = PCI_SLOT(dev->devfn);
- irq = slot_irq_map[slot_num];
-
- db_assert(slot_num < MAX_SLOT_NUM);
-
- db_assert(irq != 0xff);
-
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
-
- dev->irq = irq;
-
- if (mips_machtype == MACH_NEC_ROCKHOPPERII) {
- /* hack to distinquish overlapping slot 20s, one
- * on bus 0 (ALI USB on the M1535 on the backplane),
- * and one on bus 2 (NEC USB controller on the CPU board)
- * Make the M1535 USB - ISA IRQ number 9.
- */
- if (slot_num == 20 && dev->bus->number == 0) {
- pci_write_config_byte(dev,
- PCI_INTERRUPT_LINE,
- 9);
- dev->irq = 9;
- }
+ db_assert(slot_num < MAX_SLOT_NUM);
+
+ db_assert(irq != 0xff);
+
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
+
+ if (mips_machtype == MACH_NEC_ROCKHOPPERII) {
+ /* hack to distinquish overlapping slot 20s, one
+ * on bus 0 (ALI USB on the M1535 on the backplane),
+ * and one on bus 2 (NEC USB controller on the CPU board)
+ * Make the M1535 USB - ISA IRQ number 9.
+ */
+ if (slot_num == 20 && dev->bus->number == 0) {
+ pci_write_config_byte(dev,
+ PCI_INTERRUPT_LINE,
+ 9);
+ irq = 9;
}
}
+
+ return irq;
}
-#if defined(CONFIG_RUNTIME_DEBUG)
-extern void jsun_scan_pci_bus(void);
-extern void jsun_assign_pci_resource(void);
-#endif
void ddb_pci_reset_bus(void)
{
u32 temp;
@@ -212,88 +198,3 @@ void ddb_pci_reset_bus(void)
temp &= ~0xc0000000;
ddb_out32(DDB_PCICTL1_H, temp);
}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- /* we hope pci_auto has assigned the bus numbers to all buses */
- return 1;
-}
-
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
-}
-
-/*
- * fixup baseboard AMD chip so that tx does not underflow.
- * bcr_18 |= 0x0800
- * This sets NOUFLO bit which makes tx not start until whole pkt
- * is fetched to the chip.
- */
-#define PCNET32_WIO_RDP 0x10
-#define PCNET32_WIO_RAP 0x12
-#define PCNET32_WIO_RESET 0x14
-#define PCNET32_WIO_BDP 0x16
-void __init fix_amd_lance(struct pci_dev *dev)
-{
- unsigned long ioaddr;
- u16 temp;
-
- ioaddr = pci_resource_start(dev, 0);
-
- inw(ioaddr + PCNET32_WIO_RESET); /* reset chip */
-
- /* bcr_18 |= 0x0800 */
- outw(18, ioaddr + PCNET32_WIO_RAP);
- temp = inw(ioaddr + PCNET32_WIO_BDP);
- temp |= 0x0800;
- outw(18, ioaddr + PCNET32_WIO_RAP);
- outw(temp, ioaddr + PCNET32_WIO_BDP);
-}
-
-void __init pcibios_fixup(void)
-{
- struct pci_dev *dev = NULL;
-
- if (mips_machtype != MACH_NEC_ROCKHOPPERII)
- return;
-
-
-#define M1535_CONFIG_PORT 0x3f0
-#define M1535_INDEX_PORT 0x3f0
-#define M1535_DATA_PORT 0x3f1
-
- printk("Configuring ALI M1535 Super I/O mouse irq.\n");
-
- request_region(M1535_CONFIG_PORT, 2, "M1535 Super I/O config");
-
- /* Enter config mode. */
- outb(0x51, M1535_CONFIG_PORT);
- outb(0x23, M1535_CONFIG_PORT);
-
- /* Select device 0x07. */
- outb(0x07, M1535_INDEX_PORT);
- outb(0x07, M1535_DATA_PORT);
-
- /* Set mouse irq (register 0x72) to 12. */
- outb(0x72, M1535_INDEX_PORT);
- outb(0x0c, M1535_DATA_PORT);
-
- /* Exit config mode. */
- outb(0xbb, M1535_CONFIG_PORT);
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- if (dev->vendor == PCI_VENDOR_ID_AL)
- if (dev->device == PCI_DEVICE_ID_AL_M1535
- || dev->device == PCI_DEVICE_ID_AL_M1533) {
- u8 old;
- printk
- ("Enabling ALI M1533/35 PS2 keyboard/mouse.\n");
- pci_read_config_byte(dev, 0x41, &old);
- pci_write_config_byte(dev, 0x41, old | 0xd0);
- }
-
- if (dev->vendor == PCI_VENDOR_ID_AMD &&
- dev->device == PCI_DEVICE_ID_AMD_LANCE)
- fix_amd_lance(dev);
- }
-}
diff -puN /dev/null arch/mips/pci/pci-ev96100.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/pci-ev96100.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,63 @@
+/*
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/pci_channel.h>
+
+static struct resource pci_io_resource = {
+ .name = "io pci IO space",
+ .start = 0x10000000,
+ .end = 0x11ffffff,
+ .flags = IORESOURCE_IO
+};
+
+static struct resource pci_mem_resource = {
+ .name = "ext pci memory space",
+ .start = 0x12000000,
+ .end = 0x13ffffff,
+ .flags = IORESOURCE_MEM
+};
+
+extern struct pci_ops gt96100_pci_ops;
+
+struct pci_controller ev96100_controller = {
+ .pci_ops = >96100_pci_ops,
+ .io_resource = &pci_io_resource,
+ .mem_resource = &pci_mem_resource,
+};
+
+static void ev96100_pci_init(void)
+{
+ register_pci_controller(&ev96100_controller);
+}
+
+arch_initcall(ev96100_pci_init);
diff -puN arch/mips/pci/pci-hplj.c~mips-megapatch arch/mips/pci/pci-hplj.c
--- 25/arch/mips/pci/pci-hplj.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci-hplj.c 2004-02-19 12:53:02.000000000 -0800
@@ -15,8 +15,8 @@
#include <asm/pci_channel.h>
#include <asm/hp-lj/asic.h>
-volatile u32 *pci_config_address_reg = (volatile u32 *) 0xfdead000;
-volatile u32 *pci_config_data_reg = (volatile u32 *) 0xfdead000;
+static volatile u32 *pci_config_address_reg = (volatile u32 *) 0xfdead000;
+static volatile u32 *pci_config_data_reg = (volatile u32 *) 0xfdead000;
@@ -107,21 +107,12 @@ struct pci_ops hp_pci_ops = {
};
-struct pci_channel mips_pci_channels[] = {
- {&hp_pci_ops, &ioport_resource, &iomem_resource},
- {NULL, NULL, NULL}
+struct pci_controller hp_controller = {
+ .pci_ops = &hp_pci_ops,
+ .io_resource = &ioport_resource,
+ .mem_resource = &iomem_resource,
};
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 1;
-}
-
-void __init pcibios_fixup(void)
-{
-}
-
-
void __init pcibios_fixup_irqs(void)
{
struct pci_dev *dev = NULL;
@@ -210,43 +201,4 @@ void __init pci_setup(void)
pci_config_data_reg = (u32 *) (((u32) mips_io_port_base) | 0xcfc);
pci_config_address_reg =
(u32 *) (((u32) pci_regs_base_offset) | 0xcf8);
-
-}
-
-
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
- int pos;
- int bases;
-
- printk("adjusting pci device: %s\n", dev->name);
-
- switch (dev->hdr_type) {
- case PCI_HEADER_TYPE_NORMAL:
- bases = 6;
- break;
- case PCI_HEADER_TYPE_BRIDGE:
- bases = 2;
- break;
- case PCI_HEADER_TYPE_CARDBUS:
- bases = 1;
- break;
- default:
- bases = 0;
- break;
- }
- for (pos = 0; pos < bases; pos++) {
- struct resource *res = &dev->resource[pos];
- if (res->start >= IO_MEM_LOGICAL_START &&
- res->end <= IO_MEM_LOGICAL_END) {
- res->start += IO_MEM_VIRTUAL_OFFSET;
- res->end += IO_MEM_VIRTUAL_OFFSET;
- }
- if (res->start >= IO_PORT_LOGICAL_START &&
- res->end <= IO_PORT_LOGICAL_END) {
- res->start += IO_PORT_VIRTUAL_OFFSET;
- res->end += IO_PORT_VIRTUAL_OFFSET;
- }
- }
-
}
diff -puN arch/mips/pci/pci-ip27.c~mips-megapatch arch/mips/pci/pci-ip27.c
--- 25/arch/mips/pci/pci-ip27.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci-ip27.c 2004-02-19 12:53:02.000000000 -0800
@@ -3,6 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
+ * Copyright (C) 2003 Christoph Hellwig (hch@lst.de)
* Copyright (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
@@ -11,8 +12,9 @@
#include <linux/pci.h>
#include <asm/sn/arch.h>
#include <asm/pci/bridge.h>
+#include <asm/pci_channel.h>
#include <asm/paccess.h>
-#include <asm/sn/sn0/ip27.h>
+#include <asm/sn/intr.h>
#include <asm/sn/sn0/hub.h>
/*
@@ -26,6 +28,12 @@
#define MAX_DEVICES_PER_PCIBUS 8
/*
+ * XXX: No kmalloc available when we do our crosstalk scan,
+ * we should try to move it later in the boot process.
+ */
+static struct bridge_controller bridges[MAX_PCI_BUSSES];
+
+/*
* No locking needed until PCI initialization is done parallely.
*/
int irqstore[MAX_PCI_BUSSES][MAX_DEVICES_PER_PCIBUS];
@@ -34,7 +42,7 @@ int lastirq = BASE_PCI_IRQ;
/*
* Translate from irq to software PCI bus number and PCI slot.
*/
-int irq_to_bus[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];
+struct bridge_controller *irq_to_bridge[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];
int irq_to_slot[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];
/*
@@ -42,90 +50,136 @@ int irq_to_slot[MAX_PCI_BUSSES * MAX_DEV
* not really documented, so right now I can't write code which uses it.
* Therefore we use type 0 accesses for now even though they won't work
* correcly for PCI-to-PCI bridges.
+ *
+ * The function is complicated by the ultimate brokeness of the IOC3 chip
+ * which is used in SGI systems. The IOC3 can only handle 32-bit PCI
+ * accesses and does only decode parts of it's address space.
*/
-#define CF0_READ_PCI_CFG(bus,devfn,where,value,bm,mask) \
-do { \
- bridge_t *bridge; \
- int slot = PCI_SLOT(devfn); \
- int fn = PCI_FUNC(devfn); \
- volatile u32 *addr; \
- u32 cf, __bit; \
- unsigned int bus_id = (unsigned) bus->number; \
- \
- bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id], \
- bus_to_wid[bus_id]); \
- \
- __bit = (((where) & (bm)) << 3); \
- addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2]; \
- if (get_dbe(cf, addr)) \
- return PCIBIOS_DEVICE_NOT_FOUND; \
- *value = (cf >> __bit) & (mask); \
- return PCIBIOS_SUCCESSFUL; \
-} while (0)
static int pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * value)
{
- u32 vprod;
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
+ bridge_t *bridge = bc->base;
+ int slot = PCI_SLOT(devfn);
+ int fn = PCI_FUNC(devfn);
+ volatile void *addr;
+ u32 cf, shift, mask;
+ int res;
+
+ addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[PCI_VENDOR_ID];
+ if (get_dbe(cf, (u32 *) addr))
+ return PCIBIOS_DEVICE_NOT_FOUND;
- CF0_READ_PCI_CFG(bus, devfn, PCI_VENDOR_ID, &vprod, 0, 0xffffffff);
- if (vprod == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16))
- && ((where >= 0x14 && where < 0x40) || (where >= 0x48))) {
- *value = 0;
- return PCIBIOS_SUCCESSFUL;
- }
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * generic PCI code a chance to look at it for real ...
+ */
+ if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
+ goto oh_my_gawd;
+
+ addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[where ^ (4 - size)];
if (size == 1)
- CF0_READ_PCI_CFG(bus, devfn, where, (u8 *) value, 3, 0xff);
+ res = get_dbe(*value, (u8 *) addr);
else if (size == 2)
- CF0_READ_PCI_CFG(bus, devfn, where, (u16 *) value, 2,
- 0xffff);
+ res = get_dbe(*value, (u16 *) addr);
else
- CF0_READ_PCI_CFG(bus, devfn, where, (u32 *) value, 0,
- 0xffffffff);
-}
+ res = get_dbe(*value, (u32 *) addr);
+
+ return PCIBIOS_SUCCESSFUL;
+
+oh_my_gawd:
+
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * generic PCI code a chance to look at the wrong register.
+ */
+ if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) {
+ *value = 0;
+ return PCIBIOS_SUCCESSFUL;
+ }
+
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't try to access
+ * anything but 32-bit words ...
+ */
+ addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
-#define CF0_WRITE_PCI_CFG(bus,devfn,where,value,bm,mask) \
-do { \
- bridge_t *bridge; \
- int slot = PCI_SLOT(devfn); \
- int fn = PCI_FUNC(devfn); \
- volatile u32 *addr; \
- u32 cf, __bit; \
- unsigned int bus_id = (unsigned) bus->number; \
- \
- bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id], \
- bus_to_wid[bus_id]); \
- \
- __bit = (((where) & (bm)) << 3); \
- addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2]; \
- if (get_dbe(cf, addr)) \
- return PCIBIOS_DEVICE_NOT_FOUND; \
- cf &= (~mask); \
- cf |= (value); \
- put_dbe(cf, addr); \
- return PCIBIOS_SUCCESSFUL; \
-} while (0)
+ if (get_dbe(cf, (u32 *) addr))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ shift = ((where & 3) << 3);
+ mask = (0xffffffffU >> ((4 - size) << 3));
+ *value = (cf >> shift) & mask;
+
+ return PCIBIOS_SUCCESSFUL;
+}
static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 value)
{
- u32 vprod;
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
+ bridge_t *bridge = bc->base;
+ int slot = PCI_SLOT(devfn);
+ int fn = PCI_FUNC(devfn);
+ volatile void *addr;
+ u32 cf, shift, mask, smask;
+ int res;
+
+ addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[PCI_VENDOR_ID];
+ if (get_dbe(cf, (u32 *) addr))
+ return PCIBIOS_DEVICE_NOT_FOUND;
- CF0_READ_PCI_CFG(bus, devfn, PCI_VENDOR_ID, &vprod, 0, 0xffffffff);
- if (vprod == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16))
- && ((where >= 0x14 && where < 0x40) || (where >= 0x48))) {
- return PCIBIOS_SUCCESSFUL;
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * generic PCI code a chance to look at it for real ...
+ */
+ if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
+ goto oh_my_gawd;
+
+ addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[where ^ (4 - size)];
+
+ if (size == 1) {
+ res = put_dbe(value, (u8 *) addr);
+ } else if (size == 2) {
+ res = put_dbe(value, (u16 *) addr);
+ } else {
+ res = put_dbe(value, (u32 *) addr);
}
- if (size == 1)
- CF0_WRITE_PCI_CFG(bus, devfn, where, (u8) value, 3, 0xff);
- else if (size == 2)
- CF0_WRITE_PCI_CFG(bus, devfn, where, (u16) value, 2,
- 0xffff);
- else
- CF0_WRITE_PCI_CFG(bus, devfn, where, (u32) value, 0,
- 0xffffffff);
+ if (res)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ return PCIBIOS_SUCCESSFUL;
+
+oh_my_gawd:
+
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * generic PCI code a chance to touch the wrong register.
+ */
+ if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
+ return PCIBIOS_SUCCESSFUL;
+
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't try to access
+ * anything but 32-bit words ...
+ */
+ addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
+
+ if (get_dbe(cf, (u32 *) addr))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ shift = ((where & 3) << 3);
+ mask = (0xffffffffU >> ((4 - size) << 3));
+ smask = mask << shift;
+
+ cf = (cf & ~smask) | ((value & mask) << shift);
+ if (put_dbe(cf, (u32 *) addr))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ return PCIBIOS_SUCCESSFUL;
}
static struct pci_ops bridge_pci_ops = {
@@ -133,39 +187,79 @@ static struct pci_ops bridge_pci_ops = {
.write = pci_conf0_write_config,
};
-static int __init pcibios_init(void)
+int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid)
{
- struct pci_ops *ops = &bridge_pci_ops;
- int i;
+ struct bridge_controller *bc;
+ bridge_t *bridge;
+ static int num_bridges = 0;
+
+ printk("a bridge\n");
+
+ /* XXX: kludge alert.. */
+ if (!num_bridges)
+ ioport_resource.end = ~0UL;
+
+ bc = &bridges[num_bridges++];
+
+ bc->pc.pci_ops = &bridge_pci_ops;
+ bc->pc.mem_resource = &bc->mem;
+ bc->pc.io_resource = &bc->io;
+
+ bc->mem.name = "Bridge PCI MEM";
+ bc->pc.mem_offset = 0;
+ bc->mem.start = 0;
+ bc->mem.end = ~0UL;
+ bc->mem.flags = IORESOURCE_MEM;
+
+ bc->io.name = "Bridge IO MEM";
+ bc->io.start = 0UL;
+ bc->pc.io_offset = 0UL;
+ bc->io.end = ~0UL;
+ bc->io.flags = IORESOURCE_IO;
+
+ bc->irq_cpu = smp_processor_id();
+ bc->widget_id = widget_id;
+ bc->nasid = nasid;
- ioport_resource.end = ~0UL;
+ bc->baddr = (u64)masterwid << 60;
+ bc->baddr |= (1UL << 56); /* Barrier set */
- for (i = 0; i < num_bridges; i++) {
- printk("PCI: Probing PCI hardware on host bus %2d.\n", i);
- pci_scan_bus(i, ops, NULL);
- }
+ /*
+ * point to this bridge
+ */
+ bridge = (bridge_t *) RAW_NODE_SWIN_BASE(nasid, widget_id);
- return 0;
-}
+ /*
+ * Clear all pending interrupts.
+ */
+ bridge->b_int_rst_stat = BRIDGE_IRR_ALL_CLR;
-subsys_initcall(pcibios_init);
+ /*
+ * Until otherwise set up, assume all interrupts are from slot 0
+ */
+ bridge->b_int_device = (u32) 0x0;
-static inline u8 bridge_swizzle(u8 pin, u8 slot)
-{
- return (((pin - 1) + slot) % 4) + 1;
-}
+ /*
+ * swap pio's to pci mem and io space (big windows)
+ */
+ bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP |
+ BRIDGE_CTRL_MEM_SWAP;
-static u8 __devinit pci_swizzle(struct pci_dev *dev, u8 * pinp)
-{
- u8 pin = *pinp;
+ /*
+ * Hmm... IRIX sets additional bits in the address which
+ * are documented as reserved in the bridge docs.
+ */
+ bridge->b_wid_int_upper = 0x8000 | (masterwid << 16);
+ bridge->b_wid_int_lower = 0x01800090; /* PI_INT_PEND_MOD off*/
+ bridge->b_dir_map = (masterwid << 20); /* DMA */
+ bridge->b_int_enable = 0;
- while (dev->bus->self) { /* Move up the chain of bridges. */
- pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
- dev = dev->bus->self;
- }
- *pinp = pin;
+ bridge->b_wid_tflush; /* wait until Bridge PIO complete */
+
+ bc->base = bridge;
- return PCI_SLOT(dev->devfn);
+ register_pci_controller(&bc->pc);
+ return 0;
}
/*
@@ -177,9 +271,12 @@ static u8 __devinit pci_swizzle(struct p
* A given PCI device, in general, should be able to intr any of the cpus
* on any one of the hubs connected to its xbow.
*/
-static int __devinit pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+int __devinit pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
- if ((dev->bus->number >= MAX_PCI_BUSSES)
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
+ int busno = dev->bus->number;
+
+ if ((busno >= MAX_PCI_BUSSES)
|| (pin != 1)
|| (slot >= MAX_DEVICES_PER_PCIBUS))
panic("Increase supported PCI busses %d,%d,%d",
@@ -188,47 +285,14 @@ static int __devinit pci_map_irq(struct
/*
* Already assigned? Then return previously assigned value ...
*/
- if (irqstore[dev->bus->number][slot])
- return irqstore[dev->bus->number][slot];
+ if (irqstore[busno][slot])
+ return irqstore[busno][slot];
- irq_to_bus[lastirq] = dev->bus->number;
+ irq_to_bridge[lastirq] = bc;
irq_to_slot[lastirq] = slot;
- irqstore[dev->bus->number][slot] = lastirq;
- lastirq++;
- return lastirq - 1;
-}
-
-void __init pcibios_update_irq(struct pci_dev *dev, int irq)
-{
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
-}
+ irqstore[busno][slot] = lastirq;
-void __devinit pcibios_fixup_bus(struct pci_bus *b)
-{
- pci_fixup_irqs(pci_swizzle, pci_map_irq);
-}
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- /* Not needed, since we enable all devices at startup. */
- return 0;
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
-}
-
-unsigned int pcibios_assign_all_busses(void)
-{
- return 0;
-}
-
-char *__devinit pcibios_setup(char *str)
-{
- /* Nothing to do for now. */
-
- return str;
+ return lastirq++;
}
/*
@@ -240,9 +304,8 @@ char *__devinit pcibios_setup(char *str)
static void __init pci_disable_swapping(struct pci_dev *dev)
{
- unsigned int bus_id = (unsigned) dev->bus->number;
- bridge_t *bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],
- bus_to_wid[bus_id]);
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
+ bridge_t *bridge = bc->base;
int slot = PCI_SLOT(dev->devfn);
/* Turn off byte swapping */
@@ -252,9 +315,8 @@ static void __init pci_disable_swapping(
static void __init pci_enable_swapping(struct pci_dev *dev)
{
- unsigned int bus_id = (unsigned) dev->bus->number;
- bridge_t *bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],
- bus_to_wid[bus_id]);
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
+ bridge_t *bridge = bc->base;
int slot = PCI_SLOT(dev->devfn);
/* Turn on byte swapping */
@@ -264,23 +326,23 @@ static void __init pci_enable_swapping(s
static void __init pci_fixup_ioc3(struct pci_dev *d)
{
- unsigned long bus_id = (unsigned) d->bus->number;
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(d->bus);
+ unsigned long offset = NODE_OFFSET(bc->nasid);
- printk("PCI: Fixing base addresses for IOC3 device %s\n",
- pci_name(d));
+ printk("PCI: Fixing base addresses for IOC3 device %s\n", pci_name(d));
- d->resource[0].start |= NODE_OFFSET(bus_to_nid[bus_id]);
- d->resource[0].end |= NODE_OFFSET(bus_to_nid[bus_id]);
+ d->resource[0].start |= offset;
+ d->resource[0].end |= offset;
pci_disable_swapping(d);
}
static void __init pci_fixup_isp1020(struct pci_dev *d)
{
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(d->bus);
unsigned short command;
- d->resource[0].start |=
- ((unsigned long) (bus_to_nid[d->bus->number]) << 32);
+ d->resource[0].start |= (unsigned long) bc->nasid << 32;
printk("PCI: Fixing isp1020 in [bus:slot.fn] %s\n", pci_name(d));
/*
@@ -289,7 +351,6 @@ static void __init pci_fixup_isp1020(str
* bit set. Things stop working if we program the controllers as not
* having PCI_COMMAND_MEMORY, so we have to fudge the mem_flags.
*/
-
pci_set_master(d);
pci_read_config_word(d, PCI_COMMAND, &command);
command |= PCI_COMMAND_MEMORY;
@@ -302,9 +363,8 @@ static void __init pci_fixup_isp1020(str
static void __init pci_fixup_isp2x00(struct pci_dev *d)
{
- unsigned int bus_id = (unsigned) d->bus->number;
- bridge_t *bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],
- bus_to_wid[bus_id]);
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(d->bus);
+ bridge_t *bridge = bc->base;
bridgereg_t devreg;
int i;
int slot = PCI_SLOT(d->devfn);
@@ -378,14 +438,11 @@ static void __init pci_fixup_isp2x00(str
struct pci_fixup pcibios_fixups[] = {
{PCI_FIXUP_HEADER, PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,
pci_fixup_ioc3},
- {PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC,
- PCI_DEVICE_ID_QLOGIC_ISP1020,
+ {PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP1020,
pci_fixup_isp1020},
- {PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC,
- PCI_DEVICE_ID_QLOGIC_ISP2100,
+ {PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100,
pci_fixup_isp2x00},
- {PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC,
- PCI_DEVICE_ID_QLOGIC_ISP2200,
+ {PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200,
pci_fixup_isp2x00},
{0}
};
diff -puN arch/mips/pci/pci-ip32.c~mips-megapatch arch/mips/pci/pci-ip32.c
--- 25/arch/mips/pci/pci-ip32.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci-ip32.c 2004-02-19 12:53:02.000000000 -0800
@@ -5,453 +5,141 @@
*
* Copyright (C) 2000, 2001 Keith M Wesolowski
*/
+#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/types.h>
-#include <asm/pci.h>
+#include <asm/pci_channel.h>
#include <asm/ip32/mace.h>
-#include <asm/ip32/crime.h>
#include <asm/ip32/ip32_ints.h>
-#include <linux/delay.h>
#undef DEBUG_MACE_PCI
/*
- * O2 has up to 5 PCI devices connected into the MACE bridge. The device
- * map looks like this:
- *
- * 0 aic7xxx 0
- * 1 aic7xxx 1
- * 2 expansion slot
- * 3 N/C
- * 4 N/C
- */
-
-#define chkslot(_bus,_devfn) \
-do { \
- if ((_bus)->number > 0 || PCI_SLOT (_devfn) < 1 \
- || PCI_SLOT (_devfn) > 3) \
- return PCIBIOS_DEVICE_NOT_FOUND; \
-} while (0)
-
-#define mkaddr(_devfn, where) \
-((((_devfn) & 0xffUL) << 8) | ((where) & 0xfcUL))
-
-void macepci_error(int irq, void *dev, struct pt_regs *regs);
-
-static int macepci_read_config(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 * val)
-{
- switch (size) {
- case 1:
- *val = 0xff;
- chkslot(bus, devfn);
- mace_write_32(MACEPCI_CONFIG_ADDR, mkaddr(devfn, where));
- *val =
- mace_read_8(MACEPCI_CONFIG_DATA +
- ((where & 3UL) ^ 3UL));
-
- return PCIBIOS_SUCCESSFUL;
-
- case 2:
- *val = 0xffff;
- chkslot(bus, devfn);
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mace_write_32(MACEPCI_CONFIG_ADDR, mkaddr(devfn, where));
- *val =
- mace_read_16(MACEPCI_CONFIG_DATA +
- ((where & 2UL) ^ 2UL));
-
- return PCIBIOS_SUCCESSFUL;
-
- case 4:
- *val = 0xffffffff;
- chkslot(bus, devfn);
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mace_write_32(MACEPCI_CONFIG_ADDR, mkaddr(devfn, where));
- *val = mace_read_32(MACEPCI_CONFIG_DATA);
-
- return PCIBIOS_SUCCESSFUL;
- }
-}
-
-static int macepci_write_config(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 val)
-{
- switch (size) {
- case 1:
- chkslot(bus, devfn);
- mace_write_32(MACEPCI_CONFIG_ADDR, mkaddr(devfn, where));
- mace_write_8(MACEPCI_CONFIG_DATA + ((where & 3UL) ^ 3UL),
- val);
-
- return PCIBIOS_SUCCESSFUL;
-
- case 2:
- chkslot(bus, devfn);
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mace_write_32(MACEPCI_CONFIG_ADDR, mkaddr(devfn, where));
- mace_write_16(MACEPCI_CONFIG_DATA + ((where & 2UL) ^ 2UL),
- val);
-
- return PCIBIOS_SUCCESSFUL;
-
- case 4:
- chkslot(bus, devfn);
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mace_write_32(MACEPCI_CONFIG_ADDR, mkaddr(devfn, where));
- mace_write_32(MACEPCI_CONFIG_DATA, val);
-
- return PCIBIOS_SUCCESSFUL;
- }
-}
-
-static struct pci_ops macepci_ops = {
- .read = macepci_read_config,
- .write = macepci_write_config,
-};
-
-struct pci_fixup pcibios_fixups[] = { {0} };
-
-static int __init pcibios_init(void)
-{
- struct pci_dev *dev = NULL;
- u32 start, size;
- u16 cmd;
- u32 base_io = 0x3000; /* The first i/o address to assign after SCSI */
- u32 base_mem = 0x80100000; /* Likewise */
- u32 rev = mace_read_32(MACEPCI_REV);
- int i;
-
- printk("MACE: PCI rev %d detected at %016lx\n", rev,
- (u64) MACE_BASE + MACE_PCI);
-
- /* These are *bus* addresses */
- ioport_resource.start = 0;
- ioport_resource.end = 0xffffffffUL;
- iomem_resource.start = 0x80000000UL;
- iomem_resource.end = 0xffffffffUL;
-
- /* Clear any outstanding errors and enable interrupts */
- mace_write_32(MACEPCI_ERROR_ADDR, 0);
- mace_write_32(MACEPCI_ERROR_FLAGS, 0);
- mace_write_32(MACEPCI_CONTROL, 0xff008500);
- crime_write_64(CRIME_HARD_INT, 0UL);
- crime_write_64(CRIME_SOFT_INT, 0UL);
- crime_write_64(CRIME_INT_STAT, 0x000000000000ff00UL);
-
- if (request_irq(MACE_PCI_BRIDGE_IRQ, macepci_error, 0,
- "MACE PCI error", NULL))
- panic("PCI bridge can't get interrupt; can't happen.");
-
- pci_scan_bus(0, &macepci_ops, NULL);
-
-#ifdef DEBUG_MACE_PCI
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- printk("Device: %d/%d/%d ARCS-assigned bus resource map\n",
- dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn));
- for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
- if (dev->resource[i].start == 0)
- continue;
- printk("%d: %016lx - %016lx (flags %04lx)\n",
- i, dev->resource[i].start,
- dev->resource[i].end,
- dev->resource[i].flags);
- }
- }
-#endif
- /*
- * Assign sane resources to and enable all devices. The requirement
- * for the SCSI controllers is well-known: a 256-byte I/O region
- * which we must assign, and a 1-page memory region which is
- * assigned by the system firmware.
- */
- dev = NULL;
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- switch (PCI_SLOT(dev->devfn)) {
- case 1: /* SCSI bus 0 */
- dev->resource[0].start = 0x1000UL;
- dev->resource[0].end = 0x10ffUL;
- break;
- case 2: /* SCSI bus 1 */
- dev->resource[0].start = 0x2000UL;
- dev->resource[0].end = 0x20ffUL;
- break;
- default: /* Slots - I guess we have only 1 */
- for (i = 0; i < 6; i++) {
- size = dev->resource[i].end
- - dev->resource[i].start;
- if (!size
- || !(dev->resource[i].flags
- & (IORESOURCE_IO |
- IORESOURCE_MEM))) {
- dev->resource[i].start =
- dev->resource[i].end = 0UL;
- continue;
- }
- if (dev->resource[i].flags & IORESOURCE_IO) {
- dev->resource[i].start = base_io;
- base_io += PAGE_ALIGN(size);
- } else {
- dev->resource[i].start = base_mem;
- base_mem += 0x100000UL;
- }
- dev->resource[i].end =
- dev->resource[i].start + size;
- }
- break;
- }
- for (i = 0; i < 6; i++) {
- if (dev->resource[i].start == 0)
- continue;
- start = dev->resource[i].start;
- if (dev->resource[i].flags & IORESOURCE_IO)
- start |= 1;
- pci_write_config_dword(dev,
- PCI_BASE_ADDRESS_0 +
- (i << 2), (u32) start);
- }
- pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0x20);
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x30);
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
- cmd |=
- (PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
- PCI_COMMAND_SPECIAL | PCI_COMMAND_INVALIDATE |
- PCI_COMMAND_PARITY);
- pci_write_config_word(dev, PCI_COMMAND, cmd);
- pci_set_master(dev);
- }
- /*
- * Fixup O2 PCI slot. Bad hack.
- */
-/* devtag = pci_make_tag(0, 0, 3, 0);
-
- slot = macepci_conf_read(0, devtag, PCI_COMMAND_STATUS_REG);
- slot |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
- macepci_conf_write(0, devtag, PCI_COMMAND_STATUS_REG, slot);
-
- slot = macepci_conf_read(0, devtag, PCI_MAPREG_START);
- if (slot == 0xffffffe1)
- macepci_conf_write(0, devtag, PCI_MAPREG_START, 0x00001000);
-
- slot = macepci_conf_read(0, devtag, PCI_MAPREG_START + (2 << 2));
- if ((slot & 0xffff0000) == 0) {
- slot += 0x00010000;
- macepci_conf_write(0, devtag, PCI_MAPREG_START + (2 << 2),
- 0x00000000);
- }
- */
-#ifdef DEBUG_MACE_PCI
- printk("Triggering PCI bridge interrupt...\n");
- mace_write_32(MACEPCI_ERROR_FLAGS, MACEPCI_ERROR_INTERRUPT_TEST);
-
- dev = NULL;
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- printk("Device: %d/%d/%d final bus resource map\n",
- dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn));
- for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
- if (dev->resource[i].start == 0)
- continue;
- printk("%d: %016lx - %016lx (flags %04lx)\n",
- i, dev->resource[i].start,
- dev->resource[i].end,
- dev->resource[i].flags);
- }
- }
-#endif
-
- return 0;
-}
-
-subsys_initcall(pcibios_init);
-
-/*
- * Given a PCI slot number (a la PCI_SLOT(...)) and the interrupt pin of
- * the device (1-4 => A-D), tell what irq to use. Note that we don't
- * in theory have slots 4 and 5, and we never normally use the shared
- * irqs. I suppose a device without a pin A will thank us for doing it
- * right if there exists such a broken piece of crap.
- */
-static int __devinit macepci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
- chkslot(dev->bus, dev->devfn);
- if (pin == 0)
- pin = 1;
- switch (slot) {
- case 1:
- return MACEPCI_SCSI0_IRQ;
- case 2:
- return MACEPCI_SCSI1_IRQ;
- case 3:
- switch (pin) {
- case 2:
- return MACEPCI_SHARED0_IRQ;
- case 3:
- return MACEPCI_SHARED1_IRQ;
- case 4:
- return MACEPCI_SHARED2_IRQ;
- case 1:
- default:
- return MACEPCI_SLOT0_IRQ;
- }
- case 4:
- switch (pin) {
- case 2:
- return MACEPCI_SHARED2_IRQ;
- case 3:
- return MACEPCI_SHARED0_IRQ;
- case 4:
- return MACEPCI_SHARED1_IRQ;
- case 1:
- default:
- return MACEPCI_SLOT1_IRQ;
- }
- return MACEPCI_SLOT1_IRQ;
- case 5:
- switch (pin) {
- case 2:
- return MACEPCI_SHARED1_IRQ;
- case 3:
- return MACEPCI_SHARED2_IRQ;
- case 4:
- return MACEPCI_SHARED0_IRQ;
- case 1:
- default:
- return MACEPCI_SLOT2_IRQ;
- }
- default:
- return 0;
- }
-}
-
-/*
- * It's not entirely clear what this does in a system with no bridges.
- * In any case, bridges are not supported by Linux in O2.
- */
-static u8 __init macepci_swizzle(struct pci_dev *dev, u8 * pinp)
-{
- if (PCI_SLOT(dev->devfn) == 2)
- *pinp = 2;
- else
- *pinp = 1;
- return PCI_SLOT(dev->devfn);
-}
-
-/* All devices are enabled during initialization. */
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- return PCIBIOS_SUCCESSFUL;
-}
-
-char *__init pcibios_setup(char *str)
-{
- return str;
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
-}
-
-void __init pcibios_update_irq(struct pci_dev *dev, int irq)
-{
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
-}
-
-void __devinit pcibios_fixup_bus(struct pci_bus *b)
-{
- pci_fixup_irqs(macepci_swizzle, macepci_map_irq);
-}
-
-/*
* Handle errors from the bridge. This includes master and target aborts,
* various command and address errors, and the interrupt test. This gets
* registered on the bridge error irq. It's conceivable that some of these
* conditions warrant a panic. Anybody care to say which ones?
*/
-void macepci_error(int irq, void *dev, struct pt_regs *regs)
+static irqreturn_t macepci_error(int irq, void *dev, struct pt_regs *regs)
{
- u32 flags, error_addr;
- char space;
-
- flags = mace_read_32(MACEPCI_ERROR_FLAGS);
- error_addr = mace_read_32(MACEPCI_ERROR_ADDR);
+ char s;
+ unsigned int flags = mace->pci.error;
+ unsigned int addr = mace->pci.error_addr;
if (flags & MACEPCI_ERROR_MEMORY_ADDR)
- space = 'M';
+ s = 'M';
else if (flags & MACEPCI_ERROR_CONFIG_ADDR)
- space = 'C';
+ s = 'C';
else
- space = 'X';
+ s = 'X';
if (flags & MACEPCI_ERROR_MASTER_ABORT) {
- printk("MACEPCI: Master abort at 0x%08x (%c)\n",
- error_addr, space);
- mace_write_32(MACEPCI_ERROR_FLAGS,
- flags & ~MACEPCI_ERROR_MASTER_ABORT);
+ printk("MACEPCI: Master abort at 0x%08x (%c)\n", addr, s);
+ flags &= ~MACEPCI_ERROR_MASTER_ABORT;
}
if (flags & MACEPCI_ERROR_TARGET_ABORT) {
- printk("MACEPCI: Target abort at 0x%08x (%c)\n",
- error_addr, space);
- mace_write_32(MACEPCI_ERROR_FLAGS,
- flags & ~MACEPCI_ERROR_TARGET_ABORT);
+ printk("MACEPCI: Target abort at 0x%08x (%c)\n", addr, s);
+ flags &= ~MACEPCI_ERROR_TARGET_ABORT;
}
if (flags & MACEPCI_ERROR_DATA_PARITY_ERR) {
- printk("MACEPCI: Data parity error at 0x%08x (%c)\n",
- error_addr, space);
- mace_write_32(MACEPCI_ERROR_FLAGS, flags
- & ~MACEPCI_ERROR_DATA_PARITY_ERR);
+ printk("MACEPCI: Data parity error at 0x%08x (%c)\n", addr, s);
+ flags &= ~MACEPCI_ERROR_DATA_PARITY_ERR;
}
if (flags & MACEPCI_ERROR_RETRY_ERR) {
- printk("MACEPCI: Retry error at 0x%08x (%c)\n", error_addr,
- space);
- mace_write_32(MACEPCI_ERROR_FLAGS, flags
- & ~MACEPCI_ERROR_RETRY_ERR);
+ printk("MACEPCI: Retry error at 0x%08x (%c)\n", addr, s);
+ flags &= ~MACEPCI_ERROR_RETRY_ERR;
}
if (flags & MACEPCI_ERROR_ILLEGAL_CMD) {
- printk("MACEPCI: Illegal command at 0x%08x (%c)\n",
- error_addr, space);
- mace_write_32(MACEPCI_ERROR_FLAGS,
- flags & ~MACEPCI_ERROR_ILLEGAL_CMD);
+ printk("MACEPCI: Illegal command at 0x%08x (%c)\n", addr, s);
+ flags &= ~MACEPCI_ERROR_ILLEGAL_CMD;
}
if (flags & MACEPCI_ERROR_SYSTEM_ERR) {
- printk("MACEPCI: System error at 0x%08x (%c)\n",
- error_addr, space);
- mace_write_32(MACEPCI_ERROR_FLAGS, flags
- & ~MACEPCI_ERROR_SYSTEM_ERR);
+ printk("MACEPCI: System error at 0x%08x (%c)\n", addr, s);
+ flags &= ~MACEPCI_ERROR_SYSTEM_ERR;
}
if (flags & MACEPCI_ERROR_PARITY_ERR) {
- printk("MACEPCI: Parity error at 0x%08x (%c)\n",
- error_addr, space);
- mace_write_32(MACEPCI_ERROR_FLAGS,
- flags & ~MACEPCI_ERROR_PARITY_ERR);
+ printk("MACEPCI: Parity error at 0x%08x (%c)\n", addr, s);
+ flags &= ~MACEPCI_ERROR_PARITY_ERR;
}
if (flags & MACEPCI_ERROR_OVERRUN) {
- printk("MACEPCI: Overrun error at 0x%08x (%c)\n",
- error_addr, space);
- mace_write_32(MACEPCI_ERROR_FLAGS, flags
- & ~MACEPCI_ERROR_OVERRUN);
+ printk("MACEPCI: Overrun error at 0x%08x (%c)\n", addr, s);
+ flags &= ~MACEPCI_ERROR_OVERRUN;
}
if (flags & MACEPCI_ERROR_SIG_TABORT) {
printk("MACEPCI: Signaled target abort (clearing)\n");
- mace_write_32(MACEPCI_ERROR_FLAGS, flags
- & ~MACEPCI_ERROR_SIG_TABORT);
+ flags &= ~MACEPCI_ERROR_SIG_TABORT;
}
if (flags & MACEPCI_ERROR_INTERRUPT_TEST) {
printk("MACEPCI: Interrupt test triggered (clearing)\n");
- mace_write_32(MACEPCI_ERROR_FLAGS, flags
- & ~MACEPCI_ERROR_INTERRUPT_TEST);
+ flags &= ~MACEPCI_ERROR_INTERRUPT_TEST;
}
+
+ mace->pci.error = flags;
+
+ return IRQ_HANDLED;
}
-unsigned int pcibios_assign_all_busses(void)
+
+extern struct pci_ops mace_pci_ops;
+#ifdef CONFIG_MIPS64
+static struct resource mace_pci_mem_resource = {
+ .name = "SGI O2 PCI MEM",
+ .start = MACEPCI_HI_MEMORY,
+ .end = 0x2FFFFFFFFUL,
+ .flags = IORESOURCE_MEM,
+};
+static struct resource mace_pci_io_resource = {
+ .name = "SGI O2 PCI IO",
+ .start = 0x00000000UL,
+ .end = 0xffffffffUL,
+ .flags = IORESOURCE_IO,
+};
+#define MACE_PCI_MEM_OFFSET 0x200000000
+#else
+static struct resource mace_pci_mem_resource = {
+ .name = "SGI O2 PCI MEM",
+ .start = MACEPCI_LOW_MEMORY,
+ .end = MACEPCI_LOW_MEMORY + 0x2000000 - 1,
+ .flags = IORESOURCE_MEM,
+};
+static struct resource mace_pci_io_resource = {
+ .name = "SGI O2 PCI IO",
+ .start = 0x00000000,
+ .end = 0xFFFFFFFF,
+ .flags = IORESOURCE_IO,
+};
+#define MACE_PCI_MEM_OFFSET (MACEPCI_LOW_MEMORY - 0x80000000)
+#endif
+static struct pci_controller mace_pci_controller = {
+ .pci_ops = &mace_pci_ops,
+ .mem_resource = &mace_pci_mem_resource,
+ .io_resource = &mace_pci_io_resource,
+ .iommu = 0,
+ .mem_offset = MACE_PCI_MEM_OFFSET,
+ .io_offset = 0,
+};
+
+static int __init mace_init(void)
{
+ PCIBIOS_MIN_IO = 0x1000;
+
+ /* Clear any outstanding errors and enable interrupts */
+ mace->pci.error_addr = 0;
+ mace->pci.error = 0;
+ mace->pci.control = 0xff008500;
+
+ printk("MACE PCI rev %d\n", mace->pci.rev);
+
+ BUG_ON(request_irq(MACE_PCI_BRIDGE_IRQ, macepci_error, 0,
+ "MACE PCI error", NULL));
+
+ ioport_resource.end = mace_pci_io_resource.end;
+ register_pci_controller(&mace_pci_controller);
+
return 0;
}
+
+arch_initcall(mace_init);
diff -puN /dev/null arch/mips/pci/pci-jmr3927.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/pci-jmr3927.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,58 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ahennessy@mvista.com
+ *
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/pci_channel.h>
+#include <asm/jmr3927/jmr3927.h>
+#include <asm/debug.h>
+
+struct resource pci_io_resource = {
+ "IO MEM",
+ 0x1000, /* reserve regacy I/O space */
+ 0x1000 + JMR3927_PCIIO_SIZE - 1,
+ IORESOURCE_IO
+};
+
+struct resource pci_mem_resource = {
+ "PCI MEM",
+ JMR3927_PCIMEM,
+ JMR3927_PCIMEM + JMR3927_PCIMEM_SIZE - 1,
+ IORESOURCE_MEM
+};
+
+extern struct pci_ops jmr3927_pci_ops;
+
+struct pci_controller jmr3927_controller = {
+ .pci_ops = &jmr3927_pci_ops,
+ .io_resource = &pci_io_resource,
+ .mem_resource = &pci_mem_resource,
+ .mem_offset = JMR3927_PCIMEM;
+};
diff -puN -L arch/mips/pci/pci-lasat.c arch/mips/pci/pci-lasat.c~mips-megapatch /dev/null
--- 25/arch/mips/pci/pci-lasat.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,242 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <asm/bootinfo.h>
-
-#include <asm/lasat/lasat.h>
-#include <asm/gt64120.h>
-#include <asm/nile4.h>
-
-#define PCI_ACCESS_READ 0
-#define PCI_ACCESS_WRITE 1
-
-#undef DEBUG_PCI
-#ifdef DEBUG_PCI
-#define Dprintk(fmt...) printk(fmt)
-#else
-#define Dprintk(fmt...)
-#endif
-
-static int (*lasat_pcibios_config_access) (unsigned char access_type,
- struct pci_bus * bus,
- unsigned int devfn, int where,
- u32 * val);
-
-/*
- * Because of an error/peculiarity in the Galileo chip, we need to swap the
- * bytes when running bigendian.
- */
-#define GT_WRITE(ofs, data) \
- *(volatile u32 *)(LASAT_GT_BASE+ofs) = cpu_to_le32(data)
-#define GT_READ(ofs, data) \
- data = le32_to_cpu(*(volatile u32 *)(LASAT_GT_BASE+ofs))
-
-
-static int lasat_pcibios_config_access_100(unsigned char access_type,
- struct pci_bus *bus,
- unsigned int devfn, int where,
- u32 * val)
-{
- unsigned char busnum = bus->number;
- u32 intr;
-
- if ((busnum == 0) && (devfn >= PCI_DEVFN(31, 0)))
- return -1; /* Because of a bug in the Galileo (for slot 31). */
-
- /* Clear cause register bits */
- GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
- GT_INTRCAUSE_TARABORT0_BIT));
-
- /* Setup address */
- GT_WRITE(GT_PCI0_CFGADDR_OFS,
- (busnum << GT_PCI0_CFGADDR_BUSNUM_SHF) |
- (devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
- ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
- GT_PCI0_CFGADDR_CONFIGEN_BIT);
-
- if (access_type == PCI_ACCESS_WRITE) {
- GT_WRITE(GT_PCI0_CFGDATA_OFS, *val);
- } else {
- GT_READ(GT_PCI0_CFGDATA_OFS, *val);
- }
-
- /* Check for master or target abort */
- GT_READ(GT_INTRCAUSE_OFS, intr);
-
- if (intr &
- (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT)) {
- /* Error occurred */
-
- /* Clear bits */
- GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
- GT_INTRCAUSE_TARABORT0_BIT));
-
- return -1;
- }
-
- return 0;
-}
-
-#define LO(reg) (reg / 4)
-#define HI(reg) (reg / 4 + 1)
-
-volatile unsigned long *const vrc_pciregs = (void *) Vrc5074_BASE;
-
-static int lasat_pcibios_config_access_200(unsigned char access_type,
- struct pci_bus *bus,
- unsigned int devfn, int where,
- u32 * val)
-{
- unsigned char busnum = bus->number;
- u32 adr, mask, err;
-
- if ((busnum == 0) && (PCI_SLOT(devfn) > 8))
- /* The addressing scheme chosen leaves room for just
- * 8 devices on the first busnum (besides the PCI
- * controller itself) */
- return -1;
-
- if ((busnum == 0) && (devfn == PCI_DEVFN(0, 0))) {
- /* Access controller registers directly */
- if (access_type == PCI_ACCESS_WRITE) {
- vrc_pciregs[(0x200 + where) >> 2] = *val;
- } else {
- *val = vrc_pciregs[(0x200 + where) >> 2];
- }
- return 0;
- }
-
- /* Temporarily map PCI Window 1 to config space */
- mask = vrc_pciregs[LO(NILE4_PCIINIT1)];
- vrc_pciregs[LO(NILE4_PCIINIT1)] =
- 0x0000001a | (busnum ? 0x200 : 0);
-
- /* Clear PCI Error register. This also clears the Error Type
- * bits in the Control register */
- vrc_pciregs[LO(NILE4_PCIERR)] = 0;
- vrc_pciregs[HI(NILE4_PCIERR)] = 0;
-
- /* Setup address */
- if (busnum == 0)
- adr =
- KSEG1ADDR(PCI_WINDOW1) +
- ((1 << (PCI_SLOT(devfn) + 15)) | (PCI_FUNC(devfn) << 8)
- | (where & ~3));
- else
- adr =
- KSEG1ADDR(PCI_WINDOW1) | (busnum << 16) | (devfn << 8)
- | (where & ~3);
-
-#ifdef DEBUG_PCI
- printk("PCI config %s: adr %x",
- access_type == PCI_ACCESS_WRITE ? "write" : "read", adr);
-#endif
-
- if (access_type == PCI_ACCESS_WRITE) {
- *(u32 *) adr = *val;
- } else {
- *val = *(u32 *) adr;
- }
-
-#ifdef DEBUG_PCI
- printk(" value = %x\n", *val);
-#endif
-
- /* Check for master or target abort */
- err = (vrc_pciregs[HI(NILE4_PCICTRL)] >> 5) & 0x7;
-
- /* Restore PCI Window 1 */
- vrc_pciregs[LO(NILE4_PCIINIT1)] = mask;
-
- if (err) {
- /* Error occured */
-#ifdef DEBUG_PCI
- printk("\terror %x at adr %x\n", err,
- vrc_pciregs[LO(NILE4_PCIERR)]);
-#endif
- return -1;
- }
-
- return 0;
-}
-
-static int lasat_pcibios_read(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 * val)
-{
- u32 data = 0;
-
- if ((size == 2) && (where & 1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- else if ((size == 4) && (where & 3))
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (lasat_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
- &data))
- return -1;
-
- if (size == 1)
- *val = (data >> ((where & 3) << 3)) & 0xff;
- else if (size == 2)
- *val = (data >> ((where & 3) << 3)) & 0xffff;
- else
- *val = data;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int lasat_pcibios_write(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 val)
-{
- u32 data = 0;
-
- if ((size == 2) && (where & 1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- else if ((size == 4) && (where & 3))
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (lasat_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
- &data))
- return -1;
-
- if (size == 1)
- data = (data & ~(0xff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- else if (size == 2)
- data = (data & ~(0xffff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- else
- data = val;
-
- if (lasat_pcibios_config_access
- (PCI_ACCESS_WRITE, bus, devfn, where, &data))
- return -1;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops lasat_pci_ops = {
- .read = lasat_pcibios_read,
- .write = lasat_pcibios_write,
-};
-
-static int __init pcibios_init(void)
-{
- switch (mips_machtype) {
- case MACH_LASAT_100:
- lasat_pcibios_config_access =
- &lasat_pcibios_config_access_100;
- break;
- case MACH_LASAT_200:
- lasat_pcibios_config_access =
- &lasat_pcibios_config_access_200;
- break;
- default:
- panic("pcibios_init: mips_machtype incorrect");
- }
-
- Dprintk("pcibios_init()\n");
- pci_scan_bus(0, &lasat_pci_ops, NULL);
- return 0;
-}
-
-subsys_initcall(pcibios_init);
diff -puN -L arch/mips/pci/pci-mips.c arch/mips/pci/pci-mips.c~mips-megapatch /dev/null
--- 25/arch/mips/pci/pci-mips.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,483 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * MIPS boards specific PCI support.
- *
- */
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/mips-boards/generic.h>
-#include <asm/gt64120.h>
-#include <asm/mips-boards/bonito64.h>
-#ifdef CONFIG_MIPS_MALTA
-#include <asm/mips-boards/malta.h>
-#endif
-#include <asm/mips-boards/msc01_pci.h>
-
-#define PCI_ACCESS_READ 0
-#define PCI_ACCESS_WRITE 1
-
-/*
- * PCI configuration cycle AD bus definition
- */
-/* Type 0 */
-#define PCI_CFG_TYPE0_REG_SHF 0
-#define PCI_CFG_TYPE0_FUNC_SHF 8
-
-/* Type 1 */
-#define PCI_CFG_TYPE1_REG_SHF 0
-#define PCI_CFG_TYPE1_FUNC_SHF 8
-#define PCI_CFG_TYPE1_DEV_SHF 11
-#define PCI_CFG_TYPE1_BUS_SHF 16
-
-static int mips_pcibios_config_access(unsigned char access_type,
- struct pci_bus *bus,
- unsigned int devfn, int where,
- u32 * data)
-{
- unsigned char busnum = bus->number;
- unsigned char type;
- u32 intr, dummy;
- u64 pci_addr;
-
- switch (mips_revision_corid) {
- case MIPS_REVISION_CORID_QED_RM5261:
- case MIPS_REVISION_CORID_CORE_LV:
- case MIPS_REVISION_CORID_CORE_FPGA:
- /* Galileo GT64120 system controller. */
-
- if ((busnum == 0) && (devfn >= PCI_DEVFN(31, 0)))
- return -1; /* Because of a bug in the galileo (for slot 31). */
-
- /* Clear cause register bits */
- GT_READ(GT_INTRCAUSE_OFS, intr);
- GT_WRITE(GT_INTRCAUSE_OFS, intr &
- ~(GT_INTRCAUSE_MASABORT0_BIT |
- GT_INTRCAUSE_TARABORT0_BIT));
-
- /* Setup address */
- GT_WRITE(GT_PCI0_CFGADDR_OFS,
- (busnum << GT_PCI0_CFGADDR_BUSNUM_SHF) |
- (devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
- ((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
- GT_PCI0_CFGADDR_CONFIGEN_BIT);
-
- if (access_type == PCI_ACCESS_WRITE) {
- if (busnum == 0 && devfn == 0) {
- /*
- * The Galileo system controller is acting
- * differently than other devices.
- */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
- } else {
- GT_PCI_WRITE(GT_PCI0_CFGDATA_OFS, *data);
- }
- } else {
- if (busnum == 0 && devfn == 0) {
- /*
- * The Galileo system controller is acting
- * differently than other devices.
- */
- GT_READ(GT_PCI0_CFGDATA_OFS, *data);
- } else {
- GT_PCI_READ(GT_PCI0_CFGDATA_OFS, *data);
- }
- }
-
- /* Check for master or target abort */
- GT_READ(GT_INTRCAUSE_OFS, intr);
-
- if (intr & (GT_INTRCAUSE_MASABORT0_BIT |
- GT_INTRCAUSE_TARABORT0_BIT)) {
- /* Error occurred */
-
- /* Clear bits */
- GT_READ(GT_INTRCAUSE_OFS, intr);
- GT_WRITE(GT_INTRCAUSE_OFS, intr &
- ~(GT_INTRCAUSE_MASABORT0_BIT |
- GT_INTRCAUSE_TARABORT0_BIT));
-
- return -1;
- }
-
- break;
-
- case MIPS_REVISION_CORID_BONITO64:
- case MIPS_REVISION_CORID_CORE_20K:
- /* Algorithmics Bonito64 system controller. */
-
- if ((busnum == 0) && (PCI_SLOT(devfn) == 0)) {
- return -1;
- }
-
- /* Clear cause register bits */
- BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR |
- BONITO_PCICMD_MTABORT_CLR);
-
- /*
- * Setup pattern to be used as PCI "address" for
- * Type 0 cycle
- */
- if (busnum == 0) {
- /* IDSEL */
- pci_addr = (u64) 1 << (PCI_SLOT(devfn) + 10);
- } else {
- /* Bus number */
- pci_addr = busnum << PCI_CFG_TYPE1_BUS_SHF;
-
- /* Device number */
- pci_addr |=
- PCI_SLOT(devfn) << PCI_CFG_TYPE1_DEV_SHF;
- }
-
- /* Function (same for Type 0/1) */
- pci_addr |= PCI_FUNC(devfn) << PCI_CFG_TYPE0_FUNC_SHF;
-
- /* Register number (same for Type 0/1) */
- pci_addr |= (where & ~0x3) << PCI_CFG_TYPE0_REG_SHF;
-
- if (busnum == 0) {
- /* Type 0 */
- BONITO_PCIMAP_CFG = pci_addr >> 16;
- } else {
- /* Type 1 */
- BONITO_PCIMAP_CFG = (pci_addr >> 16) | 0x10000;
- }
-
- /* Flush Bonito register block */
- dummy = BONITO_PCIMAP_CFG;
- iob(); /* sync */
-
- /* Perform access */
- if (access_type == PCI_ACCESS_WRITE) {
- *(volatile u32 *) (KSEG1ADDR(BONITO_PCICFG_BASE +
- (pci_addr & 0xffff)))
- = *(u32 *) data;
-
- /* Wait till done */
- while (BONITO_PCIMSTAT & 0xF);
- } else {
- *(u32 *) data =
- *(volatile u32
- *) (KSEG1ADDR(BONITO_PCICFG_BASE +
- (pci_addr & 0xffff)));
- }
-
- /* Detect Master/Target abort */
- if (BONITO_PCICMD & (BONITO_PCICMD_MABORT_CLR |
- BONITO_PCICMD_MTABORT_CLR)) {
- /* Error occurred */
-
- /* Clear bits */
- BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR |
- BONITO_PCICMD_MTABORT_CLR);
-
- return -1;
- }
- break;
-
- case MIPS_REVISION_CORID_CORE_MSC:
- /* MIPS system controller. */
-
- if ((busnum == 0) && (PCI_SLOT(devfn) == 0)) {
- return -1;
- }
-
- /* Clear status register bits. */
- MSC_WRITE(MSC01_PCI_INTSTAT,
- (MSC01_PCI_INTCFG_MA_BIT |
- MSC01_PCI_INTCFG_TA_BIT));
-
- /* Setup address */
- if (busnum == 0)
- type = 0; /* Type 0 */
- else
- type = 1; /* Type 1 */
-
- MSC_WRITE(MSC01_PCI_CFGADDR,
- ((busnum << MSC01_PCI_CFGADDR_BNUM_SHF) |
- (PCI_SLOT(devfn) << MSC01_PCI_CFGADDR_DNUM_SHF)
- | (PCI_FUNC(devfn) <<
- MSC01_PCI_CFGADDR_FNUM_SHF) | ((where /
- 4) <<
- MSC01_PCI_CFGADDR_RNUM_SHF)
- | (type)));
-
- /* Perform access */
- if (access_type == PCI_ACCESS_WRITE) {
- MSC_WRITE(MSC01_PCI_CFGDATA, *data);
- } else {
- MSC_READ(MSC01_PCI_CFGDATA, *data);
- }
-
- /* Detect Master/Target abort */
- MSC_READ(MSC01_PCI_INTSTAT, intr);
- if (intr & (MSC01_PCI_INTCFG_MA_BIT |
- MSC01_PCI_INTCFG_TA_BIT)) {
- /* Error occurred */
-
- /* Clear bits */
- MSC_READ(MSC01_PCI_INTSTAT, intr);
- MSC_WRITE(MSC01_PCI_INTSTAT,
- (MSC01_PCI_INTCFG_MA_BIT |
- MSC01_PCI_INTCFG_TA_BIT));
-
- return -1;
- }
- break;
- default:
- printk
- ("Unknown Core card, don't know the system controller.\n");
- return -1;
- }
-
- return 0;
-}
-
-
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static int mips_pcibios_read(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 * val)
-{
- u32 data = 0;
-
- if ((size == 2) && (where & 1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- else if ((size == 4) && (where & 3))
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (mips_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
- &data))
- return -1;
-
- if (size == 1)
- *val = (data >> ((where & 3) << 3)) & 0xff;
- else if (size == 2)
- *val = (data >> ((where & 3) << 3)) & 0xffff;
- else
- *val = data;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int mips_pcibios_write(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 val)
-{
- u32 data = 0;
-
- if ((size == 2) && (where & 1))
- return PCIBIOS_BAD_REGISTER_NUMBER;
- else if ((size == 4) && (where & 3))
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- if (size == 4)
- data = val;
- else {
- if (mips_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
- where, &data))
- return -1;
-
- if (size == 1)
- data = (data & ~(0xff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- else if (size == 2)
- data = (data & ~(0xffff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- }
-
- if (mips_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where,
- &data))
- return -1;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops mips_pci_ops = {
- .read = mips_pcibios_read,
- .write = mips_pcibios_write
-};
-
-int mips_pcibios_iack(void)
-{
- int irq;
- u32 dummy;
-
- /*
- * Determine highest priority pending interrupt by performing
- * a PCI Interrupt Acknowledge cycle.
- */
- switch (mips_revision_corid) {
- case MIPS_REVISION_CORID_QED_RM5261:
- case MIPS_REVISION_CORID_CORE_LV:
- case MIPS_REVISION_CORID_CORE_FPGA:
- case MIPS_REVISION_CORID_CORE_MSC:
- if (mips_revision_corid == MIPS_REVISION_CORID_CORE_MSC)
- MSC_READ(MSC01_PCI_IACK, irq);
- else
- GT_READ(GT_PCI0_IACK_OFS, irq);
- irq &= 0xff;
- break;
- case MIPS_REVISION_CORID_BONITO64:
- case MIPS_REVISION_CORID_CORE_20K:
- /* The following will generate a PCI IACK cycle on the
- * Bonito controller. It's a little bit kludgy, but it
- * was the easiest way to implement it in hardware at
- * the given time.
- */
- BONITO_PCIMAP_CFG = 0x20000;
-
- /* Flush Bonito register block */
- dummy = BONITO_PCIMAP_CFG;
- iob(); /* sync */
-
- irq = *(volatile u32 *) (KSEG1ADDR(BONITO_PCICFG_BASE));
- iob(); /* sync */
- irq &= 0xff;
- BONITO_PCIMAP_CFG = 0;
- break;
- default:
- printk
- ("Unknown Core card, don't know the system controller.\n");
- return -1;
- }
- return irq;
-}
-
-static int __init pcibios_init(void)
-{
-#ifdef CONFIG_MIPS_MALTA
- struct pci_dev *pdev = NULL;
- unsigned char reg_val;
-#endif
-
- printk("PCI: Probing PCI hardware on host bus 0.\n");
- pci_scan_bus(0, &mips_pci_ops, NULL);
-
- switch (mips_revision_corid) {
- case MIPS_REVISION_CORID_QED_RM5261:
- case MIPS_REVISION_CORID_CORE_LV:
- case MIPS_REVISION_CORID_CORE_FPGA:
- /*
- * Due to a bug in the Galileo system controller, we need
- * to setup the PCI BAR for the Galileo internal registers.
- * This should be done in the bios/bootprom and will be
- * fixed in a later revision of YAMON (the MIPS boards
- * boot prom).
- */
- GT_WRITE(GT_PCI0_CFGADDR_OFS, (0 << GT_PCI0_CFGADDR_BUSNUM_SHF) | /* Local bus */
- (0 << GT_PCI0_CFGADDR_DEVNUM_SHF) | /* GT64120 dev */
- (0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) | /* Function 0 */
- ((0x20 / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) | /* BAR 4 */
- GT_PCI0_CFGADDR_CONFIGEN_BIT);
-
- /* Perform the write */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, PHYSADDR(MIPS_GT_BASE));
- break;
- }
-
-#ifdef CONFIG_MIPS_MALTA
- while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev)) != NULL) {
- if ((pdev->vendor == PCI_VENDOR_ID_INTEL)
- && (pdev->device == PCI_DEVICE_ID_INTEL_82371AB)
- && (PCI_SLOT(pdev->devfn) == 0x0a)) {
- /*
- * IDE Decode enable.
- */
- pci_read_config_byte(pdev, 0x41, ®_val);
- pci_write_config_byte(pdev, 0x41, reg_val | 0x80);
- pci_read_config_byte(pdev, 0x43, ®_val);
- pci_write_config_byte(pdev, 0x43, reg_val | 0x80);
- }
-
- if ((pdev->vendor == PCI_VENDOR_ID_INTEL)
- && (pdev->device == PCI_DEVICE_ID_INTEL_82371AB_0)
- && (PCI_SLOT(pdev->devfn) == 0x0a)) {
- /*
- * Set top of main memory accessible by ISA or DMA
- * devices to 16 Mb.
- */
- pci_read_config_byte(pdev, 0x69, ®_val);
- pci_write_config_byte(pdev, 0x69, reg_val | 0xf0);
- }
- }
-
- /*
- * Activate Floppy Controller in the SMSC FDC37M817 Super I/O
- * Controller.
- * This should be done in the bios/bootprom and will be fixed in
- * a later revision of YAMON (the MIPS boards boot prom).
- */
- /* Entering config state. */
- SMSC_WRITE(SMSC_CONFIG_ENTER, SMSC_CONFIG_REG);
-
- /* Activate floppy controller. */
- SMSC_WRITE(SMSC_CONFIG_DEVNUM, SMSC_CONFIG_REG);
- SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY, SMSC_DATA_REG);
- SMSC_WRITE(SMSC_CONFIG_ACTIVATE, SMSC_CONFIG_REG);
- SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE, SMSC_DATA_REG);
-
- /* Exit config state. */
- SMSC_WRITE(SMSC_CONFIG_EXIT, SMSC_CONFIG_REG);
-#endif
-
- return 0;
-}
-
-subsys_initcall(pcibios_init);
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- /* Not needed, since we enable all devices at startup. */
- return 0;
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
-}
-
-char *__init pcibios_setup(char *str)
-{
- /* Nothing to do for now. */
-
- return str;
-}
-
-struct pci_fixup pcibios_fixups[] = {
- {0}
-};
-
-/*
- * Called after each bus is probed, but before its children
- * are examined.
- */
-void __devinit pcibios_fixup_bus(struct pci_bus *b)
-{
- pci_read_bridge_bases(b);
-}
-
-unsigned int pcibios_assign_all_busses(void)
-{
- return 1;
-}
diff -puN /dev/null arch/mips/pci/pci-ocelot.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pci/pci-ocelot.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,107 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Galileo Evaluation Boards PCI support.
+ *
+ * The general-purpose functions to read/write and configure the GT64120A's
+ * PCI registers (function names start with pci0 or pci1) are either direct
+ * copies of functions written by Galileo Technology, or are modifications
+ * of their functions to work with Linux 2.4 vs Linux 2.2. These functions
+ * are Copyright - Galileo Technology.
+ *
+ * Other functions are derived from other MIPS PCI implementations, or were
+ * written by RidgeRun, Inc, Copyright (C) 2000 RidgeRun, Inc.
+ * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/cache.h>
+#include <asm/pci.h>
+#include <asm/io.h>
+#include <asm/gt64120.h>
+
+static inline unsigned int pci0ReadConfigReg(unsigned int offset)
+{
+ unsigned int DataForRegCf8;
+ unsigned int data;
+
+ DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
+ (PCI_FUNC(device->devfn) << 8) |
+ (offset & ~0x3)) | 0x80000000;
+ GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
+ GT_READ(GT_PCI0_CFGDATA_OFS, &data);
+
+ return data;
+}
+
+static inline void pci0WriteConfigReg(unsigned int offset, unsigned int data)
+{
+ unsigned int DataForRegCf8;
+
+ DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
+ (PCI_FUNC(device->devfn) << 8) |
+ (offset & ~0x3)) | 0x80000000;
+ GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
+ GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
+}
+
+static struct resource ocelot_mem_resource = {
+ iomem_resource.start = GT_PCI_MEM_BASE;
+ iomem_resource.end = GT_PCI_MEM_BASE + GT_PCI_MEM_BASE - 1;
+};
+
+static struct resource ocelot_io_resource = {
+ ioport_resource.start = GT_PCI_IO_BASE;
+ ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
+};
+
+static struct pci_controller ocelot_pci_controller = {
+ .pci_ops = gt64120_pci_ops;
+ .mem_resource = &ocelot_mem_resource;
+ .io_resource = &ocelot_io_resource;
+};
+
+static int __init ocelot_pcibios_init(void)
+{
+ u32 tmp;
+
+ GT_READ(GT_PCI0_CMD_OFS, &tmp);
+ GT_READ(GT_PCI0_BARE_OFS, &tmp);
+
+ /*
+ * You have to enable bus mastering to configure any other
+ * card on the bus.
+ */
+ tmp = pci0ReadConfigReg(PCI_COMMAND);
+ tmp |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
+ pci0WriteConfigReg(PCI_COMMAND, tmp);
+
+ register_pci_controller(&ocelot_pci_controller);
+}
+
+arch_initcall(ocelot_pcibios_init);
diff -puN arch/mips/pci/pci-ocelot-c.c~mips-megapatch arch/mips/pci/pci-ocelot-c.c
--- 25/arch/mips/pci/pci-ocelot-c.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci-ocelot-c.c 2004-02-19 12:53:02.000000000 -0800
@@ -26,7 +26,6 @@
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/slab.h>
-#include <linux/version.h>
#include <asm/pci.h>
#include <asm/io.h>
#include <asm/mv64340.h>
@@ -38,388 +37,8 @@
* devices.
*/
-#define MAX_PCI_DEVS 10
-
void mv64340_board_pcibios_fixup_bus(struct pci_bus *c);
-/* Functions to implement "pci ops" */
-static int marvell_pcibios_read_config_word(struct pci_dev *dev,
- int offset, u16 * val);
-static int marvell_pcibios_read_config_byte(struct pci_dev *dev,
- int offset, u8 * val);
-static int marvell_pcibios_read_config_dword(struct pci_dev *dev,
- int offset, u32 * val);
-static int marvell_pcibios_write_config_byte(struct pci_dev *dev,
- int offset, u8 val);
-static int marvell_pcibios_write_config_word(struct pci_dev *dev,
- int offset, u16 val);
-static int marvell_pcibios_write_config_dword(struct pci_dev *dev,
- int offset, u32 val);
-static void marvell_pcibios_set_master(struct pci_dev *dev);
-
-/*
- * General-purpose PCI functions.
- */
-
-
-/*
- * pci_range_ck -
- *
- * Check if the pci device that are trying to access does really exists
- * on the evaluation board.
- *
- * Inputs :
- * bus - bus number (0 for PCI 0 ; 1 for PCI 1)
- * dev - number of device on the specific pci bus
- *
- * Outpus :
- * 0 - if OK , 1 - if failure
- */
-static __inline__ int pci_range_ck(unsigned char bus, unsigned char dev)
-{
- /* Accessing device 31 crashes the MV-64340. */
- if (dev < 5)
- return 0;
- return -1;
-}
-
-/*
- * marvell_pcibios_(read/write)_config_(dword/word/byte) -
- *
- * reads/write a dword/word/byte register from the configuration space
- * of a device.
- *
- * Note that bus 0 and bus 1 are local, and we assume all other busses are
- * bridged from bus 1. This is a safe assumption, since any other
- * configuration will require major modifications to the CP7000G
- *
- * Inputs :
- * bus - bus number
- * dev - device number
- * offset - register offset in the configuration space
- * val - value to be written / read
- *
- * Outputs :
- * PCIBIOS_SUCCESSFUL when operation was succesfull
- * PCIBIOS_DEVICE_NOT_FOUND when the bus or dev is errorneous
- * PCIBIOS_BAD_REGISTER_NUMBER when accessing non aligned
- */
-
-static int marvell_pcibios_read_config_dword(struct pci_dev *device,
- int offset, u32 * val)
-{
- int dev, bus, func;
- uint32_t address_reg, data_reg;
- uint32_t address;
-
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
- func = PCI_FUNC(device->devfn);
-
- /* verify the range */
- if (pci_range_ck(bus, dev))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- /* select the MV-64340 registers to communicate with the PCI bus */
- if (bus == 0) {
- address_reg = MV64340_PCI_0_CONFIG_ADDR;
- data_reg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG;
- } else {
- address_reg = MV64340_PCI_1_CONFIG_ADDR;
- data_reg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG;
- }
-
- address = (bus << 16) | (dev << 11) | (func << 8) |
- (offset & 0xfc) | 0x80000000;
-
- /* start the configuration cycle */
- MV_WRITE(address_reg, address);
-
- /* read the data */
- MV_READ(data_reg, val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-
-static int marvell_pcibios_read_config_word(struct pci_dev *device,
- int offset, u16 * val)
-{
- int dev, bus, func;
- uint32_t address_reg, data_reg;
- uint32_t address;
-
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
- func = PCI_FUNC(device->devfn);
-
- /* verify the range */
- if (pci_range_ck(bus, dev))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- /* select the MV-64340 registers to communicate with the PCI bus */
- if (bus == 0) {
- address_reg = MV64340_PCI_0_CONFIG_ADDR;
- data_reg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG;
- } else {
- address_reg = MV64340_PCI_1_CONFIG_ADDR;
- data_reg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG;
- }
-
- address = (bus << 16) | (dev << 11) | (func << 8) |
- (offset & 0xfc) | 0x80000000;
-
- /* start the configuration cycle */
- MV_WRITE(address_reg, address);
-
- /* read the data */
- MV_READ_16(data_reg + (offset & 0x3), val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int marvell_pcibios_read_config_byte(struct pci_dev *device,
- int offset, u8 * val)
-{
- int dev, bus, func;
- uint32_t address_reg, data_reg;
- uint32_t address;
-
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
- func = PCI_FUNC(device->devfn);
-
- /* verify the range */
- if (pci_range_ck(bus, dev))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- /* select the MV-64340 registers to communicate with the PCI bus */
- if (bus == 0) {
- address_reg = MV64340_PCI_0_CONFIG_ADDR;
- data_reg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG;
- } else {
- address_reg = MV64340_PCI_1_CONFIG_ADDR;
- data_reg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG;
- }
-
- address = (bus << 16) | (dev << 11) | (func << 8) |
- (offset & 0xfc) | 0x80000000;
-
- /* start the configuration cycle */
- MV_WRITE(address_reg, address);
-
- /* write the data */
- MV_READ_8(data_reg + (offset & 0x3), val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int marvell_pcibios_write_config_dword(struct pci_dev *device,
- int offset, u32 val)
-{
- int dev, bus, func;
- uint32_t address_reg, data_reg;
- uint32_t address;
-
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
- func = PCI_FUNC(device->devfn);
-
- /* verify the range */
- if (pci_range_ck(bus, dev))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- /* select the MV-64340 registers to communicate with the PCI bus */
- if (bus == 0) {
- address_reg = MV64340_PCI_0_CONFIG_ADDR;
- data_reg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG;
- } else {
- address_reg = MV64340_PCI_1_CONFIG_ADDR;
- data_reg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG;
- }
-
- address = (bus << 16) | (dev << 11) | (func << 8) |
- (offset & 0xfc) | 0x80000000;
-
- /* start the configuration cycle */
- MV_WRITE(address_reg, address);
-
- /* write the data */
- MV_WRITE(data_reg, val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-
-static int marvell_pcibios_write_config_word(struct pci_dev *device,
- int offset, u16 val)
-{
- int dev, bus, func;
- uint32_t address_reg, data_reg;
- uint32_t address;
-
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
- func = PCI_FUNC(device->devfn);
-
- /* verify the range */
- if (pci_range_ck(bus, dev))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- /* select the MV-64340 registers to communicate with the PCI bus */
- if (bus == 0) {
- address_reg = MV64340_PCI_0_CONFIG_ADDR;
- data_reg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG;
- } else {
- address_reg = MV64340_PCI_1_CONFIG_ADDR;
- data_reg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG;
- }
-
- address = (bus << 16) | (dev << 11) | (func << 8) |
- (offset & 0xfc) | 0x80000000;
-
- /* start the configuration cycle */
- MV_WRITE(address_reg, address);
-
- /* write the data */
- MV_WRITE_16(data_reg + (offset & 0x3), val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int marvell_pcibios_write_config_byte(struct pci_dev *device,
- int offset, u8 val)
-{
- int dev, bus, func;
- uint32_t address_reg, data_reg;
- uint32_t address;
-
- bus = device->bus->number;
- dev = PCI_SLOT(device->devfn);
- func = PCI_FUNC(device->devfn);
-
- /* verify the range */
- if (pci_range_ck(bus, dev))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- /* select the MV-64340 registers to communicate with the PCI bus */
- if (bus == 0) {
- address_reg = MV64340_PCI_0_CONFIG_ADDR;
- data_reg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG;
- } else {
- address_reg = MV64340_PCI_1_CONFIG_ADDR;
- data_reg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG;
- }
-
- address = (bus << 16) | (dev << 11) | (func << 8) |
- (offset & 0xfc) | 0x80000000;
-
- /* start the configuration cycle */
- MV_WRITE(address_reg, address);
-
- /* write the data */
- MV_WRITE_8(data_reg + (offset & 0x3), val);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static void marvell_pcibios_set_master(struct pci_dev *dev)
-{
- u16 cmd;
-
- marvell_pcibios_read_config_word(dev, PCI_COMMAND, &cmd);
- cmd |= PCI_COMMAND_MASTER;
- marvell_pcibios_write_config_word(dev, PCI_COMMAND, cmd);
-}
-
-/* Externally-expected functions. Do not change function names */
-
-int pcibios_enable_resources(struct pci_dev *dev)
-{
- u16 cmd, old_cmd;
- u8 tmp1;
- int idx;
- struct resource *r;
-
- marvell_pcibios_read_config_word(dev, PCI_COMMAND, &cmd);
- old_cmd = cmd;
- for (idx = 0; idx < 6; idx++) {
- r = &dev->resource[idx];
- if (!r->start && r->end) {
- printk(KERN_ERR
- "PCI: Device %s not available because of "
- "resource collisions\n", pci_name(dev));
- return -EINVAL;
- }
- if (r->flags & IORESOURCE_IO)
- cmd |= PCI_COMMAND_IO;
- if (r->flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
- if (cmd != old_cmd) {
- marvell_pcibios_write_config_word(dev, PCI_COMMAND, cmd);
- }
-
- /*
- * Let's fix up the latency timer and cache line size here. Cache
- * line size = 32 bytes / sizeof dword (4) = 8.
- * Latency timer must be > 8. 32 is random but appears to work.
- */
- marvell_pcibios_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &tmp1);
- if (tmp1 != 8) {
- printk(KERN_WARNING
- "PCI setting cache line size to 8 from " "%d\n",
- tmp1);
- marvell_pcibios_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
- 8);
- }
- marvell_pcibios_read_config_byte(dev, PCI_LATENCY_TIMER, &tmp1);
- if (tmp1 < 32) {
- printk(KERN_WARNING
- "PCI setting latency timer to 32 from %d\n", tmp1);
- marvell_pcibios_write_config_byte(dev, PCI_LATENCY_TIMER,
- 32);
- }
-
- return 0;
-}
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- return pcibios_enable_resources(dev);
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size)
-{
- struct pci_dev *dev = data;
-
- if (res->flags & IORESOURCE_IO) {
- unsigned long start = res->start;
-
- /* We need to avoid collisions with `mirrored' VGA ports
- and other strange ISA hardware, so we always want the
- addresses kilobyte aligned. */
- if (size > 0x100) {
- printk(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%ld bytes)\n", pci_name(dev),
- dev->resource - res, size);
- }
-
- start = (start + 1024 - 1) & ~(1024 - 1);
- res->start = start;
- }
-}
-
-struct pci_ops marvell_pci_ops = {
- marvell_pcibios_read_config_byte,
- marvell_pcibios_read_config_word,
- marvell_pcibios_read_config_dword,
- marvell_pcibios_write_config_byte,
- marvell_pcibios_write_config_word,
- marvell_pcibios_write_config_dword
-};
-
struct pci_fixup pcibios_fixups[] = {
{0}
};
@@ -437,22 +56,6 @@ void __init pcibios_init(void)
iomem_resource.start = 0xc0000000;
iomem_resource.end = 0xc0000000 + 0x20000000 - 1;
- pci_scan_bus(0, &marvell_pci_ops, NULL);
- pci_scan_bus(1, &marvell_pci_ops, NULL);
-}
-
-/*
- * for parsing "pci=" kernel boot arguments.
- */
-char *pcibios_setup(char *str)
-{
- printk(KERN_INFO "rr: pcibios_setup\n");
- /* Nothing to do for now. */
-
- return str;
-}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 1;
+ pci_scan_bus(0, &mv64340_bus0_pci_ops, NULL);
+ pci_scan_bus(1, &mv64340_bus1_pci_ops, NULL);
}
diff -puN arch/mips/pci/pci-ocelot-g.c~mips-megapatch arch/mips/pci/pci-ocelot-g.c
--- 25/arch/mips/pci/pci-ocelot-g.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci-ocelot-g.c 2004-02-19 12:53:02.000000000 -0800
@@ -26,7 +26,6 @@
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/slab.h>
-#include <linux/version.h>
#include <asm/pci.h>
#include <asm/io.h>
#include "gt64240.h"
@@ -41,8 +40,6 @@
* devices.
*/
-#define MAX_PCI_DEVS 10
-
void gt64240_board_pcibios_fixup_bus(struct pci_bus *c);
/* Functions to implement "pci ops" */
@@ -58,9 +55,6 @@ static int galileo_pcibios_write_config_
int offset, u16 val);
static int galileo_pcibios_write_config_dword(int bus, int devfn,
int offset, u32 val);
-#if 0
-static void galileo_pcibios_set_master(struct pci_dev *dev);
-#endif
static int pci_read(struct pci_bus *bus, unsigned int devfs, int where,
int size, u32 * val);
@@ -343,96 +337,6 @@ static int galileo_pcibios_write_config_
return PCIBIOS_SUCCESSFUL;
}
-#if 0
-static void galileo_pcibios_set_master(struct pci_dev *dev)
-{
- u16 cmd;
-
- galileo_pcibios_read_config_word(dev, PCI_COMMAND, &cmd);
- cmd |= PCI_COMMAND_MASTER;
- galileo_pcibios_write_config_word(dev, PCI_COMMAND, cmd);
-}
-#endif
-
-/* Externally-expected functions. Do not change function names */
-
-int pcibios_enable_resources(struct pci_dev *dev)
-{
- u16 cmd, old_cmd;
- u8 tmp1;
- int idx;
- struct resource *r;
-
- pci_read(dev->bus, dev->devfn, PCI_COMMAND, 2, (u32 *) & cmd);
- old_cmd = cmd;
- for (idx = 0; idx < 6; idx++) {
- r = &dev->resource[idx];
- if (!r->start && r->end) {
- printk(KERN_ERR
- "PCI: Device %s not available because of "
- "resource collisions\n", pci_name(dev));
- return -EINVAL;
- }
- if (r->flags & IORESOURCE_IO)
- cmd |= PCI_COMMAND_IO;
- if (r->flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
- if (cmd != old_cmd) {
- pci_write(dev->bus, dev->devfn, PCI_COMMAND, 2, cmd);
- }
-
- /*
- * Let's fix up the latency timer and cache line size here. Cache
- * line size = 32 bytes / sizeof dword (4) = 8.
- * Latency timer must be > 8. 32 is random but appears to work.
- */
- pci_read(dev->bus, dev->devfn, PCI_CACHE_LINE_SIZE, 1,
- (u32 *) & tmp1);
- if (tmp1 != 8) {
- printk(KERN_WARNING
- "PCI setting cache line size to 8 from " "%d\n",
- tmp1);
- pci_write(dev->bus, dev->devfn, PCI_CACHE_LINE_SIZE, 1, 8);
- }
- pci_read(dev->bus, dev->devfn, PCI_LATENCY_TIMER, 1,
- (u32 *) & tmp1);
- if (tmp1 < 32) {
- printk(KERN_WARNING
- "PCI setting latency timer to 32 from %d\n", tmp1);
- pci_write(dev->bus, dev->devfn, PCI_LATENCY_TIMER, 1, 32);
- }
-
- return 0;
-}
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- return pcibios_enable_resources(dev);
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
- struct pci_dev *dev = data;
-
- if (res->flags & IORESOURCE_IO) {
- unsigned long start = res->start;
-
- /* We need to avoid collisions with `mirrored' VGA ports
- and other strange ISA hardware, so we always want the
- addresses kilobyte aligned. */
- if (size > 0x100) {
- printk(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%ld bytes)\n", pci_name(dev),
- dev->resource - res, size);
- }
-
- start = (start + 1024 - 1) & ~(1024 - 1);
- res->start = start;
- }
-}
-
struct pci_ops galileo_pci_ops = {
.read = pci_read,
.write = pci_write
@@ -554,19 +458,3 @@ static int __init pcibios_init(void)
}
subsys_initcall(pcibios_init);
-
-/*
- * for parsing "pci=" kernel boot arguments.
- */
-char *pcibios_setup(char *str)
-{
- printk(KERN_INFO "rr: pcibios_setup\n");
- /* Nothing to do for now. */
-
- return str;
-}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 1;
-}
diff -puN arch/mips/pci/pci-sb1250.c~mips-megapatch arch/mips/pci/pci-sb1250.c
--- 25/arch/mips/pci/pci-sb1250.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci-sb1250.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2001,2002 Broadcom Corporation
+ * Copyright (C) 2001,2002,2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -37,10 +37,13 @@
#include <linux/mm.h>
#include <linux/console.h>
+#include <asm/io.h>
+#include <asm/pci_channel.h>
+
#include <asm/sibyte/sb1250_defs.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_scd.h>
-#include <asm/io.h>
+#include <asm/sibyte/board.h>
/*
* Macros for calculating offsets into config space given a device
@@ -158,6 +161,8 @@ static int sb1250_pcibios_write(struct p
else if (size == 2)
data = (data & ~(0xffff << ((where & 3) << 3))) |
(val << ((where & 3) << 3));
+ else
+ data = val;
WRITECFG32(cfgaddr, data);
@@ -169,8 +174,27 @@ struct pci_ops sb1250_pci_ops = {
.write = sb1250_pcibios_write
};
+static struct resource sb1250_mem_resource = {
+ .name = "SB1250 PCI MEM",
+ .start = 0x14000000UL,
+ .end = 0x17ffffffUL,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct resource sb1250_io_resource = {
+ .name = "SB1250 IO MEM",
+ .start = 0x14000000UL,
+ .end = 0x17ffffffUL,
+ .flags = IORESOURCE_IO,
+};
+
+struct pci_controller sb1250_controller = {
+ .pci_ops = &sb1250_pci_ops,
+ .mem_resource = &sb1250_mem_resource,
+ .io_resource = &sb1250_io_resource
+};
-void __init pcibios_init(void)
+int __init pcibios_init(void) xxx This needs to be called somehow ...
{
uint32_t cmdreg;
uint64_t reg;
@@ -181,7 +205,7 @@ void __init pcibios_init(void)
/*
* See if the PCI bus has been configured by the firmware.
*/
- reg = *((volatile uint64_t *) KSEG1ADDR(A_SCD_SYSTEM_CFG));
+ reg = *((volatile uint64_t *) IOADDR(A_SCD_SYSTEM_CFG));
if (!(reg & M_SYS_PCI_HOST)) {
sb1250_bus_status |= PCI_DEVICE_MODE;
} else {
@@ -193,7 +217,7 @@ void __init pcibios_init(void)
printk
("PCI: Skipping PCI probe. Bus is not initialized.\n");
iounmap(cfg_space);
- return;
+ return 0;
}
sb1250_bus_status |= PCI_BUS_ENABLED;
}
@@ -234,48 +258,14 @@ void __init pcibios_init(void)
}
#endif
- /* Probe for PCI hardware */
-
- printk("PCI: Probing PCI hardware on host bus 0.\n");
- pci_scan_bus(0, &sb1250_pci_ops, NULL);
+ register_pci_controller(&sb1250_controller);
#ifdef CONFIG_VGA_CONSOLE
take_over_console(&vga_con, 0, MAX_NR_CONSOLES - 1, 1);
#endif
-}
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- /* Not needed, since we enable all devices at startup. */
return 0;
}
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
-}
-
-char *__init pcibios_setup(char *str)
-{
- /* Nothing to do for now. */
-
- return str;
-}
-
struct pci_fixup pcibios_fixups[] = {
{0}
};
-
-/*
- * Called after each bus is probed, but before its children
- * are examined.
- */
-void __devinit pcibios_fixup_bus(struct pci_bus *b)
-{
- pci_read_bridge_bases(b);
-}
-
-unsigned int pcibios_assign_all_busses(void)
-{
- return 1;
-}
diff -puN -L arch/mips/pci/pci-sni.c arch/mips/pci/pci-sni.c~mips-megapatch /dev/null
--- 25/arch/mips/pci/pci-sni.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,175 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SNI specific PCI support for RM200/RM300.
- *
- * Copyright (C) 1997 - 2000 Ralf Baechle
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/types.h>
-#include <asm/byteorder.h>
-#include <asm/sni.h>
-
-#define mkaddr(bus, devfn, where) \
-do { \
- if (bus->number == 0) \
- return -1; \
- *(volatile u32 *)PCIMT_CONFIG_ADDRESS = \
- ((bus->number & 0xff) << 0x10) | \
- ((devfn & 0xff) << 0x08) | \
- (where & 0xfc); \
-} while(0)
-
-#if 0
-/* To do: Bring this uptodate ... */
-static void pcimt_pcibios_fixup(void)
-{
- struct pci_dev *dev = NULL;
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- /*
- * TODO: Take care of RM300 revision D boards for where the
- * network slot became an ordinary PCI slot.
- */
- if (dev->devfn == PCI_DEVFN(1, 0)) {
- /* Evil hack ... */
- set_cp0_config(CONF_CM_CMASK,
- CONF_CM_CACHABLE_NO_WA);
- dev->irq = PCIMT_IRQ_SCSI;
- continue;
- }
- if (dev->devfn == PCI_DEVFN(2, 0)) {
- dev->irq = PCIMT_IRQ_ETHERNET;
- continue;
- }
-
- switch (dev->irq) {
- case 1...4:
- dev->irq += PCIMT_IRQ_INTA - 1;
- break;
- case 0:
- break;
- default:
- printk("PCI device on bus %d, dev %d, function %d "
- "impossible interrupt configured.\n",
- dev->bus->number, PCI_SLOT(dev->devfn),
- PCI_SLOT(dev->devfn));
- }
- }
-}
-#endif
-
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 * val)
-{
- u32 res;
-
- switch (size) {
- case 1:
- mkaddr(bus, devfn, where);
- res = *(volatile u32 *) PCIMT_CONFIG_DATA;
- res = (le32_to_cpu(res) >> ((where & 3) << 3)) & 0xff;
- *val = (u8) res;
- break;
- case 2:
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mkaddr(bus, devfn, where);
- res = *(volatile u32 *) PCIMT_CONFIG_DATA;
- res = (le32_to_cpu(res) >> ((where & 3) << 3)) & 0xffff;
- *val = (u16) res;
- break;
- case 4:
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mkaddr(bus, devfn, where);
- res = *(volatile u32 *) PCIMT_CONFIG_DATA;
- res = le32_to_cpu(res);
- *val = res;
- break;
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 val)
-{
- switch (size) {
- case 1:
- mkaddr(bus, devfn, where);
- *(volatile u8 *) (PCIMT_CONFIG_DATA + (where & 3)) =
- (u8) le32_to_cpu(val);
- break;
- case 2:
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mkaddr(bus, devfn, where);
- *(volatile u16 *) (PCIMT_CONFIG_DATA + (where & 3)) =
- (u16) le32_to_cpu(val);
- break;
- case 4:
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- mkaddr(bus, devfn, where);
- *(volatile u32 *) PCIMT_CONFIG_DATA = le32_to_cpu(val);
- break;
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops sni_pci_ops = {
- .read = pcimt_read,
- .write = pcimt_write,
-};
-
-void __devinit pcibios_fixup_bus(struct pci_bus *b)
-{
-}
-
-static int __init pcibios_init(void)
-{
- struct pci_ops *ops = &sni_pci_ops;
-
- pci_scan_bus(0, ops, NULL);
-
- return 0;
-}
-
-subsys_initcall(pcibios_init);
-
-int __init pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- /* Not needed, since we enable all devices at startup. */
- return 0;
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
-{
-}
-
-unsigned __init int pcibios_assign_all_busses(void)
-{
- return 0;
-}
-
-char *__init pcibios_setup(char *str)
-{
- /* Nothing to do for now. */
-
- return str;
-}
-
-struct pci_fixup pcibios_fixups[] = {
- {0}
-};
diff -puN arch/mips/pci/pci-vr41xx.c~mips-megapatch arch/mips/pci/pci-vr41xx.c
--- 25/arch/mips/pci/pci-vr41xx.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci-vr41xx.c 2004-02-19 12:53:02.000000000 -0800
@@ -8,7 +8,7 @@
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
*
- * Copyright 2001,2002 MontaVista Software Inc.
+ * Copyright 2001-2003 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -49,9 +49,7 @@
#include <asm/pci_channel.h>
#include <asm/vr41xx/vr41xx.h>
-#include "pciu.h"
-
-extern unsigned long vr41xx_vtclock;
+#include "pci-vr41xx.h"
static inline int vr41xx_pci_config_access(unsigned char bus,
unsigned int devfn, int where)
@@ -150,6 +148,7 @@ struct pci_ops vr41xx_pci_ops = {
void __init vr41xx_pciu_init(struct vr41xx_pci_address_map *map)
{
struct vr41xx_pci_address_space *s;
+ unsigned long vtclock;
u32 config;
int n;
@@ -169,11 +168,12 @@ void __init vr41xx_pciu_init(struct vr41
udelay(1);
/* Select PCI clock */
- if (vr41xx_vtclock < MAX_PCI_CLOCK)
+ vtclock = vr41xx_get_vtclock_frequency();
+ if (vtclock < MAX_PCI_CLOCK)
writel(EQUAL_VTCLOCK, PCICLKSELREG);
- else if ((vr41xx_vtclock / 2) < MAX_PCI_CLOCK)
+ else if ((vtclock / 2) < MAX_PCI_CLOCK)
writel(HALF_VTCLOCK, PCICLKSELREG);
- else if ((vr41xx_vtclock / 4) < MAX_PCI_CLOCK)
+ else if ((vtclock / 4) < MAX_PCI_CLOCK)
writel(QUARTER_VTCLOCK, PCICLKSELREG);
else
printk(KERN_INFO "Warning: PCI Clock is over 33MHz.\n");
diff -puN arch/mips/pci/pci-vr41xx.h~mips-megapatch arch/mips/pci/pci-vr41xx.h
--- 25/arch/mips/pci/pci-vr41xx.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/pci/pci-vr41xx.h 2004-02-19 12:53:02.000000000 -0800
@@ -107,9 +107,6 @@
#define MAX_PCI_CLOCK 33333333
-#define PCIU_CLOCK 0x0080
-#define PCI_CLOCK 0x2000
-
static inline int pciu_read_config_byte(int where, u8 * val)
{
u32 data;
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,171 @@
+/*
+ * arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c
+ *
+ * Copyright (C) 2003 PMC-Sierra Inc.
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Description:
+ *
+ * This code reads the ATMEL 24CXX EEPROM. The PMC-Sierra Yosemite board uses the ATMEL
+ * 24C32/24C64 which uses two byte addressing as compared to 24C16. Note that this program
+ * uses the serial port like /dev/ttyS0, to communicate with the EEPROM. Hence, you are
+ * expected to have a connectivity from the EEPROM to the serial port. This program does
+ * __not__ communicate using the I2C protocol
+ */
+
+#include "atmel_read_eeprom.h"
+
+static void delay(int delay)
+{
+ while (delay--);
+}
+
+static void send_bit(unsigned char bit)
+{
+ scl_lo;
+ delay(TXX);
+ if (bit)
+ sda_hi;
+ else
+ sda_lo;
+
+ delay(TXX);
+ scl_hi;
+ delay(TXX);
+}
+
+static void send_ack(void)
+{
+ send_bit(0);
+}
+
+static void send_byte(unsigned char byte)
+{
+ int i = 0;
+
+ for (i = 7; i >= 0; i--)
+ send_bit((byte >> i) & 0x01);
+}
+
+static void send_start(void)
+{
+ sda_hi;
+ delay(TXX);
+ scl_hi;
+ delay(TXX);
+ sda_lo;
+ delay(TXX);
+}
+
+static void send_stop(void)
+{
+ sda_lo;
+ delay(TXX);
+ scl_hi;
+ delay(TXX);
+ sda_hi;
+ delay(TXX);
+}
+
+static void do_idle(void)
+{
+ sda_hi;
+ scl_hi;
+ vcc_off;
+}
+
+static int recv_bit(void)
+{
+ int status;
+
+ scl_lo;
+ delay(TXX);
+ sda_hi;
+ delay(TXX);
+ scl_hi;
+ delay(TXX);
+
+ return 1;
+}
+
+static unsigned char recv_byte(void) {
+ int i;
+ unsigned char byte=0;
+
+ for (i=7;i>=0;i--)
+ byte |= (recv_bit() << i);
+
+ return byte;
+}
+
+static int recv_ack(void)
+{
+ unsigned int ack;
+
+ ack = (unsigned int)recv_bit();
+ scl_lo;
+
+ if (ack) {
+ do_idle();
+ printk(KERN_ERR "Error reading the Atmel 24C32/24C64 EEPROM \n");
+ return -1;
+ }
+
+ return ack;
+}
+
+/*
+ * This function does the actual read of the EEPROM. It needs the buffer into which the
+ * read data is copied, the size of the EEPROM being read and the buffer size
+ */
+int read_eeprom(char *buffer, int eeprom_size, int size)
+{
+ int i = 0, err;
+
+ send_start();
+ send_byte(W_HEADER);
+ recv_ack();
+
+ /* EEPROM with size of more then 2K need two byte addressing */
+ if (eeprom_size > 2048) {
+ send_byte(0x00);
+ recv_ack();
+ }
+
+ send_start();
+ send_byte(R_HEADER);
+ err = recv_ack();
+ if (err == -1)
+ return err;
+
+ for (i = 0; i < size; i++) {
+ *buffer++ = recv_byte();
+ send_ack();
+ }
+
+ /* Note : We should do some check if the buffer contains correct information */
+
+ send_stop();
+}
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,69 @@
+/*
+ * arch/mips/pmc-sierra/yosemite/atmel_read_eeprom.c
+ *
+ * Copyright (C) 2003 PMC-Sierra Inc.
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Header file for atmel_read_eeprom.c
+ */
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/version.h>
+#include <asm/pci.h>
+#include <asm/io.h>
+#include <linux/init.h>
+#include <asm/termios.h>
+#include <asm/ioctls.h>
+#include <linux/ioctl.h>
+#include <linux/fcntl.h>
+
+#define DEFAULT_PORT "/dev/ttyS0" /* Port to open */
+#define TXX 0 /* Dummy loop for spinning */
+
+#define BLOCK_SEL 0x00
+#define SLAVE_ADDR 0xa0
+#define READ_BIT 0x01
+#define WRITE_BIT 0x00
+#define R_HEADER SLAVE_ADDR + BLOCK_SEL + READ_BIT
+#define W_HEADER SLAVE_ADDR + BLOCK_SEL + WRITE_BIT
+
+/*
+ * Clock, Voltages and Data
+ */
+#define vcc_off (ioctl(fd, TIOCSBRK, 0))
+#define vcc_on (ioctl(fd, TIOCCBRK, 0))
+#define sda_hi (ioctl(fd, TIOCMBIS, &dtr))
+#define sda_lo (ioctl(fd, TIOCMBIC, &dtr))
+#define scl_lo (ioctl(fd, TIOCMBIC, &rts))
+#define scl_hi (ioctl(fd, TIOCMBIS, &rts))
+
+const char rts = TIOCM_RTS;
+const char dtr = TIOCM_DTR;
+int fd;
+
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/ht.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/ht.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,459 @@
+/*
+ * Copyright 2003 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/version.h>
+#include <asm/pci.h>
+#include <asm/io.h>
+
+#include <linux/init.h>
+#include <asm/titan_dep.h>
+
+#ifdef CONFIG_HYPERTRANSPORT
+
+
+/*
+ * This function check if the Hypertransport Link Initialization completed. If
+ * it did, then proceed further with scanning bus #2
+ */
+static __inline__ int check_titan_htlink(void)
+{
+ u32 val;
+
+ val = *(volatile u_int32_t *)(RM9000x2_HTLINK_REG);
+ if (val & 0x00000020)
+ /* HT Link Initialization completed */
+ return 1;
+ else
+ return 0;
+}
+
+static int titan_ht_config_read_dword(struct pci_dev *device,
+ int offset, u32* val)
+{
+ int dev, bus, func;
+ uint32_t address_reg, data_reg;
+ uint32_t address;
+
+ bus = device->bus->number;
+ dev = PCI_SLOT(device->devfn);
+ func = PCI_FUNC(device->devfn);
+
+ /* XXX Need to change the Bus # */
+ if (bus > 2)
+ address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) |
+ 0x80000000 | 0x1;
+ else
+ address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000;
+
+ address_reg = RM9000x2_OCD_HTCFGA;
+ data_reg = RM9000x2_OCD_HTCFGD;
+
+ RM9K_WRITE(address_reg, address);
+ RM9K_READ(data_reg, val);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int titan_ht_config_read_word(struct pci_dev *device,
+ int offset, u16* val)
+{
+ int dev, bus, func;
+ uint32_t address_reg, data_reg;
+ uint32_t address;
+
+ bus = device->bus->number;
+ dev = PCI_SLOT(device->devfn);
+ func = PCI_FUNC(device->devfn);
+
+ /* XXX Need to change the Bus # */
+ if (bus > 2)
+ address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) |
+ 0x80000000 | 0x1;
+ else
+ address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000;
+
+ address_reg = RM9000x2_OCD_HTCFGA;
+ data_reg = RM9000x2_OCD_HTCFGD;
+
+ if ((offset & 0x3) == 0)
+ offset = 0x2;
+ else
+ offset = 0x0;
+
+ RM9K_WRITE(address_reg, address);
+ RM9K_READ_16(data_reg + offset, val);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+
+u32 longswap(unsigned long l)
+{
+ unsigned char b1,b2,b3,b4;
+
+ b1 = l&255;
+ b2 = (l>>8)&255;
+ b3 = (l>>16)&255;
+ b4 = (l>>24)&255;
+
+ return ((b1<<24) + (b2<<16) + (b3<<8) + b4);
+}
+
+
+static int titan_ht_config_read_byte(struct pci_dev *device,
+ int offset, u8* val)
+{
+ int dev, bus, func;
+ uint32_t address_reg, data_reg;
+ uint32_t address;
+ int offset1;
+
+ bus = device->bus->number;
+ dev = PCI_SLOT(device->devfn);
+ func = PCI_FUNC(device->devfn);
+
+ /* XXX Need to change the Bus # */
+ if (bus > 2)
+ address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) |
+ 0x80000000 | 0x1;
+ else
+ address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000;
+
+ address_reg = RM9000x2_OCD_HTCFGA;
+ data_reg = RM9000x2_OCD_HTCFGD;
+
+ RM9K_WRITE(address_reg, address);
+
+ if ((offset & 0x3) == 0) {
+ offset1 = 0x3;
+ }
+ if ((offset & 0x3) == 1) {
+ offset1 = 0x2;
+ }
+ if ((offset & 0x3) == 2) {
+ offset1 = 0x1;
+ }
+ if ((offset & 0x3) == 3) {
+ offset1 = 0x0;
+ }
+ RM9K_READ_8(data_reg + offset1, val);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int titan_ht_config_write_dword(struct pci_dev *device,
+ int offset, u8 val)
+{
+ int dev, bus, func;
+ uint32_t address_reg, data_reg;
+ uint32_t address;
+
+ bus = device->bus->number;
+ dev = PCI_SLOT(device->devfn);
+ func = PCI_FUNC(device->devfn);
+
+ /* XXX Need to change the Bus # */
+ if (bus > 2)
+ address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) |
+ 0x80000000 | 0x1;
+ else
+ address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000;
+
+ address_reg = RM9000x2_OCD_HTCFGA;
+ data_reg = RM9000x2_OCD_HTCFGD;
+
+ RM9K_WRITE(address_reg, address);
+ RM9K_WRITE(data_reg, val);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int titan_ht_config_write_word(struct pci_dev *device,
+ int offset, u8 val)
+{
+ int dev, bus, func;
+ uint32_t address_reg, data_reg;
+ uint32_t address;
+
+ bus = device->bus->number;
+ dev = PCI_SLOT(device->devfn);
+ func = PCI_FUNC(device->devfn);
+
+ /* XXX Need to change the Bus # */
+ if (bus > 2)
+ address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) |
+ 0x80000000 | 0x1;
+ else
+ address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000;
+
+ address_reg = RM9000x2_OCD_HTCFGA;
+ data_reg = RM9000x2_OCD_HTCFGD;
+
+ if ((offset & 0x3) == 0)
+ offset = 0x2;
+ else
+ offset = 0x0;
+
+ RM9K_WRITE(address_reg, address);
+ RM9K_WRITE_16(data_reg + offset, val);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int titan_ht_config_write_byte(struct pci_dev *device,
+ int offset, u8 val)
+{
+ int dev, bus, func;
+ uint32_t address_reg, data_reg;
+ uint32_t address;
+ int offset1;
+
+ bus = device->bus->number;
+ dev = PCI_SLOT(device->devfn);
+ func = PCI_FUNC(device->devfn);
+
+ /* XXX Need to change the Bus # */
+ if (bus > 2)
+ address = (bus << 16) | (dev << 11) | (func << 8) | (offset & 0xfc) |
+ 0x80000000 | 0x1;
+ else
+ address = (dev << 11) | (func << 8) | (offset & 0xfc) | 0x80000000;
+
+ address_reg = RM9000x2_OCD_HTCFGA;
+ data_reg = RM9000x2_OCD_HTCFGD;
+
+ RM9K_WRITE(address_reg, address);
+
+ if ((offset & 0x3) == 0) {
+ offset1 = 0x3;
+ }
+ if ((offset & 0x3) == 1) {
+ offset1 = 0x2;
+ }
+ if ((offset & 0x3) == 2) {
+ offset1 = 0x1;
+ }
+ if ((offset & 0x3) == 3) {
+ offset1 = 0x0;
+ }
+
+ RM9K_WRITE_8(data_reg + offset1, val);
+ return PCIBIOS_SUCCESSFUL;
+}
+
+
+static void titan_pcibios_set_master(struct pci_dev *dev)
+{
+ u16 cmd;
+ int bus = dev->bus->number;
+
+ if (check_titan_htlink())
+ titan_ht_config_read_word(dev, PCI_COMMAND, &cmd);
+
+ cmd |= PCI_COMMAND_MASTER;
+
+ if (check_titan_htlink())
+ titan_ht_config_write_word(dev, PCI_COMMAND, cmd);
+}
+
+
+int pcibios_enable_resources(struct pci_dev *dev)
+{
+ u16 cmd, old_cmd;
+ u8 tmp1;
+ int idx;
+ struct resource *r;
+ int bus = dev->bus->number;
+
+ if (check_titan_htlink())
+ titan_ht_config_read_word(dev, PCI_COMMAND, &cmd);
+
+ old_cmd = cmd;
+ for (idx = 0; idx < 6; idx++) {
+ r = &dev->resource[idx];
+ if (!r->start && r->end) {
+ printk(KERN_ERR
+ "PCI: Device %s not available because of "
+ "resource collisions\n", dev->slot_name);
+ return -EINVAL;
+ }
+ if (r->flags & IORESOURCE_IO)
+ cmd |= PCI_COMMAND_IO;
+ if (r->flags & IORESOURCE_MEM)
+ cmd |= PCI_COMMAND_MEMORY;
+ }
+ if (cmd != old_cmd) {
+ if (check_titan_htlink())
+ titan_ht_config_write_word(dev, PCI_COMMAND, cmd);
+ }
+
+ if (check_titan_htlink())
+ titan_ht_config_read_byte(dev, PCI_CACHE_LINE_SIZE, &tmp1);
+
+ if (tmp1 != 8) {
+ printk(KERN_WARNING "PCI setting cache line size to 8 from "
+ "%d\n", tmp1);
+ }
+
+ if (check_titan_htlink())
+ titan_ht_config_write_byte(dev, PCI_CACHE_LINE_SIZE, 8);
+
+ if (check_titan_htlink())
+ titan_ht_config_read_byte(dev, PCI_LATENCY_TIMER, &tmp1);
+
+ if (tmp1 < 32 || tmp1 == 0xff) {
+ printk(KERN_WARNING "PCI setting latency timer to 32 from %d\n",
+ tmp1);
+ }
+
+ if (check_titan_htlink())
+ titan_ht_config_write_byte(dev, PCI_LATENCY_TIMER, 32);
+
+ return 0;
+}
+
+
+int pcibios_enable_device(struct pci_dev *dev, int mask)
+{
+ return pcibios_enable_resources(dev);
+}
+
+
+
+void pcibios_update_resource(struct pci_dev *dev, struct resource *root,
+ struct resource *res, int resource)
+{
+ u32 new, check;
+ int reg;
+
+ return;
+
+ new = res->start | (res->flags & PCI_REGION_FLAG_MASK);
+ if (resource < 6) {
+ reg = PCI_BASE_ADDRESS_0 + 4 * resource;
+ } else if (resource == PCI_ROM_RESOURCE) {
+ res->flags |= PCI_ROM_ADDRESS_ENABLE;
+ reg = dev->rom_base_reg;
+ } else {
+ /*
+ * Somebody might have asked allocation of a non-standard
+ * resource
+ */
+ return;
+ }
+
+ pci_write_config_dword(dev, reg, new);
+ pci_read_config_dword(dev, reg, &check);
+ if ((new ^ check) &
+ ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK :
+ PCI_BASE_ADDRESS_MEM_MASK)) {
+ printk(KERN_ERR "PCI: Error while updating region "
+ "%s/%d (%08x != %08x)\n", dev->slot_name, resource,
+ new, check);
+ }
+}
+
+
+void pcibios_align_resource(void *data, struct resource *res,
+ unsigned long size, unsigned long align)
+{
+ struct pci_dev *dev = data;
+
+ if (res->flags & IORESOURCE_IO) {
+ unsigned long start = res->start;
+
+ /* We need to avoid collisions with `mirrored' VGA ports
+ and other strange ISA hardware, so we always want the
+ addresses kilobyte aligned. */
+ if (size > 0x100) {
+ printk(KERN_ERR "PCI: I/O Region %s/%d too large"
+ " (%ld bytes)\n", dev->slot_name,
+ dev->resource - res, size);
+ }
+
+ start = (start + 1024 - 1) & ~(1024 - 1);
+ res->start = start;
+ }
+}
+
+struct pci_ops titan_pci_ops = {
+ titan_ht_config_read_byte,
+ titan_ht_config_read_word,
+ titan_ht_config_read_dword,
+ titan_ht_config_write_byte,
+ titan_ht_config_write_word,
+ titan_ht_config_write_dword
+};
+
+
+struct pci_fixup pcibios_fixups[] = {
+ {0}
+};
+
+void __init pcibios_fixup_bus(struct pci_bus *c)
+{
+ titan_ht_pcibios_fixup_bus(c);
+}
+
+void __init pcibios_init(void)
+{
+
+ /* Reset PCI I/O and PCI MEM values */
+ /* XXX Need to add the proper values here */
+ ioport_resource.start = 0xe0000000;
+ ioport_resource.end = 0xe0000000 + 0x20000000 - 1;
+ iomem_resource.start = 0xc0000000;
+ iomem_resource.end = 0xc0000000 + 0x20000000 - 1;
+
+ /* XXX Need to add bus values */
+ pci_scan_bus(2, &titan_pci_ops, NULL);
+ pci_scan_bus(3, &titan_pci_ops, NULL);
+}
+
+/*
+ * for parsing "pci=" kernel boot arguments.
+ */
+char *pcibios_setup(char *str)
+{
+ printk(KERN_INFO "rr: pcibios_setup\n");
+ /* Nothing to do for now. */
+
+ return str;
+}
+
+unsigned __init int pcibios_assign_all_busses(void)
+{
+ /* We want to use the PCI bus detection done by PMON */
+ return 0;
+}
+
+#endif /* CONFIG_HYPERTRANSPORT */
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/ht-irq.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/ht-irq.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,53 @@
+/*
+ * Copyright 2003 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/version.h>
+#include <linux/init.h>
+#include <asm/pci.h>
+
+/*
+ * HT Bus fixup for the Titan
+ * XXX IRQ values need to change based on the board layout
+ */
+void __init titan_ht_pcibios_fixup_bus(struct pci_bus *bus)
+{
+ struct pci_bus *current_bus = bus;
+ struct pci_dev *devices;
+ struct list_head *devices_link;
+
+ list_for_each(devices_link, &(current_bus->devices)) {
+ devices = pci_dev_b(devices_link);
+ if (devices == NULL)
+ continue;
+ }
+
+ /*
+ * PLX and SPKT related changes go here
+ */
+
+}
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/i2c-yosemite.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/i2c-yosemite.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,186 @@
+/*
+ * arch/mips/pmc-sierra/yosemite/i2c-yosemite.c
+ *
+ * Copyright (C) 2003 PMC-Sierra Inc.
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Detailed Description:
+ *
+ * This block implements the I2C interface to the slave devices like the Atmel 24C32
+ * EEPROM and the MAX 1619 Sensors device. The I2C Master interface can be controlled
+ * by the SCMB block. And the SCMB block kicks in only when using the Ethernet Mode of
+ * operation and __not__ the SysAD mode
+ *
+ * The SCMB controls the two modes: MDIO and the I2C. The MDIO mode is used to communicate
+ * with the Quad-PHY from Marvel. The I2C is used to communicate with the I2C slave devices.
+ * It seems that the driver does not explicitly deal with the control of SDA and SCL serial
+ * lines. So, the driver will set the slave address, drive the command and then the data.
+ * The SCMB will then control the two serial lines as required.
+ *
+ * It seems the documents are very unclear abt this. Hence, I took some time out to write
+ * the desciption to have an idea of how the I2C can actually work. Currently, this Linux
+ * driver wont be integrated into the generic Linux I2C framework. And finally, the I2C
+ * interface is also known as the 2BI interface. 2BI means 2-bit interface referring to
+ * SDA and SCL serial lines respectively.
+ *
+ * - Manish Lachwani (12/09/2003)
+ */
+
+#include "i2c-yosemite.h"
+
+/*
+ * Poll the I2C interface for the BUSY bit.
+ */
+static int titan_i2c_poll(void)
+{
+ int i = 0;
+ unsigned long val = 0;
+
+ for (i = 0; i < TITAN_I2C_MAX_POLL; i++) {
+ val = TITAN_I2C_READ(TITAN_I2C_COMMAND);
+
+ if ( !(val & 0x8000))
+ return 0;
+ }
+
+ return TITAN_I2C_ERR_TIMEOUT;
+}
+
+/*
+ * Execute the I2C command
+ */
+int titan_i2c_xfer(unsigned int slave_addr, titan_i2c_command *cmd,
+ int size, unsigned int *addr)
+{
+ int loop = 0, bytes, i;
+ unsigned int *write_data, data, *read_data;
+ unsigned long reg_val, val;
+
+ write_data = cmd->data;
+ read_data = addr;
+
+ TITAN_I2C_WRITE(TITAN_I2C_SLAVE_ADDRESS, slave_addr);
+
+ if (cmd->type == TITAN_I2C_CMD_WRITE)
+ loop = cmd->write_size;
+ else
+ loop = size;
+
+ while (loop > 0) {
+ if ( (cmd->type == TITAN_I2C_CMD_WRITE) ||
+ (cmd->type == TITAN_I2C_CMD_READ_WRITE) ) {
+
+ reg_val = TITAN_I2C_DATA;
+ for (i = 0; i < TITAN_I2C_MAX_WORDS_PER_RW; ++i,write_data += 2,
+ reg_val += 4) {
+ if (bytes < cmd->write_size) {
+ data = write_data[0];
+ ++data;
+ }
+
+ if (bytes < cmd->write_size) {
+ data = write_data[1];
+ ++data;
+ }
+
+ TITAN_I2C_WRITE(reg_val, data);
+ }
+ }
+
+ TITAN_I2C_WRITE(TITAN_I2C_COMMAND, (unsigned int)(cmd->type << 13));
+ if (titan_i2c_poll() != TITAN_I2C_ERR_OK)
+ return TITAN_I2C_ERR_TIMEOUT;
+
+ if ( (cmd->type == TITAN_I2C_CMD_READ) ||
+ (cmd->type == TITAN_I2C_CMD_READ_WRITE) ) {
+
+ reg_val = TITAN_I2C_DATA;
+ for (i = 0; i < TITAN_I2C_MAX_WORDS_PER_RW; ++i,read_data += 2,
+ reg_val += 4) {
+ data = TITAN_I2C_READ(reg_val);
+
+ if (bytes < size) {
+ read_data[0] = data & 0xff;
+ ++bytes;
+ }
+
+ if (bytes < size) {
+ read_data[1] = ((data >> 8) & 0xff);
+ ++bytes;
+ }
+ }
+ }
+
+ loop -= (TITAN_I2C_MAX_WORDS_PER_RW * 2);
+ }
+
+ /*
+ * Read the Interrupt status and then return the appropriate error code
+ */
+
+ val = TITAN_I2C_READ(TITAN_I2C_INTERRUPTS);
+ if (val & 0x0020)
+ return TITAN_I2C_ERR_ARB_LOST;
+
+ if (val & 0x0040)
+ return TITAN_I2C_ERR_NO_RESP;
+
+ if (val & 0x0080)
+ return TITAN_I2C_ERR_DATA_COLLISION;
+
+ return TITAN_I2C_ERR_OK;
+}
+
+/*
+ * Init the I2C subsystem of the PMC-Sierra Yosemite board
+ */
+int titan_i2c_init(titan_i2c_config *config)
+{
+ unsigned int val;
+
+ /*
+ * Reset the SCMB and program into the I2C mode
+ */
+ TITAN_I2C_WRITE(TITAN_I2C_SCMB_CONTROL, 0xA000);
+ TITAN_I2C_WRITE(TITAN_I2C_SCMB_CONTROL, 0x2000);
+
+ /*
+ * Configure the filtera and clka values
+ */
+ val = TITAN_I2C_READ(TITAN_I2C_SCMB_CLOCK_A);
+ val |= ( (val & ~(0xF000)) | ( (config->filtera << 12) & 0xF000));
+ val |= ( (val & ~(0x03FF)) | ( config->clka & 0x03FF));
+ TITAN_I2C_WRITE(TITAN_I2C_SCMB_CLOCK_A, val);
+
+ /*
+ * Configure the filterb and clkb values
+ */
+ val = TITAN_I2C_READ(TITAN_I2C_SCMB_CLOCK_B);
+ val |= ( (val & ~(0xF000)) | ( (config->filterb << 12) & 0xF000));
+ val |= ( (val & ~(0x03FF)) | ( config->clkb & 0x03FF));
+ TITAN_I2C_WRITE(TITAN_I2C_SCMB_CLOCK_B, val);
+
+ return TITAN_I2C_ERR_OK;
+}
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/i2c-yosemite.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,96 @@
+/*
+ * arch/mips/pmc-sierra/yosemite/i2c-yosemite.h
+ *
+ * Copyright (C) 2003 PMC-Sierra Inc.
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __I2C_YOSEMITE_H
+#define __I2C_YOSEMITE_H
+
+/* Read and Write operations to the chip */
+
+#define TITAN_I2C_BASE 0xbb000000 /* XXX Needs to change */
+
+#define TITAN_I2C_WRITE(offset, data) \
+ *(volatile unsigned long *)(TITAN_I2C_BASE + offset) = data
+
+#define TITAN_I2C_READ(offset) *(volatile unsigned long *)(TITAN_I2C_BASE + offset)
+
+
+/* Local constansts*/
+#define TITAN_I2C_MAX_FILTER 15
+#define TITAN_I2C_MAX_CLK 1023
+#define TITAN_I2C_MAX_ARBF 15
+#define TITAN_I2C_MAX_NAK 15
+#define TITAN_I2C_MAX_MASTERCODE 7
+#define TITAN_I2C_MAX_WORDS_PER_RW 4
+#define TITAN_I2C_MAX_POLL 100
+
+/* Registers used for I2C work */
+#define TITAN_I2C_SCMB_CONTROL 0x0180 /* SCMB Control */
+#define TITAN_I2C_SCMB_CLOCK_A 0x0184 /* SCMB Clock A */
+#define TITAN_I2C_SCMB_CLOCK_B 0x0188 /* SCMB Clock B */
+#define TITAN_I2C_CONFIG 0x01A0 /* I2C Config */
+#define TITAN_I2C_COMMAND 0x01A4 /* I2C Command */
+#define TITAN_I2C_SLAVE_ADDRESS 0x01A8 /* I2C Slave Address */
+#define TITAN_I2C_DATA 0x01AC /* I2C Data [15:0] */
+#define TITAN_I2C_INTERRUPTS 0x01BC /* I2C Interrupts */
+
+/* Error */
+#define TITAN_I2C_ERR_ARB_LOST (-9220)
+#define TITAN_I2C_ERR_NO_RESP (-9221)
+#define TITAN_I2C_ERR_DATA_COLLISION (-9222)
+#define TITAN_I2C_ERR_TIMEOUT (-9223)
+#define TITAN_I2C_ERR_OK 0
+
+/* I2C Command Type */
+typedef enum {
+ TITAN_I2C_CMD_WRITE = 0,
+ TITAN_I2C_CMD_READ = 1,
+ TITAN_I2C_CMD_READ_WRITE = 2
+} titan_i2c_cmd_type;
+
+/* I2C structures */
+typedef struct {
+ int filtera; /* Register 0x0184, bits 15 - 12*/
+ int clka; /* Register 0x0184, bits 9 - 0 */
+ int filterb; /* Register 0x0188, bits 15 - 12 */
+ int clkb; /* Register 0x0188, bits 9 - 0 */
+} titan_i2c_config;
+
+/* I2C command type */
+typedef struct {
+ titan_i2c_cmd_type type; /* Type of command */
+ int num_arb; /* Register 0x01a0, bits 15 - 12 */
+ int num_nak; /* Register 0x01a0, bits 11 - 8 */
+ int addr_size; /* Register 0x01a0, bit 7 */
+ int mst_code; /* Register 0x01a0, bits 6 - 4 */
+ int arb_en; /* Register 0x01a0, bit 1 */
+ int speed; /* Register 0x01a0, bit 0 */
+ int slave_addr; /* Register 0x01a8 */
+ int write_size; /* Register 0x01a4, bits 10 - 8 */
+ unsigned int *data; /* Register 0x01ac */
+} titan_i2c_command;
+
+#endif /* __I2C_YOSEMITE_H */
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/irq.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/irq.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,247 @@
+/*
+ * Copyright (C) 2003 PMC-Sierra Inc.
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Second level Interrupt handlers for the PMC-Sierra Titan/Yosemite board
+ */
+
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+
+/* Hypertransport specific */
+#define IRQ_STATUS_REG_CPU0 0xbb001b30 /* INT# 3 status register on CPU 0*/
+#define IRQ_STATUS_REG_CPU1 0xbb002b30 /* INT# 3 status register on CPU 1*/
+#define IRQ_ACK_BITS 0x00000000 /* Ack bits */
+#define IRQ_CLEAR_REG_CPU0 0xbb002b3c /* IRQ clear register on CPU 0*/
+#define IRQ_CLEAR_REG_CPU0 0xbb002b3c /* IRQ clear register on CPU 1*/
+
+#define HYPERTRANSPORT_EOI 0xbb0006E0 /* End of Interrupt */
+#define HYPERTRANSPORT_INTA 0x78 /* INTA# */
+#define HYPERTRANSPORT_INTB 0x79 /* INTB# */
+#define HYPERTRANSPORT_INTC 0x7a /* INTC# */
+#define HYPERTRANSPORT_INTD 0x7b /* INTD# */
+
+#define read_32bit_cp0_set1_register(source) \
+({ int __res; \
+ __asm__ __volatile__( \
+ ".set\tpush\n\t" \
+ ".set\treorder\n\t" \
+ "cfc0\t%0,"STR(source)"\n\t" \
+ ".set\tpop" \
+ : "=r" (__res)); \
+ __res;})
+
+#define write_32bit_cp0_set1_register(register,value) \
+ __asm__ __volatile__( \
+ "ctc0\t%0,"STR(register)"\n\t" \
+ "nop" \
+ : : "r" (value));
+
+static spinlock_t irq_lock = SPIN_LOCK_UNLOCKED;
+
+/* Function for careful CP0 interrupt mask access */
+static inline void modify_cp0_intmask(unsigned clr_mask_in, unsigned set_mask_in)
+{
+ unsigned long status;
+ unsigned clr_mask;
+ unsigned set_mask;
+
+ /* do the low 8 bits first */
+ clr_mask = 0xff & clr_mask_in;
+ set_mask = 0xff & set_mask_in;
+ status = read_c0_status();
+ status &= ~((clr_mask & 0xFF) << 8);
+ status |= (set_mask & 0xFF) << 8 | 0x0000FF00;
+ write_c0_status(status);
+
+ /* do the high 8 bits */
+ clr_mask = 0xff & (clr_mask_in >> 8);
+ set_mask = 0xff & (set_mask_in >> 8);
+ status = read_32bit_cp0_set1_register(CP0_S1_INTCONTROL);
+ status &= ~((clr_mask & 0xFF) << 8);
+ status |= (set_mask & 0xFF) << 8;
+ write_32bit_cp0_set1_register(CP0_S1_INTCONTROL, status);
+}
+
+static inline void mask_irq(unsigned int irq)
+{
+ modify_cp0_intmask(irq, 0);
+}
+
+static inline void unmask_irq(unsigned int irq)
+{
+ modify_cp0_intmask(0, irq);
+}
+
+static void enable_rm9000_irq(unsigned int irq)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&irq_lock, flags);
+ unmask_irq(1 << (irq-1));
+ spin_unlock_irqrestore(&irq_lock, flags);
+}
+
+static unsigned int startup_rm9000_irq(unsigned int irq)
+{
+ enable_rm9000_irq(irq);
+
+ return 0; /* never anything pending */
+}
+
+static void disable_rm9000_irq(unsigned int irq)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&irq_lock, flags);
+ mask_irq(1 << (irq-1));
+ spin_unlock_irqrestore(&irq_lock, flags);
+}
+
+#define shutdown_rm9000_irq disable_rm9000_irq
+
+static void mask_and_ack_rm9000_irq(unsigned int irq)
+{
+ mask_irq(1 << (irq-1));
+}
+
+static void end_rm9000_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ unmask_irq(1 << (irq-1));
+}
+
+static struct hw_interrupt_type rm9000_hpcdma_irq_type = {
+ "RM9000",
+ startup_rm9000_irq,
+ shutdown_rm9000_irq,
+ enable_rm9000_irq,
+ disable_rm9000_irq,
+ mask_and_ack_rm9000_irq,
+ end_rm9000_irq,
+ NULL
+};
+
+extern asmlinkage void titan_handle_int(void);
+extern void jaguar_mailbox_irq(struct pt_regs *);
+
+/*
+ * Handle hypertransport & SMP interrupts. The interrupt lines are scarce. For interprocessor
+ * interrupts, the best thing to do is to use the INTMSG register. We use the same external
+ * interrupt line, i.e. INTB3 and monitor another status bit
+ */
+asmlinkage void ll_ht_smp_irq_handler(int irq, struct pt_regs *regs)
+{
+ u32 status;
+ status = *(volatile u_int32_t *)(IRQ_STATUS_REG_CPU0);
+
+ /* Ack all the bits that correspond to the interrupt sources */
+ if (status != 0)
+ *(volatile u_int32_t *)(IRQ_STATUS_REG_CPU0) = IRQ_ACK_BITS;
+
+ status = *(volatile u_int32_t *)(IRQ_STATUS_REG_CPU1);
+ if (status != 0)
+ *(volatile u_int32_t *)(IRQ_STATUS_REG_CPU1) = IRQ_ACK_BITS;
+
+#ifdef CONFIG_SMP
+ if (status == 0x2) {
+ /* This is an SMP IPI sent from one core to another */
+ jaguar_mailbox_irq(regs);
+ goto done;
+ }
+#endif
+
+#ifdef CONFIG_HT_LEVEL_TRIGGER
+ /*
+ * Level Trigger Mode only. Send the HT EOI message back to the source.
+ */
+ switch (status) {
+ case 0x1000000:
+ *(volatile u_int32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTA;
+ break;
+ case 0x2000000:
+ *(volatile u_int32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTB;
+ break;
+ case 0x4000000:
+ *(volatile u_int32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTC;
+ break;
+ case 0x8000000:
+ *(volatile u_int32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTD;
+ break;
+ case 0x0000001:
+ /* PLX */
+ *(volatile u_int32_t *)(HYPERTRANSPORT_EOI) = 0x20;
+ *(volatile u_int32_t *)(IRQ_CLEAR_REG) = IRQ_ACK_BITS;
+ break;
+ case 0xf000000:
+ *(volatile u_int32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTA;
+ *(volatile u_int32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTB;
+ *(volatile u_int32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTC;
+ *(volatile u_int32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTD;
+ break;
+ }
+#endif /* CONFIG_HT_LEVEL_TRIGGER */
+
+done:
+ if (status != 0x2)
+ /* Not for SMP */
+ do_IRQ(irq, regs);
+}
+
+/*
+ * Initialize the next level interrupt handler
+ */
+void __init init_IRQ(void)
+{
+ int i;
+
+ clear_c0_status(ST0_IM | ST0_BEV);
+ __cli();
+
+ set_except_vector(0, titan_handle_int);
+ init_generic_irq();
+
+ for (i = 0; i < 13; i++) {
+ irq_desc[i].status = IRQ_DISABLED;
+ irq_desc[i].action = 0;
+ irq_desc[i].depth = 1;
+ irq_desc[i].handler = &rm9000_hpcdma_irq_type;
+ }
+}
+
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/irq-handler.S
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/irq-handler.S 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,125 @@
+/*
+ * Copyright 2003 PMC-Sierra Inc.
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com
+ *
+ * First-level interrupt router for the PMC-Sierra Titan board
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/config.h>
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+/*
+ * IRQ router for the Titan board
+ */
+
+ .align 5
+ NESTED(titan_handle_int, PT_SIZE, sp)
+ SAVE_ALL
+ CLI
+ .set at
+ mfc0 t0, CP0_CAUSE
+ mfc0 t2, CP0_STATUS
+
+ and t0, t2
+
+ andi t1, t0, STATUSF_IP0 /* INTB0 hardware line */
+ bnez t1, ll_pcia_irq /* 64-bit PCI */
+ andi t1, t0, STATUSF_IP1 /* INTB1 hardware line */
+ bnez t1, ll_pcib_irq /* second 64-bit PCI slot */
+ andi t1, t0, STATUSF_IP2 /* INTB2 hardware line */
+ bnez t1, ll_duart_irq /* UART */
+ andi t1, t0, STATUSF_IP3 /* INTB3 hardware line*/
+ bnez t1, ll_ht_smp_irq /* Hypertransport */
+ andi t1, t0, STATUSF_IP5 /* INTB5 hardware line */
+ bnez t1, ll_timer_irq /* Timer */
+
+ nop
+ nop
+
+ /* Extended interrupts */
+ mfc0 t0, CPU_CAUSE
+ cfc0 t1, CP0_S1_INTCONTROL
+
+ sll t2, t1, 8
+
+ and t0, t2
+ srl t0, t0, 16
+
+
+ andi t1, t0, STATUSF_IP6 /* INTB6 hardware line */
+ bnez t1, ll_phy0_irq /* Ethernet port 0 */
+ andi t1, t0, STATUSF_IP7 /* INTB7 hardware line */
+ bnez t1, ll_phy1_irq /* Ethernet port 1 */
+ andi t1, t0, STATUSF_IP8 /* INTB8 hardware line */
+ bnez t1, ll_phy2_irq /* Ethernet Port 2 */
+
+ nop
+ nop
+
+ .set reorder
+
+ /* No handler */
+ j spurious_interrupt
+ nop
+ END(titan_handle_int)
+
+ .align 5
+
+/* Individual Handlers */
+
+ll_pcia_irq:
+ li a0, 1
+ move a2, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_pcib_irq:
+ li a0, 2
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_duart_irq:
+ li a0, 3
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_ht_irq:
+ li a0, 4
+ move a1, sp
+ jal ll_ht_smp_irq_handler /* Detailed HT & SMP IRQ handling */
+ j ret_from_irq
+
+ll_timer_irq:
+ li a0, 5
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_phy0_irq:
+ li a0, 6
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_phy1_irq:
+ li a0, 7
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_phy2_irq:
+ li a0, 8
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/Makefile
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,8 @@
+#
+# Makefile for the PMC-Sierra Titan
+#
+
+obj-y += irq-handler.o irq.o i2c-yosemite.o prom.o setup.o
+
+obj-$(CONFIG_SMP) += smp.o
+obj-$(CONFIG_HYPERTRANSPORT) += ht-irq.o ht.o
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/prom.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/prom.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,189 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Copyright (C) 2003 PMC-Sierra Inc.
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ */
+
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+#include <linux/delay.h>
+#include <linux/smp.h>
+#include <asm/bootinfo.h>
+
+#include "setup.h"
+
+/* Call Vectors */
+struct callvectors {
+ int (*open) (char*, int, int);
+ int (*close) (int);
+ int (*read) (int, void*, int);
+ int (*write) (int, void*, int);
+ off_t (*lseek) (int, off_t, int);
+ int (*printf) (const char*, ...);
+ void (*cacheflush) (void);
+ char* (*gets) (char*);
+};
+
+struct callvectors* debug_vectors;
+
+extern unsigned long yosemite_base;
+extern unsigned long cpu_clock;
+unsigned char titan_ge_mac_addr_base[6];
+
+const char *get_system_type(void)
+{
+ return "PMC-Sierra Yosemite";
+}
+
+static void prom_cpu0_exit(void)
+{
+ void *nvram = YOSEMITE_NVRAM_BASE_ADDR;
+
+ /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */
+ writeb(0x84, nvram + 0xff7);
+
+ /* wait for the watchdog to go off */
+ mdelay(100+(1000/16));
+
+ /* if the watchdog fails for some reason, let people know */
+ printk(KERN_NOTICE "Watchdog reset failed\n");
+}
+
+/*
+ * Reset the NVRAM over the local bus
+ */
+static void prom_exit(void)
+{
+#ifdef CONFIG_SMP
+ if (smp_processor_id())
+ /* CPU 1 */
+ smp_call_function(prom_cpu0_exit, NULL, 1, 1);
+#endif
+ prom_cpu0_exit;
+}
+
+/*
+ * Get the MAC address from the EEPROM using the I2C protocol
+ */
+void get_mac_address(char dest[6])
+{
+ /* Use the I2C command code in the i2c-yosemite */
+}
+
+/*
+ * Halt the system
+ */
+static void prom_halt(void)
+{
+ printk(KERN_NOTICE "\n** You can safely turn off the power\n");
+ while (1)
+ __asm__(".set\tmips3\n\t"
+ "wait\n\t"
+ ".set\tmips0");
+}
+
+/*
+ * Init routine which accepts the variables from PMON
+ */
+__init prom_init(int argc, char **arg, char **env, struct callvectors *cv)
+{
+ int i = 0;
+
+ /* Callbacks for halt, restart */
+ _machine_restart = (void (*)(char *))prom_exit;
+ _machine_halt = prom_halt;
+ _machine_power_off = prom_halt;
+
+#ifdef CONFIG_MIPS64
+
+ /* Do nothing for the 64-bit for now. Just implement for the 32-bit */
+
+#else /* CONFIG_MIPS64 */
+
+ debug_vectors = cv;
+ arcs_cmdline[0] = '\0';
+
+ /* Get the boot parameters */
+ for (i = 1; i < argc; i++) {
+ if (strlen(arcs_cmdline) + strlen(arg[i] + 1) >= sizeof(arcs_cmdline))
+ break;
+
+ strcat(arcs_cmdline, arg[i]);
+ strcat(arcs_cmdline, " ");
+ }
+
+ while (*env) {
+ if (strncmp("ocd_base", *env, strlen("ocd_base")) == 0)
+ yosemite_base = simple_strtol(*env + strlen("ocd_base="),
+ NULL, 16);
+
+ if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0)
+ cpu_clock = simple_strtol(*env + strlen("cpuclock="),
+ NULL, 10);
+
+ env++;
+ }
+#endif /* CONFIG_MIPS64 */
+
+ mips_machgroup = MACH_GROUP_TITAN;
+ mips_machtype = MACH_TITAN_YOSEMITE;
+
+ get_mac_address(titan_ge_mac_addr_base);
+
+ debug_vectors->printf("Booting Linux kernel...\n");
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
+
+void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
+{
+}
+
+extern void asmlinkage smp_bootstrap(void);
+
+/*
+ * SMP support
+ */
+int prom_setup_smp(void)
+{
+ int num_cpus = 2;
+
+ /*
+ * We know that the RM9000 on the Jaguar ATX board has 2 cores. Hence, this
+ * can be hardcoded for now.
+ */
+ return num_cpus;
+}
+
+int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp)
+{
+ /* Clear the semaphore */
+ *(volatile u_int32_t *)(0xbb000a68) = 0x80000000;
+
+ return 1;
+}
+
+void prom_init_secondary(void)
+{
+ clear_c0_config(CONF_CM_CMASK);
+ set_c0_config(0x2);
+
+ clear_c0_status(ST0_IM);
+ set_c0_status(0x1ffff);
+}
+
+void prom_smp_finish(void)
+{
+}
+
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/setup.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,170 @@
+/*
+ * arch/mips/pmc-sierra/yosemite/setup.c
+ *
+ * Copyright (C) 2003 PMC-Sierra Inc.
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/mc146818rtc.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/ioport.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/timex.h>
+#include <linux/vmalloc.h>
+#include <asm/time.h>
+#include <asm/bootinfo.h>
+#include <asm/page.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/processor.h>
+#include <asm/ptrace.h>
+#include <asm/reboot.h>
+#include <linux/version.h>
+#include <linux/bootmem.h>
+#include <linux/blk.h>
+
+#include "setup.h"
+
+unsigned long cpu_clock;
+unsigned long yosemite_base;
+
+void __init bus_error_init(void)
+{
+ /* Do nothing */
+}
+
+unsigned long m48t37y_get_time(void)
+{
+ unsigned char *rtc_base = YOSEMITE_RTC_BASE;
+ unsigned int year, month, day, hour, min, sec;
+
+ /* Stop the update to the time */
+ rtc_base[0x7ff8] = 0x40;
+
+ year = CONV_BCD_TO_BIN(rtc_base[0x7fff]);
+ year += CONV_BCD_TO_BIN(rtc_base[0x7fff1]) * 100;
+
+ month = CONV_BCD_TO_BIN(rtc_base[0x7ffe]);
+ day = CONV_BCD_TO_BIN(rtc_base[0x7ffd]);
+ hour = CONV_BCD_TO_BIN(rtc_base[0x7ffb]);
+ min = CONV_BCD_TO_BIN(rtc_base[0x7ffa]);
+ sec = CONV_BCD_TO_BIN(rtc_base[0x7ff9]);
+
+ /* Start the update to the time again */
+ rtc_base[0x7ff8] = 0x00;
+
+ return mktime(year, month, day, hour, min, sec);
+}
+
+int m48t37y_set_time(unsigned long sec)
+{
+ unsigned char *rtc_base = YOSEMITE_RTC_BASE;
+ unsigned int year, month, day, hour, min, sec;
+
+ struct rtc_time tm;
+
+ /* convert to a more useful format -- note months count from 0 */
+ to_tm(sec, &tm);
+ tm.tm_mon += 1;
+
+ /* enable writing */
+ rtc_base[0x7ff8] = 0x80;
+
+ /* year */
+ rtc_base[0x7fff] = CONV_BIN_TO_BCD(tm.tm_year % 100);
+ rtc_base[0x7ff1] = CONV_BIN_TO_BCD(tm.tm_year / 100);
+
+ /* month */
+ rtc_base[0x7ffe] = CONV_BIN_TO_BCD(tm.tm_mon);
+
+ /* day */
+ rtc_base[0x7ffd] = CONV_BIN_TO_BCD(tm.tm_mday);
+
+ /* hour/min/sec */
+ rtc_base[0x7ffb] = CONV_BIN_TO_BCD(tm.tm_hour);
+ rtc_base[0x7ffa] = CONV_BIN_TO_BCD(tm.tm_min);
+ rtc_base[0x7ff9] = CONV_BIN_TO_BCD(tm.tm_sec);
+
+ /* day of week -- not really used, but let's keep it up-to-date */
+ rtc_base[0x7ffc] = CONV_BIN_TO_BCD(tm.tm_wday + 1);
+
+ /* disable writing */
+ rtc_base[0x7ff8] = 0x00;
+
+ return 0;
+}
+
+void yosemite_timer_setup(struct irqaction *irq)
+{
+ setup_irq(6, irq);
+}
+
+void yosemite_time_init(void)
+{
+ mips_counter_frequency = cpu_clock / 2;
+ board_timer_setup = yosemite_timer_setup;
+
+ rtc_get_time = m48t37y_get_time;
+ rtc_set_time = m48t37y_set_time;
+}
+
+static int __init pmc_yosemite_setup(void)
+{
+ unsigned long val = 0;
+
+ printk("PMC-Sierra Yosemite Board Setup \n");
+ board_time_init = yosemite_time_init;
+
+ /* Add memory regions */
+ add_memory_region(0x00000000, 0x10000000, BOOT_MEM_RAM);
+ add_memory_region(0x10000000, 0x10000000, BOOT_MEM_RAM);
+
+ /* Setup the HT controller */
+ val = *(volatile u_int32_t *)(HYPERTRANSPORT_CONFIG_REG);
+ val |= HYPERTRANSPORT_ENABLE;
+ *(volatile u_int32_t *)(HYPERTRANSPORT_CONFIG_REG) = val;
+
+ /* Set the BAR. Shifted mode */
+ *(volatile u_int32_t *)(HYPERTRANSPORT_BAR0_REG) = HYPERTRANSPORT_BAR0_ADDR;
+ *(volatile u_int32_t *)(HYPERTRANSPORT_SIZE0_REG) = HYPERTRANSPORT_SIZE0;
+
+#ifdef CONFIG_PCI
+ ioport_resource.start = 0xe0000000;
+ ioport_resource.end = 0xe0000000 + 0x20000000 - 1;
+ iomem_resource.start = 0xc0000000;
+ iomem_resource.end = 0xc0000000 + 0x20000000 - 1;
+
+ pci_scan_bus(0, &titan_pci_ops, NULL);
+#endif
+
+ return 0;
+}
+
+early_initcall(pmc_yosemite_setup);
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/setup.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/setup.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,47 @@
+/*
+ * Copyright 2003 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * Board specific definititions for the PMC-Sierra Yosemite
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __SETUP_H__
+#define __SETUP_H__
+
+/* Real Time Clock base */
+#define YOSEMITE_RTC_BASE
+#define CONV_BCD_TO_BIN(val) (((val) & 0xf) + (((val) >> 4) * 10))
+#define CONV_BIN_TO_BCD(val) (((val) % 10) + (((val) / 10) << 4))
+
+/* NVRAM Base */
+#define YOSEMITE_NVRAM_BASE_ADDR 0xbb000678 /* XXX Need change */
+#define YOSEMITE_RTC_BASE 0xbb000679 /* XXX Need change */
+
+/*
+ * Hypertransport Specific
+ */
+#define HYPERTRANSPORT_CONFIG_REG 0xbb000604
+#define HYPERTRANSPORT_BAR0_REG 0xbb000610
+#define HYPERTRANSPORT_SIZE0_REG 0xbb000688
+#define HYPERTRANSPORT_BAR0_ATTR_REG 0xbb000680
+
+#define HYPERTRANSPORT_BAR0_ADDR 0x00000006
+#define HYPERTRANSPORT_SIZE0 0x0fffffff
+#define HYPERTRANSPORT_BAR0_ATTR 0x00002000
+
+#define HYPERTRANSPORT_ENABLE 0x6
+
+/*
+ * EEPROM Size
+ */
+#define TITAN_ATMEL_24C32_SIZE 32768
+#define TITAN_ATMEL_24C64_SIZE 65536
+
+
+#endif /* __SETUP_H__ */
+
diff -puN /dev/null arch/mips/pmc-sierra/yosemite/smp.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/pmc-sierra/yosemite/smp.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,179 @@
+/*
+ * Copyright 2003 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/smp.h>
+#include <linux/kernel_stat.h>
+
+#include <asm/mmu_context.h>
+#include <asm/trace.h>
+
+extern void smp_call_function_interrupt(void);
+extern void asmlinkage smp_bootstrap(void);
+
+/*
+ * Send inter-processor interrupt
+ */
+void core_send_ipi(int cpu, unsigned int action)
+{
+ /*
+ * Generate and INTMSG so that it can be sent over to the destination CPU
+ * The INTMSG will put the STATUS bits based on the action desired
+ */
+ switch(action) {
+ case SMP_RESCHEDULE_YOURSELF:
+ /* Do nothing */
+ break;
+ case SMP_CALL_FUNCTION:
+ if (cpu == 1)
+ *(volatile u_int32_t *)(0xbb000a00) = 0x00610002;
+ else
+ *(volatile u_int32_t *)(0xbb000a00) = 0x00610001;
+ break;
+
+ default:
+ panic("core_send_ipi \n");
+ }
+}
+
+/*
+ * Mailbox interrupt to handle IPI
+ */
+void jaguar_mailbox_irq(struct pt_regs *regs)
+{
+ int cpu = smp_processor_id();
+
+ /* SMP_CALL_FUNCTION */
+ smp_call_function_interrupt();
+}
+
+extern atomic_t cpus_booted;
+
+void __init start_secondary(void)
+{
+ unsigned int cpu = smp_processor_id();
+ extern atomic_t smp_commenced;
+
+ if (current->processor != 1) {
+ printk("Impossible CPU %d \n", cpu);
+ current->processor = 1;
+ current->cpus_runnable = 1 << 1;
+ cpu = current->processor;
+ }
+
+ if (current->mm)
+ current->mm = NULL;
+
+ prom_init_secondary();
+ per_cpu_trap_init();
+
+ /*
+ * XXX parity protection should be folded in here when it's converted
+ * to an option instead of something based on .cputype
+ */
+ pgd_current[cpu] = init_mm.pgd;
+ cpu_data[cpu].udelay_val = loops_per_jiffy;
+ prom_smp_finish();
+ CPUMASK_SETB(cpu_online_map, cpu);
+ atomic_inc(&cpus_booted);
+ __flush_cache_all();
+
+ printk("Slave cpu booted successfully \n");
+ *(volatile u_int32_t *)(0xbb000a68) = 0x00000000;
+ *(volatile u_int32_t *)(0xbb000a68) = 0x80000000;
+
+ while (*(volatile u_int32_t *)(0xbb000a68) != 0x00000000);
+
+ return cpu_idle();
+}
+
+void __init smp_boot_cpus(void)
+{
+ int i;
+ int cur_cpu = 0;
+
+ smp_num_cpus = prom_setup_smp();
+ printk("Detected %d available CPUs \n", smp_num_cpus);
+
+ init_new_context(current, &init_mm);
+ current->processor = 0;
+ cpu_data[0].udelay_val = loops_per_jiffy;
+ cpu_data[0].asid_cache = ASID_FIRST_VERSION;
+ CPUMASK_CLRALL(cpu_online_map);
+ CPUMASK_SETB(cpu_online_map, 0);
+ atomic_set(&cpus_booted, 1); /* Master CPU is already booted... */
+ init_idle();
+
+ __cpu_number_map[0] = 0;
+ __cpu_logical_map[0] = 0;
+
+ /*
+ * This loop attempts to compensate for "holes" in the CPU
+ * numbering. It's overkill, but general.
+ */
+ for (i = 1; i < smp_num_cpus; ) {
+ struct task_struct *p;
+ struct pt_regs regs;
+ int retval;
+ printk("Starting CPU %d... \n", i);
+
+ /* Spawn a new process normally. Grab a pointer to
+ its task struct so we can mess with it */
+ do_fork(CLONE_VM|CLONE_PID, 0, ®s, 0);
+
+ p = init_task.prev_task;
+ if (!p)
+ panic("failed fork for CPU %d", i);
+
+ /* This is current for the second processor */
+ p->processor = i;
+ p->cpus_runnable = 1 << i; /* we schedule the first task manually */
+ p->thread.reg31 = (unsigned long) start_secondary;
+
+ del_from_runqueue(p);
+ unhash_process(p);
+ init_tasks[i] = p;
+
+ __flush_cache_all();
+
+ do {
+ /* Iterate until we find a CPU that comes up */
+ cur_cpu++;
+ retval = prom_boot_secondary(cur_cpu,
+ (unsigned long)p + KERNEL_STACK_SIZE - 32,
+ (unsigned long)p);
+
+ } while (!retval && (cur_cpu < NR_CPUS));
+ if (retval) {
+ __cpu_number_map[cur_cpu] = i;
+ __cpu_logical_map[i] = cur_cpu;
+ i++;
+ } else {
+ panic("CPU discovery disaster");
+ }
+ }
+
+ /* Local semaphore to both the CPUs */
+
+ *(volatile u_int32_t *)(0xbb000a68) = 0x80000000;
+ while (*(volatile u_int32_t *)(0xbb000a68) != 0x00000000);
+
+ smp_threads_ready = 1;
+}
diff -puN arch/mips/ramdisk/Makefile~mips-megapatch arch/mips/ramdisk/Makefile
--- 25/arch/mips/ramdisk/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/ramdisk/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -2,8 +2,19 @@
# Makefile for a ramdisk image
#
+obj-y += ramdisk.o
+
+
O_FORMAT = $(shell $(OBJDUMP) -i | head -n 2 | grep elf32)
-img = $(CONFIG_EMBEDDED_RAMDISK_IMAGE)
-ramdisk.o: $(subst ",,$(img)) ld.script
- echo "O_FORMAT: " $(O_FORMAT)
- $(LD) -T ld.script -b binary --oformat $(O_FORMAT) -o $@ $(img)
+img := $(subst ",,$(CONFIG_EMBEDDED_RAMDISK_IMAGE))
+# add $(src) when $(img) is relative
+img := $(subst $(src)//,/,$(src)/$(img))
+
+quiet_cmd_ramdisk = LD $@
+define cmd_ramdisk
+ $(LD) -T $(src)/ld.script -b binary --oformat $(O_FORMAT) -o $@ $(img)
+endef
+
+$(obj)/ramdisk.o: $(img) $(src)/ld.script
+ $(call cmd,ramdisk)
+
diff -puN arch/mips/sgi-ip22/ip22-berr.c~mips-megapatch arch/mips/sgi-ip22/ip22-berr.c
--- 25/arch/mips/sgi-ip22/ip22-berr.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip22/ip22-berr.c 2004-02-19 12:53:02.000000000 -0800
@@ -44,18 +44,18 @@ static void save_and_clear_buserr(void)
static void print_buserr(void)
{
if (extio_stat & EXTIO_MC_BUSERR)
- printk(KERN_ALERT "MC Bus Error\n");
+ printk(KERN_ERR "MC Bus Error\n");
if (extio_stat & EXTIO_HPC3_BUSERR)
- printk(KERN_ALERT "HPC3 Bus Error 0x%x:<id=0x%x,%s,lane=0x%x>\n",
+ printk(KERN_ERR "HPC3 Bus Error 0x%x:<id=0x%x,%s,lane=0x%x>\n",
hpc3_berr_stat,
(hpc3_berr_stat & HPC3_BESTAT_PIDMASK) >>
HPC3_BESTAT_PIDSHIFT,
(hpc3_berr_stat & HPC3_BESTAT_CTYPE) ? "PIO" : "DMA",
hpc3_berr_stat & HPC3_BESTAT_BLMASK);
if (extio_stat & EXTIO_EISA_BUSERR)
- printk(KERN_ALERT "EISA Bus Error\n");
+ printk(KERN_ERR "EISA Bus Error\n");
if (cpu_err_stat & CPU_ERRMASK)
- printk(KERN_ALERT "CPU error 0x%x<%s%s%s%s%s%s> @ 0x%08x\n",
+ printk(KERN_ERR "CPU error 0x%x<%s%s%s%s%s%s> @ 0x%08x\n",
cpu_err_stat,
cpu_err_stat & SGIMC_CSTAT_RD ? "RD " : "",
cpu_err_stat & SGIMC_CSTAT_PAR ? "PAR " : "",
@@ -65,7 +65,7 @@ static void print_buserr(void)
cpu_err_stat & SGIMC_CSTAT_BAD_DATA ? "BAD_DATA " : "",
cpu_err_addr);
if (gio_err_stat & GIO_ERRMASK)
- printk(KERN_ALERT "GIO error 0x%x:<%s%s%s%s%s%s%s%s> @ 0x08%x\n",
+ printk(KERN_ERR "GIO error 0x%x:<%s%s%s%s%s%s%s%s> @ 0x08%x\n",
gio_err_stat,
gio_err_stat & SGIMC_GSTAT_RD ? "RD " : "",
gio_err_stat & SGIMC_GSTAT_WR ? "WR " : "",
@@ -87,13 +87,19 @@ static void print_buserr(void)
void ip22_be_interrupt(int irq, struct pt_regs *regs)
{
+ const int field = 2 * sizeof(unsigned long);
+
save_and_clear_buserr();
print_buserr();
- panic("Bus error, epc == %08lx, ra == %08lx",
- regs->cp0_epc, regs->regs[31]);
+ printk(KERN_ALERT "%s bus error, epc == %0*lx, ra == %0*lx\n",
+ (regs->cp0_cause & 4) ? "Data" : "Instruction",
+ field, regs->cp0_epc, field, regs->regs[31]);
+ /* Assume it would be too dangerous to continue ... */
+ die_if_kernel("Oops", regs);
+ force_sig(SIGBUS, current);
}
-int ip22_be_handler(struct pt_regs *regs, int is_fixup)
+static int ip22_be_handler(struct pt_regs *regs, int is_fixup)
{
save_and_clear_buserr();
if (is_fixup)
diff -puN arch/mips/sgi-ip22/ip22-hpc.c~mips-megapatch arch/mips/sgi-ip22/ip22-hpc.c
--- 25/arch/mips/sgi-ip22/ip22-hpc.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip22/ip22-hpc.c 2004-02-19 12:53:02.000000000 -0800
@@ -6,16 +6,23 @@
*/
#include <linux/init.h>
+#include <linux/module.h>
#include <linux/types.h>
-#include <asm/addrspace.h>
+#include <asm/io.h>
#include <asm/sgi/hpc3.h>
#include <asm/sgi/ioc.h>
#include <asm/sgi/ip22.h>
struct hpc3_regs *hpc3c0, *hpc3c1;
+
+EXPORT_SYMBOL(hpc3c0);
+EXPORT_SYMBOL(hpc3c1);
+
struct sgioc_regs *sgioc;
+EXPORT_SYMBOL(sgioc);
+
/* We need software copies of these because they are write only. */
u8 sgi_ioc_reset, sgi_ioc_write;
@@ -23,8 +30,11 @@ extern char *system_type;
void __init sgihpc_init(void)
{
- hpc3c0 = (struct hpc3_regs *)(KSEG1 + HPC3_CHIP0_BASE);
- hpc3c1 = (struct hpc3_regs *)(KSEG1 + HPC3_CHIP1_BASE);
+ /* ioremap can't fail */
+ hpc3c0 = (struct hpc3_regs *)
+ ioremap(HPC3_CHIP0_BASE, sizeof(struct hpc3_regs));
+ hpc3c1 = (struct hpc3_regs *)
+ ioremap(HPC3_CHIP1_BASE, sizeof(struct hpc3_regs));
/* IOC lives in PBUS PIO channel 6 */
sgioc = (struct sgioc_regs *)hpc3c0->pbus_extregs[6];
diff -puN arch/mips/sgi-ip22/ip22-int.c~mips-megapatch arch/mips/sgi-ip22/ip22-int.c
--- 25/arch/mips/sgi-ip22/ip22-int.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip22/ip22-int.c 2004-02-19 12:53:02.000000000 -0800
@@ -9,7 +9,7 @@
* - Interrupt handling fixes
* Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
*/
-
+#include <linux/config.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
diff -puN -L arch/mips/sgi-ip22/ip22-ksyms.c arch/mips/sgi-ip22/ip22-ksyms.c~mips-megapatch /dev/null
--- 25/arch/mips/sgi-ip22/ip22-ksyms.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,21 +0,0 @@
-/*
- * ip22-ksyms.c: IP22 specific exports
- */
-
-#include <linux/module.h>
-
-#include <asm/sgi/mc.h>
-#include <asm/sgi/hpc3.h>
-#include <asm/sgi/ioc.h>
-#include <asm/sgi/ip22.h>
-
-EXPORT_SYMBOL(sgimc);
-EXPORT_SYMBOL(hpc3c0);
-EXPORT_SYMBOL(hpc3c1);
-EXPORT_SYMBOL(sgioc);
-
-extern void (*indy_volume_button)(int);
-EXPORT_SYMBOL(indy_volume_button);
-
-EXPORT_SYMBOL(ip22_eeprom_read);
-EXPORT_SYMBOL(ip22_nvram_read);
diff -puN arch/mips/sgi-ip22/ip22-mc.c~mips-megapatch arch/mips/sgi-ip22/ip22-mc.c
--- 25/arch/mips/sgi-ip22/ip22-mc.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip22/ip22-mc.c 2004-02-19 12:53:02.000000000 -0800
@@ -7,11 +7,11 @@
*/
#include <linux/init.h>
+#include <linux/module.h>
#include <linux/kernel.h>
-#include <asm/addrspace.h>
+#include <asm/io.h>
#include <asm/bootinfo.h>
-#include <asm/ptrace.h>
#include <asm/sgialib.h>
#include <asm/sgi/mc.h>
#include <asm/sgi/hpc3.h>
@@ -19,6 +19,8 @@
struct sgimc_regs *sgimc;
+EXPORT_SYMBOL(sgimc);
+
static inline unsigned long get_bank_addr(unsigned int memconfig)
{
return ((memconfig & SGIMC_MCONFIG_BASEADDR) <<
@@ -106,7 +108,9 @@ void __init sgimc_init(void)
{
u32 tmp;
- sgimc = (struct sgimc_regs *)(KSEG1 + SGIMC_BASE);
+ /* ioremap can't fail */
+ sgimc = (struct sgimc_regs *)
+ ioremap(SGIMC_BASE, sizeof(struct sgimc_regs));
printk(KERN_INFO "MC: SGI memory controller Revision %d\n",
(int) sgimc->systemid & SGIMC_SYSID_MASKREV);
@@ -198,4 +202,7 @@ void __init sgimc_init(void)
}
void __init prom_meminit(void) {}
-void __init prom_free_prom_memory (void) {}
+unsigned long __init prom_free_prom_memory(void)
+{
+ return 0;
+}
diff -puN arch/mips/sgi-ip22/ip22-nvram.c~mips-megapatch arch/mips/sgi-ip22/ip22-nvram.c
--- 25/arch/mips/sgi-ip22/ip22-nvram.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip22/ip22-nvram.c 2004-02-19 12:53:02.000000000 -0800
@@ -3,6 +3,7 @@
*
* Copyright (C) 2003 Ladislav Michl (ladis@linux-mips.org)
*/
+#include <linux/module.h>
#include <asm/sgi/hpc3.h>
#include <asm/sgi/ip22.h>
@@ -95,6 +96,8 @@ unsigned short ip22_eeprom_read(volatile
return res;
}
+EXPORT_SYMBOL(ip22_eeprom_read);
+
/*
* Read specified register from main NVRAM
*/
@@ -112,3 +115,5 @@ unsigned short ip22_nvram_read(int reg)
return (tmp << 8) | (hpc3c0->bbram[reg] & 0xff);
}
}
+
+EXPORT_SYMBOL(ip22_nvram_read);
diff -puN arch/mips/sgi-ip22/ip22-reset.c~mips-megapatch arch/mips/sgi-ip22/ip22-reset.c
--- 25/arch/mips/sgi-ip22/ip22-reset.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip22/ip22-reset.c 2004-02-19 12:53:02.000000000 -0800
@@ -6,6 +6,8 @@
* Copyright (C) 1997, 1998, 2001, 2003 by Ralf Baechle
*/
#include <linux/init.h>
+#include <linux/ds1286.h>
+#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/sched.h>
@@ -16,10 +18,10 @@
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/reboot.h>
-#include <asm/ds1286.h>
#include <asm/sgialib.h>
#include <asm/sgi/ioc.h>
#include <asm/sgi/hpc3.h>
+#include <asm/sgi/mc.h>
#include <asm/sgi/ip22.h>
/*
@@ -45,12 +47,12 @@ static void sgi_machine_restart(char *co
static void sgi_machine_halt(void) __attribute__((noreturn));
static void sgi_machine_power_off(void) __attribute__((noreturn));
-/* XXX How to pass the reboot command to the firmware??? */
static void sgi_machine_restart(char *command)
{
if (machine_state & MACHINE_SHUTTING_DOWN)
sgi_machine_power_off();
- ArcReboot();
+ sgimc->cpuctrl0 |= SGIMC_CCTRL0_SYSINIT;
+ while (1);
}
static void sgi_machine_halt(void)
@@ -62,23 +64,23 @@ static void sgi_machine_halt(void)
static void sgi_machine_power_off(void)
{
- unsigned char val;
+ unsigned int tmp;
local_irq_disable();
/* Disable watchdog */
- val = CMOS_READ(RTC_CMD);
- CMOS_WRITE(val | RTC_WAM, RTC_CMD);
- CMOS_WRITE(0, RTC_WSEC);
- CMOS_WRITE(0, RTC_WHSEC);
+ tmp = hpc3c0->rtcregs[RTC_CMD] & 0xff;
+ hpc3c0->rtcregs[RTC_CMD] = tmp | RTC_WAM;
+ hpc3c0->rtcregs[RTC_WSEC] = 0;
+ hpc3c0->rtcregs[RTC_WHSEC] = 0;
- while(1) {
+ while (1) {
sgioc->panel = ~SGIOC_PANEL_POWERON;
/* Good bye cruel world ... */
/* If we're still running, we probably got sent an alarm
interrupt. Read the flag to clear it. */
- val = CMOS_READ(RTC_HOURS_ALARM);
+ tmp = hpc3c0->rtcregs[RTC_HOURS_ALARM];
}
}
@@ -112,7 +114,7 @@ static void debounce(unsigned long data)
}
if (machine_state & MACHINE_PANICED)
- ArcReboot();
+ sgimc->cpuctrl0 |= SGIMC_CCTRL0_SYSINIT;
enable_irq(SGI_PANEL_IRQ);
}
@@ -139,6 +141,8 @@ static inline void power_button(void)
void (*indy_volume_button)(int) = NULL;
+EXPORT_SYMBOL(indy_volume_button);
+
static inline void volume_up_button(unsigned long data)
{
del_timer(&volume_timer);
@@ -182,12 +186,10 @@ static irqreturn_t panel_int(int irq, vo
}
/* Power button was pressed
- *
* ioc.ps page 22: "The Panel Register is called Power Control by Full
* House. Only lowest 2 bits are used. Guiness uses upper four bits
* for volume control". This is not true, all bits are pulled high
- * on fullhouse
- */
+ * on fullhouse */
if (ip22_is_fullhouse() || !(buttons & SGIOC_PANEL_POWERINTR)) {
power_button();
return IRQ_HANDLED;
diff -puN -L arch/mips/sgi-ip22/ip22-rtc.c arch/mips/sgi-ip22/ip22-rtc.c~mips-megapatch /dev/null
--- 25/arch/mips/sgi-ip22/ip22-rtc.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,32 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * RTC routines for Indy style attached Dallas chip.
- *
- * Copyright (C) 1998, 2001 by Ralf Baechle
- */
-#include <asm/ds1286.h>
-#include <asm/sgi/hpc3.h>
-
-static unsigned char ip22_rtc_read_data(unsigned long addr)
-{
- return hpc3c0->rtcregs[addr];
-}
-
-static void ip22_rtc_write_data(unsigned char data, unsigned long addr)
-{
- hpc3c0->rtcregs[addr] = data;
-}
-
-static int ip22_rtc_bcd_mode(void)
-{
- return 0;
-}
-
-struct rtc_ops ip22_rtc_ops = {
- &ip22_rtc_read_data,
- &ip22_rtc_write_data,
- &ip22_rtc_bcd_mode
-};
diff -puN arch/mips/sgi-ip22/ip22-setup.c~mips-megapatch arch/mips/sgi-ip22/ip22-setup.c
--- 25/arch/mips/sgi-ip22/ip22-setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip22/ip22-setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -5,6 +5,7 @@
* Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
*/
#include <linux/config.h>
+#include <linux/ds1286.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/kdev_t.h>
@@ -18,7 +19,6 @@
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/reboot.h>
-#include <asm/ds1286.h>
#include <asm/time.h>
#include <asm/gdb-stub.h>
#include <asm/io.h>
@@ -34,12 +34,6 @@ extern void breakpoint(void);
static int remote_debug = 0;
#endif
-#if defined(CONFIG_IP22_SERIAL_CONSOLE) || defined(CONFIG_ARC_CONSOLE)
-extern void console_setup(char *);
-#endif
-
-extern struct rtc_ops ip22_rtc_ops;
-
unsigned long sgi_gfxaddr;
/*
@@ -63,7 +57,7 @@ void ip22_do_break(void)
extern void ip22_be_init(void) __init;
extern void ip22_time_init(void) __init;
-void __init ip22_setup(void)
+static int __init ip22_setup(void)
{
char *ctype;
#ifdef CONFIG_KGDB
@@ -87,8 +81,8 @@ void __init ip22_setup(void)
indy_sc_init();
#endif
- /* Set the IO space to some sane value */
- set_io_port_base (KSEG1ADDR (0x00080000));
+ /* Set EISA IO port base for Indigo2 */
+ set_io_port_base(KSEG1ADDR(0x00080000));
/* ARCS console environment variable is set to "g?" for
* graphics console, it is set to "d" for the first serial
@@ -96,20 +90,17 @@ void __init ip22_setup(void)
*/
ctype = ArcGetEnvironmentVariable("console");
if (ctype && *ctype == 'd') {
-#ifdef CONFIG_IP22_SERIAL_CONSOLE
- if (*(ctype + 1) == '2')
- console_setup("ttyS1");
- else
- console_setup("ttyS0");
-#endif
- }
-#ifdef CONFIG_ARC_CONSOLE
- else if (!ctype || *ctype != 'g') {
+ static char options[8];
+ char *baud = ArcGetEnvironmentVariable("dbaud");
+ if (baud)
+ strcpy(options, baud);
+ add_preferred_console("ttyS", *(ctype + 1) == '2' ? 1 : 0,
+ baud ? options : NULL);
+ } else if (!ctype || *ctype != 'g') {
/* Use ARC if we don't want serial ('d') or Newport ('g'). */
prom_flags |= PROM_FLAG_USE_AS_CONSOLE;
- console_setup("arc");
+ add_preferred_console("arc", 0, NULL);
}
-#endif
#ifdef CONFIG_KGDB
kgdb_ttyd = prom_getcmdline();
@@ -133,14 +124,13 @@ void __init ip22_setup(void)
#endif
#ifdef CONFIG_VT
- conswitchp = &dummy_con;
#ifdef CONFIG_SGI_NEWPORT_CONSOLE
if (ctype && *ctype == 'g'){
- unsigned long *gfxinfo;
- long (*__vec)(void) =
- (void *) *(long *)((PROMBLOCK)->pvector + 0x20);
+ ULONG *gfxinfo;
+ ULONG * (*__vec)(void) = (void *) (long)
+ *((_PULONG *)(long)((PROMBLOCK)->pvector + 0x20));
- gfxinfo = (unsigned long *)__vec();
+ gfxinfo = __vec();
sgi_gfxaddr = ((gfxinfo[1] >= 0xa0000000
&& gfxinfo[1] <= 0xc0000000)
? gfxinfo[1] - 0xa0000000 : 0);
@@ -148,21 +138,12 @@ void __init ip22_setup(void)
/* newport addresses? */
if (sgi_gfxaddr == 0x1f0f0000 || sgi_gfxaddr == 0x1f4f0000) {
conswitchp = &newport_con;
-
- screen_info = (struct screen_info) {
- .orig_x = 0,
- .orig_y = 0,
- .orig_video_page = 0,
- .orig_video_mode = 0,
- .orig_video_cols = 160,
- .orig_video_ega_bx = 0,
- .orig_video_lines = 64,
- .orig_video_isVGA = 0,
- .orig_video_points = 16,
- };
}
}
#endif
#endif
- rtc_ops = &ip22_rtc_ops;
+
+ return 0;
}
+
+early_initcall(ip22_setup);
diff -puN arch/mips/sgi-ip22/ip22-time.c~mips-megapatch arch/mips/sgi-ip22/ip22-time.c
--- 25/arch/mips/sgi-ip22/ip22-time.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip22/ip22-time.c 2004-02-19 12:53:02.000000000 -0800
@@ -7,9 +7,10 @@
* Ralf Baechle or David S. Miller (sorry guys, i'm really not sure)
*
* Copyright (C) 2001 by Ladislav Michl
+ * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
*/
-
#include <linux/bcd.h>
+#include <linux/ds1286.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
@@ -21,7 +22,6 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/time.h>
-#include <asm/ds1286.h>
#include <asm/sgialib.h>
#include <asm/sgi/ioc.h>
#include <asm/sgi/hpc3.h>
@@ -41,7 +41,7 @@ static unsigned long indy_rtc_get_time(v
sec = BCD2BIN(hpc3c0->rtcregs[RTC_SECONDS] & 0xff);
min = BCD2BIN(hpc3c0->rtcregs[RTC_MINUTES] & 0xff);
- hrs = BCD2BIN(hpc3c0->rtcregs[RTC_HOURS] & 0x1f);
+ hrs = BCD2BIN(hpc3c0->rtcregs[RTC_HOURS] & 0x3f);
day = BCD2BIN(hpc3c0->rtcregs[RTC_DATE] & 0xff);
mon = BCD2BIN(hpc3c0->rtcregs[RTC_MONTH] & 0x1f);
yrs = BCD2BIN(hpc3c0->rtcregs[RTC_YEAR] & 0xff);
@@ -114,7 +114,7 @@ static unsigned long dosample(void)
* for every 1/HZ seconds. We round off the nearest 1 MHz of master
* clock (= 1000000 / HZ / 2).
*/
- //return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);
+ /*return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);*/
return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
}
@@ -164,7 +164,7 @@ static __init void indy_time_init(void)
(int) (r4k_tick / (500000 / HZ)),
(int) (r4k_tick % (500000 / HZ)));
- mips_counter_frequency = r4k_tick * HZ;
+ mips_hpt_frequency = r4k_tick * HZ;
}
/* Generic SGI handler for (spurious) 8254 interrupts */
diff -puN arch/mips/sgi-ip22/Makefile~mips-megapatch arch/mips/sgi-ip22/Makefile
--- 25/arch/mips/sgi-ip22/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip22/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -4,8 +4,7 @@
#
obj-y += ip22-mc.o ip22-hpc.o ip22-int.o ip22-irq.o ip22-berr.o \
- ip22-time.o ip22-rtc.o ip22-nvram.o ip22-reset.o \
- ip22-setup.o ip22-ksyms.o
+ ip22-time.o ip22-nvram.o ip22-reset.o ip22-setup.o
obj-$(CONFIG_EISA) += ip22-eisa.o
diff -puN arch/mips/sgi-ip27/ip27-console.c~mips-megapatch arch/mips/sgi-ip27/ip27-console.c
--- 25/arch/mips/sgi-ip27/ip27-console.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip27/ip27-console.c 2004-02-19 12:53:02.000000000 -0800
@@ -9,16 +9,23 @@
#include <linux/console.h>
#include <linux/kdev_t.h>
#include <linux/major.h>
-#include <linux/serial.h>
+#include <linux/termios.h>
+#include <linux/sched.h>
+#include <linux/tty.h>
+
#include <asm/page.h>
+#include <asm/semaphore.h>
#include <asm/sn/addrs.h>
#include <asm/sn/sn0/hub.h>
#include <asm/sn/klconfig.h>
#include <asm/sn/ioc3.h>
#include <asm/sn/sn_private.h>
-#define IOC3_BAUD (22000000 / (3*16))
-#define IOC3_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+
+#define IOC3_CLK (22000000 / 3)
+#define IOC3_FLAGS (0)
static inline struct ioc3_uartregs *console_uart(void)
{
@@ -44,19 +51,23 @@ char __init prom_getchar(void)
static void inline ioc3_console_probe(void)
{
- struct serial_struct req;
+ struct uart_port up;
- /* Register to interrupt zero because we share the interrupt with
- the serial driver which we don't properly support yet. */
- memset(&req, 0, sizeof(req));
- req.irq = 0;
- req.flags = IOC3_COM_FLAGS;
- req.io_type = SERIAL_IO_MEM;
- req.iomem_reg_shift = 0;
- req.baud_base = IOC3_BAUD;
+ /*
+ * Register to interrupt zero because we share the interrupt with
+ * the serial driver which we don't properly support yet.
+ */
+ memset(&up, 0, sizeof(up));
+ up.membase = (unsigned char *) console_uart();
+ up.irq = 0;
+ up.uartclk = IOC3_CLK;
+ up.regshift = 0;
+ up.iotype = UPIO_MEM;
+ up.flags = IOC3_FLAGS;
+ up.line = 0;
- req.iomem_base = (unsigned char *) console_uart();
- register_serial(&req);
+ if (early_serial_setup(&up))
+ printk(KERN_ERR "Early serial init of port 0 failed\n");
}
__init void ip27_setup_console(void)
diff -puN arch/mips/sgi-ip27/ip27-init.c~mips-megapatch arch/mips/sgi-ip27/ip27-init.c
--- 25/arch/mips/sgi-ip27/ip27-init.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip27/ip27-init.c 2004-02-19 12:53:02.000000000 -0800
@@ -6,13 +6,13 @@
* Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
* Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
*/
-
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/mmzone.h> /* for numnodes */
#include <linux/mm.h>
+#include <linux/cpumask.h>
#include <asm/cpu.h>
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
@@ -34,25 +34,12 @@
#include <asm/sn/sn_private.h>
#include <asm/sn/sn0/ip27.h>
#include <asm/sn/mapped_kernel.h>
-#include <asm/sn/sn0/addrs.h>
-#include <asm/sn/gda.h>
#define CPU_NONE (cpuid_t)-1
-/*
- * The following should work till 64 nodes, ie 128p SN0s.
- */
-#define CNODEMASK_CLRALL(p) (p) = 0
-#define CNODEMASK_TSTB(p, bit) ((p) & (1ULL << (bit)))
-#define CNODEMASK_SETB(p, bit) ((p) |= 1ULL << (bit))
-
-cpumask_t boot_cpumask;
-hubreg_t region_mask;
+static DECLARE_BITMAP(hub_init_mask, MAX_COMPACT_NODES);
+static hubreg_t region_mask;
static int fine_mode;
-int maxcpus;
-static spinlock_t hub_mask_lock = SPIN_LOCK_UNLOCKED;
-static cnodemask_t hub_init_mask;
-static atomic_t numstarted = ATOMIC_INIT(1);
static int router_distance;
nasid_t master_nasid = INVALID_NASID;
@@ -61,7 +48,7 @@ nasid_t compact_to_nasid_node[MAX_COMPA
cnodeid_t cpuid_to_compact_node[MAXCPUS];
char node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
-hubreg_t get_region(cnodeid_t cnode)
+static hubreg_t get_region(cnodeid_t cnode)
{
if (fine_mode)
return COMPACT_TO_NASID_NODEID(cnode) >> NASID_TO_FINEREG_SHFT;
@@ -79,312 +66,47 @@ static void gen_region_mask(hubreg_t *re
}
}
-int is_fine_dirmode(void)
+static int is_fine_dirmode(void)
{
return (((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_REGIONSIZE_MASK)
>> NSRI_REGIONSIZE_SHFT) & REGIONSIZE_FINE);
}
-nasid_t get_actual_nasid(lboard_t *brd)
-{
- klhub_t *hub;
-
- if (!brd)
- return INVALID_NASID;
-
- /* find out if we are a completely disabled brd. */
- hub = (klhub_t *)find_first_component(brd, KLSTRUCT_HUB);
- if (!hub)
- return INVALID_NASID;
- if (!(hub->hub_info.flags & KLINFO_ENABLE)) /* disabled node brd */
- return hub->hub_info.physid;
- else
- return brd->brd_nasid;
-}
-
-/* Tweak this for maximum number of CPUs to activate */
-static int max_cpus = NR_CPUS;
-
-int do_cpumask(cnodeid_t cnode, nasid_t nasid, cpumask_t *boot_cpumask,
- int *highest)
-{
- static int tot_cpus_found = 0;
- lboard_t *brd;
- klcpu_t *acpu;
- int cpus_found = 0;
- cpuid_t cpuid;
-
- brd = find_lboard((lboard_t *)KL_CONFIG_INFO(nasid), KLTYPE_IP27);
-
- do {
- acpu = (klcpu_t *)find_first_component(brd, KLSTRUCT_CPU);
- while (acpu) {
- cpuid = acpu->cpu_info.virtid;
- /* cnode is not valid for completely disabled brds */
- if (get_actual_nasid(brd) == brd->brd_nasid)
- cpuid_to_compact_node[cpuid] = cnode;
- if (cpuid > *highest)
- *highest = cpuid;
- /* Only let it join in if it's marked enabled */
- if ((acpu->cpu_info.flags & KLINFO_ENABLE) &&
- (tot_cpus_found != max_cpus)) {
- CPUMASK_SETB(*boot_cpumask, cpuid);
- cpus_found++;
- tot_cpus_found++;
- }
- acpu = (klcpu_t *)find_component(brd, (klinfo_t *)acpu,
- KLSTRUCT_CPU);
- }
- brd = KLCF_NEXT(brd);
- if (brd)
- brd = find_lboard(brd,KLTYPE_IP27);
- else
- break;
- } while (brd);
-
- return cpus_found;
-}
-
-cpuid_t cpu_node_probe(cpumask_t *boot_cpumask, int *numnodes)
-{
- int i, cpus = 0, highest = 0;
- gda_t *gdap = GDA;
- nasid_t nasid;
-
- /*
- * Initialize the arrays to invalid nodeid (-1)
- */
- for (i = 0; i < MAX_COMPACT_NODES; i++)
- compact_to_nasid_node[i] = INVALID_NASID;
- for (i = 0; i < MAX_NASIDS; i++)
- nasid_to_compact_node[i] = INVALID_CNODEID;
- for (i = 0; i < MAXCPUS; i++)
- cpuid_to_compact_node[i] = INVALID_CNODEID;
-
- *numnodes = 0;
- for (i = 0; i < MAX_COMPACT_NODES; i++) {
- if ((nasid = gdap->g_nasidtable[i]) == INVALID_NASID) {
- break;
- } else {
- compact_to_nasid_node[i] = nasid;
- nasid_to_compact_node[nasid] = i;
- (*numnodes)++;
- cpus += do_cpumask(i, nasid, boot_cpumask, &highest);
- }
- }
-
- /*
- * Cpus are numbered in order of cnodes. Currently, disabled
- * cpus are not numbered.
- */
-
- return highest + 1;
-}
-
-int cpu_enabled(cpuid_t cpu)
+extern void pcibr_setup(cnodeid_t);
+void per_hub_init(cnodeid_t cnode)
{
- if (cpu == CPU_NONE)
- return 0;
- return CPUMASK_TSTB(boot_cpumask, cpu) != 0;
-}
+ nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode);
-void mlreset(void)
-{
- int i;
- void init_topology_matrix(void);
- void dump_topology(void);
-
-
- master_nasid = get_nasid();
- fine_mode = is_fine_dirmode();
+ if (test_and_set_bit(cnode, hub_init_mask))
+ return;
/*
- * Probe for all CPUs - this creates the cpumask and
- * sets up the mapping tables.
+ * Set CRB timeout at 5ms, (< PI timeout of 10ms)
*/
- CPUMASK_CLRALL(boot_cpumask);
- maxcpus = cpu_node_probe(&boot_cpumask, &numnodes);
- printk("Discovered %d cpus on %d nodes\n", maxcpus, numnodes);
+ REMOTE_HUB_S(nasid, IIO_ICTP, 0x800);
+ REMOTE_HUB_S(nasid, IIO_ICTO, 0xff);
- init_topology_matrix();
- dump_topology();
-
- gen_region_mask(®ion_mask, numnodes);
- CNODEMASK_CLRALL(hub_init_mask);
-
- setup_replication_mask(numnodes);
+ hub_rtc_init(cnode);
+ pcibr_setup(cnode);
+#ifdef CONFIG_REPLICATE_EXHANDLERS
/*
- * Set all nodes' calias sizes to 8k
+ * If this is not a headless node initialization,
+ * copy over the caliased exception handlers.
*/
- for (i = 0; i < numnodes; i++) {
- nasid_t nasid;
-
- nasid = COMPACT_TO_NASID_NODEID(i);
-
- /*
- * Always have node 0 in the region mask, otherwise
- * CALIAS accesses get exceptions since the hub
- * thinks it is a node 0 address.
- */
- REMOTE_HUB_S(nasid, PI_REGION_PRESENT, (region_mask | 1));
-#ifdef CONFIG_REPLICATE_EXHANDLERS
- REMOTE_HUB_S(nasid, PI_CALIAS_SIZE, PI_CALIAS_SIZE_8K);
-#else
- REMOTE_HUB_S(nasid, PI_CALIAS_SIZE, PI_CALIAS_SIZE_0);
-#endif
-
-#ifdef LATER
- /*
- * Set up all hubs to have a big window pointing at
- * widget 0. Memory mode, widget 0, offset 0
- */
- REMOTE_HUB_S(nasid, IIO_ITTE(SWIN0_BIGWIN),
- ((HUB_PIO_MAP_TO_MEM << IIO_ITTE_IOSP_SHIFT) |
- (0 << IIO_ITTE_WIDGET_SHIFT)));
-#endif
- }
-}
-
-
-void intr_clear_bits(nasid_t nasid, volatile hubreg_t *pend, int base_level,
- char *name)
-{
- volatile hubreg_t bits;
- int i;
-
- /* Check pending interrupts */
- if ((bits = HUB_L(pend)) != 0)
- for (i = 0; i < N_INTPEND_BITS; i++)
- if (bits & (1 << i))
- LOCAL_HUB_CLR_INTR(base_level + i);
-}
-
-void intr_clear_all(nasid_t nasid)
-{
- REMOTE_HUB_S(nasid, PI_INT_MASK0_A, 0);
- REMOTE_HUB_S(nasid, PI_INT_MASK0_B, 0);
- REMOTE_HUB_S(nasid, PI_INT_MASK1_A, 0);
- REMOTE_HUB_S(nasid, PI_INT_MASK1_B, 0);
- intr_clear_bits(nasid, REMOTE_HUB_ADDR(nasid, PI_INT_PEND0),
- INT_PEND0_BASELVL, "INT_PEND0");
- intr_clear_bits(nasid, REMOTE_HUB_ADDR(nasid, PI_INT_PEND1),
- INT_PEND1_BASELVL, "INT_PEND1");
-}
-
-void sn_mp_setup(void)
-{
- cnodeid_t cnode;
-#if 0
- cpuid_t cpu;
-#endif
-
- for (cnode = 0; cnode < numnodes; cnode++) {
-#if 0
- init_platform_nodepda();
-#endif
- intr_clear_all(COMPACT_TO_NASID_NODEID(cnode));
+ if (get_compact_nodeid() == cnode) {
+ extern char except_vec0, except_vec1_r10k;
+ extern char except_vec2_generic, except_vec3_generic;
+
+ memcpy((void *)(KSEG0 + 0x100), &except_vec2_generic, 0x80);
+ memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
+ memcpy((void *)KSEG0, &except_vec0, 0x80);
+ memcpy((void *)KSEG0 + 0x080, &except_vec1_r10k, 0x80);
+ memcpy((void *)(KSEG0 + 0x100), (void *) KSEG0, 0x80);
+ memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x100);
+ __flush_cache_all();
}
-#if 0
- for (cpu = 0; cpu < maxcpus; cpu++) {
- init_platform_pda();
- }
-#endif
-}
-
-void per_hub_init(cnodeid_t cnode)
-{
- extern void pcibr_setup(cnodeid_t);
- cnodemask_t done;
- nasid_t nasid;
-
- nasid = COMPACT_TO_NASID_NODEID(cnode);
-
- spin_lock(&hub_mask_lock);
- /* Test our bit. */
- if (!(done = CNODEMASK_TSTB(hub_init_mask, cnode))) {
- /* Turn our bit on in the mask. */
- CNODEMASK_SETB(hub_init_mask, cnode);
- /*
- * Do the actual initialization if it hasn't been done yet.
- * We don't need to hold a lock for this work.
- */
- /*
- * Set CRB timeout at 5ms, (< PI timeout of 10ms)
- */
- REMOTE_HUB_S(nasid, IIO_ICTP, 0x800);
- REMOTE_HUB_S(nasid, IIO_ICTO, 0xff);
- hub_rtc_init(cnode);
- pcibr_setup(cnode);
-#ifdef CONFIG_REPLICATE_EXHANDLERS
- /*
- * If this is not a headless node initialization,
- * copy over the caliased exception handlers.
- */
- if (get_compact_nodeid() == cnode) {
- extern char except_vec0, except_vec1_r10k;
- extern char except_vec2_generic, except_vec3_generic;
-
- memcpy((void *)(KSEG0 + 0x100), &except_vec2_generic,
- 0x80);
- memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic,
- 0x80);
- memcpy((void *)KSEG0, &except_vec0, 0x80);
- memcpy((void *)KSEG0 + 0x080, &except_vec1_r10k, 0x80);
- memcpy((void *)(KSEG0 + 0x100), (void *) KSEG0, 0x80);
- memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic,
- 0x100);
- __flush_cache_all();
- }
-#endif
- }
- spin_unlock(&hub_mask_lock);
-}
-
-/*
- * This is similar to hard_smp_processor_id().
- */
-cpuid_t getcpuid(void)
-{
- klcpu_t *klcpu;
-
- klcpu = nasid_slice_to_cpuinfo(get_nasid(),LOCAL_HUB_L(PI_CPU_NUM));
- return klcpu->cpu_info.virtid;
-}
-
-void per_cpu_init(void)
-{
- extern void install_cpu_nmi_handler(int slice);
- extern void load_mmu(void);
- static int is_slave = 0;
- int cpu = smp_processor_id();
- cnodeid_t cnode = get_compact_nodeid();
-
-#if 0
- intr_init();
-#endif
- clear_c0_status(ST0_IM);
- per_hub_init(cnode);
- cpu_time_init();
- if (smp_processor_id()) /* master can't do this early, no kmalloc */
- install_cpuintr(cpu);
- /* Install our NMI handler if symmon hasn't installed one. */
- install_cpu_nmi_handler(cputoslice(cpu));
-#if 0
- install_tlbintr(cpu);
#endif
- set_c0_status(SRB_DEV0 | SRB_DEV1);
- if (is_slave) {
- clear_c0_status(ST0_BEV);
- if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
- set_c0_status(ST0_XX);
- set_c0_status(ST0_KX|ST0_SX|ST0_UX);
- local_irq_enable();
- load_mmu();
- atomic_inc(&numstarted);
- } else {
- is_slave = 1;
- }
}
cnodeid_t get_compact_nodeid(void)
@@ -399,154 +121,9 @@ cnodeid_t get_compact_nodeid(void)
return NASID_TO_COMPACT_NODEID(nasid);
}
-#ifdef CONFIG_SMP
-
-/*
- * Takes as first input the PROM assigned cpu id, and the kernel
- * assigned cpu id as the second.
- */
-static void alloc_cpupda(cpuid_t cpu, int cpunum)
-{
- cnodeid_t node;
- nasid_t nasid;
-
- node = get_cpu_cnode(cpu);
- nasid = COMPACT_TO_NASID_NODEID(node);
-
- cputonasid(cpunum) = nasid;
- cputocnode(cpunum) = node;
- cputoslice(cpunum) = get_cpu_slice(cpu);
- cpu_data[cpunum].p_cpuid = cpu;
-}
-
-static struct task_struct * __init fork_by_hand(void)
-{
- struct pt_regs regs;
- /*
- * don't care about the eip and regs settings since
- * we'll never reschedule the forked task.
- */
- return copy_process(CLONE_VM|CLONE_IDLETASK, 0, ®s, 0, NULL, NULL);
-}
-
-static int __init do_boot_cpu(int cpu, int num_cpus)
-{
- extern void smp_bootstrap(void);
- cpuid_t mycpuid = getcpuid();
- struct task_struct *idle;
-
- if (cpu == mycpuid) {
- alloc_cpupda(cpu, num_cpus);
- return 1;
- }
-
- /* Skip holes in CPU space */
- if (!CPUMASK_TSTB(boot_cpumask, cpu))
- return 0;
-
- /*
- * The following code is purely to make sure
- * Linux can schedule processes on this slave.
- */
- idle = fork_by_hand();
- if (IS_ERR(idle))
- panic("failed fork for CPU %d", cpu);
-
- /*
- * We remove it from the pidhash and the runqueue
- * once we got the process:
- */
- init_idle(idle, cpu);
-
- alloc_cpupda(cpu, num_cpus);
-
- unhash_process(idle);
-
- /*
- * Launch a slave into smp_bootstrap(). It doesn't take an
- * argument, and we set sp to the kernel stack of the newly
- * created idle process, gp to the proc struct so that
- * current_thread_info() will work.
- */
- LAUNCH_SLAVE(cputonasid(num_cpus),cputoslice(num_cpus),
- (launch_proc_t)MAPPED_KERN_RW_TO_K0(smp_bootstrap),
- 0, (void *)((unsigned long)idle->thread_info +
- THREAD_SIZE - 32), (void *)idle);
-
- /*
- * Now optimistically set the mapping arrays. We
- * need to wait here, verify the cpu booted up, then
- * fire up the next cpu.
- */
- __cpu_number_map[cpu] = num_cpus;
- __cpu_logical_map[num_cpus] = cpu;
- cpu_set(cpu, cpu_online_map);
-
- /*
- * Wait this cpu to start up and initialize its hub,
- * and discover the io devices it will control.
- *
- * XXX: We really want to fire up launch all the CPUs
- * at once. We have to preserve the order of the
- * devices on the bridges first though.
- */
- while (atomic_read(&numstarted) != num_cpus);
-
- return 1;
-}
-
-void __init smp_boot_cpus(void)
-{
- int num_cpus = 0;
- cpuid_t cpu;
- cnodeid_t cnode;
-
- init_new_context(current, &init_mm);
- current_thread_info()->cpu = 0;
- smp_tune_scheduling();
-
- sn_mp_setup();
- /* Master has already done per_cpu_init() */
- install_cpuintr(smp_processor_id());
-#if 0
- bte_lateinit();
- ecc_init();
-#endif
-
- replicate_kernel_text(numnodes);
- /* Launch slaves. */
- for (cpu = 0; cpu < maxcpus; cpu++) {
- num_cpus += do_boot_cpu(cpu, num_cpus);
- }
-
-#ifdef LATER
- Wait logic goes here.
-#endif
- for (cnode = 0; cnode < numnodes; cnode++) {
-#if 0
- if (cnodetocpu(cnode) == -1) {
- printk("Initializing headless hub,cnode %d", cnode);
- per_hub_init(cnode);
- }
-#endif
- }
-#if 0
- cpu_io_setup();
- init_mfhi_war();
-#endif
-}
-
-#else /* CONFIG_SMP */
-void __init start_secondary(void)
-{
- /* XXX Why do we need this empty definition at all? */
-}
-#endif /* CONFIG_SMP */
-
-
#define rou_rflag rou_flags
-void router_recurse(klrou_t *router_a, klrou_t *router_b, int depth)
+static void router_recurse(klrou_t *router_a, klrou_t *router_b, int depth)
{
klrou_t *router;
lboard_t *brd;
@@ -582,13 +159,13 @@ void router_recurse(klrou_t *router_a, k
router_a->rou_rflag = 0;
}
-int node_distance(nasid_t nasid_a, nasid_t nasid_b)
+static int node_distance(nasid_t nasid_a, nasid_t nasid_b)
{
- nasid_t nasid;
- cnodeid_t cnode;
+ klrou_t *router, *router_a = NULL, *router_b = NULL;
lboard_t *brd, *dest_brd;
+ cnodeid_t cnode;
+ nasid_t nasid;
int port;
- klrou_t *router, *router_a = NULL, *router_b = NULL;
/* Figure out which routers nodes in question are connected to */
for (cnode = 0; cnode < numnodes; cnode++) {
@@ -625,7 +202,7 @@ int node_distance(nasid_t nasid_a, nasid
}
}
- } while ( (brd = find_lboard_class(KLCF_NEXT(brd), KLTYPE_ROUTER)) );
+ } while ((brd = find_lboard_class(KLCF_NEXT(brd), KLTYPE_ROUTER)));
}
if (router_a == NULL) {
@@ -649,7 +226,7 @@ int node_distance(nasid_t nasid_a, nasid
return router_distance;
}
-void init_topology_matrix(void)
+static void init_topology_matrix(void)
{
nasid_t nasid, nasid2;
cnodeid_t row, col;
@@ -667,7 +244,7 @@ void init_topology_matrix(void)
}
}
-void dump_topology(void)
+static void dump_topology(void)
{
nasid_t nasid;
cnodeid_t cnode;
@@ -728,93 +305,56 @@ void dump_topology(void)
}
}
-#if 0
-#define brd_widgetnum brd_slot
-#define NODE_OFFSET_TO_KLINFO(n,off) ((klinfo_t*) TO_NODE_CAC(n,off))
-void
-dump_klcfg(void)
+void mlreset(void)
{
- cnodeid_t cnode;
int i;
- nasid_t nasid;
- lboard_t *lbptr;
- gda_t *gdap;
-
- gdap = (gda_t *)GDA_ADDR(get_nasid());
- if (gdap->g_magic != GDA_MAGIC) {
- printk("dumpklcfg_cmd: Invalid GDA MAGIC\n");
- return;
- }
- for (cnode = 0; cnode < MAX_COMPACT_NODES; cnode ++) {
- nasid = gdap->g_nasidtable[cnode];
+ master_nasid = get_nasid();
+ fine_mode = is_fine_dirmode();
- if (nasid == INVALID_NASID)
- continue;
+ /*
+ * Probe for all CPUs - this creates the cpumask and sets up the
+ * mapping tables. We need to do this as early as possible.
+ */
+#ifdef CONFIG_SMP
+ cpu_node_probe();
+#endif
- printk("\nDumpping klconfig Nasid %d:\n", nasid);
+ init_topology_matrix();
+ dump_topology();
- lbptr = KL_CONFIG_INFO(nasid);
+ gen_region_mask(®ion_mask, numnodes);
- while (lbptr) {
- printk(" %s, Nasid %d, Module %d, widget 0x%x, partition %d, NIC 0x%x lboard 0x%lx",
- "board name here", /* BOARD_NAME(lbptr->brd_type), */
- lbptr->brd_nasid, lbptr->brd_module,
- lbptr->brd_widgetnum,
- lbptr->brd_partition,
- (lbptr->brd_nic), lbptr);
- if (lbptr->brd_flags & DUPLICATE_BOARD)
- printk(" -D");
- printk("\n");
- for (i = 0; i < lbptr->brd_numcompts; i++) {
- klinfo_t *kli;
- kli = NODE_OFFSET_TO_KLINFO(NASID_GET(lbptr), lbptr->brd_compts[i]);
- printk(" type %2d, flags 0x%04x, diagval %3d, physid %4d, virtid %2d: %s\n",
- kli->struct_type,
- kli->flags,
- kli->diagval,
- kli->physid,
- kli->virtid,
- "comp. name here");
- /* COMPONENT_NAME(kli->struct_type)); */
- }
- lbptr = KLCF_NEXT(lbptr);
- }
- }
- printk("\n");
+ setup_replication_mask(numnodes);
+
+ /*
+ * Set all nodes' calias sizes to 8k
+ */
+ for (i = 0; i < numnodes; i++) {
+ nasid_t nasid;
- /* Useful to print router maps also */
+ nasid = COMPACT_TO_NASID_NODEID(i);
- for (cnode = 0; cnode < MAX_COMPACT_NODES; cnode ++) {
- klrou_t *kr;
- int i;
-
- nasid = gdap->g_nasidtable[cnode];
- if (nasid == INVALID_NASID)
- continue;
- lbptr = KL_CONFIG_INFO(nasid);
-
- while (lbptr) {
-
- lbptr = find_lboard_class(lbptr, KLCLASS_ROUTER);
- if(!lbptr)
- break;
- if (!KL_CONFIG_DUPLICATE_BOARD(lbptr)) {
- printk("%llx -> \n", lbptr->brd_nic);
- kr = (klrou_t *)find_first_component(lbptr,
- KLSTRUCT_ROU);
- for (i = 1; i <= MAX_ROUTER_PORTS; i++) {
- printk("[%d, %llx]; ",
- kr->rou_port[i].port_nasid,
- kr->rou_port[i].port_offset);
- }
- printk("\n");
- }
- lbptr = KLCF_NEXT(lbptr);
- }
- printk("\n");
- }
+ /*
+ * Always have node 0 in the region mask, otherwise
+ * CALIAS accesses get exceptions since the hub
+ * thinks it is a node 0 address.
+ */
+ REMOTE_HUB_S(nasid, PI_REGION_PRESENT, (region_mask | 1));
+#ifdef CONFIG_REPLICATE_EXHANDLERS
+ REMOTE_HUB_S(nasid, PI_CALIAS_SIZE, PI_CALIAS_SIZE_8K);
+#else
+ REMOTE_HUB_S(nasid, PI_CALIAS_SIZE, PI_CALIAS_SIZE_0);
+#endif
- dump_topology();
-}
+#ifdef LATER
+ /*
+ * Set up all hubs to have a big window pointing at
+ * widget 0. Memory mode, widget 0, offset 0
+ */
+ REMOTE_HUB_S(nasid, IIO_ITTE(SWIN0_BIGWIN),
+ ((HUB_PIO_MAP_TO_MEM << IIO_ITTE_IOSP_SHIFT) |
+ (0 << IIO_ITTE_WIDGET_SHIFT)));
#endif
+ }
+}
diff -puN arch/mips/sgi-ip27/ip27-irq.c~mips-megapatch arch/mips/sgi-ip27/ip27-irq.c
--- 25/arch/mips/sgi-ip27/ip27-irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip27/ip27-irq.c 2004-02-19 12:53:02.000000000 -0800
@@ -38,7 +38,6 @@
#include <asm/sn/intr.h>
#include <asm/sn/intr_public.h>
-
#undef DEBUG_IRQ
#ifdef DEBUG_IRQ
#define DBG(x...) printk(x)
@@ -46,10 +45,18 @@
#define DBG(x...)
#endif
-/* These should die */
-unsigned char bus_to_wid[256]; /* widget id for linux pci bus */
-unsigned char bus_to_nid[256]; /* nasid for linux pci bus */
-unsigned char num_bridges; /* number of bridges in the system */
+/*
+ * Number of levels in INT_PEND0. Can be set to 128 if we also
+ * consider INT_PEND1.
+ */
+#define PERNODE_LEVELS 64
+
+/*
+ * we need to map irq's up to at least bit 7 of the INT_MASK0_A register
+ * since bits 0-6 are pre-allocated for other purposes.
+ */
+#define FAST_IRQ_TO_LEVEL(i) (i)
+#define LEVEL_TO_IRQ(c, l) (node_level_to_irq[CPUID_TO_COMPACT_NODEID(c)][(l)])
/*
* Linux has a controller-independent x86 interrupt architecture.
@@ -69,30 +76,26 @@ unsigned char num_bridges; /* number of
extern asmlinkage void ip27_irq(void);
-extern int irq_to_bus[], irq_to_slot[], bus_to_cpu[];
-int intr_connect_level(int cpu, int bit);
-int intr_disconnect_level(int cpu, int bit);
+extern struct bridge_controller *irq_to_bridge[];
+extern int irq_to_slot[];
/*
* There is a single intpend register per node, and we want to have
* distinct levels for intercpu intrs for both cpus A and B on a node.
*/
-int node_level_to_irq[MAX_COMPACT_NODES][PERNODE_LEVELS];
+static int node_level_to_irq[MAX_COMPACT_NODES][PERNODE_LEVELS];
/*
* use these macros to get the encoded nasid and widget id
* from the irq value
*/
-#define IRQ_TO_BUS(i) irq_to_bus[(i)]
-#define IRQ_TO_CPU(i) bus_to_cpu[IRQ_TO_BUS(i)]
-#define NASID_FROM_PCI_IRQ(i) bus_to_nid[IRQ_TO_BUS(i)]
-#define WID_FROM_PCI_IRQ(i) bus_to_wid[IRQ_TO_BUS(i)]
+#define IRQ_TO_BRIDGE(i) irq_to_bridge[(i)]
#define SLOT_FROM_PCI_IRQ(i) irq_to_slot[i]
static inline int alloc_level(cpuid_t cpunum, int irq)
{
cnodeid_t nodenum = CPUID_TO_COMPACT_NODEID(cpunum);
- int j = LEAST_LEVEL + 3; /* resched & crosscall entries taken */
+ int j = BASE_PCI_IRQ; /* pre-allocated entries */
while (++j < PERNODE_LEVELS) {
if (node_level_to_irq[nodenum][j] == -1) {
@@ -100,9 +103,8 @@ static inline int alloc_level(cpuid_t cp
return j;
}
}
- printk("Cpu %ld flooded with devices\n", cpunum);
- while(1);
- return -1;
+
+ panic("Cpu %ld flooded with devices\n", cpunum);
}
static inline int find_level(cpuid_t *cpunum, int irq)
@@ -111,16 +113,15 @@ static inline int find_level(cpuid_t *cp
cnodeid_t nodenum = INVALID_CNODEID;
while (++nodenum < MAX_COMPACT_NODES) {
- j = LEAST_LEVEL + 3; /* resched & crosscall entries taken */
+ j = BASE_PCI_IRQ; /* Pre-allocated entries */
while (++j < PERNODE_LEVELS)
if (node_level_to_irq[nodenum][j] == irq) {
*cpunum = 0; /* XXX Fixme */
return(j);
}
}
- printk("Could not identify cpu/level for irq %d\n", irq);
- while(1);
- return(-1);
+
+ panic("Could not identify cpu/level for irq %d\n", irq);
}
/*
@@ -150,73 +151,206 @@ static int ms1bit(unsigned long x)
* same intr. This effect is mostly seen for intercpu intrs.
* Kanoj 05.13.00
*/
-void ip27_do_irq(struct pt_regs *regs)
+
+void ip27_do_irq_mask0(struct pt_regs *regs)
{
int irq, swlevel;
hubreg_t pend0, mask0;
- cpuid_t thiscpu = smp_processor_id();
- int pi_int_mask0 = ((cputoslice(thiscpu) == 0) ?
- PI_INT_MASK0_A : PI_INT_MASK0_B);
+ cpuid_t cpu = smp_processor_id();
+ int pi_int_mask0 =
+ (cputoslice(cpu) == 0) ? PI_INT_MASK0_A : PI_INT_MASK0_B;
/* copied from Irix intpend0() */
- while (((pend0 = LOCAL_HUB_L(PI_INT_PEND0)) &
- (mask0 = LOCAL_HUB_L(pi_int_mask0))) != 0) {
- pend0 &= mask0; /* Pick intrs we should look at */
- if (pend0) {
- /* Prevent any of the picked intrs from recursing */
- LOCAL_HUB_S(pi_int_mask0, mask0 & ~(pend0));
- do {
- swlevel = ms1bit(pend0);
- LOCAL_HUB_CLR_INTR(swlevel);
- /* "map" swlevel to irq */
- irq = LEVEL_TO_IRQ(thiscpu, swlevel);
- do_IRQ(irq, regs);
- /* clear bit in pend0 */
- pend0 ^= 1ULL << swlevel;
- } while(pend0);
- /* Now allow the set of serviced intrs again */
- LOCAL_HUB_S(pi_int_mask0, mask0);
- LOCAL_HUB_L(PI_INT_PEND0);
- }
+ pend0 = LOCAL_HUB_L(PI_INT_PEND0);
+ mask0 = LOCAL_HUB_L(pi_int_mask0);
+
+ pend0 &= mask0; /* Pick intrs we should look at */
+ if (!pend0)
+ return;
+
+ /* Prevent any of the picked intrs from recursing */
+ LOCAL_HUB_S(pi_int_mask0, mask0 & ~pend0);
+
+ swlevel = ms1bit(pend0);
+#ifdef CONFIG_SMP
+ if (pend0 & (1UL << CPU_RESCHED_A_IRQ)) {
+ LOCAL_HUB_CLR_INTR(CPU_RESCHED_A_IRQ);
+ } else if (pend0 & (1UL << CPU_RESCHED_B_IRQ)) {
+ LOCAL_HUB_CLR_INTR(CPU_RESCHED_B_IRQ);
+ } else if (pend0 & (1UL << CPU_CALL_A_IRQ)) {
+ LOCAL_HUB_CLR_INTR(CPU_CALL_A_IRQ);
+ smp_call_function_interrupt();
+ } else if (pend0 & (1UL << CPU_CALL_B_IRQ)) {
+ LOCAL_HUB_CLR_INTR(CPU_CALL_B_IRQ);
+ smp_call_function_interrupt();
+ } else
+#endif
+ {
+ /* "map" swlevel to irq */
+ irq = LEVEL_TO_IRQ(cpu, swlevel);
+ do_IRQ(irq, regs);
+ }
+
+ /* clear bit in pend0 */
+ pend0 ^= 1UL << swlevel;
+
+ /* Now allow the set of serviced intrs again */
+ LOCAL_HUB_S(pi_int_mask0, mask0);
+ LOCAL_HUB_L(PI_INT_PEND0);
+}
+
+void ip27_do_irq_mask1(struct pt_regs *regs)
+{
+ int irq, swlevel;
+ hubreg_t pend1, mask1;
+ cpuid_t cpu = smp_processor_id();
+ int pi_int_mask1 = (cputoslice(cpu) == 0) ? PI_INT_MASK1_A : PI_INT_MASK1_B;
+
+ /* copied from Irix intpend0() */
+ pend1 = LOCAL_HUB_L(PI_INT_PEND1);
+ mask1 = LOCAL_HUB_L(pi_int_mask1);
+
+ pend1 &= mask1; /* Pick intrs we should look at */
+ if (!pend1)
+ return;
+
+ /* Prevent any of the picked intrs from recursing */
+ LOCAL_HUB_S(pi_int_mask1, mask1 & ~pend1);
+
+ swlevel = ms1bit(pend1);
+ /* "map" swlevel to irq */
+ irq = LEVEL_TO_IRQ(cpu, swlevel);
+ LOCAL_HUB_CLR_INTR(swlevel);
+ do_IRQ(irq, regs);
+ /* clear bit in pend1 */
+ pend1 ^= 1UL << swlevel;
+
+ /* Now allow the set of serviced intrs again */
+ LOCAL_HUB_S(pi_int_mask1, mask1);
+ LOCAL_HUB_L(PI_INT_PEND1);
+}
+
+void ip27_prof_timer(struct pt_regs *regs)
+{
+ panic("CPU %d got a profiling interrupt", smp_processor_id());
+}
+
+void ip27_hub_error(struct pt_regs *regs)
+{
+ panic("CPU %d got a hub error interrupt", smp_processor_id());
+}
+
+/*
+ * Get values that vary depending on which CPU and bit we're operating on.
+ */
+static void intr_get_ptrs(cpuid_t cpu, int bit, int *new_bit,
+ hubreg_t **intpend_masks, int *ip)
+{
+ struct hub_intmasks_s *hub_intmasks = &cpu_data[cpu].p_intmasks;
+
+ if (bit < N_INTPEND_BITS) {
+ *intpend_masks = &hub_intmasks->intpend0_masks;
+ *ip = 0;
+ *new_bit = bit;
+ } else {
+ *intpend_masks = &hub_intmasks->intpend1_masks;
+ *ip = 1;
+ *new_bit = bit - N_INTPEND_BITS;
}
}
+static int intr_connect_level(int cpu, int bit)
+{
+ int ip;
+ int slice = cputoslice(cpu);
+ volatile hubreg_t *mask_reg;
+ hubreg_t *intpend_masks;
+ nasid_t nasid = COMPACT_TO_NASID_NODEID(cputocnode(cpu));
+
+ intr_get_ptrs(cpu, bit, &bit, &intpend_masks, &ip);
+
+ /* Make sure it's not already pending when we connect it. */
+ REMOTE_HUB_CLR_INTR(nasid, bit + ip * N_INTPEND_BITS);
+
+ *intpend_masks |= (1UL << bit);
+
+ if (ip == 0) {
+ mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK0_A +
+ PI_INT_MASK_OFFSET * slice);
+ } else {
+ mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK1_A +
+ PI_INT_MASK_OFFSET * slice);
+ }
+ HUB_S(mask_reg, intpend_masks[0]);
+
+ return 0;
+}
+
+static int intr_disconnect_level(int cpu, int bit)
+{
+ int ip;
+ int slice = cputoslice(cpu);
+ volatile hubreg_t *mask_reg;
+ hubreg_t *intpend_masks;
+ nasid_t nasid = COMPACT_TO_NASID_NODEID(cputocnode(cpu));
+
+ intr_get_ptrs(cpu, bit, &bit, &intpend_masks, &ip);
+ intpend_masks[0] &= ~(1ULL << (u64)bit);
+ if (ip == 0) {
+ mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK0_A +
+ PI_INT_MASK_OFFSET * slice);
+ } else {
+ mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK1_A +
+ PI_INT_MASK_OFFSET * slice);
+ }
+ HUB_S(mask_reg, intpend_masks[0]);
+
+ return 0;
+}
/* Startup one of the (PCI ...) IRQs routes over a bridge. */
static unsigned int startup_bridge_irq(unsigned int irq)
{
+ struct bridge_controller *bc;
bridgereg_t device;
bridge_t *bridge;
int pin, swlevel;
- cpuid_t cpu;
- nasid_t master = NASID_FROM_PCI_IRQ(irq);
if (irq < BASE_PCI_IRQ)
return 0;
- bridge = (bridge_t *) NODE_SWIN_BASE(master, WID_FROM_PCI_IRQ(irq));
pin = SLOT_FROM_PCI_IRQ(irq);
- cpu = IRQ_TO_CPU(irq);
+ bc = IRQ_TO_BRIDGE(irq);
+ bridge = bc->base;
DBG("bridge_startup(): irq= 0x%x pin=%d\n", irq, pin);
/*
* "map" irq to a swlevel greater than 6 since the first 6 bits
* of INT_PEND0 are taken
*/
- swlevel = alloc_level(cpu, irq);
- intr_connect_level(cpu, swlevel);
+ swlevel = alloc_level(bc->irq_cpu, irq);
+ intr_connect_level(bc->irq_cpu, swlevel);
- bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (master << 8));
+ bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (bc->nasid << 8));
bridge->b_int_enable |= (1 << pin);
/* more stuff in int_enable reg */
bridge->b_int_enable |= 0x7ffffe00;
/*
- * XXX This only works if b_int_device is initialized to 0!
- * We program the bridge to have a 1:1 mapping between devices
+ * Enable sending of an interrupt clear packt to the hub on a high to
+ * low transition of the interrupt pin.
+ *
+ * IRIX sets additional bits in the address which are documented as
+ * reserved in the bridge docs.
+ */
+ bridge->b_int_mode |= (1UL << pin);
+
+ /*
+ * We assume the bridge to have a 1:1 mapping between devices
* (slots) and intr pins.
*/
device = bridge->b_int_device;
+ device &= ~(7 << (pin*3));
device |= (pin << (pin*3));
bridge->b_int_device = device;
@@ -226,17 +360,15 @@ static unsigned int startup_bridge_irq(u
}
/* Shutdown one of the (PCI ...) IRQs routes over a bridge. */
-static unsigned int shutdown_bridge_irq(unsigned int irq)
+static void shutdown_bridge_irq(unsigned int irq)
{
- bridge_t *bridge;
+ struct bridge_controller *bc = IRQ_TO_BRIDGE(irq);
+ bridge_t *bridge = bc->base;
int pin, swlevel;
cpuid_t cpu;
- if (irq < BASE_PCI_IRQ)
- return 0;
+ BUG_ON(irq < BASE_PCI_IRQ);
- bridge = (bridge_t *) NODE_SWIN_BASE(NASID_FROM_PCI_IRQ(irq),
- WID_FROM_PCI_IRQ(irq));
DBG("bridge_shutdown: irq 0x%x\n", irq);
pin = SLOT_FROM_PCI_IRQ(irq);
@@ -250,8 +382,6 @@ static unsigned int shutdown_bridge_irq(
bridge->b_int_enable &= ~(1 << pin);
bridge->b_widget.w_tflush; /* Flush */
-
- return 0; /* Never anything pending. */
}
static inline void enable_bridge_irq(unsigned int irq)
@@ -269,20 +399,18 @@ static void mask_and_ack_bridge_irq(unsi
/* All the braindamage happens magically for us in ip27_do_irq */
}
-static void end_bridge_irq (unsigned int irq)
+static void end_bridge_irq(unsigned int irq)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_bridge_irq(irq);
}
static struct hw_interrupt_type bridge_irq_type = {
- "bridge",
- startup_bridge_irq,
- shutdown_bridge_irq,
- enable_bridge_irq,
- disable_bridge_irq,
- mask_and_ack_bridge_irq,
- end_bridge_irq
+ .typename = "bridge",
+ .startup = startup_bridge_irq,
+ .shutdown = shutdown_bridge_irq,
+ .enable = enable_bridge_irq,
+ .disable = disable_bridge_irq,
+ .ack = mask_and_ack_bridge_irq,
+ .end = end_bridge_irq,
};
void irq_debug(void)
@@ -297,7 +425,11 @@ void irq_debug(void)
void __init init_IRQ(void)
{
- int i;
+ int i, j;
+
+ for (i = 0; i < MAX_COMPACT_NODES; i++)
+ for (j = 0; j < PERNODE_LEVELS; j++)
+ node_level_to_irq[i][j] = -1;
set_except_vector(0, ip27_irq);
@@ -312,177 +444,29 @@ void __init init_IRQ(void)
}
}
-/*
- * Get values that vary depending on which CPU and bit we're operating on.
- */
-static hub_intmasks_t *intr_get_ptrs(cpuid_t cpu, int bit, int *new_bit,
- hubreg_t **intpend_masks, int *ip)
+void install_ipi(void)
{
- hub_intmasks_t *hub_intmasks;
-
- hub_intmasks = &cpu_data[cpu].p_intmasks;
- if (bit < N_INTPEND_BITS) {
- *intpend_masks = hub_intmasks->intpend0_masks;
- *ip = 0;
- *new_bit = bit;
- } else {
- *intpend_masks = hub_intmasks->intpend1_masks;
- *ip = 1;
- *new_bit = bit - N_INTPEND_BITS;
- }
- return hub_intmasks;
-}
-
-int intr_connect_level(int cpu, int bit)
-{
- int ip;
- int slice = cputoslice(cpu);
- volatile hubreg_t *mask_reg;
- hubreg_t *intpend_masks;
- nasid_t nasid = COMPACT_TO_NASID_NODEID(cputocnode(cpu));
-
- (void)intr_get_ptrs(cpu, bit, &bit, &intpend_masks, &ip);
-
- /* Make sure it's not already pending when we connect it. */
- REMOTE_HUB_CLR_INTR(nasid, bit + ip * N_INTPEND_BITS);
-
- intpend_masks[0] |= (1ULL << (u64)bit);
-
- if (ip == 0) {
- mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK0_A +
- PI_INT_MASK_OFFSET * slice);
+ int slice = LOCAL_HUB_L(PI_CPU_NUM);
+ int cpu = smp_processor_id();
+ hubreg_t mask, set;
+
+ if (slice == 0) {
+ LOCAL_HUB_CLR_INTR(CPU_RESCHED_A_IRQ);
+ LOCAL_HUB_CLR_INTR(CPU_CALL_A_IRQ);
+ mask = LOCAL_HUB_L(PI_INT_MASK0_A); /* Slice A */
+ set = (1UL << FAST_IRQ_TO_LEVEL(CPU_RESCHED_A_IRQ)) |
+ (1UL << FAST_IRQ_TO_LEVEL(CPU_CALL_A_IRQ));
+ mask |= set;
+ cpu_data[cpu].p_intmasks.intpend0_masks |= set;
+ LOCAL_HUB_S(PI_INT_MASK0_A, mask);
} else {
- mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK1_A +
- PI_INT_MASK_OFFSET * slice);
+ LOCAL_HUB_CLR_INTR(CPU_RESCHED_B_IRQ);
+ LOCAL_HUB_CLR_INTR(CPU_CALL_B_IRQ);
+ mask = LOCAL_HUB_L(PI_INT_MASK0_B); /* Slice B */
+ set = (1UL << FAST_IRQ_TO_LEVEL(CPU_RESCHED_B_IRQ)) |
+ (1UL << FAST_IRQ_TO_LEVEL(CPU_CALL_B_IRQ));
+ mask |= set;
+ cpu_data[cpu].p_intmasks.intpend0_masks |= set;
+ LOCAL_HUB_S(PI_INT_MASK0_B, mask);
}
- HUB_S(mask_reg, intpend_masks[0]);
- return(0);
-}
-
-int intr_disconnect_level(int cpu, int bit)
-{
- int ip;
- int slice = cputoslice(cpu);
- volatile hubreg_t *mask_reg;
- hubreg_t *intpend_masks;
- nasid_t nasid = COMPACT_TO_NASID_NODEID(cputocnode(cpu));
-
- (void)intr_get_ptrs(cpu, bit, &bit, &intpend_masks, &ip);
- intpend_masks[0] &= ~(1ULL << (u64)bit);
- if (ip == 0) {
- mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK0_A +
- PI_INT_MASK_OFFSET * slice);
- } else {
- mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK1_A +
- PI_INT_MASK_OFFSET * slice);
- }
- HUB_S(mask_reg, intpend_masks[0]);
- return(0);
-}
-
-
-irqreturn_t handle_resched_intr(int irq, void *dev_id, struct pt_regs *regs)
-{
- /* Nothing, the return from intr will work for us */
- return IRQ_NONE;
-}
-
-#ifdef CONFIG_SMP
-
-void core_send_ipi(int destid, unsigned int action)
-{
- int irq;
-
-#if (CPUS_PER_NODE == 2)
- switch (action) {
- case SMP_RESCHEDULE_YOURSELF:
- irq = CPU_RESCHED_A_IRQ;
- break;
- case SMP_CALL_FUNCTION:
- irq = CPU_CALL_A_IRQ;
- break;
- default:
- panic("sendintr");
- }
- irq += cputoslice(destid);
-
- /*
- * Convert the compact hub number to the NASID to get the correct
- * part of the address space. Then set the interrupt bit associated
- * with the CPU we want to send the interrupt to.
- */
- REMOTE_HUB_SEND_INTR(COMPACT_TO_NASID_NODEID(cputocnode(destid)),
- FAST_IRQ_TO_LEVEL(irq));
-#else
- << Bomb! Must redefine this for more than 2 CPUS. >>
-#endif
-}
-
-#endif
-
-extern irqreturn_t smp_call_function_interrupt(int irq, void *dev,
- struct pt_regs *regs);
-
-void install_cpuintr(int cpu)
-{
-#ifdef CONFIG_SMP
-#if (CPUS_PER_NODE == 2)
- static int done = 0;
-
- /*
- * This is a hack till we have a pernode irqlist. Currently,
- * just have the master cpu set up the handlers for the per
- * cpu irqs.
- */
- if (done == 0) {
- int j;
-
- if (request_irq(CPU_RESCHED_A_IRQ, handle_resched_intr,
- 0, "resched", 0))
- panic("intercpu intr unconnectible");
- if (request_irq(CPU_RESCHED_B_IRQ, handle_resched_intr,
- 0, "resched", 0))
- panic("intercpu intr unconnectible");
- if (request_irq(CPU_CALL_A_IRQ, smp_call_function_interrupt,
- 0, "callfunc", 0))
- panic("intercpu intr unconnectible");
- if (request_irq(CPU_CALL_B_IRQ, smp_call_function_interrupt,
- 0, "callfunc", 0))
- panic("intercpu intr unconnectible");
-
- for (j = 0; j < PERNODE_LEVELS; j++)
- LEVEL_TO_IRQ(0, j) = -1;
- LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_RESCHED_A_IRQ)) =
- CPU_RESCHED_A_IRQ;
- LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_RESCHED_B_IRQ)) =
- CPU_RESCHED_B_IRQ;
- LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_CALL_A_IRQ)) =
- CPU_CALL_A_IRQ;
- LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_CALL_B_IRQ)) =
- CPU_CALL_B_IRQ;
- for (j = 1; j < MAX_COMPACT_NODES; j++)
- memcpy(&node_level_to_irq[j][0],
- &node_level_to_irq[0][0],
- sizeof(node_level_to_irq[0][0])*PERNODE_LEVELS);
-
- done = 1;
- }
-
- intr_connect_level(cpu, FAST_IRQ_TO_LEVEL(CPU_RESCHED_A_IRQ +
- cputoslice(cpu)));
- intr_connect_level(cpu, FAST_IRQ_TO_LEVEL(CPU_CALL_A_IRQ +
- cputoslice(cpu)));
-#else /* CPUS_PER_NODE */
-#error Must redefine this for more than 2 CPUS.
-#endif /* CPUS_PER_NODE */
-#endif /* CONFIG_SMP */
-}
-
-void install_tlbintr(int cpu)
-{
-#if 0
- int intr_bit = N_INTPEND_BITS + TLB_INTR_A + cputoslice(cpu);
-
- intr_connect_level(cpu, intr_bit);
-#endif
}
diff -puN arch/mips/sgi-ip27/ip27-irq-glue.S~mips-megapatch arch/mips/sgi-ip27/ip27-irq-glue.S
--- 25/arch/mips/sgi-ip27/ip27-irq-glue.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip27/ip27-irq-glue.S 2004-02-19 12:53:02.000000000 -0800
@@ -12,53 +12,34 @@
#include <asm/stackframe.h>
.text
- .set noat
.align 5
NESTED(ip27_irq, PT_SIZE, sp)
SAVE_ALL
CLI
- .set at
- /* IP27 may signal interrupt which we're not interested in.
- Mask them out. */
mfc0 s0, CP0_CAUSE
mfc0 t0, CP0_STATUS
and s0, t0
-
- /* First check for RT interrupt. */
- andi a0, s0, CAUSEF_IP4
- beqz a0, 1f
-
- /* Ok, a timer interrupt. */
move a0, sp
- jal rt_timer_interrupt
+ la ra, ret_from_irq
- j ret_from_irq
-
-1: andi a0, s0, (CAUSEF_IP2 | CAUSEF_IP3)
- beqz a0, 1f
-
- /* ... a device interrupt ... */
- move a0, sp
- jal ip27_do_irq
-
- j ret_from_irq
-
-1:
-#if 1
- mfc0 a1, CP0_STATUS
- srl a1, a1, 8
- andi a1, 0xff
-
- mfc0 a2, CP0_CAUSE
- srl a2, a2, 8
- andi a2, 0xff
-
- move a3, s0
- PRINT("Spurious interrupt, c0_status = %02x, c0_cause = %02x, pending %02x.\n")
- ld a1, PT_EPC(sp)
-0: b 0b
-#endif
+ /* First check for RT interrupt. */
+ andi t0, s0, CAUSEF_IP4
+ bnez t0, ip4
+ andi t0, s0, CAUSEF_IP2
+ bnez t0, ip2
+ andi t0, s0, CAUSEF_IP3
+ bnez t0, ip3
+ andi t0, s0, CAUSEF_IP5
+ bnez t0, ip5
+ andi t0, s0, CAUSEF_IP6
+ bnez t0, ip6
+ j ra
+
+ip2: j ip27_do_irq_mask0 # PI_INT_PEND_0 or CC_PEND_{A|B}
+ip3: j ip27_do_irq_mask1 # PI_INT_PEND_1
+ip4: j ip27_rt_timer_interrupt
+ip5: j ip27_prof_timer
+ip6: j ip27_hub_error
- j ret_from_irq
END(ip27_irq)
diff -puN arch/mips/sgi-ip27/ip27-klnuma.c~mips-megapatch arch/mips/sgi-ip27/ip27-klnuma.c
--- 25/arch/mips/sgi-ip27/ip27-klnuma.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip27/ip27-klnuma.c 2004-02-19 12:53:02.000000000 -0800
@@ -15,8 +15,7 @@
#include <asm/sn/types.h>
#include <asm/sn/arch.h>
#include <asm/sn/gda.h>
-#include <asm/mmzone.h>
-#include <asm/sn/klkernvars.h>
+#include <asm/sn/hub.h>
#include <asm/sn/mapped_kernel.h>
#include <asm/sn/sn_private.h>
@@ -34,8 +33,8 @@ void __init setup_replication_mask(int m
cnodeid_t cnode;
/* Set only the master cnode's bit. The master cnode is always 0. */
- CPUMASK_CLRALL(ktext_repmask);
- CPUMASK_SETB(ktext_repmask, 0);
+ cpus_clear(ktext_repmask);
+ cpu_set(0, ktext_repmask);
numa_kernel_replication_ratio = 0;
#ifdef CONFIG_REPLICATE_KTEXT
@@ -51,7 +50,7 @@ void __init setup_replication_mask(int m
!(cnode % numa_kernel_replication_ratio)) {
/* Advertise that we have a copy of the kernel */
- CPUMASK_SETB(ktext_repmask, cnode);
+ cpu_set(cnode, ktext_repmask);
}
}
@@ -67,12 +66,11 @@ static __init void set_ktext_source(nasi
client_cnode = NASID_TO_COMPACT_NODEID(client_nasid);
- kvp = &(PLAT_NODE_DATA(client_cnode)->kern_vars);
+ kvp = &(HUB_DATA(client_nasid)->kern_vars);
KERN_VARS_ADDR(client_nasid) = (unsigned long)kvp;
kvp->kv_magic = KV_MAGIC;
-
kvp->kv_ro_nasid = server_nasid;
kvp->kv_rw_nasid = master_nasid;
kvp->kv_ro_baseaddr = NODE_CAC_BASE(server_nasid);
@@ -109,7 +107,7 @@ void __init replicate_kernel_text(int ma
client_nasid = COMPACT_TO_NASID_NODEID(cnode);
/* Check if this node should get a copy of the kernel */
- if (CPUMASK_TSTB(ktext_repmask, cnode)) {
+ if (cpu_isset(cnode, ktext_repmask)) {
server_nasid = client_nasid;
copy_kernel(server_nasid);
}
@@ -134,7 +132,7 @@ pfn_t node_getfirstfree(cnodeid_t cnode)
loadbase = CKSSEG + 16777216;
#endif
offset = PAGE_ALIGN((unsigned long)(&_end)) - loadbase;
- if ((cnode == 0) || (CPUMASK_TSTB(ktext_repmask, cnode)))
+ if ((cnode == 0) || (cpu_isset(cnode, ktext_repmask)))
return (TO_NODE(nasid, offset) >> PAGE_SHIFT);
else
return (KDM_TO_PHYS(PAGE_ALIGN(SYMMON_STK_ADDR(nasid, 0))) >>
diff -puN arch/mips/sgi-ip27/ip27-memory.c~mips-megapatch arch/mips/sgi-ip27/ip27-memory.c
--- 25/arch/mips/sgi-ip27/ip27-memory.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip27/ip27-memory.c 2004-02-19 12:53:02.000000000 -0800
@@ -23,6 +23,7 @@
#include <asm/pgalloc.h>
#include <asm/sn/types.h>
#include <asm/sn/addrs.h>
+#include <asm/sn/hub.h>
#include <asm/sn/klconfig.h>
#include <asm/sn/arch.h>
#include <asm/mmzone.h>
@@ -36,10 +37,10 @@ extern pfn_t node_getfirstfree(cnodeid_t
short slot_lastfilled_cache[MAX_COMPACT_NODES];
unsigned short slot_psize_cache[MAX_COMPACT_NODES][MAX_MEM_SLOTS];
-static pfn_t numpages;
-plat_pg_data_t *plat_node_data[MAX_COMPACT_NODES];
-bootmem_data_t plat_node_bdata[MAX_COMPACT_NODES];
+struct bootmem_data plat_node_bdata[MAX_COMPACT_NODES];
+struct pglist_data *node_data[MAX_COMPACT_NODES];
+struct hub_data *hub_data[MAX_COMPACT_NODES];
int numa_debug(void)
{
@@ -52,7 +53,7 @@ int numa_debug(void)
* Return the number of pages of memory provided by the given slot
* on the specified node.
*/
-pfn_t slot_getsize(cnodeid_t node, int slot)
+static pfn_t slot_getsize(cnodeid_t node, int slot)
{
return (pfn_t) slot_psize_cache[node][slot];
}
@@ -60,7 +61,7 @@ pfn_t slot_getsize(cnodeid_t node, int s
/*
* Return highest slot filled
*/
-int node_getlastslot(cnodeid_t node)
+static int node_getlastslot(cnodeid_t node)
{
return (int) slot_lastfilled_cache[node];
}
@@ -68,7 +69,7 @@ int node_getlastslot(cnodeid_t node)
/*
* Return the pfn of the last free page of memory on a node.
*/
-pfn_t node_getmaxclick(cnodeid_t node)
+static pfn_t node_getmaxclick(cnodeid_t node)
{
pfn_t slot_psize;
int slot;
@@ -90,7 +91,7 @@ pfn_t node_getmaxclick(cnodeid_t node)
* If there's no memory on the node, return 0. This is likely
* to cause problems.
*/
- return (pfn_t)0;
+ return 0;
}
static pfn_t slot_psize_compute(cnodeid_t node, int slot)
@@ -107,7 +108,7 @@ static pfn_t slot_psize_compute(cnodeid_
return 0;
/* Get the memory bank structure */
- banks = (klmembnk_t *)find_first_component(brd, KLSTRUCT_MEMBNK);
+ banks = (klmembnk_t *) find_first_component(brd, KLSTRUCT_MEMBNK);
if (!banks)
return 0;
@@ -116,20 +117,19 @@ static pfn_t slot_psize_compute(cnodeid_
/* hack for 128 dimm banks */
if (size <= 128) {
- if (slot%4 == 0) {
+ if (slot % 4 == 0) {
size <<= 20; /* size in bytes */
return(size >> PAGE_SHIFT);
- } else {
+ } else
return 0;
- }
} else {
size /= 4;
size <<= 20;
- return(size >> PAGE_SHIFT);
+ return size >> PAGE_SHIFT;
}
}
-pfn_t szmem(pfn_t fpage, pfn_t maxpmem)
+static pfn_t szmem(void)
{
cnodeid_t node;
int slot, numslots;
@@ -165,10 +165,8 @@ pfn_t szmem(pfn_t fpage, pfn_t maxpmem)
slot_lastfilled_cache[node] = slot;
}
}
- if (maxpmem)
- return((maxpmem > num_pages) ? num_pages : maxpmem);
- else
- return num_pages;
+
+ return num_pages;
}
/*
@@ -176,32 +174,32 @@ pfn_t szmem(pfn_t fpage, pfn_t maxpmem)
* contains at least 32 MBytes of memory. We assume all bootmem data
* fits on the first slot.
*/
+extern void mlreset(void);
void __init prom_meminit(void)
{
- extern void mlreset(void);
cnodeid_t node;
- pfn_t slot_firstpfn, slot_lastpfn, slot_freepfn;
- unsigned long bootmap_size;
- int node_datasz;
- node_datasz = PFN_UP(sizeof(plat_pg_data_t));
mlreset();
- numpages = szmem(0, 0);
- for (node = (numnodes - 1); node >= 0; node--) {
- slot_firstpfn = slot_getbasepfn(node, 0);
- slot_lastpfn = slot_firstpfn + slot_getsize(node, 0);
- slot_freepfn = node_getfirstfree(node);
- /* Foll line hack for non discontigmem; remove once discontigmem
- * becomes the default. */
- max_low_pfn = (slot_lastpfn - slot_firstpfn);
+
+ num_physpages = szmem();
+
+ for (node = 0; node < numnodes; node++) {
+ pfn_t slot_firstpfn = slot_getbasepfn(node, 0);
+ pfn_t slot_lastpfn = slot_firstpfn + slot_getsize(node, 0);
+ pfn_t slot_freepfn = node_getfirstfree(node);
+ unsigned long bootmap_size;
/*
- * Allocate the node data structure on the node first.
+ * Allocate the node data structures on the node first.
*/
- plat_node_data[node] = (plat_pg_data_t *)(__va(slot_freepfn \
- << PAGE_SHIFT));
- NODE_DATA(node)->bdata = plat_node_bdata + node;
- slot_freepfn += node_datasz;
+ node_data[node] = __va(slot_freepfn << PAGE_SHIFT);
+ node_data[node]->bdata = &plat_node_bdata[node];
+
+ hub_data[node] = node_data[node] + 1;
+
+ slot_freepfn += PFN_UP(sizeof(struct pglist_data) +
+ sizeof(struct hub_data));
+
bootmap_size = init_bootmem_node(NODE_DATA(node), slot_freepfn,
slot_firstpfn, slot_lastpfn);
free_bootmem_node(NODE_DATA(node), slot_firstpfn << PAGE_SHIFT,
@@ -209,123 +207,90 @@ void __init prom_meminit(void)
reserve_bootmem_node(NODE_DATA(node), slot_firstpfn << PAGE_SHIFT,
((slot_freepfn - slot_firstpfn) << PAGE_SHIFT) + bootmap_size);
}
- printk("Total memory probed : 0x%lx pages\n", numpages);
}
-void __init
-prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
/* We got nothing to free here ... */
+ return 0;
}
-#ifdef CONFIG_DISCONTIGMEM
-
-static pfn_t pagenr;
+extern void pagetable_init(void);
+extern unsigned long setup_zero_pages(void);
void __init paging_init(void)
{
- pmd_t *pmd = kpmdtbl;
- pte_t *pte = kptbl;
-
- cnodeid_t node;
unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
- int i;
+ unsigned node;
- /* Initialize the entire pgd. */
- pgd_init((unsigned long)swapper_pg_dir);
- pmd_init((unsigned long)invalid_pmd_table, (unsigned long)invalid_pte_table);
- memset((void *)invalid_pte_table, 0, sizeof(pte_t) * PTRS_PER_PTE);
-
- /* This is for vmalloc */
- memset((void *)kptbl, 0, PAGE_SIZE << PGD_ORDER);
- memset((void *)kpmdtbl, 0, PAGE_SIZE);
- set_pgd(swapper_pg_dir, __pgd(kpmdtbl));
- for (i = 0; i < (1 << PGD_ORDER); pmd++,i++,pte+=PTRS_PER_PTE)
- pmd_val(*pmd) = (unsigned long)pte;
+ pagetable_init();
for (node = 0; node < numnodes; node++) {
pfn_t start_pfn = slot_getbasepfn(node, 0);
- pfn_t end_pfn = node_getmaxclick(node);
+ pfn_t end_pfn = node_getmaxclick(node) + 1;
+
+ zones_size[ZONE_DMA] = end_pfn - start_pfn;
+ free_area_init_node(node, NODE_DATA(node), NULL,
+ zones_size, start_pfn, NULL);
- zones_size[ZONE_DMA] = end_pfn + 1 - start_pfn;
- free_area_init_node(node, NODE_DATA(node), 0, zones_size,
- start_pfn, 0);
+ if (end_pfn > max_low_pfn)
+ max_low_pfn = end_pfn;
}
}
void __init mem_init(void)
{
- extern unsigned long setup_zero_pages(void);
- cnodeid_t nid;
- unsigned long tmp;
- unsigned long codesize, datasize, initsize;
- int slot, numslots;
- struct page *pg, *pslot;
-
- num_physpages = numpages; /* memory already sized by szmem */
- max_mapnr = pagenr; /* already found during paging_init */
- high_memory = (void *) __va(max_mapnr << PAGE_SHIFT);
+ unsigned long codesize, datasize, initsize, tmp;
+ unsigned node;
- for (nid = 0; nid < numnodes; nid++) {
+ high_memory = (void *) __va(num_physpages << PAGE_SHIFT);
- /*
- * Hack till free_area_init_core() zeroes free_pages
- */
- for (tmp = 0; tmp < MAX_NR_ZONES; tmp++)
- PLAT_NODE_DATA(nid)->gendata.node_zones[tmp].free_pages=0;
+ for (node = 0; node < numnodes; node++) {
+ unsigned slot, numslots;
+ struct page *end, *p;
+
/*
* This will free up the bootmem, ie, slot 0 memory.
*/
- totalram_pages += free_all_bootmem_node(NODE_DATA(nid));
+ totalram_pages += free_all_bootmem_node(NODE_DATA(node));
/*
* We need to manually do the other slots.
*/
- pg = NODE_DATA(nid)->node_mem_map + slot_getsize(nid, 0);
- numslots = node_getlastslot(nid);
+ numslots = node_getlastslot(node);
for (slot = 1; slot <= numslots; slot++) {
- pslot = NODE_DATA(nid)->node_mem_map +
- slot_getbasepfn(nid, slot) - slot_getbasepfn(nid, 0);
-
- /*
- * Mark holes in previous slot. May also want to
- * free up the pages that hold the memmap entries.
- */
- while (pg < pslot) {
- pg++;
- }
+ p = NODE_DATA(node)->node_mem_map +
+ (slot_getbasepfn(node, slot) -
+ slot_getbasepfn(node, 0));
/*
* Free valid memory in current slot.
*/
- pslot += slot_getsize(nid, slot);
- while (pg < pslot) {
+ for (end = p + slot_getsize(node, slot); p < end; p++) {
/* if (!page_is_ram(pgnr)) continue; */
/* commented out until page_is_ram works */
- ClearPageReserved(pg);
- atomic_set(&pg->count, 1);
- __free_page(pg);
+ ClearPageReserved(p);
+ set_page_count(p, 1);
+ __free_page(p);
totalram_pages++;
- pg++; pgnr++;
}
}
}
totalram_pages -= setup_zero_pages(); /* This comes from node 0 */
- codesize = (unsigned long) _etext - (unsigned long) _stext;
- datasize = (unsigned long) _edata - (unsigned long) _fdata;
- initsize = (unsigned long) __init_end - (unsigned long) __init_begin;
-
- tmp = (unsigned long) nr_free_pages();
- printk("Memory: %luk/%luk available (%ldk kernel code, %ldk reserved, "
- "%ldk data, %ldk init)\n",
- tmp << (PAGE_SHIFT-10),
- num_physpages << (PAGE_SHIFT-10),
- codesize >> 10,
- (num_physpages - tmp) << (PAGE_SHIFT-10),
- datasize >> 10,
- initsize >> 10);
+ codesize = (unsigned long) &_etext - (unsigned long) &_text;
+ datasize = (unsigned long) &_edata - (unsigned long) &_etext;
+ initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
+
+ tmp = nr_free_pages();
+ printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
+ "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
+ tmp << (PAGE_SHIFT-10),
+ num_physpages << (PAGE_SHIFT-10),
+ codesize >> 10,
+ (num_physpages - tmp) << (PAGE_SHIFT-10),
+ datasize >> 10,
+ initsize >> 10,
+ (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
}
-
-#endif /* CONFIG_DISCONTIGMEM */
diff -puN arch/mips/sgi-ip27/ip27-nmi.c~mips-megapatch arch/mips/sgi-ip27/ip27-nmi.c
--- 25/arch/mips/sgi-ip27/ip27-nmi.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip27/ip27-nmi.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,3 +1,4 @@
+#include <linux/kallsyms.h>
#include <linux/kernel.h>
#include <linux/mmzone.h>
#include <linux/spinlock.h>
@@ -51,24 +52,102 @@ void install_cpu_nmi_handler(int slice)
* into the eframe format for the node under consideration.
*/
-void
-nmi_cpu_eframe_save(nasid_t nasid,
- int slice)
+void nmi_cpu_eframe_save(nasid_t nasid, int slice)
{
- int i, numberof_nmi_cpu_regs;
- machreg_t *prom_format;
-
- /* Get the total number of registers being saved by the prom */
- numberof_nmi_cpu_regs = sizeof(struct reg_struct) / sizeof(machreg_t);
+ struct reg_struct *nr;
+ int i;
/* Get the pointer to the current cpu's register set. */
- prom_format =
- (machreg_t *)(TO_UNCAC(TO_NODE(nasid, IP27_NMI_KREGS_OFFSET)) +
- slice * IP27_NMI_KREGS_CPU_SIZE);
+ nr = (struct reg_struct *)
+ (TO_UNCAC(TO_NODE(nasid, IP27_NMI_KREGS_OFFSET)) +
+ slice * IP27_NMI_KREGS_CPU_SIZE);
printk("NMI nasid %d: slice %d\n", nasid, slice);
- for (i = 0; i < numberof_nmi_cpu_regs; i++)
- printk("0x%lx ", prom_format[i]);
+
+ /*
+ * Saved main processor registers
+ */
+ for (i = 0; i < 32; ) {
+ if ((i % 4) == 0)
+ printk("$%2d :", i);
+ printk(" %016lx", nr->gpr[i]);
+
+ i++;
+ if ((i % 4) == 0)
+ printk("\n");
+ }
+
+ printk("Hi : (value lost)\n");
+ printk("Lo : (value lost)\n");
+
+ /*
+ * Saved cp0 registers
+ */
+ printk("epc : %016lx ", nr->epc);
+ print_symbol("%s ", nr->epc);
+ printk("%s\n", print_tainted());
+ printk("ErrEPC: %016lx ", nr->error_epc);
+ print_symbol("%s\n", nr->error_epc);
+ printk("ra : %016lx ", nr->gpr[31]);
+ print_symbol("%s\n", nr->gpr[31]);
+ printk("Status: %08lx ", nr->sr);
+
+ if (nr->sr & ST0_KX)
+ printk("KX ");
+ if (nr->sr & ST0_SX)
+ printk("SX ");
+ if (nr->sr & ST0_UX)
+ printk("UX ");
+
+ switch (nr->sr & ST0_KSU) {
+ case KSU_USER:
+ printk("USER ");
+ break;
+ case KSU_SUPERVISOR:
+ printk("SUPERVISOR ");
+ break;
+ case KSU_KERNEL:
+ printk("KERNEL ");
+ break;
+ default:
+ printk("BAD_MODE ");
+ break;
+ }
+
+ if (nr->sr & ST0_ERL)
+ printk("ERL ");
+ if (nr->sr & ST0_EXL)
+ printk("EXL ");
+ if (nr->sr & ST0_IE)
+ printk("IE ");
+ printk("\n");
+
+ printk("Cause : %08lx\n", nr->cause);
+ printk("PrId : %08x\n", read_c0_prid());
+ printk("BadVA : %016lx\n", nr->badva);
+ printk("CErr : %016lx\n", nr->cache_err);
+ printk("NMI_SR: %016lx\n", nr->nmi_sr);
+
+ printk("\n");
+}
+
+void nmi_dump_hub_irq(nasid_t nasid, int slice)
+{
+ hubreg_t mask0, mask1, pend0, pend1;
+
+ if (slice == 0) { /* Slice A */
+ mask0 = REMOTE_HUB_L(nasid, PI_INT_MASK0_A);
+ mask1 = REMOTE_HUB_L(nasid, PI_INT_MASK1_A);
+ } else { /* Slice B */
+ mask0 = REMOTE_HUB_L(nasid, PI_INT_MASK0_B);
+ mask1 = REMOTE_HUB_L(nasid, PI_INT_MASK1_B);
+ }
+
+ pend0 = REMOTE_HUB_L(nasid, PI_INT_PEND0);
+ pend1 = REMOTE_HUB_L(nasid, PI_INT_PEND1);
+
+ printk("PI_INT_MASK0: %16lx PI_INT_MASK1: %16lx\n", mask0, mask1);
+ printk("PI_INT_PEND0: %16lx PI_INT_PEND1: %16lx\n", pend0, pend1);
printk("\n\n");
}
@@ -76,11 +155,10 @@ nmi_cpu_eframe_save(nasid_t nasid,
* Copy the cpu registers which have been saved in the IP27prom format
* into the eframe format for the node under consideration.
*/
-void
-nmi_node_eframe_save(cnodeid_t cnode)
+void nmi_node_eframe_save(cnodeid_t cnode)
{
- int cpu;
- nasid_t nasid;
+ nasid_t nasid;
+ int slice;
/* Make sure that we have a valid node */
if (cnode == CNODEID_NONE)
@@ -91,8 +169,10 @@ nmi_node_eframe_save(cnodeid_t cnode)
return;
/* Save the registers into eframe for each cpu */
- for(cpu = 0; cpu < NODE_NUM_CPUS(cnode); cpu++)
- nmi_cpu_eframe_save(nasid, cpu);
+ for (slice = 0; slice < NODE_NUM_CPUS(slice); slice++) {
+ nmi_cpu_eframe_save(nasid, slice);
+ nmi_dump_hub_irq(nasid, slice);
+ }
}
/*
diff -puN arch/mips/sgi-ip27/ip27-setup.c~mips-megapatch arch/mips/sgi-ip27/ip27-setup.c
--- 25/arch/mips/sgi-ip27/ip27-setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip27/ip27-setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -105,22 +105,99 @@ static void __init verify_mode(void)
}
#define XBOW_WIDGET_PART_NUM 0x0
-#define XXBOW_WIDGET_PART_NUM 0xd000 /* Xbridge */
+#define XXBOW_WIDGET_PART_NUM 0xd000 /* Xbow in Xbridge */
#define BASE_XBOW_PORT 8 /* Lowest external port */
-unsigned int bus_to_cpu[256];
-unsigned long bus_to_baddr[256];
+extern int bridge_probe(nasid_t nasid, int widget, int masterwid);
+
+static int __init probe_one_port(nasid_t nasid, int widget, int masterwid)
+{
+ widgetreg_t widget_id;
+ xwidget_part_num_t partnum;
+
+ widget_id = *(volatile widgetreg_t *)
+ (RAW_NODE_SWIN_BASE(nasid, widget) + WIDGET_ID);
+ partnum = XWIDGET_PART_NUM(widget_id);
+
+ printk(KERN_INFO "Cpu %d, Nasid 0x%x, widget 0x%x (partnum 0x%x) is ",
+ smp_processor_id(), nasid, widget, partnum);
+
+ switch (partnum) {
+ case BRIDGE_WIDGET_PART_NUM:
+ case XBRIDGE_WIDGET_PART_NUM:
+ bridge_probe(nasid, widget, masterwid);
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static int __init xbow_probe(nasid_t nasid)
+{
+ lboard_t *brd;
+ klxbow_t *xbow_p;
+ unsigned masterwid, i;
+
+ printk("is xbow\n");
+
+ /*
+ * found xbow, so may have multiple bridges
+ * need to probe xbow
+ */
+ brd = find_lboard((lboard_t *)KL_CONFIG_INFO(nasid), KLTYPE_MIDPLANE8);
+ if (!brd)
+ return -ENODEV;
+
+ xbow_p = (klxbow_t *)find_component(brd, NULL, KLSTRUCT_XBOW);
+ if (!xbow_p)
+ return -ENODEV;
+
+ /*
+ * Okay, here's a xbow. Lets arbitrate and find
+ * out if we should initialize it. Set enabled
+ * hub connected at highest or lowest widget as
+ * master.
+ */
+#ifdef WIDGET_A
+ i = HUB_WIDGET_ID_MAX + 1;
+ do {
+ i--;
+ } while ((!XBOW_PORT_TYPE_HUB(xbow_p, i)) ||
+ (!XBOW_PORT_IS_ENABLED(xbow_p, i)));
+#else
+ i = HUB_WIDGET_ID_MIN - 1;
+ do {
+ i++;
+ } while ((!XBOW_PORT_TYPE_HUB(xbow_p, i)) ||
+ (!XBOW_PORT_IS_ENABLED(xbow_p, i)));
+#endif
+
+ masterwid = i;
+ if (nasid != XBOW_PORT_NASID(xbow_p, i))
+ return 1;
+
+ for (i = HUB_WIDGET_ID_MIN; i <= HUB_WIDGET_ID_MAX; i++) {
+ if (XBOW_PORT_IS_ENABLED(xbow_p, i) &&
+ XBOW_PORT_TYPE_IO(xbow_p, i))
+ probe_one_port(nasid, i, masterwid);
+ }
+
+ return 0;
+}
+
+static spinlock_t pcibr_setup_lock = SPIN_LOCK_UNLOCKED;
void __init pcibr_setup(cnodeid_t nid)
{
- int i, start, num;
- unsigned long masterwid;
- bridge_t *bridge;
volatile u64 hubreg;
- nasid_t nasid, masternasid;
+ nasid_t nasid;
xwidget_part_num_t partnum;
widgetreg_t widget_id;
- static spinlock_t pcibr_setup_lock = SPIN_LOCK_UNLOCKED;
+
+
+ spin_lock(&pcibr_setup_lock);
/*
* If the master is doing this for headless node, nothing to do.
@@ -132,164 +209,66 @@ void __init pcibr_setup(cnodeid_t nid)
* is selectable by WIDGET_A below.
*/
if (nid != get_compact_nodeid())
- return;
- /*
- * find what's on our local node
- */
- spin_lock(&pcibr_setup_lock);
- start = num_bridges; /* Remember where we start from */
+ goto out;
+
+ /* find what's on our local node */
nasid = COMPACT_TO_NASID_NODEID(nid);
hubreg = REMOTE_HUB_L(nasid, IIO_LLP_CSR);
- if (hubreg & IIO_LLP_CSR_IS_UP) {
- /* link is up */
- widget_id = *(volatile widgetreg_t *)
- (RAW_NODE_SWIN_BASE(nasid, 0x0) + WIDGET_ID);
- partnum = XWIDGET_PART_NUM(widget_id);
- printk("Cpu %d, Nasid 0x%x, pcibr_setup(): found partnum= 0x%x",
- smp_processor_id(), nasid, partnum);
- if (partnum == BRIDGE_WIDGET_PART_NUM) {
- /*
- * found direct connected bridge so must be Origin200
- */
- printk("...is bridge\n");
- num_bridges = 1;
- bus_to_wid[0] = 0x8;
- bus_to_nid[0] = 0;
- masterwid = 0xa;
- bus_to_baddr[0] = 0xa100000000000000UL;
- } else if (partnum == XBOW_WIDGET_PART_NUM) {
- lboard_t *brd;
- klxbow_t *xbow_p;
- /*
- * found xbow, so may have multiple bridges
- * need to probe xbow
- */
- printk("...is xbow\n");
-
- if ((brd = find_lboard((lboard_t *)KL_CONFIG_INFO(nasid),
- KLTYPE_MIDPLANE8)) == NULL)
- printk("argh\n");
- else
- printk("brd = 0x%lx\n", (unsigned long) brd);
- if ((xbow_p = (klxbow_t *)
- find_component(brd, NULL, KLSTRUCT_XBOW)) == NULL)
- printk("argh\n");
- else {
- /*
- * Okay, here's a xbow. Lets arbitrate and find
- * out if we should initialize it. Set enabled
- * hub connected at highest or lowest widget as
- * master.
- */
-#ifdef WIDGET_A
- i = HUB_WIDGET_ID_MAX + 1;
- do {
- i--;
- } while ((!XBOW_PORT_TYPE_HUB(xbow_p, i)) ||
- (!XBOW_PORT_IS_ENABLED(xbow_p, i)));
-#else
- i = HUB_WIDGET_ID_MIN - 1;
- do {
- i++;
- } while ((!XBOW_PORT_TYPE_HUB(xbow_p, i)) ||
- (!XBOW_PORT_IS_ENABLED(xbow_p, i)));
-#endif
- masterwid = i;
- masternasid = XBOW_PORT_NASID(xbow_p, i);
- if (nasid == masternasid)
- for (i=HUB_WIDGET_ID_MIN; i<=HUB_WIDGET_ID_MAX; i++) {
- if (!XBOW_PORT_IS_ENABLED(xbow_p, i))
- continue;
- if (XBOW_PORT_TYPE_IO(xbow_p, i)) {
- widget_id = *(volatile widgetreg_t *)
- (RAW_NODE_SWIN_BASE(nasid, i) + WIDGET_ID);
- partnum = XWIDGET_PART_NUM(widget_id);
- if (partnum == BRIDGE_WIDGET_PART_NUM) {
- printk("widget 0x%x is a bridge\n", i);
- bus_to_wid[num_bridges] = i;
- bus_to_nid[num_bridges] = nasid;
- bus_to_baddr[num_bridges] = ((masterwid << 60) | (1UL << 56)); /* Barrier set */
- num_bridges++;
- }
- }
- }
- }
- } else if (partnum == XXBOW_WIDGET_PART_NUM) {
- /*
- * found xbridge, assume ibrick for now
- */
- printk("...is xbridge\n");
- bus_to_wid[0] = 0xb;
- bus_to_wid[1] = 0xe;
- bus_to_wid[2] = 0xf;
-
- bus_to_nid[0] = 0;
- bus_to_nid[1] = 0;
- bus_to_nid[2] = 0;
-
- bus_to_baddr[0] = 0xa100000000000000UL;
- bus_to_baddr[1] = 0xa100000000000000UL;
- bus_to_baddr[2] = 0xa100000000000000UL;
- masterwid = 0xa;
- num_bridges = 3;
- }
- }
- num = num_bridges - start;
- spin_unlock(&pcibr_setup_lock);
- /*
- * set bridge registers
- */
- for (i = start; i < (start + num); i++) {
-
- DBG("pcibr_setup: bus= %d bus_to_wid[%2d]= %d bus_to_nid[%2d]= %d\n",
- i, i, bus_to_wid[i], i, bus_to_nid[i]);
-
- bus_to_cpu[i] = smp_processor_id();
- /*
- * point to this bridge
- */
- bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[i],bus_to_wid[i]);
- /*
- * Clear all pending interrupts.
- */
- bridge->b_int_rst_stat = (BRIDGE_IRR_ALL_CLR);
- /*
- * Until otherwise set up, assume all interrupts are from slot 0
- */
- bridge->b_int_device = (u32) 0x0;
- /*
- * swap pio's to pci mem and io space (big windows)
- */
- bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP;
- bridge->b_wid_control |= BRIDGE_CTRL_MEM_SWAP;
-
- /*
- * Hmm... IRIX sets additional bits in the address which
- * are documented as reserved in the bridge docs.
- */
- bridge->b_int_mode = 0x0; /* Don't clear ints */
- bridge->b_wid_int_upper = 0x8000 | (masterwid << 16);
- bridge->b_wid_int_lower = 0x01800090; /* PI_INT_PEND_MOD off*/
- bridge->b_dir_map = (masterwid << 20); /* DMA */
- bridge->b_int_enable = 0;
- bridge->b_wid_tflush; /* wait until Bridge PIO complete */
+ /* check whether the link is up */
+ if (!(hubreg & IIO_LLP_CSR_IS_UP))
+ goto out;
+
+ widget_id = *(volatile widgetreg_t *)
+ (RAW_NODE_SWIN_BASE(nasid, 0x0) + WIDGET_ID);
+ partnum = XWIDGET_PART_NUM(widget_id);
+
+ printk(KERN_INFO "Cpu %d, Nasid 0x%x: partnum 0x%x is ",
+ smp_processor_id(), nasid, partnum);
+
+ switch (partnum) {
+ case BRIDGE_WIDGET_PART_NUM:
+ bridge_probe(nasid, 0x8, 0xa);
+ break;
+ case XBOW_WIDGET_PART_NUM:
+ case XXBOW_WIDGET_PART_NUM:
+ xbow_probe(nasid);
+ break;
+ default:
+ printk(" unknown widget??\n");
+ break;
}
+
+ out:
+ spin_unlock(&pcibr_setup_lock);
}
extern void ip27_setup_console(void);
extern void ip27_time_init(void);
extern void ip27_reboot_setup(void);
-void __init ip27_setup(void)
+void __init per_cpu_init(void)
+{
+ cnodeid_t cnode = get_compact_nodeid();
+ int cpu = smp_processor_id();
+
+ clear_c0_status(ST0_IM);
+ per_hub_init(cnode);
+ cpu_time_init();
+ install_ipi();
+ /* Install our NMI handler if symmon hasn't installed one. */
+ install_cpu_nmi_handler(cputoslice(cpu));
+ set_c0_status(SRB_DEV0 | SRB_DEV1);
+}
+
+static int __init ip27_setup(void)
{
- nasid_t nid;
hubreg_t p, e;
+ nasid_t nid;
ip27_setup_console();
ip27_reboot_setup();
- num_bridges = 0;
/*
* hub_rtc init and cpu clock intr enabled for later calibrate_delay.
*/
@@ -314,6 +293,11 @@ void __init ip27_setup(void)
ioc3_eth_init();
per_cpu_init();
- mips_io_port_base = IO_BASE;
+ set_io_port_base(IO_BASE);
+
board_time_init = ip27_time_init;
+
+ return 0;
}
+
+early_initcall(ip27_setup);
diff -puN /dev/null arch/mips/sgi-ip27/ip27-smp.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/sgi-ip27/ip27-smp.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,227 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file "COPYING" in the main directory of this
+ * archive for more details.
+ *
+ * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
+ * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
+ */
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <asm/page.h>
+#include <asm/processor.h>
+#include <asm/sn/arch.h>
+#include <asm/sn/gda.h>
+#include <asm/sn/intr.h>
+#include <asm/sn/klconfig.h>
+#include <asm/sn/launch.h>
+#include <asm/sn/mapped_kernel.h>
+#include <asm/sn/sn_private.h>
+#include <asm/sn/types.h>
+#include <asm/sn/sn0/hubpi.h>
+#include <asm/sn/sn0/hubio.h>
+#include <asm/sn/sn0/ip27.h>
+
+/*
+ * Takes as first input the PROM assigned cpu id, and the kernel
+ * assigned cpu id as the second.
+ */
+static void alloc_cpupda(cpuid_t cpu, int cpunum)
+{
+ cnodeid_t node = get_cpu_cnode(cpu);
+ nasid_t nasid = COMPACT_TO_NASID_NODEID(node);
+
+ cputonasid(cpunum) = nasid;
+ cputocnode(cpunum) = node;
+ cputoslice(cpunum) = get_cpu_slice(cpu);
+}
+
+static nasid_t get_actual_nasid(lboard_t *brd)
+{
+ klhub_t *hub;
+
+ if (!brd)
+ return INVALID_NASID;
+
+ /* find out if we are a completely disabled brd. */
+ hub = (klhub_t *)find_first_component(brd, KLSTRUCT_HUB);
+ if (!hub)
+ return INVALID_NASID;
+ if (!(hub->hub_info.flags & KLINFO_ENABLE)) /* disabled node brd */
+ return hub->hub_info.physid;
+ else
+ return brd->brd_nasid;
+}
+
+static int do_cpumask(cnodeid_t cnode, nasid_t nasid, int highest)
+{
+ static int tot_cpus_found = 0;
+ lboard_t *brd;
+ klcpu_t *acpu;
+ int cpus_found = 0;
+ cpuid_t cpuid;
+
+ brd = find_lboard((lboard_t *)KL_CONFIG_INFO(nasid), KLTYPE_IP27);
+
+ do {
+ acpu = (klcpu_t *)find_first_component(brd, KLSTRUCT_CPU);
+ while (acpu) {
+ cpuid = acpu->cpu_info.virtid;
+ /* cnode is not valid for completely disabled brds */
+ if (get_actual_nasid(brd) == brd->brd_nasid)
+ cpuid_to_compact_node[cpuid] = cnode;
+ if (cpuid > highest)
+ highest = cpuid;
+ /* Only let it join in if it's marked enabled */
+ if ((acpu->cpu_info.flags & KLINFO_ENABLE) &&
+ (tot_cpus_found != NR_CPUS)) {
+ cpu_set(cpuid, phys_cpu_present_map);
+ alloc_cpupda(cpuid, tot_cpus_found);
+ cpus_found++;
+ tot_cpus_found++;
+ }
+ acpu = (klcpu_t *)find_component(brd, (klinfo_t *)acpu,
+ KLSTRUCT_CPU);
+ }
+ brd = KLCF_NEXT(brd);
+ if (!brd)
+ break;
+
+ brd = find_lboard(brd, KLTYPE_IP27);
+ } while (brd);
+
+ return highest;
+}
+
+void cpu_node_probe(void)
+{
+ int i, highest = 0;
+ gda_t *gdap = GDA;
+
+ /*
+ * Initialize the arrays to invalid nodeid (-1)
+ */
+ for (i = 0; i < MAX_COMPACT_NODES; i++)
+ compact_to_nasid_node[i] = INVALID_NASID;
+ for (i = 0; i < MAX_NASIDS; i++)
+ nasid_to_compact_node[i] = INVALID_CNODEID;
+ for (i = 0; i < MAXCPUS; i++)
+ cpuid_to_compact_node[i] = INVALID_CNODEID;
+
+ numnodes = 0;
+ for (i = 0; i < MAX_COMPACT_NODES; i++) {
+ nasid_t nasid = gdap->g_nasidtable[i];
+ if (nasid == INVALID_NASID)
+ break;
+ compact_to_nasid_node[i] = nasid;
+ nasid_to_compact_node[nasid] = i;
+ numnodes++;
+ highest = do_cpumask(i, nasid, highest);
+ }
+
+ printk("Discovered %d cpus on %d nodes\n", highest + 1, numnodes);
+}
+
+void __init prom_build_cpu_map(void)
+{
+}
+
+static void intr_clear_bits(nasid_t nasid, volatile hubreg_t *pend,
+ int base_level)
+{
+ volatile hubreg_t bits;
+ int i;
+
+ /* Check pending interrupts */
+ if ((bits = HUB_L(pend)) != 0)
+ for (i = 0; i < N_INTPEND_BITS; i++)
+ if (bits & (1 << i))
+ LOCAL_HUB_CLR_INTR(base_level + i);
+}
+
+static void intr_clear_all(nasid_t nasid)
+{
+ REMOTE_HUB_S(nasid, PI_INT_MASK0_A, 0);
+ REMOTE_HUB_S(nasid, PI_INT_MASK0_B, 0);
+ REMOTE_HUB_S(nasid, PI_INT_MASK1_A, 0);
+ REMOTE_HUB_S(nasid, PI_INT_MASK1_B, 0);
+ intr_clear_bits(nasid, REMOTE_HUB_ADDR(nasid, PI_INT_PEND0),
+ INT_PEND0_BASELVL);
+ intr_clear_bits(nasid, REMOTE_HUB_ADDR(nasid, PI_INT_PEND1),
+ INT_PEND1_BASELVL);
+}
+
+void __init prom_prepare_cpus(unsigned int max_cpus)
+{
+ cnodeid_t cnode;
+
+ for (cnode = 0; cnode < numnodes; cnode++)
+ intr_clear_all(COMPACT_TO_NASID_NODEID(cnode));
+
+ /* Master has already done per_cpu_init() */
+ install_ipi();
+
+ replicate_kernel_text(numnodes);
+
+ /*
+ * Assumption to be fixed: we're always booted on logical / physical
+ * processor 0. While we're always running on logical processor 0
+ * this still means this is physical processor zero; it might for
+ * example be disabled in the firwware.
+ */
+ alloc_cpupda(0, 0);
+}
+
+/*
+ * Launch a slave into smp_bootstrap(). It doesn't take an argument, and we
+ * set sp to the kernel stack of the newly created idle process, gp to the proc
+ * struct so that current_thread_info() will work.
+ */
+void __init prom_boot_secondary(int cpu, struct task_struct *idle)
+{
+ unsigned long gp = (unsigned long) idle->thread_info;
+ unsigned long sp = gp + THREAD_SIZE - 32;
+
+ LAUNCH_SLAVE(cputonasid(cpu),cputoslice(cpu),
+ (launch_proc_t)MAPPED_KERN_RW_TO_K0(smp_bootstrap),
+ 0, (void *) sp, (void *) gp);
+}
+
+void prom_init_secondary(void)
+{
+ per_cpu_init();
+ local_irq_enable();
+}
+
+void __init prom_cpus_done(void)
+{
+}
+
+void prom_smp_finish(void)
+{
+}
+
+void core_send_ipi(int destid, unsigned int action)
+{
+ int irq;
+
+ switch (action) {
+ case SMP_RESCHEDULE_YOURSELF:
+ irq = CPU_RESCHED_A_IRQ;
+ break;
+ case SMP_CALL_FUNCTION:
+ irq = CPU_CALL_A_IRQ;
+ break;
+ default:
+ panic("sendintr");
+ }
+
+ irq += cputoslice(destid);
+
+ /*
+ * Convert the compact hub number to the NASID to get the correct
+ * part of the address space. Then set the interrupt bit associated
+ * with the CPU we want to send the interrupt to.
+ */
+ REMOTE_HUB_SEND_INTR(COMPACT_TO_NASID_NODEID(cputocnode(destid)), irq);
+}
diff -puN arch/mips/sgi-ip27/ip27-timer.c~mips-megapatch arch/mips/sgi-ip27/ip27-timer.c
--- 25/arch/mips/sgi-ip27/ip27-timer.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip27/ip27-timer.c 2004-02-19 12:53:02.000000000 -0800
@@ -13,7 +13,6 @@
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/mm.h>
-#include <linux/bcd.h>
#include <asm/time.h>
#include <asm/pgtable.h>
@@ -90,10 +89,10 @@ static int set_rtc_mmss(unsigned long no
return retval;
}
-void rt_timer_interrupt(struct pt_regs *regs)
+void ip27_rt_timer_interrupt(struct pt_regs *regs)
{
int cpu = smp_processor_id();
- int cpuA = ((cputoslice(cpu)) == 0);
+ int cpuA = cputoslice(cpu) == 0;
int irq = 9; /* XXX Assign number */
irq_enter();
@@ -182,12 +181,23 @@ static __init unsigned long get_m48t35_t
return mktime(year, month, date, hour, min, sec);
}
+static void ip27_timer_setup(struct irqaction *irq)
+{
+ /* over-write the handler, we use our own way */
+ irq->handler = no_action;
+
+ /* setup irqaction */
+// setup_irq(IP27_TIMER_IRQ, irq); /* XXX Can't do this yet. */
+}
+
void __init ip27_time_init(void)
{
xtime.tv_sec = get_m48t35_time();
xtime.tv_nsec = 0;
do_gettimeoffset = ip27_do_gettimeoffset;
+
+ board_timer_setup = ip27_timer_setup;
}
void __init cpu_time_init(void)
diff -puN arch/mips/sgi-ip27/Makefile~mips-megapatch arch/mips/sgi-ip27/Makefile
--- 25/arch/mips/sgi-ip27/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip27/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -6,4 +6,6 @@ obj-y := ip27-berr.o ip27-console.o ip27
ip27-klconfig.o ip27-klnuma.o ip27-memory.o ip27-nmi.o ip27-reset.o \
ip27-setup.o ip27-timer.o
+obj-$(CONFIG_SMP) += ip27-smp.o
+
EXTRA_AFLAGS := $(CFLAGS)
diff -puN arch/mips/sgi-ip32/crime.c~mips-megapatch arch/mips/sgi-ip32/crime.c
--- 25/arch/mips/sgi-ip32/crime.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip32/crime.c 2004-02-19 12:53:02.000000000 -0800
@@ -5,92 +5,101 @@
*
* Copyright (C) 2001, 2003 Keith M Wesolowski
*/
-#include <asm/ip32/crime.h>
-#include <asm/ptrace.h>
-#include <asm/bootinfo.h>
-#include <asm/page.h>
-#include <asm/mipsregs.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
+#include <asm/bootinfo.h>
+#include <asm/mipsregs.h>
+#include <asm/ptrace.h>
+#include <asm/page.h>
+#include <asm/ip32/crime.h>
+#include <asm/ip32/mace.h>
+
+void *sgi_crime;
+struct sgi_mace *mace;
-void __init crime_init (void)
+void __init crime_init(void)
{
- u64 id = crime_read_64 (CRIME_ID);
- u64 rev = id & CRIME_ID_REV;
+ unsigned int id, rev;
+ const int field = 2 * sizeof(unsigned long);
+
+ sgi_crime = ioremap(CRIME_BASE, 1);
+ mace = ioremap(MACE_BASE, sizeof(struct sgi_mace));
+ id = crime_read(CRIME_ID);
+ rev = id & CRIME_ID_REV;
id = (id & CRIME_ID_IDBITS) >> 4;
- printk ("CRIME id %1lx rev %ld detected at 0x%016lx\n", id, rev,
- (unsigned long) CRIME_BASE);
+ printk (KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n",
+ id, rev, field, (unsigned long) CRIME_BASE);
}
-irqreturn_t crime_memerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t
+crime_memerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
{
- u64 memerr = crime_read_64 (CRIME_MEM_ERROR_STAT);
- u64 addr = crime_read_64 (CRIME_MEM_ERROR_ADDR);
+ unsigned long stat, addr;
int fatal = 0;
- memerr &= CRIME_MEM_ERROR_STAT_MASK;
- addr &= CRIME_MEM_ERROR_ADDR_MASK;
+ stat = crime_read(CRIME_MEM_ERROR_STAT) & CRIME_MEM_ERROR_STAT_MASK;
+ addr = crime_read(CRIME_MEM_ERROR_ADDR) & CRIME_MEM_ERROR_ADDR_MASK;
- printk("CRIME memory error at 0x%08lx ST 0x%08lx<", addr, memerr);
+ printk("CRIME memory error at 0x%08lx ST 0x%08lx<", addr, stat);
- if (memerr & CRIME_MEM_ERROR_INV)
+ if (stat & CRIME_MEM_ERROR_INV)
printk("INV,");
- if (memerr & CRIME_MEM_ERROR_ECC) {
- u64 ecc_syn = crime_read_64(CRIME_MEM_ERROR_ECC_SYN);
- u64 ecc_gen = crime_read_64(CRIME_MEM_ERROR_ECC_CHK);
-
- ecc_syn &= CRIME_MEM_ERROR_ECC_SYN_MASK;
- ecc_gen &= CRIME_MEM_ERROR_ECC_CHK_MASK;
+ if (stat & CRIME_MEM_ERROR_ECC) {
+ unsigned long ecc_syn = crime_read(CRIME_MEM_ERROR_ECC_SYN) &
+ CRIME_MEM_ERROR_ECC_SYN_MASK;
+ unsigned long ecc_gen = crime_read(CRIME_MEM_ERROR_ECC_CHK) &
+ CRIME_MEM_ERROR_ECC_CHK_MASK;
printk("ECC,SYN=0x%08lx,GEN=0x%08lx,", ecc_syn, ecc_gen);
}
- if (memerr & CRIME_MEM_ERROR_MULTIPLE) {
+ if (stat & CRIME_MEM_ERROR_MULTIPLE) {
fatal = 1;
printk("MULTIPLE,");
}
- if (memerr & CRIME_MEM_ERROR_HARD_ERR) {
+ if (stat & CRIME_MEM_ERROR_HARD_ERR) {
fatal = 1;
printk("HARD,");
}
- if (memerr & CRIME_MEM_ERROR_SOFT_ERR)
+ if (stat & CRIME_MEM_ERROR_SOFT_ERR)
printk("SOFT,");
- if (memerr & CRIME_MEM_ERROR_CPU_ACCESS)
+ if (stat & CRIME_MEM_ERROR_CPU_ACCESS)
printk("CPU,");
- if (memerr & CRIME_MEM_ERROR_VICE_ACCESS)
+ if (stat & CRIME_MEM_ERROR_VICE_ACCESS)
printk("VICE,");
- if (memerr & CRIME_MEM_ERROR_GBE_ACCESS)
+ if (stat & CRIME_MEM_ERROR_GBE_ACCESS)
printk("GBE,");
- if (memerr & CRIME_MEM_ERROR_RE_ACCESS)
- printk("RE,REID=0x%02lx,", (memerr & CRIME_MEM_ERROR_RE_ID)>>8);
- if (memerr & CRIME_MEM_ERROR_MACE_ACCESS)
- printk("MACE,MACEID=0x%02lx,", memerr & CRIME_MEM_ERROR_MACE_ID);
+ if (stat & CRIME_MEM_ERROR_RE_ACCESS)
+ printk("RE,REID=0x%02lx,", (stat & CRIME_MEM_ERROR_RE_ID)>>8);
+ if (stat & CRIME_MEM_ERROR_MACE_ACCESS)
+ printk("MACE,MACEID=0x%02lx,", stat & CRIME_MEM_ERROR_MACE_ID);
- crime_write_64 (CRIME_MEM_ERROR_STAT, 0);
+ crime_write(0, CRIME_MEM_ERROR_STAT);
if (fatal) {
printk("FATAL>\n");
- panic("Fatal memory error detected, halting\n");
- } else {
+ panic("Fatal memory error.");
+ } else
printk("NONFATAL>\n");
- }
return IRQ_HANDLED;
}
-irqreturn_t crime_cpuerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t
+crime_cpuerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
{
- u64 cpuerr = crime_read_64 (CRIME_CPU_ERROR_STAT);
- u64 addr = crime_read_64 (CRIME_CPU_ERROR_ADDR);
- cpuerr &= CRIME_CPU_ERROR_MASK;
- addr <<= 2UL;
+ unsigned long stat = crime_read(CRIME_CPU_ERROR_STAT) &
+ CRIME_CPU_ERROR_MASK;
+ uint64_t addr = crime_read(CRIME_CPU_ERROR_ADDR) &
+ CRIME_CPU_ERROR_ADDR_MASK;
+ addr <<= 2;
+
+ printk ("CRIME CPU error at 0x%09lx status 0x%08lx\n", addr, stat);
- printk ("CRIME CPU error detected at 0x%09lx status 0x%08lx\n",
- addr, cpuerr);
+ crime_write(0, CRIME_CPU_ERROR_STAT);
- crime_write_64 (CRIME_CPU_ERROR_STAT, 0);
return IRQ_HANDLED;
}
diff -puN arch/mips/sgi-ip32/ip32-irq.c~mips-megapatch arch/mips/sgi-ip32/ip32-irq.c
--- 25/arch/mips/sgi-ip32/ip32-irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip32/ip32-irq.c 2004-02-19 12:53:02.000000000 -0800
@@ -22,15 +22,18 @@
#include <asm/bitops.h>
#include <asm/mipsregs.h>
+#include <asm/signal.h>
#include <asm/system.h>
-#include <asm/ip32/ip32_ints.h>
#include <asm/ip32/crime.h>
#include <asm/ip32/mace.h>
-#include <asm/signal.h>
+#include <asm/ip32/ip32_ints.h>
/* issue a PIO read to make sure no PIO writes are pending */
-#define flush_crime_bus() crime_read_64(CRIME_CONTROL);
-#define flush_mace_bus() mace_read_64(MACEISA_FLASH_NIC_REG);
+#define flush_crime_bus() crime_read(CRIME_CONTROL);
+static void inline flush_mace_bus(void)
+{
+ volatile unsigned long junk = mace_perif_ctrl_read(misc);
+}
#undef DEBUG_IRQ
#ifdef DEBUG_IRQ
@@ -54,16 +57,16 @@
*
* CRIME_INT_STAT 31:0:
*
- * 0 -> 1 Video in 1
- * 1 -> 2 Video in 2
- * 2 -> 3 Video out
- * 3 -> 4 Mace ethernet
- * 4 -> S SuperIO sub-interrupt
- * 5 -> M Miscellaneous sub-interrupt
- * 6 -> A Audio sub-interrupt
- * 7 -> 8 PCI bridge errors
- * 8 -> 9 PCI SCSI aic7xxx 0
- * 9 -> 10 PCI SCSI aic7xxx 1
+ * 0 -> 1 Video in 1
+ * 1 -> 2 Video in 2
+ * 2 -> 3 Video out
+ * 3 -> 4 Mace ethernet
+ * 4 -> S SuperIO sub-interrupt
+ * 5 -> M Miscellaneous sub-interrupt
+ * 6 -> A Audio sub-interrupt
+ * 7 -> 8 PCI bridge errors
+ * 8 -> 9 PCI SCSI aic7xxx 0
+ * 9 -> 10 PCI SCSI aic7xxx 1
* 10 -> 11 PCI slot 0
* 11 -> 12 unused (PCI slot 1)
* 12 -> 13 unused (PCI slot 2)
@@ -82,9 +85,9 @@
* 25 -> 26 RE empty level
* 26 -> 27 RE full level
* 27 -> 28 RE idle level
- * 28 -> 29 unused (software 0) (E)
- * 29 -> 30 unused (software 1) (E)
- * 30 -> 31 unused (software 2) - crime 1.5 CPU SysCorError (E)
+ * 28 -> 29 unused (software 0) (E)
+ * 29 -> 30 unused (software 1) (E)
+ * 30 -> 31 unused (software 2) - crime 1.5 CPU SysCorError (E)
* 31 -> 32 VICE
*
* S, M, A: Use the MACE ISA interrupt register
@@ -106,20 +109,24 @@
* is quite different anyway.
*/
+/*
+ * IRQ spinlock - Ralf says not to disable CPU interrupts,
+ * and I think he knows better.
+ */
+static spinlock_t ip32_irq_lock = SPIN_LOCK_UNLOCKED;
+
/* Some initial interrupts to set up */
extern irqreturn_t crime_memerr_intr (int irq, void *dev_id,
- struct pt_regs *regs);
+ struct pt_regs *regs);
extern irqreturn_t crime_cpuerr_intr (int irq, void *dev_id,
- struct pt_regs *regs);
+ struct pt_regs *regs);
struct irqaction memerr_irq = { crime_memerr_intr, SA_INTERRUPT,
- 0, "CRIME memory error", NULL,
- NULL };
+ 0, "CRIME memory error", NULL, NULL };
struct irqaction cpuerr_irq = { crime_cpuerr_intr, SA_INTERRUPT,
- 0, "CRIME CPU error", NULL,
- NULL };
+ 0, "CRIME CPU error", NULL, NULL };
-extern void ip32_handle_int (void);
+extern void ip32_handle_int(void);
/*
* For interrupts wired from a single device to the CPU. Only the clock
@@ -144,7 +151,7 @@ static void disable_cpu_irq(unsigned int
static void end_cpu_irq(unsigned int irq)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_cpu_irq (irq);
}
@@ -167,21 +174,20 @@ static struct hw_interrupt_type ip32_cpu
* We get to split the register in half and do faster lookups.
*/
-static u64 crime_mask=0;
+static uint64_t crime_mask;
static void enable_crime_irq(unsigned int irq)
{
unsigned long flags;
- local_irq_save(flags);
+ spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask |= 1 << (irq - 1);
- crime_write_64(CRIME_INT_MASK, crime_mask);
- local_irq_restore(flags);
+ crime_write(crime_mask, CRIME_INT_MASK);
+ spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
static unsigned int startup_crime_irq(unsigned int irq)
{
- crime_mask = crime_read_64(CRIME_INT_MASK);
enable_crime_irq(irq);
return 0; /* This is probably not right; we could have pending irqs */
}
@@ -190,14 +196,14 @@ static void disable_crime_irq(unsigned i
{
unsigned long flags;
- local_irq_save(flags);
+ spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask &= ~(1 << (irq - 1));
- crime_write_64(CRIME_INT_MASK, crime_mask);
+ crime_write(crime_mask, CRIME_INT_MASK);
flush_crime_bus();
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
-static void mask_and_ack_crime_irq (unsigned int irq)
+static void mask_and_ack_crime_irq(unsigned int irq)
{
unsigned long flags;
@@ -205,20 +211,20 @@ static void mask_and_ack_crime_irq (unsi
if ((irq >= CRIME_GBE0_IRQ && irq <= CRIME_GBE3_IRQ)
|| (irq >= CRIME_RE_EMPTY_E_IRQ && irq <= CRIME_RE_IDLE_E_IRQ)
|| (irq >= CRIME_SOFT0_IRQ && irq <= CRIME_SOFT2_IRQ)) {
- u64 crime_int;
- local_irq_save(flags);
- crime_int = crime_read_64(CRIME_HARD_INT);
+ uint64_t crime_int;
+ spin_lock_irqsave(&ip32_irq_lock, flags);
+ crime_int = crime_read(CRIME_HARD_INT);
crime_int &= ~(1 << (irq - 1));
- crime_write_64(CRIME_HARD_INT, crime_int);
- local_irq_restore(flags);
+ crime_write(crime_int, CRIME_HARD_INT);
+ spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
disable_crime_irq(irq);
}
static void end_crime_irq(unsigned int irq)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_crime_irq (irq);
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ enable_crime_irq(irq);
}
#define shutdown_crime_irq disable_crime_irq
@@ -240,24 +246,22 @@ static struct hw_interrupt_type ip32_cri
* next chunk of the CRIME register in one piece.
*/
-static u32 macepci_mask;
+static unsigned long macepci_mask;
static void enable_macepci_irq(unsigned int irq)
{
unsigned long flags;
- local_irq_save(flags);
+ spin_lock_irqsave(&ip32_irq_lock, flags);
macepci_mask |= MACEPCI_CONTROL_INT(irq - 9);
- mace_write_32(MACEPCI_CONTROL, macepci_mask);
- crime_mask |= 1 << (irq - 1);
- crime_write_64(CRIME_INT_MASK, crime_mask);
- local_irq_restore(flags);
+ mace->pci.control = macepci_mask;
+ crime_mask |= 1 << (irq - 1);
+ crime_write(crime_mask, CRIME_INT_MASK);
+ spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
static unsigned int startup_macepci_irq(unsigned int irq)
{
- crime_mask = crime_read_64 (CRIME_INT_MASK);
- macepci_mask = mace_read_32(MACEPCI_CONTROL);
enable_macepci_irq (irq);
return 0;
}
@@ -266,20 +270,20 @@ static void disable_macepci_irq(unsigned
{
unsigned long flags;
- local_irq_save(flags);
+ spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask &= ~(1 << (irq - 1));
- crime_write_64(CRIME_INT_MASK, crime_mask);
+ crime_write(crime_mask, CRIME_INT_MASK);
flush_crime_bus();
macepci_mask &= ~MACEPCI_CONTROL_INT(irq - 9);
- mace_write_32(MACEPCI_CONTROL, macepci_mask);
+ mace->pci.control = macepci_mask;
flush_mace_bus();
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
static void end_macepci_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_macepci_irq (irq);
+ enable_macepci_irq(irq);
}
#define shutdown_macepci_irq disable_macepci_irq
@@ -300,7 +304,40 @@ static struct hw_interrupt_type ip32_mac
* CRIME register.
*/
-u32 maceisa_mask = 0;
+#define MACEISA_AUDIO_INT (MACEISA_AUDIO_SW_INT | \
+ MACEISA_AUDIO_SC_INT | \
+ MACEISA_AUDIO1_DMAT_INT | \
+ MACEISA_AUDIO1_OF_INT | \
+ MACEISA_AUDIO2_DMAT_INT | \
+ MACEISA_AUDIO2_MERR_INT | \
+ MACEISA_AUDIO3_DMAT_INT | \
+ MACEISA_AUDIO3_MERR_INT)
+#define MACEISA_MISC_INT (MACEISA_RTC_INT | \
+ MACEISA_KEYB_INT | \
+ MACEISA_KEYB_POLL_INT | \
+ MACEISA_MOUSE_INT | \
+ MACEISA_MOUSE_POLL_INT | \
+ MACEISA_TIMER0_INT | \
+ MACEISA_TIMER1_INT | \
+ MACEISA_TIMER2_INT)
+#define MACEISA_SUPERIO_INT (MACEISA_PARALLEL_INT | \
+ MACEISA_PAR_CTXA_INT | \
+ MACEISA_PAR_CTXB_INT | \
+ MACEISA_PAR_MERR_INT | \
+ MACEISA_SERIAL1_INT | \
+ MACEISA_SERIAL1_TDMAT_INT | \
+ MACEISA_SERIAL1_TDMAPR_INT | \
+ MACEISA_SERIAL1_TDMAME_INT | \
+ MACEISA_SERIAL1_RDMAT_INT | \
+ MACEISA_SERIAL1_RDMAOR_INT | \
+ MACEISA_SERIAL2_INT | \
+ MACEISA_SERIAL2_TDMAT_INT | \
+ MACEISA_SERIAL2_TDMAPR_INT | \
+ MACEISA_SERIAL2_TDMAME_INT | \
+ MACEISA_SERIAL2_RDMAT_INT | \
+ MACEISA_SERIAL2_RDMAOR_INT)
+
+static unsigned long maceisa_mask;
static void enable_maceisa_irq (unsigned int irq)
{
@@ -320,19 +357,17 @@ static void enable_maceisa_irq (unsigned
crime_int = MACE_SUPERIO_INT;
break;
}
- DBG ("crime_int %016lx enabled\n", crime_int);
- local_irq_save(flags);
+ DBG ("crime_int %08x enabled\n", crime_int);
+ spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask |= crime_int;
- crime_write_64(CRIME_INT_MASK, crime_mask);
+ crime_write(crime_mask, CRIME_INT_MASK);
maceisa_mask |= 1 << (irq - 33);
- mace_write_32(MACEISA_INT_MASK, maceisa_mask);
- local_irq_restore(flags);
+ mace_perif_ctrl_write(maceisa_mask, imask);
+ spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
-static unsigned int startup_maceisa_irq (unsigned int irq)
+static unsigned int startup_maceisa_irq(unsigned int irq)
{
- crime_mask = crime_read_64 (CRIME_INT_MASK);
- maceisa_mask = mace_read_32(MACEISA_INT_MASK);
enable_maceisa_irq(irq);
return 0;
}
@@ -342,7 +377,7 @@ static void disable_maceisa_irq(unsigned
unsigned int crime_int = 0;
unsigned long flags;
- local_irq_save(flags);
+ spin_lock_irqsave(&ip32_irq_lock, flags);
maceisa_mask &= ~(1 << (irq - 33));
if(!(maceisa_mask & MACEISA_AUDIO_INT))
crime_int |= MACE_AUDIO_INT;
@@ -351,28 +386,27 @@ static void disable_maceisa_irq(unsigned
if(!(maceisa_mask & MACEISA_SUPERIO_INT))
crime_int |= MACE_SUPERIO_INT;
crime_mask &= ~crime_int;
- crime_write_64(CRIME_INT_MASK, crime_mask);
+ crime_write(crime_mask, CRIME_INT_MASK);
flush_crime_bus();
- mace_write_32(MACEISA_INT_MASK, maceisa_mask);
+ mace_perif_ctrl_write(maceisa_mask, imask);
flush_mace_bus();
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
static void mask_and_ack_maceisa_irq(unsigned int irq)
{
- u32 mace_int;
- unsigned long flags;
+ unsigned long mace_int, flags;
switch (irq) {
case MACEISA_PARALLEL_IRQ:
case MACEISA_SERIAL1_TDMAPR_IRQ:
case MACEISA_SERIAL2_TDMAPR_IRQ:
/* edge triggered */
- local_irq_save(flags);
- mace_int = mace_read_32(MACEISA_INT_STAT);
+ spin_lock_irqsave(&ip32_irq_lock, flags);
+ mace_int = mace_perif_ctrl_read(istat);
mace_int &= ~(1 << (irq - 33));
- mace_write_32(MACEISA_INT_STAT, mace_int);
- local_irq_restore(flags);
+ mace_perif_ctrl_write(mace_int, istat);
+ spin_unlock_irqrestore(&ip32_irq_lock, flags);
break;
}
disable_maceisa_irq(irq);
@@ -380,8 +414,8 @@ static void mask_and_ack_maceisa_irq(uns
static void end_maceisa_irq(unsigned irq)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_maceisa_irq (irq);
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ enable_maceisa_irq(irq);
}
#define shutdown_maceisa_irq disable_maceisa_irq
@@ -405,15 +439,14 @@ static void enable_mace_irq(unsigned int
{
unsigned long flags;
- local_irq_save(flags);
+ spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask |= 1 << (irq - 1);
- crime_write_64 (CRIME_INT_MASK, crime_mask);
- local_irq_restore (flags);
+ crime_write(crime_mask, CRIME_INT_MASK);
+ spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
static unsigned int startup_mace_irq(unsigned int irq)
{
- crime_mask = crime_read_64 (CRIME_INT_MASK);
enable_mace_irq(irq);
return 0;
}
@@ -422,17 +455,17 @@ static void disable_mace_irq(unsigned in
{
unsigned long flags;
- local_irq_save(flags);
+ spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask &= ~(1 << (irq - 1));
- crime_write_64 (CRIME_INT_MASK, crime_mask);
+ crime_write(crime_mask, CRIME_INT_MASK);
flush_crime_bus();
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
static void end_mace_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_mace_irq (irq);
+ enable_mace_irq(irq);
}
#define shutdown_mace_irq disable_mace_irq
@@ -449,28 +482,22 @@ static struct hw_interrupt_type ip32_mac
NULL
};
-static void ip32_unknown_interrupt (struct pt_regs *regs)
+static void ip32_unknown_interrupt(struct pt_regs *regs)
{
- u64 crime;
- u32 mace;
+ uint64_t crime;
printk ("Unknown interrupt occurred!\n");
- printk ("cp0_status: %08x\n",
- read_c0_status ());
- printk ("cp0_cause: %08x\n",
- read_c0_cause ());
- crime = crime_read_64 (CRIME_INT_MASK);
- printk ("CRIME interrupt mask: %016lx\n", crime);
- crime = crime_read_64 (CRIME_INT_STAT);
- printk ("CRIME interrupt status: %016lx\n", crime);
- crime = crime_read_64 (CRIME_HARD_INT);
- printk ("CRIME hardware interrupt register: %016lx\n", crime);
- mace = mace_read_32 (MACEISA_INT_MASK);
- printk ("MACE ISA interrupt mask: %08x\n", mace);
- mace = mace_read_32 (MACEISA_INT_STAT);
- printk ("MACE ISA interrupt status: %08x\n", mace);
- mace = mace_read_32 (MACEPCI_CONTROL);
- printk ("MACE PCI control register: %08x\n", mace);
+ printk ("cp0_status: %08x\n", read_c0_status());
+ printk ("cp0_cause: %08x\n", read_c0_cause());
+ crime = crime_read(CRIME_INT_MASK);
+ printk ("CRIME intr mask: %016lx\n", crime);
+ crime = crime_read(CRIME_INT_STAT);
+ printk ("CRIME intr status: %016lx\n", crime);
+ crime = crime_read(CRIME_HARD_INT);
+ printk ("CRIME hardware intr register: %016lx\n", crime);
+ printk ("MACE ISA intr mask: %08lx\n", mace_perif_ctrl_read(imask));
+ printk ("MACE ISA intr status: %08lx\n", mace_perif_ctrl_read(istat));
+ printk ("MACE PCI control register: %08x\n", mace->pci.control);
printk("Register dump:\n");
show_regs(regs);
@@ -481,18 +508,19 @@ static void ip32_unknown_interrupt (stru
}
/* CRIME 1.1 appears to deliver all interrupts to this one pin. */
+/* change this to loop over all edge-triggered irqs, exception masked out ones */
void ip32_irq0(struct pt_regs *regs)
{
- u64 crime_int;
+ uint64_t crime_int;
int irq = 0;
- crime_int = crime_read_64(CRIME_INT_STAT) & crime_mask;
- irq = ffs(crime_int);
- crime_int = 1ULL << (irq - 1);
+ crime_int = crime_read(CRIME_INT_STAT) & crime_mask;
+ irq = ffs(crime_int);
+ crime_int = 1 << (irq - 1);
if (crime_int & CRIME_MACEISA_INT_MASK) {
- u32 mace_int = mace_read_32 (MACEISA_INT_STAT) & maceisa_mask;
- irq = ffs (mace_int) + 32;
+ unsigned long mace_int = mace_perif_ctrl_read(istat);
+ irq = ffs(mace_int & maceisa_mask) + 32;
}
DBG("*irq %u*\n", irq);
do_IRQ(irq, regs);
@@ -500,51 +528,43 @@ void ip32_irq0(struct pt_regs *regs)
void ip32_irq1(struct pt_regs *regs)
{
- ip32_unknown_interrupt (regs);
+ ip32_unknown_interrupt(regs);
}
void ip32_irq2(struct pt_regs *regs)
{
- ip32_unknown_interrupt (regs);
+ ip32_unknown_interrupt(regs);
}
void ip32_irq3(struct pt_regs *regs)
{
- ip32_unknown_interrupt (regs);
+ ip32_unknown_interrupt(regs);
}
void ip32_irq4(struct pt_regs *regs)
{
- ip32_unknown_interrupt (regs);
+ ip32_unknown_interrupt(regs);
}
void ip32_irq5(struct pt_regs *regs)
{
- do_IRQ (CLOCK_IRQ, regs);
+ do_IRQ(CLOCK_IRQ, regs);
}
void __init init_IRQ(void)
{
unsigned int irq;
- int i;
+ init_generic_irq();
/* Install our interrupt handler, then clear and disable all
- * CRIME and MACE interrupts.
- */
- crime_write_64(CRIME_INT_MASK, 0);
- crime_write_64(CRIME_HARD_INT, 0);
- crime_write_64(CRIME_SOFT_INT, 0);
- mace_write_32(MACEISA_INT_STAT, 0);
- mace_write_32(MACEISA_INT_MASK, 0);
+ * CRIME and MACE interrupts. */
+ crime_write(0, CRIME_INT_MASK);
+ crime_write(0, CRIME_HARD_INT);
+ crime_write(0, CRIME_SOFT_INT);
+ mace_perif_ctrl_write(0, istat);
+ mace_perif_ctrl_write(0, imask);
set_except_vector(0, ip32_handle_int);
- for (i = 0; i < NR_IRQS; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = NULL;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &no_irq_type;
- }
-
for (irq = 0; irq <= IP32_IRQ_MAX; irq++) {
hw_irq_controller *controller;
diff -puN arch/mips/sgi-ip32/ip32-irq-glue.S~mips-megapatch arch/mips/sgi-ip32/ip32-irq-glue.S
--- 25/arch/mips/sgi-ip32/ip32-irq-glue.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip32/ip32-irq-glue.S 2004-02-19 12:53:02.000000000 -0800
@@ -13,7 +13,6 @@
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
#include <asm/addrspace.h>
-#include <asm/ip32/ip32_ints.h>
.text
.set noreorder
diff -puN arch/mips/sgi-ip32/ip32-reset.c~mips-megapatch arch/mips/sgi-ip32/ip32-reset.c
--- 25/arch/mips/sgi-ip32/ip32-reset.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip32/ip32-reset.c 2004-02-19 12:53:02.000000000 -0800
@@ -16,13 +16,13 @@
#include <linux/ds17287rtc.h>
#include <linux/interrupt.h>
+#include <asm/addrspace.h>
#include <asm/irq.h>
#include <asm/reboot.h>
-#include <asm/sgialib.h>
-#include <asm/addrspace.h>
-#include <asm/types.h>
#include <asm/system.h>
#include <asm/wbflush.h>
+#include <asm/ip32/mace.h>
+#include <asm/ip32/crime.h>
#include <asm/ip32/ip32_ints.h>
#define POWERDOWN_TIMEOUT 120
@@ -33,7 +33,7 @@
#define PANIC_FREQ (HZ / 8)
static struct timer_list power_timer, blink_timer, debounce_timer;
-static int shuting_down = 0, has_paniced = 0;
+static int has_paniced, shuting_down;
static void ip32_machine_restart(char *command) __attribute__((noreturn));
static void ip32_machine_halt(void) __attribute__((noreturn));
@@ -41,16 +41,13 @@ static void ip32_machine_power_off(void)
static void ip32_machine_restart(char *cmd)
{
- if (shuting_down)
- ip32_machine_power_off();
- ArcReboot();
+ crime_write(CRIME_CONTROL_HARD_RESET, CRIME_CONTROL);
+ while (1);
}
static inline void ip32_machine_halt(void)
{
- if (shuting_down)
- ip32_machine_power_off();
- ArcEnterInteractiveMode();
+ ip32_machine_power_off();
}
static void ip32_machine_power_off(void)
@@ -76,10 +73,7 @@ static void ip32_machine_power_off(void)
CMOS_WRITE(xctrl_a | DS_XCTRL4A_PAB, DS_B1_XCTRL4A);
CMOS_WRITE(reg_a, RTC_REG_A);
wbflush();
-
- while(1) {
- printk(KERN_DEBUG "Power off!\n");
- }
+ while (1);
}
static void power_timeout(unsigned long data)
@@ -89,35 +83,33 @@ static void power_timeout(unsigned long
static void blink_timeout(unsigned long data)
{
- u64 mc_led = mace_read_64(MACEISA_FLASH_NIC_REG);
-
- mc_led ^= MACEISA_LED_RED;
- mace_write_64(MACEISA_FLASH_NIC_REG, mc_led);
+ unsigned long led = mace_perif_ctrl_read(misc) ^ MACEISA_LED_RED;
+ mace_perif_ctrl_write(led, misc);
mod_timer(&blink_timer, jiffies+data);
}
static void debounce(unsigned long data)
{
- volatile unsigned char reg_a,reg_c,xctrl_a;
+ volatile unsigned char reg_a, reg_c, xctrl_a;
reg_c = CMOS_READ(RTC_INTR_FLAGS);
CMOS_WRITE(reg_a | DS_REGA_DV0, RTC_REG_A);
wbflush();
xctrl_a = CMOS_READ(DS_B1_XCTRL4A);
- if( (xctrl_a & DS_XCTRL4A_IFS ) || ( reg_c & RTC_IRQF ) ) {
+ if ((xctrl_a & DS_XCTRL4A_IFS) || (reg_c & RTC_IRQF )) {
/* Interrupt still being sent. */
debounce_timer.expires = jiffies + 50;
add_timer(&debounce_timer);
/* clear interrupt source */
- CMOS_WRITE( xctrl_a & ~DS_XCTRL4A_IFS, DS_B1_XCTRL4A);
+ CMOS_WRITE(xctrl_a & ~DS_XCTRL4A_IFS, DS_B1_XCTRL4A);
CMOS_WRITE(reg_a & ~DS_REGA_DV0, RTC_REG_A);
return;
}
CMOS_WRITE(reg_a & ~DS_REGA_DV0, RTC_REG_A);
if (has_paniced)
- ArcReboot();
+ ip32_machine_restart(NULL);
enable_irq(MACEISA_RTC_IRQ);
}
@@ -147,7 +139,7 @@ static irqreturn_t ip32_rtc_int(int irq,
volatile unsigned char reg_c;
reg_c = CMOS_READ(RTC_INTR_FLAGS);
- if( ! (reg_c & RTC_IRQF) ) {
+ if (!(reg_c & RTC_IRQF)) {
printk(KERN_WARNING
"%s: RTC IRQ without RTC_IRQF\n", __FUNCTION__);
}
@@ -164,18 +156,17 @@ static irqreturn_t ip32_rtc_int(int irq,
}
static int panic_event(struct notifier_block *this, unsigned long event,
- void *ptr)
+ void *ptr)
{
- u64 mc_led;
+ unsigned long led;
if (has_paniced)
return NOTIFY_DONE;
has_paniced = 1;
/* turn off the green LED */
- mc_led = mace_read_64(MACEISA_FLASH_NIC_REG);
- mc_led |= MACEISA_LED_GREEN;
- mace_write_64(MACEISA_FLASH_NIC_REG, mc_led);
+ led = mace_perif_ctrl_read(misc) | MACEISA_LED_GREEN;
+ mace_perif_ctrl_write(led, misc);
blink_timer.data = PANIC_FREQ;
blink_timeout(PANIC_FREQ);
@@ -189,7 +180,11 @@ static struct notifier_block panic_block
static __init int ip32_reboot_setup(void)
{
- u64 mc_led = mace_read_64(MACEISA_FLASH_NIC_REG);
+ /* turn on the green led only */
+ unsigned long led = mace_perif_ctrl_read(misc);
+ led |= MACEISA_LED_RED;
+ led &= ~MACEISA_LED_GREEN;
+ mace_perif_ctrl_write(led, misc);
_machine_restart = ip32_machine_restart;
_machine_halt = ip32_machine_halt;
@@ -199,11 +194,6 @@ static __init int ip32_reboot_setup(void
blink_timer.function = blink_timeout;
notifier_chain_register(&panic_notifier_list, &panic_block);
- /* turn on the green led only */
- mc_led |= MACEISA_LED_RED;
- mc_led &= ~MACEISA_LED_GREEN;
- mace_write_64(MACEISA_FLASH_NIC_REG, mc_led);
-
return 0;
}
diff -puN -L arch/mips/sgi-ip32/ip32-rtc.c arch/mips/sgi-ip32/ip32-rtc.c~mips-megapatch /dev/null
--- 25/arch/mips/sgi-ip32/ip32-rtc.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,32 +0,0 @@
-/*
- * RTC routines for IP32 style attached Dallas chip.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Harald Koerfgen
- */
-#include <linux/mc146818rtc.h>
-#include <asm/ip32/mace.h>
-
-static unsigned char ip32_rtc_read_data(unsigned long addr)
-{
- return (unsigned char) mace_read_8 (MACEISA_RTC_BASE + (addr << 8));
-}
-
-static void ip32_rtc_write_data(unsigned char data, unsigned long addr)
-{
- mace_write_8 (MACEISA_RTC_BASE + (addr << 8), data);
-}
-
-static int ip32_rtc_bcd_mode(void)
-{
- return 0;
-}
-
-struct rtc_ops ip32_rtc_ops = {
- &ip32_rtc_read_data,
- &ip32_rtc_write_data,
- &ip32_rtc_bcd_mode
-};
diff -puN arch/mips/sgi-ip32/ip32-setup.c~mips-megapatch arch/mips/sgi-ip32/ip32-setup.c
--- 25/arch/mips/sgi-ip32/ip32-setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip32/ip32-setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -6,29 +6,26 @@
* for more details.
*
* Copyright (C) 2000 Harald Koerfgen
+ * Copyright (C) 2002, 03 Ilya A. Volynets
*/
#include <linux/config.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
-#include <linux/mc146818rtc.h>
#include <linux/param.h>
#include <linux/init.h>
+#include <linux/console.h>
#include <asm/time.h>
#include <asm/mipsregs.h>
#include <asm/bootinfo.h>
#include <asm/mmu_context.h>
-#include <asm/ip32/crime.h>
-#include <asm/ip32/mace.h>
-#include <asm/ip32/ip32_ints.h>
#include <asm/sgialib.h>
#include <asm/traps.h>
-
-extern struct rtc_ops ip32_rtc_ops;
-extern u32 cc_interval;
+#include <asm/io.h>
+#include <asm/ip32/mace.h>
+#include <asm/ip32/ip32_ints.h>
#ifdef CONFIG_SGI_O2MACE_ETH
-
/*
* This is taken care of in here 'cause they say using Arc later on is
* problematic
@@ -60,44 +57,83 @@ static inline void str2eaddr(unsigned ch
#endif
extern void ip32_time_init(void);
-extern void ip32_be_init(void);
-extern void __init ip32_timer_setup (struct irqaction *irq);
-extern void __init crime_init (void);
+extern void ip32_be_init(void);
+extern void __init ip32_timer_setup (struct irqaction *irq);
+extern void __init crime_init (void);
+
+#ifdef CONFIG_SERIAL_8250
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+extern int __init early_serial_setup(struct uart_port *port);
+
+#define STD_COM_FLAGS (ASYNC_SKIP_TEST)
+#define BASE_BAUD (1843200 / 16)
+#endif /* CONFIG_SERIAL_8250 */
-void __init ip32_setup(void)
+static int __init ip32_setup(void)
{
-#ifdef CONFIG_SERIAL_CONSOLE
- char *ctype;
-#endif
- TLBMISS_HANDLER_SETUP ();
+ set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));
+
+ crime_init();
- mips_io_port_base = UNCACHEDADDR(MACEPCI_HI_IO);;
+#ifdef CONFIG_SERIAL_8250
+ {
+ static struct uart_port o2_serial[2];
+
+ memset(o2_serial, 0, sizeof(o2_serial));
+ o2_serial[0].type = PORT_16550A;
+ o2_serial[0].line = 0;
+ o2_serial[0].irq = MACEISA_SERIAL1_IRQ;
+ o2_serial[0].flags = STD_COM_FLAGS | UPF_RESOURCES;
+ o2_serial[0].uartclk = BASE_BAUD * 16;
+ o2_serial[0].iotype = UPIO_MEM;
+ o2_serial[0].membase = (char *)&mace->isa.serial1;
+ o2_serial[0].fifosize = 14;
+ /* How much to shift register offset by. Each UART register
+ * is replicated over 256 byte space */
+ o2_serial[0].regshift = 8;
+ o2_serial[1].type = PORT_16550A;
+ o2_serial[1].line = 1;
+ o2_serial[1].irq = MACEISA_SERIAL2_IRQ;
+ o2_serial[1].flags = STD_COM_FLAGS | UPF_RESOURCES;
+ o2_serial[1].uartclk = BASE_BAUD * 16;
+ o2_serial[1].iotype = UPIO_MEM;
+ o2_serial[1].membase = (char *)&mace->isa.serial2;
+ o2_serial[1].fifosize = 14;
+ o2_serial[1].regshift = 8;
-#ifdef CONFIG_SERIAL_CONSOLE
- ctype = ArcGetEnvironmentVariable("console");
- if (*ctype == 'd') {
- if (ctype[1] == '2')
- console_setup ("ttyS1");
- else
- console_setup ("ttyS0");
+ early_serial_setup(&o2_serial[0]);
+ early_serial_setup(&o2_serial[1]);
}
#endif
#ifdef CONFIG_SGI_O2MACE_ETH
{
- char *mac=ArcGetEnvironmentVariable("eaddr");
+ char *mac = ArcGetEnvironmentVariable("eaddr");
str2eaddr(o2meth_eaddr, mac);
}
#endif
-#ifdef CONFIG_VT
- conswitchp = &dummy_con;
+#if defined(CONFIG_SERIAL_CORE_CONSOLE)
+ {
+ char* con = ArcGetEnvironmentVariable("console");
+ if (con && *con == 'd') {
+ static char options[8];
+ char *baud = ArcGetEnvironmentVariable("dbaud");
+ if (baud)
+ strcpy(options, baud);
+ add_preferred_console("ttyS", *(con + 1) == '2' ? 1 : 0,
+ baud ? options : NULL);
+ }
+ }
#endif
- rtc_ops = &ip32_rtc_ops;
board_be_init = ip32_be_init;
board_time_init = ip32_time_init;
board_timer_setup = ip32_timer_setup;
- crime_init();
+ return 0;
}
+
+early_initcall(ip32_setup);
diff -puN arch/mips/sgi-ip32/ip32-timer.c~mips-megapatch arch/mips/sgi-ip32/ip32-timer.c
--- 25/arch/mips/sgi-ip32/ip32-timer.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip32/ip32-timer.c 2004-02-19 12:53:02.000000000 -0800
@@ -16,18 +16,18 @@
#include <linux/string.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
-#include <linux/mc146818rtc.h>
#include <linux/timex.h>
#include <asm/mipsregs.h>
#include <asm/param.h>
-#include <asm/ip32/crime.h>
-#include <asm/ip32/ip32_ints.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
-#include <asm/mipsregs.h>
#include <asm/io.h>
#include <asm/irq.h>
+#include <asm/ip32/crime.h>
+#include <asm/ip32/ip32_ints.h>
+
+#include <linux/mc146818rtc.h>
extern volatile unsigned long wall_jiffies;
@@ -47,23 +47,25 @@ static unsigned int timerhi, timerlo;
static irqreturn_t cc_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs);
-void __init ip32_timer_setup (struct irqaction *irq)
+static inline uint64_t crime_time(void)
{
- u64 crime_time;
- u32 cc_tick;
+ return crime_read(CRIME_TIMER) & CRIME_TIMER_MASK;
+}
+void __init ip32_timer_setup (struct irqaction *irq)
+{
+ uint64_t time;
+ unsigned int cc_tick;
write_c0_count(0);
irq->handler = cc_timer_interrupt;
printk("Calibrating system timer... ");
- crime_time = crime_read_64(CRIME_TIME) & CRIME_TIME_MASK;
+ time = crime_time();
cc_tick = read_c0_count();
- while ((crime_read_64 (CRIME_TIME) & CRIME_TIME_MASK) - crime_time
- < WAIT_MS * 1000000 / CRIME_NS_PER_TICK)
- ;
+ while (crime_time() - time < WAIT_MS * 1000000 / CRIME_NS_PER_TICK) ;
cc_tick = read_c0_count() - cc_tick;
cc_interval = cc_tick / HZ * (1000 / WAIT_MS);
/*
@@ -75,7 +77,7 @@ void __init ip32_timer_setup (struct irq
printk("%d MHz CPU detected\n", (int) (cc_interval / PER_MHZ));
- setup_irq (CLOCK_IRQ, irq);
+ setup_irq(CLOCK_IRQ, irq);
#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
/* Set ourselves up for future interrupts */
write_c0_compare(read_c0_count() + cc_interval);
@@ -85,7 +87,7 @@ void __init ip32_timer_setup (struct irq
static irqreturn_t cc_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
{
- u32 count;
+ unsigned int count;
/*
* The cycle counter is only 32 bit which is good for about
diff -puN arch/mips/sgi-ip32/Makefile~mips-megapatch arch/mips/sgi-ip32/Makefile
--- 25/arch/mips/sgi-ip32/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sgi-ip32/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -3,7 +3,7 @@
# under Linux.
#
-obj-y += ip32-berr.o ip32-rtc.o ip32-setup.o ip32-irq.o ip32-irq-glue.o \
- ip32-timer.o crime.o ip32-reset.o
+obj-y += ip32-berr.o ip32-irq.o ip32-irq-glue.o ip32-setup.o ip32-timer.o \
+ crime.o ip32-reset.o
EXTRA_AFLAGS := $(CFLAGS)
diff -puN arch/mips/sibyte/cfe/console.c~mips-megapatch arch/mips/sibyte/cfe/console.c
--- 25/arch/mips/sibyte/cfe/console.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/cfe/console.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,5 +1,5 @@
+#include <linux/config.h>
#include <linux/init.h>
-#include <linux/major.h>
#include <linux/errno.h>
#include <linux/console.h>
@@ -41,12 +41,6 @@ static void cfe_console_write(struct con
}
-static struct tty_driver *cfe_console_device(struct console *c, int *index)
-{
- *index = -1;
- return NULL;
-}
-
static int cfe_console_setup(struct console *cons, char *str)
{
char consdev[32];
@@ -72,7 +66,6 @@ static int cfe_console_setup(struct cons
static struct console sb1250_cfe_cons = {
.name = "cfe",
.write = cfe_console_write,
- .device = cfe_console_device,
.setup = cfe_console_setup,
.flags = CON_PRINTBUFFER,
.index = -1,
diff -puN arch/mips/sibyte/cfe/setup.c~mips-megapatch arch/mips/sibyte/cfe/setup.c
--- 25/arch/mips/sibyte/cfe/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/cfe/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -51,17 +51,11 @@ phys_t board_mem_region_addrs[SIBYTE_MAX
phys_t board_mem_region_sizes[SIBYTE_MAX_MEM_REGIONS];
unsigned int board_mem_region_count;
-/* This is the kernel command line. Actually, it's
- copied, eventually, to command_line, and looks to be
- quite redundant. But not something to fix just now */
-extern char arcs_cmdline[];
-
int cfe_cons_handle;
-#ifdef CONFIG_EMBEDDED_RAMDISK
-/* These are symbols defined by the ramdisk linker script */
-extern unsigned char __rd_start;
-extern unsigned char __rd_end;
+#ifdef CONFIG_BLK_DEV_INITRD
+extern unsigned long initrd_start, initrd_end;
+extern void * __rd_start, * __rd_end;
#endif
#ifdef CONFIG_SMP
@@ -191,6 +185,8 @@ static int __init initrd_setup(char *str
{
char rdarg[64];
int idx;
+ char *tmp, *endptr;
+ unsigned long initrd_size;
/* Make a copy of the initrd argument so we can smash it up here */
for (idx = 0; idx < sizeof(rdarg)-1; idx++) {
@@ -205,8 +201,6 @@ static int __init initrd_setup(char *str
*Initrd location comes in the form "<hex size of ramdisk in bytes>@<location in memory>"
* e.g. initrd=3abfd@80010000. This is set up by the loader.
*/
- char *tmp, *endptr;
- unsigned long initrd_size;
for (tmp = str; *tmp != '@'; tmp++) {
if (!*tmp) {
goto fail;
@@ -240,12 +234,15 @@ static int __init initrd_setup(char *str
#endif
/*
- * prom_init is called just after the cpu type is determined, from init_arch()
+ * prom_init is called just after the cpu type is determined, from setup_arch()
*/
-__init int prom_init(int argc, char **argv, char **envp, int *prom_vec)
+void __init prom_init(void)
{
uint64_t cfe_ept, cfe_handle;
unsigned int cfe_eptseal;
+ int argc = fw_arg0;
+ char **envp = (char **) fw_arg2;
+ int *prom_vec = (int *) fw_arg3;
#ifdef CONFIG_KGDB
char *arg;
#endif
@@ -345,13 +342,12 @@ __init int prom_init(int argc, char **ar
mips_machgroup = MACH_GROUP_SIBYTE;
prom_meminit();
-
- return 0;
}
-void prom_free_prom_memory(void)
+unsigned long __init prom_free_prom_memory(void)
{
/* Not sure what I'm supposed to do here. Nothing, I think */
+ return 0;
}
void prom_putchar(char c)
diff -puN arch/mips/sibyte/cfe/smp.c~mips-megapatch arch/mips/sibyte/cfe/smp.c
--- 25/arch/mips/sibyte/cfe/smp.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/cfe/smp.c 2004-02-19 12:53:02.000000000 -0800
@@ -16,64 +16,82 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
+#include <linux/init.h>
#include <linux/sched.h>
#include <linux/smp.h>
-
-#include <asm/mipsregs.h>
+#include <asm/processor.h>
#include "cfe_api.h"
#include "cfe_error.h"
-extern void asmlinkage smp_bootstrap(void);
-
-/* Boot all other cpus in the system, initialize them, and
- bring them into the boot fn */
-int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp)
+/*
+ * Use CFE to find out how many CPUs are available, setting up
+ * phys_cpu_present_map and the logical/physical mappings.
+ * XXXKW will the boot CPU ever not be physical 0?
+ */
+void __init prom_build_cpu_map(void)
{
- int retval;
-
- retval = cfe_cpu_start(cpu, &smp_bootstrap, sp, gp, 0);
- if (retval != 0) {
- printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval);
- return 0;
- } else {
- return 1;
+ int i, num;
+
+ cpus_clear(phys_cpu_present_map);
+ cpu_set(0, phys_cpu_present_map);
+ __cpu_number_map[0] = 0;
+ __cpu_logical_map[0] = 0;
+
+ for (i=1, num=0; i<NR_CPUS; i++) {
+ if (cfe_cpu_stop(i) == 0) {
+ cpu_set(i, phys_cpu_present_map);
+ __cpu_number_map[i] = ++num;
+ __cpu_logical_map[num] = i;
+ }
}
+ printk("Detected %i available secondary CPU(s)\n", num);
}
-void prom_init_secondary(void)
+/*
+ * Common setup before any secondaries are started
+ */
+void prom_prepare_cpus(unsigned int max_cpus)
{
- extern void load_mmu(void);
- unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 |
- STATUSF_IP1 | STATUSF_IP0;
-
- /* Enable basic interrupts */
- change_c0_status(ST0_IM, imask);
- set_c0_status(ST0_IE);
-
- /* cache and TLB setup */
- load_mmu();
}
/*
- * Set up state, return the total number of cpus in the system, including
- * the master
+ * Setup the PC, SP, and GP of a secondary processor and start it
+ * running!
*/
-void prom_setup_smp(void)
+void prom_boot_secondary(int cpu, struct task_struct *idle)
{
- int i;
+ int retval;
+
+ retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap,
+ __KSTK_TOS(idle),
+ (unsigned long)idle->thread_info, 0);
+ if (retval != 0)
+ printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval);
+}
- /* Use CFE to find out how many CPUs are available */
- for (i=1; i<NR_CPUS; i++) {
- if (cfe_cpu_stop(i) == 0) {
- cpu_set(i, cpu_online_map);
- }
- }
- printk("Detected %i available CPU(s)\n", num_online_cpus());
+/*
+ * Code to run on secondary just after probing the CPU
+ */
+void prom_init_secondary(void)
+{
+ extern void sb1250_smp_init(void);
+ sb1250_smp_init();
}
+/*
+ * Do any tidying up before marking online and running the idle
+ * loop
+ */
void prom_smp_finish(void)
{
extern void sb1250_smp_finish(void);
sb1250_smp_finish();
}
+
+/*
+ * Final cleanup after all secondaries booted
+ */
+void prom_cpus_done(void)
+{
+}
diff -puN arch/mips/sibyte/sb1250/bcm1250_tbprof.c~mips-megapatch arch/mips/sibyte/sb1250/bcm1250_tbprof.c
--- 25/arch/mips/sibyte/sb1250/bcm1250_tbprof.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/sb1250/bcm1250_tbprof.c 2004-02-19 12:53:02.000000000 -0800
@@ -29,7 +29,6 @@
#include <linux/errno.h>
#include <linux/reboot.h>
#include <asm/uaccess.h>
-#include <asm/smplock.h>
#include <asm/io.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
@@ -65,8 +64,8 @@ static void arm_tb(void)
u_int64_t tb_options = M_SCD_TRACE_CFG_FREEZE_FULL;
/* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to
trigger start of trace. XXX vary sampling period */
- __raw_writeq(0, KSEG1 + A_SCD_PERF_CNT_1);
- scdperfcnt = __raw_readq(KSEG1 + A_SCD_PERF_CNT_CFG);
+ __raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1));
+ scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
/* Unfortunately, in Pass 2 we must clear all counters to knock down
a previous interrupt request. This means that bus profiling
requires ALL of the SCD perf counters. */
@@ -74,15 +73,15 @@ static void arm_tb(void)
M_SPC_CFG_ENABLE | // enable counting
M_SPC_CFG_CLEAR | // clear all counters
V_SPC_CFG_SRC1(1), // counter 1 counts cycles
- KSEG1 + A_SCD_PERF_CNT_CFG);
- __raw_writeq(next, KSEG1 + A_SCD_PERF_CNT_1);
+ IOADDR(A_SCD_PERF_CNT_CFG));
+ __raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1));
/* Reset the trace buffer */
- __raw_writeq(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
+ __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT)
/* XXXKW may want to expose control to the data-collector */
tb_options |= M_SCD_TRACE_CFG_FORCECNT;
#endif
- __raw_writeq(tb_options, KSEG1 + A_SCD_TRACE_CFG);
+ __raw_writeq(tb_options, IOADDR(A_SCD_TRACE_CFG));
sbp.tb_armed = 1;
}
@@ -94,22 +93,22 @@ static irqreturn_t sbprof_tb_intr(int ir
/* XXX should use XKPHYS to make writes bypass L2 */
u_int64_t *p = sbp.sbprof_tbbuf[sbp.next_tb_sample++];
/* Read out trace */
- __raw_writeq(M_SCD_TRACE_CFG_START_READ, KSEG1 + A_SCD_TRACE_CFG);
+ __raw_writeq(M_SCD_TRACE_CFG_START_READ, IOADDR(A_SCD_TRACE_CFG));
__asm__ __volatile__ ("sync" : : : "memory");
/* Loop runs backwards because bundles are read out in reverse order */
for (i = 256 * 6; i > 0; i -= 6) {
// Subscripts decrease to put bundle in the order
// t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi
- p[i-1] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t2 hi
- p[i-2] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t2 lo
- p[i-3] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t1 hi
- p[i-4] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t1 lo
- p[i-5] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t0 hi
- p[i-6] = __raw_readq(KSEG1 + A_SCD_TRACE_READ); // read t0 lo
+ p[i-1] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); // read t2 hi
+ p[i-2] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); // read t2 lo
+ p[i-3] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); // read t1 hi
+ p[i-4] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); // read t1 lo
+ p[i-5] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); // read t0 hi
+ p[i-6] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); // read t0 lo
}
if (!sbp.tb_enable) {
DBG(printk(DEVNAME ": tb_intr shutdown\n"));
- __raw_writeq(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
+ __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
sbp.tb_armed = 0;
wake_up(&sbp.tb_sync);
} else {
@@ -118,7 +117,7 @@ static irqreturn_t sbprof_tb_intr(int ir
} else {
/* No more trace buffer samples */
DBG(printk(DEVNAME ": tb_intr full\n"));
- __raw_writeq(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
+ __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
sbp.tb_armed = 0;
if (!sbp.tb_enable) {
wake_up(&sbp.tb_sync);
@@ -134,7 +133,7 @@ static irqreturn_t sbprof_pc_intr(int ir
return IRQ_NONE;
}
-static int sbprof_zbprof_start(struct file *filp)
+int sbprof_zbprof_start(struct file *filp)
{
u_int64_t scdperfcnt;
@@ -152,13 +151,13 @@ static int sbprof_zbprof_start(struct fi
return -EBUSY;
}
/* Make sure there isn't a perf-cnt interrupt waiting */
- scdperfcnt = __raw_readq(KSEG1 + A_SCD_PERF_CNT_CFG);
+ scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
/* Disable and clear counters, override SRC_1 */
__raw_writeq((scdperfcnt & ~(M_SPC_CFG_SRC1 | M_SPC_CFG_ENABLE)) |
M_SPC_CFG_ENABLE |
M_SPC_CFG_CLEAR |
V_SPC_CFG_SRC1(1),
- KSEG1 + A_SCD_PERF_CNT_CFG);
+ IOADDR(A_SCD_PERF_CNT_CFG));
/* We grab this interrupt to prevent others from trying to use
it, even though we don't want to service the interrupts
@@ -173,51 +172,51 @@ static int sbprof_zbprof_start(struct fi
pass them through. I am exploiting my knowledge that
cp0_status masks out IP[5]. krw */
__raw_writeq(K_INT_MAP_I3,
- KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) + (K_INT_PERF_CNT<<3));
+ IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) + (K_INT_PERF_CNT<<3)));
/* Initialize address traps */
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_UP_0);
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_UP_1);
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_UP_2);
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_UP_3);
-
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_DOWN_0);
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_DOWN_1);
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_DOWN_2);
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_DOWN_3);
-
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_CFG_0);
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_CFG_1);
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_CFG_2);
- __raw_writeq(0, KSEG1 + A_ADDR_TRAP_CFG_3);
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0));
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_1));
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_2));
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_3));
+
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_0));
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_1));
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_2));
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_3));
+
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_0));
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_1));
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_2));
+ __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3));
/* Initialize Trace Event 0-7 */
// when interrupt
- __raw_writeq(M_SCD_TREVT_INTERRUPT, KSEG1 + A_SCD_TRACE_EVENT_0);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_1);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_2);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_3);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_4);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_5);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_6);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_EVENT_7);
+ __raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_3));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_4));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_5));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_6));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_7));
/* Initialize Trace Sequence 0-7 */
// Start on event 0 (interrupt)
__raw_writeq(V_SCD_TRSEQ_FUNC_START|0x0fff,
- KSEG1 + A_SCD_TRACE_SEQUENCE_0);
+ IOADDR(A_SCD_TRACE_SEQUENCE_0));
// dsamp when d used | asamp when a used
__raw_writeq(M_SCD_TRSEQ_ASAMPLE|M_SCD_TRSEQ_DSAMPLE|K_SCD_TRSEQ_TRIGGER_ALL,
- KSEG1 + A_SCD_TRACE_SEQUENCE_1);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_2);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_3);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_4);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_5);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_6);
- __raw_writeq(0, KSEG1 + A_SCD_TRACE_SEQUENCE_7);
+ IOADDR(A_SCD_TRACE_SEQUENCE_1));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_2));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_3));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_4));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_5));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_6));
+ __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7));
/* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
- __raw_writeq((1ULL << K_INT_PERF_CNT), KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE));
+ __raw_writeq((1ULL << K_INT_PERF_CNT), IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE)));
arm_tb();
@@ -226,7 +225,7 @@ static int sbprof_zbprof_start(struct fi
return 0;
}
-static int sbprof_zbprof_stop(void)
+int sbprof_zbprof_stop(void)
{
DBG(printk(DEVNAME ": stopping\n"));
diff -puN arch/mips/sibyte/sb1250/bus_watcher.c~mips-megapatch arch/mips/sibyte/sb1250/bus_watcher.c
--- 25/arch/mips/sibyte/sb1250/bus_watcher.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/sb1250/bus_watcher.c 2004-02-19 12:53:02.000000000 -0800
@@ -25,6 +25,7 @@
* /proc/bus_watcher if PROC_FS is on.
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
@@ -80,10 +81,10 @@ void check_bus_watcher(void)
#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
/* Destructive read, clears register and interrupt */
- status = csr_in32(IO_SPACE_BASE | A_SCD_BUS_ERR_STATUS);
+ status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS));
#else
/* Use non-destructive register */
- status = csr_in32(IO_SPACE_BASE | A_SCD_BUS_ERR_STATUS_DEBUG);
+ status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG));
#endif
if (!(status & 0x7fffffff)) {
printk("Using last values reaped by bus watcher driver\n");
@@ -91,8 +92,8 @@ void check_bus_watcher(void)
l2_err = bw_stats.l2_err;
memio_err = bw_stats.memio_err;
} else {
- l2_err = csr_in32(IO_SPACE_BASE | A_BUS_L2_ERRORS);
- memio_err = csr_in32(IO_SPACE_BASE | A_BUS_MEM_IO_ERRORS);
+ l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS));
+ memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS));
}
if (status & ~(1UL << 31))
print_summary(status, l2_err, memio_err);
@@ -175,31 +176,46 @@ static irqreturn_t sibyte_bw_int(int irq
{
struct bw_stats_struct *stats = data;
unsigned long cntr;
+#ifdef CONFIG_SIBYTE_BW_TRACE
+ int i;
+#endif
#ifndef CONFIG_PROC_FS
char bw_buf[1024];
#endif
+#ifdef CONFIG_SIBYTE_BW_TRACE
+ csr_out32(M_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG));
+ csr_out32(M_SCD_TRACE_CFG_START_READ, IOADDR(A_SCD_TRACE_CFG));
+
+ for (i=0; i<256*6; i++)
+ printk("%016llx\n", (unsigned long long)__raw_readq(IOADDR(A_SCD_TRACE_READ)));
+
+ csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
+ csr_out32(M_SCD_TRACE_CFG_START, IOADDR(A_SCD_TRACE_CFG));
+#endif
+
/* Destructive read, clears register and interrupt */
- stats->status = csr_in32(IO_SPACE_BASE | A_SCD_BUS_ERR_STATUS);
+ stats->status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS));
stats->status_printed = 0;
- stats->l2_err = cntr = csr_in32(IO_SPACE_BASE | A_BUS_L2_ERRORS);
+ stats->l2_err = cntr = csr_in32(IOADDR(A_BUS_L2_ERRORS));
stats->l2_cor_d += G_SCD_L2ECC_CORR_D(cntr);
stats->l2_bad_d += G_SCD_L2ECC_BAD_D(cntr);
stats->l2_cor_t += G_SCD_L2ECC_CORR_T(cntr);
stats->l2_bad_t += G_SCD_L2ECC_BAD_T(cntr);
- csr_out32(0, IO_SPACE_BASE | A_BUS_L2_ERRORS);
+ csr_out32(0, IOADDR(A_BUS_L2_ERRORS));
- stats->memio_err = cntr = csr_in32(IO_SPACE_BASE | A_BUS_MEM_IO_ERRORS);
+ stats->memio_err = cntr = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS));
stats->mem_cor_d += G_SCD_MEM_ECC_CORR(cntr);
stats->mem_bad_d += G_SCD_MEM_ECC_BAD(cntr);
stats->bus_error += G_SCD_MEM_BUSERR(cntr);
- csr_out32(0, IO_SPACE_BASE | A_BUS_MEM_IO_ERRORS);
+ csr_out32(0, IOADDR(A_BUS_MEM_IO_ERRORS));
#ifndef CONFIG_PROC_FS
bw_print_buffer(bw_buf, stats);
printk(bw_buf);
#endif
+
return IRQ_HANDLED;
}
@@ -228,6 +244,14 @@ int __init sibyte_bus_watcher(void)
create_proc_decoder(&bw_stats);
#endif
+#ifdef CONFIG_SIBYTE_BW_TRACE
+ csr_out32((M_SCD_TRSEQ_ASAMPLE | M_SCD_TRSEQ_DSAMPLE |
+ K_SCD_TRSEQ_TRIGGER_ALL),
+ IOADDR(A_SCD_TRACE_SEQUENCE_0));
+ csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
+ csr_out32(M_SCD_TRACE_CFG_START, IOADDR(A_SCD_TRACE_CFG));
+#endif
+
return 0;
}
diff -puN arch/mips/sibyte/sb1250/irq.c~mips-megapatch arch/mips/sibyte/sb1250/irq.c
--- 25/arch/mips/sibyte/sb1250/irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/sb1250/irq.c 2004-02-19 12:53:02.000000000 -0800
@@ -64,9 +64,6 @@ extern unsigned long ldt_eoi_space;
#include <asm/gdb-stub.h>
extern void breakpoint(void);
static int kgdb_irq;
-#ifdef CONFIG_GDB_CONSOLE
-extern void register_gdb_console(void);
-#endif
/* kgdb is on when configured. Pass "nokgdb" kernel arg to turn it off */
static int kgdb_flag = 1;
@@ -110,9 +107,9 @@ void sb1250_mask_irq(int cpu, int irq)
u64 cur_ints;
spin_lock_irqsave(&sb1250_imr_lock, flags);
- cur_ints = ____raw_readq(KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK));
cur_ints |= (((u64) 1) << irq);
- ____raw_writeq(cur_ints, KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK));
spin_unlock_irqrestore(&sb1250_imr_lock, flags);
}
@@ -122,9 +119,9 @@ void sb1250_unmask_irq(int cpu, int irq)
u64 cur_ints;
spin_lock_irqsave(&sb1250_imr_lock, flags);
- cur_ints = ____raw_readq(KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK));
cur_ints &= ~(((u64) 1) << irq);
- ____raw_writeq(cur_ints, KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK));
spin_unlock_irqrestore(&sb1250_imr_lock, flags);
}
@@ -159,19 +156,19 @@ static void sb1250_set_affinity(unsigned
/* Swizzle each CPU's IMR (but leave the IP selection alone) */
old_cpu = sb1250_irq_owner[irq];
- cur_ints = ____raw_readq(KSEG1 + A_IMR_MAPPER(old_cpu) + R_IMR_INTERRUPT_MASK);
+ cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(old_cpu) + R_IMR_INTERRUPT_MASK));
int_on = !(cur_ints & (((u64) 1) << irq));
if (int_on) {
/* If it was on, mask it */
cur_ints |= (((u64) 1) << irq);
- ____raw_writeq(cur_ints, KSEG1 + A_IMR_MAPPER(old_cpu) + R_IMR_INTERRUPT_MASK);
+ ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(old_cpu) + R_IMR_INTERRUPT_MASK));
}
sb1250_irq_owner[irq] = cpu;
if (int_on) {
/* unmask for the new CPU */
- cur_ints = ____raw_readq(KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK));
cur_ints &= ~(((u64) 1) << irq);
- ____raw_writeq(cur_ints, KSEG1 + A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK);
+ ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + R_IMR_INTERRUPT_MASK));
}
spin_unlock(&sb1250_imr_lock);
spin_unlock_irqrestore(&desc->lock, flags);
@@ -214,19 +211,24 @@ static void ack_sb1250_irq(unsigned int
* deliver the interrupts to all CPUs (which makes affinity
* changing easier for us)
*/
- pending = __raw_readq(KSEG1 + A_IMR_REGISTER(sb1250_irq_owner[irq],
- R_IMR_LDT_INTERRUPT));
+ pending = __raw_readq(IOADDR(A_IMR_REGISTER(sb1250_irq_owner[irq],
+ R_IMR_LDT_INTERRUPT)));
pending &= ((u64)1 << (irq));
if (pending) {
int i;
for (i=0; i<NR_CPUS; i++) {
+ int cpu;
+#ifdef CONFIG_SMP
+ cpu = cpu_logical_map(i);
+#else
+ cpu = i;
+#endif
/*
* Clear for all CPUs so an affinity switch
* doesn't find an old status
*/
__raw_writeq(pending,
- KSEG1+A_IMR_REGISTER(cpu_logical_map(i),
- R_IMR_LDT_INTERRUPT_CLR));
+ IOADDR(A_IMR_REGISTER(cpu, R_IMR_LDT_INTERRUPT_CLR)));
}
/*
@@ -341,13 +343,13 @@ void __init init_IRQ(void)
/* Default everything to IP2 */
for (i = 0; i < SB1250_NR_IRQS; i++) { /* was I0 */
__raw_writeq(IMR_IP2_VAL,
- KSEG1 + A_IMR_REGISTER(0,
- R_IMR_INTERRUPT_MAP_BASE) +
- (i << 3));
+ IOADDR(A_IMR_REGISTER(0,
+ R_IMR_INTERRUPT_MAP_BASE) +
+ (i << 3)));
__raw_writeq(IMR_IP2_VAL,
- KSEG1 + A_IMR_REGISTER(1,
+ IOADDR(A_IMR_REGISTER(1,
R_IMR_INTERRUPT_MAP_BASE) +
- (i << 3));
+ (i << 3)));
}
init_sb1250_irqs();
@@ -357,32 +359,30 @@ void __init init_IRQ(void)
* inter-cpu messages
*/
/* Was I1 */
- __raw_writeq(IMR_IP3_VAL, KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
- (K_INT_MBOX_0 << 3));
- __raw_writeq(IMR_IP3_VAL, KSEG1 + A_IMR_REGISTER(1, R_IMR_INTERRUPT_MAP_BASE) +
- (K_INT_MBOX_0 << 3));
+ __raw_writeq(IMR_IP3_VAL, IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
+ (K_INT_MBOX_0 << 3)));
+ __raw_writeq(IMR_IP3_VAL, IOADDR(A_IMR_REGISTER(1, R_IMR_INTERRUPT_MAP_BASE) +
+ (K_INT_MBOX_0 << 3)));
/* Clear the mailboxes. The firmware may leave them dirty */
__raw_writeq(0xffffffffffffffff,
- KSEG1 + A_IMR_REGISTER(0, R_IMR_MAILBOX_CLR_CPU));
+ IOADDR(A_IMR_REGISTER(0, R_IMR_MAILBOX_CLR_CPU)));
__raw_writeq(0xffffffffffffffff,
- KSEG1 + A_IMR_REGISTER(1, R_IMR_MAILBOX_CLR_CPU));
+ IOADDR(A_IMR_REGISTER(1, R_IMR_MAILBOX_CLR_CPU)));
/* Mask everything except the mailbox registers for both cpus */
tmp = ~((u64) 0) ^ (((u64) 1) << K_INT_MBOX_0);
- __raw_writeq(tmp, KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MASK));
- __raw_writeq(tmp, KSEG1 + A_IMR_REGISTER(1, R_IMR_INTERRUPT_MASK));
+ __raw_writeq(tmp, IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MASK)));
+ __raw_writeq(tmp, IOADDR(A_IMR_REGISTER(1, R_IMR_INTERRUPT_MASK)));
sb1250_steal_irq(K_INT_MBOX_0);
/*
* Note that the timer interrupts are also mapped, but this is
- * done in sb1250_time_init()
+ * done in sb1250_time_init(). Also, the profiling driver
+ * does its own management of IP7.
*/
-#ifdef CONFIG_BCM1250_PROF
- imask |= STATUSF_IP7;
-#endif
#ifdef CONFIG_KGDB
imask |= STATUSF_IP6;
#endif
@@ -398,17 +398,14 @@ void __init init_IRQ(void)
sb1250_duart_present[kgdb_port] = 0;
#endif
/* Setup uart 1 settings, mapper */
- __raw_writeq(M_DUART_IMR_BRK, IO_SPACE_BASE + A_DUART_IMRREG(kgdb_port));
+ __raw_writeq(M_DUART_IMR_BRK, IOADDR(A_DUART_IMRREG(kgdb_port)));
sb1250_steal_irq(kgdb_irq);
__raw_writeq(IMR_IP6_VAL,
- IO_SPACE_BASE + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
- (kgdb_irq<<3));
+ IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
+ (kgdb_irq<<3)));
sb1250_unmask_irq(0, kgdb_irq);
-#ifdef CONFIG_GDB_CONSOLE
- register_gdb_console();
-#endif
prom_printf("Waiting for GDB on UART port %d\n", kgdb_port);
set_debug_traps();
breakpoint();
@@ -420,8 +417,8 @@ void __init init_IRQ(void)
#include <linux/delay.h>
-#define duart_out(reg, val) csr_out32(val, KSEG1 + A_DUART_CHANREG(kgdb_port,reg))
-#define duart_in(reg) csr_in32(KSEG1 + A_DUART_CHANREG(kgdb_port,reg))
+#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
+#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
void sb1250_kgdb_interrupt(struct pt_regs *regs)
{
@@ -430,7 +427,7 @@ void sb1250_kgdb_interrupt(struct pt_reg
* host to stop the break, since we would see another
* interrupt on the end-of-break too)
*/
- kstat_this_cpu.irqs[K_INT_UART_1]++;
+ kstat_this_cpu.irqs[kgdb_irq]++;
mdelay(500);
duart_out(R_DUART_CMD, V_DUART_MISC_CMD_RESET_BREAK_INT |
M_DUART_RX_EN | M_DUART_TX_EN);
diff -puN arch/mips/sibyte/sb1250/irq_handler.S~mips-megapatch arch/mips/sibyte/sb1250/irq_handler.S
--- 25/arch/mips/sibyte/sb1250/irq_handler.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/sb1250/irq_handler.S 2004-02-19 12:53:02.000000000 -0800
@@ -31,7 +31,6 @@
#include <linux/config.h>
#include <asm/addrspace.h>
-#include <asm/processor.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
@@ -53,8 +52,7 @@
.set push
.set noreorder
.set noat
- #.set mips64
- .set mips4
+ .set mips64
.align 5
NESTED(sb1250_irq_handler, PT_SIZE, sp)
SAVE_ALL
@@ -136,8 +134,7 @@
beqz s0, 4f /* No interrupts. Return */
move a1, sp
-3: #dclz s1, s0 /* Find the next interrupt */
- .word 0x72118824 # dclz s1, s0
+3: dclz s1, s0 /* Find the next interrupt */
dsubu a0, zero, s1
daddiu a0, a0, 63
jal do_IRQ
diff -puN arch/mips/sibyte/sb1250/prom.c~mips-megapatch arch/mips/sibyte/sb1250/prom.c
--- 25/arch/mips/sibyte/sb1250/prom.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/sb1250/prom.c 2004-02-19 12:53:02.000000000 -0800
@@ -27,8 +27,6 @@
#include <asm/bootinfo.h>
#include <asm/reboot.h>
-extern char arcs_cmdline[];
-
#ifdef CONFIG_EMBEDDED_RAMDISK
/* These are symbols defined by the ramdisk linker script */
extern unsigned char __rd_start;
@@ -91,9 +89,9 @@ static void prom_linux_exit(void)
}
/*
- * prom_init is called just after the cpu type is determined, from init_arch()
+ * prom_init is called just after the cpu type is determined, from setup_arch()
*/
-__init int prom_init(int argc, char **argv, char **envp, int *prom_vec)
+void __init prom_init(void)
{
_machine_restart = (void (*)(char *))prom_linux_exit;
_machine_halt = prom_linux_exit;
@@ -103,13 +101,12 @@ __init int prom_init(int argc, char **ar
mips_machgroup = MACH_GROUP_SIBYTE;
prom_meminit();
-
- return 0;
}
-void prom_free_prom_memory(void)
+unsigned long __init prom_free_prom_memory(void)
{
/* Not sure what I'm supposed to do here. Nothing, I think */
+ return 0;
}
void prom_putchar(char c)
diff -puN arch/mips/sibyte/sb1250/setup.c~mips-megapatch arch/mips/sibyte/sb1250/setup.c
--- 25/arch/mips/sibyte/sb1250/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/sb1250/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -15,7 +15,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-
+#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/reboot.h>
#include <linux/string.h>
@@ -23,7 +23,6 @@
#include <asm/bootinfo.h>
#include <asm/mipsregs.h>
#include <asm/io.h>
-#include <asm/system.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_scd.h>
@@ -154,7 +153,7 @@ void sb1250_setup(void)
int bad_config = 0;
sb1_pass = read_c0_prid() & 0xff;
- sys_rev = __raw_readq(IO_SPACE_BASE | A_SCD_SYSTEM_REVISION);
+ sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
soc_type = SYS_SOC_TYPE(sys_rev);
soc_pass = G_SYS_REVISION(sys_rev);
@@ -163,11 +162,8 @@ void sb1250_setup(void)
machine_restart(NULL);
}
- plldiv = G_SYS_PLL_DIV(__raw_readq(IO_SPACE_BASE | A_SCD_SYSTEM_CFG));
+ plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
-#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
- __raw_writeq(0, KSEG1 + A_SCD_ZBBUS_CYCLE_COUNT);
-#endif
prom_printf("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
diff -puN arch/mips/sibyte/sb1250/smp.c~mips-megapatch arch/mips/sibyte/sb1250/smp.c
--- 25/arch/mips/sibyte/sb1250/smp.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/sb1250/smp.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2001 Broadcom Corporation
+ * Copyright (C) 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -28,30 +28,44 @@
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_int.h>
-extern irqreturn_t smp_call_function_interrupt(int irq, void *dev,
- struct pt_regs *regs);
-extern void smp_tune_scheduling(void);
-
-/*
- * These are routines for dealing with the sb1250 smp capabilities
- * independent of board/firmware
- */
-
-static u64 mailbox_set_regs[] = {
- KSEG1 + A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU,
- KSEG1 + A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU
+static void *mailbox_set_regs[] = {
+ (void *)IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU),
+ (void *)IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU)
};
-static u64 mailbox_clear_regs[] = {
- KSEG1 + A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU,
- KSEG1 + A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU
+static void *mailbox_clear_regs[] = {
+ (void *)IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU),
+ (void *)IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU)
};
-static u64 mailbox_regs[] = {
- KSEG1 + A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU,
- KSEG1 + A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU
+static void *mailbox_regs[] = {
+ (void *)IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU),
+ (void *)IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU)
};
+/*
+ * SMP init and finish on secondary CPUs
+ */
+void sb1250_smp_init(void)
+{
+ unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 |
+ STATUSF_IP1 | STATUSF_IP0;
+
+ /* Set interrupt mask, but don't enable */
+ change_c0_status(ST0_IM, imask);
+}
+
+void sb1250_smp_finish(void)
+{
+ extern void sb1250_time_init(void);
+ sb1250_time_init();
+ local_irq_enable();
+}
+
+/*
+ * These are routines for dealing with the sb1250 smp capabilities
+ * independent of board/firmware
+ */
/*
* Simple enough; everything is set up, so just poke the appropriate mailbox
@@ -62,14 +76,8 @@ void core_send_ipi(int cpu, unsigned int
__raw_writeq((((u64)action)<< 48), mailbox_set_regs[cpu]);
}
-
-void sb1250_smp_finish(void)
-{
- extern void sb1_sanitize_tlb(void);
-
- sb1_sanitize_tlb();
- sb1250_time_init();
-}
+extern irqreturn_t smp_call_function_interrupt(int irq, void *dev,
+ struct pt_regs *regs);
void sb1250_mailbox_interrupt(struct pt_regs *regs)
{
@@ -78,10 +86,10 @@ void sb1250_mailbox_interrupt(struct pt_
kstat_this_cpu.irqs[K_INT_MBOX_0]++;
/* Load the mailbox register to figure out what we're supposed to do */
- action = (__raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff;
+ action = (____raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff;
/* Clear the mailbox to clear the interrupt */
- __raw_writeq(((u64)action)<<48, mailbox_clear_regs[cpu]);
+ ____raw_writeq(((u64)action)<<48, mailbox_clear_regs[cpu]);
/*
* Nothing to do for SMP_RESCHEDULE_YOURSELF; returning from the
@@ -92,66 +100,3 @@ void sb1250_mailbox_interrupt(struct pt_
smp_call_function_interrupt(0, NULL, regs);
}
}
-
-extern atomic_t cpus_booted;
-extern void prom_setup_smp(void);
-extern int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp);
-
-void __init smp_boot_cpus(void)
-{
- int cur_cpu = 0;
- int cpu;
-
- prom_setup_smp();
- init_new_context(current, &init_mm);
- current_thread_info()->cpu = 0;
- cpu_data[0].udelay_val = loops_per_jiffy;
- cpu_data[0].asid_cache = ASID_FIRST_VERSION;
- cpus_clear(cpu_online_map);
- cpu_set(0, cpu_online_map);
- atomic_set(&cpus_booted, 1); /* Master CPU is already booted... */
- smp_tune_scheduling();
-
- /*
- * This loop attempts to compensate for "holes" in the CPU
- * numbering. It's overkill, but general.
- */
- for (cpu = 1; cpu < num_online_cpus(); ) {
- struct task_struct *idle;
- struct pt_regs regs;
- int retval;
- printk("Starting CPU %d... ", cpu);
-
- /* Spawn a new process normally. Grab a pointer to
- its task struct so we can mess with it */
- idle = copy_process(CLONE_VM | CLONE_IDLETASK, 0, ®s, 0,
- NULL, NULL);
- if (IS_ERR(idle))
- panic("failed fork for CPU %d", cpu);
-
- /*
- * We remove it from the pidhash and the runqueue
- * once we got the process:
- */
- init_idle(idle, cpu);
-
- unhash_process(idle);
-
- do {
- /* Iterate until we find a CPU that comes up */
- cur_cpu++;
- retval = prom_boot_secondary(cur_cpu,
- (unsigned long)idle + THREAD_SIZE - 32,
- (unsigned long)idle);
- } while (!retval && (cur_cpu < NR_CPUS));
- if (retval) {
- cpu++;
- } else {
- panic("CPU discovery disaster");
- }
- }
-
- /* Wait for everyone to come up */
- while (atomic_read(&cpus_booted) != num_online_cpus());
- smp_threads_ready = 1;
-}
diff -puN arch/mips/sibyte/sb1250/time.c~mips-megapatch arch/mips/sibyte/sb1250/time.c
--- 25/arch/mips/sibyte/sb1250/time.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/sb1250/time.c 2004-02-19 12:53:02.000000000 -0800
@@ -67,23 +67,21 @@ void sb1250_time_init(void)
sb1250_mask_irq(cpu, irq);
/* Map the timer interrupt to ip[4] of this cpu */
- __raw_writeq(IMR_IP4_VAL, KSEG1 + A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE)
- + (irq<<3));
+ __raw_writeq(IMR_IP4_VAL, IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) +
+ (irq << 3)));
/* the general purpose timer ticks at 1 Mhz independent if the rest of the system */
/* Disable the timer and set up the count */
- __raw_writeq(0, KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
+ __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
#ifdef CONFIG_SIMULATION
- __raw_writeq(50000 / HZ, KSEG1 +
- A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
+ __raw_writeq(50000 / HZ, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
#else
- __raw_writeq(1000000/HZ, KSEG1 +
- A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
+ __raw_writeq(1000000/HZ, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
#endif
/* Set the timer running */
__raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
- KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
+ IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
sb1250_unmask_irq(cpu, irq);
sb1250_steal_irq(irq);
@@ -105,7 +103,7 @@ void sb1250_timer_interrupt(struct pt_re
/* Reset the timer */
____raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
- KSEG1 + A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
+ IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
/*
* CPU 0 handles the global timer interrupt job
@@ -129,7 +127,7 @@ void sb1250_timer_interrupt(struct pt_re
unsigned long sb1250_gettimeoffset(void)
{
unsigned long count =
- __raw_readq(KSEG1 + A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT));
+ __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));
return 1000000/HZ - count;
}
diff -puN -L arch/mips/sibyte/swarm/cmdline.c arch/mips/sibyte/swarm/cmdline.c~mips-megapatch /dev/null
--- 25/arch/mips/sibyte/swarm/cmdline.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,26 +0,0 @@
-/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-#include <asm/bootinfo.h>
-
-/*
- * The naming of this variable is a remnant of the initial mips port to
- * ARC-firmware based SGI consoles. We don't really need to do anything for
- * the variable other than provide an instantiation. Everything about
- * arcs_cmdline seems more than a little bit hackish...
- */
-char arcs_cmdline[CL_SIZE];
diff -puN arch/mips/sibyte/swarm/dbg_io.c~mips-megapatch arch/mips/sibyte/swarm/dbg_io.c
--- 25/arch/mips/sibyte/swarm/dbg_io.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/swarm/dbg_io.c 2004-02-19 12:53:02.000000000 -0800
@@ -37,8 +37,8 @@ static int duart_initialized = 0; /* 0:
/* -------------------- END OF CONFIG --------------------- */
extern int kgdb_port;
-#define duart_out(reg, val) csr_out32(val, KSEG1 + A_DUART_CHANREG(kgdb_port,reg))
-#define duart_in(reg) csr_in32(KSEG1 + A_DUART_CHANREG(kgdb_port,reg))
+#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
+#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
void putDebugChar(unsigned char c);
unsigned char getDebugChar(void);
diff -puN arch/mips/sibyte/swarm/Makefile~mips-megapatch arch/mips/sibyte/swarm/Makefile
--- 25/arch/mips/sibyte/swarm/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/swarm/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -1,3 +1,3 @@
-lib-y = setup.o cmdline.o rtc_xicor1241.o rtc_m41t81.o
+lib-y = setup.o rtc_xicor1241.o rtc_m41t81.o
lib-$(CONFIG_KGDB) += dbg_io.o
diff -puN -L arch/mips/sibyte/swarm/rtc.c arch/mips/sibyte/swarm/rtc.c~mips-megapatch /dev/null
--- 25/arch/mips/sibyte/swarm/rtc.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,44 +0,0 @@
-/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-/*
- * Not really sure what is supposed to be here, yet
- */
-
-#include <linux/spinlock.h>
-#include <linux/mc146818rtc.h>
-
-static unsigned char swarm_rtc_read_data(unsigned long addr)
-{
- return 0;
-}
-
-static void swarm_rtc_write_data(unsigned char data, unsigned long addr)
-{
-}
-
-static int swarm_rtc_bcd_mode(void)
-{
- return 0;
-}
-
-struct rtc_ops swarm_rtc_ops = {
- &swarm_rtc_read_data,
- &swarm_rtc_write_data,
- &swarm_rtc_bcd_mode
-};
diff -puN arch/mips/sibyte/swarm/rtc_m41t81.c~mips-megapatch arch/mips/sibyte/swarm/rtc_m41t81.c
--- 25/arch/mips/sibyte/swarm/rtc_m41t81.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/swarm/rtc_m41t81.c 2004-02-19 12:53:02.000000000 -0800
@@ -82,7 +82,7 @@
#define M41T81REG_SQW 0x13 /* square wave register */
#define M41T81_CCR_ADDRESS 0x68
-#define SMB_CSR(reg) (KSEG1 | A_SMB_REGISTER(1, reg))
+#define SMB_CSR(reg) (IOADDR(A_SMB_REGISTER(1, reg)))
static int m41t81_read(uint8_t addr)
{
diff -puN arch/mips/sibyte/swarm/rtc_xicor1241.c~mips-megapatch arch/mips/sibyte/swarm/rtc_xicor1241.c
--- 25/arch/mips/sibyte/swarm/rtc_xicor1241.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/swarm/rtc_xicor1241.c 2004-02-19 12:53:02.000000000 -0800
@@ -57,7 +57,7 @@
#define X1241_CCR_ADDRESS 0x6F
-#define SMB_CSR(reg) (KSEG1 | A_SMB_REGISTER(1, reg))
+#define SMB_CSR(reg) (IOADDR(A_SMB_REGISTER(1, reg)))
static int xicor_read(uint8_t addr)
{
diff -puN arch/mips/sibyte/swarm/setup.c~mips-megapatch arch/mips/sibyte/swarm/setup.c
--- 25/arch/mips/sibyte/swarm/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/swarm/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
+ * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -20,13 +20,12 @@
* Setup code for the SWARM board
*/
+#include <linux/config.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#include <linux/init.h>
-#include <linux/ide.h>
-#include <linux/console.h>
#include <asm/irq.h>
#include <asm/io.h>
@@ -40,13 +39,6 @@
#include <asm/sibyte/sb1250_genbus.h>
#include <asm/sibyte/board.h>
-extern struct rtc_ops *rtc_ops;
-extern struct rtc_ops swarm_rtc_ops;
-
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops sibyte_ide_ops;
-#endif
-
extern void sb1250_setup(void);
extern int xicor_probe(void);
@@ -88,7 +80,7 @@ int swarm_be_handler(struct pt_regs *reg
return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL);
}
-void __init swarm_setup(void)
+static void __init swarm_setup(void)
{
extern int panic_timeout;
@@ -125,14 +117,7 @@ void __init swarm_setup(void)
#endif
" CFE\n");
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &sibyte_ide_ops;
-#endif
-
#ifdef CONFIG_VT
-#ifdef CONFIG_DUMMY_CONSOLE
- conswitchp = &dummy_con;
-#endif
screen_info = (struct screen_info) {
0, 0, /* orig-x, orig-y */
0, /* unused */
@@ -148,6 +133,8 @@ void __init swarm_setup(void)
#endif
}
+early_initcall(swarm_setup);
+
#ifdef LEDS_PHYS
#ifdef CONFIG_SIBYTE_CARMEL
@@ -157,7 +144,7 @@ void __init swarm_setup(void)
#endif
#define setled(index, c) \
- ((unsigned char *)(LEDS_PHYS|IO_SPACE_BASE|0x20))[(3-(index))<<3] = (c)
+ ((unsigned char *)(IOADDR(LEDS_PHYS)+0x20))[(3-(index))<<3] = (c)
void setleds(char *str)
{
int i;
diff -puN arch/mips/sibyte/swarm/time.c~mips-megapatch arch/mips/sibyte/swarm/time.c
--- 25/arch/mips/sibyte/swarm/time.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sibyte/swarm/time.c 2004-02-19 12:53:02.000000000 -0800
@@ -75,7 +75,7 @@ static unsigned int usec_bias = 0;
#define X1241_CCR_ADDRESS 0x6F
-#define SMB_CSR(reg) (KSEG1 | A_SMB_REGISTER(1, reg))
+#define SMB_CSR(reg) (IOADDR(A_SMB_REGISTER(1, reg)))
static int xicor_read(uint8_t addr)
{
diff -puN arch/mips/sni/int-handler.S~mips-megapatch arch/mips/sni/int-handler.S
--- 25/arch/mips/sni/int-handler.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sni/int-handler.S 2004-02-19 12:53:02.000000000 -0800
@@ -37,8 +37,12 @@ led_cache: .byte 0
mfc0 t1, CP0_CAUSE
and t0, t1
- andi t1, t0, 0x4a00 # hardware interrupt 1
- bnez t1, _hwint134
+ andi t1, t0, 0x0800 # hardware interrupt 1
+ bnez t1, _hwint1
+ andi t1, t0, 0x4000 # hardware interrupt 4
+ bnez t1, _hwint4
+ andi t1, t0, 0x2000 # hardware interrupt 3
+ bnez t1, _hwint3
andi t1, t0, 0x1000 # hardware interrupt 2
bnez t1, _hwint2
andi t1, t0, 0x8000 # hardware interrupt 5
@@ -55,20 +59,48 @@ led_cache: .byte 0
/* hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug
button interrupts. */
_hwint0: jal pciasic_hwint0
- move a1, sp
+ move a0, sp
+ j ret_from_irq
+ nop
/*
- * hwint 1 deals with EISA and SCSI interrupts,
- * hwint 3 should deal with the PCI A - D interrupts,
- * hwint 4 is used for only the onboard PCnet 32.
+ * hwint 1 deals with EISA and SCSI interrupts
*/
-_hwint134: jal pciasic_hwint134
+_hwint1: jal pciasic_hwint1
+ move a0, sp
+ j ret_from_irq
+ nop
-/* This interrupt was used for the com1 console on the first prototypes. */
+/*
+ * This interrupt was used for the com1 console on the first prototypes;
+ * it's unsed otherwise
+ */
_hwint2: jal pciasic_hwint2
+ move a0, sp
+ j ret_from_irq
+ nop
+
+/*
+ * hwint 3 are the PCI interrupts A - D
+ */
+_hwint3: jal pciasic_hwint3
+ move a0, sp
+ j ret_from_irq
+ nop
+
+/*
+ * hwint 4 is used for only the onboard PCnet 32.
+ */
+_hwint4: jal pciasic_hwint4
+ move a0, sp
+ j ret_from_irq
+ nop
/* hwint5 is the r4k count / compare interrupt */
_hwint5: jal pciasic_hwint5
+ move a0, sp
+ j ret_from_irq
+ nop
END(sni_rm200_pci_handle_int)
diff -puN -L arch/mips/sni/io.c arch/mips/sni/io.c~mips-megapatch /dev/null
--- 25/arch/mips/sni/io.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,178 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Low level I/O functions for SNI.
- */
-#include <linux/string.h>
-#include <linux/spinlock.h>
-#include <asm/addrspace.h>
-#include <asm/system.h>
-#include <asm/sni.h>
-
-/*
- * Urgs... We only can see a 16mb window of the 4gb EISA address space
- * at PCIMT_EISA_BASE. Maladia segmentitis ...
- *
- * To avoid locking and all the related headacke we implement this such
- * that accessing the bus address space nests, so we're treating this
- * correctly even for interrupts. This is going to suck seriously for
- * the SMP members of the RM family.
- *
- * Making things worse the PCIMT_CSMAPISA register resides on the X bus with
- * it's unbeatable 1.4 mb/s transfer rate.
- */
-
-static inline void eisa_map(unsigned long address)
-{
- unsigned char upper;
-
- upper = address >> 24;
- *(volatile unsigned char *)PCIMT_CSMAPISA = ~upper;
-}
-
-#define save_eisa_map() \
- (*(volatile unsigned char *)PCIMT_CSMAPISA)
-#define restore_eisa_map(val) \
- do { (*(volatile unsigned char *)PCIMT_CSMAPISA) = val; } while(0)
-
-static unsigned char sni_readb(unsigned long addr)
-{
- unsigned char res;
- unsigned int save_map;
-
- save_map = save_eisa_map();
- eisa_map(addr);
- addr &= 0xffffff;
- res = *(volatile unsigned char *) (PCIMT_EISA_BASE + addr);
- restore_eisa_map(save_map);
-
- return res;
-}
-
-static unsigned short sni_readw(unsigned long addr)
-{
- unsigned short res;
- unsigned int save_map;
-
- save_map = save_eisa_map();
- eisa_map(addr);
- addr &= 0xffffff;
- res = *(volatile unsigned char *) (PCIMT_EISA_BASE + addr);
- restore_eisa_map(save_map);
-
- return res;
-}
-
-static unsigned int sni_readl(unsigned long addr)
-{
- unsigned int res;
- unsigned int save_map;
-
- save_map = save_eisa_map();
- eisa_map(addr);
- addr &= 0xffffff;
- res = *(volatile unsigned char *) (PCIMT_EISA_BASE + addr);
- restore_eisa_map(save_map);
-
- return res;
-}
-
-static void sni_writeb(unsigned char val, unsigned long addr)
-{
- unsigned int save_map;
-
- save_map = save_eisa_map();
- eisa_map(addr);
- addr &= 0xffffff;
- *(volatile unsigned char *) (PCIMT_EISA_BASE + addr) = val;
- restore_eisa_map(save_map);
-}
-
-static void sni_writew(unsigned short val, unsigned long addr)
-{
- unsigned int save_map;
-
- save_map = save_eisa_map();
- eisa_map(addr);
- addr &= 0xffffff;
- *(volatile unsigned char *) (PCIMT_EISA_BASE + addr) = val;
- restore_eisa_map(save_map);
-}
-
-static void sni_writel(unsigned int val, unsigned long addr)
-{
- unsigned int save_map;
-
- save_map = save_eisa_map();
- eisa_map(addr);
- addr &= 0xffffff;
- *(volatile unsigned char *) (PCIMT_EISA_BASE + addr) = val;
- restore_eisa_map(save_map);
-}
-
-static void sni_memset_io(unsigned long addr, int val, unsigned long len)
-{
- unsigned long waddr;
- unsigned int save_map;
-
- save_map = save_eisa_map();
- waddr = PCIMT_EISA_BASE | (addr & 0xffffff);
- while(len) {
- unsigned long fraglen;
-
- fraglen = (~addr + 1) & 0xffffff;
- fraglen = (fraglen < len) ? fraglen : len;
- eisa_map(addr);
- memset((char *)waddr, val, fraglen);
- addr += fraglen;
- waddr = waddr + fraglen - 0x1000000;
- len -= fraglen;
- }
- restore_eisa_map(save_map);
-}
-
-static void sni_memcpy_fromio(unsigned long to, unsigned long from, unsigned long len)
-{
- unsigned long waddr;
- unsigned int save_map;
-
- save_map = save_eisa_map();
- waddr = PCIMT_EISA_BASE | (from & 0xffffff);
- while(len) {
- unsigned long fraglen;
-
- fraglen = (~from + 1) & 0xffffff;
- fraglen = (fraglen < len) ? fraglen : len;
- eisa_map(from);
- memcpy((void *)to, (void *)waddr, fraglen);
- to += fraglen;
- from += fraglen;
- waddr = waddr + fraglen - 0x1000000;
- len -= fraglen;
- }
- restore_eisa_map(save_map);
-}
-
-static void sni_memcpy_toio(unsigned long to, unsigned long from, unsigned long len)
-{
- unsigned long waddr;
- unsigned int save_map;
-
- save_map = save_eisa_map();
- waddr = PCIMT_EISA_BASE | (to & 0xffffff);
- while(len) {
- unsigned long fraglen;
-
- fraglen = (~to + 1) & 0xffffff;
- fraglen = (fraglen < len) ? fraglen : len;
- eisa_map(to);
- memcpy((char *)to + PCIMT_EISA_BASE, (void *)from, fraglen);
- to += fraglen;
- from += fraglen;
- waddr = waddr + fraglen - 0x1000000;
- len -= fraglen;
- }
- restore_eisa_map(save_map);
-}
diff -puN arch/mips/sni/irq.c~mips-megapatch arch/mips/sni/irq.c
--- 25/arch/mips/sni/irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sni/irq.c 2004-02-19 12:53:02.000000000 -0800
@@ -21,7 +21,15 @@ spinlock_t pciasic_lock = SPIN_LOCK_UNLO
extern asmlinkage void sni_rm200_pci_handle_int(void);
-static void enable_pciasic_irq(unsigned int irq);
+static void enable_pciasic_irq(unsigned int irq)
+{
+ unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2);
+ unsigned long flags;
+
+ spin_lock_irqsave(&pciasic_lock, flags);
+ *(volatile u8 *) PCIMT_IRQSEL |= mask;
+ spin_unlock_irqrestore(&pciasic_lock, flags);
+}
static unsigned int startup_pciasic_irq(unsigned int irq)
{
@@ -41,16 +49,6 @@ void disable_pciasic_irq(unsigned int ir
spin_unlock_irqrestore(&pciasic_lock, flags);
}
-static void enable_pciasic_irq(unsigned int irq)
-{
- unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2);
- unsigned long flags;
-
- spin_lock_irqsave(&pciasic_lock, flags);
- *(volatile u8 *) PCIMT_IRQSEL |= mask;
- spin_unlock_irqrestore(&pciasic_lock, flags);
-}
-
#define mask_and_ack_pciasic_irq disable_pciasic_irq
static void end_pciasic_irq(unsigned int irq)
@@ -60,7 +58,7 @@ static void end_pciasic_irq(unsigned int
}
static struct hw_interrupt_type pciasic_irq_type = {
- "PCIASIC",
+ "ASIC-PCI",
startup_pciasic_irq,
shutdown_pciasic_irq,
enable_pciasic_irq,
@@ -92,36 +90,72 @@ void pciasic_hwint5(struct pt_regs *regs
panic("hwint5 and no handler yet");
}
-static inline int ls1bit8(unsigned int x)
+static unsigned int ls1bit8(unsigned int x)
{
- int b = 8, s;
+ int b = 7, s;
- x <<= 24;
s = 4; if ((x & 0x0f) == 0) s = 0; b -= s; x <<= s;
- s = 2; if ((x & 0x03) == 0) s = 0; b -= s; x <<= s;
- s = 1; if ((x & 0x01) == 0) s = 0; b -= s;
+ s = 2; if ((x & 0x30) == 0) s = 0; b -= s; x <<= s;
+ s = 1; if ((x & 0x40) == 0) s = 0; b -= s;
return b;
}
/*
* hwint 1 deals with EISA and SCSI interrupts,
+ *
+ * The EISA_INT bit in CSITPEND is high active, all others are low active.
+ */
+void pciasic_hwint1(struct pt_regs *regs)
+{
+ u8 pend = *(volatile char *)PCIMT_CSITPEND;
+ unsigned long flags;
+
+ if (pend & IT_EISA) {
+ int irq;
+ /*
+ * Note: ASIC PCI's builtin interrupt achknowledge feature is
+ * broken. Using it may result in loss of some or all i8259
+ * interupts, so don't use PCIMT_INT_ACKNOWLEDGE ...
+ */
+ irq = i8259_irq();
+ if (unlikely(irq < 0))
+ return;
+
+ do_IRQ(irq, regs);
+ }
+
+ if (!(pend & IT_SCSI)) {
+ flags = read_c0_status();
+ clear_c0_status(ST0_IM);
+ do_IRQ(PCIMT_IRQ_SCSI, regs);
+ write_c0_status(flags);
+ }
+}
+
+/*
* hwint 3 should deal with the PCI A - D interrupts,
- * hwint 4 is used for only the onboard PCnet 32.
*/
-void pciasic_hwint134(struct pt_regs *regs)
+void pciasic_hwint3(struct pt_regs *regs)
{
u8 pend = *(volatile char *)PCIMT_CSITPEND;
int irq;
+ pend &= (IT_INTA | IT_INTB | IT_INTC | IT_INTD);
+ clear_c0_status(IE_IRQ3);
irq = PCIMT_IRQ_INT2 + ls1bit8(pend);
- if (irq == PCIMT_IRQ_EISA) {
- pend = *(volatile char *)PCIMT_INT_ACKNOWLEDGE;
- if (!(pend ^ 0xff))
- return;
- }
do_IRQ(irq, regs);
- return;
+ set_c0_status(IE_IRQ3);
+}
+
+/*
+ * hwint 4 is used for only the onboard PCnet 32.
+ */
+void pciasic_hwint4(struct pt_regs *regs)
+{
+ clear_c0_status(IE_IRQ4);
+ do_IRQ(PCIMT_IRQ_ETHERNET, regs);
+ set_c0_status(IE_IRQ4);
}
void __init init_pciasic(void)
@@ -156,4 +190,6 @@ void __init init_IRQ (void)
irq_desc[i].depth = 1;
irq_desc[i].handler = &pciasic_irq_type;
}
+
+ change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4);
}
diff -puN arch/mips/sni/Makefile~mips-megapatch arch/mips/sni/Makefile
--- 25/arch/mips/sni/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sni/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -2,6 +2,6 @@
# Makefile for the SNI specific part of the kernel
#
-obj-y += int-handler.o io.o irq.o pcimt_scache.o reset.o setup.o
+obj-y += int-handler.o irq.o pcimt_scache.o reset.o setup.o
EXTRA_AFLAGS := $(CFLAGS)
diff -puN arch/mips/sni/setup.c~mips-megapatch arch/mips/sni/setup.c
--- 25/arch/mips/sni/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/sni/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -5,7 +5,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996, 1997, 1998, 2000, 2003 by Ralf Baechle
+ * Copyright (C) 1996, 1997, 1998, 2000, 2003, 2004 by Ralf Baechle
*/
#include <linux/config.h>
#include <linux/eisa.h>
@@ -14,17 +14,20 @@
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/interrupt.h>
-#include <linux/timex.h>
-#include <linux/pci.h>
#include <linux/mc146818rtc.h>
+#include <linux/pci.h>
#include <linux/console.h>
#include <linux/fb.h>
-#include <linux/ide.h>
+#include <linux/tty.h>
+#include <asm/arc/types.h>
+#include <asm/sgialib.h>
#include <asm/bcache.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
+#include <asm/mc146818-time.h>
+#include <asm/pci_channel.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/reboot.h>
@@ -36,9 +39,6 @@ extern void sni_machine_restart(char *co
extern void sni_machine_halt(void);
extern void sni_machine_power_off(void);
-extern struct ide_ops std_ide_ops;
-extern struct rtc_ops std_rtc_ops;
-
static void __init sni_rm200_pci_timer_setup(struct irqaction *irq)
{
/* set the clock to 100 Hz */
@@ -48,9 +48,6 @@ static void __init sni_rm200_pci_timer_s
setup_irq(0, irq);
}
-
-extern unsigned char sni_map_isa_cache;
-
/*
* A bit more gossip about the iron we're running on ...
*/
@@ -73,56 +70,135 @@ static inline void sni_pcimt_detect(void
printk("%s.\n", boardtype);
}
-void __init sni_rm200_pci_setup(void)
+static void __init sni_display_setup(void)
+{
+#ifdef CONFIG_VT
+#if defined(CONFIG_VGA_CONSOLE)
+ struct screen_info *si = &screen_info;
+ DISPLAY_STATUS *di;
+
+ di = ArcGetDisplayStatus(1);
+
+ if (di) {
+ si->orig_x = di->CursorXPosition;
+ si->orig_y = di->CursorYPosition;
+ si->orig_video_cols = di->CursorMaxXPosition;
+ si->orig_video_lines = di->CursorMaxYPosition;
+ si->orig_video_isVGA = VIDEO_TYPE_VGAC;
+ si->orig_video_points = 16;
+ }
+#endif
+#endif
+}
+
+static struct resource sni_io_resource = {
+ "PCIMT IO MEM", 0x00001000UL, 0x03bfffffUL, IORESOURCE_IO,
+};
+
+static struct resource pcimt_io_resources[] = {
+ { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
+ { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
+ { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
+ { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
+ { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
+ { "PCI config data", 0xcfc, 0xcff, IORESOURCE_BUSY }
+};
+
+static struct resource sni_mem_resource = {
+ "PCIMT PCI MEM", 0x10000000UL, 0xffffffffUL, IORESOURCE_MEM
+};
+
+/*
+ * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used
+ * for other purposes. Be paranoid and allocate all of the before the PCI
+ * code gets a chance to to map anything else there ...
+ *
+ * This leaves the following areas available:
+ *
+ * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory
+ * 0x10100000 - 0x13ffffff ( 15MB) PCI/EISA/ISA Bus Memory
+ * 0x18000000 - 0x1fbfffff (124MB) PCI/EISA Bus Memory
+ * 0x1ff08000 - 0x1ffeffff (816kB) PCI/EISA Bus Memory
+ * 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory
+ */
+static struct resource pcimt_mem_resources[] = {
+ { "Video RAM area", 0x100a0000, 0x100bffff, IORESOURCE_BUSY },
+ { "ISA Reserved", 0x100c0000, 0x100fffff, IORESOURCE_BUSY },
+ { "PCI IO", 0x14000000, 0x17bfffff, IORESOURCE_BUSY },
+ { "Cache Replacement Area", 0x17c00000, 0x17ffffff, IORESOURCE_BUSY},
+ { "PCI INT Acknowledge", 0x1a000000, 0x1a000003, IORESOURCE_BUSY },
+ { "Boot PROM", 0x1fc00000, 0x1fc7ffff, IORESOURCE_BUSY},
+ { "Diag PROM", 0x1fc80000, 0x1fcfffff, IORESOURCE_BUSY},
+ { "X-Bus", 0x1fd00000, 0x1fdfffff, IORESOURCE_BUSY},
+ { "BIOS map", 0x1fe00000, 0x1fefffff, IORESOURCE_BUSY},
+ { "NVRAM / EEPROM", 0x1ff00000, 0x1ff7ffff, IORESOURCE_BUSY},
+ { "ASIC PCI", 0x1fff0000, 0x1fffefff, IORESOURCE_BUSY},
+ { "MP Agent", 0x1ffff000, 0x1fffffff, IORESOURCE_BUSY},
+ { "Main Memory", 0x20000000, 0x9fffffff, IORESOURCE_BUSY}
+};
+
+static void __init sni_resource_init(void)
+{
+ int i;
+
+ /* request I/O space for devices used on all i[345]86 PCs */
+ for (i = 0; i < ARRAY_SIZE(pcimt_io_resources); i++)
+ request_resource(&ioport_resource, pcimt_io_resources + i);
+
+ /* request mem space for pcimt-specific devices */
+ for (i = 0; i < ARRAY_SIZE(pcimt_mem_resources); i++)
+ request_resource(&sni_mem_resource, pcimt_mem_resources + i);
+
+ ioport_resource.end = sni_io_resource.end;
+}
+
+extern struct pci_ops sni_pci_ops;
+
+static struct pci_controller sni_controller = {
+ .pci_ops = &sni_pci_ops,
+ .mem_resource = &sni_mem_resource,
+ .mem_offset = 0x10000000UL,
+ .io_resource = &sni_io_resource,
+ .io_offset = 0x00000000UL
+};
+
+static inline void sni_pcimt_time_init(void)
+{
+ rtc_get_time = mc146818_get_cmos_time;
+ rtc_set_time = mc146818_set_rtc_mmss;
+}
+
+static int __init sni_rm200_pci_setup(void)
{
sni_pcimt_detect();
sni_pcimt_sc_init();
+ sni_pcimt_time_init();
set_io_port_base(SNI_PORT_BASE);
+ ioport_resource.end = sni_io_resource.end;
/*
* Setup (E)ISA I/O memory access stuff
*/
isa_slot_offset = 0xb0000000;
- // sni_map_isa_cache = 0;
#ifdef CONFIG_EISA
EISA_bus = 1;
#endif
- request_region(0x00,0x20,"dma1");
- request_region(0x40,0x20,"timer");
- /* XXX FIXME: CONFIG_RTC */
- request_region(0x70,0x10,"rtc");
- request_region(0x80,0x10,"dma page reg");
- request_region(0xc0,0x20,"dma2");
+ sni_resource_init();
board_timer_setup = sni_rm200_pci_timer_setup;
_machine_restart = sni_machine_restart;
_machine_halt = sni_machine_halt;
_machine_power_off = sni_machine_power_off;
- /*
- * Some cluefull person has placed the PCI config data directly in
- * the I/O port space ...
- */
- request_region(0xcfc,0x04,"PCI config data");
+ sni_display_setup();
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &std_ide_ops;
+#ifdef CONFIG_PCI
+ register_pci_controller(&sni_controller);
#endif
- conswitchp = &vga_con;
-
- screen_info = (struct screen_info) {
- 0, 0, /* orig-x, orig-y */
- 0, /* unused */
- 52, /* orig_video_page */
- 3, /* orig_video_mode */
- 80, /* orig_video_cols */
- 4626, 3, 9, /* unused, ega_bx, unused */
- 50, /* orig_video_lines */
- 0x22, /* orig_video_isVGA */
- 16 /* orig_video_points */
- };
- rtc_ops = &std_rtc_ops;
+ return 0;
}
+
+early_initcall(sni_rm200_pci_setup);
diff -puN arch/mips/tx4927/common/tx4927_irq.c~mips-megapatch arch/mips/tx4927/common/tx4927_irq.c
--- 25/arch/mips/tx4927/common/tx4927_irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/tx4927/common/tx4927_irq.c 2004-02-19 12:53:02.000000000 -0800
@@ -23,6 +23,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
+#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
diff -puN arch/mips/tx4927/common/tx4927_irq_handler.S~mips-megapatch arch/mips/tx4927/common/tx4927_irq_handler.S
--- 25/arch/mips/tx4927/common/tx4927_irq_handler.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/tx4927/common/tx4927_irq_handler.S 2004-02-19 12:53:02.000000000 -0800
@@ -29,7 +29,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
diff -puN arch/mips/tx4927/common/tx4927_setup.c~mips-megapatch arch/mips/tx4927/common/tx4927_setup.c
--- 25/arch/mips/tx4927/common/tx4927_setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/tx4927/common/tx4927_setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,8 +1,4 @@
/*
- * linux/arch/mips/tx4927/common/tx4927_setup.c
- *
- * common tx4927 setup stuff
- *
* Author: MontaVista Software, Inc.
* source@mvista.com
*
@@ -28,7 +24,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-
+#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
@@ -49,13 +45,11 @@
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/time.h>
-#include <asm/time.h>
#include <asm/tx4927/tx4927.h>
#undef DEBUG
-void __init tx4927_setup(void);
void __init tx4927_time_init(void);
void __init tx4927_timer_setup(struct irqaction *irq);
void dump_cp0(char *key);
@@ -70,7 +64,7 @@ static void tx4927_write_buffer_flush(vo
}
-void __init tx4927_setup(void)
+static void __init tx4927_setup(void)
{
board_time_init = tx4927_time_init;
board_timer_setup = tx4927_timer_setup;
@@ -86,6 +80,7 @@ void __init tx4927_setup(void)
return;
}
+early_initcall(tx4927_setup);
void __init tx4927_time_init(void)
{
@@ -120,7 +115,7 @@ void __init tx4927_timer_setup(struct ir
/* to generate the first timer interrupt */
c1 = read_c0_count();
- count = c1 + (mips_counter_frequency / HZ);
+ count = c1 + (mips_hpt_frequency / HZ);
write_c0_compare(count);
c2 = read_c0_count();
diff -puN arch/mips/tx4927/toshiba_rbtx4927/Makefile~mips-megapatch arch/mips/tx4927/toshiba_rbtx4927/Makefile
--- 25/arch/mips/tx4927/toshiba_rbtx4927/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/tx4927/toshiba_rbtx4927/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -2,7 +2,4 @@ obj-y += toshiba_rbtx4927_prom.o
obj-y += toshiba_rbtx4927_setup.o
obj-y += toshiba_rbtx4927_irq.o
-obj-$(CONFIG_PCI) += toshiba_rbtx4927_pci_fixup.o
-obj-$(CONFIG_PCI) += toshiba_rbtx4927_pci_ops.o
-
EXTRA_AFLAGS := $(CFLAGS)
diff -puN arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c~mips-megapatch arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
--- 25/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c 2004-02-19 12:53:02.000000000 -0800
@@ -124,7 +124,6 @@ JP7 is not bus master -- do NOT use -- o
#include <linux/timex.h>
#include <asm/bootinfo.h>
#include <asm/page.h>
-#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pci.h>
@@ -132,7 +131,6 @@ JP7 is not bus master -- do NOT use -- o
#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/time.h>
-#include <linux/version.h>
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#ifdef CONFIG_RTC_DS1742
diff -puN -L arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_pci_fixup.c arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_pci_fixup.c~mips-megapatch /dev/null
--- 25/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_pci_fixup.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,329 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Board specific pci fixups for the Toshiba rbtx4927
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/tx4927/tx4927.h>
-#include <asm/tx4927/tx4927_pci.h>
-
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-void __init pcibios_fixup_resources(struct pci_dev *dev)
-{
- /* will need to fixup IO resources */
-}
-
-void __init pcibios_fixup(void)
-{
- /* nothing to do here */
-}
-
-/* look up table for backplane pci irq for slots 17-20 by pin # */
-static unsigned char backplane_pci_irq[4][4] = {
- /* PJ6 SLOT: 17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,
- /* PJ6 SLOT: 17, PIN: 2 */
- TX4927_IRQ_IOC_PCIB,
- /* PJ6 SLOT: 17, PIN: 3 */
- TX4927_IRQ_IOC_PCIC,
- /* PJ6 SLOT: 17, PIN: 4 */
- TX4927_IRQ_IOC_PCID},
- /* SB SLOT: 18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,
- /* SB SLOT: 18, PIN: 2 */
- TX4927_IRQ_IOC_PCIC,
- /* SB SLOT: 18, PIN: 3 */
- TX4927_IRQ_IOC_PCID,
- /* SB SLOT: 18, PIN: 4 */
- TX4927_IRQ_IOC_PCIA},
- /* PJ5 SLOT: 19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,
- /* PJ5 SLOT: 19, PIN: 2 */
- TX4927_IRQ_IOC_PCID,
- /* PJ5 SLOT: 19, PIN: 3 */
- TX4927_IRQ_IOC_PCIA,
- /* PJ5 SLOT: 19, PIN: 4 */
- TX4927_IRQ_IOC_PCIB},
- /* PJ4 SLOT: 20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,
- /* PJ4 SLOT: 20, PIN: 2 */
- TX4927_IRQ_IOC_PCIA,
- /* PJ4 SLOT: 20, PIN: 3 */
- TX4927_IRQ_IOC_PCIB,
- /* PJ4 SLOT: 20, PIN: 4 */
- TX4927_IRQ_IOC_PCIC}
-};
-
-int pci_get_irq(struct pci_dev *dev, int pin)
-{
- unsigned char irq = pin;
-
- DBG("pci_get_irq: pin is %d\n", pin);
- /* IRQ rotation */
- irq--; /* 0-3 */
- if (dev->bus->parent == NULL &&
- PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
- printk("Onboard PCI_SLOT(dev->devfn) is %d\n",
- PCI_SLOT(dev->devfn));
- /* IDSEL=A23 is tx4927 onboard pci slot */
- irq = (irq + PCI_SLOT(dev->devfn)) % 4;
- irq++; /* 1-4 */
- DBG("irq is now %d\n", irq);
-
- switch (irq) {
- case 1:
- irq = TX4927_IRQ_IOC_PCIA;
- break;
- case 2:
- irq = TX4927_IRQ_IOC_PCIB;
- break;
- case 3:
- irq = TX4927_IRQ_IOC_PCIC;
- break;
- case 4:
- irq = TX4927_IRQ_IOC_PCID;
- break;
- }
- } else {
- /* PCI Backplane */
- DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n",
- PCI_SLOT(dev->devfn));
- irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];
- }
- DBG("assigned irq %d\n", irq);
- return irq;
-}
-
-
-#ifdef TX4927_SUPPORT_PCI_66
-extern int tx4927_pci66;
-extern void tx4927_pci66_setup(void);
-#endif
-extern void tx4927_pci_setup(void);
-
-#ifdef TX4927_SUPPORT_PCI_66
-int tx4927_pci66_check(void)
-{
- struct pci_dev *dev;
- unsigned short stat;
- int cap66 = 1;
-
- if (tx4927_pci66 < 0)
- return 0;
-
- /* check 66MHz capability */
- pci_for_each_dev(dev) {
- if (cap66) {
- pci_read_config_word(dev, PCI_STATUS, &stat);
- if (!(stat & PCI_STATUS_66MHZ)) {
- printk(KERN_INFO
- "PCI: %02x:%02x not 66MHz capable.\n",
- dev->bus->number, dev->devfn);
- cap66 = 0;
- }
- }
- }
- return cap66;
-}
-#endif
-
-#ifdef DEBUG
-void do_it(u32 offset, u32 reg)
-{
- volatile u32 a1;
- volatile u32 a2;
- volatile u32 v1;
- volatile u32 v2;
-
- a1 = 0xff1f0000 + offset + reg;
- a2 = a1 + 4;
-
- v1 = *(volatile u32 *) a1;
- v2 = *(volatile u32 *) a2;
-
- if (v1)
- printk("TX4927 0x%08x 0x%08x\n", a1, v1);
- if (v2)
- printk("TX4927 0x%08x 0x%08x\n", a2, v2);
-}
-
-void do_it1(u32 base, u32 r)
-{
- do_it(base, r);
-}
-
-void do_it2(u32 base, u32 start, u32 stop)
-{
- u32 r;
-
- for (r = start; r <= stop; r += 8) {
- do_it(base, r);
- }
-}
-void dump_config(void)
-{
- unsigned long id;
- unsigned long j;
- struct pci_dev *dev;
-
- printk("----------------------pci\n");
- pci_for_each_dev(dev) {
- for (j = 0; j < 64; j++) {
- pci_read_config_dword(dev, j * 4, &id);
- if (id == 0)
- continue;
- printk
- ("dev 0x%02x 0x%02x:0x%02x -- 0x%02x-0x%02x 0x%08x\n",
- dev->devfn, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), (j * 4) + 3, (j * 4),
- id);
- }
- printk("dev 0x%02x \n", dev->devfn);
- }
- printk("----------------------sdram\n");
- do_it2(0x8000, 0x00, 0x18);
- do_it1(0x8000, 0x40);
- do_it1(0x8000, 0x58);
- printk("----------------------ebus\n");
- do_it2(0x9000, 0x00, 0x38);
- printk("----------------------ecc\n");
- do_it2(0xa000, 0x00, 0x08);
- printk("----------------------dmac\n");
- do_it2(0xb000, 0x00, 0xf8);
- /* b1xx */
- printk("----------------------pci\n");
- /* d */
- printk("----------------------cfg\n");
- do_it2(0xe000, 0x00, 0x20);
- do_it1(0xe000, 0x30);
- do_it1(0xe000, 0x48);
- printk("----------------------timers\n");
- do_it2(0xf000, 0x00, 0xf0);
- do_it2(0xf100, 0x00, 0xf0);
- do_it2(0xf200, 0x00, 0xf0);
- printk("----------------------serial\n");
- do_it2(0xf300, 0x00, 0x20);
- do_it2(0xf400, 0x00, 0x20);
- printk("----------------------parallel\n");
- do_it2(0xf500, 0x00, 0x0c);
- printk("----------------------pic\n");
- do_it2(0xf500, 0x10, 0x24);
- do_it2(0xf600, 0x00, 0x2c);
- do_it1(0xf600, 0x40);
- do_it1(0xf600, 0x60);
- do_it1(0xf600, 0x80);
- do_it1(0xf600, 0xa0);
- printk("----------------------aclink\n");
- do_it2(0xf700, 0x00, 0xfc);
- printk("----------------------done\n");
-}
-#endif
-
-
-void __init pcibios_fixup_irqs(void)
-{
- unsigned char pin;
- unsigned char irq;
- struct pci_dev *dev;
- unsigned int id;
-
-#ifdef TX4927_SUPPORT_PCI_66
- {
- if (tx4927_pci66_check()) {
- tx4927_pci66_setup();
- tx4927_pci_setup(); /* Reinitialize PCIC */
- }
- }
-#endif
-
- pci_for_each_dev(dev) {
- DBG("FIXUP:\n");
- DBG(" devfn=0x%02x (0x%02x:0x%02x)\n",
- dev->devfn, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn));
-
- pci_read_config_dword(dev, PCI_VENDOR_ID, &id);
- DBG(" id=0x%08x\n", id);
-
- pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
- DBG(" line=0x%02x/%d\n", irq, irq);
-
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- DBG(" pin=%d\n", pin);
-
-#ifdef DEBUG
- {
- unsigned int tmp;
- pci_read_config_dword(dev, 0x10, &tmp);
- DBG(" bar0:0x10=0x%08x\n", tmp);
- pci_read_config_dword(dev, 0x14, &tmp);
- DBG(" bar1:0x14=0x%08x\n", tmp);
- pci_read_config_dword(dev, 0x1c, &tmp);
- DBG(" bar2:0x1c=0x%08x\n", tmp);
- pci_read_config_dword(dev, 0x20, &tmp);
- DBG(" bar3:0x20=0x%08x\n", tmp);
- pci_read_config_dword(dev, 0x24, &tmp);
- DBG(" bar4:0x24=0x%08x\n", tmp);
- }
-#endif
-
- irq = 0;
-
- if (id == 0x91301055) { /* ide */
- irq = 14;
- }
-
- if (pin == 0) {
- DBG(" auto irq (now=%d) -- skipping pin=0\n", irq);
- } else if (irq) {
- DBG(" auto irq (now=%d) -- skipping hardcoded irq\n", irq);
- } else {
- DBG(" auto irq (was=%d)\n", irq);
- irq = pci_get_irq(dev, pin);
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
- irq);
- dev->irq = irq;
- DBG(" auto irq (now=%d)\n", irq);
- }
-
- pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
- printk(KERN_INFO
- "PCI: 0x%02x:0x%02x(0x%02x,0x%02x) IRQ=%d\n",
- dev->bus->number, dev->devfn, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), irq);
-
- }
-
-}
diff -puN -L arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_pci_ops.c arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_pci_ops.c~mips-megapatch /dev/null
--- 25/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_pci_ops.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,317 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
- *
- * Define the pci_ops for the Toshiba rbtx4927
- *
- * Much of the code is derived from the original DDB5074 port by
- * Geert Uytterhoeven <geert@sonycom.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/addrspace.h>
-#include <asm/pci_channel.h>
-#include <asm/tx4927/tx4927_pci.h>
-#include <asm/debug.h>
-
-/* initialize in setup */
-struct resource pci_io_resource = {
- "pci IO space",
- (PCIBIOS_MIN_IO),
- ((PCIBIOS_MIN_IO) + (TX4927_PCIIO_SIZE)) - 1,
- IORESOURCE_IO
-};
-
-/* initialize in setup */
-struct resource pci_mem_resource = {
- "pci memory space",
- TX4927_PCIMEM,
- TX4927_PCIMEM + TX4927_PCIMEM_SIZE - 1,
- IORESOURCE_MEM
-};
-
-extern struct pci_ops tx4927_pci_ops;
-
-struct pci_channel mips_pci_channels[] = {
- /* h/w only supports devices 0x00 to 0x14 */
- {&tx4927_pci_ops, &pci_io_resource, &pci_mem_resource,
- PCI_DEVFN(0x00, 0), PCI_DEVFN(0x14, 7)},
- {NULL, NULL, NULL, 0, 0}
-};
-
-unsigned int pcibios_assign_all_busses(void)
-{
- return 1;
-}
-
-static int
-mkaddr(unsigned char bus, unsigned char dev_fn, unsigned char where,
- int *flagsp)
-{
- if (bus > 0) {
- /* Type 1 configuration */
- tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;
- } else {
- if (dev_fn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0))
- return -1;
-
- /* Type 0 configuration */
- tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) | (where & 0xfc);
- }
- /* clear M_ABORT and Disable M_ABORT Int. */
- tx4927_pcicptr->pcistatus =
- (tx4927_pcicptr->pcistatus & 0x0000ffff) |
- (PCI_STATUS_REC_MASTER_ABORT << 16);
- tx4927_pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;
- return 0;
-}
-
-static int check_abort(int flags)
-{
- int code = PCIBIOS_SUCCESSFUL;
- if (tx4927_pcicptr->
- pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
- tx4927_pcicptr->pcistatus =
- (tx4927_pcicptr->
- pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
- << 16);
- tx4927_pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT;
- code = PCIBIOS_DEVICE_NOT_FOUND;
- // printk("returning PCIBIOS_DEVICE_NOT_FOUND\n");
- }
- return code;
-}
-
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static int tx4927_pcibios_read_config_byte(struct pci_dev *dev,
- int where, unsigned char *val)
-{
- int flags, retval;
- unsigned char bus, func_num;
-
- db_assert((where & 3) == 0);
- db_assert(where < (1 << 8));
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
-#ifdef __BIG_ENDIAN
- *val =
- *(volatile u8 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | ((where & 3) ^ 3));
-#else
- *val =
- *(volatile u8 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | (where & 3));
-#endif
- retval = check_abort(flags);
- if (retval == PCIBIOS_DEVICE_NOT_FOUND)
- *val = 0xff;
-//printk("CFG R1 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, *val );
- return retval;
-}
-
-static int tx4927_pcibios_read_config_word(struct pci_dev *dev,
- int where, unsigned short *val)
-{
- int flags, retval;
- unsigned char bus, func_num;
-
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- db_assert((where & 3) == 0);
- db_assert(where < (1 << 8));
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
-#ifdef __BIG_ENDIAN
- *val =
- *(volatile u16 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | ((where & 3) ^ 2));
-#else
- *val =
- *(volatile u16 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | (where & 3));
-#endif
- retval = check_abort(flags);
- if (retval == PCIBIOS_DEVICE_NOT_FOUND)
- *val = 0xffff;
-//printk("CFG R2 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, *val );
- return retval;
-}
-
-static int tx4927_pcibios_read_config_dword(struct pci_dev *dev,
- int where, unsigned int *val)
-{
- int flags, retval;
- unsigned char bus, func_num;
-
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- db_assert((where & 3) == 0);
- db_assert(where < (1 << 8));
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
- *val = tx4927_pcicptr->g2pcfgdata;
- retval = check_abort(flags);
- if (retval == PCIBIOS_DEVICE_NOT_FOUND)
- *val = 0xffffffff;
-
-//printk("CFG R4 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, *val );
- return retval;
-}
-
-static int tx4927_pcibios_write_config_byte(struct pci_dev *dev,
- int where, unsigned char val)
-{
- int flags;
- unsigned char bus, func_num;
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
-#ifdef __BIG_ENDIAN
- *(volatile u8 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | ((where & 3) ^ 3)) = val;
-#else
- *(volatile u8 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | (where & 3)) = val;
-#endif
-//printk("CFG W1 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, val );
- return check_abort(flags);
-}
-
-static int tx4927_pcibios_write_config_word(struct pci_dev *dev,
- int where, unsigned short val)
-{
- int flags;
- unsigned char bus, func_num;
-
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
-#ifdef __BIG_ENDIAN
- *(volatile u16 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | ((where & 3) ^ 2)) = val;
-#else
- *(volatile u16 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | (where & 3)) = val;
-#endif
-//printk("CFG W2 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, val );
- return check_abort(flags);
-}
-
-static int tx4927_pcibios_write_config_dword(struct pci_dev *dev,
- int where, unsigned int val)
-{
- int flags;
- unsigned char bus, func_num;
-
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
- }
-
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
- tx4927_pcicptr->g2pcfgdata = val;
-//printk("CFG W4 0x%02x 0x%02x 0x%08x\n", dev->devfn, where, val );
- return check_abort(flags);
-}
-
-struct pci_ops tx4927_pci_ops = {
- tx4927_pcibios_read_config_byte,
- tx4927_pcibios_read_config_word,
- tx4927_pcibios_read_config_dword,
- tx4927_pcibios_write_config_byte,
- tx4927_pcibios_write_config_word,
- tx4927_pcibios_write_config_dword
-};
diff -puN arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c~mips-megapatch arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c
--- 25/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c 2004-02-19 12:53:02.000000000 -0800
@@ -36,14 +36,10 @@
#include <asm/cpu.h>
#include <asm/tx4927/tx4927.h>
-#ifndef COMMAND_LINE_SIZE
-#define COMMAND_LINE_SIZE CL_SIZE
-#endif
-
-char arcs_cmdline[COMMAND_LINE_SIZE] = "console=ttyS0,38400 ip=any root=nfs rw";
-
-void __init prom_init_cmdline(int argc, char **argv)
+void __init prom_init_cmdline(void)
{
+ int argc = (int) fw_arg0;
+ char **argv = (char **) fw_arg1;
int i; /* Always ignore the "-c" at argv[0] */
/* ignore all built-in args if any f/w args given */
@@ -59,14 +55,14 @@ void __init prom_init_cmdline(int argc,
}
}
-void __init prom_init(int argc, char **argv, char **envp, int *pvec)
+void __init prom_init(void)
{
+ const char* toshiba_name_list[] = GROUP_TOSHIBA_NAMES;
extern int tx4927_get_mem_size(void);
+ extern char* toshiba_name;
int msize;
- const char* toshiba_name_list[] = GROUP_TOSHIBA_NAMES;
- extern char* toshiba_name;
- prom_init_cmdline(argc, argv);
+ prom_init_cmdline();
mips_machgroup = MACH_GROUP_TOSHIBA;
@@ -81,13 +77,9 @@ void __init prom_init(int argc, char **a
add_memory_region(0, msize << 20, BOOT_MEM_RAM);
}
-void __init prom_free_prom_memory(void)
-{
-}
-
-
-void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
const char *get_system_type(void)
diff -puN arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c~mips-megapatch arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
--- 25/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -52,18 +52,14 @@
#include <linux/timex.h>
#include <asm/bootinfo.h>
#include <asm/page.h>
-#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/pci.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/time.h>
-#include <linux/version.h>
#include <linux/bootmem.h>
#include <linux/blkdev.h>
-#include <linux/console.h>
#ifdef CONFIG_RTC_DS1742
#include <asm/rtc_ds1742.h>
#endif
@@ -73,20 +69,11 @@
#include <asm/tx4927/toshiba_rbtx4927.h>
#ifdef CONFIG_PCI
#include <asm/tx4927/tx4927_pci.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
#include <asm/pci_channel.h>
#endif
-#ifdef CONFIG_PC_KEYB
-#include <asm/keyboard.h>
-#endif
#ifdef CONFIG_BLK_DEV_IDEPCI
#include <linux/hdreg.h>
-#include <asm/ptrace.h>
#include <linux/ide.h>
-extern struct ide_ops std_ide_ops;
#endif
#undef TOSHIBA_RBTX4927_SETUP_DEBUG
@@ -326,7 +313,7 @@ void print_pci_status(void)
printk("PCIC STATUS %lx\n", tx4927_pcicptr->pcicstatus);
}
-static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
+static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
int top_bus, int busnr, int devfn)
{
static struct pci_dev dev;
@@ -348,7 +335,7 @@ static struct pci_dev *fake_pci_dev(stru
}
#define EARLY_PCI_OP(rw, size, type) \
-static int early_##rw##_config_##size(struct pci_channel *hose, \
+static int early_##rw##_config_##size(struct pci_controller *hose, \
int top_bus, int bus, int devfn, int offset, type value) \
{ \
return pci_##rw##_config_##size( \
@@ -363,22 +350,15 @@ EARLY_PCI_OP(write, byte, u8)
EARLY_PCI_OP(write, word, u16)
EARLY_PCI_OP(write, dword, u32)
-static int __init tx4927_pcibios_init(int busno, struct pci_channel *hose)
+static int __init tx4927_pcibios_init(int busno, struct pci_controller *hose)
{
- u32 pci_devfn;
- int devfn_start = 0;
- int devfn_stop = 0xff;
unsigned int id;
+ u32 pci_devfn;
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
"-\n");
- if (hose->first_devfn)
- devfn_start = hose->first_devfn;
- if (hose->last_devfn)
- devfn_stop = hose->last_devfn;
-
- for (pci_devfn = devfn_start; pci_devfn < devfn_stop; pci_devfn++) {
+ for (pci_devfn = 0x0; pci_devfn < 0xff; pci_devfn++) {
early_read_config_dword(hose, busno, busno, pci_devfn,
PCI_VENDOR_ID, &id);
@@ -604,7 +584,7 @@ static int __init tx4927_pcibios_init(in
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
"+\n");
- return (busno);
+ return busno;
}
extern struct resource pci_io_resource;
@@ -852,17 +832,9 @@ void tx4927_pci_setup(void)
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
":pci setup complete:\n");
- //tx4927_dump_pcic_settings();
-
- {
- struct pci_channel *p;
- int busno;
+ //tx4927_dump_pcic_settings();
- busno = 0;
- for (p = mips_pci_channels; p->pci_ops != NULL; p++) {
- busno = tx4927_pcibios_init(busno, p) + 1;
- }
- }
+ tx4927_pcibios_init(0, &tx4927_controller);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, "+\n");
}
@@ -972,31 +944,6 @@ void __init toshiba_rbtx4927_setup(void)
_machine_halt = toshiba_rbtx4927_halt;
_machine_power_off = toshiba_rbtx4927_power_off;
-
-#ifdef CONFIG_BLK_DEV_IDEPCI
- {
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":ide_ops=&std_ide_ops(modified)\n");
- ide_ops = &std_ide_ops;
- }
-#else
- {
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":ide_ops=<NOT_CONFIG>\n");
- }
-#endif
-
-#ifdef CONFIG_FB
- {
- conswitchp = &dummy_con;
- }
-#endif
-
-
-
-
#ifdef CONFIG_PCI
/* PCIC */
@@ -1063,7 +1010,7 @@ void __init toshiba_rbtx4927_setup(void)
{
u32 id = 0;
- early_read_config_dword(&mips_pci_channels[0], 0, 0, 0x90,
+ early_read_config_dword(&tx4927_controller, 0, 0, 0x90,
PCI_VENDOR_ID, &id);
if (id == 0x94601055) {
tx4927_using_backplane = 1;
@@ -1073,30 +1020,6 @@ void __init toshiba_rbtx4927_setup(void)
}
}
-
- /* this is only done if backplane board installed, so must wait for pci */
-#ifdef CONFIG_PC_KEYB
- {
- if (tx4927_using_backplane) {
- extern struct kbd_ops std_kbd_ops;
- kbd_ops = &std_kbd_ops;
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":kbd_ops=&std_kbd_ops\n");
- } else {
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":kbd_ops=<NO_BACKPLANE>\n");
- }
- }
-#else
- {
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":kbd_ops=<NOT_CONFIG>\n");
- }
-#endif
-
/* this is on ISA bus behind PCI bus, so need PCI up first */
#ifdef CONFIG_TOSHIBA_FPCIB0
{
@@ -1167,7 +1090,7 @@ toshiba_rbtx4927_time_init(void)
":rtc_ds1742_init()+\n");
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
- ":Calibrate mips_counter_frequency-\n");
+ ":Calibrate mips_hpt_frequency-\n");
rtc_ds1742_wait();
/* get the count */
@@ -1180,29 +1103,29 @@ toshiba_rbtx4927_time_init(void)
c2 = read_c0_count();
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
- ":Calibrate mips_counter_frequency+\n");
+ ":Calibrate mips_hpt_frequency+\n");
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
":c1=%12u\n", c1);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
":c2=%12u\n", c2);
/* this diff is as close as we are going to get to counter ticks per sec */
- mips_counter_frequency = abs(c2 - c1);
+ mips_hpt_frequency = abs(c2 - c1);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
- ":f1=%12u\n", mips_counter_frequency);
+ ":f1=%12u\n", mips_hpt_frequency);
/* round to 1/10th of a MHz */
- mips_counter_frequency /= (100 * 1000);
- mips_counter_frequency *= (100 * 1000);
+ mips_hpt_frequency /= (100 * 1000);
+ mips_hpt_frequency *= (100 * 1000);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT,
- ":f2=%12u\n", mips_counter_frequency);
+ ":f2=%12u\n", mips_hpt_frequency);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_INFO,
- ":mips_counter_frequency=%uHz (%uMHz)\n",
- mips_counter_frequency,
- mips_counter_frequency / 1000000);
+ ":mips_hpt_frequency=%uHz (%uMHz)\n",
+ mips_hpt_frequency,
+ mips_hpt_frequency / 1000000);
#else
- mips_counter_frequency = 100000000;
+ mips_hpt_frequency = 100000000;
#endif
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIME_INIT, "+\n");
diff -puN arch/mips/vr4181/osprey/prom.c~mips-megapatch arch/mips/vr4181/osprey/prom.c
--- 25/arch/mips/vr4181/osprey/prom.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr4181/osprey/prom.c 2004-02-19 12:53:02.000000000 -0800
@@ -19,8 +19,6 @@
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
-char arcs_cmdline[CL_SIZE];
-
const char *get_system_type(void)
{
return "NEC_Vr41xx Osprey";
@@ -30,10 +28,11 @@ const char *get_system_type(void)
* [jsun] right now we assume it is the nec debug monitor, which does
* not pass any arguments.
*/
-void __init prom_init()
+void __init prom_init(void)
{
- strcpy(arcs_cmdline, "ip=bootp ");
- strcat(arcs_cmdline, "ether=46,0x03fe0300,eth0 ");
+ // cmdline is now set in default config
+ // strcpy(arcs_cmdline, "ip=bootp ");
+ // strcat(arcs_cmdline, "ether=46,0x03fe0300,eth0 ");
// strcpy(arcs_cmdline, "ether=0,0x0300,eth0 "
// strcat(arcs_cmdline, "video=vr4181fb:xres:240,yres:320,bpp:8 ");
@@ -44,11 +43,7 @@ void __init prom_init()
add_memory_region(0, 16 << 20, BOOT_MEM_RAM);
}
-void __init prom_free_prom_memory(void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
-
-void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
-{
-}
-
diff -puN arch/mips/vr4181/osprey/setup.c~mips-megapatch arch/mips/vr4181/osprey/setup.c
--- 25/arch/mips/vr4181/osprey/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr4181/osprey/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -16,7 +16,6 @@
*/
#include <linux/config.h>
-#include <linux/console.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <linux/delay.h>
@@ -32,7 +31,7 @@ extern void nec_osprey_power_off(void);
extern void vr4181_init_serial(void);
extern void vr4181_init_time(void);
-void __init nec_osprey_setup(void)
+static void __init nec_osprey_setup(void)
{
set_io_port_base(VR4181_PORT_BASE);
isa_slot_offset = VR4181_ISAMEM_BASE;
@@ -40,10 +39,6 @@ void __init nec_osprey_setup(void)
vr4181_init_serial();
vr4181_init_time();
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
_machine_restart = nec_osprey_restart;
_machine_halt = nec_osprey_halt;
_machine_power_off = nec_osprey_power_off;
@@ -69,3 +64,5 @@ void __init nec_osprey_setup(void)
*/
*VR4181_GPINTTYPL = 0x3000;
}
+
+early_initcall(nec_osprey_setup);
diff -puN -L arch/mips/vr41xx/casio-e55/ide-e55.c arch/mips/vr41xx/casio-e55/ide-e55.c~mips-megapatch /dev/null
--- 25/arch/mips/vr41xx/casio-e55/ide-e55.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,99 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * IDE routines for typical pc-like standard configurations
- * for the CASIO CASSIOPEIA E-55/65.
- *
- * Copyright (C) 1998, 1999, 2001 by Ralf Baechle
- */
-/*
- * Changes:
- * Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Sun, 24 Feb 2002
- * - Added CASIO CASSIOPEIA E-55/65 support.
- */
-#include <linux/sched.h>
-#include <linux/ide.h>
-#include <linux/ioport.h>
-#include <linux/hdreg.h>
-#include <asm/ptrace.h>
-#include <asm/hdreg.h>
-
-static int e55_ide_default_irq(ide_ioreg_t base)
-{
- return 40;
-}
-
-static ide_ioreg_t e55_ide_default_io_base(int index)
-{
- switch (index) {
- case 0: return 0xc1f0;
- case 1: return 0xc170;
- case 2: return 0xc1e8;
- case 3: return 0xc168;
- case 4: return 0xc1e0;
- case 5: return 0xc160;
- }
- return 0;
-}
-
-static void e55_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq)
-{
- ide_ioreg_t reg = data_port;
- int i;
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- if (ctrl_port) {
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- } else {
- hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
- }
- if (irq != NULL)
- *irq = 0;
- hw->io_ports[IDE_IRQ_OFFSET] = 0;
-}
-
-static int e55_ide_request_irq(unsigned int irq,
- void (*handler)(int,void *, struct pt_regs *),
- unsigned long flags, const char *device,
- void *dev_id)
-{
- return request_irq(irq, handler, flags, device, dev_id);
-}
-
-static void e55_ide_free_irq(unsigned int irq, void *dev_id)
-{
- free_irq(irq, dev_id);
-}
-
-static int e55_ide_check_region(ide_ioreg_t from, unsigned int extent)
-{
- return check_region(from, extent);
-}
-
-static void e55_ide_request_region(ide_ioreg_t from, unsigned int extent,
- const char *name)
-{
- request_region(from, extent, name);
-}
-
-static void e55_ide_release_region(ide_ioreg_t from, unsigned int extent)
-{
- release_region(from, extent);
-}
-
-struct ide_ops e55_ide_ops = {
- &e55_ide_default_irq,
- &e55_ide_default_io_base,
- &e55_ide_init_hwif_ports,
- &e55_ide_request_irq,
- &e55_ide_free_irq,
- &e55_ide_check_region,
- &e55_ide_request_region,
- &e55_ide_release_region
-};
diff -puN arch/mips/vr41xx/casio-e55/init.c~mips-megapatch arch/mips/vr41xx/casio-e55/init.c
--- 25/arch/mips/vr41xx/casio-e55/init.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/casio-e55/init.c 2004-02-19 12:53:02.000000000 -0800
@@ -13,22 +13,21 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
-char arcs_cmdline[CL_SIZE];
-
const char *get_system_type(void)
{
return "CASIO CASSIOPEIA E-11/15/55/65";
}
-void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
+void __init prom_init(void)
{
+ int argc = fw_arg0;
+ char **argv = (char **) fw_arg1;
int i;
/*
@@ -44,6 +43,7 @@ void __init prom_init(int argc, char **a
mips_machtype = MACH_CASIO_E55;
}
-void __init prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/vr41xx/casio-e55/Makefile~mips-megapatch arch/mips/vr41xx/casio-e55/Makefile
--- 25/arch/mips/vr41xx/casio-e55/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/casio-e55/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -3,5 +3,3 @@
#
obj-y += init.o setup.o
-
-obj-$(CONFIG_IDE) += ide-e55.o
diff -puN arch/mips/vr41xx/casio-e55/setup.c~mips-megapatch arch/mips/vr41xx/casio-e55/setup.c
--- 25/arch/mips/vr41xx/casio-e55/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/casio-e55/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,28 +1,29 @@
/*
- * FILE NAME
- * arch/mips/vr41xx/casio-e55/setup.c
+ * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65.
*
- * BRIEF MODULE DESCRIPTION
- * Setup for the CASIO CASSIOPEIA E-11/15/55/65.
+ * Copyright (C) 2002-2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
*
- * Copyright 2002 Yoichi Yuasa
- * yuasa@hh.iij4u.or.jp
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
-#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/e55.h>
@@ -31,11 +32,7 @@ extern unsigned long initrd_start, initr
extern void * __rd_start, * __rd_end;
#endif
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops e55_ide_ops;
-#endif
-
-void __init casio_e55_setup(void)
+static void __init casio_e55_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
@@ -49,26 +46,18 @@ void __init casio_e55_setup(void)
initrd_end = (unsigned long)&__rd_end;
#endif
- _machine_restart = vr41xx_restart;
- _machine_halt = vr41xx_halt;
- _machine_power_off = vr41xx_power_off;
-
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &e55_ide_ops;
-#endif
-
vr41xx_bcu_init();
- vr41xx_cmu_init(0);
+ vr41xx_cmu_init();
+
+ vr41xx_pmu_init();
#ifdef CONFIG_SERIAL_8250
vr41xx_siu_init(SIU_RS232C, 0);
#endif
}
+
+early_initcall(casio_e55_setup);
diff -puN arch/mips/vr41xx/common/bcu.c~mips-megapatch arch/mips/vr41xx/common/bcu.c
--- 25/arch/mips/vr41xx/common/bcu.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/common/bcu.c 2004-02-19 12:53:02.000000000 -0800
@@ -33,27 +33,23 @@
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
+ * - New creation, NEC VR4122 and VR4131 are supported.
* - Added support for NEC VR4111 and VR4121.
*
- * Paul Mundt <lethal@chaoticdreams.org>
- * - Calculate mips_counter_frequency properly on VR4131.
- *
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * - New creation, NEC VR4122 and VR4131 are supported.
+ * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * - Added support for NEC VR4133.
*/
#include <linux/init.h>
+#include <linux/smp.h>
#include <linux/types.h>
-#include <asm/addrspace.h>
#include <asm/cpu.h>
#include <asm/io.h>
-#include <asm/time.h>
-#include <asm/vr41xx/vr41xx.h>
-#define VR4111_CLKSPEEDREG KSEG1ADDR(0x0b000014)
-#define VR4122_CLKSPEEDREG KSEG1ADDR(0x0f000014)
-#define VR4131_CLKSPEEDREG VR4122_CLKSPEEDREG
+#define CLKSPEEDREG_TYPE1 KSEG1ADDR(0x0b000014)
+#define CLKSPEEDREG_TYPE2 KSEG1ADDR(0x0f000014)
#define CLKSP(x) ((x) & 0x001f)
+ #define CLKSP_VR4133(x) ((x) & 0x0007)
#define DIV2B 0x8000
#define DIV3B 0x4000
@@ -65,15 +61,27 @@
#define TDIVMODE(x) (2 << (((x) & 0x1000) >> 12))
#define VTDIVMODE(x) (((x) & 0x0700) >> 8)
-unsigned long vr41xx_vtclock = 0;
+static unsigned long vr41xx_vtclock;
+static unsigned long vr41xx_tclock;
+
+unsigned long vr41xx_get_vtclock_frequency(void)
+{
+ return vr41xx_vtclock;
+}
+
+unsigned long vr41xx_get_tclock_frequency(void)
+{
+ return vr41xx_tclock;
+}
-static inline u16 read_clkspeed(void)
+static inline uint16_t read_clkspeed(void)
{
switch (current_cpu_data.cputype) {
case CPU_VR4111:
- case CPU_VR4121: return readw(VR4111_CLKSPEEDREG);
- case CPU_VR4122: return readw(VR4122_CLKSPEEDREG);
- case CPU_VR4131: return readw(VR4131_CLKSPEEDREG);
+ case CPU_VR4121: return readw(CLKSPEEDREG_TYPE1);
+ case CPU_VR4122:
+ case CPU_VR4131:
+ case CPU_VR4133: return readw(CLKSPEEDREG_TYPE2);
default:
printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
break;
@@ -82,7 +90,7 @@ static inline u16 read_clkspeed(void)
return 0;
}
-static inline unsigned long calculate_pclock(u16 clkspeed)
+static inline unsigned long calculate_pclock(uint16_t clkspeed)
{
unsigned long pclock = 0;
@@ -90,63 +98,90 @@ static inline unsigned long calculate_pc
case CPU_VR4111:
case CPU_VR4121:
pclock = 18432000 * 64;
+ pclock /= CLKSP(clkspeed);
break;
case CPU_VR4122:
pclock = 18432000 * 98;
+ pclock /= CLKSP(clkspeed);
break;
case CPU_VR4131:
pclock = 18432000 * 108;
+ pclock /= CLKSP(clkspeed);
+ break;
+ case CPU_VR4133:
+ switch (CLKSP_VR4133(clkspeed)) {
+ case 0:
+ pclock = 133000000;
+ break;
+ case 1:
+ pclock = 149000000;
+ break;
+ case 2:
+ pclock = 165900000;
+ break;
+ case 3:
+ pclock = 199100000;
+ break;
+ case 4:
+ pclock = 265900000;
+ break;
+ default:
+ printk(KERN_INFO "Unknown PClock speed for NEC VR4133\n");
+ break;
+ }
break;
default:
printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
break;
}
- pclock /= CLKSP(clkspeed);
printk(KERN_INFO "PClock: %ldHz\n", pclock);
return pclock;
}
-static inline unsigned long calculate_vtclock(u16 clkspeed, unsigned long pclock)
+static inline unsigned long calculate_vtclock(uint16_t clkspeed, unsigned long pclock)
{
+ unsigned long vtclock = 0;
+
switch (current_cpu_data.cputype) {
case CPU_VR4111:
/* The NEC VR4111 doesn't have the VTClock. */
break;
case CPU_VR4121:
- vr41xx_vtclock = pclock;
+ vtclock = pclock;
/* DIVVT == 9 Divide by 1.5 . VTClock = (PClock * 6) / 9 */
if (DIVVT(clkspeed) == 9)
- vr41xx_vtclock = pclock * 6;
+ vtclock = pclock * 6;
/* DIVVT == 10 Divide by 2.5 . VTClock = (PClock * 4) / 10 */
else if (DIVVT(clkspeed) == 10)
- vr41xx_vtclock = pclock * 4;
- vr41xx_vtclock /= DIVVT(clkspeed);
- printk(KERN_INFO "VTClock: %ldHz\n", vr41xx_vtclock);
+ vtclock = pclock * 4;
+ vtclock /= DIVVT(clkspeed);
+ printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
break;
case CPU_VR4122:
if(VTDIVMODE(clkspeed) == 7)
- vr41xx_vtclock = pclock / 1;
+ vtclock = pclock / 1;
else if(VTDIVMODE(clkspeed) == 1)
- vr41xx_vtclock = pclock / 2;
+ vtclock = pclock / 2;
else
- vr41xx_vtclock = pclock / VTDIVMODE(clkspeed);
- printk(KERN_INFO "VTClock: %ldHz\n", vr41xx_vtclock);
+ vtclock = pclock / VTDIVMODE(clkspeed);
+ printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
break;
case CPU_VR4131:
- vr41xx_vtclock = pclock / VTDIVMODE(clkspeed);
- printk(KERN_INFO "VTClock: %ldHz\n", vr41xx_vtclock);
+ case CPU_VR4133:
+ vtclock = pclock / VTDIVMODE(clkspeed);
+ printk(KERN_INFO "VTClock: %ldHz\n", vtclock);
break;
default:
printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
break;
}
- return vr41xx_vtclock;
+ return vtclock;
}
-static inline unsigned long calculate_tclock(u16 clkspeed, unsigned long pclock,
+static inline unsigned long calculate_tclock(uint16_t clkspeed, unsigned long pclock,
unsigned long vtclock)
{
unsigned long tclock = 0;
@@ -165,6 +200,7 @@ static inline unsigned long calculate_tc
break;
case CPU_VR4122:
case CPU_VR4131:
+ case CPU_VR4133:
tclock = vtclock / TDIVMODE(clkspeed);
break;
default:
@@ -177,30 +213,14 @@ static inline unsigned long calculate_tc
return tclock;
}
-static inline unsigned long calculate_mips_counter_frequency(unsigned long tclock)
-{
- /*
- * VR4131 Revision 2.0 and 2.1 use a value of (tclock / 2).
- */
- if ((current_cpu_data.processor_id == PRID_VR4131_REV2_0) ||
- (current_cpu_data.processor_id == PRID_VR4131_REV2_1))
- tclock /= 2;
- else
- tclock /= 4;
-
- return tclock;
-}
-
void __init vr41xx_bcu_init(void)
{
- unsigned long pclock, vtclock, tclock;
- u16 clkspeed;
+ unsigned long pclock;
+ uint16_t clkspeed;
clkspeed = read_clkspeed();
pclock = calculate_pclock(clkspeed);
- vtclock = calculate_vtclock(clkspeed, pclock);
- tclock = calculate_tclock(clkspeed, pclock, vtclock);
-
- mips_counter_frequency = calculate_mips_counter_frequency(tclock);
+ vr41xx_vtclock = calculate_vtclock(clkspeed, pclock);
+ vr41xx_tclock = calculate_tclock(clkspeed, pclock, vr41xx_vtclock);
}
diff -puN arch/mips/vr41xx/common/cmu.c~mips-megapatch arch/mips/vr41xx/common/cmu.c
--- 25/arch/mips/vr41xx/common/cmu.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/common/cmu.c 2004-02-19 12:53:02.000000000 -0800
@@ -33,52 +33,193 @@
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
+ * - New creation, NEC VR4122 and VR4131 are supported.
* - Added support for NEC VR4111 and VR4121.
*
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * - New creation, NEC VR4122 and VR4131 are supported.
+ * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * - Added support for NEC VR4133.
*/
#include <linux/init.h>
+#include <linux/smp.h>
#include <linux/types.h>
#include <asm/cpu.h>
#include <asm/io.h>
+#include <asm/vr41xx/vr41xx.h>
-#define VR4111_CMUCLKMSK KSEG1ADDR(0x0b000060)
-#define VR4122_CMUCLKMSK KSEG1ADDR(0x0f000060)
-
-static u32 vr41xx_cmu_base = 0;
-static u16 cmuclkmsk = 0;
-
-#define write_cmu(mask) writew((mask), vr41xx_cmu_base)
+#define CMUCLKMSK_TYPE1 KSEG1ADDR(0x0b000060)
+#define CMUCLKMSK_TYPE2 KSEG1ADDR(0x0f000060)
+ #define MSKPIU 0x0001
+ #define MSKSIU 0x0002
+ #define MSKAIU 0x0004
+ #define MSKKIU 0x0008
+ #define MSKFIR 0x0010
+ #define MSKDSIU 0x0820
+ #define MSKCSI 0x0040
+ #define MSKPCIU 0x0080
+ #define MSKSSIU 0x0100
+ #define MSKSHSP 0x0200
+ #define MSKFFIR 0x0400
+ #define MSKSCSI 0x1000
+ #define MSKPPCIU 0x2000
+#define CMUCLKMSK2 KSEG1ADDR(0x0f000064)
+ #define MSKCEU 0x0001
+ #define MSKMAC0 0x0002
+ #define MSKMAC1 0x0004
+
+static u32 vr41xx_cmu_base;
+static u16 cmuclkmsk, cmuclkmsk2;
+
+#define read_cmuclkmsk() readw(vr41xx_cmu_base)
+#define read_cmuclkmsk2() readw(CMUCLKMSK2)
+#define write_cmuclkmsk() writew(cmuclkmsk, vr41xx_cmu_base)
+#define write_cmuclkmsk2() writew(cmuclkmsk2, CMUCLKMSK2)
-void vr41xx_clock_supply(u16 mask)
+void vr41xx_clock_supply(unsigned int clock)
{
- cmuclkmsk |= mask;
- write_cmu(cmuclkmsk);
+ switch (clock) {
+ case PIU_CLOCK:
+ cmuclkmsk |= MSKPIU;
+ break;
+ case SIU_CLOCK:
+ cmuclkmsk |= MSKSIU | MSKSSIU;
+ break;
+ case AIU_CLOCK:
+ cmuclkmsk |= MSKAIU;
+ break;
+ case KIU_CLOCK:
+ cmuclkmsk |= MSKKIU;
+ break;
+ case FIR_CLOCK:
+ cmuclkmsk |= MSKFIR | MSKFFIR;
+ break;
+ case DSIU_CLOCK:
+ if (current_cpu_data.cputype == CPU_VR4111 ||
+ current_cpu_data.cputype == CPU_VR4121)
+ cmuclkmsk |= MSKDSIU;
+ else
+ cmuclkmsk |= MSKSIU | MSKDSIU;
+ break;
+ case CSI_CLOCK:
+ cmuclkmsk |= MSKCSI | MSKSCSI;
+ break;
+ case PCIU_CLOCK:
+ cmuclkmsk |= MSKPCIU;
+ break;
+ case HSP_CLOCK:
+ cmuclkmsk |= MSKSHSP;
+ break;
+ case PCI_CLOCK:
+ cmuclkmsk |= MSKPPCIU;
+ break;
+ case CEU_CLOCK:
+ cmuclkmsk2 |= MSKCEU;
+ break;
+ case ETHER0_CLOCK:
+ cmuclkmsk2 |= MSKMAC0;
+ break;
+ case ETHER1_CLOCK:
+ cmuclkmsk2 |= MSKMAC1;
+ break;
+ default:
+ break;
+ }
+
+ if (clock == CEU_CLOCK || clock == ETHER0_CLOCK ||
+ clock == ETHER1_CLOCK)
+ write_cmuclkmsk2();
+ else
+ write_cmuclkmsk();
}
-void vr41xx_clock_mask(u16 mask)
+void vr41xx_clock_mask(unsigned int clock)
{
- cmuclkmsk &= ~mask;
- write_cmu(cmuclkmsk);
+ switch (clock) {
+ case PIU_CLOCK:
+ cmuclkmsk &= ~MSKPIU;
+ break;
+ case SIU_CLOCK:
+ if (current_cpu_data.cputype == CPU_VR4111 ||
+ current_cpu_data.cputype == CPU_VR4121) {
+ cmuclkmsk &= ~(MSKSIU | MSKSSIU);
+ } else {
+ if (cmuclkmsk & MSKDSIU)
+ cmuclkmsk &= ~MSKSSIU;
+ else
+ cmuclkmsk &= ~(MSKSIU | MSKSSIU);
+ }
+ break;
+ case AIU_CLOCK:
+ cmuclkmsk &= ~MSKAIU;
+ break;
+ case KIU_CLOCK:
+ cmuclkmsk &= ~MSKKIU;
+ break;
+ case FIR_CLOCK:
+ cmuclkmsk &= ~(MSKFIR | MSKFFIR);
+ break;
+ case DSIU_CLOCK:
+ if (current_cpu_data.cputype == CPU_VR4111 ||
+ current_cpu_data.cputype == CPU_VR4121) {
+ cmuclkmsk &= ~MSKDSIU;
+ } else {
+ if (cmuclkmsk & MSKSIU)
+ cmuclkmsk &= ~MSKDSIU;
+ else
+ cmuclkmsk &= ~(MSKSIU | MSKDSIU);
+ }
+ break;
+ case CSI_CLOCK:
+ cmuclkmsk &= ~(MSKCSI | MSKSCSI);
+ break;
+ case PCIU_CLOCK:
+ cmuclkmsk &= ~MSKPCIU;
+ break;
+ case HSP_CLOCK:
+ cmuclkmsk &= ~MSKSHSP;
+ break;
+ case PCI_CLOCK:
+ cmuclkmsk &= ~MSKPPCIU;
+ break;
+ case CEU_CLOCK:
+ cmuclkmsk2 &= ~MSKCEU;
+ break;
+ case ETHER0_CLOCK:
+ cmuclkmsk2 &= ~MSKMAC0;
+ break;
+ case ETHER1_CLOCK:
+ cmuclkmsk2 &= ~MSKMAC1;
+ break;
+ default:
+ break;
+ }
+
+ if (clock == CEU_CLOCK || clock == ETHER0_CLOCK ||
+ clock == ETHER1_CLOCK)
+ write_cmuclkmsk2();
+ else
+ write_cmuclkmsk();
}
-void __init vr41xx_cmu_init(u16 mask)
+void __init vr41xx_cmu_init(void)
{
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
- vr41xx_cmu_base = VR4111_CMUCLKMSK;
+ vr41xx_cmu_base = CMUCLKMSK_TYPE1;
break;
case CPU_VR4122:
case CPU_VR4131:
- vr41xx_cmu_base = VR4122_CMUCLKMSK;
+ vr41xx_cmu_base = CMUCLKMSK_TYPE2;
+ break;
+ case CPU_VR4133:
+ vr41xx_cmu_base = CMUCLKMSK_TYPE2;
+ cmuclkmsk2 = read_cmuclkmsk2();
break;
default:
panic("Unexpected CPU of NEC VR4100 series");
break;
}
- cmuclkmsk = mask;
+ cmuclkmsk = read_cmuclkmsk();
}
diff -puN arch/mips/vr41xx/common/giu.c~mips-megapatch arch/mips/vr41xx/common/giu.c
--- 25/arch/mips/vr41xx/common/giu.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/common/giu.c 2004-02-19 12:53:02.000000000 -0800
@@ -34,20 +34,23 @@
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC VR4111, VR4121, VR4122 and VR4131 are supported.
+ *
+ * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * - Added support for NEC VR4133.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/kernel.h>
+#include <linux/smp.h>
#include <linux/types.h>
-#include <asm/addrspace.h>
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/vr41xx/vr41xx.h>
-#define VR4111_GIUIOSELL KSEG1ADDR(0x0b000100)
-#define VR4122_GIUIOSELL KSEG1ADDR(0x0f000140)
+#define GIUIOSELL_TYPE1 KSEG1ADDR(0x0b000100)
+#define GIUIOSELL_TYPE2 KSEG1ADDR(0x0f000140)
#define GIUIOSELL 0x00
#define GIUIOSELH 0x02
@@ -61,15 +64,19 @@
#define GIUINTALSELH 0x16
#define GIUINTHTSELL 0x18
#define GIUINTHTSELH 0x1a
+#define GIUFEDGEINHL 0x20
+#define GIUFEDGEINHH 0x22
+#define GIUREDGEINHL 0x24
+#define GIUREDGEINHH 0x26
-u32 vr41xx_giu_base = 0;
+static uint32_t giu_base;
-#define read_giuint(offset) readw(vr41xx_giu_base + (offset))
-#define write_giuint(val, offset) writew((val), vr41xx_giu_base + (offset))
+#define read_giuint(offset) readw(giu_base + (offset))
+#define write_giuint(val, offset) writew((val), giu_base + (offset))
-static inline u16 set_giuint(u16 offset, u16 set)
+static inline uint16_t set_giuint(uint8_t offset, uint16_t set)
{
- u16 res;
+ uint16_t res;
res = read_giuint(offset);
res |= set;
@@ -78,9 +85,9 @@ static inline u16 set_giuint(u16 offset,
return res;
}
-static inline u16 clear_giuint(u16 offset, u16 clear)
+static inline uint16_t clear_giuint(uint8_t offset, uint16_t clear)
{
- u16 res;
+ uint16_t res;
res = read_giuint(offset);
res &= ~clear;
@@ -92,51 +99,83 @@ static inline u16 clear_giuint(u16 offse
void vr41xx_enable_giuint(int pin)
{
if (pin < 16)
- set_giuint(GIUINTENL, (u16)1 << pin);
+ set_giuint(GIUINTENL, (uint16_t)1 << pin);
else
- set_giuint(GIUINTENH, (u16)1 << (pin - 16));
+ set_giuint(GIUINTENH, (uint16_t)1 << (pin - 16));
}
void vr41xx_disable_giuint(int pin)
{
if (pin < 16)
- clear_giuint(GIUINTENL, (u16)1 << pin);
+ clear_giuint(GIUINTENL, (uint16_t)1 << pin);
else
- clear_giuint(GIUINTENH, (u16)1 << (pin - 16));
+ clear_giuint(GIUINTENH, (uint16_t)1 << (pin - 16));
}
void vr41xx_clear_giuint(int pin)
{
if (pin < 16)
- write_giuint((u16)1 << pin, GIUINTSTATL);
+ write_giuint((uint16_t)1 << pin, GIUINTSTATL);
else
- write_giuint((u16)1 << (pin - 16), GIUINTSTATH);
+ write_giuint((uint16_t)1 << (pin - 16), GIUINTSTATH);
}
void vr41xx_set_irq_trigger(int pin, int trigger, int hold)
{
- u16 mask;
+ uint16_t mask;
if (pin < 16) {
- mask = (u16)1 << pin;
- if (trigger == TRIGGER_EDGE) {
+ mask = (uint16_t)1 << pin;
+ if (trigger != TRIGGER_LEVEL) {
set_giuint(GIUINTTYPL, mask);
if (hold == SIGNAL_HOLD)
set_giuint(GIUINTHTSELL, mask);
else
clear_giuint(GIUINTHTSELL, mask);
+ if (current_cpu_data.cputype == CPU_VR4133) {
+ switch (trigger) {
+ case TRIGGER_EDGE_FALLING:
+ set_giuint(GIUFEDGEINHL, mask);
+ clear_giuint(GIUREDGEINHL, mask);
+ break;
+ case TRIGGER_EDGE_RISING:
+ clear_giuint(GIUFEDGEINHL, mask);
+ set_giuint(GIUREDGEINHL, mask);
+ break;
+ default:
+ set_giuint(GIUFEDGEINHL, mask);
+ set_giuint(GIUREDGEINHL, mask);
+ break;
+ }
+ }
} else {
clear_giuint(GIUINTTYPL, mask);
clear_giuint(GIUINTHTSELL, mask);
}
} else {
- mask = (u16)1 << (pin - 16);
- if (trigger == TRIGGER_EDGE) {
+ mask = (uint16_t)1 << (pin - 16);
+ if (trigger != TRIGGER_LEVEL) {
set_giuint(GIUINTTYPH, mask);
if (hold == SIGNAL_HOLD)
set_giuint(GIUINTHTSELH, mask);
else
clear_giuint(GIUINTHTSELH, mask);
+ if (current_cpu_data.cputype == CPU_VR4133) {
+ switch (trigger) {
+ case TRIGGER_EDGE_FALLING:
+ set_giuint(GIUFEDGEINHH, mask);
+ clear_giuint(GIUREDGEINHH, mask);
+ break;
+ case TRIGGER_EDGE_RISING:
+ clear_giuint(GIUFEDGEINHH, mask);
+ set_giuint(GIUREDGEINHH, mask);
+ break;
+ default:
+ set_giuint(GIUFEDGEINHH, mask);
+ set_giuint(GIUREDGEINHH, mask);
+ break;
+ }
+ }
} else {
clear_giuint(GIUINTTYPH, mask);
clear_giuint(GIUINTHTSELH, mask);
@@ -148,16 +187,16 @@ void vr41xx_set_irq_trigger(int pin, int
void vr41xx_set_irq_level(int pin, int level)
{
- u16 mask;
+ uint16_t mask;
if (pin < 16) {
- mask = (u16)1 << pin;
+ mask = (uint16_t)1 << pin;
if (level == LEVEL_HIGH)
set_giuint(GIUINTALSELL, mask);
else
clear_giuint(GIUINTALSELL, mask);
} else {
- mask = (u16)1 << (pin - 16);
+ mask = (uint16_t)1 << (pin - 16);
if (level == LEVEL_HIGH)
set_giuint(GIUINTALSELH, mask);
else
@@ -198,7 +237,7 @@ int vr41xx_cascade_irq(unsigned int irq,
if(!get_irq_number)
return -EINVAL;
- pin = irq - GIU_IRQ(0);
+ pin = GIU_IRQ_TO_PIN(irq);
giuint_cascade[pin].flag = GIUINT_CASCADE;
giuint_cascade[pin].get_irq_number = get_irq_number;
@@ -219,7 +258,7 @@ unsigned int giuint_do_IRQ(int pin, stru
disable_irq(GIUINT_CASCADE_IRQ);
cascade = &giuint_cascade[pin];
- giuint_irq = pin + GIU_IRQ(0);
+ giuint_irq = GIU_IRQ(pin);
if (cascade->flag == GIUINT_CASCADE) {
cascade_irq = cascade->get_irq_number(giuint_irq);
disable_irq(giuint_irq);
@@ -242,11 +281,12 @@ void __init vr41xx_giuint_init(void)
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
- vr41xx_giu_base = VR4111_GIUIOSELL;
+ giu_base = GIUIOSELL_TYPE1;
break;
case CPU_VR4122:
case CPU_VR4131:
- vr41xx_giu_base = VR4122_GIUIOSELL;
+ case CPU_VR4133:
+ giu_base = GIUIOSELL_TYPE2;
break;
default:
panic("GIU: Unexpected CPU of NEC VR4100 series");
diff -puN arch/mips/vr41xx/common/icu.c~mips-megapatch arch/mips/vr41xx/common/icu.c
--- 25/arch/mips/vr41xx/common/icu.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/common/icu.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,9 +1,9 @@
/*
* FILE NAME
- * arch/mips/vr41xx/vr4122/common/icu.c
+ * arch/mips/vr41xx/common/icu.c
*
* BRIEF MODULE DESCRIPTION
- * Interrupt Control Unit routines for the NEC VR4122 and VR4131.
+ * Interrupt Control Unit routines for the NEC VR4100 series.
*
* Author: Yoichi Yuasa
* yyuasa@mvista.com or source@mvista.com
@@ -33,65 +33,78 @@
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
+ * - New creation, NEC VR4122 and VR4131 are supported.
* - Added support for NEC VR4111 and VR4121.
*
- * Paul Mundt <lethal@chaoticdreams.org>
- * - kgdb support.
- *
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * - New creation, NEC VR4122 and VR4131 are supported.
+ * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * - Coped with INTASSIGN of NEC VR4133.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
+#include <linux/smp.h>
#include <linux/types.h>
-#include <asm/addrspace.h>
#include <asm/cpu.h>
-#include <asm/gdb-stub.h>
#include <asm/io.h>
-#include <asm/mipsregs.h>
+#include <asm/irq.h>
+#include <asm/irq_cpu.h>
#include <asm/vr41xx/vr41xx.h>
extern asmlinkage void vr41xx_handle_interrupt(void);
-extern void __init init_generic_irq(void);
-extern void mips_cpu_irq_init(u32 irq_base);
-
extern void vr41xx_giuint_init(void);
+extern void vr41xx_enable_giuint(int pin);
+extern void vr41xx_disable_giuint(int pin);
+extern void vr41xx_clear_giuint(int pin);
extern unsigned int giuint_do_IRQ(int pin, struct pt_regs *regs);
-static u32 vr41xx_icu1_base = 0;
-static u32 vr41xx_icu2_base = 0;
+static uint32_t icu1_base;
+static uint32_t icu2_base;
-#define VR4111_SYSINT1REG KSEG1ADDR(0x0b000080)
-#define VR4111_SYSINT2REG KSEG1ADDR(0x0b000200)
+static unsigned char sysint1_assign[16] = {
+ 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
+static unsigned char sysint2_assign[16] = {
+ 2, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
-#define VR4122_SYSINT1REG KSEG1ADDR(0x0f000080)
-#define VR4122_SYSINT2REG KSEG1ADDR(0x0f0000a0)
+#define SYSINT1REG_TYPE1 KSEG1ADDR(0x0b000080)
+#define SYSINT2REG_TYPE1 KSEG1ADDR(0x0b000200)
+
+#define SYSINT1REG_TYPE2 KSEG1ADDR(0x0f000080)
+#define SYSINT2REG_TYPE2 KSEG1ADDR(0x0f0000a0)
#define SYSINT1REG 0x00
+#define INTASSIGN0 0x04
+#define INTASSIGN1 0x06
#define GIUINTLREG 0x08
#define MSYSINT1REG 0x0c
#define MGIUINTLREG 0x14
#define NMIREG 0x18
#define SOFTREG 0x1a
+#define INTASSIGN2 0x1c
+#define INTASSIGN3 0x1e
#define SYSINT2REG 0x00
#define GIUINTHREG 0x02
#define MSYSINT2REG 0x06
#define MGIUINTHREG 0x08
-#define read_icu1(offset) readw(vr41xx_icu1_base + (offset))
-#define write_icu1(val, offset) writew((val), vr41xx_icu1_base + (offset))
+#define SYSINT1_IRQ_TO_PIN(x) ((x) - SYSINT1_IRQ_BASE) /* Pin 0-15 */
+#define SYSINT2_IRQ_TO_PIN(x) ((x) - SYSINT2_IRQ_BASE) /* Pin 0-15 */
+
+#define read_icu1(offset) readw(icu1_base + (offset))
+#define write_icu1(val, offset) writew((val), icu1_base + (offset))
-#define read_icu2(offset) readw(vr41xx_icu2_base + (offset))
-#define write_icu2(val, offset) writew((val), vr41xx_icu2_base + (offset))
+#define read_icu2(offset) readw(icu2_base + (offset))
+#define write_icu2(val, offset) writew((val), icu2_base + (offset))
-static inline u16 set_icu1(u16 offset, u16 set)
+#define INTASSIGN_MAX 4
+#define INTASSIGN_MASK 0x0007
+
+static inline uint16_t set_icu1(uint8_t offset, uint16_t set)
{
- u16 res;
+ uint16_t res;
res = read_icu1(offset);
res |= set;
@@ -100,9 +113,9 @@ static inline u16 set_icu1(u16 offset, u
return res;
}
-static inline u16 clear_icu1(u16 offset, u16 clear)
+static inline uint16_t clear_icu1(uint8_t offset, uint16_t clear)
{
- u16 res;
+ uint16_t res;
res = read_icu1(offset);
res &= ~clear;
@@ -111,9 +124,9 @@ static inline u16 clear_icu1(u16 offset,
return res;
}
-static inline u16 set_icu2(u16 offset, u16 set)
+static inline uint16_t set_icu2(uint8_t offset, uint16_t set)
{
- u16 res;
+ uint16_t res;
res = read_icu2(offset);
res |= set;
@@ -122,9 +135,9 @@ static inline u16 set_icu2(u16 offset, u
return res;
}
-static inline u16 clear_icu2(u16 offset, u16 clear)
+static inline uint16_t clear_icu2(uint8_t offset, uint16_t clear)
{
- u16 res;
+ uint16_t res;
res = read_icu2(offset);
res &= ~clear;
@@ -137,17 +150,17 @@ static inline u16 clear_icu2(u16 offset,
static void enable_sysint1_irq(unsigned int irq)
{
- set_icu1(MSYSINT1REG, (u16)1 << (irq - SYSINT1_IRQ_BASE));
+ set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq));
}
static void disable_sysint1_irq(unsigned int irq)
{
- clear_icu1(MSYSINT1REG, (u16)1 << (irq - SYSINT1_IRQ_BASE));
+ clear_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq));
}
static unsigned int startup_sysint1_irq(unsigned int irq)
{
- set_icu1(MSYSINT1REG, (u16)1 << (irq - SYSINT1_IRQ_BASE));
+ set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq));
return 0; /* never anything pending */
}
@@ -158,35 +171,34 @@ static unsigned int startup_sysint1_irq(
static void end_sysint1_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- set_icu1(MSYSINT1REG, (u16)1 << (irq - SYSINT1_IRQ_BASE));
+ set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq));
}
static struct hw_interrupt_type sysint1_irq_type = {
- "SYSINT1",
- startup_sysint1_irq,
- shutdown_sysint1_irq,
- enable_sysint1_irq,
- disable_sysint1_irq,
- ack_sysint1_irq,
- end_sysint1_irq,
- NULL
+ .typename = "SYSINT1",
+ .startup = startup_sysint1_irq,
+ .shutdown = shutdown_sysint1_irq,
+ .enable = enable_sysint1_irq,
+ .disable = disable_sysint1_irq,
+ .ack = ack_sysint1_irq,
+ .end = end_sysint1_irq,
};
/*=======================================================================*/
static void enable_sysint2_irq(unsigned int irq)
{
- set_icu2(MSYSINT2REG, (u16)1 << (irq - SYSINT2_IRQ_BASE));
+ set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq));
}
static void disable_sysint2_irq(unsigned int irq)
{
- clear_icu2(MSYSINT2REG, (u16)1 << (irq - SYSINT2_IRQ_BASE));
+ clear_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq));
}
static unsigned int startup_sysint2_irq(unsigned int irq)
{
- set_icu2(MSYSINT2REG, (u16)1 << (irq - SYSINT2_IRQ_BASE));
+ set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq));
return 0; /* never anything pending */
}
@@ -197,18 +209,17 @@ static unsigned int startup_sysint2_irq(
static void end_sysint2_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- set_icu2(MSYSINT2REG, (u16)1 << (irq - SYSINT2_IRQ_BASE));
+ set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq));
}
static struct hw_interrupt_type sysint2_irq_type = {
- "SYSINT2",
- startup_sysint2_irq,
- shutdown_sysint2_irq,
- enable_sysint2_irq,
- disable_sysint2_irq,
- ack_sysint2_irq,
- end_sysint2_irq,
- NULL
+ .typename = "SYSINT2",
+ .startup = startup_sysint2_irq,
+ .shutdown = shutdown_sysint2_irq,
+ .enable = enable_sysint2_irq,
+ .disable = disable_sysint2_irq,
+ .ack = ack_sysint2_irq,
+ .end = end_sysint2_irq,
};
/*=======================================================================*/
@@ -217,12 +228,11 @@ static void enable_giuint_irq(unsigned i
{
int pin;
- pin = irq - GIU_IRQ_BASE;
+ pin = GIU_IRQ_TO_PIN(irq);
if (pin < 16)
- set_icu1(MGIUINTLREG, (u16)1 << pin);
+ set_icu1(MGIUINTLREG, (uint16_t)1 << pin);
else
- set_icu2(MGIUINTHREG, (u16)1 << (pin - 16));
-
+ set_icu2(MGIUINTHREG, (uint16_t)1 << (pin - 16));
vr41xx_enable_giuint(pin);
}
@@ -230,18 +240,17 @@ static void disable_giuint_irq(unsigned
{
int pin;
- pin = irq - GIU_IRQ_BASE;
+ pin = GIU_IRQ_TO_PIN(irq);
vr41xx_disable_giuint(pin);
-
if (pin < 16)
- clear_icu1(MGIUINTLREG, (u16)1 << pin);
+ clear_icu1(MGIUINTLREG, (uint16_t)1 << pin);
else
- clear_icu2(MGIUINTHREG, (u16)1 << (pin - 16));
+ clear_icu2(MGIUINTHREG, (uint16_t)1 << (pin - 16));
}
static unsigned int startup_giuint_irq(unsigned int irq)
{
- vr41xx_clear_giuint(irq - GIU_IRQ_BASE);
+ vr41xx_clear_giuint(GIU_IRQ_TO_PIN(irq));
enable_giuint_irq(irq);
@@ -254,7 +263,7 @@ static void ack_giuint_irq(unsigned int
{
disable_giuint_irq(irq);
- vr41xx_clear_giuint(irq - GIU_IRQ_BASE);
+ vr41xx_clear_giuint(GIU_IRQ_TO_PIN(irq));
}
static void end_giuint_irq(unsigned int irq)
@@ -264,14 +273,13 @@ static void end_giuint_irq(unsigned int
}
static struct hw_interrupt_type giuint_irq_type = {
- "GIUINT",
- startup_giuint_irq,
- shutdown_giuint_irq,
- enable_giuint_irq,
- disable_giuint_irq,
- ack_giuint_irq,
- end_giuint_irq,
- NULL
+ .typename = "GIUINT",
+ .startup = startup_giuint_irq,
+ .shutdown = shutdown_giuint_irq,
+ .enable = enable_giuint_irq,
+ .disable = disable_giuint_irq,
+ .ack = ack_giuint_irq,
+ .end = end_giuint_irq,
};
/*=======================================================================*/
@@ -285,13 +293,14 @@ static void __init vr41xx_icu_init(void)
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
- vr41xx_icu1_base = VR4111_SYSINT1REG;
- vr41xx_icu2_base = VR4111_SYSINT2REG;
+ icu1_base = SYSINT1REG_TYPE1;
+ icu2_base = SYSINT2REG_TYPE1;
break;
case CPU_VR4122:
case CPU_VR4131:
- vr41xx_icu1_base = VR4122_SYSINT1REG;
- vr41xx_icu2_base = VR4122_SYSINT2REG;
+ case CPU_VR4133:
+ icu1_base = SYSINT1REG_TYPE2;
+ icu2_base = SYSINT2REG_TYPE2;
break;
default:
panic("Unexpected CPU of NEC VR4100 series");
@@ -313,7 +322,11 @@ static void __init vr41xx_icu_init(void)
irq_desc[i].handler = &giuint_irq_type;
}
- setup_irq(ICU_CASCADE_IRQ, &icu_cascade);
+ setup_irq(INT0_CASCADE_IRQ, &icu_cascade);
+ setup_irq(INT1_CASCADE_IRQ, &icu_cascade);
+ setup_irq(INT2_CASCADE_IRQ, &icu_cascade);
+ setup_irq(INT3_CASCADE_IRQ, &icu_cascade);
+ setup_irq(INT4_CASCADE_IRQ, &icu_cascade);
}
void __init init_IRQ(void)
@@ -327,31 +340,171 @@ void __init init_IRQ(void)
vr41xx_giuint_init();
set_except_vector(0, vr41xx_handle_interrupt);
+}
+
+/*=======================================================================*/
+
+static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
+{
+ irq_desc_t *desc = irq_desc + irq;
+ uint16_t intassign0, intassign1;
+ unsigned int pin;
+
+ pin = SYSINT1_IRQ_TO_PIN(irq);
+
+ spin_lock_irq(&desc->lock);
-#ifdef CONFIG_KGDB
- printk("Setting debug traps - please connect the remote debugger.\n");
- set_debug_traps();
- breakpoint();
-#endif
+ intassign0 = read_icu1(INTASSIGN0);
+ intassign1 = read_icu1(INTASSIGN1);
+
+ switch (pin) {
+ case 0:
+ intassign0 &= ~INTASSIGN_MASK;
+ intassign0 |= (uint16_t)assign;
+ break;
+ case 1:
+ intassign0 &= ~(INTASSIGN_MASK << 3);
+ intassign0 |= (uint16_t)assign << 3;
+ break;
+ case 2:
+ intassign0 &= ~(INTASSIGN_MASK << 6);
+ intassign0 |= (uint16_t)assign << 6;
+ break;
+ case 3:
+ intassign0 &= ~(INTASSIGN_MASK << 9);
+ intassign0 |= (uint16_t)assign << 9;
+ break;
+ case 8:
+ intassign0 &= ~(INTASSIGN_MASK << 12);
+ intassign0 |= (uint16_t)assign << 12;
+ break;
+ case 9:
+ intassign1 &= ~INTASSIGN_MASK;
+ intassign1 |= (uint16_t)assign;
+ break;
+ case 11:
+ intassign1 &= ~(INTASSIGN_MASK << 6);
+ intassign1 |= (uint16_t)assign << 6;
+ break;
+ case 12:
+ intassign1 &= ~(INTASSIGN_MASK << 9);
+ intassign1 |= (uint16_t)assign << 9;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ sysint1_assign[pin] = assign;
+ write_icu1(intassign0, INTASSIGN0);
+ write_icu1(intassign1, INTASSIGN1);
+
+ spin_unlock_irq(&desc->lock);
+
+ return 0;
+}
+
+static inline int set_sysint2_assign(unsigned int irq, unsigned char assign)
+{
+ irq_desc_t *desc = irq_desc + irq;
+ uint16_t intassign2, intassign3;
+ unsigned int pin;
+
+ pin = SYSINT2_IRQ_TO_PIN(irq);
+
+ spin_lock_irq(&desc->lock);
+
+ intassign2 = read_icu1(INTASSIGN2);
+ intassign3 = read_icu1(INTASSIGN3);
+
+ switch (pin) {
+ case 0:
+ intassign2 &= ~INTASSIGN_MASK;
+ intassign2 |= (uint16_t)assign;
+ break;
+ case 1:
+ intassign2 &= ~(INTASSIGN_MASK << 3);
+ intassign2 |= (uint16_t)assign << 3;
+ break;
+ case 3:
+ intassign2 &= ~(INTASSIGN_MASK << 6);
+ intassign2 |= (uint16_t)assign << 6;
+ break;
+ case 4:
+ intassign2 &= ~(INTASSIGN_MASK << 9);
+ intassign2 |= (uint16_t)assign << 9;
+ break;
+ case 5:
+ intassign2 &= ~(INTASSIGN_MASK << 12);
+ intassign2 |= (uint16_t)assign << 12;
+ break;
+ case 6:
+ intassign3 &= ~INTASSIGN_MASK;
+ intassign3 |= (uint16_t)assign;
+ break;
+ case 7:
+ intassign3 &= ~(INTASSIGN_MASK << 3);
+ intassign3 |= (uint16_t)assign << 3;
+ break;
+ case 8:
+ intassign3 &= ~(INTASSIGN_MASK << 6);
+ intassign3 |= (uint16_t)assign << 6;
+ break;
+ case 9:
+ intassign3 &= ~(INTASSIGN_MASK << 9);
+ intassign3 |= (uint16_t)assign << 9;
+ break;
+ case 10:
+ intassign3 &= ~(INTASSIGN_MASK << 12);
+ intassign3 |= (uint16_t)assign << 12;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ sysint2_assign[pin] = assign;
+ write_icu1(intassign2, INTASSIGN2);
+ write_icu1(intassign3, INTASSIGN3);
+
+ spin_unlock_irq(&desc->lock);
+
+ return 0;
+}
+
+int vr41xx_set_intassign(unsigned int irq, unsigned char intassign)
+{
+ int retval = -EINVAL;
+
+ if (current_cpu_data.cputype != CPU_VR4133)
+ return -EINVAL;
+
+ if (intassign > INTASSIGN_MAX)
+ return -EINVAL;
+
+ if (irq >= SYSINT1_IRQ_BASE && irq <= SYSINT1_IRQ_LAST)
+ retval = set_sysint1_assign(irq, intassign);
+ else if (irq >= SYSINT2_IRQ_BASE && irq <= SYSINT2_IRQ_LAST)
+ retval = set_sysint2_assign(irq, intassign);
+
+ return retval;
}
/*=======================================================================*/
-static inline void giuint_irqdispatch(u16 pendl, u16 pendh, struct pt_regs *regs)
+static inline void giuint_irq_dispatch(uint16_t pendl, uint16_t pendh,
+ struct pt_regs *regs)
{
int i;
if (pendl) {
for (i = 0; i < 16; i++) {
- if (pendl & (0x0001 << i)) {
+ if (pendl & ((uint16_t)1 << i)) {
giuint_do_IRQ(i, regs);
return;
}
}
- }
- else if (pendh) {
+ } else {
for (i = 0; i < 16; i++) {
- if (pendh & (0x0001 << i)) {
+ if (pendh & ((uint16_t)1 << i)) {
giuint_do_IRQ(i + 16, regs);
return;
}
@@ -359,10 +512,10 @@ static inline void giuint_irqdispatch(u1
}
}
-asmlinkage void icu_irqdispatch(struct pt_regs *regs)
+asmlinkage void irq_dispatch(unsigned char intnum, struct pt_regs *regs)
{
- u16 pend1, pend2, pendl, pendh;
- u16 mask1, mask2, maskl, maskh;
+ uint16_t pend1, pend2, pendl, pendh;
+ uint16_t mask1, mask2, maskl, maskh;
int i;
pend1 = read_icu1(SYSINT1REG);
@@ -377,31 +530,36 @@ asmlinkage void icu_irqdispatch(struct p
pendh = read_icu2(GIUINTHREG);
maskh = read_icu2(MGIUINTHREG);
- pend1 &= mask1;
- pend2 &= mask2;
- pendl &= maskl;
- pendh &= maskh;
-
- if (pend1) {
- if ((pend1 & 0x01ff) == 0x0100) {
- giuint_irqdispatch(pendl, pendh, regs);
- }
- else {
- for (i = 0; i < 16; i++) {
- if (pend1 & (0x0001 << i)) {
- do_IRQ(SYSINT1_IRQ_BASE + i, regs);
- break;
+ mask1 &= pend1;
+ mask2 &= pend2;
+ maskl &= pendl;
+ maskh &= pendh;
+
+ if (mask1) {
+ for (i = 0; i < 16; i++) {
+ if (intnum == sysint1_assign[i] &&
+ (mask1 & ((uint16_t)1 << i))) {
+ if (i == 8 && (maskl | maskh)) {
+ giuint_irq_dispatch(maskl, maskh, regs);
+ return;
+ } else {
+ do_IRQ(SYSINT1_IRQ(i), regs);
+ return;
}
}
}
- return;
}
- else if (pend2) {
+
+ if (mask2) {
for (i = 0; i < 16; i++) {
- if (pend2 & (0x0001 << i)) {
- do_IRQ(SYSINT2_IRQ_BASE + i, regs);
- break;
+ if (intnum == sysint2_assign[i] &&
+ (mask2 & ((uint16_t)1 << i))) {
+ do_IRQ(SYSINT2_IRQ(i), regs);
+ return;
}
}
}
+
+ printk(KERN_ERR "spurious interrupt: %04x,%04x,%04x,%04x\n", pend1, pend2, pendl, pendh);
+ atomic_inc(&irq_err_count);
}
diff -puN arch/mips/vr41xx/common/int-handler.S~mips-megapatch arch/mips/vr41xx/common/int-handler.S
--- 25/arch/mips/vr41xx/common/int-handler.S~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/common/int-handler.S 2004-02-19 12:53:02.000000000 -0800
@@ -34,6 +34,9 @@
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC VR4100 series are supported.
+ *
+ * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * - Coped with INTASSIGN of NEC VR4133.
*/
#include <asm/asm.h>
#include <asm/regdef.h>
@@ -59,55 +62,52 @@
andi t0, 0xff00
and t0, t0, t1
- andi t1, t0, CAUSEF_IP7 # timer interrupt
- beqz t1, 1f
+ andi t1, t0, CAUSEF_IP7 # MIPS timer interrupt
+ bnez t1, handle_irq
li a0, 7
- jal ll_timer_interrupt
- move a1, sp
- j ret_from_irq
-1:
- andi t1, t0, 0x7800 # check for IP3-6
- beqz t1, 2f
+ andi t1, t0, 0x7800 # check for Int1-4
+ beqz t1, 1f
- andi t1, t0, CAUSEF_IP3 # check for IP3
- bnez t1, handle_it
+ andi t1, t0, CAUSEF_IP3 # check for Int1
+ bnez t1, handle_int
+ li a0, 1
+
+ andi t1, t0, CAUSEF_IP4 # check for Int2
+ bnez t1, handle_int
+ li a0, 2
+
+ andi t1, t0, CAUSEF_IP5 # check for Int3
+ bnez t1, handle_int
li a0, 3
- andi t1, t0, CAUSEF_IP4 # check for IP4
- bnez t1, handle_it
+ andi t1, t0, CAUSEF_IP6 # check for Int4
+ bnez t1, handle_int
li a0, 4
- andi t1, t0, CAUSEF_IP5 # check for IP5
- bnez t1, handle_it
- li a0, 5
-
- andi t1, t0, CAUSEF_IP6 # check for IP6
- bnez t1, handle_it
- li a0, 6
-
-2:
- andi t1, t0, CAUSEF_IP2 # check for IP2
- beqz t1, 3f
- move a0, sp
- jal icu_irqdispatch
- nop
- j ret_from_irq
- nop
+1:
+ andi t1, t0, CAUSEF_IP2 # check for Int0
+ bnez t1, handle_int
+ li a0, 0
-3:
andi t1, t0, CAUSEF_IP0 # check for IP0
- bnez t1, handle_it
+ bnez t1, handle_irq
li a0, 0
andi t1, t0, CAUSEF_IP1 # check for IP1
- bnez t1, handle_it
+ bnez t1, handle_irq
li a0, 1
j spurious_interrupt
nop
-handle_it:
+handle_int:
+ jal irq_dispatch
+ move a1, sp
+ j ret_from_irq
+ nop
+
+handle_irq:
jal do_IRQ
move a1, sp
j ret_from_irq
diff -puN /dev/null arch/mips/vr41xx/common/ksyms.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/vr41xx/common/ksyms.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,35 @@
+/*
+ * ksyms.c, Export NEC VR4100 series specific functions needed for loadable modules.
+ *
+ * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+
+#include <asm/vr41xx/vr41xx.h>
+
+EXPORT_SYMBOL(vr41xx_get_vtclock_frequency);
+EXPORT_SYMBOL(vr41xx_get_tclock_frequency);
+
+EXPORT_SYMBOL(vr41xx_set_intassign);
+
+EXPORT_SYMBOL(vr41xx_set_rtclong1_cycle);
+EXPORT_SYMBOL(vr41xx_read_rtclong1_counter);
+EXPORT_SYMBOL(vr41xx_set_rtclong2_cycle);
+EXPORT_SYMBOL(vr41xx_read_rtclong2_counter);
+EXPORT_SYMBOL(vr41xx_set_tclock_cycle);
+EXPORT_SYMBOL(vr41xx_read_tclock_counter);
diff -puN arch/mips/vr41xx/common/Makefile~mips-megapatch arch/mips/vr41xx/common/Makefile
--- 25/arch/mips/vr41xx/common/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/common/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -2,9 +2,9 @@
# Makefile for common code of the NEC VR4100 series.
#
-obj-y += bcu.o cmu.o giu.o icu.o int-handler.o reset.o
+obj-y += bcu.o cmu.o giu.o icu.o int-handler.o ksyms.o pmu.o rtc.o
obj-$(CONFIG_SERIAL_8250) += serial.o
-obj-$(CONFIG_VR41XX_TIME_C) += time.o
+obj-$(CONFIG_VRC4171) += vrc4171.o
obj-$(CONFIG_VRC4173) += vrc4173.o
EXTRA_AFLAGS := $(CFLAGS)
diff -puN /dev/null arch/mips/vr41xx/common/pmu.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/vr41xx/common/pmu.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,76 @@
+/*
+ * pmu.c, Power Management Unit routines for NEC VR4100 series.
+ *
+ * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/init.h>
+#include <linux/smp.h>
+#include <linux/types.h>
+
+#include <asm/cpu.h>
+#include <asm/io.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+
+#define PMUCNT2REG KSEG1ADDR(0x0f0000c6)
+ #define SOFTRST 0x0010
+
+static inline void software_reset(void)
+{
+ uint16_t val;
+
+ switch (current_cpu_data.cputype) {
+ case CPU_VR4122:
+ case CPU_VR4131:
+ case CPU_VR4133:
+ val = readw(PMUCNT2REG);
+ val |= SOFTRST;
+ writew(val, PMUCNT2REG);
+ break;
+ default:
+ break;
+ }
+}
+
+static void vr41xx_restart(char *command)
+{
+ local_irq_disable();
+ software_reset();
+ printk(KERN_NOTICE "\nYou can reset your system\n");
+ while (1) ;
+}
+
+static void vr41xx_halt(void)
+{
+ local_irq_disable();
+ printk(KERN_NOTICE "\nYou can turn off the power supply\n");
+ while (1) ;
+}
+
+static void vr41xx_power_off(void)
+{
+ local_irq_disable();
+ printk(KERN_NOTICE "\nYou can turn off the power supply\n");
+ while (1) ;
+}
+
+void __init vr41xx_pmu_init(void)
+{
+ _machine_restart = vr41xx_restart;
+ _machine_halt = vr41xx_halt;
+ _machine_power_off = vr41xx_power_off;
+}
diff -puN -L arch/mips/vr41xx/common/reset.c arch/mips/vr41xx/common/reset.c~mips-megapatch /dev/null
--- 25/arch/mips/vr41xx/common/reset.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,37 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * Copyright (C) 1997, 2001 Ralf Baechle
- * Copyright 2001 MontaVista Software Inc.
- * Author: jsun@mvista.com or jsun@junsun.net
- */
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <asm/io.h>
-#include <asm/cacheflush.h>
-#include <asm/processor.h>
-#include <asm/reboot.h>
-#include <asm/system.h>
-
-void vr41xx_restart(char *command)
-{
- change_c0_status((ST0_BEV | ST0_ERL), (ST0_BEV | ST0_ERL));
- change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
- flush_cache_all();
- write_c0_wired(0);
- __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
-}
-
-void vr41xx_halt(void)
-{
- printk(KERN_NOTICE "\n** You can safely turn off the power\n");
- while (1);
-}
-
-void vr41xx_power_off(void)
-{
- vr41xx_halt();
-}
diff -puN /dev/null arch/mips/vr41xx/common/rtc.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/vr41xx/common/rtc.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,311 @@
+/*
+ * rtc.c, RTC(has only timer function) routines for NEC VR4100 series.
+ *
+ * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/smp.h>
+#include <linux/types.h>
+
+#include <asm/io.h>
+#include <asm/time.h>
+#include <asm/vr41xx/vr41xx.h>
+
+static uint32_t rtc1_base;
+static uint32_t rtc2_base;
+
+static uint64_t previous_elapsedtime;
+static unsigned int remainder_per_sec;
+static unsigned int cycles_per_sec;
+static unsigned int cycles_per_jiffy;
+static unsigned long epoch_time;
+
+#define CYCLES_PER_JIFFY (CLOCK_TICK_RATE / HZ)
+#define REMAINDER_PER_SEC (CLOCK_TICK_RATE - (CYCLES_PER_JIFFY * HZ))
+#define CYCLES_PER_100USEC ((CLOCK_TICK_RATE + (10000 / 2)) / 10000)
+
+#define ETIMELREG_TYPE1 KSEG1ADDR(0x0b0000c0)
+#define TCLKLREG_TYPE1 KSEG1ADDR(0x0b0001c0)
+
+#define ETIMELREG_TYPE2 KSEG1ADDR(0x0f000100)
+#define TCLKLREG_TYPE2 KSEG1ADDR(0x0f000120)
+
+/* RTC 1 registers */
+#define ETIMELREG 0x00
+#define ETIMEMREG 0x02
+#define ETIMEHREG 0x04
+/* RFU */
+#define ECMPLREG 0x08
+#define ECMPMREG 0x0a
+#define ECMPHREG 0x0c
+/* RFU */
+#define RTCL1LREG 0x10
+#define RTCL1HREG 0x12
+#define RTCL1CNTLREG 0x14
+#define RTCL1CNTHREG 0x16
+#define RTCL2LREG 0x18
+#define RTCL2HREG 0x1a
+#define RTCL2CNTLREG 0x1c
+#define RTCL2CNTHREG 0x1e
+
+/* RTC 2 registers */
+#define TCLKLREG 0x00
+#define TCLKHREG 0x02
+#define TCLKCNTLREG 0x04
+#define TCLKCNTHREG 0x06
+/* RFU */
+#define RTCINTREG 0x1e
+ #define TCLOCK_INT 0x08
+ #define RTCLONG2_INT 0x04
+ #define RTCLONG1_INT 0x02
+ #define ELAPSEDTIME_INT 0x01
+
+#define read_rtc1(offset) readw(rtc1_base + (offset))
+#define write_rtc1(val, offset) writew((val), rtc1_base + (offset))
+
+#define read_rtc2(offset) readw(rtc2_base + (offset))
+#define write_rtc2(val, offset) writew((val), rtc2_base + (offset))
+
+static inline uint64_t read_elapsedtime_counter(void)
+{
+ uint64_t first, second;
+ uint32_t first_mid, first_low;
+ uint32_t second_mid, second_low;
+
+ do {
+ first_low = (uint32_t)read_rtc1(ETIMELREG);
+ first_mid = (uint32_t)read_rtc1(ETIMEMREG);
+ first = (uint64_t)read_rtc1(ETIMEHREG);
+ second_low = (uint32_t)read_rtc1(ETIMELREG);
+ second_mid = (uint32_t)read_rtc1(ETIMEMREG);
+ second = (uint64_t)read_rtc1(ETIMEHREG);
+ } while (first_low != second_low || first_mid != second_mid ||
+ first != second);
+
+ return (first << 32) | (uint64_t)((first_mid << 16) | first_low);
+}
+
+static inline void write_elapsedtime_counter(uint64_t time)
+{
+ write_rtc1((uint16_t)time, ETIMELREG);
+ write_rtc1((uint16_t)(time >> 16), ETIMEMREG);
+ write_rtc1((uint16_t)(time >> 32), ETIMEHREG);
+}
+
+static inline void write_elapsedtime_compare(uint64_t time)
+{
+ write_rtc1((uint16_t)time, ECMPLREG);
+ write_rtc1((uint16_t)(time >> 16), ECMPMREG);
+ write_rtc1((uint16_t)(time >> 32), ECMPHREG);
+}
+
+void vr41xx_set_rtclong1_cycle(uint32_t cycles)
+{
+ write_rtc1((uint16_t)cycles, RTCL1LREG);
+ write_rtc1((uint16_t)(cycles >> 16), RTCL1HREG);
+}
+
+uint32_t vr41xx_read_rtclong1_counter(void)
+{
+ uint32_t first_high, first_low;
+ uint32_t second_high, second_low;
+
+ do {
+ first_low = (uint32_t)read_rtc1(RTCL1CNTLREG);
+ first_high = (uint32_t)read_rtc1(RTCL1CNTHREG);
+ second_low = (uint32_t)read_rtc1(RTCL1CNTLREG);
+ second_high = (uint32_t)read_rtc1(RTCL1CNTHREG);
+ } while (first_low != second_low || first_high != second_high);
+
+ return (first_high << 16) | first_low;
+}
+
+void vr41xx_set_rtclong2_cycle(uint32_t cycles)
+{
+ write_rtc1((uint16_t)cycles, RTCL2LREG);
+ write_rtc1((uint16_t)(cycles >> 16), RTCL2HREG);
+}
+
+uint32_t vr41xx_read_rtclong2_counter(void)
+{
+ uint32_t first_high, first_low;
+ uint32_t second_high, second_low;
+
+ do {
+ first_low = (uint32_t)read_rtc1(RTCL2CNTLREG);
+ first_high = (uint32_t)read_rtc1(RTCL2CNTHREG);
+ second_low = (uint32_t)read_rtc1(RTCL2CNTLREG);
+ second_high = (uint32_t)read_rtc1(RTCL2CNTHREG);
+ } while (first_low != second_low || first_high != second_high);
+
+ return (first_high << 16) | first_low;
+}
+
+void vr41xx_set_tclock_cycle(uint32_t cycles)
+{
+ write_rtc2((uint16_t)cycles, TCLKLREG);
+ write_rtc2((uint16_t)(cycles >> 16), TCLKHREG);
+}
+
+uint32_t vr41xx_read_tclock_counter(void)
+{
+ uint32_t first_high, first_low;
+ uint32_t second_high, second_low;
+
+ do {
+ first_low = (uint32_t)read_rtc2(TCLKCNTLREG);
+ first_high = (uint32_t)read_rtc2(TCLKCNTHREG);
+ second_low = (uint32_t)read_rtc2(TCLKCNTLREG);
+ second_high = (uint32_t)read_rtc2(TCLKCNTHREG);
+ } while (first_low != second_low || first_high != second_high);
+
+ return (first_high << 16) | first_low;
+}
+
+static void vr41xx_timer_ack(void)
+{
+ uint64_t cur;
+
+ write_rtc2(ELAPSEDTIME_INT, RTCINTREG);
+
+ previous_elapsedtime += (uint64_t)cycles_per_jiffy;
+ cycles_per_sec += cycles_per_jiffy;
+
+ if (cycles_per_sec >= CLOCK_TICK_RATE) {
+ cycles_per_sec = 0;
+ remainder_per_sec = REMAINDER_PER_SEC;
+ }
+
+ cycles_per_jiffy = 0;
+
+ do {
+ cycles_per_jiffy += CYCLES_PER_JIFFY;
+ if (remainder_per_sec > 0) {
+ cycles_per_jiffy++;
+ remainder_per_sec--;
+ }
+
+ cur = read_elapsedtime_counter();
+ } while (cur >= previous_elapsedtime + (uint64_t)cycles_per_jiffy);
+
+ write_elapsedtime_compare(previous_elapsedtime + (uint64_t)cycles_per_jiffy);
+}
+
+static void vr41xx_hpt_init(unsigned int count)
+{
+}
+
+static unsigned int vr41xx_hpt_read(void)
+{
+ uint64_t cur;
+
+ cur = read_elapsedtime_counter();
+
+ return (unsigned int)cur;
+}
+
+static unsigned long vr41xx_gettimeoffset(void)
+{
+ uint64_t cur;
+ unsigned long gap;
+
+ cur = read_elapsedtime_counter();
+ gap = (unsigned long)(cur - previous_elapsedtime);
+ gap = gap / CYCLES_PER_100USEC * 100; /* usec */
+
+ return gap;
+}
+
+static unsigned long vr41xx_get_time(void)
+{
+ uint64_t counts;
+
+ counts = read_elapsedtime_counter();
+ counts >>= 15;
+
+ return epoch_time + (unsigned long)counts;
+
+}
+
+static int vr41xx_set_time(unsigned long sec)
+{
+ if (sec < epoch_time)
+ return -EINVAL;
+
+ sec -= epoch_time;
+
+ write_elapsedtime_counter((uint64_t)sec << 15);
+
+ return 0;
+}
+
+void vr41xx_set_epoch_time(unsigned long time)
+{
+ epoch_time = time;
+}
+
+void __init vr41xx_time_init(void)
+{
+ switch (current_cpu_data.cputype) {
+ case CPU_VR4111:
+ case CPU_VR4121:
+ rtc1_base = ETIMELREG_TYPE1;
+ rtc2_base = TCLKLREG_TYPE1;
+ break;
+ case CPU_VR4122:
+ case CPU_VR4131:
+ case CPU_VR4133:
+ rtc1_base = ETIMELREG_TYPE2;
+ rtc2_base = TCLKLREG_TYPE2;
+ break;
+ default:
+ panic("Unexpected CPU of NEC VR4100 series");
+ break;
+ }
+
+ mips_timer_ack = vr41xx_timer_ack;
+
+ mips_hpt_init = vr41xx_hpt_init;
+ mips_hpt_read = vr41xx_hpt_read;
+ mips_hpt_frequency = CLOCK_TICK_RATE;
+
+ if (epoch_time == 0)
+ epoch_time = mktime(1970, 1, 1, 0, 0, 0);
+
+ rtc_get_time = vr41xx_get_time;
+ rtc_set_time = vr41xx_set_time;
+}
+
+void __init vr41xx_timer_setup(struct irqaction *irq)
+{
+ do_gettimeoffset = vr41xx_gettimeoffset;
+
+ remainder_per_sec = REMAINDER_PER_SEC;
+ cycles_per_jiffy = CYCLES_PER_JIFFY;
+
+ if (remainder_per_sec > 0) {
+ cycles_per_jiffy++;
+ remainder_per_sec--;
+ }
+
+ previous_elapsedtime = read_elapsedtime_counter();
+ write_elapsedtime_compare(previous_elapsedtime + (uint64_t)cycles_per_jiffy);
+ write_rtc2(ELAPSEDTIME_INT, RTCINTREG);
+
+ setup_irq(ELAPSEDTIME_IRQ, irq);
+}
diff -puN arch/mips/vr41xx/common/serial.c~mips-megapatch arch/mips/vr41xx/common/serial.c
--- 25/arch/mips/vr41xx/common/serial.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/common/serial.c 2004-02-19 12:53:02.000000000 -0800
@@ -33,14 +33,16 @@
/*
* Changes:
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
+ * - New creation, NEC VR4122 and VR4131 are supported.
* - Added support for NEC VR4111 and VR4121.
*
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * - New creation, NEC VR4122 and VR4131 are supported.
+ * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * - Added support for NEC VR4133.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/serial.h>
+#include <linux/smp.h>
#include <asm/addrspace.h>
#include <asm/cpu.h>
@@ -48,12 +50,12 @@
#include <asm/vr41xx/vr41xx.h>
/* VR4111 and VR4121 SIU Registers */
-#define VR4111_SIURB KSEG1ADDR(0x0c000000)
-#define VR4111_SIUIRSEL KSEG1ADDR(0x0c000008)
+#define SIURB_TYPE1 KSEG1ADDR(0x0c000000)
+#define SIUIRSEL_TYPE1 KSEG1ADDR(0x0c000008)
-/* VR4122 and VR4131 SIU Registers */
-#define VR4122_SIURB KSEG1ADDR(0x0f000800)
-#define VR4122_SIUIRSEL KSEG1ADDR(0x0f000808)
+/* VR4122, VR4131 and VR4133 SIU Registers */
+#define SIURB_TYPE2 KSEG1ADDR(0x0f000800)
+#define SIUIRSEL_TYPE2 KSEG1ADDR(0x0f000808)
#define USE_RS232C 0x00
#define USE_IRDA 0x01
@@ -66,7 +68,6 @@
#define TMICMODE 0x20
#define SIU_BASE_BAUD 1152000
-#define SIU_CLOCK 0x0102
/* VR4122 and VR4131 DSIU Registers */
#define DSIURB KSEG1ADDR(0x0f000820)
@@ -75,7 +76,6 @@
#define INTDSIU 0x0800
#define DSIU_BASE_BAUD 1152000
-#define DSIU_CLOCK 0x0802
int vr41xx_serial_ports = 0;
@@ -102,11 +102,12 @@ void vr41xx_siu_ifselect(int interface,
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
- writew(val, VR4111_SIUIRSEL);
+ writew(val, SIUIRSEL_TYPE1);
break;
case CPU_VR4122:
case CPU_VR4131:
- writew(val, VR4122_SIUIRSEL);
+ case CPU_VR4133:
+ writew(val, SIUIRSEL_TYPE2);
break;
default:
printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
@@ -129,11 +130,12 @@ void __init vr41xx_siu_init(int interfac
switch (current_cpu_data.cputype) {
case CPU_VR4111:
case CPU_VR4121:
- s.iomem_base = (unsigned char *)VR4111_SIURB;
+ s.iomem_base = (unsigned char *)SIURB_TYPE1;
break;
case CPU_VR4122:
case CPU_VR4131:
- s.iomem_base = (unsigned char *)VR4122_SIURB;
+ case CPU_VR4133:
+ s.iomem_base = (unsigned char *)SIURB_TYPE2;
break;
default:
panic("Unexpected CPU of NEC VR4100 series");
@@ -154,7 +156,8 @@ void __init vr41xx_dsiu_init(void)
struct serial_struct s;
if (current_cpu_data.cputype != CPU_VR4122 &&
- current_cpu_data.cputype != CPU_VR4131)
+ current_cpu_data.cputype != CPU_VR4131 &&
+ current_cpu_data.cputype != CPU_VR4133)
return;
memset(&s, 0, sizeof(s));
diff -puN -L arch/mips/vr41xx/common/time.c arch/mips/vr41xx/common/time.c~mips-megapatch /dev/null
--- 25/arch/mips/vr41xx/common/time.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,93 +0,0 @@
-/*
- * FILE NAME
- * arch/mips/vr41xx/common/time.c
- *
- * BRIEF MODULE DESCRIPTION
- * Timer routines for the NEC VR4100 series.
- *
- * Author: Yoichi Yuasa
- * yyuasa@mvista.com or source@mvista.com
- *
- * Copyright 2001,2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-/*
- * Changes:
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * - Added support for NEC VR4100 series RTC Unit.
- *
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * - New creation, NEC VR4100 series are supported.
- */
-#include <linux/config.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-
-#include <asm/cpu.h>
-#include <asm/io.h>
-#include <asm/mipsregs.h>
-#include <asm/param.h>
-#include <asm/time.h>
-#include <asm/vr41xx/vr41xx.h>
-
-#define VR4111_ETIMELREG KSEG1ADDR(0x0b0000c0)
-#define VR4122_ETIMELREG KSEG1ADDR(0x0f000100)
-
-u32 vr41xx_rtc_base = 0;
-
-#ifdef CONFIG_VR41XX_RTC
-extern unsigned long vr41xx_rtc_get_time(void);
-extern int vr41xx_rtc_set_time(unsigned long sec);
-#endif
-
-void vr41xx_time_init(void)
-{
- switch (current_cpu_data.cputype) {
- case CPU_VR4111:
- case CPU_VR4121:
- vr41xx_rtc_base = VR4111_ETIMELREG;
- break;
- case CPU_VR4122:
- case CPU_VR4131:
- vr41xx_rtc_base = VR4122_ETIMELREG;
- break;
- default:
- panic("Unexpected CPU of NEC VR4100 series");
- break;
- }
-
-#ifdef CONFIG_VR41XX_RTC
- rtc_get_time = vr41xx_rtc_get_time;
- rtc_set_time = vr41xx_rtc_set_time;
-#endif
-}
-
-void vr41xx_timer_setup(struct irqaction *irq)
-{
- u32 count;
-
- setup_irq(MIPS_COUNTER_IRQ, irq);
-
- count = read_c0_count();
- write_c0_compare(count + (mips_counter_frequency / HZ));
-}
diff -puN /dev/null arch/mips/vr41xx/common/vrc4171.c
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/arch/mips/vr41xx/common/vrc4171.c 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,106 @@
+/*
+ * vrc4171.c, NEC VRC4171 base driver.
+ *
+ * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/types.h>
+
+#include <asm/io.h>
+#include <asm/vr41xx/vrc4171.h>
+
+MODULE_DESCRIPTION("NEC VRC4171 base driver");
+MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
+MODULE_LICENSE("GPL");
+
+EXPORT_SYMBOL_GPL(vrc4171_get_irq_status);
+EXPORT_SYMBOL_GPL(vrc4171_set_multifunction_pin);
+
+#define CONFIGURATION1 0x05fe
+ #define SLOTB_CONFIG 0xc000
+ #define SLOTB_NONE 0x0000
+ #define SLOTB_PCCARD 0x4000
+ #define SLOTB_CF 0x8000
+ #define SLOTB_FLASHROM 0xc000
+
+#define CONFIGURATION2 0x05fc
+#define INTERRUPT_STATUS 0x05fa
+#define PCS_CONTROL 0x05ee
+#define GPIO_DATA PCS_CONTROL
+#define PCS0_UPPER_START 0x05ec
+#define PCS0_LOWER_START 0x05ea
+#define PCS0_UPPER_STOP 0x05e8
+#define PCS0_LOWER_STOP 0x05e6
+#define PCS1_UPPER_START 0x05e4
+#define PCS1_LOWER_START 0x05e2
+#define PCS1_UPPER_STOP 0x05de
+#define PCS1_LOWER_STOP 0x05dc
+
+#define VRC4171_REGS_BASE PCS1_LOWER_STOP
+#define VRC4171_REGS_SIZE 0x24
+
+uint16_t vrc4171_get_irq_status(void)
+{
+ return inw(INTERRUPT_STATUS);
+}
+
+void vrc4171_set_multifunction_pin(int config)
+{
+ uint16_t config1;
+
+ config1 = inw(CONFIGURATION1);
+ config1 &= ~SLOTB_CONFIG;
+
+ switch (config) {
+ case SLOTB_IS_NONE:
+ config1 |= SLOTB_NONE;
+ break;
+ case SLOTB_IS_PCCARD:
+ config1 |= SLOTB_PCCARD;
+ break;
+ case SLOTB_IS_CF:
+ config1 |= SLOTB_CF;
+ break;
+ case SLOTB_IS_FLASHROM:
+ config1 |= SLOTB_FLASHROM;
+ break;
+ default:
+ break;
+ }
+
+ outw(config1, CONFIGURATION1);
+}
+
+static int __devinit vrc4171_init(void)
+{
+ if (request_region(VRC4171_REGS_BASE, VRC4171_REGS_SIZE, "NEC VRC4171") == NULL)
+ return -EBUSY;
+
+ printk(KERN_INFO "NEC VRC4171 base driver\n");
+
+ return 0;
+}
+
+static void __devexit vrc4171_exit(void)
+{
+ release_region(VRC4171_REGS_BASE, VRC4171_REGS_SIZE);
+}
+
+module_init(vrc4171_init);
+module_exit(vrc4171_exit);
diff -puN arch/mips/vr41xx/common/vrc4173.c~mips-megapatch arch/mips/vr41xx/common/vrc4173.c
--- 25/arch/mips/vr41xx/common/vrc4173.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/common/vrc4173.c 2004-02-19 12:53:02.000000000 -0800
@@ -30,7 +30,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
@@ -195,8 +194,8 @@ static inline void vrc4173_icu_init(int
vrc4173_outw(0, VRC4173_MSYSINT1REG);
- vr41xx_set_irq_trigger(cascade_irq - GIU_IRQ(0), TRIGGER_LEVEL, SIGNAL_THROUGH);
- vr41xx_set_irq_level(cascade_irq - GIU_IRQ(0), LEVEL_LOW);
+ vr41xx_set_irq_trigger(GIU_IRQ_TO_PIN(cascade_irq), TRIGGER_LEVEL, SIGNAL_THROUGH);
+ vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW);
for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++)
irq_desc[i].handler = &vrc4173_irq_type;
diff -puN -L arch/mips/vr41xx/ibm-workpad/ide-workpad.c arch/mips/vr41xx/ibm-workpad/ide-workpad.c~mips-megapatch /dev/null
--- 25/arch/mips/vr41xx/ibm-workpad/ide-workpad.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,98 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * IDE routines for typical pc-like standard configurations for the IBM WorkPad z50.
- *
- * Copyright (C) 1998, 1999, 2001 by Ralf Baechle
- */
-/*
- * Changes:
- * Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Sun, 24 Feb 2002
- * - Added IBM WorkPad z50 support.
- */
-#include <linux/sched.h>
-#include <linux/ide.h>
-#include <linux/ioport.h>
-#include <linux/hdreg.h>
-#include <asm/ptrace.h>
-#include <asm/hdreg.h>
-
-static int workpad_ide_default_irq(ide_ioreg_t base)
-{
- return 49;
-}
-
-static ide_ioreg_t workpad_ide_default_io_base(int index)
-{
- switch (index) {
- case 0: return 0x1f0;
- case 1: return 0x170;
- case 2: return 0x1e8;
- case 3: return 0x168;
- case 4: return 0x1e0;
- case 5: return 0x160;
- }
- return 0;
-}
-
-static void workpad_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq)
-{
- ide_ioreg_t reg = data_port;
- int i;
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- if (ctrl_port) {
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- } else {
- hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
- }
- if (irq != NULL)
- *irq = 0;
- hw->io_ports[IDE_IRQ_OFFSET] = 0;
-}
-
-static int workpad_ide_request_irq(unsigned int irq,
- void (*handler)(int,void *, struct pt_regs *),
- unsigned long flags, const char *device,
- void *dev_id)
-{
- return request_irq(irq, handler, SA_SHIRQ, device, dev_id);
-}
-
-static void workpad_ide_free_irq(unsigned int irq, void *dev_id)
-{
- free_irq(irq, dev_id);
-}
-
-static int workpad_ide_check_region(ide_ioreg_t from, unsigned int extent)
-{
- return check_region(from, extent);
-}
-
-static void workpad_ide_request_region(ide_ioreg_t from, unsigned int extent,
- const char *name)
-{
- request_region(from, extent, name);
-}
-
-static void workpad_ide_release_region(ide_ioreg_t from, unsigned int extent)
-{
- release_region(from, extent);
-}
-
-struct ide_ops workpad_ide_ops = {
- &workpad_ide_default_irq,
- &workpad_ide_default_io_base,
- &workpad_ide_init_hwif_ports,
- &workpad_ide_request_irq,
- &workpad_ide_free_irq,
- &workpad_ide_check_region,
- &workpad_ide_request_region,
- &workpad_ide_release_region
-};
diff -puN arch/mips/vr41xx/ibm-workpad/init.c~mips-megapatch arch/mips/vr41xx/ibm-workpad/init.c
--- 25/arch/mips/vr41xx/ibm-workpad/init.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/ibm-workpad/init.c 2004-02-19 12:53:02.000000000 -0800
@@ -13,22 +13,21 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
-char arcs_cmdline[CL_SIZE];
-
const char *get_system_type(void)
{
return "IBM WorkPad z50";
}
-void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
+void __init prom_init(void)
{
+ int argc = fw_arg0;
+ char **argv = (char **) fw_arg1;
int i;
/*
@@ -44,6 +43,7 @@ void __init prom_init(int argc, char **a
mips_machtype = MACH_IBM_WORKPAD;
}
-void __init prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/vr41xx/ibm-workpad/Makefile~mips-megapatch arch/mips/vr41xx/ibm-workpad/Makefile
--- 25/arch/mips/vr41xx/ibm-workpad/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/ibm-workpad/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -3,4 +3,3 @@
#
obj-y += init.o setup.o
-obj-$(CONFIG_IDE) += ide-workpad.o
diff -puN arch/mips/vr41xx/ibm-workpad/setup.c~mips-megapatch arch/mips/vr41xx/ibm-workpad/setup.c
--- 25/arch/mips/vr41xx/ibm-workpad/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/ibm-workpad/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,28 +1,29 @@
/*
- * FILE NAME
- * arch/mips/vr41xx/workpad/setup.c
+ * setup.c, Setup for the IBM WorkPad z50.
*
- * BRIEF MODULE DESCRIPTION
- * Setup for the IBM WorkPad z50.
+ * Copyright (C) 2002-2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
*
- * Copyright 2002 Yoichi Yuasa
- * yuasa@hh.iij4u.or.jp
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
-#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/workpad.h>
@@ -31,11 +32,7 @@ extern unsigned long initrd_start, initr
extern void * __rd_start, * __rd_end;
#endif
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops workpad_ide_ops;
-#endif
-
-void __init ibm_workpad_setup(void)
+static void __init ibm_workpad_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
@@ -49,26 +46,18 @@ void __init ibm_workpad_setup(void)
initrd_end = (unsigned long)&__rd_end;
#endif
- _machine_restart = vr41xx_restart;
- _machine_halt = vr41xx_halt;
- _machine_power_off = vr41xx_power_off;
-
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &workpad_ide_ops;
-#endif
-
vr41xx_bcu_init();
- vr41xx_cmu_init(0);
+ vr41xx_cmu_init();
+
+ vr41xx_pmu_init();
#ifdef CONFIG_SERIAL_8250
vr41xx_siu_init(SIU_RS232C, 0);
#endif
}
+
+early_initcall(ibm_workpad_setup);
diff -puN -L arch/mips/vr41xx/nec-eagle/ide-eagle.c arch/mips/vr41xx/nec-eagle/ide-eagle.c~mips-megapatch /dev/null
--- 25/arch/mips/vr41xx/nec-eagle/ide-eagle.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,96 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * IDE routines for typical pc-like standard configurations
- * for the NEC Eagle/Hawk board.
- *
- * Copyright (C) 1998, 1999, 2001 by Ralf Baechle
- */
-/*
- * Changes:
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * Fri, 5 Apr 2002
- * - Added support for NEC Hawk.
- *
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * Fri, 1 Mar 2002
- * - Added support for NEC Eagle.
- */
-#include <linux/sched.h>
-#include <linux/ide.h>
-#include <linux/ioport.h>
-#include <linux/hdreg.h>
-#include <asm/ptrace.h>
-#include <asm/hdreg.h>
-
-static int eagle_ide_default_irq(ide_ioreg_t base)
-{
- return 0;
-}
-
-static ide_ioreg_t eagle_ide_default_io_base(int index)
-{
- return 0;
-}
-
-static void eagle_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq)
-{
- ide_ioreg_t reg = data_port;
- int i;
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- if (ctrl_port) {
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- } else {
- hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
- }
- if (irq != NULL)
- *irq = 0;
- hw->io_ports[IDE_IRQ_OFFSET] = 0;
-}
-
-static int eagle_ide_request_irq(unsigned int irq,
- void (*handler)(int,void *, struct pt_regs *),
- unsigned long flags, const char *device,
- void *dev_id)
-{
- return request_irq(irq, handler, SA_SHIRQ, device, dev_id);
-}
-
-static void eagle_ide_free_irq(unsigned int irq, void *dev_id)
-{
- free_irq(irq, dev_id);
-}
-
-static int eagle_ide_check_region(ide_ioreg_t from, unsigned int extent)
-{
- return check_region(from, extent);
-}
-
-static void eagle_ide_request_region(ide_ioreg_t from, unsigned int extent,
- const char *name)
-{
- request_region(from, extent, name);
-}
-
-static void eagle_ide_release_region(ide_ioreg_t from, unsigned int extent)
-{
- release_region(from, extent);
-}
-
-struct ide_ops eagle_ide_ops = {
- &eagle_ide_default_irq,
- &eagle_ide_default_io_base,
- &eagle_ide_init_hwif_ports,
- &eagle_ide_request_irq,
- &eagle_ide_free_irq,
- &eagle_ide_check_region,
- &eagle_ide_request_region,
- &eagle_ide_release_region
-};
diff -puN arch/mips/vr41xx/nec-eagle/init.c~mips-megapatch arch/mips/vr41xx/nec-eagle/init.c
--- 25/arch/mips/vr41xx/nec-eagle/init.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/nec-eagle/init.c 2004-02-19 12:53:02.000000000 -0800
@@ -38,22 +38,21 @@
* MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
* - New creation, NEC Eagle is supported.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
-char arcs_cmdline[CL_SIZE];
-
const char *get_system_type(void)
{
return "NEC Eagle/Hawk";
}
-void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
+void __init prom_init(void)
{
+ int argc = fw_arg0;
+ char **argv = (char **) fw_arg1;
int i;
/*
@@ -69,6 +68,7 @@ void __init prom_init(int argc, char **a
mips_machtype = MACH_NEC_EAGLE;
}
-void __init prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/vr41xx/nec-eagle/Makefile~mips-megapatch arch/mips/vr41xx/nec-eagle/Makefile
--- 25/arch/mips/vr41xx/nec-eagle/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/nec-eagle/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -8,4 +8,3 @@
#
obj-y += init.o irq.o setup.o
-obj-$(CONFIG_IDE) += ide-eagle.o
diff -puN arch/mips/vr41xx/nec-eagle/setup.c~mips-megapatch arch/mips/vr41xx/nec-eagle/setup.c
--- 25/arch/mips/vr41xx/nec-eagle/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/nec-eagle/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,55 +1,23 @@
/*
- * FILE NAME
- * arch/mips/vr41xx/nec-eagle/setup.c
+ * arch/mips/vr41xx/nec-eagle/setup.c
*
- * BRIEF MODULE DESCRIPTION
- * Setup for the NEC Eagle/Hawk board.
+ * Setup for the NEC Eagle/Hawk board.
*
- * Author: Yoichi Yuasa
- * yyuasa@mvista.com or source@mvista.com
+ * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
*
- * Copyright 2001,2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-/*
- * Changes:
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * - Moved mips_pci_channels[] from arch/mips/vr41xx/vr4122/eagle/setup.c.
- * - Added support for NEC Hawk.
- *
- * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
- * - New creation, NEC Eagle is supported.
+ * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
*/
#include <linux/config.h>
#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
#include <asm/pci_channel.h>
-#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/eagle.h>
@@ -58,10 +26,6 @@ extern unsigned long initrd_start, initr
extern void * __rd_start, * __rd_end;
#endif
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops eagle_ide_ops;
-#endif
-
extern void eagle_irq_init(void);
#ifdef CONFIG_PCI
@@ -84,9 +48,10 @@ static struct resource vr41xx_pci_mem_re
extern struct pci_ops vr41xx_pci_ops;
-struct pci_channel mips_pci_channels[] = {
- {&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256},
- {NULL, NULL, NULL, 0, 0}
+struct pci_controller vr41xx_controller = {
+ .pci_ops = &vr41xx_pci_ops,
+ .io_resource = &vr41xx_pci_io_resource,
+ .mem_resource = &vr41xx_pci_mem_resource,
};
struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
@@ -114,7 +79,7 @@ static struct vr41xx_pci_address_map pci
};
#endif
-void __init nec_eagle_setup(void)
+static int nec_eagle_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
@@ -128,26 +93,16 @@ void __init nec_eagle_setup(void)
initrd_end = (unsigned long)&__rd_end;
#endif
- _machine_restart = vr41xx_restart;
- _machine_halt = vr41xx_halt;
- _machine_power_off = vr41xx_power_off;
-
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
board_irq_init = eagle_irq_init;
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &eagle_ide_ops;
-#endif
-
vr41xx_bcu_init();
- vr41xx_cmu_init(0);
+ vr41xx_cmu_init();
+
+ vr41xx_pmu_init();
#ifdef CONFIG_SERIAL_8250
vr41xx_dsiu_init();
@@ -159,4 +114,8 @@ void __init nec_eagle_setup(void)
vrc4173_preinit();
#endif
+
+ return 0;
}
+
+early_initcall(nec_eagle_setup);
diff -puN arch/mips/vr41xx/tanbac-tb0226/init.c~mips-megapatch arch/mips/vr41xx/tanbac-tb0226/init.c
--- 25/arch/mips/vr41xx/tanbac-tb0226/init.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/tanbac-tb0226/init.c 2004-02-19 12:53:02.000000000 -0800
@@ -13,9 +13,9 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
+#include <linux/smp.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
@@ -23,16 +23,15 @@
#include <asm/mipsregs.h>
#include <asm/vr41xx/vr41xx.h>
-char arcs_cmdline[CL_SIZE];
-
const char *get_system_type(void)
{
return "TANBAC TB0226";
}
-void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
+void __init prom_init(void)
{
- u32 config;
+ int argc = fw_arg0;
+ char **argv = (char **) fw_arg1;
int i;
/*
@@ -46,19 +45,9 @@ void __init prom_init(int argc, char **a
mips_machgroup = MACH_GROUP_NEC_VR41XX;
mips_machtype = MACH_TANBAC_TB0226;
-
- switch (current_cpu_data.processor_id) {
- case PRID_VR4131_REV1_2:
- config = read_c0_config();
- config &= ~0x00000030UL;
- config |= 0x00410000UL;
- write_c0_config(config);
- break;
- default:
- break;
- }
}
-void __init prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/vr41xx/tanbac-tb0226/setup.c~mips-megapatch arch/mips/vr41xx/tanbac-tb0226/setup.c
--- 25/arch/mips/vr41xx/tanbac-tb0226/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/tanbac-tb0226/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,26 +1,27 @@
/*
- * FILE NAME
- * arch/mips/vr41xx/tanbac-tb0226/setup.c
+ * setup.c, Setup for the TANBAC TB0226.
*
- * BRIEF MODULE DESCRIPTION
- * Setup for the TANBAC TB0226.
+ * Copyright (C) 2002-2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
*
- * Copyright 2002,2003 Yoichi Yuasa
- * yuasa@hh.iij4u.or.jp
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/ide.h>
#include <linux/ioport.h>
#include <asm/pci_channel.h>
-#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/tb0226.h>
@@ -46,17 +47,10 @@ static struct resource vr41xx_pci_mem_re
extern struct pci_ops vr41xx_pci_ops;
-struct pci_channel mips_pci_channels[] = {
- { .pci_ops = &vr41xx_pci_ops,
- .io_resource = &vr41xx_pci_io_resource,
- .mem_resource = &vr41xx_pci_mem_resource,
- .first_devfn = 0,
- .last_devfn = 256, },
- { .pci_ops = NULL,
- .io_resource = NULL,
- .mem_resource = NULL,
- .first_devfn = 0,
- .last_devfn = 0, },
+struct pci_controller vr41xx_controller[] = {
+ .pci_ops = &vr41xx_pci_ops,
+ .io_resource = &vr41xx_pci_io_resource,
+ .mem_resource = &vr41xx_pci_mem_resource,
};
struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
@@ -98,20 +92,14 @@ void __init tanbac_tb0226_setup(void)
initrd_end = (unsigned long)&__rd_end;
#endif
- _machine_restart = vr41xx_restart;
- _machine_halt = vr41xx_halt;
- _machine_power_off = vr41xx_power_off;
-
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
vr41xx_bcu_init();
- vr41xx_cmu_init(0);
+ vr41xx_cmu_init();
+
+ vr41xx_pmu_init();
vr41xx_siu_init(SIU_RS232C, 0);
@@ -119,3 +107,5 @@ void __init tanbac_tb0226_setup(void)
vr41xx_pciu_init(&pci_address_map);
#endif
}
+
+early_initcall(tanbac_tb0226_setup);
diff -puN arch/mips/vr41xx/tanbac-tb0229/init.c~mips-megapatch arch/mips/vr41xx/tanbac-tb0229/init.c
--- 25/arch/mips/vr41xx/tanbac-tb0229/init.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/tanbac-tb0229/init.c 2004-02-19 12:53:02.000000000 -0800
@@ -17,10 +17,10 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
+#include <linux/smp.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
@@ -28,16 +28,15 @@
#include <asm/mipsregs.h>
#include <asm/vr41xx/vr41xx.h>
-char arcs_cmdline[CL_SIZE];
-
const char *get_system_type(void)
{
return "TANBAC TB0229";
}
-void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
+void __init prom_init(void)
{
- u32 config;
+ int argc = fw_arg0;
+ char **argv = (char **) fw_arg1;
int i;
/*
@@ -51,19 +50,9 @@ void __init prom_init(int argc, char **a
mips_machgroup = MACH_GROUP_NEC_VR41XX;
mips_machtype = MACH_TANBAC_TB0229;
-
- switch (current_cpu_data.processor_id) {
- case PRID_VR4131_REV1_2:
- config = read_c0_config();
- config &= ~0x00000030UL;
- config |= 0x00410000UL;
- write_c0_config(config);
- break;
- default:
- break;
- }
}
-void __init prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/vr41xx/tanbac-tb0229/Makefile~mips-megapatch arch/mips/vr41xx/tanbac-tb0229/Makefile
--- 25/arch/mips/vr41xx/tanbac-tb0229/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/tanbac-tb0229/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -2,4 +2,6 @@
# Makefile for the TANBAC TB0229(VR4131DIMM) specific parts of the kernel
#
-obj-y := init.o reboot.o setup.o
+obj-y := init.o setup.o
+
+obj-$(CONFIG_TANBAC_TB0219) += reboot.o
diff -puN arch/mips/vr41xx/tanbac-tb0229/reboot.c~mips-megapatch arch/mips/vr41xx/tanbac-tb0229/reboot.c
--- 25/arch/mips/vr41xx/tanbac-tb0229/reboot.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/tanbac-tb0229/reboot.c 2004-02-19 12:53:02.000000000 -0800
@@ -13,6 +13,7 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+#include <linux/config.h>
#include <asm/io.h>
#include <asm/vr41xx/tb0229.h>
@@ -20,11 +21,7 @@
void tanbac_tb0229_restart(char *command)
{
-#ifdef CONFIG_TANBAC_TB0219
local_irq_disable();
tb0229_hard_reset();
while (1);
-#else
- vr41xx_restart(command);
-#endif
}
diff -puN arch/mips/vr41xx/tanbac-tb0229/setup.c~mips-megapatch arch/mips/vr41xx/tanbac-tb0229/setup.c
--- 25/arch/mips/vr41xx/tanbac-tb0229/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/tanbac-tb0229/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,25 +1,27 @@
/*
- * FILE NAME
- * arch/mips/vr41xx/tanbac-tb0229/setup.c
+ * setup.c, Setup for the TANBAC TB0229 (VR4131DIMM)
*
- * BRIEF MODULE DESCRIPTION
- * Setup for the TANBAC TB0229 (VR4131DIMM)
+ * Copyright (C) 2002-2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
*
- * Copyright 2002,2003 Yoichi Yuasa
- * yuasa@hh.iij4u.or.jp
+ * Modified for TANBAC TB0229:
+ * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
*
- * Modified for TANBAC TB0229:
- * Copyright 2003 Megasolution Inc.
- * matsu@megasolution.jp
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/blkdev.h>
-#include <linux/console.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/root_dev.h>
@@ -50,17 +52,10 @@ static struct resource vr41xx_pci_mem_re
extern struct pci_ops vr41xx_pci_ops;
-struct pci_channel mips_pci_channels[] = {
- { .pci_ops = &vr41xx_pci_ops,
- .io_resource = &vr41xx_pci_io_resource,
- .mem_resource = &vr41xx_pci_mem_resource,
- .first_devfn = 0,
- .last_devfn = 256, },
- { .pci_ops = NULL,
- .io_resource = NULL,
- .mem_resource = NULL,
- .first_devfn = 0,
- .last_devfn = 0, }
+struct pci_controller vr41xx_controller = {
+ .pci_ops = &vr41xx_pci_ops,
+ .io_resource = &vr41xx_pci_io_resource,
+ .mem_resource = &vr41xx_pci_mem_resource,
};
struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
@@ -88,7 +83,7 @@ static struct vr41xx_pci_address_map pci
};
#endif
-void __init tanbac_tb0229_setup(void)
+static void __init tanbac_tb0229_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
@@ -102,20 +97,14 @@ void __init tanbac_tb0229_setup(void)
initrd_end = (unsigned long)&__rd_end;
#endif
- _machine_restart = tanbac_tb0229_restart;
- _machine_halt = vr41xx_halt;
- _machine_power_off = vr41xx_power_off;
-
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
vr41xx_bcu_init();
- vr41xx_cmu_init(0);
+ vr41xx_cmu_init();
+
+ vr41xx_pmu_init();
vr41xx_siu_init(SIU_RS232C, 0);
vr41xx_dsiu_init();
@@ -123,5 +112,10 @@ void __init tanbac_tb0229_setup(void)
#ifdef CONFIG_PCI
vr41xx_pciu_init(&pci_address_map);
#endif
+
+#ifdef CONFIG_TANBAC_TB0219
+ _machine_restart = tanbac_tb0229_restart;
+#endif
}
+early_initcall(tanbac_tb0229_setup);
diff -puN -L arch/mips/vr41xx/victor-mpc30x/ide-mpc30x.c arch/mips/vr41xx/victor-mpc30x/ide-mpc30x.c~mips-megapatch /dev/null
--- 25/arch/mips/vr41xx/victor-mpc30x/ide-mpc30x.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,91 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * IDE routines for typical pc-like standard configurations
- * for the ZAO Networks Capcella.
- *
- * Copyright (C) 1998, 1999, 2001 by Ralf Baechle
- */
-/*
- * Changes:
- * Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Fri, 23 Aug 2002
- * - Added Victor MP-C303/304 support.
- */
-#include <linux/sched.h>
-#include <linux/ide.h>
-#include <linux/ioport.h>
-#include <linux/hdreg.h>
-#include <asm/ptrace.h>
-#include <asm/hdreg.h>
-
-static int mpc30x_ide_default_irq(ide_ioreg_t base)
-{
- return 0;
-}
-
-static ide_ioreg_t mpc30x_ide_default_io_base(int index)
-{
- return 0;
-}
-
-static void mpc30x_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq)
-{
- ide_ioreg_t reg = data_port;
- int i;
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- if (ctrl_port) {
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- } else {
- hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
- }
- if (irq != NULL)
- *irq = 0;
- hw->io_ports[IDE_IRQ_OFFSET] = 0;
-}
-
-static int mpc30x_ide_request_irq(unsigned int irq,
- void (*handler)(int,void *, struct pt_regs *),
- unsigned long flags, const char *device,
- void *dev_id)
-{
- return request_irq(irq, handler, flags, device, dev_id);
-}
-
-static void mpc30x_ide_free_irq(unsigned int irq, void *dev_id)
-{
- free_irq(irq, dev_id);
-}
-
-static int mpc30x_ide_check_region(ide_ioreg_t from, unsigned int extent)
-{
- return check_region(from, extent);
-}
-
-static void mpc30x_ide_request_region(ide_ioreg_t from, unsigned int extent,
- const char *name)
-{
- request_region(from, extent, name);
-}
-
-static void mpc30x_ide_release_region(ide_ioreg_t from, unsigned int extent)
-{
- release_region(from, extent);
-}
-
-struct ide_ops mpc30x_ide_ops = {
- &mpc30x_ide_default_irq,
- &mpc30x_ide_default_io_base,
- &mpc30x_ide_init_hwif_ports,
- &mpc30x_ide_request_irq,
- &mpc30x_ide_free_irq,
- &mpc30x_ide_check_region,
- &mpc30x_ide_request_region,
- &mpc30x_ide_release_region
-};
diff -puN arch/mips/vr41xx/victor-mpc30x/init.c~mips-megapatch arch/mips/vr41xx/victor-mpc30x/init.c
--- 25/arch/mips/vr41xx/victor-mpc30x/init.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/victor-mpc30x/init.c 2004-02-19 12:53:02.000000000 -0800
@@ -13,7 +13,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/string.h>
@@ -23,15 +22,15 @@
#include <asm/mipsregs.h>
#include <asm/vr41xx/vr41xx.h>
-char arcs_cmdline[CL_SIZE];
-
const char *get_system_type(void)
{
return "Victor MP-C303/304";
}
-void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
+void __init prom_init(void)
{
+ int argc = fw_arg0;
+ char **argv = (char **) fw_arg1;
int i;
/*
@@ -49,6 +48,7 @@ void __init prom_init(int argc, char **a
add_memory_region(0, 32 << 20, BOOT_MEM_RAM);
}
-void __init prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/vr41xx/victor-mpc30x/Makefile~mips-megapatch arch/mips/vr41xx/victor-mpc30x/Makefile
--- 25/arch/mips/vr41xx/victor-mpc30x/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/victor-mpc30x/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -3,4 +3,3 @@
#
obj-y += init.o setup.o
-obj-$(CONFIG_IDE) += ide-mpc30x.o
diff -puN arch/mips/vr41xx/victor-mpc30x/setup.c~mips-megapatch arch/mips/vr41xx/victor-mpc30x/setup.c
--- 25/arch/mips/vr41xx/victor-mpc30x/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/victor-mpc30x/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,29 +1,30 @@
/*
- * FILE NAME
- * arch/mips/vr41xx/victor-mpc30x/setup.c
+ * setup.c, Setup for the Victor MP-C303/304.
*
- * BRIEF MODULE DESCRIPTION
- * Setup for the Victor MP-C303/304.
+ * Copyright (C) 2002-2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
*
- * Copyright 2002 Yoichi Yuasa
- * yuasa@hh.iij4u.or.jp
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
#include <asm/pci_channel.h>
-#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/mpc30x.h>
@@ -32,10 +33,6 @@ extern unsigned long initrd_start, initr
extern void * __rd_start, * __rd_end;
#endif
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops mpc30x_ide_ops;
-#endif
-
#ifdef CONFIG_PCI
static struct resource vr41xx_pci_io_resource = {
"PCI I/O space",
@@ -53,9 +50,10 @@ static struct resource vr41xx_pci_mem_re
extern struct pci_ops vr41xx_pci_ops;
-struct pci_channel mips_pci_channels[] = {
- {&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256},
- {NULL, NULL, NULL, 0, 0}
+struct pci_controller vr41xx_controller[] = {
+ .pci_ops = &vr41xx_pci_ops,
+ .io_resource = &vr41xx_pci_io_resource,
+ .mem_resource = &vr41xx_pci_mem_resource,
};
struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
@@ -83,7 +81,7 @@ static struct vr41xx_pci_address_map pci
};
#endif
-void __init victor_mpc30x_setup(void)
+static void __init victor_mpc30x_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
@@ -97,24 +95,14 @@ void __init victor_mpc30x_setup(void)
initrd_end = (unsigned long)&__rd_end;
#endif
- _machine_restart = vr41xx_restart;
- _machine_halt = vr41xx_halt;
- _machine_power_off = vr41xx_power_off;
-
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &mpc30x_ide_ops;
-#endif
-
vr41xx_bcu_init();
- vr41xx_cmu_init(0);
+ vr41xx_cmu_init();
+
+ vr41xx_pmu_init();
#ifdef CONFIG_SERIAL_8250
vr41xx_siu_init(SIU_RS232C, 0);
@@ -124,3 +112,5 @@ void __init victor_mpc30x_setup(void)
vr41xx_pciu_init(&pci_address_map);
#endif
}
+
+early_initcall(victor_mpc30x_setup);
diff -puN -L arch/mips/vr41xx/zao-capcella/ide-capcella.c arch/mips/vr41xx/zao-capcella/ide-capcella.c~mips-megapatch /dev/null
--- 25/arch/mips/vr41xx/zao-capcella/ide-capcella.c
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,99 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * IDE routines for typical pc-like standard configurations
- * for the ZAO Networks Capcella.
- *
- * Copyright (C) 1998, 1999, 2001 by Ralf Baechle
- */
-/*
- * Changes:
- * Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Sun, 24 Feb 2002
- * - Added ZAO Networks Capcella support.
- */
-#include <linux/sched.h>
-#include <linux/ide.h>
-#include <linux/ioport.h>
-#include <linux/hdreg.h>
-#include <asm/ptrace.h>
-#include <asm/hdreg.h>
-
-static int capcella_ide_default_irq(ide_ioreg_t base)
-{
- switch (base) {
- case 0x8300: return 42;
- }
-
- return 0;
-}
-
-static ide_ioreg_t capcella_ide_default_io_base(int index)
-{
- switch (index) {
- case 0: return 0x8300;
- }
-
- return 0;
-}
-
-static void capcella_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq)
-{
- ide_ioreg_t reg = data_port;
- int i;
-
- for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
- hw->io_ports[i] = reg;
- reg += 1;
- }
- if (ctrl_port) {
- hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
- } else {
- hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
- }
- if (irq != NULL)
- *irq = 0;
- hw->io_ports[IDE_IRQ_OFFSET] = 0;
-}
-
-static int capcella_ide_request_irq(unsigned int irq,
- void (*handler)(int,void *, struct pt_regs *),
- unsigned long flags, const char *device,
- void *dev_id)
-{
- return request_irq(irq, handler, flags, device, dev_id);
-}
-
-static void capcella_ide_free_irq(unsigned int irq, void *dev_id)
-{
- free_irq(irq, dev_id);
-}
-
-static int capcella_ide_check_region(ide_ioreg_t from, unsigned int extent)
-{
- return check_region(from, extent);
-}
-
-static void capcella_ide_request_region(ide_ioreg_t from, unsigned int extent,
- const char *name)
-{
- request_region(from, extent, name);
-}
-
-static void capcella_ide_release_region(ide_ioreg_t from, unsigned int extent)
-{
- release_region(from, extent);
-}
-
-struct ide_ops capcella_ide_ops = {
- &capcella_ide_default_irq,
- &capcella_ide_default_io_base,
- &capcella_ide_init_hwif_ports,
- &capcella_ide_request_irq,
- &capcella_ide_free_irq,
- &capcella_ide_check_region,
- &capcella_ide_request_region,
- &capcella_ide_release_region
-};
diff -puN arch/mips/vr41xx/zao-capcella/init.c~mips-megapatch arch/mips/vr41xx/zao-capcella/init.c
--- 25/arch/mips/vr41xx/zao-capcella/init.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/zao-capcella/init.c 2004-02-19 12:53:02.000000000 -0800
@@ -13,9 +13,9 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
+#include <linux/smp.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
@@ -23,8 +23,6 @@
#include <asm/mipsregs.h>
#include <asm/vr41xx/vr41xx.h>
-char arcs_cmdline[CL_SIZE];
-
const char *get_system_type(void)
{
return "ZAO Networks Capcella";
@@ -32,7 +30,8 @@ const char *get_system_type(void)
void __init prom_init(int argc, char **argv, unsigned long magic, int *prom_vec)
{
- u32 config;
+ int argc = fw_arg0;
+ char **argv = (char **) fw_arg1;
int i;
/*
@@ -46,19 +45,9 @@ void __init prom_init(int argc, char **a
mips_machgroup = MACH_GROUP_NEC_VR41XX;
mips_machtype = MACH_ZAO_CAPCELLA;
-
- switch (current_cpu_data.processor_id) {
- case PRID_VR4131_REV1_2:
- config = read_c0_config();
- config &= ~0x00000030UL;
- config |= 0x00410000UL;
- write_c0_config(config);
- break;
- default:
- break;
- }
}
-void __init prom_free_prom_memory (void)
+unsigned long __init prom_free_prom_memory(void)
{
+ return 0;
}
diff -puN arch/mips/vr41xx/zao-capcella/Makefile~mips-megapatch arch/mips/vr41xx/zao-capcella/Makefile
--- 25/arch/mips/vr41xx/zao-capcella/Makefile~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/zao-capcella/Makefile 2004-02-19 12:53:02.000000000 -0800
@@ -3,4 +3,3 @@
#
obj-y += init.o setup.o
-obj-$(CONFIG_IDE) += ide-capcella.o
diff -puN arch/mips/vr41xx/zao-capcella/setup.c~mips-megapatch arch/mips/vr41xx/zao-capcella/setup.c
--- 25/arch/mips/vr41xx/zao-capcella/setup.c~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/zao-capcella/setup.c 2004-02-19 12:53:02.000000000 -0800
@@ -1,29 +1,30 @@
/*
- * FILE NAME
- * arch/mips/vr41xx/zao-capcella/setup.c
+ * setup.c, Setup for the ZAO Networks Capcella.
*
- * BRIEF MODULE DESCRIPTION
- * Setup for the ZAO Networks Capcella.
+ * Copyright (C) 2002-2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
*
- * Copyright 2002 Yoichi Yuasa
- * yuasa@hh.iij4u.or.jp
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/ide.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/kdev_t.h>
#include <linux/root_dev.h>
#include <asm/pci_channel.h>
-#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/vr41xx/capcella.h>
@@ -32,10 +33,6 @@ extern unsigned long initrd_start, initr
extern void * __rd_start, * __rd_end;
#endif
-#ifdef CONFIG_BLK_DEV_IDE
-extern struct ide_ops capcella_ide_ops;
-#endif
-
#ifdef CONFIG_PCI
static struct resource vr41xx_pci_io_resource = {
"PCI I/O space",
@@ -53,9 +50,10 @@ static struct resource vr41xx_pci_mem_re
extern struct pci_ops vr41xx_pci_ops;
-struct pci_channel mips_pci_channels[] = {
- {&vr41xx_pci_ops, &vr41xx_pci_io_resource, &vr41xx_pci_mem_resource, 0, 256},
- {NULL, NULL, NULL, 0, 0}
+struct pci_controller vr41xx_controller = {
+ .pci_ops = &vr41xx_pci_ops,
+ .io_resource = &vr41xx_pci_io_resource,
+ .mem_resource = &vr41xx_pci_mem_resource,
};
struct vr41xx_pci_address_space vr41xx_pci_mem1 = {
@@ -83,7 +81,7 @@ static struct vr41xx_pci_address_map pci
};
#endif
-void __init zao_capcella_setup(void)
+static void __init zao_capcella_setup(void)
{
set_io_port_base(IO_PORT_BASE);
ioport_resource.start = IO_PORT_RESOURCE_START;
@@ -97,24 +95,14 @@ void __init zao_capcella_setup(void)
initrd_end = (unsigned long)&__rd_end;
#endif
- _machine_restart = vr41xx_restart;
- _machine_halt = vr41xx_halt;
- _machine_power_off = vr41xx_power_off;
-
board_time_init = vr41xx_time_init;
board_timer_setup = vr41xx_timer_setup;
-#ifdef CONFIG_FB
- conswitchp = &dummy_con;
-#endif
-
-#ifdef CONFIG_BLK_DEV_IDE
- ide_ops = &capcella_ide_ops;
-#endif
-
vr41xx_bcu_init();
- vr41xx_cmu_init(0x0102);
+ vr41xx_cmu_init();
+
+ vr41xx_pmu_init();
#ifdef CONFIG_SERIAL_8250
vr41xx_siu_init(SIU_RS232C, 0);
@@ -125,3 +113,5 @@ void __init zao_capcella_setup(void)
vr41xx_pciu_init(&pci_address_map);
#endif
}
+
+early_initcall(zao_capcella_setup);
diff -puN include/asm-mips/addrspace.h~mips-megapatch include/asm-mips/addrspace.h
--- 25/include/asm-mips/addrspace.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/addrspace.h 2004-02-19 12:53:02.000000000 -0800
@@ -11,6 +11,7 @@
#define _ASM_ADDRSPACE_H
#include <linux/config.h>
+#include <spaces.h>
/*
* Configure language
@@ -46,8 +47,6 @@
#define KSEG2 0xc0000000
#define KSEG3 0xe0000000
-//#define K0BASE KSEG0
-
/*
* Returns the kernel segment base of a given address
*/
@@ -148,25 +147,23 @@
#define KUBASE 0
#define KUSIZE_32 0x0000000080000000 /* KUSIZE
for a 32 bit proc */
-//#define K0BASE 0xa800000000000000
-#define K0BASE_EXL_WR K0BASE /* exclusive on write */
+#define K0BASE_EXL_WR 0xa800000000000000 /* exclusive on write */
#define K0BASE_NONCOH 0x9800000000000000 /* noncoherent */
#define K0BASE_EXL 0xa000000000000000 /* exclusive */
-#ifdef CONFIG_SGI_IP27
-#define K1BASE 0x9600000000000000 /* uncached attr 3,
- uncac */
-#else
-#define K1BASE 0x9000000000000000
-#endif
-#define K2BASE 0xc000000000000000
+#ifndef CONFIG_CPU_R8000
+
+/*
+ * The R8000 doesn't have the 32-bit compat spaces so we don't define them
+ * in order to catch bugs in the source code.
+ */
-#if !defined (CONFIG_CPU_R8000)
#define COMPAT_K1BASE32 0xffffffffa0000000
#define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
+
#endif
#define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK)
-#define PHYS_TO_K0(x) (_ACAST64_ (x) | K0BASE)
+#define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE)
#endif /* _ASM_ADDRSPACE_H */
diff -puN include/asm-mips/arc/types.h~mips-megapatch include/asm-mips/arc/types.h
--- 25/include/asm-mips/arc/types.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/arc/types.h 2004-02-19 12:53:02.000000000 -0800
@@ -69,4 +69,19 @@ typedef USHORT *PUSHORT;
typedef ULONG *PULONG;
typedef VOID *PVOID;
+/*
+ * Return type of ArcGetDisplayStatus()
+ */
+typedef struct {
+ USHORT CursorXPosition;
+ USHORT CursorYPosition;
+ USHORT CursorMaxXPosition;
+ USHORT CursorMaxYPosition;
+ USHORT ForegroundColor;
+ USHORT BackgroundColor;
+ UCHAR HighIntensity;
+ UCHAR Underscored;
+ UCHAR ReverseVideo;
+} DISPLAY_STATUS;
+
#endif /* _ASM_ARC_TYPES_H */
diff -puN include/asm-mips/asm.h~mips-megapatch include/asm-mips/asm.h
--- 25/include/asm-mips/asm.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/asm.h 2004-02-19 12:53:02.000000000 -0800
@@ -6,6 +6,7 @@
* Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
* Copyright (C) 1999 by Silicon Graphics, Inc.
* Copyright (C) 2001 MIPS Technologies, Inc.
+ * Copyright (C) 2002 Maciej W. Rozycki
*
* Some useful macros for MIPS assembler code
*
@@ -13,8 +14,8 @@
* away by gas in -O mode. These nops are however required to fill delay
* slots in noreorder mode.
*/
-#ifndef _ASM_ASM_H
-#define _ASM_ASM_H
+#ifndef __ASM_ASM_H
+#define __ASM_ASM_H
#include <linux/config.h>
#include <asm/sgidefs.h>
@@ -204,13 +205,11 @@ symbol = value
/*
* Stack alignment
*/
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS32)
+#if (_MIPS_SIM == _MIPS_SIM_ABI32)
#define ALSZ 7
#define ALMASK ~7
#endif
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
+#if (_MIPS_SIM == _MIPS_SIM_ABIN32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
#define ALSZ 15
#define ALMASK ~15
#endif
@@ -232,15 +231,13 @@ symbol = value
* Use the following macros in assemblercode to load/store registers,
* pointers etc.
*/
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS32)
+#if (_MIPS_SIM == _MIPS_SIM_ABI32)
#define REG_S sw
#define REG_L lw
#define REG_SUBU subu
#define REG_ADDU addu
#endif
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
+#if (_MIPS_SIM == _MIPS_SIM_ABIN32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
#define REG_S sd
#define REG_L ld
#define REG_SUBU dsubu
@@ -385,17 +382,15 @@ symbol = value
/*
* Some cp0 registers were extended to 64bit for MIPS III.
*/
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS32)
+#if (_MIPS_SIM == _MIPS_SIM_ABI32)
#define MFC0 mfc0
#define MTC0 mtc0
#endif
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
- (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
+#if (_MIPS_SIM == _MIPS_SIM_ABIN32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
#define MFC0 dmfc0
#define MTC0 dmtc0
#endif
#define SSNOP sll zero,zero,1
-#endif /* _ASM_ASM_H */
+#endif /* __ASM_ASM_H */
diff -puN include/asm-mips/asmmacro-32.h~mips-megapatch include/asm-mips/asmmacro-32.h
--- 25/include/asm-mips/asmmacro-32.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/asmmacro-32.h 2004-02-19 12:53:02.000000000 -0800
@@ -7,7 +7,6 @@
#ifndef _ASM_ASMMACRO_32_H
#define _ASM_ASMMACRO_32_H
-#include <linux/config.h>
#include <asm/offset.h>
#include <asm/regdef.h>
#include <asm/fpregdef.h>
diff -puN include/asm-mips/asmmacro-64.h~mips-megapatch include/asm-mips/asmmacro-64.h
--- 25/include/asm-mips/asmmacro-64.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/asmmacro-64.h 2004-02-19 12:53:02.000000000 -0800
@@ -8,7 +8,6 @@
#ifndef _ASM_ASMMACRO_64_H
#define _ASM_ASMMACRO_64_H
-#include <linux/config.h>
#include <asm/offset.h>
#include <asm/regdef.h>
#include <asm/fpregdef.h>
diff -puN include/asm-mips/atomic.h~mips-megapatch include/asm-mips/atomic.h
--- 25/include/asm-mips/atomic.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/atomic.h 2004-02-19 12:53:02.000000000 -0800
@@ -11,19 +11,23 @@
*
* Copyright (C) 1996, 97, 99, 2000, 03 by Ralf Baechle
*/
-#ifndef _ASM_ATOMIC_H
-#define _ASM_ATOMIC_H
+/*
+ * As workaround for the ATOMIC_DEC_AND_LOCK / atomic_dec_and_lock mess in
+ * <linux/spinlock.h> we have to include <linux/spinlock.h> outside the
+ * main big wrapper ...
+ */
#include <linux/config.h>
+#include <linux/spinlock.h>
+
+#ifndef _ASM_ATOMIC_H
+#define _ASM_ATOMIC_H
-#include <asm/system.h>
+extern spinlock_t atomic_lock;
typedef struct { volatile int counter; } atomic_t;
-typedef struct { volatile __s64 counter; } atomic64_t;
-#ifdef __KERNEL__
#define ATOMIC_INIT(i) { (i) }
-#define ATOMIC64_INIT(i) { (i) }
/*
* atomic_read - read atomic variable
@@ -34,13 +38,6 @@ typedef struct { volatile __s64 counter;
#define atomic_read(v) ((v)->counter)
/*
- * atomic64_read - read atomic variable
- * @v: pointer of type atomic64_t
- *
- */
-#define atomic64_read(v) ((v)->counter)
-
-/*
* atomic_set - set atomic variable
* @v: pointer of type atomic_t
* @i: required value
@@ -49,84 +46,7 @@ typedef struct { volatile __s64 counter;
*/
#define atomic_set(v,i) ((v)->counter = (i))
-/*
- * atomic64_set - set atomic variable
- * @v: pointer of type atomic64_t
- * @i: required value
- */
-#define atomic64_set(v,i) ((v)->counter = (i))
-
-#ifndef CONFIG_CPU_HAS_LLSC
-
-/*
- * The MIPS I implementation is only atomic with respect to
- * interrupts. R3000 based multiprocessor machines are rare anyway ...
- *
- * atomic_add - add integer to atomic variable
- * @i: integer value to add
- * @v: pointer of type atomic_t
- *
- * Atomically adds @i to @v.
- */
-static __inline__ void atomic_add(int i, atomic_t * v)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- v->counter += i;
- local_irq_restore(flags);
-}
-
-/*
- * atomic_sub - subtract the atomic variable
- * @i: integer value to subtract
- * @v: pointer of type atomic_t
- *
- * Atomically subtracts @i from @v.
- */
-static __inline__ void atomic_sub(int i, atomic_t * v)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- v->counter -= i;
- local_irq_restore(flags);
-}
-
-static __inline__ int atomic_add_return(int i, atomic_t * v)
-{
- unsigned long flags;
- int temp;
-
- local_irq_save(flags);
- temp = v->counter;
- temp += i;
- v->counter = temp;
- local_irq_restore(flags);
-
- return temp;
-}
-
-static __inline__ int atomic_sub_return(int i, atomic_t * v)
-{
- unsigned long flags;
- int temp;
-
- local_irq_save(flags);
- temp = v->counter;
- temp -= i;
- v->counter = temp;
- local_irq_restore(flags);
-
- return temp;
-}
-
-#else
-
-/*
- * ... while for MIPS II and better we can use ll/sc instruction. This
- * implementation is SMP safe ...
- */
+#ifdef CONFIG_CPU_HAS_LLSC
/*
* atomic_add - add integer to atomic variable
@@ -160,12 +80,10 @@ static __inline__ void atomic_sub(int i,
unsigned long temp;
__asm__ __volatile__(
- " .set noreorder # atomic_sub \n"
- "1: ll %0, %1 \n"
+ "1: ll %0, %1 # atomic_sub \n"
" subu %0, %2 \n"
" sc %0, %1 \n"
" beqz %0, 1b \n"
- " .set reorder \n"
: "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter));
}
@@ -178,14 +96,12 @@ static __inline__ int atomic_add_return(
unsigned long temp, result;
__asm__ __volatile__(
- " .set noreorder # atomic_add_return \n"
- "1: ll %1, %2 \n"
+ "1: ll %1, %2 # atomic_add_return \n"
" addu %0, %1, %3 \n"
" sc %0, %2 \n"
" beqz %0, 1b \n"
" addu %0, %1, %3 \n"
" sync \n"
- " .set reorder \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
: "memory");
@@ -198,93 +114,168 @@ static __inline__ int atomic_sub_return(
unsigned long temp, result;
__asm__ __volatile__(
- " .set noreorder # atomic_sub_return \n"
- "1: ll %1, %2 \n"
+ "1: ll %1, %2 # atomic_sub_return \n"
" subu %0, %1, %3 \n"
" sc %0, %2 \n"
" beqz %0, 1b \n"
" subu %0, %1, %3 \n"
" sync \n"
- " .set reorder \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
: "memory");
return result;
}
-#endif
-#ifndef CONFIG_CPU_HAS_LLDSCD
+#else
/*
- * This implementation is only atomic with respect to interrupts. It can't
- * be used on SMP
+ * The MIPS I implementation is only atomic with respect to
+ * interrupts. R3000 based multiprocessor machines are rare anyway ...
*
- * atomic64_add - add integer to atomic variable
+ * atomic_add - add integer to atomic variable
* @i: integer value to add
- * @v: pointer of type atomic64_t
+ * @v: pointer of type atomic_t
*
* Atomically adds @i to @v.
*/
-static __inline__ void atomic64_add(int i, atomic64_t * v)
+static __inline__ void atomic_add(int i, atomic_t * v)
{
unsigned long flags;
- local_irq_save(flags);
+ spin_lock_irqsave(&atomic_lock, flags);
v->counter += i;
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&atomic_lock, flags);
}
/*
- * atomic64_sub - subtract the atomic variable
+ * atomic_sub - subtract the atomic variable
* @i: integer value to subtract
- * @v: pointer of type atomic64_t
+ * @v: pointer of type atomic_t
*
* Atomically subtracts @i from @v.
*/
-static __inline__ void atomic64_sub(int i, atomic64_t * v)
+static __inline__ void atomic_sub(int i, atomic_t * v)
{
unsigned long flags;
- local_irq_save(flags);
+ spin_lock_irqsave(&atomic_lock, flags);
v->counter -= i;
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&atomic_lock, flags);
}
-static __inline__ int atomic64_add_return(int i, atomic64_t * v)
+static __inline__ int atomic_add_return(int i, atomic_t * v)
{
unsigned long flags;
int temp;
- local_irq_save(flags);
+ spin_lock_irqsave(&atomic_lock, flags);
temp = v->counter;
temp += i;
v->counter = temp;
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&atomic_lock, flags);
return temp;
}
-static __inline__ int atomic64_sub_return(int i, atomic64_t * v)
+static __inline__ int atomic_sub_return(int i, atomic_t * v)
{
unsigned long flags;
int temp;
- local_irq_save(flags);
+ spin_lock_irqsave(&atomic_lock, flags);
temp = v->counter;
temp -= i;
v->counter = temp;
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&atomic_lock, flags);
return temp;
}
-#else
+#endif /* CONFIG_CPU_HAS_LLSC */
+
+#define atomic_dec_return(v) atomic_sub_return(1,(v))
+#define atomic_inc_return(v) atomic_add_return(1,(v))
+
+/*
+ * atomic_sub_and_test - subtract value from variable and test result
+ * @i: integer value to subtract
+ * @v: pointer of type atomic_t
+ *
+ * Atomically subtracts @i from @v and returns
+ * true if the result is zero, or false for all
+ * other cases.
+ */
+#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
+
+/*
+ * atomic_inc_and_test - increment and test
+ * @v: pointer of type atomic_t
+ *
+ * Atomically increments @v by 1
+ * and returns true if the result is zero, or false for all
+ * other cases.
+ */
+#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
+
+/*
+ * atomic_dec_and_test - decrement by 1 and test
+ * @v: pointer of type atomic_t
+ *
+ * Atomically decrements @v by 1 and
+ * returns true if the result is 0, or false for all other
+ * cases.
+ */
+#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
/*
- * ... while for MIPS III and better we can use ll/sc instruction. This
- * implementation is SMP safe ...
+ * atomic_inc - increment atomic variable
+ * @v: pointer of type atomic_t
+ *
+ * Atomically increments @v by 1.
*/
+#define atomic_inc(v) atomic_add(1,(v))
+
+/*
+ * atomic_dec - decrement and test
+ * @v: pointer of type atomic_t
+ *
+ * Atomically decrements @v by 1.
+ */
+#define atomic_dec(v) atomic_sub(1,(v))
+
+/*
+ * atomic_add_negative - add and test if negative
+ * @v: pointer of type atomic_t
+ * @i: integer value to add
+ *
+ * Atomically adds @i to @v and returns true
+ * if the result is negative, or false when
+ * result is greater than or equal to zero.
+ */
+#define atomic_add_negative(i,v) (atomic_add_return(i, (v)) < 0)
+
+#ifdef CONFIG_MIPS64
+
+typedef struct { volatile __s64 counter; } atomic64_t;
+
+#define ATOMIC64_INIT(i) { (i) }
+
+/*
+ * atomic64_read - read atomic variable
+ * @v: pointer of type atomic64_t
+ *
+ */
+#define atomic64_read(v) ((v)->counter)
+
+/*
+ * atomic64_set - set atomic variable
+ * @v: pointer of type atomic64_t
+ * @i: required value
+ */
+#define atomic64_set(v,i) ((v)->counter = (i))
+
+#ifdef CONFIG_CPU_HAS_LLDSCD
/*
* atomic64_add - add integer to atomic variable
@@ -298,9 +289,9 @@ static __inline__ void atomic64_add(int
unsigned long temp;
__asm__ __volatile__(
- "1: ll %0, %1 # atomic64_add \n"
+ "1: lld %0, %1 # atomic64_add \n"
" addu %0, %2 \n"
- " sc %0, %1 \n"
+ " scd %0, %1 \n"
" beqz %0, 1b \n"
: "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter));
@@ -318,12 +309,10 @@ static __inline__ void atomic64_sub(int
unsigned long temp;
__asm__ __volatile__(
- " .set noreorder # atomic64_sub \n"
- "1: ll %0, %1 \n"
+ "1: lld %0, %1 # atomic64_sub \n"
" subu %0, %2 \n"
- " sc %0, %1 \n"
+ " scd %0, %1 \n"
" beqz %0, 1b \n"
- " .set reorder \n"
: "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter));
}
@@ -336,14 +325,12 @@ static __inline__ int atomic64_add_retur
unsigned long temp, result;
__asm__ __volatile__(
- " .set noreorder # atomic64_add_return \n"
- "1: ll %1, %2 \n"
+ "1: lld %1, %2 # atomic64_add_return \n"
" addu %0, %1, %3 \n"
- " sc %0, %2 \n"
+ " scd %0, %2 \n"
" beqz %0, 1b \n"
" addu %0, %1, %3 \n"
" sync \n"
- " .set reorder \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
: "memory");
@@ -356,37 +343,88 @@ static __inline__ int atomic64_sub_retur
unsigned long temp, result;
__asm__ __volatile__(
- " .set noreorder # atomic64_sub_return \n"
- "1: ll %1, %2 \n"
+ "1: lld %1, %2 # atomic64_sub_return \n"
" subu %0, %1, %3 \n"
- " sc %0, %2 \n"
+ " scd %0, %2 \n"
" beqz %0, 1b \n"
" subu %0, %1, %3 \n"
" sync \n"
- " .set reorder \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
: "memory");
return result;
}
-#endif
-#define atomic_dec_return(v) atomic_sub_return(1,(v))
-#define atomic64_dec_return(v) atomic64_sub_return(1,(v))
-#define atomic_inc_return(v) atomic_add_return(1,(v))
-#define atomic64_inc_return(v) atomic64_add_return(1,(v))
+#else
/*
- * atomic_sub_and_test - subtract value from variable and test result
+ * This implementation is only atomic with respect to interrupts. It can't
+ * be used on SMP
+ *
+ * atomic64_add - add integer to atomic variable
+ * @i: integer value to add
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically adds @i to @v.
+ */
+static __inline__ void atomic64_add(int i, atomic64_t * v)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ v->counter += i;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+}
+
+/*
+ * atomic64_sub - subtract the atomic variable
* @i: integer value to subtract
- * @v: pointer of type atomic_t
+ * @v: pointer of type atomic64_t
*
- * Atomically subtracts @i from @v and returns
- * true if the result is zero, or false for all
- * other cases.
+ * Atomically subtracts @i from @v.
*/
-#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
+static __inline__ void atomic64_sub(int i, atomic64_t * v)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ v->counter -= i;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+}
+
+static __inline__ int atomic64_add_return(int i, atomic64_t * v)
+{
+ unsigned long flags;
+ int temp;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ temp = v->counter;
+ temp += i;
+ v->counter = temp;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+
+ return temp;
+}
+
+static __inline__ int atomic64_sub_return(int i, atomic64_t * v)
+{
+ unsigned long flags;
+ int temp;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ temp = v->counter;
+ temp -= i;
+ v->counter = temp;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+
+ return temp;
+}
+
+#endif /* CONFIG_CPU_HAS_LLDSCD */
+
+#define atomic64_dec_return(v) atomic64_sub_return(1,(v))
+#define atomic64_inc_return(v) atomic64_add_return(1,(v))
/*
* atomic64_sub_and_test - subtract value from variable and test result
@@ -400,16 +438,6 @@ static __inline__ int atomic64_sub_retur
#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0)
/*
- * atomic_inc_and_test - increment and test
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1
- * and returns true if the result is zero, or false for all
- * other cases.
- */
-#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
-
-/*
* atomic64_inc_and_test - increment and test
* @v: pointer of type atomic64_t
*
@@ -420,16 +448,6 @@ static __inline__ int atomic64_sub_retur
#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
/*
- * atomic_dec_and_test - decrement by 1 and test
- * @v: pointer of type atomic_t
- *
- * Atomically decrements @v by 1 and
- * returns true if the result is 0, or false for all other
- * cases.
- */
-#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
-
-/*
* atomic64_dec_and_test - decrement by 1 and test
* @v: pointer of type atomic64_t
*
@@ -440,14 +458,6 @@ static __inline__ int atomic64_sub_retur
#define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0)
/*
- * atomic_inc - increment atomic variable
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1.
- */
-#define atomic_inc(v) atomic_add(1,(v))
-
-/*
* atomic64_inc - increment atomic variable
* @v: pointer of type atomic64_t
*
@@ -456,14 +466,6 @@ static __inline__ int atomic64_sub_retur
#define atomic64_inc(v) atomic64_add(1,(v))
/*
- * atomic_dec - decrement and test
- * @v: pointer of type atomic_t
- *
- * Atomically decrements @v by 1.
- */
-#define atomic_dec(v) atomic_sub(1,(v))
-
-/*
* atomic64_dec - decrement and test
* @v: pointer of type atomic64_t
*
@@ -472,17 +474,6 @@ static __inline__ int atomic64_sub_retur
#define atomic64_dec(v) atomic64_sub(1,(v))
/*
- * atomic_add_negative - add and test if negative
- * @v: pointer of type atomic_t
- * @i: integer value to add
- *
- * Atomically adds @i to @v and returns true
- * if the result is negative, or false when
- * result is greater than or equal to zero.
- */
-#define atomic_add_negative(i,v) (atomic_add_return(i, (v)) < 0)
-
-/*
* atomic64_add_negative - add and test if negative
* @v: pointer of type atomic64_t
* @i: integer value to add
@@ -493,12 +484,15 @@ static __inline__ int atomic64_sub_retur
*/
#define atomic64_add_negative(i,v) (atomic64_add_return(i, (v)) < 0)
-/* Atomic operations are already serializing */
+#endif /* CONFIG_MIPS64 */
+
+/*
+ * atomic*_return operations are serializing but not the non-*_return
+ * versions.
+ */
#define smp_mb__before_atomic_dec() smp_mb()
#define smp_mb__after_atomic_dec() smp_mb()
#define smp_mb__before_atomic_inc() smp_mb()
#define smp_mb__after_atomic_inc() smp_mb()
-#endif /* defined(__KERNEL__) */
-
#endif /* _ASM_ATOMIC_H */
diff -puN -L include/asm-mips/au1000_dma.h include/asm-mips/au1000_dma.h~mips-megapatch /dev/null
--- 25/include/asm-mips/au1000_dma.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,433 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * Defines for using and allocating dma channels on the Alchemy
- * Au1000 mips processor.
- *
- * Copyright 2000 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * stevel@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-#ifndef __ASM_AU1000_DMA_H
-#define __ASM_AU1000_DMA_H
-
-#include <linux/config.h>
-#include <asm/io.h> /* need byte IO */
-#include <linux/spinlock.h> /* And spinlocks */
-#include <linux/delay.h>
-#include <asm/system.h>
-
-#define NUM_AU1000_DMA_CHANNELS 8
-
-/* DMA Channel Base Addresses */
-#define DMA_CHANNEL_BASE 0xB4002000
-#define DMA_CHANNEL_LEN 0x00000100
-
-/* DMA Channel Register Offsets */
-#define DMA_MODE_SET 0x00000000
-#define DMA_MODE_READ DMA_MODE_SET
-#define DMA_MODE_CLEAR 0x00000004
-/* DMA Mode register bits follow */
-#define DMA_DAH_MASK (0x0f << 20)
-#define DMA_DID_BIT 16
-#define DMA_DID_MASK (0x0f << DMA_DID_BIT)
-#define DMA_BE (1<<13)
-#define DMA_DR (1<<12)
-#define DMA_TS8 (1<<11)
-#define DMA_DW_BIT 9
-#define DMA_DW_MASK (0x03 << DMA_DW_BIT)
-#define DMA_DW8 (0 << DMA_DW_BIT)
-#define DMA_DW16 (1 << DMA_DW_BIT)
-#define DMA_DW32 (2 << DMA_DW_BIT)
-#define DMA_NC (1<<8)
-#define DMA_IE (1<<7)
-#define DMA_HALT (1<<6)
-#define DMA_GO (1<<5)
-#define DMA_AB (1<<4)
-#define DMA_D1 (1<<3)
-#define DMA_BE1 (1<<2)
-#define DMA_D0 (1<<1)
-#define DMA_BE0 (1<<0)
-
-#define DMA_PERIPHERAL_ADDR 0x00000008
-#define DMA_BUFFER0_START 0x0000000C
-#define DMA_BUFFER1_START 0x00000014
-#define DMA_BUFFER0_COUNT 0x00000010
-#define DMA_BUFFER1_COUNT 0x00000018
-#define DMA_BAH_BIT 16
-#define DMA_BAH_MASK (0x0f << DMA_BAH_BIT)
-#define DMA_COUNT_BIT 0
-#define DMA_COUNT_MASK (0xffff << DMA_COUNT_BIT)
-
-/* DMA Device ID's follow */
-enum {
- DMA_ID_UART0_TX = 0,
- DMA_ID_UART0_RX,
- DMA_ID_GP04,
- DMA_ID_GP05,
- DMA_ID_AC97C_TX,
- DMA_ID_AC97C_RX,
- DMA_ID_UART3_TX,
- DMA_ID_UART3_RX,
- DMA_ID_USBDEV_EP0_RX,
- DMA_ID_USBDEV_EP0_TX,
- DMA_ID_USBDEV_EP2_TX,
- DMA_ID_USBDEV_EP3_TX,
- DMA_ID_USBDEV_EP4_RX,
- DMA_ID_USBDEV_EP5_RX,
- DMA_ID_I2S_TX,
- DMA_ID_I2S_RX,
- DMA_NUM_DEV
-};
-
-struct dma_chan {
- int dev_id; // this channel is allocated if >=0, free otherwise
- unsigned int io;
- const char *dev_str;
- int irq;
- void *irq_dev;
- unsigned int fifo_addr;
- unsigned int mode;
-};
-
-/* These are in arch/mips/au1000/common/dma.c */
-extern struct dma_chan au1000_dma_table[];
-extern int request_au1000_dma(int dev_id,
- const char *dev_str,
- void (*irqhandler)(int, void *,
- struct pt_regs *),
- unsigned long irqflags,
- void *irq_dev_id);
-extern void free_au1000_dma(unsigned int dmanr);
-extern int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
- int length, int *eof, void *data);
-extern void dump_au1000_dma_channel(unsigned int dmanr);
-extern spinlock_t au1000_dma_spin_lock;
-
-
-static __inline__ struct dma_chan *get_dma_chan(unsigned int dmanr)
-{
- if (dmanr > NUM_AU1000_DMA_CHANNELS
- || au1000_dma_table[dmanr].dev_id < 0)
- return NULL;
- return &au1000_dma_table[dmanr];
-}
-
-static __inline__ unsigned long claim_dma_lock(void)
-{
- unsigned long flags;
- spin_lock_irqsave(&au1000_dma_spin_lock, flags);
- return flags;
-}
-
-static __inline__ void release_dma_lock(unsigned long flags)
-{
- spin_unlock_irqrestore(&au1000_dma_spin_lock, flags);
-}
-
-/*
- * Set the DMA buffer enable bits in the mode register.
- */
-static __inline__ void enable_dma_buffer0(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
- au_writel(DMA_BE0, chan->io + DMA_MODE_SET);
-}
-static __inline__ void enable_dma_buffer1(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
- au_writel(DMA_BE1, chan->io + DMA_MODE_SET);
-}
-static __inline__ void enable_dma_buffers(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
- au_writel(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET);
-}
-
-static __inline__ void start_dma(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
-
- au_writel(DMA_GO, chan->io + DMA_MODE_SET);
-}
-
-#define DMA_HALT_POLL 0x5000
-
-static __inline__ void halt_dma(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- int i;
- if (!chan)
- return;
-
- au_writel(DMA_GO, chan->io + DMA_MODE_CLEAR);
- // poll the halt bit
- for (i = 0; i < DMA_HALT_POLL; i++)
- if (au_readl(chan->io + DMA_MODE_READ) & DMA_HALT)
- break;
- if (i == DMA_HALT_POLL)
- printk(KERN_INFO "halt_dma: HALT poll expired!\n");
-}
-
-
-static __inline__ void disable_dma(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
-
- halt_dma(dmanr);
-
- // now we can disable the buffers
- au_writel(~DMA_GO, chan->io + DMA_MODE_CLEAR);
-}
-
-static __inline__ int dma_halted(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return 1;
- return (au_readl(chan->io + DMA_MODE_READ) & DMA_HALT) ? 1 : 0;
-}
-
-/* initialize a DMA channel */
-static __inline__ void init_dma(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- u32 mode;
- if (!chan)
- return;
-
- disable_dma(dmanr);
-
- // set device FIFO address
- au_writel(PHYSADDR(chan->fifo_addr),
- chan->io + DMA_PERIPHERAL_ADDR);
-
- mode = chan->mode | (chan->dev_id << DMA_DID_BIT);
- if (chan->irq)
- mode |= DMA_IE;
-
- au_writel(~mode, chan->io + DMA_MODE_CLEAR);
- au_writel(mode, chan->io + DMA_MODE_SET);
-}
-
-/*
- * set mode for a specific DMA channel
- */
-static __inline__ void set_dma_mode(unsigned int dmanr, unsigned int mode)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
- /*
- * set_dma_mode is only allowed to change endianess, direction,
- * transfer size, device FIFO width, and coherency settings.
- * Make sure anything else is masked off.
- */
- mode &= (DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC);
- chan->mode &= ~(DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC);
- chan->mode |= mode;
-}
-
-static __inline__ unsigned int get_dma_mode(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return 0;
- return chan->mode;
-}
-
-static __inline__ int get_dma_active_buffer(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return -1;
- return (au_readl(chan->io + DMA_MODE_READ) & DMA_AB) ? 1 : 0;
-}
-
-
-/*
- * set the device FIFO address for a specific DMA channel - only
- * applicable to GPO4 and GPO5. All the other devices have fixed
- * FIFO addresses.
- */
-static __inline__ void set_dma_fifo_addr(unsigned int dmanr,
- unsigned int a)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
-
- if (chan->dev_id != DMA_ID_GP04 && chan->dev_id != DMA_ID_GP05)
- return;
-
- au_writel(PHYSADDR(a), chan->io + DMA_PERIPHERAL_ADDR);
-}
-
-/*
- * Clear the DMA buffer done bits in the mode register.
- */
-static __inline__ void clear_dma_done0(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
- au_writel(DMA_D0, chan->io + DMA_MODE_CLEAR);
-}
-static __inline__ void clear_dma_done1(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
- au_writel(DMA_D1, chan->io + DMA_MODE_CLEAR);
-}
-
-/*
- * This does nothing - not applicable to Au1000 DMA.
- */
-static __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
-{
-}
-
-/*
- * Set Buffer 0 transfer address for specific DMA channel.
- */
-static __inline__ void set_dma_addr0(unsigned int dmanr, unsigned int a)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
- au_writel(a, chan->io + DMA_BUFFER0_START);
-}
-
-/*
- * Set Buffer 1 transfer address for specific DMA channel.
- */
-static __inline__ void set_dma_addr1(unsigned int dmanr, unsigned int a)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
- au_writel(a, chan->io + DMA_BUFFER1_START);
-}
-
-
-/*
- * Set Buffer 0 transfer size (max 64k) for a specific DMA channel.
- */
-static __inline__ void set_dma_count0(unsigned int dmanr,
- unsigned int count)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
- count &= DMA_COUNT_MASK;
- au_writel(count, chan->io + DMA_BUFFER0_COUNT);
-}
-
-/*
- * Set Buffer 1 transfer size (max 64k) for a specific DMA channel.
- */
-static __inline__ void set_dma_count1(unsigned int dmanr,
- unsigned int count)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
- count &= DMA_COUNT_MASK;
- au_writel(count, chan->io + DMA_BUFFER1_COUNT);
-}
-
-/*
- * Set both buffer transfer sizes (max 64k) for a specific DMA channel.
- */
-static __inline__ void set_dma_count(unsigned int dmanr,
- unsigned int count)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return;
- count &= DMA_COUNT_MASK;
- au_writel(count, chan->io + DMA_BUFFER0_COUNT);
- au_writel(count, chan->io + DMA_BUFFER1_COUNT);
-}
-
-/*
- * Returns which buffer has its done bit set in the mode register.
- * Returns -1 if neither or both done bits set.
- */
-static __inline__ unsigned int get_dma_buffer_done(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return 0;
-
- return au_readl(chan->io + DMA_MODE_READ) & (DMA_D0 | DMA_D1);
-}
-
-
-/*
- * Returns the DMA channel's Buffer Done IRQ number.
- */
-static __inline__ int get_dma_done_irq(unsigned int dmanr)
-{
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return -1;
-
- return chan->irq;
-}
-
-/*
- * Get DMA residue count. Returns the number of _bytes_ left to transfer.
- */
-static __inline__ int get_dma_residue(unsigned int dmanr)
-{
- int curBufCntReg, count;
- struct dma_chan *chan = get_dma_chan(dmanr);
- if (!chan)
- return 0;
-
- curBufCntReg = (au_readl(chan->io + DMA_MODE_READ) & DMA_AB) ?
- DMA_BUFFER1_COUNT : DMA_BUFFER0_COUNT;
-
- count = au_readl(chan->io + curBufCntReg) & DMA_COUNT_MASK;
-
- if ((chan->mode & DMA_DW_MASK) == DMA_DW16)
- count <<= 1;
- else if ((chan->mode & DMA_DW_MASK) == DMA_DW32)
- count <<= 2;
-
- return count;
-}
-
-#endif /* __ASM_AU1000_DMA_H */
diff -puN -L include/asm-mips/au1000_gpio.h include/asm-mips/au1000_gpio.h~mips-megapatch /dev/null
--- 25/include/asm-mips/au1000_gpio.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,56 +0,0 @@
-/*
- * FILE NAME au1000_gpio.h
- *
- * BRIEF MODULE DESCRIPTION
- * API to Alchemy Au1000 GPIO device.
- *
- * Author: MontaVista Software, Inc. <source@mvista.com>
- * Steve Longerbeam <stevel@mvista.com>
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __AU1000_GPIO_H
-#define __AU1000_GPIO_H
-
-#include <linux/ioctl.h>
-
-#define AU1000GPIO_IOC_MAGIC 'A'
-
-#define AU1000GPIO_IN _IOR (AU1000GPIO_IOC_MAGIC, 0, int)
-#define AU1000GPIO_SET _IOW (AU1000GPIO_IOC_MAGIC, 1, int)
-#define AU1000GPIO_CLEAR _IOW (AU1000GPIO_IOC_MAGIC, 2, int)
-#define AU1000GPIO_OUT _IOW (AU1000GPIO_IOC_MAGIC, 3, int)
-#define AU1000GPIO_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 4, int)
-#define AU1000GPIO_AVAIL_MASK _IOR (AU1000GPIO_IOC_MAGIC, 5, int)
-
-#ifdef __KERNEL__
-extern u32 get_au1000_avail_gpio_mask(void);
-extern int au1000gpio_tristate(u32 data);
-extern int au1000gpio_in(u32 *data);
-extern int au1000gpio_set(u32 data);
-extern int au1000gpio_clear(u32 data);
-extern int au1000gpio_out(u32 data);
-#endif
-
-#endif
diff -puN -L include/asm-mips/au1000.h include/asm-mips/au1000.h~mips-megapatch /dev/null
--- 25/include/asm-mips/au1000.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,1007 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Include file for Alchemy Semiconductor's Au1k CPU.
- *
- * Copyright 2000,2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
- /*
- * some definitions add by takuzo@sm.sony.co.jp and sato@sm.sony.co.jp
- */
-
-#ifndef _AU1000_H_
-#define _AU1000_H_
-
-#include <linux/delay.h>
-#include <asm/io.h>
-
-/* cpu pipeline flush */
-void static inline au_sync(void)
-{
- __asm__ volatile ("sync");
-}
-
-void static inline au_sync_udelay(int us)
-{
- __asm__ volatile ("sync");
- udelay(us);
-}
-
-void static inline au_sync_delay(int ms)
-{
- __asm__ volatile ("sync");
- mdelay(ms);
-}
-
-void static inline au_writeb(u8 val, int reg)
-{
- *(volatile u8 *)(reg) = val;
-}
-
-void static inline au_writew(u16 val, int reg)
-{
- *(volatile u16 *)(reg) = val;
-}
-
-void static inline au_writel(u32 val, int reg)
-{
- *(volatile u32 *)(reg) = val;
-}
-
-static inline u8 au_readb(unsigned long port)
-{
- return (*(volatile u8 *)port);
-}
-
-static inline u16 au_readw(unsigned long port)
-{
- return (*(volatile u16 *)port);
-}
-
-static inline u32 au_readl(unsigned long port)
-{
- return (*(volatile u32 *)port);
-}
-
-/* arch/mips/au1000/common/clocks.c */
-extern void set_au1x00_speed(unsigned int new_freq);
-extern unsigned int get_au1x00_speed(void);
-extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
-extern unsigned long get_au1x00_uart_baud_base(void);
-extern void set_au1x00_lcd_clock(void);
-extern unsigned int get_au1x00_lcd_clock(void);
-
-#ifdef CONFIG_PM
-/* no CP0 timer irq */
-#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4)
-#else
-#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
-#endif
-
-/* SDRAM Controller */
-#define MEM_SDMODE0 0xB4000000
-#define MEM_SDMODE1 0xB4000004
-#define MEM_SDMODE2 0xB4000008
-
-#define MEM_SDADDR0 0xB400000C
-#define MEM_SDADDR1 0xB4000010
-#define MEM_SDADDR2 0xB4000014
-
-#define MEM_SDREFCFG 0xB4000018
-#define MEM_SDPRECMD 0xB400001C
-#define MEM_SDAUTOREF 0xB4000020
-
-#define MEM_SDWRMD0 0xB4000024
-#define MEM_SDWRMD1 0xB4000028
-#define MEM_SDWRMD2 0xB400002C
-
-#define MEM_SDSLEEP 0xB4000030
-#define MEM_SDSMCKE 0xB4000034
-
-/* Static Bus Controller */
-#define MEM_STCFG0 0xB4001000
-#define MEM_STTIME0 0xB4001004
-#define MEM_STADDR0 0xB4001008
-
-#define MEM_STCFG1 0xB4001010
-#define MEM_STTIME1 0xB4001014
-#define MEM_STADDR1 0xB4001018
-
-#define MEM_STCFG2 0xB4001020
-#define MEM_STTIME2 0xB4001024
-#define MEM_STADDR2 0xB4001028
-
-#define MEM_STCFG3 0xB4001030
-#define MEM_STTIME3 0xB4001034
-#define MEM_STADDR3 0xB4001038
-
-/* Interrupt Controller 0 */
-#define IC0_CFG0RD 0xB0400040
-#define IC0_CFG0SET 0xB0400040
-#define IC0_CFG0CLR 0xB0400044
-
-#define IC0_CFG1RD 0xB0400048
-#define IC0_CFG1SET 0xB0400048
-#define IC0_CFG1CLR 0xB040004C
-
-#define IC0_CFG2RD 0xB0400050
-#define IC0_CFG2SET 0xB0400050
-#define IC0_CFG2CLR 0xB0400054
-
-#define IC0_REQ0INT 0xB0400054
-#define IC0_SRCRD 0xB0400058
-#define IC0_SRCSET 0xB0400058
-#define IC0_SRCCLR 0xB040005C
-#define IC0_REQ1INT 0xB040005C
-
-#define IC0_ASSIGNRD 0xB0400060
-#define IC0_ASSIGNSET 0xB0400060
-#define IC0_ASSIGNCLR 0xB0400064
-
-#define IC0_WAKERD 0xB0400068
-#define IC0_WAKESET 0xB0400068
-#define IC0_WAKECLR 0xB040006C
-
-#define IC0_MASKRD 0xB0400070
-#define IC0_MASKSET 0xB0400070
-#define IC0_MASKCLR 0xB0400074
-
-#define IC0_RISINGRD 0xB0400078
-#define IC0_RISINGCLR 0xB0400078
-#define IC0_FALLINGRD 0xB040007C
-#define IC0_FALLINGCLR 0xB040007C
-
-#define IC0_TESTBIT 0xB0400080
-
-/* Interrupt Controller 1 */
-#define IC1_CFG0RD 0xB1800040
-#define IC1_CFG0SET 0xB1800040
-#define IC1_CFG0CLR 0xB1800044
-
-#define IC1_CFG1RD 0xB1800048
-#define IC1_CFG1SET 0xB1800048
-#define IC1_CFG1CLR 0xB180004C
-
-#define IC1_CFG2RD 0xB1800050
-#define IC1_CFG2SET 0xB1800050
-#define IC1_CFG2CLR 0xB1800054
-
-#define IC1_REQ0INT 0xB1800054
-#define IC1_SRCRD 0xB1800058
-#define IC1_SRCSET 0xB1800058
-#define IC1_SRCCLR 0xB180005C
-#define IC1_REQ1INT 0xB180005C
-
-#define IC1_ASSIGNRD 0xB1800060
-#define IC1_ASSIGNSET 0xB1800060
-#define IC1_ASSIGNCLR 0xB1800064
-
-#define IC1_WAKERD 0xB1800068
-#define IC1_WAKESET 0xB1800068
-#define IC1_WAKECLR 0xB180006C
-
-#define IC1_MASKRD 0xB1800070
-#define IC1_MASKSET 0xB1800070
-#define IC1_MASKCLR 0xB1800074
-
-#define IC1_RISINGRD 0xB1800078
-#define IC1_RISINGCLR 0xB1800078
-#define IC1_FALLINGRD 0xB180007C
-#define IC1_FALLINGCLR 0xB180007C
-
-#define IC1_TESTBIT 0xB1800080
-
-/* Interrupt Configuration Modes */
-#define INTC_INT_DISABLED 0
-#define INTC_INT_RISE_EDGE 0x1
-#define INTC_INT_FALL_EDGE 0x2
-#define INTC_INT_RISE_AND_FALL_EDGE 0x3
-#define INTC_INT_HIGH_LEVEL 0x5
-#define INTC_INT_LOW_LEVEL 0x6
-#define INTC_INT_HIGH_AND_LOW_LEVEL 0x7
-
-/* Interrupt Numbers */
-#define AU1000_UART0_INT 0
-#define AU1000_UART1_INT 1 /* au1000 */
-#define AU1000_UART2_INT 2 /* au1000 */
-
-#define AU1000_PCI_INTA 1 /* au1500 */
-#define AU1000_PCI_INTB 2 /* au1500 */
-
-#define AU1000_UART3_INT 3
-
-#define AU1000_SSI0_INT 4 /* au1000 */
-#define AU1000_SSI1_INT 5 /* au1000 */
-
-#define AU1000_PCI_INTC 4 /* au1500 */
-#define AU1000_PCI_INTD 5 /* au1500 */
-
-#define AU1000_DMA_INT_BASE 6
-#define AU1000_TOY_INT 14
-#define AU1000_TOY_MATCH0_INT 15
-#define AU1000_TOY_MATCH1_INT 16
-#define AU1000_TOY_MATCH2_INT 17
-#define AU1000_RTC_INT 18
-#define AU1000_RTC_MATCH0_INT 19
-#define AU1000_RTC_MATCH1_INT 20
-#define AU1000_RTC_MATCH2_INT 21
-#define AU1000_IRDA_TX_INT 22 /* au1000 */
-#define AU1000_IRDA_RX_INT 23 /* au1000 */
-#define AU1000_USB_DEV_REQ_INT 24
-#define AU1000_USB_DEV_SUS_INT 25
-#define AU1000_USB_HOST_INT 26
-#define AU1000_ACSYNC_INT 27
-#define AU1000_MAC0_DMA_INT 28
-#define AU1000_MAC1_DMA_INT 29
-#define AU1000_ETH0_IRQ AU1000_MAC0_DMA_INT
-#define AU1000_ETH1_IRQ AU1000_MAC1_DMA_INT
-#define AU1000_I2S_UO_INT 30 /* au1000 */
-#define AU1000_AC97C_INT 31
-#define AU1000_LAST_INTC0_INT AU1000_AC97C_INT
-#define AU1000_GPIO_0 32
-#define AU1000_GPIO_1 33
-#define AU1000_GPIO_2 34
-#define AU1000_GPIO_3 35
-#define AU1000_GPIO_4 36
-#define AU1000_GPIO_5 37
-#define AU1000_GPIO_6 38
-#define AU1000_GPIO_7 39
-#define AU1000_GPIO_8 40
-#define AU1000_GPIO_9 41
-#define AU1000_GPIO_10 42
-#define AU1000_GPIO_11 43
-#define AU1000_GPIO_12 44
-#define AU1000_GPIO_13 45
-#define AU1000_GPIO_14 46
-#define AU1000_GPIO_15 47
-
-/* Au1000 only */
-#define AU1000_GPIO_16 48
-#define AU1000_GPIO_17 49
-#define AU1000_GPIO_18 50
-#define AU1000_GPIO_19 51
-#define AU1000_GPIO_20 52
-#define AU1000_GPIO_21 53
-#define AU1000_GPIO_22 54
-#define AU1000_GPIO_23 55
-#define AU1000_GPIO_24 56
-#define AU1000_GPIO_25 57
-#define AU1000_GPIO_26 58
-#define AU1000_GPIO_27 59
-#define AU1000_GPIO_28 60
-#define AU1000_GPIO_29 61
-#define AU1000_GPIO_30 62
-#define AU1000_GPIO_31 63
-
-/* Au1500 only */
-#define AU1500_GPIO_200 48
-#define AU1500_GPIO_201 49
-#define AU1500_GPIO_202 50
-#define AU1500_GPIO_203 51
-#define AU1500_GPIO_20 52
-#define AU1500_GPIO_204 53
-#define AU1500_GPIO_205 54
-#define AU1500_GPIO_23 55
-#define AU1500_GPIO_24 56
-#define AU1500_GPIO_25 57
-#define AU1500_GPIO_26 58
-#define AU1500_GPIO_27 59
-#define AU1500_GPIO_28 60
-#define AU1500_GPIO_206 61
-#define AU1500_GPIO_207 62
-#define AU1500_GPIO_208_215 63
-
-#define AU1000_MAX_INTR 63
-
-#define AU1100_SD 2
-#define AU1100_GPIO_208_215 29
-// REDEFINE SECONDARY GPIO BLOCK INTO IC1 CONTROLLER HERE
-
-
-
-/* Programmable Counters 0 and 1 */
-#define SYS_BASE 0xB1900000
-#define SYS_COUNTER_CNTRL (SYS_BASE + 0x14)
- #define SYS_CNTRL_E1S (1<<23)
- #define SYS_CNTRL_T1S (1<<20)
- #define SYS_CNTRL_M21 (1<<19)
- #define SYS_CNTRL_M11 (1<<18)
- #define SYS_CNTRL_M01 (1<<17)
- #define SYS_CNTRL_C1S (1<<16)
- #define SYS_CNTRL_BP (1<<14)
- #define SYS_CNTRL_EN1 (1<<13)
- #define SYS_CNTRL_BT1 (1<<12)
- #define SYS_CNTRL_EN0 (1<<11)
- #define SYS_CNTRL_BT0 (1<<10)
- #define SYS_CNTRL_E0 (1<<8)
- #define SYS_CNTRL_E0S (1<<7)
- #define SYS_CNTRL_32S (1<<5)
- #define SYS_CNTRL_T0S (1<<4)
- #define SYS_CNTRL_M20 (1<<3)
- #define SYS_CNTRL_M10 (1<<2)
- #define SYS_CNTRL_M00 (1<<1)
- #define SYS_CNTRL_C0S (1<<0)
-
-/* Programmable Counter 0 Registers */
-#define SYS_TOYTRIM (SYS_BASE + 0)
-#define SYS_TOYWRITE (SYS_BASE + 4)
-#define SYS_TOYMATCH0 (SYS_BASE + 8)
-#define SYS_TOYMATCH1 (SYS_BASE + 0xC)
-#define SYS_TOYMATCH2 (SYS_BASE + 0x10)
-#define SYS_TOYREAD (SYS_BASE + 0x40)
-
-/* Programmable Counter 1 Registers */
-#define SYS_RTCTRIM (SYS_BASE + 0x44)
-#define SYS_RTCWRITE (SYS_BASE + 0x48)
-#define SYS_RTCMATCH0 (SYS_BASE + 0x4C)
-#define SYS_RTCMATCH1 (SYS_BASE + 0x50)
-#define SYS_RTCMATCH2 (SYS_BASE + 0x54)
-#define SYS_RTCREAD (SYS_BASE + 0x58)
-
-/* I2S Controller */
-#define I2S_DATA 0xB1000000
- #define I2S_DATA_MASK (0xffffff)
-#define I2S_CONFIG 0xB1000004
- #define I2S_CONFIG_XU (1<<25)
- #define I2S_CONFIG_XO (1<<24)
- #define I2S_CONFIG_RU (1<<23)
- #define I2S_CONFIG_RO (1<<22)
- #define I2S_CONFIG_TR (1<<21)
- #define I2S_CONFIG_TE (1<<20)
- #define I2S_CONFIG_TF (1<<19)
- #define I2S_CONFIG_RR (1<<18)
- #define I2S_CONFIG_RE (1<<17)
- #define I2S_CONFIG_RF (1<<16)
- #define I2S_CONFIG_PD (1<<11)
- #define I2S_CONFIG_LB (1<<10)
- #define I2S_CONFIG_IC (1<<9)
- #define I2S_CONFIG_FM_BIT 7
- #define I2S_CONFIG_FM_MASK (0x3 << I2S_CONFIG_FM_BIT)
- #define I2S_CONFIG_FM_I2S (0x0 << I2S_CONFIG_FM_BIT)
- #define I2S_CONFIG_FM_LJ (0x1 << I2S_CONFIG_FM_BIT)
- #define I2S_CONFIG_FM_RJ (0x2 << I2S_CONFIG_FM_BIT)
- #define I2S_CONFIG_TN (1<<6)
- #define I2S_CONFIG_RN (1<<5)
- #define I2S_CONFIG_SZ_BIT 0
- #define I2S_CONFIG_SZ_MASK (0x1F << I2S_CONFIG_SZ_BIT)
-
-#define I2S_CONTROL 0xB1000008
- #define I2S_CONTROL_D (1<<1)
- #define I2S_CONTROL_CE (1<<0)
-
-/* USB Host Controller */
-// We pass USB_OHCI_BASE to ioremap, so it needs to be a physical address
-#define USB_OHCI_BASE 0x10100000
-#define USB_OHCI_LEN 0x00100000
-#define USB_HOST_CONFIG 0xB017fffc
-
-/* USB Device Controller */
-#define USBD_EP0RD 0xB0200000
-#define USBD_EP0WR 0xB0200004
-#define USBD_EP2WR 0xB0200008
-#define USBD_EP3WR 0xB020000C
-#define USBD_EP4RD 0xB0200010
-#define USBD_EP5RD 0xB0200014
-#define USBD_INTEN 0xB0200018
-#define USBD_INTSTAT 0xB020001C
- #define USBDEV_INT_SOF (1<<12)
- #define USBDEV_INT_HF_BIT 6
- #define USBDEV_INT_HF_MASK (0x3f << USBDEV_INT_HF_BIT)
- #define USBDEV_INT_CMPLT_BIT 0
- #define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT)
-#define USBD_CONFIG 0xB0200020
-#define USBD_EP0CS 0xB0200024
-#define USBD_EP2CS 0xB0200028
-#define USBD_EP3CS 0xB020002C
-#define USBD_EP4CS 0xB0200030
-#define USBD_EP5CS 0xB0200034
- #define USBDEV_CS_SU (1<<14)
- #define USBDEV_CS_NAK (1<<13)
- #define USBDEV_CS_ACK (1<<12)
- #define USBDEV_CS_BUSY (1<<11)
- #define USBDEV_CS_TSIZE_BIT 1
- #define USBDEV_CS_TSIZE_MASK (0x3ff << USBDEV_CS_TSIZE_BIT)
- #define USBDEV_CS_STALL (1<<0)
-#define USBD_EP0RDSTAT 0xB0200040
-#define USBD_EP0WRSTAT 0xB0200044
-#define USBD_EP2WRSTAT 0xB0200048
-#define USBD_EP3WRSTAT 0xB020004C
-#define USBD_EP4RDSTAT 0xB0200050
-#define USBD_EP5RDSTAT 0xB0200054
- #define USBDEV_FSTAT_FLUSH (1<<6)
- #define USBDEV_FSTAT_UF (1<<5)
- #define USBDEV_FSTAT_OF (1<<4)
- #define USBDEV_FSTAT_FCNT_BIT 0
- #define USBDEV_FSTAT_FCNT_MASK (0x0f << USBDEV_FSTAT_FCNT_BIT)
-#define USBD_ENABLE 0xB0200058
- #define USBDEV_ENABLE (1<<1)
- #define USBDEV_CE (1<<0)
-
-/* Ethernet Controllers */
-#define AU1000_ETH0_BASE 0xB0500000
-#define AU1000_ETH1_BASE 0xB0510000
-#define AU1500_ETH0_BASE 0xB1500000
-#define AU1500_ETH1_BASE 0xB1510000
-#define AU1100_ETH0_BASE 0xB0500000
-
-/* 4 byte offsets from AU1000_ETH_BASE */
-#define MAC_CONTROL 0x0
- #define MAC_RX_ENABLE (1<<2)
- #define MAC_TX_ENABLE (1<<3)
- #define MAC_DEF_CHECK (1<<5)
- #define MAC_SET_BL(X) (((X)&0x3)<<6)
- #define MAC_AUTO_PAD (1<<8)
- #define MAC_DISABLE_RETRY (1<<10)
- #define MAC_DISABLE_BCAST (1<<11)
- #define MAC_LATE_COL (1<<12)
- #define MAC_HASH_MODE (1<<13)
- #define MAC_HASH_ONLY (1<<15)
- #define MAC_PASS_ALL (1<<16)
- #define MAC_INVERSE_FILTER (1<<17)
- #define MAC_PROMISCUOUS (1<<18)
- #define MAC_PASS_ALL_MULTI (1<<19)
- #define MAC_FULL_DUPLEX (1<<20)
- #define MAC_NORMAL_MODE 0
- #define MAC_INT_LOOPBACK (1<<21)
- #define MAC_EXT_LOOPBACK (1<<22)
- #define MAC_DISABLE_RX_OWN (1<<23)
- #define MAC_BIG_ENDIAN (1<<30)
- #define MAC_RX_ALL (1<<31)
-#define MAC_ADDRESS_HIGH 0x4
-#define MAC_ADDRESS_LOW 0x8
-#define MAC_MCAST_HIGH 0xC
-#define MAC_MCAST_LOW 0x10
-#define MAC_MII_CNTRL 0x14
- #define MAC_MII_BUSY (1<<0)
- #define MAC_MII_READ 0
- #define MAC_MII_WRITE (1<<1)
- #define MAC_SET_MII_SELECT_REG(X) (((X)&0x1f)<<6)
- #define MAC_SET_MII_SELECT_PHY(X) (((X)&0x1f)<<11)
-#define MAC_MII_DATA 0x18
-#define MAC_FLOW_CNTRL 0x1C
- #define MAC_FLOW_CNTRL_BUSY (1<<0)
- #define MAC_FLOW_CNTRL_ENABLE (1<<1)
- #define MAC_PASS_CONTROL (1<<2)
- #define MAC_SET_PAUSE(X) (((X)&0xffff)<<16)
-#define MAC_VLAN1_TAG 0x20
-#define MAC_VLAN2_TAG 0x24
-
-/* Ethernet Controller Enable */
-#define AU1000_MAC0_ENABLE 0xB0520000
-#define AU1000_MAC1_ENABLE 0xB0520004
-#define AU1500_MAC0_ENABLE 0xB1520000
-#define AU1500_MAC1_ENABLE 0xB1520004
-#define AU1100_MAC0_ENABLE 0xB0520000
-
- #define MAC_EN_CLOCK_ENABLE (1<<0)
- #define MAC_EN_RESET0 (1<<1)
- #define MAC_EN_TOSS (0<<2)
- #define MAC_EN_CACHEABLE (1<<3)
- #define MAC_EN_RESET1 (1<<4)
- #define MAC_EN_RESET2 (1<<5)
- #define MAC_DMA_RESET (1<<6)
-
-/* Ethernet Controller DMA Channels */
-
-#define MAC0_TX_DMA_ADDR 0xB4004000
-#define MAC1_TX_DMA_ADDR 0xB4004200
-/* offsets from MAC_TX_RING_ADDR address */
-#define MAC_TX_BUFF0_STATUS 0x0
- #define TX_FRAME_ABORTED (1<<0)
- #define TX_JAB_TIMEOUT (1<<1)
- #define TX_NO_CARRIER (1<<2)
- #define TX_LOSS_CARRIER (1<<3)
- #define TX_EXC_DEF (1<<4)
- #define TX_LATE_COLL_ABORT (1<<5)
- #define TX_EXC_COLL (1<<6)
- #define TX_UNDERRUN (1<<7)
- #define TX_DEFERRED (1<<8)
- #define TX_LATE_COLL (1<<9)
- #define TX_COLL_CNT_MASK (0xF<<10)
- #define TX_PKT_RETRY (1<<31)
-#define MAC_TX_BUFF0_ADDR 0x4
- #define TX_DMA_ENABLE (1<<0)
- #define TX_T_DONE (1<<1)
- #define TX_GET_DMA_BUFFER(X) (((X)>>2)&0x3)
-#define MAC_TX_BUFF0_LEN 0x8
-#define MAC_TX_BUFF1_STATUS 0x10
-#define MAC_TX_BUFF1_ADDR 0x14
-#define MAC_TX_BUFF1_LEN 0x18
-#define MAC_TX_BUFF2_STATUS 0x20
-#define MAC_TX_BUFF2_ADDR 0x24
-#define MAC_TX_BUFF2_LEN 0x28
-#define MAC_TX_BUFF3_STATUS 0x30
-#define MAC_TX_BUFF3_ADDR 0x34
-#define MAC_TX_BUFF3_LEN 0x38
-
-#define MAC0_RX_DMA_ADDR 0xB4004100
-#define MAC1_RX_DMA_ADDR 0xB4004300
-/* offsets from MAC_RX_RING_ADDR */
-#define MAC_RX_BUFF0_STATUS 0x0
- #define RX_FRAME_LEN_MASK 0x3fff
- #define RX_WDOG_TIMER (1<<14)
- #define RX_RUNT (1<<15)
- #define RX_OVERLEN (1<<16)
- #define RX_COLL (1<<17)
- #define RX_ETHER (1<<18)
- #define RX_MII_ERROR (1<<19)
- #define RX_DRIBBLING (1<<20)
- #define RX_CRC_ERROR (1<<21)
- #define RX_VLAN1 (1<<22)
- #define RX_VLAN2 (1<<23)
- #define RX_LEN_ERROR (1<<24)
- #define RX_CNTRL_FRAME (1<<25)
- #define RX_U_CNTRL_FRAME (1<<26)
- #define RX_MCAST_FRAME (1<<27)
- #define RX_BCAST_FRAME (1<<28)
- #define RX_FILTER_FAIL (1<<29)
- #define RX_PACKET_FILTER (1<<30)
- #define RX_MISSED_FRAME (1<<31)
-
- #define RX_ERROR (RX_WDOG_TIMER | RX_RUNT | RX_OVERLEN | \
- RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \
- RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME)
-#define MAC_RX_BUFF0_ADDR 0x4
- #define RX_DMA_ENABLE (1<<0)
- #define RX_T_DONE (1<<1)
- #define RX_GET_DMA_BUFFER(X) (((X)>>2)&0x3)
- #define RX_SET_BUFF_ADDR(X) ((X)&0xffffffc0)
-#define MAC_RX_BUFF1_STATUS 0x10
-#define MAC_RX_BUFF1_ADDR 0x14
-#define MAC_RX_BUFF2_STATUS 0x20
-#define MAC_RX_BUFF2_ADDR 0x24
-#define MAC_RX_BUFF3_STATUS 0x30
-#define MAC_RX_BUFF3_ADDR 0x34
-
-
-/* UARTS 0-3 */
-#define UART0_ADDR 0xB1100000
-#define UART1_ADDR 0xB1200000
-#define UART2_ADDR 0xB1300000
-#define UART3_ADDR 0xB1400000
-#define UART_BASE UART0_ADDR
-#define UART_DEBUG_BASE UART2_ADDR
-
-#define UART_RX 0 /* Receive buffer */
-#define UART_TX 4 /* Transmit buffer */
-#define UART_IER 8 /* Interrupt Enable Register */
-#define UART_IIR 0xC /* Interrupt ID Register */
-#define UART_FCR 0x10 /* FIFO Control Register */
-#define UART_LCR 0x14 /* Line Control Register */
-#define UART_MCR 0x18 /* Modem Control Register */
-#define UART_LSR 0x1C /* Line Status Register */
-#define UART_MSR 0x20 /* Modem Status Register */
-#define UART_CLK 0x28 /* Baud Rate Clock Divider */
-#define UART_MOD_CNTRL 0x100 /* Module Control */
-
-#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */
-#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
-#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
-#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */
-#define UART_FCR_TRIGGER_MASK 0xF0 /* Mask for the FIFO trigger range */
-#define UART_FCR_R_TRIGGER_1 0x00 /* Mask for receive trigger set at 1 */
-#define UART_FCR_R_TRIGGER_4 0x40 /* Mask for receive trigger set at 4 */
-#define UART_FCR_R_TRIGGER_8 0x80 /* Mask for receive trigger set at 8 */
-#define UART_FCR_R_TRIGGER_14 0xA0 /* Mask for receive trigger set at 14 */
-#define UART_FCR_T_TRIGGER_0 0x00 /* Mask for transmit trigger set at 0 */
-#define UART_FCR_T_TRIGGER_4 0x10 /* Mask for transmit trigger set at 4 */
-#define UART_FCR_T_TRIGGER_8 0x20 /* Mask for transmit trigger set at 8 */
-#define UART_FCR_T_TRIGGER_12 0x30 /* Mask for transmit trigger set at 12 */
-
-/*
- * These are the definitions for the Line Control Register
- */
-#define UART_LCR_SBC 0x40 /* Set break control */
-#define UART_LCR_SPAR 0x20 /* Stick parity (?) */
-#define UART_LCR_EPAR 0x10 /* Even parity select */
-#define UART_LCR_PARITY 0x08 /* Parity Enable */
-#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */
-#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */
-#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */
-#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */
-#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
-
-/*
- * These are the definitions for the Line Status Register
- */
-#define UART_LSR_TEMT 0x40 /* Transmitter empty */
-#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
-#define UART_LSR_BI 0x10 /* Break interrupt indicator */
-#define UART_LSR_FE 0x08 /* Frame error indicator */
-#define UART_LSR_PE 0x04 /* Parity error indicator */
-#define UART_LSR_OE 0x02 /* Overrun error indicator */
-#define UART_LSR_DR 0x01 /* Receiver data ready */
-
-/*
- * These are the definitions for the Interrupt Identification Register
- */
-#define UART_IIR_NO_INT 0x01 /* No interrupts pending */
-#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */
-#define UART_IIR_MSI 0x00 /* Modem status interrupt */
-#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */
-#define UART_IIR_RDI 0x04 /* Receiver data interrupt */
-#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
-
-/*
- * These are the definitions for the Interrupt Enable Register
- */
-#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
-#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
-#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
-#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
-
-/*
- * These are the definitions for the Modem Control Register
- */
-#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */
-#define UART_MCR_OUT2 0x08 /* Out2 complement */
-#define UART_MCR_OUT1 0x04 /* Out1 complement */
-#define UART_MCR_RTS 0x02 /* RTS complement */
-#define UART_MCR_DTR 0x01 /* DTR complement */
-
-/*
- * These are the definitions for the Modem Status Register
- */
-#define UART_MSR_DCD 0x80 /* Data Carrier Detect */
-#define UART_MSR_RI 0x40 /* Ring Indicator */
-#define UART_MSR_DSR 0x20 /* Data Set Ready */
-#define UART_MSR_CTS 0x10 /* Clear to Send */
-#define UART_MSR_DDCD 0x08 /* Delta DCD */
-#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */
-#define UART_MSR_DDSR 0x02 /* Delta DSR */
-#define UART_MSR_DCTS 0x01 /* Delta CTS */
-#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */
-
-
-
-/* SSIO */
-#define SSI0_STATUS 0xB1600000
- #define SSI_STATUS_BF (1<<4)
- #define SSI_STATUS_OF (1<<3)
- #define SSI_STATUS_UF (1<<2)
- #define SSI_STATUS_D (1<<1)
- #define SSI_STATUS_B (1<<0)
-#define SSI0_INT 0xB1600004
- #define SSI_INT_OI (1<<3)
- #define SSI_INT_UI (1<<2)
- #define SSI_INT_DI (1<<1)
-#define SSI0_INT_ENABLE 0xB1600008
- #define SSI_INTE_OIE (1<<3)
- #define SSI_INTE_UIE (1<<2)
- #define SSI_INTE_DIE (1<<1)
-#define SSI0_CONFIG 0xB1600020
- #define SSI_CONFIG_AO (1<<24)
- #define SSI_CONFIG_DO (1<<23)
- #define SSI_CONFIG_ALEN_BIT 20
- #define SSI_CONFIG_ALEN_MASK (0x7<<20)
- #define SSI_CONFIG_DLEN_BIT 16
- #define SSI_CONFIG_DLEN_MASK (0x7<<16)
- #define SSI_CONFIG_DD (1<<11)
- #define SSI_CONFIG_AD (1<<10)
- #define SSI_CONFIG_BM_BIT 8
- #define SSI_CONFIG_BM_MASK (0x3<<8)
- #define SSI_CONFIG_CE (1<<7)
- #define SSI_CONFIG_DP (1<<6)
- #define SSI_CONFIG_DL (1<<5)
- #define SSI_CONFIG_EP (1<<4)
-#define SSI0_ADATA 0xB1600024
- #define SSI_AD_D (1<<24)
- #define SSI_AD_ADDR_BIT 16
- #define SSI_AD_ADDR_MASK (0xff<<16)
- #define SSI_AD_DATA_BIT 0
- #define SSI_AD_DATA_MASK (0xfff<<0)
-#define SSI0_CLKDIV 0xB1600028
-#define SSI0_CONTROL 0xB1600100
- #define SSI_CONTROL_CD (1<<1)
- #define SSI_CONTROL_E (1<<0)
-
-/* SSI1 */
-#define SSI1_STATUS 0xB1680000
-#define SSI1_INT 0xB1680004
-#define SSI1_INT_ENABLE 0xB1680008
-#define SSI1_CONFIG 0xB1680020
-#define SSI1_ADATA 0xB1680024
-#define SSI1_CLKDIV 0xB1680028
-#define SSI1_ENABLE 0xB1680100
-
-/*
- * Register content definitions
- */
-#define SSI_STATUS_BF (1<<4)
-#define SSI_STATUS_OF (1<<3)
-#define SSI_STATUS_UF (1<<2)
-#define SSI_STATUS_D (1<<1)
-#define SSI_STATUS_B (1<<0)
-
-/* SSI_INT */
-#define SSI_INT_OI (1<<3)
-#define SSI_INT_UI (1<<2)
-#define SSI_INT_DI (1<<1)
-
-/* SSI_INTEN */
-#define SSI_INTEN_OIE (1<<3)
-#define SSI_INTEN_UIE (1<<2)
-#define SSI_INTEN_DIE (1<<1)
-
-#define SSI_CONFIG_AO (1<<24)
-#define SSI_CONFIG_DO (1<<23)
-#define SSI_CONFIG_ALEN (7<<20)
-#define SSI_CONFIG_DLEN (15<<16)
-#define SSI_CONFIG_DD (1<<11)
-#define SSI_CONFIG_AD (1<<10)
-#define SSI_CONFIG_BM (3<<8)
-#define SSI_CONFIG_CE (1<<7)
-#define SSI_CONFIG_DP (1<<6)
-#define SSI_CONFIG_DL (1<<5)
-#define SSI_CONFIG_EP (1<<4)
-#define SSI_CONFIG_ALEN_N(N) ((N-1)<<20)
-#define SSI_CONFIG_DLEN_N(N) ((N-1)<<16)
-#define SSI_CONFIG_BM_HI (0<<8)
-#define SSI_CONFIG_BM_LO (1<<8)
-#define SSI_CONFIG_BM_CY (2<<8)
-
-#define SSI_ADATA_D (1<<24)
-#define SSI_ADATA_ADDR (0xFF<<16)
-#define SSI_ADATA_DATA (0x0FFF)
-#define SSI_ADATA_ADDR_N(N) (N<<16)
-
-#define SSI_ENABLE_CD (1<<1)
-#define SSI_ENABLE_E (1<<0)
-
-
-/* IrDA Controller */
-#define IRDA_BASE 0xB0300000
-#define IR_RING_PTR_STATUS (IRDA_BASE+0x00)
-#define IR_RING_BASE_ADDR_H (IRDA_BASE+0x04)
-#define IR_RING_BASE_ADDR_L (IRDA_BASE+0x08)
-#define IR_RING_SIZE (IRDA_BASE+0x0C)
-#define IR_RING_PROMPT (IRDA_BASE+0x10)
-#define IR_RING_ADDR_CMPR (IRDA_BASE+0x14)
-#define IR_INT_CLEAR (IRDA_BASE+0x18)
-#define IR_CONFIG_1 (IRDA_BASE+0x20)
- #define IR_RX_INVERT_LED (1<<0)
- #define IR_TX_INVERT_LED (1<<1)
- #define IR_ST (1<<2)
- #define IR_SF (1<<3)
- #define IR_SIR (1<<4)
- #define IR_MIR (1<<5)
- #define IR_FIR (1<<6)
- #define IR_16CRC (1<<7)
- #define IR_TD (1<<8)
- #define IR_RX_ALL (1<<9)
- #define IR_DMA_ENABLE (1<<10)
- #define IR_RX_ENABLE (1<<11)
- #define IR_TX_ENABLE (1<<12)
- #define IR_LOOPBACK (1<<14)
- #define IR_SIR_MODE (IR_SIR | IR_DMA_ENABLE | \
- IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC)
-#define IR_SIR_FLAGS (IRDA_BASE+0x24)
-#define IR_ENABLE (IRDA_BASE+0x28)
- #define IR_RX_STATUS (1<<9)
- #define IR_TX_STATUS (1<<10)
-#define IR_READ_PHY_CONFIG (IRDA_BASE+0x2C)
-#define IR_WRITE_PHY_CONFIG (IRDA_BASE+0x30)
-#define IR_MAX_PKT_LEN (IRDA_BASE+0x34)
-#define IR_RX_BYTE_CNT (IRDA_BASE+0x38)
-#define IR_CONFIG_2 (IRDA_BASE+0x3C)
- #define IR_MODE_INV (1<<0)
- #define IR_ONE_PIN (1<<1)
-#define IR_INTERFACE_CONFIG (IRDA_BASE+0x40)
-
-/* GPIO */
-#define SYS_PINFUNC 0xB190002C
- #define SYS_PF_USB (1<<15) /* 2nd USB device/host */
- #define SYS_PF_U3 (1<<14) /* GPIO23/U3TXD */
- #define SYS_PF_U2 (1<<13) /* GPIO22/U2TXD */
- #define SYS_PF_U1 (1<<12) /* GPIO21/U1TXD */
- #define SYS_PF_SRC (1<<11) /* GPIO6/SROMCKE */
- #define SYS_PF_CK5 (1<<10) /* GPIO3/CLK5 */
- #define SYS_PF_CK4 (1<<9) /* GPIO2/CLK4 */
- #define SYS_PF_IRF (1<<8) /* GPIO15/IRFIRSEL */
- #define SYS_PF_UR3 (1<<7) /* GPIO[14:9]/UART3 */
- #define SYS_PF_I2D (1<<6) /* GPIO8/I2SDI */
- #define SYS_PF_I2S (1<<5) /* I2S/GPIO[29:31] */
- #define SYS_PF_NI2 (1<<4) /* NI2/GPIO[24:28] */
- #define SYS_PF_U0 (1<<3) /* U0TXD/GPIO20 */
- #define SYS_PF_RD (1<<2) /* IRTXD/GPIO19 */
- #define SYS_PF_A97 (1<<1) /* AC97/SSL1 */
- #define SYS_PF_S0 (1<<0) /* SSI_0/GPIO[16:18] */
-#define SYS_TRIOUTRD 0xB1900100
-#define SYS_TRIOUTCLR 0xB1900100
-#define SYS_OUTPUTRD 0xB1900108
-#define SYS_OUTPUTSET 0xB1900108
-#define SYS_OUTPUTCLR 0xB190010C
-#define SYS_PINSTATERD 0xB1900110
-#define SYS_PININPUTEN 0xB1900110
-
-/* GPIO2, Au1500 only */
-#define GPIO2_BASE 0xB1700000
-#define GPIO2_DIR (GPIO2_BASE + 0)
-#define GPIO2_DATA_EN (GPIO2_BASE + 8)
-#define GPIO2_PIN_STATE (GPIO2_BASE + 0xC)
-#define GPIO2_INT_ENABLE (GPIO2_BASE + 0x10)
-#define GPIO2_ENABLE (GPIO2_BASE + 0x14)
-
-/* Power Management */
-#define SYS_SCRATCH0 0xB1900018
-#define SYS_SCRATCH1 0xB190001C
-#define SYS_WAKEMSK 0xB1900034
-#define SYS_ENDIAN 0xB1900038
-#define SYS_POWERCTRL 0xB190003C
-#define SYS_WAKESRC 0xB190005C
-#define SYS_SLPPWR 0xB1900078
-#define SYS_SLEEP 0xB190007C
-
-/* Clock Controller */
-#define SYS_FREQCTRL0 0xB1900020
- #define SYS_FC_FRDIV2_BIT 22
- #define SYS_FC_FRDIV2_MASK (0xff << FQC2_FRDIV2_BIT)
- #define SYS_FC_FE2 (1<<21)
- #define SYS_FC_FS2 (1<<20)
- #define SYS_FC_FRDIV1_BIT 12
- #define SYS_FC_FRDIV1_MASK (0xff << FQC2_FRDIV1_BIT)
- #define SYS_FC_FE1 (1<<11)
- #define SYS_FC_FS1 (1<<10)
- #define SYS_FC_FRDIV0_BIT 2
- #define SYS_FC_FRDIV0_MASK (0xff << FQC2_FRDIV0_BIT)
- #define SYS_FC_FE0 (1<<1)
- #define SYS_FC_FS0 (1<<0)
-#define SYS_FREQCTRL1 0xB1900024
- #define SYS_FC_FRDIV5_BIT 22
- #define SYS_FC_FRDIV5_MASK (0xff << FQC2_FRDIV5_BIT)
- #define SYS_FC_FE5 (1<<21)
- #define SYS_FC_FS5 (1<<20)
- #define SYS_FC_FRDIV4_BIT 12
- #define SYS_FC_FRDIV4_MASK (0xff << FQC2_FRDIV4_BIT)
- #define SYS_FC_FE4 (1<<11)
- #define SYS_FC_FS4 (1<<10)
- #define SYS_FC_FRDIV3_BIT 2
- #define SYS_FC_FRDIV3_MASK (0xff << FQC2_FRDIV3_BIT)
- #define SYS_FC_FE3 (1<<1)
- #define SYS_FC_FS3 (1<<0)
-#define SYS_CLKSRC 0xB1900028
- #define SYS_CS_ME1_BIT 27
- #define SYS_CS_ME1_MASK (0x7<<CSC_ME1_BIT)
- #define SYS_CS_DE1 (1<<26)
- #define SYS_CS_CE1 (1<<25)
- #define SYS_CS_ME0_BIT 22
- #define SYS_CS_ME0_MASK (0x7<<CSC_ME0_BIT)
- #define SYS_CS_DE0 (1<<21)
- #define SYS_CS_CE0 (1<<20)
- #define SYS_CS_MI2_BIT 17
- #define SYS_CS_MI2_MASK (0x7<<CSC_MI2_BIT)
- #define SYS_CS_DI2 (1<<16)
- #define SYS_CS_CI2 (1<<15)
- #define SYS_CS_MUH_BIT 12
- #define SYS_CS_MUH_MASK (0x7<<CSC_MUH_BIT)
- #define SYS_CS_DUH (1<<11)
- #define SYS_CS_CUH (1<<10)
- #define SYS_CS_MUD_BIT 7
- #define SYS_CS_MUD_MASK (0x7<<CSC_MUD_BIT)
- #define SYS_CS_DUD (1<<6)
- #define SYS_CS_CUD (1<<5)
- #define SYS_CS_MIR_BIT 2
- #define SYS_CS_MIR_MASK (0x7<<CSC_MIR_BIT)
- #define SYS_CS_DIR (1<<1)
- #define SYS_CS_CIR (1<<0)
-
- #define SYS_CS_MUX_AUX 0x1
- #define SYS_CS_MUX_FQ0 0x2
- #define SYS_CS_MUX_FQ1 0x3
- #define SYS_CS_MUX_FQ2 0x4
- #define SYS_CS_MUX_FQ3 0x5
- #define SYS_CS_MUX_FQ4 0x6
- #define SYS_CS_MUX_FQ5 0x7
-#define SYS_CPUPLL 0xB1900060
-#define SYS_AUXPLL 0xB1900064
-
-/* AC97 Controller */
-#define AC97C_CONFIG 0xB0000000
- #define AC97C_RECV_SLOTS_BIT 13
- #define AC97C_RECV_SLOTS_MASK (0x3ff << AC97C_RECV_SLOTS_BIT)
- #define AC97C_XMIT_SLOTS_BIT 3
- #define AC97C_XMIT_SLOTS_MASK (0x3ff << AC97C_XMIT_SLOTS_BIT)
- #define AC97C_SG (1<<2)
- #define AC97C_SYNC (1<<1)
- #define AC97C_RESET (1<<0)
-#define AC97C_STATUS 0xB0000004
- #define AC97C_XU (1<<11)
- #define AC97C_XO (1<<10)
- #define AC97C_RU (1<<9)
- #define AC97C_RO (1<<8)
- #define AC97C_READY (1<<7)
- #define AC97C_CP (1<<6)
- #define AC97C_TR (1<<5)
- #define AC97C_TE (1<<4)
- #define AC97C_TF (1<<3)
- #define AC97C_RR (1<<2)
- #define AC97C_RE (1<<1)
- #define AC97C_RF (1<<0)
-#define AC97C_DATA 0xB0000008
-#define AC97C_CMD 0xB000000C
- #define AC97C_WD_BIT 16
- #define AC97C_READ (1<<7)
- #define AC97C_INDEX_MASK 0x7f
-#define AC97C_CNTRL 0xB0000010
- #define AC97C_RS (1<<1)
- #define AC97C_CE (1<<0)
-
-#ifdef CONFIG_SOC_AU1500
-/* Au1500 PCI Controller */
-#define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr
-#define Au1500_PCI_CMEM (Au1500_CFG_BASE + 0)
-#define Au1500_PCI_CFG (Au1500_CFG_BASE + 4)
- #define PCI_ERROR ((1<<22) | (1<<23) | (1<<24) | (1<<25) | (1<<26) | (1<<27))
-#define Au1500_PCI_B2BMASK_CCH (Au1500_CFG_BASE + 8)
-#define Au1500_PCI_B2B0_VID (Au1500_CFG_BASE + 0xC)
-#define Au1500_PCI_B2B1_ID (Au1500_CFG_BASE + 0x10)
-#define Au1500_PCI_MWMASK_DEV (Au1500_CFG_BASE + 0x14)
-#define Au1500_PCI_MWBASE_REV_CCL (Au1500_CFG_BASE + 0x18)
-#define Au1500_PCI_ERR_ADDR (Au1500_CFG_BASE + 0x1C)
-#define Au1500_PCI_SPEC_INTACK (Au1500_CFG_BASE + 0x20)
-#define Au1500_PCI_ID (Au1500_CFG_BASE + 0x100)
-#define Au1500_PCI_STATCMD (Au1500_CFG_BASE + 0x104)
-#define Au1500_PCI_CLASSREV (Au1500_CFG_BASE + 0x108)
-#define Au1500_PCI_HDRTYPE (Au1500_CFG_BASE + 0x10C)
-#define Au1500_PCI_MBAR (Au1500_CFG_BASE + 0x110)
-
-#define Au1500_PCI_HDR 0xB4005100 // virtual, kseg0 addr
-
-/* All of our structures, like pci resource, have 32 bit members.
- * Drivers are expected to do an ioremap on the PCI MEM resource, but it's
- * hard to store 0x4 0000 0000 in a 32 bit type. We require a small patch
- * to __ioremap to check for addresses between (u32)Au1500_PCI_MEM_START and
- * (u32)Au1500_PCI_MEM_END and change those to the full 36 bit PCI MEM
- * addresses. For PCI IO, it's simpler because we get to do the ioremap
- * ourselves and then adjust the device's resources.
- */
-#define Au1500_EXT_CFG 0x600000000
-#define Au1500_EXT_CFG_TYPE1 0x680000000
-#define Au1500_PCI_IO_START 0x500000000
-#define Au1500_PCI_IO_END 0x5000FFFFF
-#define Au1500_PCI_MEM_START 0x440000000
-#define Au1500_PCI_MEM_END 0x443FFFFFF
-
-#define PCI_IO_START (Au1500_PCI_IO_START + 0x300)
-#define PCI_IO_END (Au1500_PCI_IO_END)
-#define PCI_MEM_START (Au1500_PCI_MEM_START)
-#define PCI_MEM_END (Au1500_PCI_MEM_END)
-#define PCI_FIRST_DEVFN (0<<3)
-#define PCI_LAST_DEVFN (19<<3)
-
-#endif
-
-#if defined(CONFIG_SOC_AU1100) || (defined(CONFIG_SOC_AU1000) && !defined(CONFIG_MIPS_PB1000))
-/* no PCI bus controller */
-#define PCI_IO_START 0
-#define PCI_IO_END 0
-#define PCI_MEM_START 0
-#define PCI_MEM_END 0
-#define PCI_FIRST_DEVFN 0
-#define PCI_LAST_DEVFN 0
-#endif
-
-#endif
diff -puN -L include/asm-mips/au1000_pcmcia.h include/asm-mips/au1000_pcmcia.h~mips-megapatch /dev/null
--- 25/include/asm-mips/au1000_pcmcia.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,111 +0,0 @@
-/*
- *
- * Alchemy Semi Au1000 pcmcia driver include file
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- *
- */
-#ifndef __ASM_AU1000_PCMCIA_H
-#define __ASM_AU1000_PCMCIA_H
-
-
-#define AU1000_PCMCIA_POLL_PERIOD (2*HZ)
-#define AU1000_PCMCIA_IO_SPEED (255)
-#define AU1000_PCMCIA_MEM_SPEED (300)
-
-#define AU1X_SOCK0_IO 0xF00000000
-#define AU1X_SOCK0_PHYS_ATTR 0xF40000000
-#define AU1X_SOCK0_PHYS_MEM 0xF80000000
-
-/* pcmcia socket 1 needs external glue logic so the memory map
- * differs from board to board.
- */
-#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500)
-#define AU1X_SOCK1_IO 0xF08000000
-#define AU1X_SOCK1_PHYS_ATTR 0xF48000000
-#define AU1X_SOCK1_PHYS_MEM 0xF88000000
-#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500)
-#define AU1X_SOCK1_IO 0xF04000000
-#define AU1X_SOCK1_PHYS_ATTR 0xF44000000
-#define AU1X_SOCK1_PHYS_MEM 0xF84000000
-#endif
-
-struct pcmcia_state {
- unsigned detect: 1,
- ready: 1,
- wrprot: 1,
- bvd1: 1,
- bvd2: 1,
- vs_3v: 1,
- vs_Xv: 1;
-};
-
-struct pcmcia_configure {
- unsigned sock: 8,
- vcc: 8,
- vpp: 8,
- output: 1,
- speaker: 1,
- reset: 1;
-};
-
-struct pcmcia_irq_info {
- unsigned int sock;
- unsigned int irq;
-};
-
-
-struct au1000_pcmcia_socket {
- socket_state_t cs_state;
- struct pcmcia_state k_state;
- unsigned int irq;
- void (*handler)(void *, unsigned int);
- void *handler_info;
- pccard_io_map io_map[MAX_IO_WIN];
- pccard_mem_map mem_map[MAX_WIN];
- u32 virt_io;
- ioaddr_t phys_attr, phys_mem;
- unsigned short speed_io, speed_attr, speed_mem;
-};
-
-struct pcmcia_init {
- void (*handler)(int irq, void *dev, struct pt_regs *regs);
-};
-
-struct pcmcia_low_level {
- int (*init)(struct pcmcia_init *);
- int (*shutdown)(void);
- int (*socket_state)(unsigned sock, struct pcmcia_state *);
- int (*get_irq_info)(struct pcmcia_irq_info *);
- int (*configure_socket)(const struct pcmcia_configure *);
-};
-
-#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500)
-extern struct pcmcia_low_level pb1x00_pcmcia_ops;
-#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500)
-extern struct pcmcia_low_level db1x00_pcmcia_ops;
-#else
-error unknown Au1000 board
-#endif
-
-#endif /* __ASM_AU1000_PCMCIA_H */
diff -puN -L include/asm-mips/au1000_usbdev.h include/asm-mips/au1000_usbdev.h~mips-megapatch /dev/null
--- 25/include/asm-mips/au1000_usbdev.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,73 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * Au1000 USB Device-Side Driver
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * stevel@mvista.com or source@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#define USBDEV_REV 0x0110 // BCD
-#define USBDEV_EP0_MAX_PACKET_SIZE 64
-
-typedef enum {
- ATTACHED = 0,
- POWERED,
- DEFAULT,
- ADDRESS,
- CONFIGURED
-} usbdev_state_t;
-
-typedef enum {
- CB_NEW_STATE = 0,
- CB_PKT_COMPLETE
-} usbdev_cb_type_t;
-
-
-typedef struct usbdev_pkt {
- int ep_addr; // ep addr this packet routed to
- int size; // size of payload in bytes
- unsigned status; // packet status
- struct usbdev_pkt* next; // function layer can't touch this
- u8 payload[0]; // the payload
-} usbdev_pkt_t;
-
-#define PKT_STATUS_ACK (1<<0)
-#define PKT_STATUS_NAK (1<<1)
-#define PKT_STATUS_SU (1<<2)
-
-extern int usbdev_init(struct usb_device_descriptor* dev_desc,
- struct usb_config_descriptor* config_desc,
- struct usb_interface_descriptor* if_desc,
- struct usb_endpoint_descriptor* ep_desc,
- struct usb_string_descriptor* str_desc[],
- void (*cb)(usbdev_cb_type_t, unsigned long, void *),
- void* cb_data);
-
-extern void usbdev_exit(void);
-
-extern int usbdev_alloc_packet (int ep_addr, int data_size,
- usbdev_pkt_t** pkt);
-extern int usbdev_send_packet (int ep_addr, usbdev_pkt_t* pkt);
-extern int usbdev_receive_packet(int ep_addr, usbdev_pkt_t** pkt);
-extern int usbdev_get_byte_count(int ep_addr);
diff -puN include/asm-mips/bitops.h~mips-megapatch include/asm-mips/bitops.h
--- 25/include/asm-mips/bitops.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/bitops.h 2004-02-19 12:53:02.000000000 -0800
@@ -19,11 +19,13 @@
#define SZLONG_MASK 31UL
#define __LL "ll"
#define __SC "sc"
+#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x))
#elif (_MIPS_SZLONG == 64)
#define SZLONG_LOG 6
#define SZLONG_MASK 63UL
#define __LL "lld"
#define __SC "scd"
+#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x))
#endif
#ifdef __KERNEL__
@@ -627,7 +629,7 @@ static inline int __test_and_change_bit(
*/
static inline int test_bit(unsigned long nr, const volatile unsigned long *addr)
{
- return 1UL & (((const volatile unsigned long *) addr)[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK));
+ return 1UL & (addr[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK));
}
/*
@@ -683,10 +685,10 @@ static inline unsigned long __ffs(unsign
* @offset: The bitnumber to start searching at
* @size: The maximum size to search
*/
-static inline unsigned long find_next_zero_bit(unsigned long *addr,
+static inline unsigned long find_next_zero_bit(const unsigned long *addr,
unsigned long size, unsigned long offset)
{
- unsigned long *p = ((unsigned long *) addr) + (offset >> SZLONG_LOG);
+ const unsigned long *p = addr + (offset >> SZLONG_LOG);
unsigned long result = offset & ~SZLONG_MASK;
unsigned long tmp;
@@ -731,10 +733,10 @@ found_middle:
* @offset: The bitnumber to start searching at
* @size: The maximum size to search
*/
-static inline unsigned long find_next_bit(unsigned long *addr,
+static inline unsigned long find_next_bit(const unsigned long *addr,
unsigned long size, unsigned long offset)
{
- unsigned long *p = addr + (offset >> SZLONG_LOG);
+ const unsigned long *p = addr + (offset >> SZLONG_LOG);
unsigned long result = offset & ~SZLONG_MASK;
unsigned long tmp;
@@ -789,7 +791,7 @@ found_middle:
* unlikely to be set. It's guaranteed that at least one of the 140
* bits is cleared.
*/
-static inline int sched_find_first_bit(unsigned long *b)
+static inline int sched_find_first_bit(const unsigned long *b)
{
#ifdef CONFIG_MIPS32
if (unlikely(b[0]))
@@ -829,6 +831,7 @@ static inline int sched_find_first_bit(u
* The Hamming Weight of a number is the total number of bits set in it.
*/
+#define hweight64(x) generic_hweight64(x)
#define hweight32(x) generic_hweight32(x)
#define hweight16(x) generic_hweight16(x)
#define hweight8(x) generic_hweight8(x)
@@ -870,59 +873,44 @@ static inline int test_le_bit(unsigned l
return ((mask & *ADDR) != 0);
}
-static inline unsigned long ext2_ffz(unsigned int word)
-{
- int b = 0, s;
-
- word = ~word;
- s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s;
- s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s;
- s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;
- s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;
- s = 1; if (word << 31 != 0) s = 0; b += s;
-
- return b;
-}
-
static inline unsigned long find_next_zero_le_bit(unsigned long *addr,
unsigned long size, unsigned long offset)
{
- unsigned int *p = ((unsigned int *) addr) + (offset >> SZLONG_LOG);
- unsigned int result = offset & ~SZLONG_MASK;
- unsigned int tmp;
+ unsigned long *p = ((unsigned long *) addr) + (offset >> SZLONG_LOG);
+ unsigned long result = offset & ~SZLONG_MASK;
+ unsigned long tmp;
if (offset >= size)
return size;
-
size -= result;
offset &= SZLONG_MASK;
if (offset) {
- tmp = cpu_to_le32p(p++);
- tmp |= ~0U >> (32-offset); /* bug or feature ? */
- if (size < 32)
+ tmp = cpu_to_lelongp(p++);
+ tmp |= ~0UL >> (_MIPS_SZLONG-offset); /* bug or feature ? */
+ if (size < _MIPS_SZLONG)
goto found_first;
- if (tmp != ~0U)
+ if (~tmp)
goto found_middle;
- size -= 32;
- result += 32;
+ size -= _MIPS_SZLONG;
+ result += _MIPS_SZLONG;
}
- while (size >= 32) {
- if ((tmp = cpu_to_le32p(p++)) != ~0U)
+ while (size & ~SZLONG_MASK) {
+ if (~(tmp = cpu_to_lelongp(p++)))
goto found_middle;
- result += 32;
- size -= 32;
+ result += _MIPS_SZLONG;
+ size -= _MIPS_SZLONG;
}
if (!size)
return result;
+ tmp = cpu_to_lelongp(p);
- tmp = cpu_to_le32p(p);
found_first:
- tmp |= ~0 << size;
- if (tmp == ~0U) /* Are any bits zero? */
+ tmp |= ~0UL << size;
+ if (tmp == ~0UL) /* Are any bits zero? */
return result + size; /* Nope. */
found_middle:
- return result + ext2_ffz(tmp);
+ return result + ffz(tmp);
}
#define find_first_zero_le_bit(addr, size) \
diff -puN include/asm-mips/bootinfo.h~mips-megapatch include/asm-mips/bootinfo.h
--- 25/include/asm-mips/bootinfo.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/bootinfo.h 2004-02-19 12:53:02.000000000 -0800
@@ -3,8 +3,10 @@
* License. See the file COPYING in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 1996 by Ralf Baechle, Andreas Busse,
- * Stoned Elipot and Paul M. Antoine.
+ * Copyright (C) 1995, 1996, 2003 by Ralf Baechle
+ * Copyright (C) 1995, 1996 Andreas Busse
+ * Copyright (C) 1995, 1996 Stoned Elipot
+ * Copyright (C) 1995, 1996 Paul M. Antoine.
*/
#ifndef _ASM_BOOTINFO_H
#define _ASM_BOOTINFO_H
@@ -12,180 +14,199 @@
#include <linux/types.h>
/*
- * Values for machgroup
+ * The MACH_GROUP_ IDs are the equivalent to PCI vendor IDs; the remaining
+ * MACH_ values equivalent to product IDs. As such the numbers do not
+ * necessarily reflect technical relations or similarities between systems.
*/
-#define MACH_GROUP_UNKNOWN 0 /* whatever... */
-#define MACH_GROUP_JAZZ 1 /* Jazz */
-#define MACH_GROUP_DEC 2 /* Digital Equipment */
-#define MACH_GROUP_ARC 3 /* Wreckstation Tyne, rPC44, possibly other */
-#define MACH_GROUP_SNI_RM 4 /* Siemens Nixdorf RM series */
-#define MACH_GROUP_ACN 5
-#define MACH_GROUP_SGI 6 /* Silicon Graphics */
-#define MACH_GROUP_COBALT 7 /* Cobalt servers */
-#define MACH_GROUP_NEC_DDB 8 /* NEC DDB */
-#define MACH_GROUP_BAGET 9 /* Baget */
-#define MACH_GROUP_COSINE 10 /* CoSine Orion */
-#define MACH_GROUP_GALILEO 11 /* Galileo Eval Boards */
-#define MACH_GROUP_MOMENCO 12 /* Momentum Boards */
-#define MACH_GROUP_ITE 13 /* ITE Semi Eval Boards */
-#define MACH_GROUP_PHILIPS 14
-#define MACH_GROUP_GLOBESPAN 15 /* Globespan PVR Referrence Board */
-#define MACH_GROUP_SIBYTE 16 /* Sibyte Eval Boards */
-#define MACH_GROUP_TOSHIBA 17 /* Toshiba Reference Systems TSBREF */
-#define MACH_GROUP_ALCHEMY 18 /* Alchemy Semi Eval Boards */
-#define MACH_GROUP_NEC_VR41XX 19 /* NEC Vr41xx based boards/gadgets */
-#define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */
-#define MACH_GROUP_LASAT 21
/*
- * Valid machtype values for group unknown (low order halfword of mips_machtype)
+ * Valid machtype values for group unknown
*/
-#define MACH_UNKNOWN 0 /* whatever... */
+#define MACH_GROUP_UNKNOWN 0 /* whatever... */
+#define MACH_UNKNOWN 0 /* whatever... */
/*
* Valid machtype values for group JAZZ
*/
-#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */
-#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */
-#define MACH_OLIVETTI_M700 2 /* Olivetti M700-10 (-15 ??) */
+#define MACH_GROUP_JAZZ 1 /* Jazz */
+#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */
+#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */
+#define MACH_OLIVETTI_M700 2 /* Olivetti M700-10 (-15 ??) */
/*
* Valid machtype for group DEC
*/
-#define MACH_DSUNKNOWN 0
-#define MACH_DS23100 1 /* DECstation 2100 or 3100 */
-#define MACH_DS5100 2 /* DECsystem 5100 */
-#define MACH_DS5000_200 3 /* DECstation 5000/200 */
-#define MACH_DS5000_1XX 4 /* DECstation 5000/120, 125, 133, 150 */
-#define MACH_DS5000_XX 5 /* DECstation 5000/20, 25, 33, 50 */
-#define MACH_DS5000_2X0 6 /* DECstation 5000/240, 260 */
-#define MACH_DS5400 7 /* DECsystem 5400 */
-#define MACH_DS5500 8 /* DECsystem 5500 */
-#define MACH_DS5800 9 /* DECsystem 5800 */
-#define MACH_DS5900 10 /* DECsystem 5900 */
+#define MACH_GROUP_DEC 2 /* Digital Equipment */
+#define MACH_DSUNKNOWN 0
+#define MACH_DS23100 1 /* DECstation 2100 or 3100 */
+#define MACH_DS5100 2 /* DECsystem 5100 */
+#define MACH_DS5000_200 3 /* DECstation 5000/200 */
+#define MACH_DS5000_1XX 4 /* DECstation 5000/120, 125, 133, 150 */
+#define MACH_DS5000_XX 5 /* DECstation 5000/20, 25, 33, 50 */
+#define MACH_DS5000_2X0 6 /* DECstation 5000/240, 260 */
+#define MACH_DS5400 7 /* DECsystem 5400 */
+#define MACH_DS5500 8 /* DECsystem 5500 */
+#define MACH_DS5800 9 /* DECsystem 5800 */
+#define MACH_DS5900 10 /* DECsystem 5900 */
/*
* Valid machtype for group ARC
*/
+#define MACH_GROUP_ARC 3 /* Deskstation */
#define MACH_DESKSTATION_RPC44 0 /* Deskstation rPC44 */
#define MACH_DESKSTATION_TYNE 1 /* Deskstation Tyne */
/*
* Valid machtype for group SNI_RM
*/
-#define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */
+#define MACH_GROUP_SNI_RM 4 /* Siemens Nixdorf RM series */
+#define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */
/*
* Valid machtype for group ACN
*/
-#define MACH_ACN_MIPS_BOARD 0 /* ACN MIPS single board */
+#define MACH_GROUP_ACN 5
+#define MACH_ACN_MIPS_BOARD 0 /* ACN MIPS single board */
/*
* Valid machtype for group SGI
*/
-#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */
-#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */
-#define MACH_SGI_IP28 2 /* Indigo2 Impact */
-#define MACH_SGI_IP32 3 /* O2 */
+#define MACH_GROUP_SGI 6 /* Silicon Graphics */
+#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */
+#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */
+#define MACH_SGI_IP28 2 /* Indigo2 Impact */
+#define MACH_SGI_IP32 3 /* O2 */
/*
* Valid machtype for group COBALT
*/
-#define MACH_COBALT_27 0 /* Proto "27" hardware */
+#define MACH_GROUP_COBALT 7 /* Cobalt servers */
+#define MACH_COBALT_27 0 /* Proto "27" hardware */
/*
* Valid machtype for group NEC DDB
*/
-#define MACH_NEC_DDB5074 0 /* NEC DDB Vrc-5074 */
-#define MACH_NEC_DDB5476 1 /* NEC DDB Vrc-5476 */
-#define MACH_NEC_DDB5477 2 /* NEC DDB Vrc-5477 */
-#define MACH_NEC_ROCKHOPPER 3 /* Rockhopper base board */
-#define MACH_NEC_ROCKHOPPERII 4 /* Rockhopper II base board */
+#define MACH_GROUP_NEC_DDB 8 /* NEC DDB */
+#define MACH_NEC_DDB5074 0 /* NEC DDB Vrc-5074 */
+#define MACH_NEC_DDB5476 1 /* NEC DDB Vrc-5476 */
+#define MACH_NEC_DDB5477 2 /* NEC DDB Vrc-5477 */
+#define MACH_NEC_ROCKHOPPER 3 /* Rockhopper base board */
+#define MACH_NEC_ROCKHOPPERII 4 /* Rockhopper II base board */
/*
* Valid machtype for group BAGET
*/
-#define MACH_BAGET201 0 /* BT23-201 */
-#define MACH_BAGET202 1 /* BT23-202 */
+#define MACH_GROUP_BAGET 9 /* Baget */
+#define MACH_BAGET201 0 /* BT23-201 */
+#define MACH_BAGET202 1 /* BT23-202 */
/*
* Cosine boards.
*/
-#define MACH_COSINE_ORION 0
+#define MACH_GROUP_COSINE 10 /* CoSine Orion */
+#define MACH_COSINE_ORION 0
/*
* Valid machtype for group GALILEO
*/
-#define MACH_EV96100 0 /* EV96100 */
-#define MACH_EV64120A 1 /* EV64120A */
+#define MACH_GROUP_GALILEO 11 /* Galileo Eval Boards */
+#define MACH_EV96100 0 /* EV96100 */
+#define MACH_EV64120A 1 /* EV64120A */
/*
* Valid machtype for group MOMENCO
*/
-#define MACH_MOMENCO_OCELOT 0
-#define MACH_MOMENCO_OCELOT_G 1
-#define MACH_MOMENCO_OCELOT_C 2
+#define MACH_GROUP_MOMENCO 12 /* Momentum Boards */
+#define MACH_MOMENCO_OCELOT 0
+#define MACH_MOMENCO_OCELOT_G 1
+#define MACH_MOMENCO_OCELOT_C 2
+#define MACH_MOMENCO_JAGUAR_ATX 3
/*
* Valid machtype for group ITE
*/
-#define MACH_QED_4N_S01B 0 /* ITE8172 based eval board */
+#define MACH_GROUP_ITE 13 /* ITE Semi Eval Boards */
+#define MACH_QED_4N_S01B 0 /* ITE8172 based eval board */
/*
- * Valid machtype for group Globespan
+ * Valid machtype for group PHILIPS
*/
-#define MACH_IVR 0 /* IVR eval board */
+#define MACH_GROUP_PHILIPS 14
+#define MACH_PHILIPS_NINO 0 /* Nino */
+#define MACH_PHILIPS_VELO 1 /* Velo */
/*
- * Valid machtype for group PHILIPS
+ * Valid machtype for group Globespan
*/
-#define MACH_PHILIPS_NINO 0 /* Nino */
-#define MACH_PHILIPS_VELO 1 /* Velo */
+#define MACH_GROUP_GLOBESPAN 15 /* Globespan */
+#define MACH_IVR 0 /* IVR eval board */
/*
* Valid machtype for group SIBYTE
*/
-#define MACH_SWARM 0
+#define MACH_GROUP_SIBYTE 16 /* Sibyte / Broadcom */
+#define MACH_SWARM 0
/*
* Valid machtypes for group Toshiba
*/
-#define MACH_PALLAS 0
-#define MACH_TOPAS 1
-#define MACH_JMR 2
-#define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */
-#define MACH_TOSHIBA_RBTX4927 4
-#define MACH_TOSHIBA_RBTX4937 5
+#define MACH_GROUP_TOSHIBA 17 /* Toshiba Reference Systems TSBREF */
+#define MACH_PALLAS 0
+#define MACH_TOPAS 1
+#define MACH_JMR 2
+#define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */
+#define MACH_TOSHIBA_RBTX4927 4
+#define MACH_TOSHIBA_RBTX4937 5
+
#define GROUP_TOSHIBA_NAMES { "Pallas", "TopasCE", "JMR", "JMR TX3927", \
"RBTX4927", "RBTX4937" }
/*
- * Valid machtype for group LASAT
+ * Valid machtype for group Alchemy
*/
-#define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */
-#define MACH_LASAT_200 1 /* Masquerade PRO/SP200 */
+#define MACH_GROUP_ALCHEMY 18 /* AMD Alchemy */
+#define MACH_PB1000 0 /* Au1000-based eval board */
+#define MACH_PB1100 1 /* Au1100-based eval board */
+#define MACH_PB1500 2 /* Au1500-based eval board */
+#define MACH_DB1000 3 /* Au1000-based eval board */
+#define MACH_DB1100 4 /* Au1100-based eval board */
+#define MACH_DB1500 5 /* Au1500-based eval board */
+#define MACH_XXS1500 6 /* Au1500-based eval board */
+#define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */
/*
- * Valid machtype for group Alchemy
+ * Valid machtype for group NEC_VR41XX
+ *
+ * Various NEC-based devices.
+ *
+ * FIXME: MACH_GROUPs should be by _MANUFACTURER_ of * the device, not by
+ * technical properties, so no new additions to this group.
*/
-#define MACH_PB1000 0 /* Au1000-based eval board */
-#define MACH_PB1100 1 /* Au1100-based eval board */
-#define MACH_PB1500 2 /* Au1500-based eval board */
-#define MACH_DB1000 3 /* Au1000-based eval board */
-#define MACH_DB1100 4 /* Au1100-based eval board */
-#define MACH_DB1500 5 /* Au1500-based eval board */
+#define MACH_GROUP_NEC_VR41XX 19
+#define MACH_NEC_OSPREY 0 /* Osprey eval board */
+#define MACH_NEC_EAGLE 1 /* NEC Eagle/Hawk board */
+#define MACH_ZAO_CAPCELLA 2 /* ZAO Networks Capcella */
+#define MACH_VICTOR_MPC30X 3 /* Victor MP-C303/304 */
+#define MACH_IBM_WORKPAD 4 /* IBM WorkPad z50 */
+#define MACH_CASIO_E55 5 /* CASIO CASSIOPEIA E-10/15/55/65 */
+#define MACH_TANBAC_TB0226 6 /* TANBAC TB0226 (Mbase) */
+#define MACH_TANBAC_TB0229 7 /* TANBAC TB0229 (VR4131DIMM) */
+
+#define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */
+#define MACH_HP_LASERJET 1
/*
- * Valid machtype for group NEC_VR41XX
+ * Valid machtype for group LASAT
+ */
+#define MACH_GROUP_LASAT 21
+#define MACH_LASAT_100 1 /* Masquerade II/SP100/SP50/SP25 */
+#define MACH_LASAT_200 2 /* Masquerade PRO/SP200 */
+
+/*
+ * Valid machtype for group TITAN
*/
-#define MACH_NEC_OSPREY 0 /* Osprey eval board */
-#define MACH_NEC_EAGLE 1 /* NEC Eagle/Hawk board */
-#define MACH_ZAO_CAPCELLA 2 /* ZAO Networks Capcella */
-#define MACH_VICTOR_MPC30X 3 /* Victor MP-C303/304 */
-#define MACH_IBM_WORKPAD 4 /* IBM WorkPad z50 */
-#define MACH_CASIO_E55 5 /* CASIO CASSIOPEIA E-10/15/55/65 */
-#define MACH_TANBAC_TB0226 6 /* TANBAC TB0226 (Mbase) */
-#define MACH_TANBAC_TB0229 7 /* TANBAC TB0229 (VR4131DIMM) */
+#define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */
+#define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */
#define CL_SIZE (256)
@@ -205,7 +226,7 @@ extern unsigned long mips_machgroup;
*/
struct boot_mem_map {
int nr_map;
- struct {
+ struct boot_mem_map_entry {
phys_t addr; /* start of memory segment */
phys_t size; /* size of memory segment */
long type; /* type of memory segment */
@@ -216,4 +237,15 @@ extern struct boot_mem_map boot_mem_map;
extern void add_memory_region(phys_t start, phys_t size, long type);
+extern void prom_init(void);
+
+/*
+ * Initial kernel command line, usually setup by prom_init()
+ */
+extern char arcs_cmdline[CL_SIZE];
+
+/*
+ * Registers a0, a1, a3 and a4 as passed to the kenrel entry by firmware
+ */
+extern unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3;
#endif /* _ASM_BOOTINFO_H */
diff -puN include/asm-mips/bug.h~mips-megapatch include/asm-mips/bug.h
--- 25/include/asm-mips/bug.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/bug.h 2004-02-19 12:53:02.000000000 -0800
@@ -5,7 +5,6 @@
#define BUG() \
do { \
- printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
__asm__ __volatile__("break %0" : : "i" (BRK_BUG)); \
} while (0)
#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0)
diff -puN include/asm-mips/cacheflush.h~mips-megapatch include/asm-mips/cacheflush.h
--- 25/include/asm-mips/cacheflush.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/cacheflush.h 2004-02-19 12:53:02.000000000 -0800
@@ -9,8 +9,6 @@
#ifndef _ASM_CACHEFLUSH_H
#define _ASM_CACHEFLUSH_H
-#include <linux/config.h>
-
/* Keep includes the same across arches. */
#include <linux/mm.h>
@@ -41,16 +39,15 @@ extern void flush_dcache_page(struct pag
extern void (*flush_icache_page)(struct vm_area_struct *vma,
struct page *page);
extern void (*flush_icache_range)(unsigned long start, unsigned long end);
-#define flush_icache_user_range(vma, page, addr, len) \
- flush_icache_page(vma, page)
#define flush_cache_vmap(start, end) flush_cache_all()
#define flush_cache_vunmap(start, end) flush_cache_all()
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
-do { memcpy(dst, src, len); \
- flush_icache_user_range(vma, page, vaddr, len); \
+#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+do { \
+ memcpy(dst, (void *) src, len); \
+ flush_icache_page(vma, page); \
} while (0)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
memcpy(dst, src, len)
extern void (*flush_cache_sigtramp)(unsigned long addr);
diff -puN include/asm-mips/cache.h~mips-megapatch include/asm-mips/cache.h
--- 25/include/asm-mips/cache.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/cache.h 2004-02-19 12:53:02.000000000 -0800
@@ -11,15 +11,11 @@
#include <linux/config.h>
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_R6000) || \
- defined(CONFIG_CPU_TX39XX)
-#define L1_CACHE_BYTES 16
-#define L1_CACHE_SHIFT_MAX 4 /* largest L1 which this arch supports */
-#else
-#define L1_CACHE_BYTES 32 /* A guess */
-#define L1_CACHE_SHIFT_MAX 6 /* largest L1 which this arch supports */
-#endif
+#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+#define L1_CACHE_SHIFT_MAX 6
+#define SMP_CACHE_SHIFT L1_CACHE_SHIFT
#define SMP_CACHE_BYTES L1_CACHE_BYTES
#endif /* _ASM_CACHE_H */
diff -puN include/asm-mips/checksum.h~mips-megapatch include/asm-mips/checksum.h
--- 25/include/asm-mips/checksum.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/checksum.h 2004-02-19 12:53:02.000000000 -0800
@@ -89,56 +89,43 @@ static inline unsigned short int csum_fo
* By Jorge Cwik <jorge@laser.satlink.net>, adapted for linux by
* Arnt Gulbrandsen.
*/
-static inline unsigned short ip_fast_csum(unsigned char *iph,
- unsigned int ihl)
+static inline unsigned short ip_fast_csum(unsigned char *iph, unsigned int ihl)
{
- unsigned int dummy, sum;
+ unsigned int *word = (unsigned int *) iph;
+ unsigned int *stop = word + ihl;
+ unsigned int csum;
+ int carry;
+
+ csum = word[0];
+ csum += word[1];
+ carry = (csum < word[1]);
+ csum += carry;
+
+ csum += word[2];
+ carry = (csum < word[2]);
+ csum += carry;
+
+ csum += word[3];
+ carry = (csum < word[3]);
+ csum += carry;
+
+ word += 4;
+ do {
+ csum += *word;
+ carry = (csum < *word);
+ csum += carry;
+ word++;
+ } while (word != stop);
- /*
- * This is for 32-bit processors ... but works just fine for 64-bit
- * processors for now ... XXX
- */
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# ip_fast_csum\n\t"
- ".set\tnoat\n\t"
- "lw\t%0, (%1)\n\t"
- "subu\t%2, 4\n\t"
- "sll\t%2, 2\n\t"
- "lw\t%3, 4(%1)\n\t"
- "addu\t%2, %1\n\t"
- "addu\t%0, %3\n\t"
- "sltu\t$1, %0, %3\n\t"
- "lw\t%3, 8(%1)\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %3\n\t"
- "sltu\t$1, %0, %3\n\t"
- "lw\t%3, 12(%1)\n\t"
- "addu\t%0, $1\n\t"
- "addu\t%0, %3\n\t"
- "sltu\t$1, %0, %3\n\t"
- "addu\t%0, $1\n"
-
- "1:\tlw\t%3, 16(%1)\n\t"
- "addiu\t%1, 4\n\t"
- "addu\t%0, %3\n\t"
- "sltu\t$1, %0, %3\n\t"
- "bne\t%2, %1, 1b\n\t"
- " addu\t%0, $1\n"
-
- "2:\t.set\tat\n\t"
- ".set\treorder"
- : "=&r" (sum), "=&r" (iph), "=&r" (ihl), "=&r" (dummy)
- : "1" (iph), "2" (ihl));
-
- return csum_fold(sum);
+ return csum_fold(csum);
}
/*
* computes the checksum of the TCP/UDP pseudo-header
* returns a 16-bit checksum, already complemented
*/
-static inline unsigned int csum_tcpudp_nofold(unsigned int saddr,
- unsigned int daddr, unsigned short len, unsigned short proto,
+static inline unsigned int csum_tcpudp_nofold(unsigned long saddr,
+ unsigned long daddr, unsigned short len, unsigned short proto,
unsigned int sum)
{
__asm__(
@@ -168,9 +155,9 @@ static inline unsigned int csum_tcpudp_n
: "=r" (sum)
: "0" (daddr), "r"(saddr),
#ifdef __MIPSEL__
- "r" ((ntohs(len)<<16)+proto*256),
+ "r" (((unsigned long)htons(len)<<16) + proto*256),
#else
- "r" (((proto)<<16)+len),
+ "r" (((unsigned long)(proto)<<16) + len),
#endif
"r" (sum));
diff -puN include/asm-mips/cobalt/cobalt.h~mips-megapatch include/asm-mips/cobalt/cobalt.h
--- 25/include/asm-mips/cobalt/cobalt.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/cobalt/cobalt.h 2004-02-19 12:53:02.000000000 -0800
@@ -6,47 +6,31 @@
* for more details.
*
* Copyright (C) 1997 Cobalt Microserver
- * Copyright (C) 1997 Ralf Baechle
+ * Copyright (C) 1997, 2003 Ralf Baechle
* Copyright (C) 2001, 2002, 2003 Liam Davies (ldavies@agile.tv)
- *
- */
-#ifndef __ASM_MIPS_COBALT_H
-#define __ASM_MIPS_COBALT_H
-
-/*
- * COBALT interrupt enable bits
- */
-#define COBALT_IE_PCI (1 << 0)
-#define COBALT_IE_FLOPPY (1 << 1)
-#define COBALT_IE_KEYBOARD (1 << 2)
-#define COBALT_IE_SERIAL1 (1 << 3)
-#define COBALT_IE_SERIAL2 (1 << 4)
-#define COBALT_IE_PARALLEL (1 << 5)
-#define COBALT_IE_GPIO (1 << 6)
-#define COBALT_IE_RTC (1 << 7)
-
-/*
- * PCI defines
*/
-#define COBALT_IE_ETHERNET (1 << 7)
-#define COBALT_IE_SCSI (1 << 7)
+#ifndef __ASM_COBALT_H
+#define __ASM_COBALT_H
/*
- * COBALT Interrupt Level definitions.
- * These should match the request IRQ id's.
+ * i8259 legacy interrupts used on Cobalt:
+ *
+ * 8 - RTC
+ * 9 - PCI
+ * 14 - IDE0
+ * 15 - IDE1
+ *
+ * CPU IRQs are 16 ... 23
*/
-#define COBALT_TIMER_IRQ 0
-#define COBALT_KEYBOARD_IRQ 1
-#define COBALT_QUBE_SLOT_IRQ 9
-#define COBALT_ETH0_IRQ 4
-#define COBALT_ETH1_IRQ 13
-#define COBALT_SCC_IRQ 4
-#define COBALT_SERIAL2_IRQ 4
-#define COBALT_PARALLEL_IRQ 5
-#define COBALT_FLOPPY_IRQ 6 /* needs to be consistent with floppy driver! */
-#define COBALT_SCSI_IRQ 7
-#define COBALT_SERIAL_IRQ 7
-#define COBALT_RAQ_SCSI_IRQ 4
+#define COBALT_TIMER_IRQ 18
+#define COBALT_SCC_IRQ 19 /* pre-production has 85C30 */
+#define COBALT_RAQ_SCSI_IRQ 19
+#define COBALT_ETH0_IRQ 19
+#define COBALT_ETH1_IRQ 20
+#define COBALT_SERIAL_IRQ 21
+#define COBALT_SCSI_IRQ 21
+#define COBALT_VIA_IRQ 22 /* Chained to VIA ISA bridge */
+#define COBALT_QUBE_SLOT_IRQ 23
/*
* PCI configuration space manifest constants. These are wired into
@@ -78,21 +62,29 @@
#define COBALT_BRD_ID_QUBE2 0x5
#define COBALT_BRD_ID_RAQ2 0x6
-
/*
* Galileo chipset access macros for the Cobalt. The base address for
* the GT64111 chip is 0x14000000
+ *
+ * Most of this really should go into a separate GT64111 header file.
*/
-#define GT64111_BASE 0x04000000
-#define GALILEO_REG(ofs) (GT64111_BASE + (ofs))
-
-#define GALILEO_INL(port) (inl(GALILEO_REG(port)))
-#define GALILEO_OUTL(val, port) outl(val, GALILEO_REG(port))
+#define GT64111_IO_BASE 0x10000000UL
+#define GT64111_BASE 0x14000000UL
+#define GALILEO_REG(ofs) (KSEG0 + GT64111_BASE + (unsigned long)(ofs))
+
+#define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port))
+#define GALILEO_OUTL(val, port) \
+do { \
+ *(volatile unsigned int *) GALILEO_REG(port) = (port); \
+} while (0)
#define GALILEO_T0EXP 0x0100
#define GALILEO_ENTC0 0x01
#define GALILEO_SELTC0 0x02
+#define PCI_CFG_SET(devfn,where) \
+ GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \
+ (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS)
-#endif /* __ASM_MIPS_COBALT_H */
+#endif /* __ASM_COBALT_H */
diff -puN /dev/null include/asm-mips/cpu-features.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/cpu-features.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,125 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Ralf Baechle
+ */
+#ifndef __ASM_CPU_FEATURES_H
+#define __ASM_CPU_FEATURES_H
+
+#include <cpu-feature-overrides.h>
+
+/*
+ * SMP assumption: Options of CPU 0 are a superset of all processors.
+ * This is true for all known MIPS systems.
+ */
+#ifndef cpu_has_tlb
+#define cpu_has_tlb (cpu_data[0].options & MIPS_CPU_TLB)
+#endif
+#ifndef cpu_has_4kex
+#define cpu_has_4kex (cpu_data[0].options & MIPS_CPU_4KEX)
+#endif
+#ifndef cpu_has_4ktlb
+#define cpu_has_4ktlb (cpu_data[0].options & MIPS_CPU_4KTLB)
+#endif
+#ifndef cpu_has_fpu
+#define cpu_has_fpu (cpu_data[0].options & MIPS_CPU_FPU)
+#endif
+#ifndef cpu_has_32fpr
+#define cpu_has_32fpr (cpu_data[0].options & MIPS_CPU_32FPR)
+#endif
+#ifndef cpu_has_counter
+#define cpu_has_counter (cpu_data[0].options & MIPS_CPU_COUNTER)
+#endif
+#ifndef cpu_has_watch
+#define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH)
+#endif
+#ifndef cpu_has_mips16
+#define cpu_has_mips16 (cpu_data[0].options & MIPS_CPU_MIPS16)
+#endif
+#ifndef cpu_has_divec
+#define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC)
+#endif
+#ifndef cpu_has_vce
+#define cpu_has_vce (cpu_data[0].options & MIPS_CPU_VCE)
+#endif
+#ifndef cpu_has_cache_cdex_p
+#define cpu_has_cache_cdex_p (cpu_data[0].options & MIPS_CPU_CACHE_CDEX_P)
+#endif
+#ifndef cpu_has_cache_cdex_s
+#define cpu_has_cache_cdex_s (cpu_data[0].options & MIPS_CPU_CACHE_CDEX_S)
+#endif
+#ifndef cpu_has_prefetch
+#define cpu_has_prefetch (cpu_data[0].options & MIPS_CPU_PREFETCH)
+#endif
+#ifndef cpu_has_mcheck
+#define cpu_has_mcheck (cpu_data[0].options & MIPS_CPU_MCHECK)
+#endif
+#ifndef cpu_has_ejtag
+#define cpu_has_ejtag (cpu_data[0].options & MIPS_CPU_EJTAG)
+#endif
+#ifndef cpu_has_llsc
+#define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC)
+#endif
+#ifndef cpu_has_vtag_icache
+#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
+#endif
+#ifndef cpu_has_dc_aliases
+#define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES)
+#endif
+#ifndef cpu_has_ic_fills_f_dc
+#define cpu_has_ic_fills_f_dc (cpu_data[0].dcache.flags & MIPS_CACHE_IC_F_DC)
+#endif
+
+#ifdef CONFIG_MIPS32
+# ifndef cpu_has_nofpuex
+# define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
+# endif
+# ifndef cpu_has_64bits
+# define cpu_has_64bits (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
+# endif
+# ifndef cpu_has_64bit_zero_reg
+# define cpu_has_64bit_zero_reg (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
+# endif
+# ifndef cpu_has_64bit_gp_regs
+# define cpu_has_64bit_gp_regs 0
+# endif
+# ifndef cpu_has_64bit_addresses
+# define cpu_has_64bit_addresses 0
+# endif
+#endif
+
+#ifdef CONFIG_MIPS64
+# ifndef cpu_has_nofpuex
+# define cpu_has_nofpuex 0
+# endif
+# ifndef cpu_has_64bits
+# define cpu_has_64bits 1
+# endif
+# ifndef cpu_has_64bit_zero_reg
+# define cpu_has_64bit_zero_reg 1
+# endif
+# ifndef cpu_has_64bit_gp_regs
+# define cpu_has_64bit_gp_regs 1
+# endif
+# ifndef cpu_has_64bit_addresses
+# define cpu_has_64bit_addresses 1
+# endif
+#endif
+
+#ifndef cpu_has_subset_pcaches
+#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES)
+#endif
+
+#ifndef cpu_dcache_line_size
+#define cpu_dcache_line_size() current_cpu_data.dcache.linesz
+#endif
+#ifndef cpu_icache_line_size
+#define cpu_icache_line_size() current_cpu_data.icache.linesz
+#endif
+#ifndef cpu_scache_line_size
+#define cpu_scache_line_size() current_cpu_data.scache.linesz
+#endif
+
+#endif /* __ASM_CPU_FEATURES_H */
diff -puN include/asm-mips/cpu.h~mips-megapatch include/asm-mips/cpu.h
--- 25/include/asm-mips/cpu.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/cpu.h 2004-02-19 12:53:02.000000000 -0800
@@ -7,8 +7,6 @@
#ifndef _ASM_CPU_H
#define _ASM_CPU_H
-#include <linux/cpu.h>
-
/* Assigned Company values for bits 23:16 of the PRId Register
(CP0 register 15, select 0). As of the MIPS32 and MIPS64 specs from
MTI, the PRId register is defined in this (backwards compatible)
@@ -59,6 +57,7 @@
#define PRID_IMP_MAGIC 0x2500
#define PRID_IMP_RM7000 0x2700
#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */
+#define PRID_IMP_RM9000 0x3400
#define PRID_IMP_R5432 0x5400
#define PRID_IMP_R5500 0x5500
#define PRID_IMP_4KC 0x8000
@@ -66,7 +65,12 @@
#define PRID_IMP_20KC 0x8200
#define PRID_IMP_4KEC 0x8400
#define PRID_IMP_4KSC 0x8600
-
+#define PRID_IMP_25KF 0x8800
+#define PRID_IMP_5KE 0x8900
+#define PRID_IMP_4KECR2 0x9000
+#define PRID_IMP_4KEMPR2 0x9100
+#define PRID_IMP_4KSD 0x9200
+#define PRID_IMP_24K 0x9300
#define PRID_IMP_UNKNOWN 0xff00
@@ -101,7 +105,7 @@
#define PRID_REV_VR4121 0x0060
#define PRID_REV_VR4122 0x0070
#define PRID_REV_VR4181A 0x0070 /* Same as VR4122 */
-#define PRID_REV_VR4131 0x0080
+#define PRID_REV_VR4130 0x0080
/*
* FPU implementation/revision register (CP1 control register 0).
@@ -168,7 +172,12 @@
#define CPU_VR4181A 51
#define CPU_AU1100 52
#define CPU_SR71000 53
-#define CPU_LAST 53
+#define CPU_RM9000 54
+#define CPU_25KF 55
+#define CPU_VR4133 56
+#define CPU_AU1550 57
+#define CPU_24K 58
+#define CPU_LAST 58
/*
* ISA Level encodings
@@ -201,11 +210,13 @@
#define MIPS_CPU_MIPS16 0x00000100 /* code compression */
#define MIPS_CPU_DIVEC 0x00000200 /* dedicated interrupt vector */
#define MIPS_CPU_VCE 0x00000400 /* virt. coherence conflict possible */
-#define MIPS_CPU_CACHE_CDEX 0x00000800 /* Create_Dirty_Exclusive CACHE op */
-#define MIPS_CPU_MCHECK 0x00001000 /* Machine check exception */
-#define MIPS_CPU_EJTAG 0x00002000 /* EJTAG exception */
-#define MIPS_CPU_NOFPUEX 0x00004000 /* no FPU exception */
-#define MIPS_CPU_LLSC 0x00008000 /* CPU has ll/sc instructions */
-#define MIPS_CPU_SUBSET_CACHES 0x00010000 /* P-cache subset enforced */
+#define MIPS_CPU_CACHE_CDEX_P 0x00000800 /* Create_Dirty_Exclusive CACHE op */
+#define MIPS_CPU_CACHE_CDEX_S 0x00001000 /* ... same for seconary cache ... */
+#define MIPS_CPU_MCHECK 0x00002000 /* Machine check exception */
+#define MIPS_CPU_EJTAG 0x00004000 /* EJTAG exception */
+#define MIPS_CPU_NOFPUEX 0x00008000 /* no FPU exception */
+#define MIPS_CPU_LLSC 0x00010000 /* CPU has ll/sc instructions */
+#define MIPS_CPU_SUBSET_CACHES 0x00020000 /* P-cache subset enforced */
+#define MIPS_CPU_PREFETCH 0x00040000 /* CPU has usable prefetch */
#endif /* _ASM_CPU_H */
diff -puN -L include/asm-mips/db1x00.h include/asm-mips/db1x00.h~mips-megapatch /dev/null
--- 25/include/asm-mips/db1x00.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,118 +0,0 @@
-/*
- * AMD Alchemy DB1x00 Reference Boards
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- *
- */
-#ifndef __ASM_DB1X00_H
-#define __ASM_DB1X00_H
-
-
-/*
- * Overlay data structure of the Db1x00 board registers.
- * Registers located at physical 1E0000xx, KSEG1 0xAE0000xx
- */
-typedef volatile struct
-{
- /*00*/ unsigned long whoami;
- /*04*/ unsigned long status;
- /*08*/ unsigned long switches;
- /*0C*/ unsigned long resets;
- /*10*/ unsigned long pcmcia;
- /*14*/ unsigned long specific;
- /*18*/ unsigned long leds;
- /*1C*/ unsigned long swreset;
-
-} BCSR;
-
-/*
- * Register/mask bit definitions for the BCSRs
- */
-#define BCSR_WHOAMI_DCID 0x000F
-#define BCSR_WHOAMI_CPLD 0x00F0
-#define BCSR_WHOAMI_BOARD 0x0F00
-
-#define BCSR_STATUS_PC0VS 0x0003
-#define BCSR_STATUS_PC1VS 0x000C
-#define BCSR_STATUS_PC0FI 0x0010
-#define BCSR_STATUS_PC1FI 0x0020
-#define BCSR_STATUS_FLASHBUSY 0x0100
-#define BCSR_STATUS_ROMBUSY 0x0400
-#define BCSR_STATUS_SWAPBOOT 0x2000
-#define BCSR_STATUS_FLASHDEN 0xC000
-
-#define BCSR_SWITCHES_DIP 0x00FF
-#define BCSR_SWITCHES_DIP_1 0x0080
-#define BCSR_SWITCHES_DIP_2 0x0040
-#define BCSR_SWITCHES_DIP_3 0x0020
-#define BCSR_SWITCHES_DIP_4 0x0010
-#define BCSR_SWITCHES_DIP_5 0x0008
-#define BCSR_SWITCHES_DIP_6 0x0004
-#define BCSR_SWITCHES_DIP_7 0x0002
-#define BCSR_SWITCHES_DIP_8 0x0001
-#define BCSR_SWITCHES_ROTARY 0x0F00
-
-#define BCSR_RESETS_PHY0 0x0001
-#define BCSR_RESETS_PHY1 0x0002
-#define BCSR_RESETS_DC 0x0004
-
-#define BCSR_PCMCIA_PC0VPP 0x0003
-#define BCSR_PCMCIA_PC0VCC 0x000C
-#define BCSR_PCMCIA_PC0DRVEN 0x0010
-#define BCSR_PCMCIA_PC0RST 0x0080
-#define BCSR_PCMCIA_PC1VPP 0x0300
-#define BCSR_PCMCIA_PC1VCC 0x0C00
-#define BCSR_PCMCIA_PC1DRVEN 0x1000
-#define BCSR_PCMCIA_PC1RST 0x8000
-
-#define BCSR_BOARD_PCIM66EN 0x0001
-#define BCSR_BOARD_PCIM33 0x0100
-#define BCSR_BOARD_GPIO200RST 0x0400
-#define BCSR_BOARD_PCICFG 0x1000
-
-#define BCSR_LEDS_DECIMALS 0x0003
-#define BCSR_LEDS_LED0 0x0100
-#define BCSR_LEDS_LED1 0x0200
-#define BCSR_LEDS_LED2 0x0400
-#define BCSR_LEDS_LED3 0x0800
-
-#define BCSR_SWRESET_RESET 0x0080
-
-/* PCMCIA Db1x00 specific defines */
-#define PCMCIA_MAX_SOCK 1
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
-
-/* VPP/VCC */
-#define SET_VCC_VPP(VCC, VPP, SLOT)\
- ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
-
-/* MTD CONFIG OPTIONS */
-#if defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
-#define DB1X00_BOTH_BANKS
-#elif defined(CONFIG_MTD_DB1X00_BOOT) && !defined(CONFIG_MTD_DB1X00_USER)
-#define DB1X00_BOOT_ONLY
-#elif !defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
-#define DB1X00_USER_ONLY
-#endif
-
-#endif /* __ASM_DB1X00_H */
diff -puN include/asm-mips/dec/ecc.h~mips-megapatch include/asm-mips/dec/ecc.h
--- 25/include/asm-mips/dec/ecc.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/dec/ecc.h 2004-02-19 12:53:02.000000000 -0800
@@ -42,10 +42,14 @@
#ifndef __ASSEMBLY__
+
+#include <linux/interrupt.h>
+
struct pt_regs;
+
extern void dec_ecc_be_init(void);
extern int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup);
-extern void dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs);
+extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs);
#endif
#endif /* __ASM_MIPS_DEC_ECC_H */
diff -puN include/asm-mips/dec/kn05.h~mips-megapatch include/asm-mips/dec/kn05.h
--- 25/include/asm-mips/dec/kn05.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/dec/kn05.h 2004-02-19 12:53:02.000000000 -0800
@@ -50,6 +50,7 @@
*/
#define KN05_MB_INT_TC (1<<0) /* TURBOchannel? */
#define KN05_MB_INT_RTC (1<<1) /* RTC? */
+#define KN05_MB_INT_MT (1<<3) /* ??? */
/*
* Bits for the MB control & status register.
diff -puN include/asm-mips/dec/prom.h~mips-megapatch include/asm-mips/dec/prom.h
--- 25/include/asm-mips/dec/prom.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/dec/prom.h 2004-02-19 12:53:02.000000000 -0800
@@ -15,6 +15,7 @@
#ifndef _ASM_DEC_PROM_H
#define _ASM_DEC_PROM_H
+#include <linux/config.h>
#include <linux/types.h>
#include <asm/addrspace.h>
@@ -166,4 +167,7 @@ extern void prom_meminit(u32);
extern void prom_identify_arch(u32);
extern void prom_init_cmdline(s32, s32 *, u32);
+extern void register_prom_console(void);
+extern void unregister_prom_console(void);
+
#endif /* _ASM_DEC_PROM_H */
diff -puN -L include/asm-mips/dec/rtc-dec.h include/asm-mips/dec/rtc-dec.h~mips-megapatch /dev/null
--- 25/include/asm-mips/dec/rtc-dec.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,32 +0,0 @@
-/*
- * include/asm-mips/dec/rtc-dec.h
- *
- * RTC definitions for DECstation style attached Dallas DS1287 chip.
- *
- * Copyright (C) 2002 Maciej W. Rozycki
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MIPS_DEC_RTC_DEC_H
-#define __ASM_MIPS_DEC_RTC_DEC_H
-
-#include <linux/types.h>
-
-#include <asm/addrspace.h>
-
-extern volatile u8 *dec_rtc_base;
-extern unsigned long dec_kn_slot_size;
-
-extern struct rtc_ops dec_rtc_ops;
-
-#define RTC_PORT(x) CPHYSADDR(dec_rtc_base)
-#define RTC_IO_EXTENT dec_kn_slot_size
-#define RTC_IOMAPPED 0
-#define RTC_IRQ 0
-
-#define RTC_DEC_YEAR 0x3f /* Where we store the real year on DECs. */
-
-#endif /* __ASM_MIPS_DEC_RTC_DEC_H */
diff -puN include/asm-mips/dma-mapping.h~mips-megapatch include/asm-mips/dma-mapping.h
--- 25/include/asm-mips/dma-mapping.h~mips-megapatch 2004-02-19 12:52:59.000000000 -0800
+++ 25-akpm/include/asm-mips/dma-mapping.h 2004-02-19 12:53:02.000000000 -0800
@@ -1,10 +1,15 @@
#ifndef _ASM_DMA_MAPPING_H
#define _ASM_DMA_MAPPING_H
+#include <linux/device.h>
+#include <asm/scatterlist.h>
#include <asm/cache.h>
-#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
-#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+void *dma_alloc_noncoherent(struct device *dev, size_t size,
+ dma_addr_t *dma_handle, int flag);
+
+void dma_free_noncoherent(struct device *dev, size_t size,
+ void *vaddr, dma_addr_t dma_handle);
void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, int flag);
@@ -12,8 +17,6 @@ void *dma_alloc_coherent(struct device *
void dma_free_coherent(struct device *dev, size_t size,
void *vaddr, dma_addr_t dma_handle);
-#ifdef CONFIG_MAPPED_DMA_IO
-
extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
enum dma_data_direction direction);
extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
@@ -33,162 +36,7 @@ extern void dma_sync_single_range(struct
extern void dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
enum dma_data_direction direction);
-#else
-
-static inline dma_addr_t
-dma_map_single(struct device *dev, void *ptr, size_t size,
- enum dma_data_direction direction)
-{
- unsigned long addr = (unsigned long) ptr;
-
- BUG_ON(direction == DMA_NONE);
-
- dma_cache_wback_inv(addr, size);
-
- return bus_to_baddr(hwdev->bus, __pa(ptr));
-}
-
-static inline void
-dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
- enum dma_data_direction direction)
-{
- BUG_ON(direction == DMA_NONE);
-
- if (direction != DMA_TO_DEVICE) {
- unsigned long addr;
-
- addr = baddr_to_bus(hwdev->bus, dma_addr) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, size);
- }
-}
-
-static inline int
-dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
- enum dma_data_direction direction)
-{
- int i;
-
- BUG_ON(direction == DMA_NONE);
-
- for (i = 0; i < nents; i++, sg++) {
- unsigned long addr;
-
- addr = (unsigned long) page_address(sg->page);
- if (addr)
- dma_cache_wback_inv(addr + sg->offset, sg->length);
- sg->dma_address = (dma_addr_t) bus_to_baddr(hwdev->bus,
- page_to_phys(sg->page) + sg->offset);
- }
-
- return nents;
-}
-
-static inline dma_addr_t
-dma_map_page(struct device *dev, struct page *page, unsigned long offset,
- size_t size, enum dma_data_direction direction)
-{
- unsigned long addr;
-
- BUG_ON(direction == DMA_NONE);
- addr = (unsigned long) page_address(page) + offset;
- dma_cache_wback_inv(addr, size);
-
- return bus_to_baddr(hwdev->bus, page_to_phys(page) + offset);
-}
-
-static inline void
-dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
- enum dma_data_direction direction)
-{
- BUG_ON(direction == DMA_NONE);
-
- if (direction != DMA_TO_DEVICE) {
- unsigned long addr;
-
- addr = baddr_to_bus(hwdev->bus, dma_address) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, size);
- }
-}
-
-static inline void
-dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
- enum dma_data_direction direction)
-{
- int i;
-
- BUG_ON(direction == DMA_NONE);
-
- if (direction == DMA_TO_DEVICE)
- return;
-
- for (i = 0; i < nhwentries; i++, sg++) {
- unsigned long addr;
-
- BUG_ON(!sg->page);
-
- addr = (unsigned long) page_address(sg->page);
- if (addr)
- dma_cache_wback_inv(addr + sg->offset, sg->length);
- }
-}
-
-static inline void
-dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size,
- enum dma_data_direction direction)
-{
- unsigned long addr;
-
- BUG_ON(direction == DMA_NONE);
-
- addr = baddr_to_bus(hwdev->bus, dma_handle) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, size);
-}
-
-static inline void
-dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
- unsigned long offset, size_t size,
- enum dma_data_direction direction)
-{
- unsigned long addr;
-
- BUG_ON(direction == DMA_NONE);
-
- addr = baddr_to_bus(hwdev->bus, dma_handle) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, size);
-}
-
-static inline void
-dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
- enum dma_data_direction direction)
-{
-#ifdef CONFIG_NONCOHERENT_IO
- int i;
-#endif
-
- BUG_ON(direction == DMA_NONE);
-
- /* Make sure that gcc doesn't leave the empty loop body. */
-#ifdef CONFIG_NONCOHERENT_IO
- for (i = 0; i < nelems; i++, sg++)
- dma_cache_wback_inv((unsigned long)page_address(sg->page),
- sg->length);
-#endif
-}
-#endif /* CONFIG_MAPPED_DMA_IO */
-
-static inline int
-dma_supported(struct device *dev, u64 mask)
-{
- /*
- * we fall back to GFP_DMA when the mask isn't all 1s,
- * so we can't guarantee allocations that must be
- * within a tighter range than GFP_DMA..
- */
- if (mask < 0x00ffffff)
- return 0;
-
- return 1;
-}
+extern int dma_supported(struct device *dev, u64 mask);
static inline int
dma_set_mask(struct device *dev, u64 mask)
@@ -208,17 +56,9 @@ dma_get_cache_alignment(void)
return 128;
}
-#ifdef CONFIG_NONCOHERENT_IO
-#define dma_is_consistent(d) (0)
-#else
-#define dma_is_consistent(d) (1)
-#endif
-
-static inline void
-dma_cache_sync(void *vaddr, size_t size,
- enum dma_data_direction direction)
-{
- dma_cache_wback_inv((unsigned long)vaddr, size);
-}
+extern int dma_is_consistent(dma_addr_t dma_addr);
+
+extern void dma_cache_sync(void *vaddr, size_t size,
+ enum dma_data_direction direction);
#endif /* _ASM_DMA_MAPPING_H */
diff -puN include/asm-mips/ds1286.h~mips-megapatch include/asm-mips/ds1286.h
--- 25/include/asm-mips/ds1286.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/ds1286.h 2004-02-19 12:53:02.000000000 -0800
@@ -3,57 +3,13 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * mc146818rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
- * Copyright Torsten Duwe <duwe@informatik.uni-erlangen.de> 1993
- * derived from Data Sheet, Copyright Motorola 1984 (!).
- * It was written to be part of the Linux operating system.
+ * Machine dependent access functions for RTC registers.
*
- * Copyright (C) 1998, 1999 Ralf Baechle
+ * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
*/
-#ifndef _ASM_DS1286_h
-#define _ASM_DS1286_h
+#ifndef _ASM_DS1286_H
+#define _ASM_DS1286_H
-#include <asm/mc146818rtc.h>
+#include <ds1286.h>
-/**********************************************************************
- * register summary
- **********************************************************************/
-#define RTC_HUNDREDTH_SECOND 0
-#define RTC_SECONDS 1
-#define RTC_MINUTES 2
-#define RTC_MINUTES_ALARM 3
-#define RTC_HOURS 4
-#define RTC_HOURS_ALARM 5
-#define RTC_DAY 6
-#define RTC_DAY_ALARM 7
-#define RTC_DATE 8
-#define RTC_MONTH 9
-#define RTC_YEAR 10
-#define RTC_CMD 11
-#define RTC_WHSEC 12
-#define RTC_WSEC 13
-#define RTC_UNUSED 14
-
-/* RTC_*_alarm is always true if 2 MSBs are set */
-# define RTC_ALARM_DONT_CARE 0xC0
-
-
-/*
- * Bits in the month register
- */
-#define RTC_EOSC 0x80
-#define RTC_ESQW 0x40
-
-/*
- * Bits in the Command register
- */
-#define RTC_TDF 0x01
-#define RTC_WAF 0x02
-#define RTC_TDM 0x04
-#define RTC_WAM 0x08
-#define RTC_PU_LVL 0x10
-#define RTC_IBH_LO 0x20
-#define RTC_IPSW 0x40
-#define RTC_TE 0x80
-
-#endif /* _ASM_DS1286_h */
+#endif /* _ASM_DS1286_H */
diff -puN include/asm-mips/elf.h~mips-megapatch include/asm-mips/elf.h
--- 25/include/asm-mips/elf.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/elf.h 2004-02-19 12:53:02.000000000 -0800
@@ -124,6 +124,7 @@ typedef double elf_fpreg_t;
typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
#ifdef CONFIG_MIPS32
+
/*
* This is used to ensure we don't load something for the wrong architecture.
*/
@@ -134,7 +135,12 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_N
\
if (__h->e_machine != EM_MIPS) \
__res = 0; \
- if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
+ if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
+ __res = 0; \
+ if ((__h->e_flags & EF_MIPS_ABI2) != 0) \
+ __res = 0; \
+ if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
+ ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
__res = 0; \
\
__res; \
@@ -148,7 +154,6 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_N
#endif /* CONFIG_MIPS32 */
#ifdef CONFIG_MIPS64
-
/*
* This is used to ensure we don't load something for the wrong architecture.
*/
@@ -159,12 +164,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_N
\
if (__h->e_machine != EM_MIPS) \
__res = 0; \
- if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
- __res = 0; \
- if ((__h->e_flags & EF_MIPS_ABI2) != 0) \
- __res = 0; \
- if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
- ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
+ if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
__res = 0; \
\
__res; \
@@ -228,7 +228,7 @@ do { current->thread.mflags &= ~MF_ABI_M
#define irix_elf_check_arch(hdr) ((hdr)->e_machine == EM_MIPS)
#define USE_ELF_CORE_DUMP
-#define ELF_EXEC_PAGESIZE 4096
+#define ELF_EXEC_PAGESIZE PAGE_SIZE
#define ELF_CORE_COPY_REGS(_dest,_regs) \
memcpy((char *) &_dest, (char *) _regs, \
diff -puN include/asm-mips/floppy.h~mips-megapatch include/asm-mips/floppy.h
--- 25/include/asm-mips/floppy.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/floppy.h 2004-02-19 12:53:02.000000000 -0800
@@ -10,57 +10,10 @@
#ifndef _ASM_FLOPPY_H
#define _ASM_FLOPPY_H
-struct fd_ops {
- unsigned char (*fd_inb)(unsigned int port);
- void (*fd_outb)(unsigned char value, unsigned int port);
-
- /*
- * How to access the floppy DMA functions.
- */
- void (*fd_enable_dma)(int channel);
- void (*fd_disable_dma)(int channel);
- int (*fd_request_dma)(int channel);
- void (*fd_free_dma)(int channel);
- void (*fd_clear_dma_ff)(int channel);
- void (*fd_set_dma_mode)(int channel, char mode);
- void (*fd_set_dma_addr)(int channel, unsigned int a);
- void (*fd_set_dma_count)(int channel, unsigned int count);
- int (*fd_get_dma_residue)(int channel);
- void (*fd_enable_irq)(int irq);
- void (*fd_disable_irq)(int irq);
- unsigned long (*fd_getfdaddr1)(void);
- unsigned long (*fd_dma_mem_alloc)(unsigned long size);
- void (*fd_dma_mem_free)(unsigned long addr, unsigned long size);
- unsigned long (*fd_drive_type)(unsigned long);
-};
-
-extern struct fd_ops *fd_ops;
-
-#define fd_inb(port) fd_ops->fd_inb(port)
-#define fd_outb(value,port) fd_ops->fd_outb(value,port)
-
-#define fd_enable_dma() fd_ops->fd_enable_dma(FLOPPY_DMA)
-#define fd_disable_dma() fd_ops->fd_disable_dma(FLOPPY_DMA)
-#define fd_request_dma() fd_ops->fd_request_dma(FLOPPY_DMA)
-#define fd_free_dma() fd_ops->fd_free_dma(FLOPPY_DMA)
-#define fd_clear_dma_ff() fd_ops->fd_clear_dma_ff(FLOPPY_DMA)
-#define fd_set_dma_mode(mode) fd_ops->fd_set_dma_mode(FLOPPY_DMA, mode)
-#define fd_set_dma_addr(addr) fd_ops->fd_set_dma_addr(FLOPPY_DMA, \
- isa_virt_to_bus(addr))
-#define fd_set_dma_count(count) fd_ops->fd_set_dma_count(FLOPPY_DMA,count)
-#define fd_get_dma_residue() fd_ops->fd_get_dma_residue(FLOPPY_DMA)
-
-#define fd_enable_irq() fd_ops->fd_enable_irq(FLOPPY_IRQ)
-#define fd_disable_irq() fd_ops->fd_disable_irq(FLOPPY_IRQ)
-#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \
- SA_INTERRUPT | SA_SAMPLE_RANDOM, \
- "floppy", NULL)
-#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
-#define fd_dma_mem_alloc(size) fd_ops->fd_dma_mem_alloc(size)
-#define fd_dma_mem_free(mem,size) fd_ops->fd_dma_mem_free(mem,size)
-#define fd_drive_type(n) fd_ops->fd_drive_type(n)
-#define fd_cacheflush(addr,size) \
- dma_cache_wback_inv((unsigned long)(addr),(size))
+static inline void fd_cacheflush(char * addr, long size)
+{
+ dma_cache_wback_inv((unsigned long)addr,size);
+}
#define MAX_BUFFER_SECTORS 24
@@ -71,10 +24,10 @@ extern struct fd_ops *fd_ops;
* FIXME: This information should come from the ARC configuration tree
* or whereever a particular machine has stored this ...
*/
-#define FLOPPY0_TYPE fd_drive_type(0)
-#define FLOPPY1_TYPE fd_drive_type(1)
+#define FLOPPY0_TYPE fd_drive_type(0)
+#define FLOPPY1_TYPE fd_drive_type(1)
-#define FDC1 fd_ops->fd_getfdaddr1();
+#define FDC1 fd_getfdaddr1();
#define N_FDC 1 /* do you *really* want a second controller? */
#define N_DRIVE 8
@@ -98,4 +51,6 @@ extern struct fd_ops *fd_ops;
#define EXTRA_FLOPPY_PARAMS
+#include <floppy.h>
+
#endif /* _ASM_FLOPPY_H */
diff -puN include/asm-mips/fpu.h~mips-megapatch include/asm-mips/fpu.h
--- 25/include/asm-mips/fpu.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/fpu.h 2004-02-19 12:53:02.000000000 -0800
@@ -16,6 +16,7 @@
#include <asm/mipsregs.h>
#include <asm/cpu.h>
+#include <asm/cpu-features.h>
#include <asm/bitops.h>
#include <asm/processor.h>
#include <asm/current.h>
diff -puN -L include/asm-mips/galileo-boards/ev64120.h include/asm-mips/galileo-boards/ev64120.h~mips-megapatch /dev/null
--- 25/include/asm-mips/galileo-boards/ev64120.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,59 +0,0 @@
-/*
- * This is a direct copy of the ev96100.h file, with a global
- * search and replace. The numbers are the same.
- *
- * The reason I'm duplicating this is so that the 64120/96100
- * defines won't be confusing in the source code.
- */
-#ifndef _MIPS_EV64120_H
-#define _MIPS_EV64120_H
-
-#include <asm/addrspace.h>
-
-/*
- * GT64120 config space base address
- */
-#define GT64120_BASE (KSEG1ADDR(0x14000000))
-#define MIPS_GT_BASE GT64120_BASE
-
-/*
- * PCI Bus allocation
- */
-#define GT_PCI_MEM_BASE 0x12000000
-#define GT_PCI_MEM_SIZE 0x02000000
-#define GT_PCI_IO_BASE 0x10000000
-#define GT_PCI_IO_SIZE 0x02000000
-#define GT_ISA_IO_BASE PCI_IO_BASE
-
-/*
- * Duart I/O ports.
- */
-#define EV64120_COM1_BASE_ADDR (0x1d000000 + 0x20)
-#define EV64120_COM2_BASE_ADDR (0x1d000000 + 0x00)
-
-
-/*
- * EV64120 interrupt controller register base.
- */
-#define EV64120_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000))
-
-/*
- * EV64120 UART register base.
- */
-#define EV64120_UART0_REGS_BASE (KSEG1ADDR(EV64120_COM1_BASE_ADDR))
-#define EV64120_UART1_REGS_BASE (KSEG1ADDR(EV64120_COM2_BASE_ADDR))
-#define EV64120_BASE_BAUD ( 3686400 / 16 )
-
-
-/*
- * Because of an error/peculiarity in the Galileo chip, we need to swap the
- * bytes when running bigendian.
- */
-
-#define GT_WRITE(ofs, data) \
- *(volatile u32 *)(MIPS_GT_BASE+ofs) = cpu_to_le32(data)
-#define GT_READ(ofs, data) \
- *data = le32_to_cpu(*(volatile u32 *)(MIPS_GT_BASE+ofs))
-
-
-#endif /* !(_MIPS_EV64120_H) */
diff -puN -L include/asm-mips/galileo-boards/ev64120int.h include/asm-mips/galileo-boards/ev64120int.h~mips-megapatch /dev/null
--- 25/include/asm-mips/galileo-boards/ev64120int.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,36 +0,0 @@
-#ifndef IRQ_HANDLER_
-#define IRQ_HANDLER_
-
-#define INT_CAUSE_MAIN 0
-#define INT_CAUSE_HIGH 1
-
-#define MAX_CAUSE_REGS 4
-#define MAX_CAUSE_REG_WIDTH 32
-
-void hook_irq_handler (int int_cause , int bit_num , void *isr_ptr);
-int disable_galileo_irq (int int_cause , int bit_num);
-int enable_galileo_irq (int int_cause , int bit_num);
-
-extern struct tq_struct irq_handlers[MAX_CAUSE_REGS][MAX_CAUSE_REG_WIDTH];
-
-/*
- PCI interrupts will come in on either the INTA or
- INTD interrups lines, which are mapped to the #2 and
- #5 interrupt pins of the MIPS. On our boards, they
- all either come in on IntD or they all come in on
- IntA, they aren't mixed. There can be numerous PCI
- interrupts, so we keep a list of the "requested"
- interrupt numbers and go through the list whenever
- we get an IntA/D.
-
- All PCI interrupts have numbers >= 20 by arbitrary convention. Any
- interrupt < 8 is an interrupt that is maskable on the
- MIPS.
-*/
-
-#define TIMER 4
-#define INTA 2
-#define INTD 5
-
-
-#endif /* IRQ_HANDLER_ */
diff -puN include/asm-mips/galileo-boards/ev96100.h~mips-megapatch include/asm-mips/galileo-boards/ev96100.h
--- 25/include/asm-mips/galileo-boards/ev96100.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/galileo-boards/ev96100.h 2004-02-19 12:53:02.000000000 -0800
@@ -9,47 +9,47 @@
/*
* GT64120 config space base address
*/
-#define GT64120_BASE (KSEG1ADDR(0x14000000))
-#define MIPS_GT_BASE GT64120_BASE
+#define GT64120_BASE (KSEG1ADDR(0x14000000))
+#define MIPS_GT_BASE GT64120_BASE
/*
* PCI Bus allocation
*/
-#define GT_PCI_MEM_BASE 0x12000000
-#define GT_PCI_MEM_SIZE 0x02000000
-#define GT_PCI_IO_BASE 0x10000000
-#define GT_PCI_IO_SIZE 0x02000000
+#define GT_PCI_MEM_BASE 0x12000000UL
+#define GT_PCI_MEM_SIZE 0x02000000UL
+#define GT_PCI_IO_BASE 0x10000000UL
+#define GT_PCI_IO_SIZE 0x02000000UL
#define GT_ISA_IO_BASE PCI_IO_BASE
/*
* Duart I/O ports.
*/
-#define EV96100_COM1_BASE_ADDR (0xBD000000 + 0x20)
-#define EV96100_COM2_BASE_ADDR (0xBD000000 + 0x00)
+#define EV96100_COM1_BASE_ADDR (0xBD000000 + 0x20)
+#define EV96100_COM2_BASE_ADDR (0xBD000000 + 0x00)
/*
* EV96100 interrupt controller register base.
*/
-#define EV96100_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000))
+#define EV96100_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000))
/*
* EV96100 UART register base.
*/
-#define EV96100_UART0_REGS_BASE EV96100_COM1_BASE_ADDR
-#define EV96100_UART1_REGS_BASE EV96100_COM2_BASE_ADDR
-#define EV96100_BASE_BAUD ( 3686400 / 16 )
+#define EV96100_UART0_REGS_BASE EV96100_COM1_BASE_ADDR
+#define EV96100_UART1_REGS_BASE EV96100_COM2_BASE_ADDR
+#define EV96100_BASE_BAUD ( 3686400 / 16 )
/*
* Because of an error/peculiarity in the Galileo chip, we need to swap the
* bytes when running bigendian.
*/
-
-#define GT_WRITE(ofs, data) \
- *(volatile u32 *)(MIPS_GT_BASE+ofs) = cpu_to_le32(data)
-#define GT_READ(ofs, data) \
- data = le32_to_cpu(*(volatile u32 *)(MIPS_GT_BASE+ofs))
-
+#define __GT_READ(ofs) \
+ (*(volatile u32 *)(GT64120_BASE+(ofs)))
+#define __GT_WRITE(ofs, data) \
+ do { *(volatile u32 *)(GT64120_BASE+(ofs)) = (data); } while (0)
+#define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs))
+#define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data))
#endif /* !(_MIPS_EV96100_H) */
diff -puN include/asm-mips/galileo-boards/gt96100.h~mips-megapatch include/asm-mips/galileo-boards/gt96100.h
--- 25/include/asm-mips/galileo-boards/gt96100.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/galileo-boards/gt96100.h 2004-02-19 12:53:02.000000000 -0800
@@ -3,8 +3,6 @@
* Author: MontaVista Software, Inc.
* stevel@mvista.com or source@mvista.com
*
- * ########################################################################
- *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -18,10 +16,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
- * ########################################################################
- *
* Register offsets of the MIPS GT96100 Advanced Communication Controller.
- *
*/
#ifndef _GT96100_H
#define _GT96100_H
diff -puN include/asm-mips/gdb-stub.h~mips-megapatch include/asm-mips/gdb-stub.h
--- 25/include/asm-mips/gdb-stub.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/gdb-stub.h 2004-02-19 12:53:02.000000000 -0800
@@ -22,11 +22,11 @@
* Stack layout for the GDB exception handler
* Derived from the stack layout described in asm-mips/stackframe.h
*
- * The first PTRSIZE*5 bytes are argument save space for C subroutines.
+ * The first PTRSIZE*6 bytes are argument save space for C subroutines.
*/
#define NUMREGS 90
-#define GDB_FR_REG0 (PTRSIZE*5) /* 0 */
+#define GDB_FR_REG0 (PTRSIZE*6) /* 0 */
#define GDB_FR_REG1 ((GDB_FR_REG0) + LONGSIZE) /* 1 */
#define GDB_FR_REG2 ((GDB_FR_REG1) + LONGSIZE) /* 2 */
#define GDB_FR_REG3 ((GDB_FR_REG2) + LONGSIZE) /* 3 */
@@ -143,9 +143,9 @@
struct gdb_regs {
/*
* Pad bytes for argument save space on the stack
- * 20/40 Bytes for 32/64 bit code
+ * 24/48 Bytes for 32/64 bit code
*/
- unsigned long pad0[5];
+ unsigned long pad0[6];
/*
* saved main processor registers
diff -puN -L include/asm-mips/gt64120/gt64120.h include/asm-mips/gt64120/gt64120.h~mips-megapatch /dev/null
--- 25/include/asm-mips/gt64120/gt64120.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,444 +0,0 @@
-/*
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- * Carsten Langgaard, carstenl@mips.com
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#ifndef __ASM_GT64120_GT64120_H
-#define __ASM_GT64120_GT64120_H
-
-#define MSK(n) ((1 << (n)) - 1)
-
-/*
- * Register offset addresses
- */
-#define GT_CPU_OFS 0x000
-
-/*
- * Interrupt Registers
- */
-#define GT_SCS10LD_OFS 0x008
-#define GT_SCS10HD_OFS 0x010
-#define GT_SCS32LD_OFS 0x018
-#define GT_SCS32HD_OFS 0x020
-#define GT_CS20LD_OFS 0x028
-#define GT_CS20HD_OFS 0x030
-#define GT_CS3BOOTLD_OFS 0x038
-#define GT_CS3BOOTHD_OFS 0x040
-#define GT_PCI0IOLD_OFS 0x048
-#define GT_PCI0IOHD_OFS 0x050
-#define GT_PCI0M0LD_OFS 0x058
-#define GT_PCI0M0HD_OFS 0x060
-#define GT_ISD_OFS 0x068
-#define GT_PCI0M1LD_OFS 0x080
-#define GT_PCI0M1HD_OFS 0x088
-#define GT_PCI1IOLD_OFS 0x090
-#define GT_PCI1IOHD_OFS 0x098
-#define GT_PCI1M0LD_OFS 0x0a0
-#define GT_PCI1M0HD_OFS 0x0a8
-#define GT_PCI1M1LD_OFS 0x0b0
-#define GT_PCI1M1HD_OFS 0x0b8
-
-/*
- * GT64120A only
- */
-#define GT_PCI0IOREMAP_OFS 0x0f0
-#define GT_PCI0M0REMAP_OFS 0x0f8
-#define GT_PCI0M1REMAP_OFS 0x100
-#define GT_PCI1IOREMAP_OFS 0x108
-#define GT_PCI1M0REMAP_OFS 0x110
-#define GT_PCI1M1REMAP_OFS 0x118
-
-#define GT_SCS0LD_OFS 0x400
-#define GT_SCS0HD_OFS 0x404
-#define GT_SCS1LD_OFS 0x408
-#define GT_SCS1HD_OFS 0x40c
-#define GT_SCS2LD_OFS 0x410
-#define GT_SCS2HD_OFS 0x414
-#define GT_SCS3LD_OFS 0x418
-#define GT_SCS3HD_OFS 0x41c
-#define GT_CS0LD_OFS 0x420
-#define GT_CS0HD_OFS 0x424
-#define GT_CS1LD_OFS 0x428
-#define GT_CS1HD_OFS 0x42c
-#define GT_CS2LD_OFS 0x430
-#define GT_CS2HD_OFS 0x434
-#define GT_CS3LD_OFS 0x438
-#define GT_CS3HD_OFS 0x43c
-#define GT_BOOTLD_OFS 0x440
-#define GT_BOOTHD_OFS 0x444
-
-#define GT_SDRAM_B0_OFS 0x44c
-#define GT_SDRAM_CFG_OFS 0x448
-#define GT_SDRAM_B2_OFS 0x454
-#define GT_SDRAM_OPMODE_OFS 0x474
-#define GT_SDRAM_BM_OFS 0x478
-#define GT_SDRAM_ADDRDECODE_OFS 0x47c
-
-#define GT_PCI0_CMD_OFS 0xc00 /* GT64120A only */
-#define GT_PCI0_TOR_OFS 0xc04
-#define GT_PCI0_BS_SCS10_OFS 0xc08
-#define GT_PCI0_BS_SCS32_OFS 0xc0c
-#define GT_INTRCAUSE_OFS 0xc18
-#define GT_INTRMASK_OFS 0xc1c /* GT64120A only */
-#define GT_PCI0_IACK_OFS 0xc34
-#define GT_PCI0_BARE_OFS 0xc3c
-#define GT_HINTRCAUSE_OFS 0xc98 /* GT64120A only */
-#define GT_HINTRMASK_OFS 0xc9c /* GT64120A only */
-#define GT_PCI1_CFGADDR_OFS 0xcf0 /* GT64120A only */
-#define GT_PCI1_CFGDATA_OFS 0xcf4 /* GT64120A only */
-#define GT_PCI0_CFGADDR_OFS 0xcf8
-#define GT_PCI0_CFGDATA_OFS 0xcfc
-
-
-/*
- * Timer/Counter. GT64120A only.
- */
-#define GT_TC0_OFS 0x850
-#define GT_TC1_OFS 0x854
-#define GT_TC2_OFS 0x858
-#define GT_TC3_OFS 0x85C
-#define GT_TC_CONTROL_OFS 0x864
-
-/*
- * I2O Support Registers
- */
-#define INBOUND_MESSAGE_REGISTER0_PCI_SIDE 0x010
-#define INBOUND_MESSAGE_REGISTER1_PCI_SIDE 0x014
-#define OUTBOUND_MESSAGE_REGISTER0_PCI_SIDE 0x018
-#define OUTBOUND_MESSAGE_REGISTER1_PCI_SIDE 0x01c
-#define INBOUND_DOORBELL_REGISTER_PCI_SIDE 0x020
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE 0x024
-#define INBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE 0x028
-#define OUTBOUND_DOORBELL_REGISTER_PCI_SIDE 0x02c
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE 0x030
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE 0x034
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE 0x040
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE 0x044
-#define QUEUE_CONTROL_REGISTER_PCI_SIDE 0x050
-#define QUEUE_BASE_ADDRESS_REGISTER_PCI_SIDE 0x054
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE 0x060
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE 0x064
-#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE 0x068
-#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE 0x06c
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE 0x070
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE 0x074
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE 0x078
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE 0x07c
-
-#define INBOUND_MESSAGE_REGISTER0_CPU_SIDE 0x1c10
-#define INBOUND_MESSAGE_REGISTER1_CPU_SIDE 0x1c14
-#define OUTBOUND_MESSAGE_REGISTER0_CPU_SIDE 0x1c18
-#define OUTBOUND_MESSAGE_REGISTER1_CPU_SIDE 0x1c1c
-#define INBOUND_DOORBELL_REGISTER_CPU_SIDE 0x1c20
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE 0x1c24
-#define INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE 0x1c28
-#define OUTBOUND_DOORBELL_REGISTER_CPU_SIDE 0x1c2c
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE 0x1c30
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE 0x1c34
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE 0x1c40
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE 0x1c44
-#define QUEUE_CONTROL_REGISTER_CPU_SIDE 0x1c50
-#define QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE 0x1c54
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c60
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c64
-#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c68
-#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c6c
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c70
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c74
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c78
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c7c
-
-/*
- * Register encodings
- */
-#define GT_CPU_ENDIAN_SHF 12
-#define GT_CPU_ENDIAN_MSK (MSK(1) << GT_CPU_ENDIAN_SHF)
-#define GT_CPU_ENDIAN_BIT GT_CPU_ENDIAN_MSK
-#define GT_CPU_WR_SHF 16
-#define GT_CPU_WR_MSK (MSK(1) << GT_CPU_WR_SHF)
-#define GT_CPU_WR_BIT GT_CPU_WR_MSK
-#define GT_CPU_WR_DXDXDXDX 0
-#define GT_CPU_WR_DDDD 1
-
-
-#define GT_CFGADDR_CFGEN_SHF 31
-#define GT_CFGADDR_CFGEN_MSK (MSK(1) << GT_CFGADDR_CFGEN_SHF)
-#define GT_CFGADDR_CFGEN_BIT GT_CFGADDR_CFGEN_MSK
-
-#define GT_CFGADDR_BUSNUM_SHF 16
-#define GT_CFGADDR_BUSNUM_MSK (MSK(8) << GT_CFGADDR_BUSNUM_SHF)
-
-#define GT_CFGADDR_DEVNUM_SHF 11
-#define GT_CFGADDR_DEVNUM_MSK (MSK(5) << GT_CFGADDR_DEVNUM_SHF)
-
-#define GT_CFGADDR_FUNCNUM_SHF 8
-#define GT_CFGADDR_FUNCNUM_MSK (MSK(3) << GT_CFGADDR_FUNCNUM_SHF)
-
-#define GT_CFGADDR_REGNUM_SHF 2
-#define GT_CFGADDR_REGNUM_MSK (MSK(6) << GT_CFGADDR_REGNUM_SHF)
-
-
-#define GT_SDRAM_BM_ORDER_SHF 2
-#define GT_SDRAM_BM_ORDER_MSK (MSK(1) << GT_SDRAM_BM_ORDER_SHF)
-#define GT_SDRAM_BM_ORDER_BIT GT_SDRAM_BM_ORDER_MSK
-#define GT_SDRAM_BM_ORDER_SUB 1
-#define GT_SDRAM_BM_ORDER_LIN 0
-
-#define GT_SDRAM_BM_RSVD_ALL1 0xffb
-
-
-#define GT_SDRAM_ADDRDECODE_ADDR_SHF 0
-#define GT_SDRAM_ADDRDECODE_ADDR_MSK (MSK(3) << GT_SDRAM_ADDRDECODE_ADDR_SHF)
-#define GT_SDRAM_ADDRDECODE_ADDR_0 0
-#define GT_SDRAM_ADDRDECODE_ADDR_1 1
-#define GT_SDRAM_ADDRDECODE_ADDR_2 2
-#define GT_SDRAM_ADDRDECODE_ADDR_3 3
-#define GT_SDRAM_ADDRDECODE_ADDR_4 4
-#define GT_SDRAM_ADDRDECODE_ADDR_5 5
-#define GT_SDRAM_ADDRDECODE_ADDR_6 6
-#define GT_SDRAM_ADDRDECODE_ADDR_7 7
-
-
-#define GT_SDRAM_B0_CASLAT_SHF 0
-#define GT_SDRAM_B0_CASLAT_MSK (MSK(2) << GT_SDRAM_B0__SHF)
-#define GT_SDRAM_B0_CASLAT_2 1
-#define GT_SDRAM_B0_CASLAT_3 2
-
-#define GT_SDRAM_B0_FTDIS_SHF 2
-#define GT_SDRAM_B0_FTDIS_MSK (MSK(1) << GT_SDRAM_B0_FTDIS_SHF)
-#define GT_SDRAM_B0_FTDIS_BIT GT_SDRAM_B0_FTDIS_MSK
-
-#define GT_SDRAM_B0_SRASPRCHG_SHF 3
-#define GT_SDRAM_B0_SRASPRCHG_MSK (MSK(1) << GT_SDRAM_B0_SRASPRCHG_SHF)
-#define GT_SDRAM_B0_SRASPRCHG_BIT GT_SDRAM_B0_SRASPRCHG_MSK
-#define GT_SDRAM_B0_SRASPRCHG_2 0
-#define GT_SDRAM_B0_SRASPRCHG_3 1
-
-#define GT_SDRAM_B0_B0COMPAB_SHF 4
-#define GT_SDRAM_B0_B0COMPAB_MSK (MSK(1) << GT_SDRAM_B0_B0COMPAB_SHF)
-#define GT_SDRAM_B0_B0COMPAB_BIT GT_SDRAM_B0_B0COMPAB_MSK
-
-#define GT_SDRAM_B0_64BITINT_SHF 5
-#define GT_SDRAM_B0_64BITINT_MSK (MSK(1) << GT_SDRAM_B0_64BITINT_SHF)
-#define GT_SDRAM_B0_64BITINT_BIT GT_SDRAM_B0_64BITINT_MSK
-#define GT_SDRAM_B0_64BITINT_2 0
-#define GT_SDRAM_B0_64BITINT_4 1
-
-#define GT_SDRAM_B0_BW_SHF 6
-#define GT_SDRAM_B0_BW_MSK (MSK(1) << GT_SDRAM_B0_BW_SHF)
-#define GT_SDRAM_B0_BW_BIT GT_SDRAM_B0_BW_MSK
-#define GT_SDRAM_B0_BW_32 0
-#define GT_SDRAM_B0_BW_64 1
-
-#define GT_SDRAM_B0_BLODD_SHF 7
-#define GT_SDRAM_B0_BLODD_MSK (MSK(1) << GT_SDRAM_B0_BLODD_SHF)
-#define GT_SDRAM_B0_BLODD_BIT GT_SDRAM_B0_BLODD_MSK
-
-#define GT_SDRAM_B0_PAR_SHF 8
-#define GT_SDRAM_B0_PAR_MSK (MSK(1) << GT_SDRAM_B0_PAR_SHF)
-#define GT_SDRAM_B0_PAR_BIT GT_SDRAM_B0_PAR_MSK
-
-#define GT_SDRAM_B0_BYPASS_SHF 9
-#define GT_SDRAM_B0_BYPASS_MSK (MSK(1) << GT_SDRAM_B0_BYPASS_SHF)
-#define GT_SDRAM_B0_BYPASS_BIT GT_SDRAM_B0_BYPASS_MSK
-
-#define GT_SDRAM_B0_SRAS2SCAS_SHF 10
-#define GT_SDRAM_B0_SRAS2SCAS_MSK (MSK(1) << GT_SDRAM_B0_SRAS2SCAS_SHF)
-#define GT_SDRAM_B0_SRAS2SCAS_BIT GT_SDRAM_B0_SRAS2SCAS_MSK
-#define GT_SDRAM_B0_SRAS2SCAS_2 0
-#define GT_SDRAM_B0_SRAS2SCAS_3 1
-
-#define GT_SDRAM_B0_SIZE_SHF 11
-#define GT_SDRAM_B0_SIZE_MSK (MSK(1) << GT_SDRAM_B0_SIZE_SHF)
-#define GT_SDRAM_B0_SIZE_BIT GT_SDRAM_B0_SIZE_MSK
-#define GT_SDRAM_B0_SIZE_16M 0
-#define GT_SDRAM_B0_SIZE_64M 1
-
-#define GT_SDRAM_B0_EXTPAR_SHF 12
-#define GT_SDRAM_B0_EXTPAR_MSK (MSK(1) << GT_SDRAM_B0_EXTPAR_SHF)
-#define GT_SDRAM_B0_EXTPAR_BIT GT_SDRAM_B0_EXTPAR_MSK
-
-#define GT_SDRAM_B0_BLEN_SHF 13
-#define GT_SDRAM_B0_BLEN_MSK (MSK(1) << GT_SDRAM_B0_BLEN_SHF)
-#define GT_SDRAM_B0_BLEN_BIT GT_SDRAM_B0_BLEN_MSK
-#define GT_SDRAM_B0_BLEN_8 0
-#define GT_SDRAM_B0_BLEN_4 1
-
-
-#define GT_SDRAM_CFG_REFINT_SHF 0
-#define GT_SDRAM_CFG_REFINT_MSK (MSK(14) << GT_SDRAM_CFG_REFINT_SHF)
-
-#define GT_SDRAM_CFG_NINTERLEAVE_SHF 14
-#define GT_SDRAM_CFG_NINTERLEAVE_MSK (MSK(1) << GT_SDRAM_CFG_NINTERLEAVE_SHF)
-#define GT_SDRAM_CFG_NINTERLEAVE_BIT GT_SDRAM_CFG_NINTERLEAVE_MSK
-
-#define GT_SDRAM_CFG_RMW_SHF 15
-#define GT_SDRAM_CFG_RMW_MSK (MSK(1) << GT_SDRAM_CFG_RMW_SHF)
-#define GT_SDRAM_CFG_RMW_BIT GT_SDRAM_CFG_RMW_MSK
-
-#define GT_SDRAM_CFG_NONSTAGREF_SHF 16
-#define GT_SDRAM_CFG_NONSTAGREF_MSK (MSK(1) << GT_SDRAM_CFG_NONSTAGREF_SHF)
-#define GT_SDRAM_CFG_NONSTAGREF_BIT GT_SDRAM_CFG_NONSTAGREF_MSK
-
-#define GT_SDRAM_CFG_DUPCNTL_SHF 19
-#define GT_SDRAM_CFG_DUPCNTL_MSK (MSK(1) << GT_SDRAM_CFG_DUPCNTL_SHF)
-#define GT_SDRAM_CFG_DUPCNTL_BIT GT_SDRAM_CFG_DUPCNTL_MSK
-
-#define GT_SDRAM_CFG_DUPBA_SHF 20
-#define GT_SDRAM_CFG_DUPBA_MSK (MSK(1) << GT_SDRAM_CFG_DUPBA_SHF)
-#define GT_SDRAM_CFG_DUPBA_BIT GT_SDRAM_CFG_DUPBA_MSK
-
-#define GT_SDRAM_CFG_DUPEOT0_SHF 21
-#define GT_SDRAM_CFG_DUPEOT0_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT0_SHF)
-#define GT_SDRAM_CFG_DUPEOT0_BIT GT_SDRAM_CFG_DUPEOT0_MSK
-
-#define GT_SDRAM_CFG_DUPEOT1_SHF 22
-#define GT_SDRAM_CFG_DUPEOT1_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT1_SHF)
-#define GT_SDRAM_CFG_DUPEOT1_BIT GT_SDRAM_CFG_DUPEOT1_MSK
-
-#define GT_SDRAM_OPMODE_OP_SHF 0
-#define GT_SDRAM_OPMODE_OP_MSK (MSK(3) << GT_SDRAM_OPMODE_OP_SHF)
-#define GT_SDRAM_OPMODE_OP_NORMAL 0
-#define GT_SDRAM_OPMODE_OP_NOP 1
-#define GT_SDRAM_OPMODE_OP_PRCHG 2
-#define GT_SDRAM_OPMODE_OP_MODE 3
-#define GT_SDRAM_OPMODE_OP_CBR 4
-
-
-#define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF 0
-#define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF)
-#define GT_PCI0_BARE_SWSCS3BOOTDIS_BIT GT_PCI0_BARE_SWSCS3BOOTDIS_MSK
-
-#define GT_PCI0_BARE_SWSCS32DIS_SHF 1
-#define GT_PCI0_BARE_SWSCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS32DIS_SHF)
-#define GT_PCI0_BARE_SWSCS32DIS_BIT GT_PCI0_BARE_SWSCS32DIS_MSK
-
-#define GT_PCI0_BARE_SWSCS10DIS_SHF 2
-#define GT_PCI0_BARE_SWSCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS10DIS_SHF)
-#define GT_PCI0_BARE_SWSCS10DIS_BIT GT_PCI0_BARE_SWSCS10DIS_MSK
-
-#define GT_PCI0_BARE_INTIODIS_SHF 3
-#define GT_PCI0_BARE_INTIODIS_MSK (MSK(1) << GT_PCI0_BARE_INTIODIS_SHF)
-#define GT_PCI0_BARE_INTIODIS_BIT GT_PCI0_BARE_INTIODIS_MSK
-
-#define GT_PCI0_BARE_INTMEMDIS_SHF 4
-#define GT_PCI0_BARE_INTMEMDIS_MSK (MSK(1) << GT_PCI0_BARE_INTMEMDIS_SHF)
-#define GT_PCI0_BARE_INTMEMDIS_BIT GT_PCI0_BARE_INTMEMDIS_MSK
-
-#define GT_PCI0_BARE_CS3BOOTDIS_SHF 5
-#define GT_PCI0_BARE_CS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_CS3BOOTDIS_SHF)
-#define GT_PCI0_BARE_CS3BOOTDIS_BIT GT_PCI0_BARE_CS3BOOTDIS_MSK
-
-#define GT_PCI0_BARE_CS20DIS_SHF 6
-#define GT_PCI0_BARE_CS20DIS_MSK (MSK(1) << GT_PCI0_BARE_CS20DIS_SHF)
-#define GT_PCI0_BARE_CS20DIS_BIT GT_PCI0_BARE_CS20DIS_MSK
-
-#define GT_PCI0_BARE_SCS32DIS_SHF 7
-#define GT_PCI0_BARE_SCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS32DIS_SHF)
-#define GT_PCI0_BARE_SCS32DIS_BIT GT_PCI0_BARE_SCS32DIS_MSK
-
-#define GT_PCI0_BARE_SCS10DIS_SHF 8
-#define GT_PCI0_BARE_SCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS10DIS_SHF)
-#define GT_PCI0_BARE_SCS10DIS_BIT GT_PCI0_BARE_SCS10DIS_MSK
-
-
-#define GT_INTRCAUSE_MASABORT0_SHF 18
-#define GT_INTRCAUSE_MASABORT0_MSK (MSK(1) << GT_INTRCAUSE_MASABORT0_SHF)
-#define GT_INTRCAUSE_MASABORT0_BIT GT_INTRCAUSE_MASABORT0_MSK
-
-#define GT_INTRCAUSE_TARABORT0_SHF 19
-#define GT_INTRCAUSE_TARABORT0_MSK (MSK(1) << GT_INTRCAUSE_TARABORT0_SHF)
-#define GT_INTRCAUSE_TARABORT0_BIT GT_INTRCAUSE_TARABORT0_MSK
-
-
-#define GT_PCI0_CFGADDR_REGNUM_SHF 2
-#define GT_PCI0_CFGADDR_REGNUM_MSK (MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF)
-#define GT_PCI0_CFGADDR_FUNCTNUM_SHF 8
-#define GT_PCI0_CFGADDR_FUNCTNUM_MSK (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF)
-#define GT_PCI0_CFGADDR_DEVNUM_SHF 11
-#define GT_PCI0_CFGADDR_DEVNUM_MSK (MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF)
-#define GT_PCI0_CFGADDR_BUSNUM_SHF 16
-#define GT_PCI0_CFGADDR_BUSNUM_MSK (MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF)
-#define GT_PCI0_CFGADDR_CONFIGEN_SHF 31
-#define GT_PCI0_CFGADDR_CONFIGEN_MSK (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF)
-#define GT_PCI0_CFGADDR_CONFIGEN_BIT GT_PCI0_CFGADDR_CONFIGEN_MSK
-
-#define GT_PCI0_CMD_MBYTESWAP_SHF 0
-#define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
-#define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK
-#define GT_PCI0_CMD_MWORDSWAP_SHF 10
-#define GT_PCI0_CMD_MWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_MWORDSWAP_SHF)
-#define GT_PCI0_CMD_MWORDSWAP_BIT GT_PCI0_CMD_MWORDSWAP_MSK
-#define GT_PCI0_CMD_SBYTESWAP_SHF 16
-#define GT_PCI0_CMD_SBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_SBYTESWAP_SHF)
-#define GT_PCI0_CMD_SBYTESWAP_BIT GT_PCI0_CMD_SBYTESWAP_MSK
-#define GT_PCI0_CMD_SWORDSWAP_SHF 11
-#define GT_PCI0_CMD_SWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF)
-#define GT_PCI0_CMD_SWORDSWAP_BIT GT_PCI0_CMD_SWORDSWAP_MSK
-
-/*
- * Misc
- */
-#define GT_DEF_BASE 0x14000000
-
-#define GT_DEF_PCI0_IO_BASE 0x10000000
-#define GT_DEF_PCI0_IO_SIZE 0x02000000
-#define GT_DEF_PCI0_MEM0_BASE 0x12000000
-#define GT_DEF_PCI0_MEM0_SIZE 0x02000000
-
-#define GT_MAX_BANKSIZE (256 * 1024 * 1024) /* Max 256MB bank */
-#define GT_LATTIM_MIN 6 /* Minimum lat */
-
-
-/***********************************************************************
- * BOARD-DEPENDENT SECTIONS *
- ***********************************************************************
- */
-
-/*
- * include asm/gt64120/<board>/gt64120_dep.h file
- */
-
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#if defined(CONFIG_MOMENCO_OCELOT)
-#include <asm/gt64120/momenco_ocelot/gt64120_dep.h>
-#endif
-
-/*
- * The gt64120_dep.h file must define the following macros
- *
- * GT_READ(ofs, data_pointer)
- * GT_WRITE(ofs, data) - read/write GT64120 registers in 32bit
- *
- * TIMER - gt64120 timer irq, temporary solution until
- * full gt64120 cascade interrupt support is in place
- */
-
-/*
- * Board-dependent functions, which must be defined in
- * arch/mips/gt64120/<board>/pci.c file.
- *
- * This function is called by pcibios_fixup_bus(bus), which in turn is
- * invoked a bus is scanned. You typically fixes IRQ numbers in this routine.
- */
-extern void __init gt64120_board_pcibios_fixup_bus(struct pci_bus *bus);
-
-#endif /* __ASM_GT64120_GT64120_H */
diff -puN include/asm-mips/gt64120.h~mips-megapatch include/asm-mips/gt64120.h
--- 25/include/asm-mips/gt64120.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/gt64120.h 2004-02-19 12:53:02.000000000 -0800
@@ -18,6 +18,10 @@
#ifndef _ASM_GT64120_H
#define _ASM_GT64120_H
+#include <linux/config.h>
+#include <asm/addrspace.h>
+#include <asm/byteorder.h>
+
#define MSK(n) ((1 << (n)) - 1)
/*
@@ -391,9 +395,36 @@
/*
* Misc
*/
-#define GT_DEF_BASE 0x14000000
-#define GT_DEF_PCI0_MEM0_BASE 0x12000000
+#define GT_DEF_PCI0_IO_BASE 0x10000000UL
+#define GT_DEF_PCI0_IO_SIZE 0x02000000UL
+#define GT_DEF_PCI0_MEM0_BASE 0x12000000UL
+#define GT_DEF_PCI0_MEM0_SIZE 0x02000000UL
+#define GT_DEF_BASE 0x14000000UL
+
#define GT_MAX_BANKSIZE (256 * 1024 * 1024) /* Max 256MB bank */
#define GT_LATTIM_MIN 6 /* Minimum lat */
+/*
+ * The gt64120_dep.h file must define the following macros
+ *
+ * GT_READ(ofs, data_pointer)
+ * GT_WRITE(ofs, data) - read/write GT64120 registers in 32bit
+ *
+ * TIMER - gt64120 timer irq, temporary solution until
+ * full gt64120 cascade interrupt support is in place
+ */
+
+#include <mach-gt64120.h>
+
+/*
+ * Because of an error/peculiarity in the Galileo chip, we need to swap the
+ * bytes when running bigendian. We also provide non-swapping versions.
+ */
+#define __GT_READ(ofs) \
+ (*(volatile u32 *)(GT64120_BASE+(ofs)))
+#define __GT_WRITE(ofs, data) \
+ do { *(volatile u32 *)(GT64120_BASE+(ofs)) = (data); } while (0)
+#define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs))
+#define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data))
+
#endif /* _ASM_GT64120_H */
diff -puN -L include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h~mips-megapatch /dev/null
--- 25/include/asm-mips/gt64120/momenco_ocelot/gt64120_dep.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,49 +0,0 @@
-/***********************************************************************
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * include/asm-mips/gt64120/momenco-ocelot/gt64120-dep.h
- * Board-dependent definitions for GT-64120 chip.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- ***********************************************************************
- */
-
-#ifndef _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H
-#define _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H
-
-#include <asm/addrspace.h> /* for KSEG1ADDR() */
-#include <asm/byteorder.h> /* for cpu_to_le32() */
-
-/*
- * PCI address allocation
- */
-#define GT_PCI_MEM_BASE (0x22000000)
-#define GT_PCI_MEM_SIZE GT_DEF_PCI0_MEM0_SIZE
-#define GT_PCI_IO_BASE (0x20000000)
-#define GT_PCI_IO_SIZE GT_DEF_PCI0_IO_SIZE
-
-extern unsigned long gt64120_base;
-
-#define GT64120_BASE (gt64120_base)
-
-/*
- * Because of an error/peculiarity in the Galileo chip, we need to swap the
- * bytes when running bigendian.
- */
-
-#define GT_WRITE(ofs, data) \
- *(volatile u32 *)(GT64120_BASE+ofs) = cpu_to_le32(data)
-#define GT_READ(ofs, data) \
- *data = le32_to_cpu(*(volatile u32 *)(GT64120_BASE+ofs))
-
-
-/*
- * gt timer irq
- */
-#define TIMER 6
-
-#endif /* _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H */
diff -puN include/asm-mips/hardirq.h~mips-megapatch include/asm-mips/hardirq.h
--- 25/include/asm-mips/hardirq.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/hardirq.h 2004-02-19 12:53:02.000000000 -0800
@@ -80,6 +80,7 @@ typedef struct {
#define irq_enter() (preempt_count() += HARDIRQ_OFFSET)
#ifdef CONFIG_PREEMPT
+# include <linux/smp_lock.h>
# define in_atomic() (preempt_count() != kernel_locked())
# define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
#else
diff -puN /dev/null include/asm-mips/hazards.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/hazards.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,49 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Ralf Baechle
+ */
+#ifndef _ASM_HAZARDS_H
+#define _ASM_HAZARDS_H
+
+#include <linux/config.h>
+
+#ifdef __ASSEMBLY__
+
+/*
+ * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
+ * use of the JTLB for instructions should not occur for 4 cpu cycles and use
+ * for data translations should not occur for 3 cpu cycles.
+ */
+#ifdef CONFIG_CPU_RM9000
+#define rm9000_tlb_hazard \
+ .set push; \
+ .set mips32; \
+ ssnop; ssnop; ssnop; ssnop; \
+ .set pop
+#else
+#define rm9000_tlb_hazard
+#endif
+
+#else
+
+/*
+ * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
+ * use of the JTLB for instructions should not occur for 4 cpu cycles and use
+ * for data translations should not occur for 3 cpu cycles.
+ */
+#ifdef CONFIG_CPU_RM9000
+#define rm9000_tlb_hazard() \
+ __asm__ __volatile__( \
+ ".set\tmips32\n\t" \
+ "ssnop; ssnop; ssnop; ssnop\n\t" \
+ ".set\tmips0")
+#else
+#define rm9000_tlb_hazard() do { } while (0)
+#endif
+
+#endif
+
+#endif /* _ASM_HAZARDS_H */
diff -puN include/asm-mips/highmem.h~mips-megapatch include/asm-mips/highmem.h
--- 25/include/asm-mips/highmem.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/highmem.h 2004-02-19 12:53:02.000000000 -0800
@@ -19,7 +19,6 @@
#ifdef __KERNEL__
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <asm/kmap_types.h>
diff -puN include/asm-mips/hw_irq.h~mips-megapatch include/asm-mips/hw_irq.h
--- 25/include/asm-mips/hw_irq.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/hw_irq.h 2004-02-19 12:53:02.000000000 -0800
@@ -19,8 +19,6 @@ extern int i8259A_irq_pending(unsigned i
extern void make_8259A_irq(unsigned int irq);
extern void init_8259A(int aeoi);
-#include <asm/atomic.h>
-
extern atomic_t irq_err_count;
/* This may not be apropriate for all machines, we'll see ... */
diff -puN include/asm-mips/i8259.h~mips-megapatch include/asm-mips/i8259.h
--- 25/include/asm-mips/i8259.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/i8259.h 2004-02-19 12:53:02.000000000 -0800
@@ -4,6 +4,7 @@
* i8259A interrupt definitions.
*
* Copyright (C) 2003 Maciej W. Rozycki
+ * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -13,11 +14,54 @@
#ifndef _ASM_I8259_H
#define _ASM_I8259_H
+#include <linux/compiler.h>
#include <linux/spinlock.h>
#include <asm/io.h>
-#include <asm/system.h>
+
+extern spinlock_t i8259A_lock;
extern void init_i8259_irqs(void);
+/*
+ * Do the traditional i8259 interrupt polling thing. This is for the few
+ * cases where no better interrupt acknowledge method is available and we
+ * absolutely must touch the i8259.
+ */
+static inline int i8259_irq(void)
+{
+ int irq;
+
+ spin_lock(&i8259A_lock);
+
+ /* Perform an interrupt acknowledge cycle on controller 1. */
+ outb(0x0C, 0x20); /* prepare for poll */
+ irq = inb(0x20) & 7;
+ if (irq == 2) {
+ /*
+ * Interrupt is cascaded so perform interrupt
+ * acknowledge on controller 2.
+ */
+ outb(0x0C, 0xA0); /* prepare for poll */
+ irq = (inb(0xA0) & 7) + 8;
+ }
+
+ if (unlikely(irq == 7)) {
+ /*
+ * This may be a spurious interrupt.
+ *
+ * Read the interrupt status register (ISR). If the most
+ * significant bit is not set then there is no valid
+ * interrupt.
+ */
+ outb(0x0B, 0x20); /* ISR register */
+ if(~inb(0x20) & 0x80)
+ irq = -1;
+ }
+
+ spin_unlock(&i8259A_lock);
+
+ return irq;
+}
+
#endif /* _ASM_I8259_H */
diff -puN include/asm-mips/ide.h~mips-megapatch include/asm-mips/ide.h
--- 25/include/asm-mips/ide.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/ide.h 2004-02-19 12:53:02.000000000 -0800
@@ -13,56 +13,7 @@
#ifdef __KERNEL__
-#include <linux/config.h>
-#include <asm/byteorder.h>
-#include <asm/io.h>
-
-#ifndef MAX_HWIFS
-# ifdef CONFIG_PCI
-#define MAX_HWIFS 10
-# else
-#define MAX_HWIFS 6
-# endif
-#endif
-
-struct ide_ops {
- int (*ide_default_irq)(ide_ioreg_t base);
- ide_ioreg_t (*ide_default_io_base)(int index);
- void (*ide_init_hwif_ports)(hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq);
-};
-
-extern struct ide_ops *ide_ops;
-
-static __inline__ int ide_default_irq(ide_ioreg_t base)
-{
- return ide_ops->ide_default_irq(base);
-}
-
-static __inline__ ide_ioreg_t ide_default_io_base(int index)
-{
- return ide_ops->ide_default_io_base(index);
-}
-
-static inline void ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port,
- ide_ioreg_t ctrl_port, int *irq)
-{
- ide_ops->ide_init_hwif_ports(hw, data_port, ctrl_port, irq);
-}
-
-static __inline__ void ide_init_default_hwifs(void)
-{
-#ifndef CONFIG_PCI
- hw_regs_t hw;
- int index;
-
- for(index = 0; index < MAX_HWIFS; index++) {
- ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL);
- hw.irq = ide_default_irq(ide_default_io_base(index));
- ide_register_hw(&hw, NULL);
- }
-#endif
-}
+#include <ide.h>
#define __ide_mm_insw ide_insw
#define __ide_mm_insl ide_insl
diff -puN include/asm-mips/ioctl.h~mips-megapatch include/asm-mips/ioctl.h
--- 25/include/asm-mips/ioctl.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/ioctl.h 2004-02-19 12:53:02.000000000 -0800
@@ -65,11 +65,22 @@
((nr) << _IOC_NRSHIFT) | \
((size) << _IOC_SIZESHIFT))
+/* provoke compile error for invalid uses of size argument */
+extern unsigned int __invalid_size_argument_for_IOC;
+#define _IOC_TYPECHECK(t) \
+ ((sizeof(t) == sizeof(t[1]) && \
+ sizeof(t) < (1 << _IOC_SIZEBITS)) ? \
+ sizeof(t) : __invalid_size_argument_for_IOC)
+
/* used to create numbers */
#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
-#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
-#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
-#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
+#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size)))
+#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
+#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
+#define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
+#define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
+#define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
+
/* used to decode them.. */
#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
diff -puN include/asm-mips/io.h~mips-megapatch include/asm-mips/io.h
--- 25/include/asm-mips/io.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/io.h 2004-02-19 12:53:02.000000000 -0800
@@ -14,19 +14,13 @@
#include <linux/types.h>
#include <asm/addrspace.h>
+#include <asm/cpu.h>
+#include <asm/cpu-features.h>
#include <asm/page.h>
#include <asm/pgtable-bits.h>
+#include <asm/processor.h>
#include <asm/byteorder.h>
-
-#ifdef CONFIG_SGI_IP27
-extern unsigned long bus_to_baddr[256];
-
-#define bus_to_baddr(bus, addr) (bus_to_baddr[(bus)->number] + (addr))
-#define baddr_to_bus(bus, addr) ((addr) - bus_to_baddr[(bus)->number])
-#else
-#define bus_to_baddr(bus, addr) (addr)
-#define baddr_to_bus(bus, addr) (addr)
-#endif
+#include <mangle-port.h>
/*
* Slowdown I/O port space accesses for antique hardware.
@@ -177,6 +171,24 @@ extern unsigned long isa_slot_offset;
extern void * __ioremap(phys_t offset, phys_t size, unsigned long flags);
extern void __iounmap(void *addr);
+static inline void * __ioremap_mode(unsigned long offset, unsigned long size,
+ unsigned long flags)
+{
+ if (cpu_has_64bit_addresses) {
+ u64 base = UNCAC_BASE;
+
+ /*
+ * R10000 supports a 2 bit uncached attribute therefore
+ * UNCAC_BASE may not equal IO_BASE.
+ */
+ if (flags == _CACHE_UNCACHED)
+ base = (u64) IO_BASE;
+ return (void *) (unsigned long) (base + offset);
+ }
+
+ return __ioremap(offset, size, flags);
+}
+
/*
* ioremap - map bus memory into CPU space
* @offset: bus address of the memory
@@ -189,7 +201,7 @@ extern void __iounmap(void *addr);
* address.
*/
#define ioremap(offset, size) \
- __ioremap((offset), (size), _CACHE_UNCACHED)
+ __ioremap_mode((offset), (size), _CACHE_UNCACHED)
/*
* ioremap_nocache - map bus memory into CPU space
@@ -211,19 +223,27 @@ extern void __iounmap(void *addr);
* write combining or read caching is not desirable:
*/
#define ioremap_nocache(offset, size) \
- __ioremap((offset), (size), _CACHE_UNCACHED)
+ __ioremap_mode((offset), (size), _CACHE_UNCACHED)
+
+/*
+ * These two are MIPS specific ioremap variant. ioremap_cacheable_cow
+ * requests a cachable mapping, ioremap_uncached_accelerated requests a
+ * mapping using the uncached accelerated mode which isn't supported on
+ * all processors.
+ */
#define ioremap_cacheable_cow(offset, size) \
- __ioremap((offset), (size), _CACHE_CACHABLE_COW)
+ __ioremap_mode((offset), (size), _CACHE_CACHABLE_COW)
#define ioremap_uncached_accelerated(offset, size) \
- __ioremap((offset), (size), _CACHE_UNCACHED_ACCELERATED)
+ __ioremap_mode((offset), (size), _CACHE_UNCACHED_ACCELERATED)
-extern void iounmap(void *addr);
+static inline void iounmap(void *addr)
+{
+ if (cpu_has_64bits)
+ return;
+
+ __iounmap(addr);
+}
-/*
- * XXX We need system specific versions of these to handle EISA address bits
- * 24-31 on SNI.
- * XXX more SNI hacks.
- */
#define __raw_readb(addr) (*(volatile unsigned char *)(addr))
#define __raw_readw(addr) (*(volatile unsigned short *)(addr))
#define __raw_readl(addr) (*(volatile unsigned int *)(addr))
@@ -240,14 +260,8 @@ extern void iounmap(void *addr);
" .set mips0 \n" \
: "=r" (__res) \
: "r" (addr)); \
- \
__res; \
})
-#endif
-#ifdef CONFIG_MIPS64
-#define ____raw_readq(addr) (*(volatile unsigned long *)(addr))
-#endif
-
#define __raw_readq(addr) \
({ \
unsigned long __flags; \
@@ -256,9 +270,13 @@ extern void iounmap(void *addr);
local_irq_save(__flags); \
__res = ____raw_readq(addr); \
local_irq_restore(__flags); \
- \
__res; \
})
+#endif
+#ifdef CONFIG_MIPS64
+#define ____raw_readq(addr) (*(volatile unsigned long *)(addr))
+#define __raw_readq(addr) ____raw_readq(addr)
+#endif
#define readb(addr) __ioswab8(__raw_readb(addr))
#define readw(addr) __ioswab16(__raw_readw(addr))
@@ -273,7 +291,7 @@ extern void iounmap(void *addr);
#define __raw_writew(w,addr) ((*(volatile unsigned short *)(addr)) = (w))
#define __raw_writel(l,addr) ((*(volatile unsigned int *)(addr)) = (l))
#ifdef CONFIG_MIPS32
-#define ____raw_writeq(val,addr) \
+#define ____raw_writeq(val,addr) \
({ \
u64 __tmp; \
\
@@ -288,11 +306,6 @@ extern void iounmap(void *addr);
: "=r" (__tmp) \
: "0" ((unsigned long long)val), "r" (addr)); \
})
-#endif
-#ifdef CONFIG_MIPS64
-#define ____raw_writeq(l,addr) ((*(volatile unsigned long *)(addr)) = (l))
-#endif
-
#define __raw_writeq(val,addr) \
({ \
unsigned long __flags; \
@@ -301,6 +314,11 @@ extern void iounmap(void *addr);
____raw_writeq(val, addr); \
local_irq_restore(__flags); \
})
+#endif
+#ifdef CONFIG_MIPS64
+#define ____raw_writeq(q,addr) ((*(volatile unsigned long *)(addr)) = (q))
+#define __raw_writeq(q,addr) ____raw_writeq(q, addr)
+#endif
#define writeb(b,addr) __raw_writeb(__ioswab8(b),(addr))
#define writew(w,addr) __raw_writew(__ioswab16(w),(addr))
@@ -380,51 +398,76 @@ out:
*/
#define isa_check_signature(io, s, l) check_signature(i,s,l)
-#define outb(val,port) \
-do { \
- *(volatile u8 *)(mips_io_port_base + (port)) = __ioswab8(val); \
-} while(0)
-
-#define outw(val,port) \
-do { \
- *(volatile u16 *)(mips_io_port_base + (port)) = __ioswab16(val);\
-} while(0)
-
-#define outl(val,port) \
-do { \
- *(volatile u32 *)(mips_io_port_base + (port)) = __ioswab32(val);\
-} while(0)
-
-#define outb_p(val,port) \
-do { \
- *(volatile u8 *)(mips_io_port_base + (port)) = __ioswab8(val); \
- SLOW_DOWN_IO; \
-} while(0)
-
-#define outw_p(val,port) \
-do { \
- *(volatile u16 *)(mips_io_port_base + (port)) = __ioswab16(val);\
- SLOW_DOWN_IO; \
-} while(0)
-
-#define outl_p(val,port) \
-do { \
- *(volatile u32 *)(mips_io_port_base + (port)) = __ioswab32(val);\
- SLOW_DOWN_IO; \
-} while(0)
+static inline void __outb(unsigned char val, unsigned long port)
+{
+ port = __swizzle_addr_b(port);
+
+ *(volatile u8 *)(mips_io_port_base + port) = __ioswab8(val);
+}
+
+static inline void __outw(unsigned short val, unsigned long port)
+{
+ port = __swizzle_addr_w(port);
+
+ *(volatile u16 *)(mips_io_port_base + port) = __ioswab16(val);
+}
+
+static inline void __outl(unsigned int val, unsigned long port)
+{
+ port = __swizzle_addr_l(port);
+
+ *(volatile u32 *)(mips_io_port_base + port) = __ioswab32(val);
+}
+
+static inline void __outb_p(unsigned char val, unsigned long port)
+{
+ port = __swizzle_addr_b(port);
+
+ *(volatile u8 *)(mips_io_port_base + port) = __ioswab8(val);
+ SLOW_DOWN_IO;
+}
+
+static inline void __outw_p(unsigned short val, unsigned long port)
+{
+ port = __swizzle_addr_w(port);
+
+ *(volatile u16 *)(mips_io_port_base + port) = __ioswab16(val);
+ SLOW_DOWN_IO;
+}
+
+static inline void __outl_p(unsigned int val, unsigned long port)
+{
+ port = __swizzle_addr_l(port);
+
+ *(volatile u32 *)(mips_io_port_base + port) = __ioswab32(val);
+ SLOW_DOWN_IO;
+}
+
+#define outb(val, port) __outb(val, port)
+#define outw(val, port) __outw(val, port)
+#define outl(val, port) __outl(val, port)
+#define outb_p(val, port) __outb_p(val, port)
+#define outw_p(val, port) __outw_p(val, port)
+#define outl_p(val, port) __outl_p(val, port)
static inline unsigned char __inb(unsigned long port)
{
+ port = __swizzle_addr_b(port);
+
return __ioswab8(*(volatile u8 *)(mips_io_port_base + port));
}
static inline unsigned short __inw(unsigned long port)
{
+ port = __swizzle_addr_w(port);
+
return __ioswab16(*(volatile u16 *)(mips_io_port_base + port));
}
static inline unsigned int __inl(unsigned long port)
{
+ port = __swizzle_addr_l(port);
+
return __ioswab32(*(volatile u32 *)(mips_io_port_base + port));
}
@@ -432,6 +475,8 @@ static inline unsigned char __inb_p(unsi
{
u8 __val;
+ port = __swizzle_addr_b(port);
+
__val = *(volatile u8 *)(mips_io_port_base + port);
SLOW_DOWN_IO;
@@ -442,6 +487,8 @@ static inline unsigned short __inw_p(uns
{
u16 __val;
+ port = __swizzle_addr_w(port);
+
__val = *(volatile u16 *)(mips_io_port_base + port);
SLOW_DOWN_IO;
@@ -452,8 +499,11 @@ static inline unsigned int __inl_p(unsig
{
u32 __val;
+ port = __swizzle_addr_l(port);
+
__val = *(volatile u32 *)(mips_io_port_base + port);
SLOW_DOWN_IO;
+
return __ioswab32(__val);
}
@@ -537,7 +587,7 @@ static inline void __insl(unsigned long
* be discarded. This operation is necessary before dma operations
* to the memory.
*/
-#ifdef CONFIG_NONCOHERENT_IO
+#ifdef CONFIG_DMA_NONCOHERENT
extern void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
extern void (*_dma_cache_wback)(unsigned long start, unsigned long size);
@@ -556,7 +606,7 @@ extern void (*_dma_cache_inv)(unsigned l
#define dma_cache_inv(start,size) \
do { (void) (start); (void) (size); } while (0)
-#endif /* CONFIG_NONCOHERENT_IO */
+#endif /* CONFIG_DMA_NONCOHERENT */
/*
* Read a 32-bit register that requires a 64-bit read cycle on the bus.
diff -puN include/asm-mips/ip32/crime.h~mips-megapatch include/asm-mips/ip32/crime.h
--- 25/include/asm-mips/ip32/crime.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/ip32/crime.h 2004-02-19 12:53:02.000000000 -0800
@@ -11,32 +11,30 @@
#ifndef __ASM_CRIME_H__
#define __ASM_CRIME_H__
-#include <asm/types.h>
#include <asm/addrspace.h>
+#include <asm/io.h>
/*
* Address map
*/
-#ifndef __ASSEMBLY__
-#define CRIME_BASE KSEG1ADDR(0x14000000)
-#else
-#define CRIME_BASE 0xffffffffb4000000
-#endif
-
-#ifndef __ASSEMBLY__
-static inline u64 crime_read_64 (unsigned long __offset) {
- return *((volatile u64 *) (CRIME_BASE + __offset));
+#define CRIME_BASE 0x14000000 /* physical */
+
+extern void *sgi_crime;
+
+static inline uint64_t crime_read(unsigned long offset)
+{
+ return readq(sgi_crime + offset);
}
-static inline void crime_write_64 (unsigned long __offset, u64 __val) {
- *((volatile u64 *) (CRIME_BASE + __offset)) = __val;
+static inline void crime_write(uint64_t val, unsigned long offset)
+{
+ writeq(val, sgi_crime + offset);
}
-#endif
#undef BIT
#define BIT(x) (1UL << (x))
/* All CRIME registers are 64 bits */
-#define CRIME_ID 0
+#define CRIME_ID 0x000
#define CRIME_ID_MASK 0xff
#define CRIME_ID_IDBITS 0xf0
@@ -48,8 +46,8 @@ static inline void crime_write_64 (unsig
#define CRIME_REV_13 0x13
#define CRIME_REV_14 0x14
-#define CRIME_CONTROL (0x00000008)
-#define CRIME_CONTROL_MASK 0x3fff /* 14-bit registers */
+#define CRIME_CONTROL 0x008
+#define CRIME_CONTROL_MASK 0x3fff
/* CRIME_CONTROL register bits */
#define CRIME_CONTROL_TRITON_SYSADC 0x2000
@@ -67,10 +65,10 @@ static inline void crime_write_64 (unsig
#define CRIME_CONTROL_WBUF_HWM 0x00f0
#define CRIME_CONTROL_WBUF_SHFT 8
-#define CRIME_INT_STAT (0x00000010)
-#define CRIME_INT_MASK (0x00000018)
-#define CRIME_SOFT_INT (0x00000020)
-#define CRIME_HARD_INT (0x00000028)
+#define CRIME_INT_STAT 0x010
+#define CRIME_INT_MASK 0x018
+#define CRIME_SOFT_INT 0x020
+#define CRIME_HARD_INT 0x028
/* Bits in CRIME_INT_XXX and CRIME_HARD_INT */
#define MACE_VID_IN1_INT BIT (0)
@@ -113,40 +111,32 @@ static inline void crime_write_64 (unsig
#define CRIME_MACEPCI_INT_MASK 0xff00
#define CRIME_CRIME_INT_MASK 0xffff0000
-/*
- * XXX Todo
- */
-#define CRIME_DOG (0x00000030)
-/* We are word-play compatible but not misspelling compatible */
-#define MC_GRUFF CRIME_DOG
-#define CRIME_DOG_MASK (0x001fffff)
+#define CRIME_DOG 0x030
+#define CRIME_DOG_MASK 0x001fffff
/* CRIME_DOG register bits */
-#define CRIME_DOG_POWER_ON_RESET (0x00010000)
-#define CRIME_DOG_WARM_RESET (0x00080000)
+#define CRIME_DOG_POWER_ON_RESET 0x00010000
+#define CRIME_DOG_WARM_RESET 0x00080000
#define CRIME_DOG_TIMEOUT (CRIME_DOG_POWER_ON_RESET|CRIME_DOG_WARM_RESET)
-#define CRIME_DOG_VALUE (0x00007fff) /* ??? */
+#define CRIME_DOG_VALUE 0x00007fff
-#define CRIME_TIME (0x00000038)
-#define CRIME_TIME_MASK (0x0000ffffffffffff)
+#define CRIME_TIMER 0x038
+#define CRIME_TIMER_MASK 0x0000ffffffffffff
-#ifdef MASTER_FREQ
-#undef MASTER_FREQ
-#endif
#define CRIME_MASTER_FREQ 66666500 /* Crime upcounter frequency */
-#define CRIME_NS_PER_TICK 15 /* for delay_calibrate */
+#define CRIME_NS_PER_TICK 15 /* for delay_calibrate */
-#define CRIME_CPU_ERROR_ADDR (0x00000040)
-#define CRIME_CPU_ERROR_ADDR_MASK (0x3ffffffff)
+#define CRIME_CPU_ERROR_ADDR 0x040
+#define CRIME_CPU_ERROR_ADDR_MASK 0x3ffffffff
-#define CRIME_CPU_ERROR_STAT (0x00000048)
+#define CRIME_CPU_ERROR_STAT 0x048
/* REV_PETTY only! */
-#define CRIME_CPU_ERROR_ENA (0x00000050)
+#define CRIME_CPU_ERROR_ENA 0x050
/*
* bit definitions for CRIME/VICE error status and enable registers
*/
-#define CRIME_CPU_ERROR_MASK 0x7UL /* cpu error stat is 3 bits */
+#define CRIME_CPU_ERROR_MASK 0x7 /* cpu error stat is 3 bits */
#define CRIME_CPU_ERROR_CPU_ILL_ADDR 0x4
#define CRIME_CPU_ERROR_VICE_WRT_PRTY 0x2
#define CRIME_CPU_ERROR_CPU_WRT_PRTY 0x1
@@ -168,10 +158,10 @@ static inline void crime_write_64 (unsig
#define CRIME_CPU_ERROR_CPU_INV_ADDR_WR 0x2
#define CRIME_CPU_ERROR_CPU_INV_REG_ADDR 0x1
-#define CRIME_VICE_ERROR_ADDR (0x00000058)
-#define CRIME_VICE_ERROR_ADDR_MASK (0x3fffffff)
+#define CRIME_VICE_ERROR_ADDR 0x058
+#define CRIME_VICE_ERROR_ADDR_MASK 0x3fffffff
-#define CRIME_MEM_CONTROL (0x00000200)
+#define CRIME_MEM_CONTROL 0x200
#define CRIME_MEM_CONTROL_MASK 0x3 /* 25 cent register */
#define CRIME_MEM_CONTROL_ECC_ENA 0x1
#define CRIME_MEM_CONTROL_USE_ECC_REPL 0x2
@@ -179,20 +169,19 @@ static inline void crime_write_64 (unsig
/*
* macros for CRIME memory bank control registers.
*/
-#define CRIME_MEM_BANK_CONTROL(__bank) (0x00000208 + ((__bank) << 3))
+#define CRIME_MEM_BANK_CONTROL(__bank) (0x208 + ((__bank) << 3))
#define CRIME_MEM_BANK_CONTROL_MASK 0x11f /* 9 bits 7:5 reserved */
#define CRIME_MEM_BANK_CONTROL_ADDR 0x01f
#define CRIME_MEM_BANK_CONTROL_SDRAM_SIZE 0x100
+#define CRIME_MAXBANKS 8
-#define CRIME_MEM_REFRESH_COUNTER (0x00000248)
-#define CRIME_MEM_REFRESH_COUNTER_MASK 0x7ff /* 11-bit register */
-
-#define CRIME_MAXBANKS 8
+#define CRIME_MEM_REFRESH_COUNTER 0x248
+#define CRIME_MEM_REFRESH_COUNTER_MASK 0x7ff
/*
* CRIME Memory error status register bit definitions
*/
-#define CRIME_MEM_ERROR_STAT (0x00000250)
+#define CRIME_MEM_ERROR_STAT 0x250
#define CRIME_MEM_ERROR_STAT_MASK 0x0ff7ffff /* 28-bit register */
#define CRIME_MEM_ERROR_MACE_ID 0x0000007f
#define CRIME_MEM_ERROR_MACE_ACCESS 0x00000080
@@ -213,16 +202,16 @@ static inline void crime_write_64 (unsig
#define CRIME_MEM_ERROR_INV_MEM_ADDR_WR 0x04000000
#define CRIME_MEM_ERROR_INV_MEM_ADDR_RMW 0x08000000
-#define CRIME_MEM_ERROR_ADDR (0x00000258)
+#define CRIME_MEM_ERROR_ADDR 0x258
#define CRIME_MEM_ERROR_ADDR_MASK 0x3fffffff
-#define CRIME_MEM_ERROR_ECC_SYN (0x00000260)
+#define CRIME_MEM_ERROR_ECC_SYN 0x260
#define CRIME_MEM_ERROR_ECC_SYN_MASK 0xffffffff
-#define CRIME_MEM_ERROR_ECC_CHK (0x00000268)
+#define CRIME_MEM_ERROR_ECC_CHK 0x268
#define CRIME_MEM_ERROR_ECC_CHK_MASK 0xffffffff
-#define CRIME_MEM_ERROR_ECC_REPL (0x00000270)
+#define CRIME_MEM_ERROR_ECC_REPL 0x270
#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff
#endif /* __ASM_CRIME_H__ */
diff -puN include/asm-mips/ip32/mace.h~mips-megapatch include/asm-mips/ip32/mace.h
--- 25/include/asm-mips/ip32/mace.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/ip32/mace.h 2004-02-19 12:53:02.000000000 -0800
@@ -1,90 +1,63 @@
/*
- * Definitions for the SGI O2 Mace chip.
+ * Definitions for the SGI MACE (Multimedia, Audio and Communications Engine)
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000 Harald Koerfgen
+ * Copyright (C) 2004 Ladislav Michl
*/
#ifndef __ASM_MACE_H__
#define __ASM_MACE_H__
-#include <asm/addrspace.h>
-#include <asm/system.h>
+#include <linux/config.h>
+#include <asm/io.h>
+
/*
* Address map
*/
-#define MACE_BASE KSEG1ADDR(0x1f000000)
-#define MACE_PCI (0x00080000)
-#define MACE_VIN1 (0x00100000)
-#define MACE_VIN2 (0x00180000)
-#define MACE_VOUT (0x00200000)
-#define MACE_ENET (0x00280000)
-#define MACE_PERIF (0x00300000)
-#define MACE_ISA_EXT (0x00380000)
-
-#define MACE_AUDIO_BASE (MACE_PERIF )
-#define MACE_ISA_BASE (MACE_PERIF + 0x00010000)
-#define MACE_KBDMS_BASE (MACE_PERIF + 0x00020000)
-#define MACE_I2C_BASE (MACE_PERIF + 0x00030000)
-#define MACE_UST_BASE (MACE_PERIF + 0x00040000)
-
+#define MACE_BASE 0x1f000000 /* physical */
#undef BIT
-#define BIT(__bit_offset) (1UL << (__bit_offset))
-
-/*
- * Mace MACEPCI interface, 32 bit regs
- */
-#define MACEPCI_ERROR_ADDR (MACE_PCI )
-#define MACEPCI_ERROR_FLAGS (MACE_PCI + 0x00000004)
-#define MACEPCI_CONTROL (MACE_PCI + 0x00000008)
-#define MACEPCI_REV (MACE_PCI + 0x0000000c)
-#define MACEPCI_WFLUSH (MACE_PCI + 0x0000000c) /* ??? --IV !!! It's for flushing read buffers on PCI MEMORY accesses!!! */
-#define MACEPCI_CONFIG_ADDR (MACE_PCI + 0x00000cf8)
-#define MACEPCI_CONFIG_DATA (MACE_PCI + 0x00000cfc)
-#define MACEPCI_LOW_MEMORY 0x1a000000
-#define MACEPCI_LOW_IO 0x18000000
-#define MACEPCI_SWAPPED_VIEW 0
-#define MACEPCI_NATIVE_VIEW 0x40000000
-#define MACEPCI_IO 0x80000000
-/*#define MACEPCI_HI_MEMORY 0x0000000280000000UL * This mipght be just 0x0000000200000000UL 2G more :) (or maybe it is different between 1.1 & 1.5 */
-#define MACEPCI_HI_MEMORY 0x0000000200000000UL /* This mipght be just 0x0000000200000000UL 2G more :) (or maybe it is different between 1.1 & 1.5 */
-#define MACEPCI_HI_IO 0x0000000100000000UL
-
-/*
- * Bits in the MACEPCI_CONTROL register
- */
-#define MACEPCI_CONTROL_INT(x) BIT(x)
-#define MACEPCI_CONTROL_INT_MASK 0xff
-#define MACEPCI_CONTROL_SERR_ENA BIT(8)
-#define MACEPCI_CONTROL_ARB_N6 BIT(9)
-#define MACEPCI_CONTROL_PARITY_ERR BIT(10)
-#define MACEPCI_CONTROL_MRMRA_ENA BIT(11)
-#define MACEPCI_CONTROL_ARB_N3 BIT(12)
-#define MACEPCI_CONTROL_ARB_N4 BIT(13)
-#define MACEPCI_CONTROL_ARB_N5 BIT(14)
-#define MACEPCI_CONTROL_PARK_LIU BIT(15)
-#define MACEPCI_CONTROL_INV_INT(x) BIT(16+x)
-#define MACEPCI_CONTROL_INV_INT_MASK 0x00ff0000
-#define MACEPCI_CONTROL_OVERRUN_INT BIT(24)
-#define MACEPCI_CONTROL_PARITY_INT BIT(25)
-#define MACEPCI_CONTROL_SERR_INT BIT(26)
-#define MACEPCI_CONTROL_IT_INT BIT(27)
-#define MACEPCI_CONTROL_RE_INT BIT(28)
-#define MACEPCI_CONTROL_DPED_INT BIT(29)
-#define MACEPCI_CONTROL_TAR_INT BIT(30)
-#define MACEPCI_CONTROL_MAR_INT BIT(31)
+#define BIT(x) (1ULL << (x))
-/*
- * Bits in the MACE_PCI error register
- */
+#ifdef CONFIG_MIPS32
+typedef struct {
+ volatile unsigned long long reg;
+} mace64_t;
+
+typedef struct {
+ unsigned long pad;
+ volatile unsigned long reg;
+} mace32_t;
+#endif
+#ifdef CONFIG_MIPS64
+typedef struct {
+ volatile unsigned long reg;
+} mace64_t;
+
+typedef struct {
+ volatile unsigned long reg;
+} mace32_t;
+#endif
+
+#define mace_read(r) \
+ (sizeof(r.reg) == 4 ? readl(&r.reg) : readq(&r.reg))
+#define mace_write(v,r) \
+ (sizeof(r.reg) == 4 ? writel(v,&r.reg) : writeq(v,&r.reg))
+
+/*
+ * PCI interface
+ */
+struct mace_pci {
+ volatile unsigned int error_addr;
+ volatile unsigned int error;
#define MACEPCI_ERROR_MASTER_ABORT BIT(31)
#define MACEPCI_ERROR_TARGET_ABORT BIT(30)
#define MACEPCI_ERROR_DATA_PARITY_ERR BIT(29)
-#define MACEPCI_ERROR_RETRY_ERR BIT(28)
+#define MACEPCI_ERROR_RETRY_ERR BIT(28)
#define MACEPCI_ERROR_ILLEGAL_CMD BIT(27)
#define MACEPCI_ERROR_SYSTEM_ERR BIT(26)
#define MACEPCI_ERROR_INTERRUPT_TEST BIT(25)
@@ -104,210 +77,299 @@
#define MACEPCI_ERROR_DEVSEL_SLOW 0x80
#define MACEPCI_ERROR_FBB BIT(1)
#define MACEPCI_ERROR_66MHZ BIT(0)
+ volatile unsigned int control;
+#define MACEPCI_CONTROL_INT(x) BIT(x)
+#define MACEPCI_CONTROL_INT_MASK 0xff
+#define MACEPCI_CONTROL_SERR_ENA BIT(8)
+#define MACEPCI_CONTROL_ARB_N6 BIT(9)
+#define MACEPCI_CONTROL_PARITY_ERR BIT(10)
+#define MACEPCI_CONTROL_MRMRA_ENA BIT(11)
+#define MACEPCI_CONTROL_ARB_N3 BIT(12)
+#define MACEPCI_CONTROL_ARB_N4 BIT(13)
+#define MACEPCI_CONTROL_ARB_N5 BIT(14)
+#define MACEPCI_CONTROL_PARK_LIU BIT(15)
+#define MACEPCI_CONTROL_INV_INT(x) BIT(16+x)
+#define MACEPCI_CONTROL_INV_INT_MASK 0x00ff0000
+#define MACEPCI_CONTROL_OVERRUN_INT BIT(24)
+#define MACEPCI_CONTROL_PARITY_INT BIT(25)
+#define MACEPCI_CONTROL_SERR_INT BIT(26)
+#define MACEPCI_CONTROL_IT_INT BIT(27)
+#define MACEPCI_CONTROL_RE_INT BIT(28)
+#define MACEPCI_CONTROL_DPED_INT BIT(29)
+#define MACEPCI_CONTROL_TAR_INT BIT(30)
+#define MACEPCI_CONTROL_MAR_INT BIT(31)
+ volatile unsigned int rev;
+ unsigned int _pad[0xcf8/4 - 4];
+ volatile unsigned int config_addr;
+ union {
+ volatile unsigned char b[4];
+ volatile unsigned short w[2];
+ volatile unsigned int l;
+ } config_data;
+};
+#define MACEPCI_LOW_MEMORY 0x1a000000
+#define MACEPCI_LOW_IO 0x18000000
+#define MACEPCI_SWAPPED_VIEW 0
+#define MACEPCI_NATIVE_VIEW 0x40000000
+#define MACEPCI_IO 0x80000000
+#define MACEPCI_HI_MEMORY 0x280000000
+#define MACEPCI_HI_IO 0x100000000
/*
- * Mace timer registers - 64 bit regs (63:32 are UST, 31:0 are MSC)
+ * Video interface
*/
-#define MSC_PART(__reg) ((__reg) & 0x00000000ffffffff)
-#define UST_PART(__reg) (((__reg) & 0xffffffff00000000) >> 32)
+struct mace_video {
+ mace32_t xxx; /* later... */
+};
+
+/*
+ * Ethernet interface
+ */
+struct mace_ethernet {
+ mace32_t mac_ctrl;
+ mace32_t int_stat;
+ mace32_t dma_ctrl;
+ mace32_t timer;
+ mace32_t tx_int_al;
+ mace32_t rx_int_al;
+ mace32_t tx_info;
+ mace32_t tx_info_al;
+ mace32_t rx_buff;
+ mace32_t rx_buff_al1;
+ mace32_t rx_buff_al2;
+ mace64_t diag;
+ mace32_t phy_data;
+ mace32_t phy_regs;
+ mace32_t phy_trans_go;
+ mace32_t backoff_seed;
+ /*===================================*/
+ mace64_t imq_reserved[4];
+ mace64_t mac_addr;
+ mace64_t mac_addr2;
+ mace64_t mcast_filter;
+ mace32_t tx_ring_base;
+ /* Following are read-only registers for debugging */
+ mace64_t tx_pkt1_hdr;
+ mace64_t tx_pkt1_ptr[3];
+ mace64_t tx_pkt2_hdr;
+ mace64_t tx_pkt2_ptr[3];
+ /*===================================*/
+ mace32_t rx_fifo;
+};
+#define mace_eth_read(r) \
+ mace_read(mace->eth.r)
+#define mace_eth_write(v,r) \
+ mace_write(v,mace->eth.r)
+
+
+/*
+ * Peripherals
+ */
+
+/* Audio registers */
+struct mace_audio {
+ mace32_t control;
+ mace32_t codec_control; /* codec status control */
+ mace32_t codec_mask; /* codec status input mask */
+ mace32_t codec_read; /* codec status read data */
+ struct {
+ mace32_t control; /* channel control */
+ mace32_t read_ptr; /* channel read pointer */
+ mace32_t write_ptr; /* channel write pointer */
+ mace32_t depth; /* channel depth */
+ } channel[3];
+};
+#define mace_perif_audio_read(r) \
+ mace_read(mace->perif.audio.r)
+#define mace_perif_audio_write(v,r) \
+ mace_write(v,mace->perif.audio.r)
+
+/* ISA Control and DMA registers */
+struct mace_isactrl {
+ mace32_t ringbase;
+#define MACEISA_RINGBUFFERS_SIZE (8 * 4096)
+
+ mace32_t misc;
+#define MACEISA_FLASH_WE BIT(0) /* 1=> Enable FLASH writes */
+#define MACEISA_PWD_CLEAR BIT(1) /* 1=> PWD CLEAR jumper detected */
+#define MACEISA_NIC_DEASSERT BIT(2)
+#define MACEISA_NIC_DATA BIT(3)
+#define MACEISA_LED_RED BIT(4) /* 0=> Illuminate red LED */
+#define MACEISA_LED_GREEN BIT(5) /* 0=> Illuminate green LED */
+#define MACEISA_DP_RAM_ENABLE BIT(6)
+
+ mace32_t istat;
+ mace32_t imask;
+#define MACEISA_AUDIO_SW_INT BIT(0)
+#define MACEISA_AUDIO_SC_INT BIT(1)
+#define MACEISA_AUDIO1_DMAT_INT BIT(2)
+#define MACEISA_AUDIO1_OF_INT BIT(3)
+#define MACEISA_AUDIO2_DMAT_INT BIT(4)
+#define MACEISA_AUDIO2_MERR_INT BIT(5)
+#define MACEISA_AUDIO3_DMAT_INT BIT(6)
+#define MACEISA_AUDIO3_MERR_INT BIT(7)
+#define MACEISA_RTC_INT BIT(8)
+#define MACEISA_KEYB_INT BIT(9)
+#define MACEISA_KEYB_POLL_INT BIT(10)
+#define MACEISA_MOUSE_INT BIT(11)
+#define MACEISA_MOUSE_POLL_INT BIT(12)
+#define MACEISA_TIMER0_INT BIT(13)
+#define MACEISA_TIMER1_INT BIT(14)
+#define MACEISA_TIMER2_INT BIT(15)
+#define MACEISA_PARALLEL_INT BIT(16)
+#define MACEISA_PAR_CTXA_INT BIT(17)
+#define MACEISA_PAR_CTXB_INT BIT(18)
+#define MACEISA_PAR_MERR_INT BIT(19)
+#define MACEISA_SERIAL1_INT BIT(20)
+#define MACEISA_SERIAL1_TDMAT_INT BIT(21)
+#define MACEISA_SERIAL1_TDMAPR_INT BIT(22)
+#define MACEISA_SERIAL1_TDMAME_INT BIT(23)
+#define MACEISA_SERIAL1_RDMAT_INT BIT(24)
+#define MACEISA_SERIAL1_RDMAOR_INT BIT(25)
+#define MACEISA_SERIAL2_INT BIT(26)
+#define MACEISA_SERIAL2_TDMAT_INT BIT(27)
+#define MACEISA_SERIAL2_TDMAPR_INT BIT(28)
+#define MACEISA_SERIAL2_TDMAME_INT BIT(29)
+#define MACEISA_SERIAL2_RDMAT_INT BIT(30)
+#define MACEISA_SERIAL2_RDMAOR_INT BIT(31)
+
+ mace64_t _pad[0x2000/8 - 4];
+
+ mace64_t dp_ram[0x400];
+};
+#define mace_perif_ctrl_read(r) \
+ mace_read(mace->perif.ctrl.r)
+#define mace_perif_ctrl_write(v,r) \
+ mace_write(v,mace->perif.ctrl.r)
+
+/* Keyboard & Mouse registers
+ * -> drivers/input/serio/maceps2.c */
+struct mace_ps2port {
+ mace32_t tx;
+ mace32_t rx;
+ mace32_t control;
+ mace32_t status;
+};
+
+struct mace_ps2 {
+ struct mace_ps2port keyb;
+ struct mace_ps2port mouse;
+};
+
+/* I2C registers
+ * -> drivers/i2c/algos/i2c-algo-sgi.c */
+struct mace_i2c {
+ mace32_t config;
+#define MACEI2C_RESET BIT(0)
+#define MACEI2C_FAST BIT(1)
+#define MACEI2C_DATA_OVERRIDE BIT(2)
+#define MACEI2C_CLOCK_OVERRIDE BIT(3)
+#define MACEI2C_DATA_STATUS BIT(4)
+#define MACEI2C_CLOCK_STATUS BIT(5)
+ mace32_t control;
+ mace32_t data;
+};
-#define MACE_UST_UST (MACE_UST_BASE ) /* Universial system time */
-#define MACE_UST_COMPARE1 (MACE_UST_BASE + 0x00000008) /* Interrupt compare reg 1 */
-#define MACE_UST_COMPARE2 (MACE_UST_BASE + 0x00000010) /* Interrupt compare reg 2 */
-#define MACE_UST_COMPARE3 (MACE_UST_BASE + 0x00000018) /* Interrupt compare reg 3 */
-#define MACE_UST_PERIOD_NS 960 /* UST Period in ns */
-
-#define MACE_UST_AIN_MSC (MACE_UST_BASE + 0x00000020) /* Audio in MSC/UST pair */
-#define MACE_UST_AOUT1_MSC (MACE_UST_BASE + 0x00000028) /* Audio out 1 MSC/UST pair */
-#define MACE_UST_AOUT2_MSC (MACE_UST_BASE + 0x00000030) /* Audio out 2 MSC/UST pair */
-#define MACE_VIN1_MSC_UST (MACE_UST_BASE + 0x00000038) /* Video In 1 MSC/UST pair */
-#define MACE_VIN2_MSC_UST (MACE_UST_BASE + 0x00000040) /* Video In 2 MSC/UST pair */
-#define MACE_VOUT_MSC_UST (MACE_UST_BASE + 0x00000048) /* Video out MSC/UST pair */
+/* Timer registers */
+typedef union {
+ mace64_t ust_msc;
+ struct reg {
+ volatile unsigned int ust;
+ volatile unsigned int msc;
+ } reg;
+} timer_reg;
-/*
- * Mace "ISA" peripherals
- */
-#define MACEISA_EPP_BASE (MACE_ISA_EXT )
-#define MACEISA_ECP_BASE (MACE_ISA_EXT + 0x00008000)
-#define MACEISA_SER1_BASE (MACE_ISA_EXT + 0x00010000)
-#define MACEISA_SER1_REGS (MACE_ISA_BASE + 0x00020000)
-#define MACEISA_SER2_BASE (MACE_ISA_EXT + 0x00018000)
-#define MACEISA_SER2_REGS (MACE_ISA_BASE + 0x00030000)
-#define MACEISA_RTC_BASE (MACE_ISA_EXT + 0x00020000)
-#define MACEISA_GAME_BASE (MACE_ISA_EXT + 0x00030000)
+struct mace_timers {
+ mace32_t ust;
+#define MACE_UST_PERIOD_NS 960
-/*
- * Ringbase address and reset register - 64 bits
- */
-#define MACEISA_RINGBASE MACE_ISA_BASE
-/* Ring buffers occupy 8 4K buffers */
-#define MACEISA_RINGBUFFERS_SIZE 8*4*1024
+ mace32_t compare1;
+ mace32_t compare2;
+ mace32_t compare3;
-/*
- * Flash-ROM/LED/DP-RAM/NIC Controller Register - 64 bits (?)
- */
-#define MACEISA_FLASH_NIC_REG (MACE_ISA_BASE + 0x00000008)
+ timer_reg audio_in;
+ timer_reg audio_out1;
+ timer_reg audio_out2;
+ timer_reg video_in1;
+ timer_reg video_in2;
+ timer_reg video_out;
+};
-/*
- * Bit definitions for that
- */
-#define MACEISA_FLASH_WE BIT(0) /* 1=> Enable FLASH writes */
-#define MACEISA_PWD_CLEAR BIT(1) /* 1=> PWD CLEAR jumper detected */
-#define MACEISA_NIC_DEASSERT BIT(2)
-#define MACEISA_NIC_DATA BIT(3)
-#define MACEISA_LED_RED BIT(4) /* 0=> Illuminate RED LED */
-#define MACEISA_LED_GREEN BIT(5) /* 0=> Illuminate GREEN LED */
-#define MACEISA_DP_RAM_ENABLE BIT(6)
+struct mace_perif {
+ struct mace_audio audio;
+ char _pad0[0x10000 - sizeof(struct mace_audio)];
-/*
- * ISA interrupt and status registers - 32 bit
- */
-#define MACEISA_INT_STAT (MACE_ISA_BASE + 0x00000014)
-#define MACEISA_INT_MASK (MACE_ISA_BASE + 0x0000001c)
+ struct mace_isactrl ctrl;
+ char _pad1[0x10000 - sizeof(struct mace_isactrl)];
-/*
- * Bits in the status/mask registers
- */
-#define MACEISA_AUDIO_SW_INT BIT (0)
-#define MACEISA_AUDIO_SC_INT BIT (1)
-#define MACEISA_AUDIO1_DMAT_INT BIT (2)
-#define MACEISA_AUDIO1_OF_INT BIT (3)
-#define MACEISA_AUDIO2_DMAT_INT BIT (4)
-#define MACEISA_AUDIO2_MERR_INT BIT (5)
-#define MACEISA_AUDIO3_DMAT_INT BIT (6)
-#define MACEISA_AUDIO3_MERR_INT BIT (7)
-#define MACEISA_RTC_INT BIT (8)
-#define MACEISA_KEYB_INT BIT (9)
-#define MACEISA_KEYB_POLL_INT BIT (10)
-#define MACEISA_MOUSE_INT BIT (11)
-#define MACEISA_MOUSE_POLL_INT BIT (12)
-#define MACEISA_TIMER0_INT BIT (13)
-#define MACEISA_TIMER1_INT BIT (14)
-#define MACEISA_TIMER2_INT BIT (15)
-#define MACEISA_PARALLEL_INT BIT (16)
-#define MACEISA_PAR_CTXA_INT BIT (17)
-#define MACEISA_PAR_CTXB_INT BIT (18)
-#define MACEISA_PAR_MERR_INT BIT (19)
-#define MACEISA_SERIAL1_INT BIT (20)
-#define MACEISA_SERIAL1_TDMAT_INT BIT (21)
-#define MACEISA_SERIAL1_TDMAPR_INT BIT (22)
-#define MACEISA_SERIAL1_TDMAME_INT BIT (23)
-#define MACEISA_SERIAL1_RDMAT_INT BIT (24)
-#define MACEISA_SERIAL1_RDMAOR_INT BIT (25)
-#define MACEISA_SERIAL2_INT BIT (26)
-#define MACEISA_SERIAL2_TDMAT_INT BIT (27)
-#define MACEISA_SERIAL2_TDMAPR_INT BIT (28)
-#define MACEISA_SERIAL2_TDMAME_INT BIT (29)
-#define MACEISA_SERIAL2_RDMAT_INT BIT (30)
-#define MACEISA_SERIAL2_RDMAOR_INT BIT (31)
-
-#define MACEI2C_CONFIG MACE_I2C_BASE
-#define MACEI2C_CONTROL (MACE_I2C_BASE|0x10)
-#define MACEI2C_DATA (MACE_I2C_BASE|0x18)
+ struct mace_ps2 ps2;
+ char _pad2[0x10000 - sizeof(struct mace_ps2)];
-/* Bits for I2C_CONFIG */
-#define MACEI2C_RESET BIT(0)
-#define MACEI2C_FAST BIT(1)
-#define MACEI2C_DATA_OVERRIDE BIT(2)
-#define MACEI2C_CLOCK_OVERRIDE BIT(3)
-#define MACEI2C_DATA_STATUS BIT(4)
-#define MACEI2C_CLOCK_STATUS BIT(5)
+ struct mace_i2c i2c;
+ char _pad3[0x10000 - sizeof(struct mace_i2c)];
-/* Bits for I2C_CONTROL */
-#define MACEI2C_NOT_IDLE BIT(0) /* write: 0=force idle
- * read: 0=idle 1=not idle */
-#define MACEI2C_DIR BIT(1) /* 0=write 1=read */
-#define MACEI2C_MORE_BYTES BIT(2) /* 0=last byte 1=more bytes */
-#define MACEI2C_TRANS_BUSY BIT(4) /* 0=trans done 1=trans busy */
-#define MACEI2C_NACK BIT(5) /* 0=ack received 1=ack not */
-#define MACEI2C_BUS_ERROR BIT(7) /* 0=no bus err 1=bus err */
-
-
-#define MACEISA_AUDIO_INT (MACEISA_AUDIO_SW_INT | \
- MACEISA_AUDIO_SC_INT | \
- MACEISA_AUDIO1_DMAT_INT | \
- MACEISA_AUDIO1_OF_INT | \
- MACEISA_AUDIO2_DMAT_INT | \
- MACEISA_AUDIO2_MERR_INT | \
- MACEISA_AUDIO3_DMAT_INT | \
- MACEISA_AUDIO3_MERR_INT)
-#define MACEISA_MISC_INT (MACEISA_RTC_INT | \
- MACEISA_KEYB_INT | \
- MACEISA_KEYB_POLL_INT | \
- MACEISA_MOUSE_INT | \
- MACEISA_MOUSE_POLL_INT | \
- MACEISA_TIMER0_INT | \
- MACEISA_TIMER1_INT | \
- MACEISA_TIMER2_INT)
-#define MACEISA_SUPERIO_INT (MACEISA_PARALLEL_INT | \
- MACEISA_PAR_CTXA_INT | \
- MACEISA_PAR_CTXB_INT | \
- MACEISA_PAR_MERR_INT | \
- MACEISA_SERIAL1_INT | \
- MACEISA_SERIAL1_TDMAT_INT | \
- MACEISA_SERIAL1_TDMAPR_INT | \
- MACEISA_SERIAL1_TDMAME_INT | \
- MACEISA_SERIAL1_RDMAT_INT | \
- MACEISA_SERIAL1_RDMAOR_INT | \
- MACEISA_SERIAL2_INT | \
- MACEISA_SERIAL2_TDMAT_INT | \
- MACEISA_SERIAL2_TDMAPR_INT | \
- MACEISA_SERIAL2_TDMAME_INT | \
- MACEISA_SERIAL2_RDMAT_INT | \
- MACEISA_SERIAL2_RDMAOR_INT)
+ struct mace_timers timers;
+ char _pad4[0x10000 - sizeof(struct mace_timers)];
+};
-#ifndef __ASSEMBLY__
-#include <asm/types.h>
-/*
- * XXX Some of these are probably not needed (or even legal?)
+/*
+ * ISA peripherals
*/
-static inline u8 mace_read_8 (unsigned long __offset)
-{
- return *((volatile u8 *) (MACE_BASE + __offset));
-}
-
-static inline u16 mace_read_16 (unsigned long __offset)
-{
- return *((volatile u16 *) (MACE_BASE + __offset));
-}
-
-static inline u32 mace_read_32 (unsigned long __offset)
-{
- return *((volatile u32 *) (MACE_BASE + __offset));
-}
-
-static inline u64 mace_read_64 (unsigned long __offset)
-{
- return *((volatile u64 *) (MACE_BASE + __offset));
-}
-
-static inline void mace_write_8 (unsigned long __offset, u8 __val)
-{
- *((volatile u8 *) (MACE_BASE + __offset)) = __val;
-}
-
-static inline void mace_write_16 (unsigned long __offset, u16 __val)
-{
- *((volatile u16 *) (MACE_BASE + __offset)) = __val;
-}
-
-static inline void mace_write_32 (unsigned long __offset, u32 __val)
-{
- *((volatile u32 *) (MACE_BASE + __offset)) = __val;
-}
-
-static inline void mace_write_64 (unsigned long __offset, u64 __val)
-{
- *((volatile u64 *) (MACE_BASE + __offset)) = __val;
-}
-
-/* Call it whenever device needs to read data from main memory coherently */
-static inline void mace_inv_read_buffers(void)
-{
-/* mace_write_32(MACEPCI_WFLUSH,0xffffffff);*/
-}
-#endif /* !__ASSEMBLY__ */
+/* Parallel port */
+struct mace_parallel { /* later... */
+};
+
+struct mace_ecp1284 { /* later... */
+};
+
+/* Serial port */
+struct mace_serial {
+ mace64_t xxx; /* later... */
+};
+
+struct mace_isa {
+ struct mace_parallel parallel;
+ char _pad1[0x8000 - sizeof(struct mace_parallel)];
+
+ struct mace_ecp1284 ecp1284;
+ char _pad2[0x8000 - sizeof(struct mace_ecp1284)];
+
+ struct mace_serial serial1;
+ char _pad3[0x8000 - sizeof(struct mace_serial)];
+
+ struct mace_serial serial2;
+ char _pad4[0x8000 - sizeof(struct mace_serial)];
+
+ mace32_t rtc[0x10000/8];
+};
+
+struct sgi_mace {
+ char _reserved[0x80000];
+
+ struct mace_pci pci;
+ char _pad0[0x80000 - sizeof(struct mace_pci)];
+
+ struct mace_video video_in1;
+ char _pad1[0x80000 - sizeof(struct mace_video)];
+
+ struct mace_video video_in2;
+ char _pad2[0x80000 - sizeof(struct mace_video)];
+
+ struct mace_video video_out;
+ char _pad3[0x80000 - sizeof(struct mace_video)];
+
+ struct mace_ethernet eth;
+ char _pad4[0x80000 - sizeof(struct mace_ethernet)];
+
+ struct mace_perif perif;
+ char _pad5[0x80000 - sizeof(struct mace_perif)];
+
+ struct mace_isa isa;
+ char _pad6[0x80000 - sizeof(struct mace_isa)];
+};
+
+extern struct sgi_mace *mace;
#endif /* __ASM_MACE_H__ */
diff -puN include/asm-mips/irq_cpu.h~mips-megapatch include/asm-mips/irq_cpu.h
--- 25/include/asm-mips/irq_cpu.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/irq_cpu.h 2004-02-19 12:53:02.000000000 -0800
@@ -14,5 +14,6 @@
#define _ASM_IRQ_CPU_H
extern void mips_cpu_irq_init(int irq_base);
+extern void rm7k_cpu_irq_init(int irq_base);
#endif /* _ASM_IRQ_CPU_H */
diff -puN include/asm-mips/irq.h~mips-megapatch include/asm-mips/irq.h
--- 25/include/asm-mips/irq.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/irq.h 2004-02-19 12:53:02.000000000 -0800
@@ -4,46 +4,14 @@
* for more details.
*
* Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
- * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02 by Ralf Baechle
- * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
- * Copyright (C) 2001 Kanoj Sarcar
+ * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
*/
#ifndef _ASM_IRQ_H
#define _ASM_IRQ_H
#include <linux/config.h>
#include <linux/linkage.h>
-#include <asm/sn/arch.h>
-
-#ifdef CONFIG_SGI_IP27
-
-#define NR_IRQS 256
-
-/*
- * Number of levels in INT_PEND0. Can be set to 128 if we also
- * consider INT_PEND1.
- */
-#define PERNODE_LEVELS 64
-
-extern int node_level_to_irq[MAX_COMPACT_NODES][PERNODE_LEVELS];
-
-/*
- * we need to map irq's up to at least bit 7 of the INT_MASK0_A register
- * since bits 0-6 are pre-allocated for other purposes.
- */
-#define LEAST_LEVEL 7
-#define FAST_IRQ_TO_LEVEL(i) ((i) + LEAST_LEVEL)
-#define LEVEL_TO_IRQ(c, l) \
- (node_level_to_irq[CPUID_TO_COMPACT_NODEID(c)][(l)])
-
-#else
-
-/*
- * Largest number of ints of all machines except IP27
- */
-#define NR_IRQS 128
-
-#endif
+#include <irq.h>
#ifdef CONFIG_I8259
static inline int irq_canonicalize(int irq)
@@ -61,9 +29,6 @@ extern void enable_irq(unsigned int);
struct pt_regs;
extern asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs);
-/* Machine specific interrupt initialization */
-extern void (*irq_setup)(void);
-
extern void init_generic_irq(void);
#endif /* _ASM_IRQ_H */
diff -puN include/asm-mips/jazz.h~mips-megapatch include/asm-mips/jazz.h
--- 25/include/asm-mips/jazz.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/jazz.h 2004-02-19 12:53:02.000000000 -0800
@@ -203,7 +203,7 @@ typedef struct {
* we remap the Jazz interrupts to the usual ISA style interrupt numbers.
*/
#define JAZZ_PARALLEL_IRQ 16
-#define JAZZ_FLOPPY_IRQ 6 /* needs to be consistent with floppy driver! */
+#define JAZZ_FLOPPY_IRQ 17
#define JAZZ_SOUND_IRQ 18
#define JAZZ_VIDEO_IRQ 19
#define JAZZ_ETHERNET_IRQ 20
@@ -283,27 +283,27 @@ __asm__ __volatile__(
".set\treorder");
}
-static inline unsigned short r4030_read_reg16(unsigned addr)
+static inline unsigned short r4030_read_reg16(unsigned long addr)
{
unsigned short ret = *((volatile unsigned short *)addr);
r4030_delay();
return ret;
}
-static inline unsigned int r4030_read_reg32(unsigned addr)
+static inline unsigned int r4030_read_reg32(unsigned long addr)
{
unsigned int ret = *((volatile unsigned int *)addr);
r4030_delay();
return ret;
}
-static inline void r4030_write_reg16(unsigned addr, unsigned val)
+static inline void r4030_write_reg16(unsigned long addr, unsigned val)
{
*((volatile unsigned short *)addr) = val;
r4030_delay();
}
-static inline void r4030_write_reg32(unsigned addr, unsigned val)
+static inline void r4030_write_reg32(unsigned long addr, unsigned val)
{
*((volatile unsigned int *)addr) = val;
r4030_delay();
diff -puN -L include/asm-mips/jmr3927/ds1742rtc.h include/asm-mips/jmr3927/ds1742rtc.h~mips-megapatch /dev/null
--- 25/include/asm-mips/jmr3927/ds1742rtc.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,67 +0,0 @@
-/*
- * ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
- *
- * Based on include/asm-mips/ds1643rtc.h.
- *
- * Copyright (C) 1999-2001 Toshiba Corporation
- * It was written to be part of the Linux operating system.
- */
-/* permission is hereby granted to copy, modify and redistribute this code
- * in terms of the GNU Library General Public License, Version 2 or later,
- * at your option.
- */
-#ifndef _DS1742RTC_H
-#define _DS1742RTC_H
-
-#include <linux/rtc.h>
-#include <asm/mc146818rtc.h> /* bad name... */
-
-#define RTC_BRAM_SIZE 0x800
-#define RTC_OFFSET 0x7f8
-
-/**********************************************************************
- * register summary
- **********************************************************************/
-#define RTC_CONTROL (RTC_OFFSET + 0)
-#define RTC_CENTURY (RTC_OFFSET + 0)
-#define RTC_SECONDS (RTC_OFFSET + 1)
-#define RTC_MINUTES (RTC_OFFSET + 2)
-#define RTC_HOURS (RTC_OFFSET + 3)
-#define RTC_DAY (RTC_OFFSET + 4)
-#define RTC_DATE (RTC_OFFSET + 5)
-#define RTC_MONTH (RTC_OFFSET + 6)
-#define RTC_YEAR (RTC_OFFSET + 7)
-
-#define RTC_CENTURY_MASK 0x3f
-#define RTC_SECONDS_MASK 0x7f
-#define RTC_DAY_MASK 0x07
-
-/*
- * Bits in the Control/Century register
- */
-#define RTC_WRITE 0x80
-#define RTC_READ 0x40
-
-/*
- * Bits in the Seconds register
- */
-#define RTC_STOP 0x80
-
-/*
- * Bits in the Day register
- */
-#define RTC_BATT_FLAG 0x80
-#define RTC_FREQ_TEST 0x40
-
-/*
- * Conversion between binary and BCD.
- */
-#ifndef BCD_TO_BIN
-#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
-#endif
-
-#ifndef BIN_TO_BCD
-#define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10)
-#endif
-
-#endif /* _DS1742RTC_H */
diff -puN -L include/asm-mips/jmr3927/pci.h include/asm-mips/jmr3927/pci.h~mips-megapatch /dev/null
--- 25/include/asm-mips/jmr3927/pci.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,64 +0,0 @@
-/***********************************************************************
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- *
- * include/asm-mips/jmr3927/pci.h
- * Based on include/asm-mips/ddb5xxx/pci.h
- *
- * This file essentially defines the interface between board
- * specific PCI code and MIPS common PCI code. Should potentially put
- * into include/asm/pci.h file.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- ***********************************************************************
- */
-
-#ifndef __ASM_TX3927_PCI_H
-#define __ASM_TX3927__PCI_H
-
-#include <linux/ioport.h>
-#include <linux/pci.h>
-
-/*
- * Each pci channel is a top-level PCI bus seem by CPU. A machine with
- * multiple PCI channels may have multiple PCI host controllers or a
- * single controller supporting multiple channels.
- */
-struct pci_channel {
- struct pci_ops *pci_ops;
- struct resource *io_resource;
- struct resource *mem_resource;
-};
-
-/*
- * each board defines an array of pci_channels, that ends with all NULL entry
- */
-extern struct pci_channel mips_pci_channels[];
-
-/*
- * board supplied pci irq fixup routine
- */
-extern void pcibios_fixup_irqs(void);
-
-#endif /* __ASM_TX3927_PCI_H */
diff -puN -L include/asm-mips/keyboard.h include/asm-mips/keyboard.h~mips-megapatch /dev/null
--- 25/include/asm-mips/keyboard.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,96 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 - 1999 Ralf Baechle
- */
-#ifndef _ASM_KEYBOARD_H
-#define _ASM_KEYBOARD_H
-
-#ifdef __KERNEL__
-
-#include <linux/config.h>
-#include <linux/delay.h>
-#include <linux/ioport.h>
-#include <linux/kd.h>
-#include <linux/pm.h>
-
-#define DISABLE_KBD_DURING_INTERRUPTS 0
-
-#ifdef CONFIG_PC_KEYB
-
-extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
-extern int pckbd_getkeycode(unsigned int scancode);
-extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
- char raw_mode);
-extern char pckbd_unexpected_up(unsigned char keycode);
-extern void pckbd_leds(unsigned char leds);
-extern void pckbd_init_hw(void);
-extern int pckbd_pm_resume(struct pm_dev *, pm_request_t, void *);
-extern pm_callback pm_kbd_request_override;
-extern unsigned char pckbd_sysrq_xlate[128];
-extern void kbd_forward_char (int ch);
-
-#define kbd_setkeycode pckbd_setkeycode
-#define kbd_getkeycode pckbd_getkeycode
-#define kbd_translate pckbd_translate
-#define kbd_unexpected_up pckbd_unexpected_up
-#define kbd_leds pckbd_leds
-#define kbd_init_hw pckbd_init_hw
-#define kbd_sysrq_xlate pckbd_sysrq_xlate
-
-#define SYSRQ_KEY 0x54
-
-/* Some stoneage hardware needs delays after some operations. */
-#define kbd_pause() do { } while(0)
-
-struct kbd_ops {
- /* Keyboard driver resource allocation */
- void (*kbd_request_region)(void);
- int (*kbd_request_irq)(void (*handler)(int, void *, struct pt_regs *));
-
- /* PSaux driver resource management */
- int (*aux_request_irq)(void (*handler)(int, void *, struct pt_regs *));
- void (*aux_free_irq)(void);
-
- /* Methods to access the keyboard processor's I/O registers */
- unsigned char (*kbd_read_input)(void);
- void (*kbd_write_output)(unsigned char val);
- void (*kbd_write_command)(unsigned char val);
- unsigned char (*kbd_read_status)(void);
-};
-
-extern struct kbd_ops *kbd_ops;
-
-/* Do the actual calls via kbd_ops vector */
-#define kbd_request_region() kbd_ops->kbd_request_region()
-#define kbd_request_irq(handler) kbd_ops->kbd_request_irq(handler)
-
-#define aux_request_irq(hand, dev_id) kbd_ops->aux_request_irq(hand)
-#define aux_free_irq(dev_id) kbd_ops->aux_free_irq()
-
-#define kbd_read_input() kbd_ops->kbd_read_input()
-#define kbd_write_output(val) kbd_ops->kbd_write_output(val)
-#define kbd_write_command(val) kbd_ops->kbd_write_command(val)
-#define kbd_read_status() kbd_ops->kbd_read_status()
-
-#else
-
-extern int kbd_setkeycode(unsigned int scancode, unsigned int keycode);
-extern int kbd_getkeycode(unsigned int scancode);
-extern int kbd_translate(unsigned char scancode, unsigned char *keycode,
- char raw_mode);
-extern char kbd_unexpected_up(unsigned char keycode);
-extern void kbd_leds(unsigned char leds);
-extern void kbd_init_hw(void);
-extern unsigned char *kbd_sysrq_xlate;
-
-extern unsigned char kbd_sysrq_key;
-#define SYSRQ_KEY kbd_sysrq_key
-
-#endif
-
-#endif /* __KERNEL */
-
-#endif /* _ASM_KEYBOARD_H */
diff -puN /dev/null include/asm-mips/mach-atlas/mc146818rtc.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-atlas/mc146818rtc.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,53 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ * Copyright (C) 2003 by Ralf Baechle
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ */
+#ifndef __ASM_MACH_ATLAS_MC146818RTC_H
+#define __ASM_MACH_ATLAS_MC146818RTC_H
+
+#include <asm/io.h>
+#include <asm/mips-boards/atlas.h>
+#include <asm/mips-boards/atlasint.h>
+
+
+#define RTC_PORT(x) (ATLAS_RTC_ADR_REG + (x)*8)
+#define RTC_IOMAPPED 1
+#define RTC_EXTENT 16
+#define RTC_IRQ ATLASINT_RTC
+
+#if CONFIG_CPU_LITTLE_ENDIAN
+#define ATLAS_RTC_PORT(x) (RTC_PORT(x) + 0)
+#else
+#define ATLAS_RTC_PORT(x) (RTC_PORT(x) + 3)
+#endif
+
+static inline unsigned char CMOS_READ(unsigned long addr)
+{
+ outb(addr, ATLAS_RTC_PORT(0));
+
+ return inb(ATLAS_RTC_PORT(1));
+}
+
+static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
+{
+ outb(addr, ATLAS_RTC_PORT(0));
+ outb(data, ATLAS_RTC_PORT(1));
+}
+
+#define RTC_ALWAYS_BCD 0
+
+#endif /* __ASM_MACH_ATLAS_MC146818RTC_H */
diff -puN /dev/null include/asm-mips/mach-au1x00/au1000_dma.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-au1x00/au1000_dma.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,432 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Defines for using and allocating dma channels on the Alchemy
+ * Au1000 mips processor.
+ *
+ * Copyright 2000 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * stevel@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+#ifndef __ASM_AU1000_DMA_H
+#define __ASM_AU1000_DMA_H
+
+#include <asm/io.h> /* need byte IO */
+#include <linux/spinlock.h> /* And spinlocks */
+#include <linux/delay.h>
+#include <asm/system.h>
+
+#define NUM_AU1000_DMA_CHANNELS 8
+
+/* DMA Channel Base Addresses */
+#define DMA_CHANNEL_BASE 0xB4002000
+#define DMA_CHANNEL_LEN 0x00000100
+
+/* DMA Channel Register Offsets */
+#define DMA_MODE_SET 0x00000000
+#define DMA_MODE_READ DMA_MODE_SET
+#define DMA_MODE_CLEAR 0x00000004
+/* DMA Mode register bits follow */
+#define DMA_DAH_MASK (0x0f << 20)
+#define DMA_DID_BIT 16
+#define DMA_DID_MASK (0x0f << DMA_DID_BIT)
+#define DMA_BE (1<<13)
+#define DMA_DR (1<<12)
+#define DMA_TS8 (1<<11)
+#define DMA_DW_BIT 9
+#define DMA_DW_MASK (0x03 << DMA_DW_BIT)
+#define DMA_DW8 (0 << DMA_DW_BIT)
+#define DMA_DW16 (1 << DMA_DW_BIT)
+#define DMA_DW32 (2 << DMA_DW_BIT)
+#define DMA_NC (1<<8)
+#define DMA_IE (1<<7)
+#define DMA_HALT (1<<6)
+#define DMA_GO (1<<5)
+#define DMA_AB (1<<4)
+#define DMA_D1 (1<<3)
+#define DMA_BE1 (1<<2)
+#define DMA_D0 (1<<1)
+#define DMA_BE0 (1<<0)
+
+#define DMA_PERIPHERAL_ADDR 0x00000008
+#define DMA_BUFFER0_START 0x0000000C
+#define DMA_BUFFER1_START 0x00000014
+#define DMA_BUFFER0_COUNT 0x00000010
+#define DMA_BUFFER1_COUNT 0x00000018
+#define DMA_BAH_BIT 16
+#define DMA_BAH_MASK (0x0f << DMA_BAH_BIT)
+#define DMA_COUNT_BIT 0
+#define DMA_COUNT_MASK (0xffff << DMA_COUNT_BIT)
+
+/* DMA Device ID's follow */
+enum {
+ DMA_ID_UART0_TX = 0,
+ DMA_ID_UART0_RX,
+ DMA_ID_GP04,
+ DMA_ID_GP05,
+ DMA_ID_AC97C_TX,
+ DMA_ID_AC97C_RX,
+ DMA_ID_UART3_TX,
+ DMA_ID_UART3_RX,
+ DMA_ID_USBDEV_EP0_RX,
+ DMA_ID_USBDEV_EP0_TX,
+ DMA_ID_USBDEV_EP2_TX,
+ DMA_ID_USBDEV_EP3_TX,
+ DMA_ID_USBDEV_EP4_RX,
+ DMA_ID_USBDEV_EP5_RX,
+ DMA_ID_I2S_TX,
+ DMA_ID_I2S_RX,
+ DMA_NUM_DEV
+};
+
+struct dma_chan {
+ int dev_id; // this channel is allocated if >=0, free otherwise
+ unsigned int io;
+ const char *dev_str;
+ int irq;
+ void *irq_dev;
+ unsigned int fifo_addr;
+ unsigned int mode;
+};
+
+/* These are in arch/mips/au1000/common/dma.c */
+extern struct dma_chan au1000_dma_table[];
+extern int request_au1000_dma(int dev_id,
+ const char *dev_str,
+ irqreturn_t (*irqhandler)(int, void *,
+ struct pt_regs *),
+ unsigned long irqflags,
+ void *irq_dev_id);
+extern void free_au1000_dma(unsigned int dmanr);
+extern int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
+ int length, int *eof, void *data);
+extern void dump_au1000_dma_channel(unsigned int dmanr);
+extern spinlock_t au1000_dma_spin_lock;
+
+
+static __inline__ struct dma_chan *get_dma_chan(unsigned int dmanr)
+{
+ if (dmanr > NUM_AU1000_DMA_CHANNELS
+ || au1000_dma_table[dmanr].dev_id < 0)
+ return NULL;
+ return &au1000_dma_table[dmanr];
+}
+
+static __inline__ unsigned long claim_dma_lock(void)
+{
+ unsigned long flags;
+ spin_lock_irqsave(&au1000_dma_spin_lock, flags);
+ return flags;
+}
+
+static __inline__ void release_dma_lock(unsigned long flags)
+{
+ spin_unlock_irqrestore(&au1000_dma_spin_lock, flags);
+}
+
+/*
+ * Set the DMA buffer enable bits in the mode register.
+ */
+static __inline__ void enable_dma_buffer0(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+ au_writel(DMA_BE0, chan->io + DMA_MODE_SET);
+}
+static __inline__ void enable_dma_buffer1(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+ au_writel(DMA_BE1, chan->io + DMA_MODE_SET);
+}
+static __inline__ void enable_dma_buffers(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+ au_writel(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET);
+}
+
+static __inline__ void start_dma(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+
+ au_writel(DMA_GO, chan->io + DMA_MODE_SET);
+}
+
+#define DMA_HALT_POLL 0x5000
+
+static __inline__ void halt_dma(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ int i;
+ if (!chan)
+ return;
+
+ au_writel(DMA_GO, chan->io + DMA_MODE_CLEAR);
+ // poll the halt bit
+ for (i = 0; i < DMA_HALT_POLL; i++)
+ if (au_readl(chan->io + DMA_MODE_READ) & DMA_HALT)
+ break;
+ if (i == DMA_HALT_POLL)
+ printk(KERN_INFO "halt_dma: HALT poll expired!\n");
+}
+
+
+static __inline__ void disable_dma(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+
+ halt_dma(dmanr);
+
+ // now we can disable the buffers
+ au_writel(~DMA_GO, chan->io + DMA_MODE_CLEAR);
+}
+
+static __inline__ int dma_halted(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return 1;
+ return (au_readl(chan->io + DMA_MODE_READ) & DMA_HALT) ? 1 : 0;
+}
+
+/* initialize a DMA channel */
+static __inline__ void init_dma(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ u32 mode;
+ if (!chan)
+ return;
+
+ disable_dma(dmanr);
+
+ // set device FIFO address
+ au_writel(CPHYSADDR(chan->fifo_addr),
+ chan->io + DMA_PERIPHERAL_ADDR);
+
+ mode = chan->mode | (chan->dev_id << DMA_DID_BIT);
+ if (chan->irq)
+ mode |= DMA_IE;
+
+ au_writel(~mode, chan->io + DMA_MODE_CLEAR);
+ au_writel(mode, chan->io + DMA_MODE_SET);
+}
+
+/*
+ * set mode for a specific DMA channel
+ */
+static __inline__ void set_dma_mode(unsigned int dmanr, unsigned int mode)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+ /*
+ * set_dma_mode is only allowed to change endianess, direction,
+ * transfer size, device FIFO width, and coherency settings.
+ * Make sure anything else is masked off.
+ */
+ mode &= (DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC);
+ chan->mode &= ~(DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC);
+ chan->mode |= mode;
+}
+
+static __inline__ unsigned int get_dma_mode(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return 0;
+ return chan->mode;
+}
+
+static __inline__ int get_dma_active_buffer(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return -1;
+ return (au_readl(chan->io + DMA_MODE_READ) & DMA_AB) ? 1 : 0;
+}
+
+
+/*
+ * set the device FIFO address for a specific DMA channel - only
+ * applicable to GPO4 and GPO5. All the other devices have fixed
+ * FIFO addresses.
+ */
+static __inline__ void set_dma_fifo_addr(unsigned int dmanr,
+ unsigned int a)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+
+ if (chan->dev_id != DMA_ID_GP04 && chan->dev_id != DMA_ID_GP05)
+ return;
+
+ au_writel(CPHYSADDR(a), chan->io + DMA_PERIPHERAL_ADDR);
+}
+
+/*
+ * Clear the DMA buffer done bits in the mode register.
+ */
+static __inline__ void clear_dma_done0(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+ au_writel(DMA_D0, chan->io + DMA_MODE_CLEAR);
+}
+static __inline__ void clear_dma_done1(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+ au_writel(DMA_D1, chan->io + DMA_MODE_CLEAR);
+}
+
+/*
+ * This does nothing - not applicable to Au1000 DMA.
+ */
+static __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
+{
+}
+
+/*
+ * Set Buffer 0 transfer address for specific DMA channel.
+ */
+static __inline__ void set_dma_addr0(unsigned int dmanr, unsigned int a)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+ au_writel(a, chan->io + DMA_BUFFER0_START);
+}
+
+/*
+ * Set Buffer 1 transfer address for specific DMA channel.
+ */
+static __inline__ void set_dma_addr1(unsigned int dmanr, unsigned int a)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+ au_writel(a, chan->io + DMA_BUFFER1_START);
+}
+
+
+/*
+ * Set Buffer 0 transfer size (max 64k) for a specific DMA channel.
+ */
+static __inline__ void set_dma_count0(unsigned int dmanr,
+ unsigned int count)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+ count &= DMA_COUNT_MASK;
+ au_writel(count, chan->io + DMA_BUFFER0_COUNT);
+}
+
+/*
+ * Set Buffer 1 transfer size (max 64k) for a specific DMA channel.
+ */
+static __inline__ void set_dma_count1(unsigned int dmanr,
+ unsigned int count)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+ count &= DMA_COUNT_MASK;
+ au_writel(count, chan->io + DMA_BUFFER1_COUNT);
+}
+
+/*
+ * Set both buffer transfer sizes (max 64k) for a specific DMA channel.
+ */
+static __inline__ void set_dma_count(unsigned int dmanr,
+ unsigned int count)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return;
+ count &= DMA_COUNT_MASK;
+ au_writel(count, chan->io + DMA_BUFFER0_COUNT);
+ au_writel(count, chan->io + DMA_BUFFER1_COUNT);
+}
+
+/*
+ * Returns which buffer has its done bit set in the mode register.
+ * Returns -1 if neither or both done bits set.
+ */
+static __inline__ unsigned int get_dma_buffer_done(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return 0;
+
+ return au_readl(chan->io + DMA_MODE_READ) & (DMA_D0 | DMA_D1);
+}
+
+
+/*
+ * Returns the DMA channel's Buffer Done IRQ number.
+ */
+static __inline__ int get_dma_done_irq(unsigned int dmanr)
+{
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return -1;
+
+ return chan->irq;
+}
+
+/*
+ * Get DMA residue count. Returns the number of _bytes_ left to transfer.
+ */
+static __inline__ int get_dma_residue(unsigned int dmanr)
+{
+ int curBufCntReg, count;
+ struct dma_chan *chan = get_dma_chan(dmanr);
+ if (!chan)
+ return 0;
+
+ curBufCntReg = (au_readl(chan->io + DMA_MODE_READ) & DMA_AB) ?
+ DMA_BUFFER1_COUNT : DMA_BUFFER0_COUNT;
+
+ count = au_readl(chan->io + curBufCntReg) & DMA_COUNT_MASK;
+
+ if ((chan->mode & DMA_DW_MASK) == DMA_DW16)
+ count <<= 1;
+ else if ((chan->mode & DMA_DW_MASK) == DMA_DW32)
+ count <<= 2;
+
+ return count;
+}
+
+#endif /* __ASM_AU1000_DMA_H */
diff -puN /dev/null include/asm-mips/mach-au1x00/au1000_gpio.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-au1x00/au1000_gpio.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,56 @@
+/*
+ * FILE NAME au1000_gpio.h
+ *
+ * BRIEF MODULE DESCRIPTION
+ * API to Alchemy Au1000 GPIO device.
+ *
+ * Author: MontaVista Software, Inc. <source@mvista.com>
+ * Steve Longerbeam <stevel@mvista.com>
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __AU1000_GPIO_H
+#define __AU1000_GPIO_H
+
+#include <linux/ioctl.h>
+
+#define AU1000GPIO_IOC_MAGIC 'A'
+
+#define AU1000GPIO_IN _IOR (AU1000GPIO_IOC_MAGIC, 0, int)
+#define AU1000GPIO_SET _IOW (AU1000GPIO_IOC_MAGIC, 1, int)
+#define AU1000GPIO_CLEAR _IOW (AU1000GPIO_IOC_MAGIC, 2, int)
+#define AU1000GPIO_OUT _IOW (AU1000GPIO_IOC_MAGIC, 3, int)
+#define AU1000GPIO_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 4, int)
+#define AU1000GPIO_AVAIL_MASK _IOR (AU1000GPIO_IOC_MAGIC, 5, int)
+
+#ifdef __KERNEL__
+extern u32 get_au1000_avail_gpio_mask(void);
+extern int au1000gpio_tristate(u32 data);
+extern int au1000gpio_in(u32 *data);
+extern int au1000gpio_set(u32 data);
+extern int au1000gpio_clear(u32 data);
+extern int au1000gpio_out(u32 data);
+#endif
+
+#endif
diff -puN /dev/null include/asm-mips/mach-au1x00/au1000.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-au1x00/au1000.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,1155 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Include file for Alchemy Semiconductor's Au1k CPU.
+ *
+ * Copyright 2000,2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+ /*
+ * some definitions add by takuzo@sm.sony.co.jp and sato@sm.sony.co.jp
+ */
+
+#ifndef _AU1000_H_
+#define _AU1000_H_
+
+#ifndef _LANGUAGE_ASSEMBLY
+
+#include <linux/delay.h>
+#include <asm/io.h>
+
+/* cpu pipeline flush */
+void static inline au_sync(void)
+{
+ __asm__ volatile ("sync");
+}
+
+void static inline au_sync_udelay(int us)
+{
+ __asm__ volatile ("sync");
+ udelay(us);
+}
+
+void static inline au_sync_delay(int ms)
+{
+ __asm__ volatile ("sync");
+ mdelay(ms);
+}
+
+void static inline au_writeb(u8 val, int reg)
+{
+ *(volatile u8 *)(reg) = val;
+}
+
+void static inline au_writew(u16 val, int reg)
+{
+ *(volatile u16 *)(reg) = val;
+}
+
+void static inline au_writel(u32 val, int reg)
+{
+ *(volatile u32 *)(reg) = val;
+}
+
+static inline u8 au_readb(unsigned long port)
+{
+ return (*(volatile u8 *)port);
+}
+
+static inline u16 au_readw(unsigned long port)
+{
+ return (*(volatile u16 *)port);
+}
+
+static inline u32 au_readl(unsigned long port)
+{
+ return (*(volatile u32 *)port);
+}
+
+/* These next three functions should be a generic part of the MIPS
+ * kernel (with the 'au_' removed from the name) and selected for
+ * processors that support the instructions.
+ * Taken from PPC tree. -- Dan
+ */
+/* Return the bit position of the most significant 1 bit in a word */
+static __inline__ int __ilog2(unsigned int x)
+{
+ int lz;
+
+ asm volatile (
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ ".set\tmips32\n\t"
+ "clz\t%0,%1\n\t"
+ ".set\tmips0\n\t"
+ ".set\tat\n\t"
+ ".set\treorder"
+ : "=r" (lz)
+ : "r" (x));
+
+ return 31 - lz;
+}
+
+static __inline__ int au_ffz(unsigned int x)
+{
+ if ((x = ~x) == 0)
+ return 32;
+ return __ilog2(x & -x);
+}
+
+/*
+ * ffs: find first bit set. This is defined the same way as
+ * the libc and compiler builtin ffs routines, therefore
+ * differs in spirit from the above ffz (man ffs).
+ */
+static __inline__ int au_ffs(int x)
+{
+ return __ilog2(x & -x) + 1;
+}
+
+/* arch/mips/au1000/common/clocks.c */
+extern void set_au1x00_speed(unsigned int new_freq);
+extern unsigned int get_au1x00_speed(void);
+extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
+extern unsigned long get_au1x00_uart_baud_base(void);
+extern void set_au1x00_lcd_clock(void);
+extern unsigned int get_au1x00_lcd_clock(void);
+
+/*
+ * Every board describes its IRQ mapping with this table.
+ */
+typedef struct au1xxx_irqmap {
+ int im_irq;
+ int im_type;
+ int im_request;
+} au1xxx_irq_map_t;
+
+/*
+ * init_IRQ looks for a table with this name.
+ */
+extern au1xxx_irq_map_t au1xxx_irq_map[];
+
+#endif /* !defined (_LANGUAGE_ASSEMBLY) */
+
+#ifdef CONFIG_PM
+/* no CP0 timer irq */
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4)
+#else
+#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
+#endif
+
+/* SDRAM Controller */
+#define MEM_SDMODE0 0xB4000000
+#define MEM_SDMODE1 0xB4000004
+#define MEM_SDMODE2 0xB4000008
+
+#define MEM_SDADDR0 0xB400000C
+#define MEM_SDADDR1 0xB4000010
+#define MEM_SDADDR2 0xB4000014
+
+#define MEM_SDREFCFG 0xB4000018
+#define MEM_SDPRECMD 0xB400001C
+#define MEM_SDAUTOREF 0xB4000020
+
+#define MEM_SDWRMD0 0xB4000024
+#define MEM_SDWRMD1 0xB4000028
+#define MEM_SDWRMD2 0xB400002C
+
+#define MEM_SDSLEEP 0xB4000030
+#define MEM_SDSMCKE 0xB4000034
+
+/* Static Bus Controller */
+#define MEM_STCFG0 0xB4001000
+#define MEM_STTIME0 0xB4001004
+#define MEM_STADDR0 0xB4001008
+
+#define MEM_STCFG1 0xB4001010
+#define MEM_STTIME1 0xB4001014
+#define MEM_STADDR1 0xB4001018
+
+#define MEM_STCFG2 0xB4001020
+#define MEM_STTIME2 0xB4001024
+#define MEM_STADDR2 0xB4001028
+
+#define MEM_STCFG3 0xB4001030
+#define MEM_STTIME3 0xB4001034
+#define MEM_STADDR3 0xB4001038
+
+/* Interrupt Controller 0 */
+#define IC0_CFG0RD 0xB0400040
+#define IC0_CFG0SET 0xB0400040
+#define IC0_CFG0CLR 0xB0400044
+
+#define IC0_CFG1RD 0xB0400048
+#define IC0_CFG1SET 0xB0400048
+#define IC0_CFG1CLR 0xB040004C
+
+#define IC0_CFG2RD 0xB0400050
+#define IC0_CFG2SET 0xB0400050
+#define IC0_CFG2CLR 0xB0400054
+
+#define IC0_REQ0INT 0xB0400054
+#define IC0_SRCRD 0xB0400058
+#define IC0_SRCSET 0xB0400058
+#define IC0_SRCCLR 0xB040005C
+#define IC0_REQ1INT 0xB040005C
+
+#define IC0_ASSIGNRD 0xB0400060
+#define IC0_ASSIGNSET 0xB0400060
+#define IC0_ASSIGNCLR 0xB0400064
+
+#define IC0_WAKERD 0xB0400068
+#define IC0_WAKESET 0xB0400068
+#define IC0_WAKECLR 0xB040006C
+
+#define IC0_MASKRD 0xB0400070
+#define IC0_MASKSET 0xB0400070
+#define IC0_MASKCLR 0xB0400074
+
+#define IC0_RISINGRD 0xB0400078
+#define IC0_RISINGCLR 0xB0400078
+#define IC0_FALLINGRD 0xB040007C
+#define IC0_FALLINGCLR 0xB040007C
+
+#define IC0_TESTBIT 0xB0400080
+
+/* Interrupt Controller 1 */
+#define IC1_CFG0RD 0xB1800040
+#define IC1_CFG0SET 0xB1800040
+#define IC1_CFG0CLR 0xB1800044
+
+#define IC1_CFG1RD 0xB1800048
+#define IC1_CFG1SET 0xB1800048
+#define IC1_CFG1CLR 0xB180004C
+
+#define IC1_CFG2RD 0xB1800050
+#define IC1_CFG2SET 0xB1800050
+#define IC1_CFG2CLR 0xB1800054
+
+#define IC1_REQ0INT 0xB1800054
+#define IC1_SRCRD 0xB1800058
+#define IC1_SRCSET 0xB1800058
+#define IC1_SRCCLR 0xB180005C
+#define IC1_REQ1INT 0xB180005C
+
+#define IC1_ASSIGNRD 0xB1800060
+#define IC1_ASSIGNSET 0xB1800060
+#define IC1_ASSIGNCLR 0xB1800064
+
+#define IC1_WAKERD 0xB1800068
+#define IC1_WAKESET 0xB1800068
+#define IC1_WAKECLR 0xB180006C
+
+#define IC1_MASKRD 0xB1800070
+#define IC1_MASKSET 0xB1800070
+#define IC1_MASKCLR 0xB1800074
+
+#define IC1_RISINGRD 0xB1800078
+#define IC1_RISINGCLR 0xB1800078
+#define IC1_FALLINGRD 0xB180007C
+#define IC1_FALLINGCLR 0xB180007C
+
+#define IC1_TESTBIT 0xB1800080
+
+/* Interrupt Configuration Modes */
+#define INTC_INT_DISABLED 0
+#define INTC_INT_RISE_EDGE 0x1
+#define INTC_INT_FALL_EDGE 0x2
+#define INTC_INT_RISE_AND_FALL_EDGE 0x3
+#define INTC_INT_HIGH_LEVEL 0x5
+#define INTC_INT_LOW_LEVEL 0x6
+#define INTC_INT_HIGH_AND_LOW_LEVEL 0x7
+
+/* Interrupt Numbers */
+#define AU1000_UART0_INT 0
+#define AU1000_UART1_INT 1 /* au1000 */
+#define AU1000_UART2_INT 2 /* au1000 */
+
+#define AU1000_PCI_INTA 1 /* au1500 */
+#define AU1000_PCI_INTB 2 /* au1500 */
+
+#define AU1000_UART3_INT 3
+
+#define AU1000_SSI0_INT 4 /* au1000 */
+#define AU1000_SSI1_INT 5 /* au1000 */
+
+#define AU1000_PCI_INTC 4 /* au1500 */
+#define AU1000_PCI_INTD 5 /* au1500 */
+
+#define AU1000_DMA_INT_BASE 6
+#define AU1000_TOY_INT 14
+#define AU1000_TOY_MATCH0_INT 15
+#define AU1000_TOY_MATCH1_INT 16
+#define AU1000_TOY_MATCH2_INT 17
+#define AU1000_RTC_INT 18
+#define AU1000_RTC_MATCH0_INT 19
+#define AU1000_RTC_MATCH1_INT 20
+#define AU1000_RTC_MATCH2_INT 21
+#define AU1000_IRDA_TX_INT 22 /* au1000 */
+#define AU1000_IRDA_RX_INT 23 /* au1000 */
+#define AU1000_USB_DEV_REQ_INT 24
+#define AU1000_USB_DEV_SUS_INT 25
+#define AU1000_USB_HOST_INT 26
+#define AU1000_ACSYNC_INT 27
+#define AU1000_MAC0_DMA_INT 28
+#define AU1000_MAC1_DMA_INT 29
+#define AU1000_ETH0_IRQ AU1000_MAC0_DMA_INT
+#define AU1000_ETH1_IRQ AU1000_MAC1_DMA_INT
+#define AU1000_I2S_UO_INT 30 /* au1000 */
+#define AU1000_AC97C_INT 31
+#define AU1000_LAST_INTC0_INT AU1000_AC97C_INT
+#define AU1000_GPIO_0 32
+#define AU1000_GPIO_1 33
+#define AU1000_GPIO_2 34
+#define AU1000_GPIO_3 35
+#define AU1000_GPIO_4 36
+#define AU1000_GPIO_5 37
+#define AU1000_GPIO_6 38
+#define AU1000_GPIO_7 39
+#define AU1000_GPIO_8 40
+#define AU1000_GPIO_9 41
+#define AU1000_GPIO_10 42
+#define AU1000_GPIO_11 43
+#define AU1000_GPIO_12 44
+#define AU1000_GPIO_13 45
+#define AU1000_GPIO_14 46
+#define AU1000_GPIO_15 47
+
+/* Au1000 only */
+#define AU1000_GPIO_16 48
+#define AU1000_GPIO_17 49
+#define AU1000_GPIO_18 50
+#define AU1000_GPIO_19 51
+#define AU1000_GPIO_20 52
+#define AU1000_GPIO_21 53
+#define AU1000_GPIO_22 54
+#define AU1000_GPIO_23 55
+#define AU1000_GPIO_24 56
+#define AU1000_GPIO_25 57
+#define AU1000_GPIO_26 58
+#define AU1000_GPIO_27 59
+#define AU1000_GPIO_28 60
+#define AU1000_GPIO_29 61
+#define AU1000_GPIO_30 62
+#define AU1000_GPIO_31 63
+
+/* Au1500 only */
+#define AU1500_GPIO_200 48
+#define AU1500_GPIO_201 49
+#define AU1500_GPIO_202 50
+#define AU1500_GPIO_203 51
+#define AU1500_GPIO_20 52
+#define AU1500_GPIO_204 53
+#define AU1500_GPIO_205 54
+#define AU1500_GPIO_23 55
+#define AU1500_GPIO_24 56
+#define AU1500_GPIO_25 57
+#define AU1500_GPIO_26 58
+#define AU1500_GPIO_27 59
+#define AU1500_GPIO_28 60
+#define AU1500_GPIO_206 61
+#define AU1500_GPIO_207 62
+#define AU1500_GPIO_208_215 63
+
+#define AU1000_MAX_INTR 63
+
+#define AU1100_SD 2
+#define AU1100_GPIO_208_215 29
+// Seperate defines for AU1550 SOC
+#define AU1550_UART0_INT AU1000_UART0_INT
+#define AU1550_PCI_INTA AU1000_PCI_INTA
+#define AU1550_PCI_INTB AU1000_PCI_INTB
+#define AU1550_DDMA_INT 3
+#define AU1550_CRYPTO_INT 4
+#define AU1550_PCI_INTC 5
+#define AU1550_PCI_INTD 6
+#define AU1550_PCI_RST_INT 7
+#define AU1550_UART1_INT 8
+#define AU1550_UART3_INT 9
+#define AU1550_PSC0_INT 10
+#define AU1550_PSC1_INT 11
+#define AU1550_PSC2_INT 12
+#define AU1550_PSC3_INT 13
+#define AU1550_TOY_INT 14
+#define AU1550_TOY_MATCH0_INT 15
+#define AU1550_TOY_MATCH1_INT 16
+#define AU1550_TOY_MATCH2_INT 17
+#define AU1550_RTC_INT 18
+#define AU1550_RTC_MATCH0_INT 19
+#define AU1550_RTC_MATCH1_INT 20
+#define AU1550_RTC_MATCH2_INT 21
+#define AU1550_NAND_INT 23
+#define AU1550_USB_DEV_REQ_INT 24
+#define AU1550_USB_DEV_SUS_INT 25
+#define AU1550_USB_HOST_INT 26
+#define AU1550_MAC0_DMA_INT 27
+#define AU1550_MAC1_DMA_INT 28
+#define AU1550_ETH0_IRQ AU1550_MAC0_DMA_INT
+#define AU1550_ETH1_IRQ AU1550_MAC1_DMA_INT
+
+#define AU1550_GPIO_200 48
+#define AU1500_GPIO_201_205 49 // Logical or of GPIO201:205
+#define AU1500_GPIO_16 50
+#define AU1500_GPIO_17 51
+#define AU1500_GPIO_20 52
+#define AU1500_GPIO_21 53
+#define AU1500_GPIO_22 54
+#define AU1500_GPIO_23 55
+#define AU1500_GPIO_24 56
+#define AU1500_GPIO_25 57
+#define AU1500_GPIO_26 58
+#define AU1500_GPIO_27 59
+#define AU1500_GPIO_28 60
+#define AU1500_GPIO_206 61
+#define AU1500_GPIO_207 62
+#define AU1500_GPIO_208_218 63 // Logical or of GPIO208:218
+
+// REDEFINE SECONDARY GPIO BLOCK INTO IC1 CONTROLLER HERE
+
+
+/* Programmable Counters 0 and 1 */
+#define SYS_BASE 0xB1900000
+#define SYS_COUNTER_CNTRL (SYS_BASE + 0x14)
+ #define SYS_CNTRL_E1S (1<<23)
+ #define SYS_CNTRL_T1S (1<<20)
+ #define SYS_CNTRL_M21 (1<<19)
+ #define SYS_CNTRL_M11 (1<<18)
+ #define SYS_CNTRL_M01 (1<<17)
+ #define SYS_CNTRL_C1S (1<<16)
+ #define SYS_CNTRL_BP (1<<14)
+ #define SYS_CNTRL_EN1 (1<<13)
+ #define SYS_CNTRL_BT1 (1<<12)
+ #define SYS_CNTRL_EN0 (1<<11)
+ #define SYS_CNTRL_BT0 (1<<10)
+ #define SYS_CNTRL_E0 (1<<8)
+ #define SYS_CNTRL_E0S (1<<7)
+ #define SYS_CNTRL_32S (1<<5)
+ #define SYS_CNTRL_T0S (1<<4)
+ #define SYS_CNTRL_M20 (1<<3)
+ #define SYS_CNTRL_M10 (1<<2)
+ #define SYS_CNTRL_M00 (1<<1)
+ #define SYS_CNTRL_C0S (1<<0)
+
+/* Programmable Counter 0 Registers */
+#define SYS_TOYTRIM (SYS_BASE + 0)
+#define SYS_TOYWRITE (SYS_BASE + 4)
+#define SYS_TOYMATCH0 (SYS_BASE + 8)
+#define SYS_TOYMATCH1 (SYS_BASE + 0xC)
+#define SYS_TOYMATCH2 (SYS_BASE + 0x10)
+#define SYS_TOYREAD (SYS_BASE + 0x40)
+
+/* Programmable Counter 1 Registers */
+#define SYS_RTCTRIM (SYS_BASE + 0x44)
+#define SYS_RTCWRITE (SYS_BASE + 0x48)
+#define SYS_RTCMATCH0 (SYS_BASE + 0x4C)
+#define SYS_RTCMATCH1 (SYS_BASE + 0x50)
+#define SYS_RTCMATCH2 (SYS_BASE + 0x54)
+#define SYS_RTCREAD (SYS_BASE + 0x58)
+
+/* I2S Controller */
+#define I2S_DATA 0xB1000000
+ #define I2S_DATA_MASK (0xffffff)
+#define I2S_CONFIG 0xB1000004
+ #define I2S_CONFIG_XU (1<<25)
+ #define I2S_CONFIG_XO (1<<24)
+ #define I2S_CONFIG_RU (1<<23)
+ #define I2S_CONFIG_RO (1<<22)
+ #define I2S_CONFIG_TR (1<<21)
+ #define I2S_CONFIG_TE (1<<20)
+ #define I2S_CONFIG_TF (1<<19)
+ #define I2S_CONFIG_RR (1<<18)
+ #define I2S_CONFIG_RE (1<<17)
+ #define I2S_CONFIG_RF (1<<16)
+ #define I2S_CONFIG_PD (1<<11)
+ #define I2S_CONFIG_LB (1<<10)
+ #define I2S_CONFIG_IC (1<<9)
+ #define I2S_CONFIG_FM_BIT 7
+ #define I2S_CONFIG_FM_MASK (0x3 << I2S_CONFIG_FM_BIT)
+ #define I2S_CONFIG_FM_I2S (0x0 << I2S_CONFIG_FM_BIT)
+ #define I2S_CONFIG_FM_LJ (0x1 << I2S_CONFIG_FM_BIT)
+ #define I2S_CONFIG_FM_RJ (0x2 << I2S_CONFIG_FM_BIT)
+ #define I2S_CONFIG_TN (1<<6)
+ #define I2S_CONFIG_RN (1<<5)
+ #define I2S_CONFIG_SZ_BIT 0
+ #define I2S_CONFIG_SZ_MASK (0x1F << I2S_CONFIG_SZ_BIT)
+
+#define I2S_CONTROL 0xB1000008
+ #define I2S_CONTROL_D (1<<1)
+ #define I2S_CONTROL_CE (1<<0)
+
+/* USB Host Controller */
+// We pass USB_OHCI_BASE to ioremap, so it needs to be a physical address
+#if defined( CONFIG_SOC_AU1550 )
+#define USB_OHCI_BASE 0x14020000
+#define USB_OHCI_LEN 0x00100000
+#define USB_HOST_CONFIG 0xB4027ffc
+#else
+#define USB_OHCI_BASE 0x10100000
+#define USB_OHCI_LEN 0x00100000
+#define USB_HOST_CONFIG 0xB017fffc
+#endif
+
+/* USB Device Controller */
+#define USBD_EP0RD 0xB0200000
+#define USBD_EP0WR 0xB0200004
+#define USBD_EP2WR 0xB0200008
+#define USBD_EP3WR 0xB020000C
+#define USBD_EP4RD 0xB0200010
+#define USBD_EP5RD 0xB0200014
+#define USBD_INTEN 0xB0200018
+#define USBD_INTSTAT 0xB020001C
+ #define USBDEV_INT_SOF (1<<12)
+ #define USBDEV_INT_HF_BIT 6
+ #define USBDEV_INT_HF_MASK (0x3f << USBDEV_INT_HF_BIT)
+ #define USBDEV_INT_CMPLT_BIT 0
+ #define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT)
+#define USBD_CONFIG 0xB0200020
+#define USBD_EP0CS 0xB0200024
+#define USBD_EP2CS 0xB0200028
+#define USBD_EP3CS 0xB020002C
+#define USBD_EP4CS 0xB0200030
+#define USBD_EP5CS 0xB0200034
+ #define USBDEV_CS_SU (1<<14)
+ #define USBDEV_CS_NAK (1<<13)
+ #define USBDEV_CS_ACK (1<<12)
+ #define USBDEV_CS_BUSY (1<<11)
+ #define USBDEV_CS_TSIZE_BIT 1
+ #define USBDEV_CS_TSIZE_MASK (0x3ff << USBDEV_CS_TSIZE_BIT)
+ #define USBDEV_CS_STALL (1<<0)
+#define USBD_EP0RDSTAT 0xB0200040
+#define USBD_EP0WRSTAT 0xB0200044
+#define USBD_EP2WRSTAT 0xB0200048
+#define USBD_EP3WRSTAT 0xB020004C
+#define USBD_EP4RDSTAT 0xB0200050
+#define USBD_EP5RDSTAT 0xB0200054
+ #define USBDEV_FSTAT_FLUSH (1<<6)
+ #define USBDEV_FSTAT_UF (1<<5)
+ #define USBDEV_FSTAT_OF (1<<4)
+ #define USBDEV_FSTAT_FCNT_BIT 0
+ #define USBDEV_FSTAT_FCNT_MASK (0x0f << USBDEV_FSTAT_FCNT_BIT)
+#define USBD_ENABLE 0xB0200058
+ #define USBDEV_ENABLE (1<<1)
+ #define USBDEV_CE (1<<0)
+
+/* Ethernet Controllers */
+#define AU1000_ETH0_BASE 0xB0500000
+#define AU1000_ETH1_BASE 0xB0510000
+#define AU1500_ETH0_BASE 0xB1500000
+#define AU1500_ETH1_BASE 0xB1510000
+#define AU1100_ETH0_BASE 0xB0500000
+#define AU1550_ETH0_BASE 0xB0500000
+#define AU1550_ETH1_BASE 0xB0510000
+
+/* 4 byte offsets from AU1000_ETH_BASE */
+#define MAC_CONTROL 0x0
+ #define MAC_RX_ENABLE (1<<2)
+ #define MAC_TX_ENABLE (1<<3)
+ #define MAC_DEF_CHECK (1<<5)
+ #define MAC_SET_BL(X) (((X)&0x3)<<6)
+ #define MAC_AUTO_PAD (1<<8)
+ #define MAC_DISABLE_RETRY (1<<10)
+ #define MAC_DISABLE_BCAST (1<<11)
+ #define MAC_LATE_COL (1<<12)
+ #define MAC_HASH_MODE (1<<13)
+ #define MAC_HASH_ONLY (1<<15)
+ #define MAC_PASS_ALL (1<<16)
+ #define MAC_INVERSE_FILTER (1<<17)
+ #define MAC_PROMISCUOUS (1<<18)
+ #define MAC_PASS_ALL_MULTI (1<<19)
+ #define MAC_FULL_DUPLEX (1<<20)
+ #define MAC_NORMAL_MODE 0
+ #define MAC_INT_LOOPBACK (1<<21)
+ #define MAC_EXT_LOOPBACK (1<<22)
+ #define MAC_DISABLE_RX_OWN (1<<23)
+ #define MAC_BIG_ENDIAN (1<<30)
+ #define MAC_RX_ALL (1<<31)
+#define MAC_ADDRESS_HIGH 0x4
+#define MAC_ADDRESS_LOW 0x8
+#define MAC_MCAST_HIGH 0xC
+#define MAC_MCAST_LOW 0x10
+#define MAC_MII_CNTRL 0x14
+ #define MAC_MII_BUSY (1<<0)
+ #define MAC_MII_READ 0
+ #define MAC_MII_WRITE (1<<1)
+ #define MAC_SET_MII_SELECT_REG(X) (((X)&0x1f)<<6)
+ #define MAC_SET_MII_SELECT_PHY(X) (((X)&0x1f)<<11)
+#define MAC_MII_DATA 0x18
+#define MAC_FLOW_CNTRL 0x1C
+ #define MAC_FLOW_CNTRL_BUSY (1<<0)
+ #define MAC_FLOW_CNTRL_ENABLE (1<<1)
+ #define MAC_PASS_CONTROL (1<<2)
+ #define MAC_SET_PAUSE(X) (((X)&0xffff)<<16)
+#define MAC_VLAN1_TAG 0x20
+#define MAC_VLAN2_TAG 0x24
+
+/* Ethernet Controller Enable */
+#define AU1000_MAC0_ENABLE 0xB0520000
+#define AU1000_MAC1_ENABLE 0xB0520004
+#define AU1500_MAC0_ENABLE 0xB1520000
+#define AU1500_MAC1_ENABLE 0xB1520004
+#define AU1100_MAC0_ENABLE 0xB0520000
+
+ #define MAC_EN_CLOCK_ENABLE (1<<0)
+ #define MAC_EN_RESET0 (1<<1)
+ #define MAC_EN_TOSS (0<<2)
+ #define MAC_EN_CACHEABLE (1<<3)
+ #define MAC_EN_RESET1 (1<<4)
+ #define MAC_EN_RESET2 (1<<5)
+ #define MAC_DMA_RESET (1<<6)
+
+/* Ethernet Controller DMA Channels */
+
+#define MAC0_TX_DMA_ADDR 0xB4004000
+#define MAC1_TX_DMA_ADDR 0xB4004200
+/* offsets from MAC_TX_RING_ADDR address */
+#define MAC_TX_BUFF0_STATUS 0x0
+ #define TX_FRAME_ABORTED (1<<0)
+ #define TX_JAB_TIMEOUT (1<<1)
+ #define TX_NO_CARRIER (1<<2)
+ #define TX_LOSS_CARRIER (1<<3)
+ #define TX_EXC_DEF (1<<4)
+ #define TX_LATE_COLL_ABORT (1<<5)
+ #define TX_EXC_COLL (1<<6)
+ #define TX_UNDERRUN (1<<7)
+ #define TX_DEFERRED (1<<8)
+ #define TX_LATE_COLL (1<<9)
+ #define TX_COLL_CNT_MASK (0xF<<10)
+ #define TX_PKT_RETRY (1<<31)
+#define MAC_TX_BUFF0_ADDR 0x4
+ #define TX_DMA_ENABLE (1<<0)
+ #define TX_T_DONE (1<<1)
+ #define TX_GET_DMA_BUFFER(X) (((X)>>2)&0x3)
+#define MAC_TX_BUFF0_LEN 0x8
+#define MAC_TX_BUFF1_STATUS 0x10
+#define MAC_TX_BUFF1_ADDR 0x14
+#define MAC_TX_BUFF1_LEN 0x18
+#define MAC_TX_BUFF2_STATUS 0x20
+#define MAC_TX_BUFF2_ADDR 0x24
+#define MAC_TX_BUFF2_LEN 0x28
+#define MAC_TX_BUFF3_STATUS 0x30
+#define MAC_TX_BUFF3_ADDR 0x34
+#define MAC_TX_BUFF3_LEN 0x38
+
+#define MAC0_RX_DMA_ADDR 0xB4004100
+#define MAC1_RX_DMA_ADDR 0xB4004300
+/* offsets from MAC_RX_RING_ADDR */
+#define MAC_RX_BUFF0_STATUS 0x0
+ #define RX_FRAME_LEN_MASK 0x3fff
+ #define RX_WDOG_TIMER (1<<14)
+ #define RX_RUNT (1<<15)
+ #define RX_OVERLEN (1<<16)
+ #define RX_COLL (1<<17)
+ #define RX_ETHER (1<<18)
+ #define RX_MII_ERROR (1<<19)
+ #define RX_DRIBBLING (1<<20)
+ #define RX_CRC_ERROR (1<<21)
+ #define RX_VLAN1 (1<<22)
+ #define RX_VLAN2 (1<<23)
+ #define RX_LEN_ERROR (1<<24)
+ #define RX_CNTRL_FRAME (1<<25)
+ #define RX_U_CNTRL_FRAME (1<<26)
+ #define RX_MCAST_FRAME (1<<27)
+ #define RX_BCAST_FRAME (1<<28)
+ #define RX_FILTER_FAIL (1<<29)
+ #define RX_PACKET_FILTER (1<<30)
+ #define RX_MISSED_FRAME (1<<31)
+
+ #define RX_ERROR (RX_WDOG_TIMER | RX_RUNT | RX_OVERLEN | \
+ RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \
+ RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME)
+#define MAC_RX_BUFF0_ADDR 0x4
+ #define RX_DMA_ENABLE (1<<0)
+ #define RX_T_DONE (1<<1)
+ #define RX_GET_DMA_BUFFER(X) (((X)>>2)&0x3)
+ #define RX_SET_BUFF_ADDR(X) ((X)&0xffffffc0)
+#define MAC_RX_BUFF1_STATUS 0x10
+#define MAC_RX_BUFF1_ADDR 0x14
+#define MAC_RX_BUFF2_STATUS 0x20
+#define MAC_RX_BUFF2_ADDR 0x24
+#define MAC_RX_BUFF3_STATUS 0x30
+#define MAC_RX_BUFF3_ADDR 0x34
+
+
+/* UARTS 0-3 */
+#define UART0_ADDR 0xB1100000
+#define UART1_ADDR 0xB1200000
+#define UART2_ADDR 0xB1300000
+#define UART3_ADDR 0xB1400000
+#define UART_BASE UART0_ADDR
+#define UART_DEBUG_BASE UART3_ADDR
+
+#define UART_RX 0 /* Receive buffer */
+#define UART_TX 4 /* Transmit buffer */
+#define UART_IER 8 /* Interrupt Enable Register */
+#define UART_IIR 0xC /* Interrupt ID Register */
+#define UART_FCR 0x10 /* FIFO Control Register */
+#define UART_LCR 0x14 /* Line Control Register */
+#define UART_MCR 0x18 /* Modem Control Register */
+#define UART_LSR 0x1C /* Line Status Register */
+#define UART_MSR 0x20 /* Modem Status Register */
+#define UART_CLK 0x28 /* Baud Rate Clock Divider */
+#define UART_MOD_CNTRL 0x100 /* Module Control */
+
+#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */
+#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
+#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
+#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */
+#define UART_FCR_TRIGGER_MASK 0xF0 /* Mask for the FIFO trigger range */
+#define UART_FCR_R_TRIGGER_1 0x00 /* Mask for receive trigger set at 1 */
+#define UART_FCR_R_TRIGGER_4 0x40 /* Mask for receive trigger set at 4 */
+#define UART_FCR_R_TRIGGER_8 0x80 /* Mask for receive trigger set at 8 */
+#define UART_FCR_R_TRIGGER_14 0xA0 /* Mask for receive trigger set at 14 */
+#define UART_FCR_T_TRIGGER_0 0x00 /* Mask for transmit trigger set at 0 */
+#define UART_FCR_T_TRIGGER_4 0x10 /* Mask for transmit trigger set at 4 */
+#define UART_FCR_T_TRIGGER_8 0x20 /* Mask for transmit trigger set at 8 */
+#define UART_FCR_T_TRIGGER_12 0x30 /* Mask for transmit trigger set at 12 */
+
+/*
+ * These are the definitions for the Line Control Register
+ */
+#define UART_LCR_SBC 0x40 /* Set break control */
+#define UART_LCR_SPAR 0x20 /* Stick parity (?) */
+#define UART_LCR_EPAR 0x10 /* Even parity select */
+#define UART_LCR_PARITY 0x08 /* Parity Enable */
+#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */
+#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */
+#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */
+#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */
+#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
+
+/*
+ * These are the definitions for the Line Status Register
+ */
+#define UART_LSR_TEMT 0x40 /* Transmitter empty */
+#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
+#define UART_LSR_BI 0x10 /* Break interrupt indicator */
+#define UART_LSR_FE 0x08 /* Frame error indicator */
+#define UART_LSR_PE 0x04 /* Parity error indicator */
+#define UART_LSR_OE 0x02 /* Overrun error indicator */
+#define UART_LSR_DR 0x01 /* Receiver data ready */
+
+/*
+ * These are the definitions for the Interrupt Identification Register
+ */
+#define UART_IIR_NO_INT 0x01 /* No interrupts pending */
+#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */
+#define UART_IIR_MSI 0x00 /* Modem status interrupt */
+#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */
+#define UART_IIR_RDI 0x04 /* Receiver data interrupt */
+#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
+
+/*
+ * These are the definitions for the Interrupt Enable Register
+ */
+#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
+#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
+#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
+#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
+
+/*
+ * These are the definitions for the Modem Control Register
+ */
+#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */
+#define UART_MCR_OUT2 0x08 /* Out2 complement */
+#define UART_MCR_OUT1 0x04 /* Out1 complement */
+#define UART_MCR_RTS 0x02 /* RTS complement */
+#define UART_MCR_DTR 0x01 /* DTR complement */
+
+/*
+ * These are the definitions for the Modem Status Register
+ */
+#define UART_MSR_DCD 0x80 /* Data Carrier Detect */
+#define UART_MSR_RI 0x40 /* Ring Indicator */
+#define UART_MSR_DSR 0x20 /* Data Set Ready */
+#define UART_MSR_CTS 0x10 /* Clear to Send */
+#define UART_MSR_DDCD 0x08 /* Delta DCD */
+#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */
+#define UART_MSR_DDSR 0x02 /* Delta DSR */
+#define UART_MSR_DCTS 0x01 /* Delta CTS */
+#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */
+
+
+
+/* SSIO */
+#define SSI0_STATUS 0xB1600000
+ #define SSI_STATUS_BF (1<<4)
+ #define SSI_STATUS_OF (1<<3)
+ #define SSI_STATUS_UF (1<<2)
+ #define SSI_STATUS_D (1<<1)
+ #define SSI_STATUS_B (1<<0)
+#define SSI0_INT 0xB1600004
+ #define SSI_INT_OI (1<<3)
+ #define SSI_INT_UI (1<<2)
+ #define SSI_INT_DI (1<<1)
+#define SSI0_INT_ENABLE 0xB1600008
+ #define SSI_INTE_OIE (1<<3)
+ #define SSI_INTE_UIE (1<<2)
+ #define SSI_INTE_DIE (1<<1)
+#define SSI0_CONFIG 0xB1600020
+ #define SSI_CONFIG_AO (1<<24)
+ #define SSI_CONFIG_DO (1<<23)
+ #define SSI_CONFIG_ALEN_BIT 20
+ #define SSI_CONFIG_ALEN_MASK (0x7<<20)
+ #define SSI_CONFIG_DLEN_BIT 16
+ #define SSI_CONFIG_DLEN_MASK (0x7<<16)
+ #define SSI_CONFIG_DD (1<<11)
+ #define SSI_CONFIG_AD (1<<10)
+ #define SSI_CONFIG_BM_BIT 8
+ #define SSI_CONFIG_BM_MASK (0x3<<8)
+ #define SSI_CONFIG_CE (1<<7)
+ #define SSI_CONFIG_DP (1<<6)
+ #define SSI_CONFIG_DL (1<<5)
+ #define SSI_CONFIG_EP (1<<4)
+#define SSI0_ADATA 0xB1600024
+ #define SSI_AD_D (1<<24)
+ #define SSI_AD_ADDR_BIT 16
+ #define SSI_AD_ADDR_MASK (0xff<<16)
+ #define SSI_AD_DATA_BIT 0
+ #define SSI_AD_DATA_MASK (0xfff<<0)
+#define SSI0_CLKDIV 0xB1600028
+#define SSI0_CONTROL 0xB1600100
+ #define SSI_CONTROL_CD (1<<1)
+ #define SSI_CONTROL_E (1<<0)
+
+/* SSI1 */
+#define SSI1_STATUS 0xB1680000
+#define SSI1_INT 0xB1680004
+#define SSI1_INT_ENABLE 0xB1680008
+#define SSI1_CONFIG 0xB1680020
+#define SSI1_ADATA 0xB1680024
+#define SSI1_CLKDIV 0xB1680028
+#define SSI1_ENABLE 0xB1680100
+
+/*
+ * Register content definitions
+ */
+#define SSI_STATUS_BF (1<<4)
+#define SSI_STATUS_OF (1<<3)
+#define SSI_STATUS_UF (1<<2)
+#define SSI_STATUS_D (1<<1)
+#define SSI_STATUS_B (1<<0)
+
+/* SSI_INT */
+#define SSI_INT_OI (1<<3)
+#define SSI_INT_UI (1<<2)
+#define SSI_INT_DI (1<<1)
+
+/* SSI_INTEN */
+#define SSI_INTEN_OIE (1<<3)
+#define SSI_INTEN_UIE (1<<2)
+#define SSI_INTEN_DIE (1<<1)
+
+#define SSI_CONFIG_AO (1<<24)
+#define SSI_CONFIG_DO (1<<23)
+#define SSI_CONFIG_ALEN (7<<20)
+#define SSI_CONFIG_DLEN (15<<16)
+#define SSI_CONFIG_DD (1<<11)
+#define SSI_CONFIG_AD (1<<10)
+#define SSI_CONFIG_BM (3<<8)
+#define SSI_CONFIG_CE (1<<7)
+#define SSI_CONFIG_DP (1<<6)
+#define SSI_CONFIG_DL (1<<5)
+#define SSI_CONFIG_EP (1<<4)
+#define SSI_CONFIG_ALEN_N(N) ((N-1)<<20)
+#define SSI_CONFIG_DLEN_N(N) ((N-1)<<16)
+#define SSI_CONFIG_BM_HI (0<<8)
+#define SSI_CONFIG_BM_LO (1<<8)
+#define SSI_CONFIG_BM_CY (2<<8)
+
+#define SSI_ADATA_D (1<<24)
+#define SSI_ADATA_ADDR (0xFF<<16)
+#define SSI_ADATA_DATA (0x0FFF)
+#define SSI_ADATA_ADDR_N(N) (N<<16)
+
+#define SSI_ENABLE_CD (1<<1)
+#define SSI_ENABLE_E (1<<0)
+
+
+/* IrDA Controller */
+#define IRDA_BASE 0xB0300000
+#define IR_RING_PTR_STATUS (IRDA_BASE+0x00)
+#define IR_RING_BASE_ADDR_H (IRDA_BASE+0x04)
+#define IR_RING_BASE_ADDR_L (IRDA_BASE+0x08)
+#define IR_RING_SIZE (IRDA_BASE+0x0C)
+#define IR_RING_PROMPT (IRDA_BASE+0x10)
+#define IR_RING_ADDR_CMPR (IRDA_BASE+0x14)
+#define IR_INT_CLEAR (IRDA_BASE+0x18)
+#define IR_CONFIG_1 (IRDA_BASE+0x20)
+ #define IR_RX_INVERT_LED (1<<0)
+ #define IR_TX_INVERT_LED (1<<1)
+ #define IR_ST (1<<2)
+ #define IR_SF (1<<3)
+ #define IR_SIR (1<<4)
+ #define IR_MIR (1<<5)
+ #define IR_FIR (1<<6)
+ #define IR_16CRC (1<<7)
+ #define IR_TD (1<<8)
+ #define IR_RX_ALL (1<<9)
+ #define IR_DMA_ENABLE (1<<10)
+ #define IR_RX_ENABLE (1<<11)
+ #define IR_TX_ENABLE (1<<12)
+ #define IR_LOOPBACK (1<<14)
+ #define IR_SIR_MODE (IR_SIR | IR_DMA_ENABLE | \
+ IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC)
+#define IR_SIR_FLAGS (IRDA_BASE+0x24)
+#define IR_ENABLE (IRDA_BASE+0x28)
+ #define IR_RX_STATUS (1<<9)
+ #define IR_TX_STATUS (1<<10)
+#define IR_READ_PHY_CONFIG (IRDA_BASE+0x2C)
+#define IR_WRITE_PHY_CONFIG (IRDA_BASE+0x30)
+#define IR_MAX_PKT_LEN (IRDA_BASE+0x34)
+#define IR_RX_BYTE_CNT (IRDA_BASE+0x38)
+#define IR_CONFIG_2 (IRDA_BASE+0x3C)
+ #define IR_MODE_INV (1<<0)
+ #define IR_ONE_PIN (1<<1)
+#define IR_INTERFACE_CONFIG (IRDA_BASE+0x40)
+
+/* GPIO */
+#define SYS_PINFUNC 0xB190002C
+ #define SYS_PF_USB (1<<15) /* 2nd USB device/host */
+ #define SYS_PF_U3 (1<<14) /* GPIO23/U3TXD */
+ #define SYS_PF_U2 (1<<13) /* GPIO22/U2TXD */
+ #define SYS_PF_U1 (1<<12) /* GPIO21/U1TXD */
+ #define SYS_PF_SRC (1<<11) /* GPIO6/SROMCKE */
+ #define SYS_PF_CK5 (1<<10) /* GPIO3/CLK5 */
+ #define SYS_PF_CK4 (1<<9) /* GPIO2/CLK4 */
+ #define SYS_PF_IRF (1<<8) /* GPIO15/IRFIRSEL */
+ #define SYS_PF_UR3 (1<<7) /* GPIO[14:9]/UART3 */
+ #define SYS_PF_I2D (1<<6) /* GPIO8/I2SDI */
+ #define SYS_PF_I2S (1<<5) /* I2S/GPIO[29:31] */
+ #define SYS_PF_NI2 (1<<4) /* NI2/GPIO[24:28] */
+ #define SYS_PF_U0 (1<<3) /* U0TXD/GPIO20 */
+ #define SYS_PF_RD (1<<2) /* IRTXD/GPIO19 */
+ #define SYS_PF_A97 (1<<1) /* AC97/SSL1 */
+ #define SYS_PF_S0 (1<<0) /* SSI_0/GPIO[16:18] */
+
+/* Au1100 Only */
+ #define SYS_PF_PC (1<<18) /* PCMCIA/GPIO[207:204] */
+ #define SYS_PF_LCD (1<<17) /* extern lcd/GPIO[203:200] */
+ #define SYS_PF_CS (1<<16) /* EXTCLK0/32khz to gpio2 */
+ #define SYS_PF_EX0 (1<<9) /* gpio2/clock */
+
+#define SYS_TRIOUTRD 0xB1900100
+#define SYS_TRIOUTCLR 0xB1900100
+#define SYS_OUTPUTRD 0xB1900108
+#define SYS_OUTPUTSET 0xB1900108
+#define SYS_OUTPUTCLR 0xB190010C
+#define SYS_PINSTATERD 0xB1900110
+#define SYS_PININPUTEN 0xB1900110
+
+/* GPIO2, Au1500 only */
+#define GPIO2_BASE 0xB1700000
+#define GPIO2_DIR (GPIO2_BASE + 0)
+#define GPIO2_OUTPUT (GPIO2_BASE + 8)
+#define GPIO2_PINSTATE (GPIO2_BASE + 0xC)
+#define GPIO2_INTENABLE (GPIO2_BASE + 0x10)
+#define GPIO2_ENABLE (GPIO2_BASE + 0x14)
+
+/* Power Management */
+#define SYS_SCRATCH0 0xB1900018
+#define SYS_SCRATCH1 0xB190001C
+#define SYS_WAKEMSK 0xB1900034
+#define SYS_ENDIAN 0xB1900038
+#define SYS_POWERCTRL 0xB190003C
+#define SYS_WAKESRC 0xB190005C
+#define SYS_SLPPWR 0xB1900078
+#define SYS_SLEEP 0xB190007C
+
+/* Clock Controller */
+#define SYS_FREQCTRL0 0xB1900020
+ #define SYS_FC_FRDIV2_BIT 22
+ #define SYS_FC_FRDIV2_MASK (0xff << SYS_FC_FRDIV2_BIT)
+ #define SYS_FC_FE2 (1<<21)
+ #define SYS_FC_FS2 (1<<20)
+ #define SYS_FC_FRDIV1_BIT 12
+ #define SYS_FC_FRDIV1_MASK (0xff << SYS_FC_FRDIV1_BIT)
+ #define SYS_FC_FE1 (1<<11)
+ #define SYS_FC_FS1 (1<<10)
+ #define SYS_FC_FRDIV0_BIT 2
+ #define SYS_FC_FRDIV0_MASK (0xff << SYS_FC_FRDIV0_BIT)
+ #define SYS_FC_FE0 (1<<1)
+ #define SYS_FC_FS0 (1<<0)
+#define SYS_FREQCTRL1 0xB1900024
+ #define SYS_FC_FRDIV5_BIT 22
+ #define SYS_FC_FRDIV5_MASK (0xff << SYS_FC_FRDIV5_BIT)
+ #define SYS_FC_FE5 (1<<21)
+ #define SYS_FC_FS5 (1<<20)
+ #define SYS_FC_FRDIV4_BIT 12
+ #define SYS_FC_FRDIV4_MASK (0xff << SYS_FC_FRDIV4_BIT)
+ #define SYS_FC_FE4 (1<<11)
+ #define SYS_FC_FS4 (1<<10)
+ #define SYS_FC_FRDIV3_BIT 2
+ #define SYS_FC_FRDIV3_MASK (0xff << SYS_FC_FRDIV3_BIT)
+ #define SYS_FC_FE3 (1<<1)
+ #define SYS_FC_FS3 (1<<0)
+#define SYS_CLKSRC 0xB1900028
+ #define SYS_CS_ME1_BIT 27
+ #define SYS_CS_ME1_MASK (0x7<<SYS_CS_ME1_BIT)
+ #define SYS_CS_DE1 (1<<26)
+ #define SYS_CS_CE1 (1<<25)
+ #define SYS_CS_ME0_BIT 22
+ #define SYS_CS_ME0_MASK (0x7<<SYS_CS_ME0_BIT)
+ #define SYS_CS_DE0 (1<<21)
+ #define SYS_CS_CE0 (1<<20)
+ #define SYS_CS_MI2_BIT 17
+ #define SYS_CS_MI2_MASK (0x7<<SYS_CS_MI2_BIT)
+ #define SYS_CS_DI2 (1<<16)
+ #define SYS_CS_CI2 (1<<15)
+ #define SYS_CS_MUH_BIT 12
+ #define SYS_CS_MUH_MASK (0x7<<SYS_CS_MUH_BIT)
+ #define SYS_CS_DUH (1<<11)
+ #define SYS_CS_CUH (1<<10)
+ #define SYS_CS_MUD_BIT 7
+ #define SYS_CS_MUD_MASK (0x7<<SYS_CS_MUD_BIT)
+ #define SYS_CS_DUD (1<<6)
+ #define SYS_CS_CUD (1<<5)
+ #define SYS_CS_MIR_BIT 2
+ #define SYS_CS_MIR_MASK (0x7<<SYS_CS_MIR_BIT)
+ #define SYS_CS_DIR (1<<1)
+ #define SYS_CS_CIR (1<<0)
+
+ #define SYS_CS_MUX_AUX 0x1
+ #define SYS_CS_MUX_FQ0 0x2
+ #define SYS_CS_MUX_FQ1 0x3
+ #define SYS_CS_MUX_FQ2 0x4
+ #define SYS_CS_MUX_FQ3 0x5
+ #define SYS_CS_MUX_FQ4 0x6
+ #define SYS_CS_MUX_FQ5 0x7
+#define SYS_CPUPLL 0xB1900060
+#define SYS_AUXPLL 0xB1900064
+
+/* AC97 Controller */
+#define AC97C_CONFIG 0xB0000000
+ #define AC97C_RECV_SLOTS_BIT 13
+ #define AC97C_RECV_SLOTS_MASK (0x3ff << AC97C_RECV_SLOTS_BIT)
+ #define AC97C_XMIT_SLOTS_BIT 3
+ #define AC97C_XMIT_SLOTS_MASK (0x3ff << AC97C_XMIT_SLOTS_BIT)
+ #define AC97C_SG (1<<2)
+ #define AC97C_SYNC (1<<1)
+ #define AC97C_RESET (1<<0)
+#define AC97C_STATUS 0xB0000004
+ #define AC97C_XU (1<<11)
+ #define AC97C_XO (1<<10)
+ #define AC97C_RU (1<<9)
+ #define AC97C_RO (1<<8)
+ #define AC97C_READY (1<<7)
+ #define AC97C_CP (1<<6)
+ #define AC97C_TR (1<<5)
+ #define AC97C_TE (1<<4)
+ #define AC97C_TF (1<<3)
+ #define AC97C_RR (1<<2)
+ #define AC97C_RE (1<<1)
+ #define AC97C_RF (1<<0)
+#define AC97C_DATA 0xB0000008
+#define AC97C_CMD 0xB000000C
+ #define AC97C_WD_BIT 16
+ #define AC97C_READ (1<<7)
+ #define AC97C_INDEX_MASK 0x7f
+#define AC97C_CNTRL 0xB0000010
+ #define AC97C_RS (1<<1)
+ #define AC97C_CE (1<<0)
+
+#if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
+/* Au1500 PCI Controller */
+#define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr
+#define Au1500_PCI_CMEM (Au1500_CFG_BASE + 0)
+#define Au1500_PCI_CFG (Au1500_CFG_BASE + 4)
+ #define PCI_ERROR ((1<<22) | (1<<23) | (1<<24) | (1<<25) | (1<<26) | (1<<27))
+#define Au1500_PCI_B2BMASK_CCH (Au1500_CFG_BASE + 8)
+#define Au1500_PCI_B2B0_VID (Au1500_CFG_BASE + 0xC)
+#define Au1500_PCI_B2B1_ID (Au1500_CFG_BASE + 0x10)
+#define Au1500_PCI_MWMASK_DEV (Au1500_CFG_BASE + 0x14)
+#define Au1500_PCI_MWBASE_REV_CCL (Au1500_CFG_BASE + 0x18)
+#define Au1500_PCI_ERR_ADDR (Au1500_CFG_BASE + 0x1C)
+#define Au1500_PCI_SPEC_INTACK (Au1500_CFG_BASE + 0x20)
+#define Au1500_PCI_ID (Au1500_CFG_BASE + 0x100)
+#define Au1500_PCI_STATCMD (Au1500_CFG_BASE + 0x104)
+#define Au1500_PCI_CLASSREV (Au1500_CFG_BASE + 0x108)
+#define Au1500_PCI_HDRTYPE (Au1500_CFG_BASE + 0x10C)
+#define Au1500_PCI_MBAR (Au1500_CFG_BASE + 0x110)
+
+#define Au1500_PCI_HDR 0xB4005100 // virtual, kseg0 addr
+
+/* All of our structures, like pci resource, have 32 bit members.
+ * Drivers are expected to do an ioremap on the PCI MEM resource, but it's
+ * hard to store 0x4 0000 0000 in a 32 bit type. We require a small patch
+ * to __ioremap to check for addresses between (u32)Au1500_PCI_MEM_START and
+ * (u32)Au1500_PCI_MEM_END and change those to the full 36 bit PCI MEM
+ * addresses. For PCI IO, it's simpler because we get to do the ioremap
+ * ourselves and then adjust the device's resources.
+ */
+#define Au1500_EXT_CFG 0x600000000
+#define Au1500_EXT_CFG_TYPE1 0x680000000
+#define Au1500_PCI_IO_START 0x500000000
+#define Au1500_PCI_IO_END 0x5000FFFFF
+#define Au1500_PCI_MEM_START 0x440000000
+#define Au1500_PCI_MEM_END 0x44FFFFFFF
+
+#define PCI_IO_START (Au1500_PCI_IO_START + 0x300)
+#define PCI_IO_END (Au1500_PCI_IO_END)
+#define PCI_MEM_START (Au1500_PCI_MEM_START)
+#define PCI_MEM_END (Au1500_PCI_MEM_END)
+#define PCI_FIRST_DEVFN (0<<3)
+#define PCI_LAST_DEVFN (19<<3)
+
+#define IOPORT_RESOURCE_START 0x00000000
+#define IOPORT_RESOURCE_END 0xffffffff
+#define IOMEM_RESOURCE_START 0x10000000
+#define IOMEM_RESOURCE_END 0xffffffff
+
+#else /* Au1000 and Au1100 */
+
+/* don't allow any legacy ports probing */
+#define IOPORT_RESOURCE_START 0x10000000;
+#define IOPORT_RESOURCE_END 0xffffffff
+#define IOMEM_RESOURCE_START 0x10000000
+#define IOMEM_RESOURCE_END 0xffffffff
+
+#ifdef CONFIG_MIPS_PB1000
+#define PCI_IO_START 0x10000000
+#define PCI_IO_END 0x1000ffff
+#define PCI_MEM_START 0x18000000
+#define PCI_MEM_END 0x18ffffff
+#define PCI_FIRST_DEVFN 0
+#define PCI_LAST_DEVFN 1
+#else
+/* no PCI bus controller */
+#define PCI_IO_START 0
+#define PCI_IO_END 0
+#define PCI_MEM_START 0
+#define PCI_MEM_END 0
+#define PCI_FIRST_DEVFN 0
+#define PCI_LAST_DEVFN 0
+#endif
+
+#endif
+
+#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
+#define NUM_ETH_INTERFACES 2
+#elif defined(CONFIG_SOC_AU1100)
+#define NUM_ETH_INTERFACES 1
+#endif
+
+#endif
diff -puN /dev/null include/asm-mips/mach-au1x00/au1000_pcmcia.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-au1x00/au1000_pcmcia.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,107 @@
+/*
+ * Alchemy Semi Au1000 pcmcia driver include file
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ */
+#ifndef __ASM_AU1000_PCMCIA_H
+#define __ASM_AU1000_PCMCIA_H
+
+#include <linux/config.h>
+
+#define AU1000_PCMCIA_POLL_PERIOD (2*HZ)
+#define AU1000_PCMCIA_IO_SPEED (255)
+#define AU1000_PCMCIA_MEM_SPEED (300)
+
+#define AU1X_SOCK0_IO 0xF00000000
+#define AU1X_SOCK0_PHYS_ATTR 0xF40000000
+#define AU1X_SOCK0_PHYS_MEM 0xF80000000
+
+/* pcmcia socket 1 needs external glue logic so the memory map
+ * differs from board to board.
+ */
+#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500)
+#define AU1X_SOCK1_IO 0xF08000000
+#define AU1X_SOCK1_PHYS_ATTR 0xF48000000
+#define AU1X_SOCK1_PHYS_MEM 0xF88000000
+#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500)
+#define AU1X_SOCK1_IO 0xF04000000
+#define AU1X_SOCK1_PHYS_ATTR 0xF44000000
+#define AU1X_SOCK1_PHYS_MEM 0xF84000000
+#endif
+
+struct pcmcia_state {
+ unsigned detect: 1,
+ ready: 1,
+ wrprot: 1,
+ bvd1: 1,
+ bvd2: 1,
+ vs_3v: 1,
+ vs_Xv: 1;
+};
+
+struct pcmcia_configure {
+ unsigned sock: 8,
+ vcc: 8,
+ vpp: 8,
+ output: 1,
+ speaker: 1,
+ reset: 1;
+};
+
+struct pcmcia_irq_info {
+ unsigned int sock;
+ unsigned int irq;
+};
+
+
+struct au1000_pcmcia_socket {
+ socket_state_t cs_state;
+ struct pcmcia_state k_state;
+ unsigned int irq;
+ void (*handler)(void *, unsigned int);
+ void *handler_info;
+ pccard_io_map io_map[MAX_IO_WIN];
+ pccard_mem_map mem_map[MAX_WIN];
+ u32 virt_io;
+ ioaddr_t phys_attr, phys_mem;
+ unsigned short speed_io, speed_attr, speed_mem;
+};
+
+struct pcmcia_init {
+ void (*handler)(int irq, void *dev, struct pt_regs *regs);
+};
+
+struct pcmcia_low_level {
+ int (*init)(struct pcmcia_init *);
+ int (*shutdown)(void);
+ int (*socket_state)(unsigned sock, struct pcmcia_state *);
+ int (*get_irq_info)(struct pcmcia_irq_info *);
+ int (*configure_socket)(const struct pcmcia_configure *);
+};
+
+#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500)
+extern struct pcmcia_low_level pb1x00_pcmcia_ops;
+#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500)
+extern struct pcmcia_low_level db1x00_pcmcia_ops;
+#elif defined(CONFIG_MIPS_XXS1500)
+extern struct pcmcia_low_level xxs1500_pcmcia_ops;
+#else
+error unknown Au1000 board
+#endif
+
+#endif /* __ASM_AU1000_PCMCIA_H */
diff -puN /dev/null include/asm-mips/mach-au1x00/au1000_usbdev.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-au1x00/au1000_usbdev.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,73 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Au1000 USB Device-Side Driver
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * stevel@mvista.com or source@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#define USBDEV_REV 0x0110 // BCD
+#define USBDEV_EP0_MAX_PACKET_SIZE 64
+
+typedef enum {
+ ATTACHED = 0,
+ POWERED,
+ DEFAULT,
+ ADDRESS,
+ CONFIGURED
+} usbdev_state_t;
+
+typedef enum {
+ CB_NEW_STATE = 0,
+ CB_PKT_COMPLETE
+} usbdev_cb_type_t;
+
+
+typedef struct usbdev_pkt {
+ int ep_addr; // ep addr this packet routed to
+ int size; // size of payload in bytes
+ unsigned status; // packet status
+ struct usbdev_pkt* next; // function layer can't touch this
+ u8 payload[0]; // the payload
+} usbdev_pkt_t;
+
+#define PKT_STATUS_ACK (1<<0)
+#define PKT_STATUS_NAK (1<<1)
+#define PKT_STATUS_SU (1<<2)
+
+extern int usbdev_init(struct usb_device_descriptor* dev_desc,
+ struct usb_config_descriptor* config_desc,
+ struct usb_interface_descriptor* if_desc,
+ struct usb_endpoint_descriptor* ep_desc,
+ struct usb_string_descriptor* str_desc[],
+ void (*cb)(usbdev_cb_type_t, unsigned long, void *),
+ void* cb_data);
+
+extern void usbdev_exit(void);
+
+extern int usbdev_alloc_packet (int ep_addr, int data_size,
+ usbdev_pkt_t** pkt);
+extern int usbdev_send_packet (int ep_addr, usbdev_pkt_t* pkt);
+extern int usbdev_receive_packet(int ep_addr, usbdev_pkt_t** pkt);
+extern int usbdev_get_byte_count(int ep_addr);
diff -puN /dev/null include/asm-mips/mach-au1x00/timex.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-au1x00/timex.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,13 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_AU1X00_TIMEX_H
+#define __ASM_MACH_AU1X00_TIMEX_H
+
+#define CLOCK_TICK_RATE ((HZ * 100000UL) / 2)
+
+#endif /* __ASM_MACH_AU1X00_TIMEX_H */
diff -puN /dev/null include/asm-mips/mach-db1x00/db1x00.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-db1x00/db1x00.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,125 @@
+/*
+ * AMD Alchemy DB1x00 Reference Boards
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * ########################################################################
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ *
+ */
+#ifndef __ASM_DB1X00_H
+#define __ASM_DB1X00_H
+
+
+/*
+ * Overlay data structure of the Db1x00 board registers.
+ * Registers located at physical 1E0000xx, KSEG1 0xAE0000xx
+ */
+typedef volatile struct
+{
+ /*00*/ unsigned long whoami;
+ /*04*/ unsigned long status;
+ /*08*/ unsigned long switches;
+ /*0C*/ unsigned long resets;
+ /*10*/ unsigned long pcmcia;
+ /*14*/ unsigned long specific;
+ /*18*/ unsigned long leds;
+ /*1C*/ unsigned long swreset;
+
+} BCSR;
+
+
+/*
+ * Register/mask bit definitions for the BCSRs
+ */
+#define BCSR_WHOAMI_DCID 0x000F
+#define BCSR_WHOAMI_CPLD 0x00F0
+#define BCSR_WHOAMI_BOARD 0x0F00
+
+#define BCSR_STATUS_PC0VS 0x0003
+#define BCSR_STATUS_PC1VS 0x000C
+#define BCSR_STATUS_PC0FI 0x0010
+#define BCSR_STATUS_PC1FI 0x0020
+#define BCSR_STATUS_FLASHBUSY 0x0100
+#define BCSR_STATUS_ROMBUSY 0x0400
+#define BCSR_STATUS_SWAPBOOT 0x2000
+#define BCSR_STATUS_FLASHDEN 0xC000
+
+#define BCSR_SWITCHES_DIP 0x00FF
+#define BCSR_SWITCHES_DIP_1 0x0080
+#define BCSR_SWITCHES_DIP_2 0x0040
+#define BCSR_SWITCHES_DIP_3 0x0020
+#define BCSR_SWITCHES_DIP_4 0x0010
+#define BCSR_SWITCHES_DIP_5 0x0008
+#define BCSR_SWITCHES_DIP_6 0x0004
+#define BCSR_SWITCHES_DIP_7 0x0002
+#define BCSR_SWITCHES_DIP_8 0x0001
+#define BCSR_SWITCHES_ROTARY 0x0F00
+
+#define BCSR_RESETS_PHY0 0x0001
+#define BCSR_RESETS_PHY1 0x0002
+#define BCSR_RESETS_DC 0x0004
+#define BCSR_RESETS_FIR_SEL 0x2000
+#define BCSR_RESETS_IRDA_MODE_MASK 0xC000
+#define BCSR_RESETS_IRDA_MODE_FULL 0x0000
+#define BCSR_RESETS_IRDA_MODE_OFF 0x4000
+#define BCSR_RESETS_IRDA_MODE_2_3 0x8000
+#define BCSR_RESETS_IRDA_MODE_1_3 0xC000
+
+#define BCSR_PCMCIA_PC0VPP 0x0003
+#define BCSR_PCMCIA_PC0VCC 0x000C
+#define BCSR_PCMCIA_PC0DRVEN 0x0010
+#define BCSR_PCMCIA_PC0RST 0x0080
+#define BCSR_PCMCIA_PC1VPP 0x0300
+#define BCSR_PCMCIA_PC1VCC 0x0C00
+#define BCSR_PCMCIA_PC1DRVEN 0x1000
+#define BCSR_PCMCIA_PC1RST 0x8000
+
+#define BCSR_BOARD_PCIM66EN 0x0001
+#define BCSR_BOARD_PCIM33 0x0100
+#define BCSR_BOARD_GPIO200RST 0x0400
+#define BCSR_BOARD_PCICFG 0x1000
+
+#define BCSR_LEDS_DECIMALS 0x0003
+#define BCSR_LEDS_LED0 0x0100
+#define BCSR_LEDS_LED1 0x0200
+#define BCSR_LEDS_LED2 0x0400
+#define BCSR_LEDS_LED3 0x0800
+
+#define BCSR_SWRESET_RESET 0x0080
+
+/* PCMCIA Db1x00 specific defines */
+#define PCMCIA_MAX_SOCK 1
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
+
+/* VPP/VCC */
+#define SET_VCC_VPP(VCC, VPP, SLOT)\
+ ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
+
+/* MTD CONFIG OPTIONS */
+#if defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
+#define DB1X00_BOTH_BANKS
+#elif defined(CONFIG_MTD_DB1X00_BOOT) && !defined(CONFIG_MTD_DB1X00_USER)
+#define DB1X00_BOOT_ONLY
+#elif !defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
+#define DB1X00_USER_ONLY
+#endif
+
+#endif /* __ASM_DB1X00_H */
diff -puN /dev/null include/asm-mips/mach-ddb5074/mc146818rtc.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ddb5074/mc146818rtc.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,31 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998, 2001, 03 by Ralf Baechle
+ *
+ * RTC routines for PC style attached Dallas chip.
+ */
+#ifndef __ASM_MACH_DDB5074_MC146818RTC_H
+#define __ASM_MACH_DDB5074_MC146818RTC_H
+
+#include <asm/ddb5xxx/ddb5074.h>
+#include <asm/ddb5xxx/ddb5xxx.h>
+
+#define RTC_PORT(x) (0x70 + (x))
+#define RTC_IRQ 8
+
+static inline unsigned char CMOS_READ(unsigned long addr)
+{
+ return *(volatile unsigned char *)(KSEG1ADDR(DDB_PCI_MEM_BASE)+addr);
+}
+
+static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
+{
+ *(volatile unsigned char *)(KSEG1ADDR(DDB_PCI_MEM_BASE)+addr) = data;
+}
+
+#define RTC_ALWAYS_BCD 1
+
+#endif /* __ASM_MACH_DDB5074_MC146818RTC_H */
diff -puN /dev/null include/asm-mips/mach-dec/mc146818rtc.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-dec/mc146818rtc.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,46 @@
+/*
+ * RTC definitions for DECstation style attached Dallas DS1287 chip.
+ *
+ * Copyright (C) 1998, 2001 by Ralf Baechle
+ * Copyright (C) 1998 by Harald Koerfgen
+ * Copyright (C) 2002 Maciej W. Rozycki
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef __ASM_MIPS_DEC_RTC_DEC_H
+#define __ASM_MIPS_DEC_RTC_DEC_H
+
+#include <linux/types.h>
+
+#include <asm/addrspace.h>
+
+extern volatile u8 *dec_rtc_base;
+extern unsigned long dec_kn_slot_size;
+
+#define RTC_PORT(x) CPHYSADDR(dec_rtc_base)
+#define RTC_IO_EXTENT dec_kn_slot_size
+#define RTC_IOMAPPED 0
+#define RTC_IRQ 0
+
+#define RTC_DEC_YEAR 0x3f /* Where we store the real year on DECs. */
+
+#include <linux/mc146818rtc.h>
+#include <linux/module.h>
+#include <linux/types.h>
+
+static inline unsigned char CMOS_READ(unsigned long addr)
+{
+ return dec_rtc_base[addr * 4];
+}
+
+static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
+{
+ dec_rtc_base[addr * 4] = data;
+}
+
+#define RTC_ALWAYS_BCD 0
+
+#endif /* __ASM_MIPS_DEC_RTC_DEC_H */
diff -puN /dev/null include/asm-mips/mach-dec/param.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-dec/param.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,18 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_DEC_PARAM_H
+#define __ASM_MACH_DEC_PARAM_H
+
+/*
+ * log2(HZ), change this here if you want another HZ value. This is also
+ * used in dec_time_init. Minimum is 1, Maximum is 15.
+ */
+#define LOG_2_HZ 7
+#define HZ (1 << LOG_2_HZ)
+
+#endif /* __ASM_MACH_DEC_PARAM_H */
diff -puN /dev/null include/asm-mips/mach-ev64120/mach-gt64120.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ev64120/mach-gt64120.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,61 @@
+/*
+ * This is a direct copy of the ev96100.h file, with a global
+ * search and replace. The numbers are the same.
+ *
+ * The reason I'm duplicating this is so that the 64120/96100
+ * defines won't be confusing in the source code.
+ */
+#ifndef __ASM_GALILEO_BOARDS_MIPS_EV64120_H
+#define __ASM_GALILEO_BOARDS_MIPS_EV64120_H
+
+/*
+ * GT64120 config space base address
+ */
+extern unsigned long gt64120_base;
+
+#define GT64120_BASE (gt64120_base)
+
+/*
+ * PCI Bus allocation
+ */
+#define GT_PCI_MEM_BASE 0x12000000UL
+#define GT_PCI_MEM_SIZE 0x02000000UL
+#define GT_PCI_IO_BASE 0x10000000UL
+#define GT_PCI_IO_SIZE 0x02000000UL
+#define GT_ISA_IO_BASE PCI_IO_BASE
+
+/*
+ * Duart I/O ports.
+ */
+#define EV64120_COM1_BASE_ADDR (0x1d000000 + 0x20)
+#define EV64120_COM2_BASE_ADDR (0x1d000000 + 0x00)
+
+
+/*
+ * EV64120 interrupt controller register base.
+ */
+#define EV64120_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000))
+
+/*
+ * EV64120 UART register base.
+ */
+#define EV64120_UART0_REGS_BASE (KSEG1ADDR(EV64120_COM1_BASE_ADDR))
+#define EV64120_UART1_REGS_BASE (KSEG1ADDR(EV64120_COM2_BASE_ADDR))
+#define EV64120_BASE_BAUD ( 3686400 / 16 )
+
+/*
+ * PCI interrupts will come in on either the INTA or INTD interrups lines,
+ * which are mapped to the #2 and #5 interrupt pins of the MIPS. On our
+ * boards, they all either come in on IntD or they all come in on IntA, they
+ * aren't mixed. There can be numerous PCI interrupts, so we keep a list of the
+ * "requested" interrupt numbers and go through the list whenever we get an
+ * IntA/D.
+ *
+ * Interrupts < 8 are directly wired to the processor; PCI INTA is 8 and
+ * INTD is 11.
+ */
+#define GT_TIMER 4
+#define GT_INTA 2
+#define GT_INTD 5
+
+#endif /* __ASM_GALILEO_BOARDS_MIPS_EV64120_H */
diff -puN /dev/null include/asm-mips/mach-ev96100/mach-gt64120.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ev96100/mach-gt64120.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,46 @@
+/*
+ * This is a direct copy of the ev96100.h file, with a global
+ * search and replace. The numbers are the same.
+ *
+ * The reason I'm duplicating this is so that the 64120/96100
+ * defines won't be confusing in the source code.
+ */
+#ifndef _ASM_GT64120_EV96100_GT64120_DEP_H
+#define _ASM_GT64120_EV96100_GT64120_DEP_H
+
+/*
+ * GT96100 config space base address
+ */
+#define GT64120_BASE (KSEG1ADDR(0x14000000))
+
+/*
+ * PCI Bus allocation
+ *
+ * (Guessing ...)
+ */
+#define GT_PCI_MEM_BASE 0x12000000UL
+#define GT_PCI_MEM_SIZE 0x02000000UL
+#define GT_PCI_IO_BASE 0x10000000UL
+#define GT_PCI_IO_SIZE 0x02000000UL
+#define GT_ISA_IO_BASE PCI_IO_BASE
+
+/*
+ * Duart I/O ports.
+ */
+#define EV96100_COM1_BASE_ADDR (0xBD000000 + 0x20)
+#define EV96100_COM2_BASE_ADDR (0xBD000000 + 0x00)
+
+
+/*
+ * EV96100 interrupt controller register base.
+ */
+#define EV96100_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000))
+
+/*
+ * EV96100 UART register base.
+ */
+#define EV96100_UART0_REGS_BASE EV96100_COM1_BASE_ADDR
+#define EV96100_UART1_REGS_BASE EV96100_COM2_BASE_ADDR
+#define EV96100_BASE_BAUD ( 3686400 / 16 )
+
+#endif /* _ASM_GT64120_EV96100_GT64120_DEP_H */
diff -puN /dev/null include/asm-mips/mach-generic/cpu-feature-overrides.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-generic/cpu-feature-overrides.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,13 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Ralf Baechle
+ */
+#ifndef __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H
+
+/* Intensionally empty file ... */
+
+#endif /* __ASM_MACH_GENERIC_CPU_FEATURE_OVERRIDES_H */
diff -puN /dev/null include/asm-mips/mach-generic/floppy.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-generic/floppy.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,140 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1996, 1997, 1998, 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_GENERIC_FLOPPY_H
+#define __ASM_MACH_GENERIC_FLOPPY_H
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/linkage.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cachectl.h>
+#include <asm/dma.h>
+#include <asm/floppy.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/pgtable.h>
+
+/*
+ * How to access the FDC's registers.
+ */
+static inline unsigned char fd_inb(unsigned int port)
+{
+ return inb_p(port);
+}
+
+static inline void fd_outb(unsigned char value, unsigned int port)
+{
+ outb_p(value, port);
+}
+
+/*
+ * How to access the floppy DMA functions.
+ */
+static inline void fd_enable_dma(void)
+{
+ enable_dma(FLOPPY_DMA);
+}
+
+static inline void fd_disable_dma(void)
+{
+ disable_dma(FLOPPY_DMA);
+}
+
+static inline int fd_request_dma(void)
+{
+ return request_dma(FLOPPY_DMA, "floppy");
+}
+
+static inline void fd_free_dma(void)
+{
+ free_dma(FLOPPY_DMA);
+}
+
+static inline void fd_clear_dma_ff(void)
+{
+ clear_dma_ff(FLOPPY_DMA);
+}
+
+static inline void fd_set_dma_mode(char mode)
+{
+ set_dma_mode(FLOPPY_DMA, mode);
+}
+
+static inline void fd_set_dma_addr(char *addr)
+{
+ set_dma_addr(FLOPPY_DMA, (unsigned long) addr);
+}
+
+static inline void fd_set_dma_count(unsigned int count)
+{
+ set_dma_count(FLOPPY_DMA, count);
+}
+
+static inline int fd_get_dma_residue(void)
+{
+ return get_dma_residue(FLOPPY_DMA);
+}
+
+static inline void fd_enable_irq(void)
+{
+ enable_irq(FLOPPY_IRQ);
+}
+
+static inline void fd_disable_irq(void)
+{
+ disable_irq(FLOPPY_IRQ);
+}
+
+static inline int fd_request_irq(void)
+{
+ return request_irq(FLOPPY_IRQ, floppy_interrupt,
+ SA_INTERRUPT | SA_SAMPLE_RANDOM, "floppy", NULL);
+}
+
+static inline void fd_free_irq(void)
+{
+ free_irq(FLOPPY_IRQ, NULL);
+}
+
+#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
+
+
+static inline unsigned long fd_getfdaddr1(void)
+{
+ return 0x3f0;
+}
+
+static inline unsigned long fd_dma_mem_alloc(unsigned long size)
+{
+ unsigned long mem;
+
+ mem = __get_dma_pages(GFP_KERNEL, get_order(size));
+
+ return mem;
+}
+
+static inline void fd_dma_mem_free(unsigned long addr, unsigned long size)
+{
+ free_pages(addr, get_order(size));
+}
+
+static inline unsigned long fd_drive_type(unsigned long n)
+{
+ if (n == 0)
+ return 4; /* 3,5", 1.44mb */
+
+ return 0;
+}
+
+#endif /* __ASM_MACH_GENERIC_FLOPPY_H */
diff -puN /dev/null include/asm-mips/mach-generic/ide.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-generic/ide.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,86 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * IDE routines for typical pc-like legacy IDE configurations.
+ *
+ * Copyright (C) 1998, 1999, 2001, 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_GENERIC_IDE_H
+#define __ASM_MACH_GENERIC_IDE_H
+
+#include <linux/config.h>
+
+#ifndef MAX_HWIFS
+# ifdef CONFIG_BLK_DEV_IDEPCI
+#define MAX_HWIFS 10
+# else
+#define MAX_HWIFS 6
+# endif
+#endif
+
+static inline int ide_default_irq(unsigned long base)
+{
+ switch (base) {
+ case 0x1f0: return 14;
+ case 0x170: return 15;
+ case 0x1e8: return 11;
+ case 0x168: return 10;
+ case 0x1e0: return 8;
+ case 0x160: return 12;
+ default:
+ return 0;
+ }
+}
+
+static inline ide_ioreg_t ide_default_io_base(int index)
+{
+ switch (index) {
+ case 0: return 0x1f0;
+ case 1: return 0x170;
+ case 2: return 0x1e8;
+ case 3: return 0x168;
+ case 4: return 0x1e0;
+ case 5: return 0x160;
+ default:
+ return 0;
+ }
+}
+
+static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
+ unsigned long ctrl_port, int *irq)
+{
+ unsigned long reg = data_port;
+ int i;
+
+ for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
+ hw->io_ports[i] = reg;
+ reg += 1;
+ }
+ if (ctrl_port) {
+ hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
+ } else {
+ hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
+ }
+ if (irq != NULL)
+ *irq = 0;
+ hw->io_ports[IDE_IRQ_OFFSET] = 0;
+}
+
+static inline void ide_init_default_hwifs(void)
+{
+#ifndef CONFIG_BLK_DEV_IDEPCI
+ hw_regs_t hw;
+ int index;
+
+ for(index = 0; index < MAX_HWIFS; index++) {
+ memset(&hw, 0, sizeof hw);
+ ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL);
+ hw.irq = ide_default_irq(ide_default_io_base(index));
+ ide_register_hw(&hw, NULL);
+ }
+#endif /* CONFIG_BLK_DEV_IDEPCI */
+}
+
+#endif /* __ASM_MACH_GENERIC_IDE_H */
diff -puN /dev/null include/asm-mips/mach-generic/irq.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-generic/irq.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,13 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_GENERIC_IRQ_H
+#define __ASM_MACH_GENERIC_IRQ_H
+
+#define NR_IRQS 128
+
+#endif /* __ASM_MACH_GENERIC_IRQ_H */
diff -puN /dev/null include/asm-mips/mach-generic/mangle-port.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-generic/mangle-port.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,15 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Ralf Baechle
+ */
+#ifndef __ASM_MACH_GENERIC_MANGLE_PORT_H
+#define __ASM_MACH_GENERIC_MANGLE_PORT_H
+
+#define __swizzle_addr_b(port) (port)
+#define __swizzle_addr_w(port) (port)
+#define __swizzle_addr_l(port) (port)
+
+#endif /* __ASM_MACH_GENERIC_MANGLE_PORT_H */
diff -puN /dev/null include/asm-mips/mach-generic/mc146818rtc.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-generic/mc146818rtc.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,36 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998, 2001, 03 by Ralf Baechle
+ *
+ * RTC routines for PC style attached Dallas chip.
+ */
+#ifndef __ASM_MACH_GENERIC_MC146818RTC_H
+#define __ASM_MACH_GENERIC_MC146818RTC_H
+
+#include <asm/io.h>
+
+#define RTC_PORT(x) (0x70 + (x))
+#define RTC_IRQ 8
+
+static inline unsigned char CMOS_READ(unsigned long addr)
+{
+ outb_p(addr, RTC_PORT(0));
+ return inb_p(RTC_PORT(1));
+}
+
+static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
+{
+ outb_p(addr, RTC_PORT(0));
+ outb_p(data, RTC_PORT(1));
+}
+
+#define RTC_ALWAYS_BCD 1
+
+#ifndef mc146818_decode_year
+#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
+#endif
+
+#endif /* __ASM_MACH_GENERIC_MC146818RTC_H */
diff -puN /dev/null include/asm-mips/mach-generic/param.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-generic/param.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,13 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_GENERIC_PARAM_H
+#define __ASM_MACH_GENERIC_PARAM_H
+
+#define HZ 1000 /* Internal kernel timer frequency */
+
+#endif /* __ASM_MACH_GENERIC_PARAM_H */
diff -puN /dev/null include/asm-mips/mach-generic/spaces.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-generic/spaces.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,41 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1996, 99 Ralf Baechle
+ * Copyright (C) 2000, 2002 Maciej W. Rozycki
+ * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
+ */
+#ifndef _ASM_MACH_SPACES_H
+#define _ASM_MACH_SPACES_H
+
+#include <linux/config.h>
+
+#ifdef CONFIG_MIPS32
+
+#define CAC_BASE 0x80000000
+#define IO_BASE 0xa0000000
+#define UNCAC_BASE 0xa0000000
+#define MAP_BASE 0xc0000000
+
+#endif /* CONFIG_MIPS32 */
+
+#ifdef CONFIG_MIPS64
+
+#ifdef CONFIG_DMA_NONCOHERENT
+#define CAC_BASE 0x9800000000000000
+#else
+#define CAC_BASE 0xa800000000000000
+#endif
+#define IO_BASE 0x9000000000000000
+#define UNCAC_BASE 0x9000000000000000
+#define MAP_BASE 0xc000000000000000
+
+#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
+#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
+#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
+
+#endif /* CONFIG_MIPS64 */
+
+#endif /* _ASM_MACH_SPACES_H */
diff -puN /dev/null include/asm-mips/mach-generic/timex.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-generic/timex.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,22 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_GENERIC_TIMEX_H
+#define __ASM_MACH_GENERIC_TIMEX_H
+
+#include <linux/config.h>
+
+/*
+ * Last remaining user of the i8254 PIC, will be converted, too ...
+ */
+#ifdef CONFIG_SNI_RM200_PCI
+#define CLOCK_TICK_RATE 1193182
+#else
+#define CLOCK_TICK_RATE 500000
+#endif
+
+#endif /* __ASM_MACH_GENERIC_TIMEX_H */
diff -puN /dev/null include/asm-mips/mach-ip22/cpu-feature-overrides.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ip22/cpu-feature-overrides.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,29 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Ralf Baechle
+ */
+#ifndef __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * IP22 with a variety of processors so we can't use defaults for everything.
+ */
+#define cpu_has_mips16 0
+#define cpu_has_divec 0
+#define cpu_has_cache_cdex_p 1
+#define cpu_has_prefetch 0
+#define cpu_has_mcheck 0
+#define cpu_has_ejtag 0
+
+#define cpu_has_llsc 1
+#define cpu_has_vtag_icache 0 /* Needs to change for R8000 */
+#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
+#define cpu_has_ic_fills_f_dc 0
+
+#define cpu_has_nofpuex 0
+#define cpu_has_64bits 1
+
+#endif /* __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H */
diff -puN /dev/null include/asm-mips/mach-ip22/ds1286.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ip22/ds1286.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,18 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998, 2001, 03 by Ralf Baechle
+ *
+ * RTC routines for PC style attached Dallas chip.
+ */
+#ifndef __ASM_MACH_IP22_DS1286_H
+#define __ASM_MACH_IP22_DS1286_H
+
+#include <asm/sgi/hpc3.h>
+
+#define rtc_read(reg) (hpc3c0->rtcregs[(reg)] & 0xff)
+#define rtc_write(data, reg) do { hpc3c0->rtcregs[(reg)] = (data); } while(0)
+
+#endif /* __ASM_MACH_IP22_DS1286_H */
diff -puN /dev/null include/asm-mips/mach-ip27/cpu-feature-overrides.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ip27/cpu-feature-overrides.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,38 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Ralf Baechle
+ */
+#ifndef __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * IP27 only comes with R10000 family processors all using the same config
+ */
+#define cpu_has_watch 1
+#define cpu_has_mips16 0
+#define cpu_has_divec 0
+#define cpu_has_vce 0
+#define cpu_has_cache_cdex_p 0
+#define cpu_has_cache_cdex_s 0
+#define cpu_has_prefetch 1
+#define cpu_has_mcheck 0
+#define cpu_has_ejtag 0
+
+#define cpu_has_llsc 1
+#define cpu_has_vtag_icache 0
+#define cpu_has_dc_aliases 0
+#define cpu_has_ic_fills_f_dc 0
+
+#define cpu_has_nofpuex 0
+#define cpu_has_64bits 1
+
+#define cpu_has_subset_pcaches 1
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 64
+#define cpu_scache_line_size() 128
+
+#endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */
diff -puN /dev/null include/asm-mips/mach-ip27/irq.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ip27/irq.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,22 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1999, 2000, 01, 02, 03 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2001 Kanoj Sarcar
+ */
+#ifndef __ASM_MACH_IP27_IRQ_H
+#define __ASM_MACH_IP27_IRQ_H
+
+#include <asm/sn/arch.h>
+
+/*
+ * A hardwired interrupt number is completly stupid for this system - a
+ * large configuration might have thousands if not tenthousands of
+ * interrupts.
+ */
+#define NR_IRQS 256
+
+#endif /* __ASM_MACH_IP27_IRQ_H */
diff -puN /dev/null include/asm-mips/mach-ip27/mangle-port.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ip27/mangle-port.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,15 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Ralf Baechle
+ */
+#ifndef __ASM_MACH_IP27_MANGLE_PORT_H
+#define __ASM_MACH_IP27_MANGLE_PORT_H
+
+#define __swizzle_addr_b(port) (port)
+#define __swizzle_addr_w(port) ((port) ^ 2)
+#define __swizzle_addr_l(port) (port)
+
+#endif /* __ASM_MACH_IP27_MANGLE_PORT_H */
diff -puN /dev/null include/asm-mips/mach-ip27/mmzone.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ip27/mmzone.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,8 @@
+#ifndef _ASM_MACH_MMZONE_H
+#define _ASM_MACH_MMZONE_H
+
+#include <asm/sn/addrs.h>
+
+#define pa_to_nid(addr) NASID_TO_COMPACT_NODEID(NASID_GET(addr))
+
+#endif /* _ASM_MACH_MMZONE_H */
diff -puN /dev/null include/asm-mips/mach-ip27/spaces.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ip27/spaces.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,30 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1996, 99 Ralf Baechle
+ * Copyright (C) 2000, 2002 Maciej W. Rozycki
+ * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
+ */
+#ifndef _ASM_MACH_SPACES_H
+#define _ASM_MACH_SPACES_H
+
+/*
+ * IP27 uses the R10000's uncached attribute feature. Attribute 3 selects
+ * uncached memory addressing.
+ */
+#define CAC_BASE 0xa800000000000000
+
+#define HSPEC_BASE 0x9000000000000000
+#define IO_BASE 0x9200000000000000
+#define MSPEC_BASE 0x9400000000000000
+#define UNCAC_BASE 0x9600000000000000
+
+#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
+#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
+#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
+#define TO_MSPEC(x) (MSPEC_BASE | ((x) & TO_PHYS_MASK))
+#define TO_HSPEC(x) (HSPEC_BASE | ((x) & TO_PHYS_MASK))
+
+#endif /* _ASM_MACH_SPACES_H */
diff -puN /dev/null include/asm-mips/mach-ip32/mangle-port.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ip32/mangle-port.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,15 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Ladislav Michl
+ */
+#ifndef __ASM_MACH_IP32_MANGLE_PORT_H
+#define __ASM_MACH_IP32_MANGLE_PORT_H
+
+#define __swizzle_addr_b(port) ((port) ^ 3)
+#define __swizzle_addr_w(port) ((port) ^ 2)
+#define __swizzle_addr_l(port) (port)
+
+#endif /* __ASM_MACH_IP32_MANGLE_PORT_H */
diff -puN /dev/null include/asm-mips/mach-ip32/mc146818rtc.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ip32/mc146818rtc.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,32 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998, 2001, 03 by Ralf Baechle
+ * Copyright (C) 2000 Harald Koerfgen
+ *
+ * RTC routines for IP32 style attached Dallas chip.
+ */
+#ifndef __ASM_MACH_IP32_MC146818RTC_H
+#define __ASM_MACH_IP32_MC146818RTC_H
+
+#include <asm/io.h>
+#include <asm/ip32/mace.h>
+
+#define RTC_PORT(x) (0x70 + (x))
+#define RTC_IRQ MACEISA_RTC_IRQ
+
+static unsigned char CMOS_READ(unsigned long addr)
+{
+ return readb(mace->isa.rtc + addr);
+}
+
+static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
+{
+ writeb(data, mace->isa.rtc + addr);
+}
+
+#define RTC_ALWAYS_BCD 0
+
+#endif /* __ASM_MACH_IP32_MC146818RTC_H */
diff -puN /dev/null include/asm-mips/mach-jazz/floppy.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-jazz/floppy.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,135 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998, 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_JAZZ_FLOPPY_H
+#define __ASM_MACH_JAZZ_FLOPPY_H
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/linkage.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <asm/addrspace.h>
+#include <asm/jazz.h>
+#include <asm/jazzdma.h>
+#include <asm/pgtable.h>
+
+static inline unsigned char fd_inb(unsigned int port)
+{
+ unsigned char c;
+
+ c = *(volatile unsigned char *) port;
+ udelay(1);
+
+ return c;
+}
+
+static inline void fd_outb(unsigned char value, unsigned int port)
+{
+ *(volatile unsigned char *) port = value;
+}
+
+/*
+ * How to access the floppy DMA functions.
+ */
+static inline void fd_enable_dma(void)
+{
+ vdma_enable(JAZZ_FLOPPY_DMA);
+}
+
+static inline void fd_disable_dma(void)
+{
+ vdma_disable(JAZZ_FLOPPY_DMA);
+}
+
+static inline int fd_request_dma(void)
+{
+ return 0;
+}
+
+static inline void fd_free_dma(void)
+{
+}
+
+static inline void fd_clear_dma_ff(void)
+{
+}
+
+static inline void fd_set_dma_mode(char mode)
+{
+ vdma_set_mode(JAZZ_FLOPPY_DMA, mode);
+}
+
+static inline void fd_set_dma_addr(char *a)
+{
+ vdma_set_addr(JAZZ_FLOPPY_DMA, vdma_phys2log(CPHYSADDR((unsigned long)a)));
+}
+
+static inline void fd_set_dma_count(unsigned int count)
+{
+ vdma_set_count(JAZZ_FLOPPY_DMA, count);
+}
+
+static inline int fd_get_dma_residue(void)
+{
+ return vdma_get_residue(JAZZ_FLOPPY_DMA);
+}
+
+static inline void fd_enable_irq(void)
+{
+}
+
+static inline void fd_disable_irq(void)
+{
+}
+
+static inline int fd_request_irq(void)
+{
+ return request_irq(FLOPPY_IRQ, floppy_interrupt,
+ SA_INTERRUPT | SA_SAMPLE_RANDOM, "floppy", NULL);
+}
+
+static inline void fd_free_irq(void)
+{
+ free_irq(FLOPPY_IRQ, NULL);
+}
+
+static inline unsigned long fd_getfdaddr1(void)
+{
+ return JAZZ_FDC_BASE;
+}
+
+static inline unsigned long fd_dma_mem_alloc(unsigned long size)
+{
+ unsigned long mem;
+
+ mem = __get_dma_pages(GFP_KERNEL, get_order(size));
+ if(!mem)
+ return 0;
+ vdma_alloc(CPHYSADDR(mem), size); /* XXX error checking */
+
+ return mem;
+}
+
+static inline void fd_dma_mem_free(unsigned long addr, unsigned long size)
+{
+ vdma_free(vdma_phys2log(CPHYSADDR(addr)));
+ free_pages(addr, get_order(size));
+}
+
+static inline unsigned long fd_drive_type(unsigned long n)
+{
+ /* XXX This is wrong for machines with ED 2.88mb disk drives like the
+ Olivetti M700. Anyway, we should suck this from the ARC
+ firmware. */
+ if (n == 0)
+ return 4; /* 3,5", 1.44mb */
+
+ return 0;
+}
+
+#endif /* __ASM_MACH_JAZZ_FLOPPY_H */
diff -puN /dev/null include/asm-mips/mach-jazz/mc146818rtc.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-jazz/mc146818rtc.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,34 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998, 2001, 03 by Ralf Baechle
+ *
+ * RTC routines for Jazz style attached Dallas chip.
+ */
+#ifndef __ASM_MACH_JAZZ_MC146818RTC_H
+#define __ASM_MACH_JAZZ_MC146818RTC_H
+
+#include <asm/io.h>
+#include <asm/jazz.h>
+
+#define RTC_PORT(x) (0x70 + (x))
+#define RTC_IRQ 8
+
+static inline unsigned char CMOS_READ(unsigned long addr)
+{
+ outb_p(addr, RTC_PORT(0));
+
+ return *(char *)JAZZ_RTC_BASE;
+}
+
+static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
+{
+ outb_p(addr, RTC_PORT(0));
+ *(char *)JAZZ_RTC_BASE = data;
+}
+
+#define RTC_ALWAYS_BCD 0
+
+#endif /* __ASM_MACH_JAZZ_MC146818RTC_H */
diff -puN /dev/null include/asm-mips/mach-jazz/param.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-jazz/param.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,16 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_JAZZ_PARAM_H
+#define __ASM_MACH_JAZZ_PARAM_H
+
+/*
+ * Jazz is currently using the internal 100Hz timer of the R4030
+ */
+#define HZ 100 /* Internal kernel timer frequency */
+
+#endif /* __ASM_MACH_JAZZ_PARAM_H */
diff -puN /dev/null include/asm-mips/mach-jazz/timex.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-jazz/timex.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,16 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_JAZZ_TIMEX_H
+#define __ASM_MACH_JAZZ_TIMEX_H
+
+/*
+ * Jazz is still using the R4030 100Hz counter
+ */
+#define CLOCK_TICK_RATE 100
+
+#endif /* __ASM_MACH_JAZZ_TIMEX_H */
diff -puN /dev/null include/asm-mips/mach-jmr3927/asm/ds1742.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-jmr3927/asm/ds1742.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,16 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_MACH_JMR3927_ASM_DS1742_H
+#define __ASM_MACH_JMR3927_ASM_DS1742_H
+
+#include <asm/jmr3927/jmr3927.h>
+
+#define rtc_read(reg) (jmr3927_nvram_in(addr))
+#define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg)))
+
+#endif /* __ASM_MACH_JMR3927_ASM_DS1742_H */
diff -puN /dev/null include/asm-mips/mach-lasat/mach-gt64120.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-lasat/mach-gt64120.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,27 @@
+/*
+ * This is a direct copy of the ev96100.h file, with a global
+ * search and replace. The numbers are the same.
+ *
+ * The reason I'm duplicating this is so that the 64120/96100
+ * defines won't be confusing in the source code.
+ */
+#ifndef _ASM_GT64120_LASAT_GT64120_DEP_H
+#define _ASM_GT64120_LASAT_GT64120_DEP_H
+
+/*
+ * GT64120 config space base address on Lasat 100
+ */
+#define GT64120_BASE (KSEG1ADDR(0x14000000))
+
+/*
+ * PCI Bus allocation
+ *
+ * (Guessing ...)
+ */
+#define GT_PCI_MEM_BASE 0x12000000UL
+#define GT_PCI_MEM_SIZE 0x02000000UL
+#define GT_PCI_IO_BASE 0x10000000UL
+#define GT_PCI_IO_SIZE 0x02000000UL
+#define GT_ISA_IO_BASE PCI_IO_BASE
+
+#endif /* _ASM_GT64120_LASAT_GT64120_DEP_H */
diff -puN /dev/null include/asm-mips/mach-mips/mach-gt64120.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-mips/mach-gt64120.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,28 @@
+/*
+ * This is a direct copy of the ev96100.h file, with a global
+ * search and replace. The numbers are the same.
+ *
+ * The reason I'm duplicating this is so that the 64120/96100
+ * defines won't be confusing in the source code.
+ */
+#ifndef _ASM_MACH_MIPS_MACH_GT64120_DEP_H
+#define _ASM_MACH_MIPS_MACH_GT64120_DEP_H
+
+#define MIPS_GT_BASE 0x1be00000
+
+extern unsigned long _pcictrl_gt64120;
+/*
+ * GT64120 config space base address
+ */
+#define GT64120_BASE _pcictrl_gt64120
+
+/*
+ * PCI Bus allocation
+ */
+#define GT_PCI_MEM_BASE 0x12000000UL
+#define GT_PCI_MEM_SIZE 0x02000000UL
+#define GT_PCI_IO_BASE 0x10000000UL
+#define GT_PCI_IO_SIZE 0x02000000UL
+#define GT_ISA_IO_BASE PCI_IO_BASE
+
+#endif /* _ASM_MACH_MIPS_MACH_GT64120_DEP_H */
diff -puN /dev/null include/asm-mips/mach-mips/mc146818rtc.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-mips/mc146818rtc.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,46 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ * Copyright (C) 2003 by Ralf Baechle
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * RTC routines for Malta style attached PIIX4 device, which contains a
+ * Motorola MC146818A-compatible Real Time Clock.
+ */
+#ifndef __ASM_MACH_MALTA_MC146818RTC_H
+#define __ASM_MACH_MALTA_MC146818RTC_H
+
+#include <asm/io.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/malta.h>
+
+#define RTC_PORT(x) (0x70 + (x))
+#define RTC_IRQ 8
+
+static inline unsigned char CMOS_READ(unsigned long addr)
+{
+ outb(addr, MALTA_RTC_ADR_REG);
+ return inb(MALTA_RTC_DAT_REG);
+}
+
+static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
+{
+ outb(addr, MALTA_RTC_ADR_REG);
+ outb(data, MALTA_RTC_DAT_REG);
+}
+
+#define RTC_ALWAYS_BCD 0
+
+#endif /* __ASM_MACH_MALTA_MC146818RTC_H */
diff -puN /dev/null include/asm-mips/mach-ocelot/mach-gt64120.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-ocelot/mach-gt64120.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#ifndef _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H
+#define _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H
+
+/*
+ * PCI address allocation
+ */
+#define GT_PCI_MEM_BASE (0x22000000UL)
+#define GT_PCI_MEM_SIZE GT_DEF_PCI0_MEM0_SIZE
+#define GT_PCI_IO_BASE (0x20000000UL)
+#define GT_PCI_IO_SIZE GT_DEF_PCI0_IO_SIZE
+
+extern unsigned long gt64120_base;
+
+#define GT64120_BASE (gt64120_base)
+
+/*
+ * GT timer irq
+ */
+#define GT_TIMER 6
+
+#endif /* _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H */
diff -puN /dev/null include/asm-mips/mach-pb1x00/mc146818rtc.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-pb1x00/mc146818rtc.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,34 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998, 2001, 03 by Ralf Baechle
+ *
+ * RTC routines for PC style attached Dallas chip.
+ */
+#ifndef __ASM_MACH_AU1XX_MC146818RTC_H
+#define __ASM_MACH_AU1XX_MC146818RTC_H
+
+#include <asm/io.h>
+#include <asm/mach-au1x00/au1000.h>
+
+#define RTC_PORT(x) (0x0c000000 + (x))
+#define RTC_IRQ 8
+#define PB1500_RTC_ADDR 0x0c000000
+
+static inline unsigned char CMOS_READ(unsigned long offset)
+{
+ offset <<= 2;
+ return (u8)(au_readl(offset + PB1500_RTC_ADDR) & 0xff);
+}
+
+static inline void CMOS_WRITE(unsigned char data, unsigned long offset)
+{
+ offset <<= 2;
+ au_writel(data, offset + PB1500_RTC_ADDR);
+}
+
+#define RTC_ALWAYS_BCD 1
+
+#endif /* __ASM_MACH_AU1XX_MC146818RTC_H */
diff -puN /dev/null include/asm-mips/mach-pb1x00/pb1000.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-pb1x00/pb1000.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,172 @@
+/*
+ * Alchemy Semi PB1000 Referrence Board
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * ########################################################################
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ *
+ */
+#ifndef __ASM_PB1000_H
+#define __ASM_PB1000_H
+
+/* PCMCIA PB1000 specific defines */
+#define PCMCIA_MAX_SOCK 1
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
+
+#define PB1000_PCR 0xBE000000
+ #define PCR_SLOT_0_VPP0 (1<<0)
+ #define PCR_SLOT_0_VPP1 (1<<1)
+ #define PCR_SLOT_0_VCC0 (1<<2)
+ #define PCR_SLOT_0_VCC1 (1<<3)
+ #define PCR_SLOT_0_RST (1<<4)
+
+ #define PCR_SLOT_1_VPP0 (1<<8)
+ #define PCR_SLOT_1_VPP1 (1<<9)
+ #define PCR_SLOT_1_VCC0 (1<<10)
+ #define PCR_SLOT_1_VCC1 (1<<11)
+ #define PCR_SLOT_1_RST (1<<12)
+
+#define PB1000_MDR 0xBE000004
+ #define MDR_PI (1<<5) /* pcmcia int latch */
+ #define MDR_EPI (1<<14) /* enable pcmcia int */
+ #define MDR_CPI (1<<15) /* clear pcmcia int */
+
+#define PB1000_ACR1 0xBE000008
+ #define ACR1_SLOT_0_CD1 (1<<0) /* card detect 1 */
+ #define ACR1_SLOT_0_CD2 (1<<1) /* card detect 2 */
+ #define ACR1_SLOT_0_READY (1<<2) /* ready */
+ #define ACR1_SLOT_0_STATUS (1<<3) /* status change */
+ #define ACR1_SLOT_0_VS1 (1<<4) /* voltage sense 1 */
+ #define ACR1_SLOT_0_VS2 (1<<5) /* voltage sense 2 */
+ #define ACR1_SLOT_0_INPACK (1<<6) /* inpack pin status */
+ #define ACR1_SLOT_1_CD1 (1<<8) /* card detect 1 */
+ #define ACR1_SLOT_1_CD2 (1<<9) /* card detect 2 */
+ #define ACR1_SLOT_1_READY (1<<10) /* ready */
+ #define ACR1_SLOT_1_STATUS (1<<11) /* status change */
+ #define ACR1_SLOT_1_VS1 (1<<12) /* voltage sense 1 */
+ #define ACR1_SLOT_1_VS2 (1<<13) /* voltage sense 2 */
+ #define ACR1_SLOT_1_INPACK (1<<14) /* inpack pin status */
+
+#define CPLD_AUX0 0xBE00000C
+#define CPLD_AUX1 0xBE000010
+#define CPLD_AUX2 0xBE000014
+
+/* Voltage levels */
+
+/* VPPEN1 - VPPEN0 */
+#define VPP_GND ((0<<1) | (0<<0))
+#define VPP_5V ((1<<1) | (0<<0))
+#define VPP_3V ((0<<1) | (1<<0))
+#define VPP_12V ((0<<1) | (1<<0))
+#define VPP_HIZ ((1<<1) | (1<<0))
+
+/* VCCEN1 - VCCEN0 */
+#define VCC_3V ((0<<1) | (1<<0))
+#define VCC_5V ((1<<1) | (0<<0))
+#define VCC_HIZ ((0<<1) | (0<<0))
+
+/* VPP/VCC */
+#define SET_VCC_VPP(VCC, VPP, SLOT)\
+ ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
+
+
+/* PCI PB1000 specific defines */
+/* The reason these defines are here instead of au1000.h is because
+ * the Au1000 does not have a PCI bus controller so the PCI implementation
+ * on the some of the older Pb1000 boards was very board specific.
+ */
+#define PCI_CONFIG_BASE 0xBA020000 /* the only external slot */
+
+#define SDRAM_DEVID 0xBA010000
+#define SDRAM_CMD 0xBA010004
+#define SDRAM_CLASS 0xBA010008
+#define SDRAM_MISC 0xBA01000C
+#define SDRAM_MBAR 0xBA010010
+
+#define PCI_IO_DATA_PORT 0xBA800000
+
+#define PCI_IO_ADDR 0xBE00001C
+#define PCI_INT_ACK 0xBBC00000
+#define PCI_IO_READ 0xBBC00020
+#define PCI_IO_WRITE 0xBBC00030
+
+#define PCI_BRIDGE_CONFIG 0xBE000018
+
+#define PCI_IO_START 0x10000000
+#define PCI_IO_END 0x1000ffff
+#define PCI_MEM_START 0x18000000
+#define PCI_MEM_END 0x18ffffff
+
+#define PCI_FIRST_DEVFN 0
+#define PCI_LAST_DEVFN 1
+
+static inline u8 au_pci_io_readb(u32 addr)
+{
+ writel(addr, PCI_IO_ADDR);
+ writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG);
+ return (readl(PCI_IO_DATA_PORT) & 0xff);
+}
+
+static inline u16 au_pci_io_readw(u32 addr)
+{
+ writel(addr, PCI_IO_ADDR);
+ writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG);
+ return (readl(PCI_IO_DATA_PORT) & 0xffff);
+}
+
+static inline u32 au_pci_io_readl(u32 addr)
+{
+ writel(addr, PCI_IO_ADDR);
+ writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff), PCI_BRIDGE_CONFIG);
+ return readl(PCI_IO_DATA_PORT);
+}
+
+static inline void au_pci_io_writeb(u8 val, u32 addr)
+{
+ writel(addr, PCI_IO_ADDR);
+ writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG);
+ writel(val, PCI_IO_DATA_PORT);
+}
+
+static inline void au_pci_io_writew(u16 val, u32 addr)
+{
+ writel(addr, PCI_IO_ADDR);
+ writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG);
+ writel(val, PCI_IO_DATA_PORT);
+}
+
+static inline void au_pci_io_writel(u32 val, u32 addr)
+{
+ writel(addr, PCI_IO_ADDR);
+ writel(readl(PCI_BRIDGE_CONFIG) & 0xffffcfff, PCI_BRIDGE_CONFIG);
+ writel(val, PCI_IO_DATA_PORT);
+}
+
+static inline void set_sdram_extbyte(void)
+{
+ writel(readl(PCI_BRIDGE_CONFIG) & 0xffffff00, PCI_BRIDGE_CONFIG);
+}
+
+static inline void set_slot_extbyte(void)
+{
+ writel((readl(PCI_BRIDGE_CONFIG) & 0xffffbf00) | 0x18, PCI_BRIDGE_CONFIG);
+}
+#endif /* __ASM_PB1000_H */
diff -puN /dev/null include/asm-mips/mach-pb1x00/pb1100.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-pb1x00/pb1100.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,85 @@
+/*
+ * Alchemy Semi PB1100 Referrence Board
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * ########################################################################
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ *
+ */
+#ifndef __ASM_PB1100_H
+#define __ASM_PB1100_H
+
+#define PB1100_IDENT 0xAE000000
+#define BOARD_STATUS_REG 0xAE000004
+ #define PB1100_ROM_SEL (1<<15)
+ #define PB1100_ROM_SIZ (1<<14)
+ #define PB1100_SWAP_BOOT (1<<13)
+ #define PB1100_FLASH_WP (1<<12)
+ #define PB1100_ROM_H_STS (1<<11)
+ #define PB1100_ROM_L_STS (1<<10)
+ #define PB1100_FLASH_H_STS (1<<9)
+ #define PB1100_FLASH_L_STS (1<<8)
+ #define PB1100_SRAM_SIZ (1<<7)
+ #define PB1100_TSC_BUSY (1<<6)
+ #define PB1100_PCMCIA_VS_MASK (3<<4)
+ #define PB1100_RS232_CD (1<<3)
+ #define PB1100_RS232_CTS (1<<2)
+ #define PB1100_RS232_DSR (1<<1)
+ #define PB1100_RS232_RI (1<<0)
+
+#define PB1100_IRDA_RS232 0xAE00000C
+ #define PB1100_IRDA_FULL (0<<14) /* full power */
+ #define PB1100_IRDA_SHUTDOWN (1<<14)
+ #define PB1100_IRDA_TT (2<<14) /* 2/3 power */
+ #define PB1100_IRDA_OT (3<<14) /* 1/3 power */
+ #define PB1100_IRDA_FIR (1<<13)
+
+#define PCMCIA_BOARD_REG 0xAE000010
+ #define PB1100_SD_WP1_RO (1<<15) /* read only */
+ #define PB1100_SD_WP0_RO (1<<14) /* read only */
+ #define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */
+ #define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */
+ #define PB1100_SEL_SD_CONN1 (1<<9)
+ #define PB1100_SEL_SD_CONN0 (1<<8)
+ #define PC_DEASSERT_RST (1<<7)
+ #define PC_DRV_EN (1<<4)
+
+#define PB1100_G_CONTROL 0xAE000014 /* graphics control */
+
+#define PB1100_RST_VDDI 0xAE00001C
+ #define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */
+ #define PB1100_VDDI_MASK (0x1F)
+
+#define PB1100_LEDS 0xAE000018
+
+/* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED.
+ * 7:0 is the LED Display's decimal points.
+ */
+#define PB1100_HEX_LED 0xAE000018
+
+/* PCMCIA PB1100 specific defines */
+#define PCMCIA_MAX_SOCK 0
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
+
+/* VPP/VCC */
+#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0))
+
+#endif /* __ASM_PB1100_H */
diff -puN /dev/null include/asm-mips/mach-pb1x00/pb1500.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-pb1x00/pb1500.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,51 @@
+/*
+ * Alchemy Semi PB1500 Referrence Board
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * ########################################################################
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ *
+ */
+#ifndef __ASM_PB1500_H
+#define __ASM_PB1500_H
+
+
+#define IDENT_BOARD_REG 0xAE000000
+#define BOARD_STATUS_REG 0xAE000004
+#define PCI_BOARD_REG 0xAE000010
+#define PCMCIA_BOARD_REG 0xAE000010
+ #define PC_DEASSERT_RST 0x80
+ #define PC_DRV_EN 0x10
+#define PB1500_G_CONTROL 0xAE000014
+#define PB1500_RST_VDDI 0xAE00001C
+#define PB1500_LEDS 0xAE000018
+
+#define PB1500_HEX_LED 0xAF000004
+#define PB1500_HEX_LED_BLANK 0xAF000008
+
+/* PCMCIA PB1500 specific defines */
+#define PCMCIA_MAX_SOCK 0
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
+
+/* VPP/VCC */
+#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0))
+
+#endif /* __ASM_PB1500_H */
diff -puN /dev/null include/asm-mips/mach-rm200/cpu-feature-overrides.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-rm200/cpu-feature-overrides.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,42 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ *
+ * SNI RM200 C apparently was only shipped with R4600 V2.0 and R5000 processors.
+ */
+#ifndef __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H
+
+#include <cpu-feature-overrides.h>
+
+#define cpu_has_tlb 1
+#define cpu_has_4kex 1
+#define cpu_has_4ktlb 1
+#define cpu_has_fpu 1
+#define cpu_has_32fpr 1
+#define cpu_has_counter 1
+#define cpu_has_watch 0
+#define cpu_has_mips16 0
+#define cpu_has_divec 0
+#define cpu_has_vce 0
+#define cpu_has_cache_cdex_p 1
+#define cpu_has_cache_cdex_s 0
+#define cpu_has_prefetch 0
+#define cpu_has_mcheck 0
+#define cpu_has_ejtag 0
+#define cpu_has_llsc 1
+#define cpu_has_vtag_icache 0
+#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
+#define cpu_has_ic_fills_f_dc 0
+#define cpu_has_nofpuex 0
+#define cpu_has_64bits 1
+
+#define cpu_has_subset_pcaches 0 /* No S-cache on R5000 I think ... */
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+#define cpu_scache_line_size() 0 /* No S-cache on R5000 I think ... */
+
+#endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */
diff -puN /dev/null include/asm-mips/mach-rm200/mc146818rtc.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-rm200/mc146818rtc.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,17 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2004 by Ralf Baechle
+ *
+ * RTC routines for PC style attached Dallas chip with ARC epoch.
+ */
+#ifndef __ASM_MACH_RM200_MC146818RTC_H
+#define __ASM_MACH_RM200_MC146818RTC_H
+
+#define mc146818_decode_year(year) ((year) + 1980)
+
+#include_next <mc146818rtc.h>
+
+#endif /* __ASM_MACH_RM200_MC146818RTC_H */
diff -puN /dev/null include/asm-mips/mach-vr41xx/timex.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mach-vr41xx/timex.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,18 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+/*
+ * Changes:
+ * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * - CLOCK_TICK_RATE is changed into 32768 from 6144000.
+ */
+#ifndef __ASM_MACH_VR41XX_TIMEX_H
+#define __ASM_MACH_VR41XX_TIMEX_H
+
+#define CLOCK_TICK_RATE 32768
+
+#endif /* __ASM_MACH_VR41XX_TIMEX_H */
diff -puN include/asm-mips/mc146818rtc.h~mips-megapatch include/asm-mips/mc146818rtc.h
--- 25/include/asm-mips/mc146818rtc.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mc146818rtc.h 2004-02-19 12:53:02.000000000 -0800
@@ -11,56 +11,6 @@
#ifndef _ASM_MC146818RTC_H
#define _ASM_MC146818RTC_H
-#include <linux/config.h>
-
-#include <asm/io.h>
-
-
-/*
- * This structure defines how to access various features of
- * different machine types and how to access them.
- */
-struct rtc_ops {
- /* How to access the RTC register in a DS1287. */
- unsigned char (*rtc_read_data)(unsigned long addr);
- void (*rtc_write_data)(unsigned char data, unsigned long addr);
- int (*rtc_bcd_mode)(void);
-};
-
-extern struct rtc_ops *rtc_ops;
-
-/*
- * Most supported machines access the RTC index register via an ISA
- * port access but the way to access the date register differs ...
- * The DECstation directly maps the RTC memory in the CPU's address
- * space with the chipset generating necessary index write/data access
- * cycles automagically.
- */
-#define CMOS_READ(addr) ({ \
-rtc_ops->rtc_read_data(addr); \
-})
-#define CMOS_WRITE(val, addr) ({ \
-rtc_ops->rtc_write_data(val, addr); \
-})
-#define RTC_ALWAYS_BCD \
-rtc_ops->rtc_bcd_mode()
-
-
-#ifdef CONFIG_DECSTATION
-
-#include <asm/dec/rtc-dec.h>
-
-#elif defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1100)
-
-#define RTC_PORT(x) (0x0c000000 + (x))
-#define RTC_IOMAPPED 0
-#define RTC_IRQ 0
-
-#else
-
-#define RTC_PORT(x) (0x70 + (x))
-#define RTC_IRQ 8
-
-#endif
+#include <mc146818rtc.h>
#endif /* _ASM_MC146818RTC_H */
diff -puN /dev/null include/asm-mips/mc146818-time.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/mc146818-time.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,129 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Machine dependent access functions for RTC registers.
+ */
+#ifndef __ASM_MC146818_TIME_H
+#define __ASM_MC146818_TIME_H
+
+#include <linux/bcd.h>
+#include <linux/mc146818rtc.h>
+#include <linux/time.h>
+
+/*
+ * For check timing call set_rtc_mmss() 500ms; used in timer interrupt.
+ */
+#define USEC_AFTER 500000
+#define USEC_BEFORE 500000
+
+/*
+ * In order to set the CMOS clock precisely, set_rtc_mmss has to be
+ * called 500 ms after the second nowtime has started, because when
+ * nowtime is written into the registers of the CMOS clock, it will
+ * jump to the next second precisely 500 ms later. Check the Motorola
+ * MC146818A or Dallas DS12887 data sheet for details.
+ *
+ * BUG: This routine does not handle hour overflow properly; it just
+ * sets the minutes. Usually you'll only notice that after reboot!
+ */
+static inline int mc146818_set_rtc_mmss(unsigned long nowtime)
+{
+ int real_seconds, real_minutes, cmos_minutes;
+ unsigned char save_control, save_freq_select;
+ int retval = 0;
+
+ save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
+ CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
+
+ save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
+ CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
+
+ cmos_minutes = CMOS_READ(RTC_MINUTES);
+ if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
+ BCD_TO_BIN(cmos_minutes);
+
+ /*
+ * since we're only adjusting minutes and seconds,
+ * don't interfere with hour overflow. This avoids
+ * messing with unknown time zones but requires your
+ * RTC not to be off by more than 15 minutes
+ */
+ real_seconds = nowtime % 60;
+ real_minutes = nowtime / 60;
+ if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
+ real_minutes += 30; /* correct for half hour time zone */
+ real_minutes %= 60;
+
+ if (abs(real_minutes - cmos_minutes) < 30) {
+ if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
+ BIN_TO_BCD(real_seconds);
+ BIN_TO_BCD(real_minutes);
+ }
+ CMOS_WRITE(real_seconds,RTC_SECONDS);
+ CMOS_WRITE(real_minutes,RTC_MINUTES);
+ } else {
+ printk(KERN_WARNING
+ "set_rtc_mmss: can't update from %d to %d\n",
+ cmos_minutes, real_minutes);
+ retval = -1;
+ }
+
+ /* The following flags have to be released exactly in this order,
+ * otherwise the DS12887 (popular MC146818A clone with integrated
+ * battery and quartz) will not reset the oscillator and will not
+ * update precisely 500 ms later. You won't find this mentioned in
+ * the Dallas Semiconductor data sheets, but who believes data
+ * sheets anyway ... -- Markus Kuhn
+ */
+ CMOS_WRITE(save_control, RTC_CONTROL);
+ CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
+
+ return retval;
+}
+
+static inline unsigned long mc146818_get_cmos_time(void)
+{
+ unsigned int year, mon, day, hour, min, sec;
+ int i;
+
+ /*
+ * The Linux interpretation of the CMOS clock register contents:
+ * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
+ * RTC registers show the second which has precisely just started.
+ * Let's hope other operating systems interpret the RTC the same way.
+ */
+
+ /* read RTC exactly on falling edge of update flag */
+ for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
+ if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
+ break;
+ for (i = 0 ; i < 1000000 ; i++) /* must try at least 2.228 ms */
+ if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
+ break;
+
+ do { /* Isn't this overkill ? UIP above should guarantee consistency */
+ sec = CMOS_READ(RTC_SECONDS);
+ min = CMOS_READ(RTC_MINUTES);
+ hour = CMOS_READ(RTC_HOURS);
+ day = CMOS_READ(RTC_DAY_OF_MONTH);
+ mon = CMOS_READ(RTC_MONTH);
+ year = CMOS_READ(RTC_YEAR);
+ } while (sec != CMOS_READ(RTC_SECONDS));
+
+ if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
+ BCD_TO_BIN(sec);
+ BCD_TO_BIN(min);
+ BCD_TO_BIN(hour);
+ BCD_TO_BIN(day);
+ BCD_TO_BIN(mon);
+ BCD_TO_BIN(year);
+ }
+ if ((year += 1900) < 1970)
+ year += 100;
+
+ return mktime(year, mon, day, hour, min, sec);
+}
+
+#endif /* __ASM_MC146818_TIME_H */
diff -puN include/asm-mips/mips-boards/atlas.h~mips-megapatch include/asm-mips/mips-boards/atlas.h
--- 25/include/asm-mips/mips-boards/atlas.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mips-boards/atlas.h 2004-02-19 12:53:02.000000000 -0800
@@ -30,25 +30,25 @@
/*
* Atlas RTC-device indirect register access.
*/
-#define ATLAS_RTC_ADR_REG (KSEG1ADDR(0x1f000800))
-#define ATLAS_RTC_DAT_REG (KSEG1ADDR(0x1f000808))
+#define ATLAS_RTC_ADR_REG 0x1f000800
+#define ATLAS_RTC_DAT_REG 0x1f000808
/*
* Atlas interrupt controller register base.
*/
-#define ATLAS_ICTRL_REGS_BASE (KSEG1ADDR(0x1f000000))
+#define ATLAS_ICTRL_REGS_BASE 0x1f000000
/*
* Atlas UART register base.
*/
-#define ATLAS_UART_REGS_BASE (0x1f000900)
+#define ATLAS_UART_REGS_BASE 0x1f000900
#define ATLAS_BASE_BAUD ( 3686400 / 16 )
/*
* Atlas PSU standby register.
*/
-#define ATLAS_PSUSTBY_REG (KSEG1ADDR(0x1f000600))
+#define ATLAS_PSUSTBY_REG 0x1f000600
#define ATLAS_GOSTBY 0x4d
/*
@@ -57,6 +57,8 @@
* This is not ideal, but is needed for setting up remote debugging as
* soon as possible.
*/
-#define ATLAS_SAA9730_REG (KSEG1ADDR(0x08800000))
+#define ATLAS_SAA9730_REG 0x10800000
+
+#define ATLAS_SAA9730_BAUDCLOCK 3692300
#endif /* !(_MIPS_ATLAS_H) */
diff -puN include/asm-mips/mips-boards/atlasint.h~mips-megapatch include/asm-mips/mips-boards/atlasint.h
--- 25/include/asm-mips/mips-boards/atlasint.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mips-boards/atlasint.h 2004-02-19 12:53:02.000000000 -0800
@@ -25,25 +25,58 @@
#ifndef _MIPS_ATLASINT_H
#define _MIPS_ATLASINT_H
-/* Number of IRQ supported on hw interrupt 0. */
-#define ATLASINT_UART 0
-#define ATLASINT_END 32
+#define ATLASINT_BASE 1
+#define ATLASINT_UART (ATLASINT_BASE+0)
+#define ATLASINT_TIM0 (ATLASINT_BASE+1)
+#define ATLASINT_RES2 (ATLASINT_BASE+2)
+#define ATLASINT_RES3 (ATLASINT_BASE+3)
+#define ATLASINT_RTC (ATLASINT_BASE+4)
+#define ATLASINT_COREHI (ATLASINT_BASE+5)
+#define ATLASINT_CORELO (ATLASINT_BASE+6)
+#define ATLASINT_RES7 (ATLASINT_BASE+7)
+#define ATLASINT_PCIA (ATLASINT_BASE+8)
+#define ATLASINT_PCIB (ATLASINT_BASE+9)
+#define ATLASINT_PCIC (ATLASINT_BASE+10)
+#define ATLASINT_PCID (ATLASINT_BASE+11)
+#define ATLASINT_ENUM (ATLASINT_BASE+12)
+#define ATLASINT_DEG (ATLASINT_BASE+13)
+#define ATLASINT_ATXFAIL (ATLASINT_BASE+14)
+#define ATLASINT_INTA (ATLASINT_BASE+15)
+#define ATLASINT_INTB (ATLASINT_BASE+16)
+#define ATLASINT_ETH ATLASINT_INTB
+#define ATLASINT_INTC (ATLASINT_BASE+17)
+#define ATLASINT_SCSI ATLASINT_INTC
+#define ATLASINT_INTD (ATLASINT_BASE+18)
+#define ATLASINT_SERR (ATLASINT_BASE+19)
+#define ATLASINT_RES20 (ATLASINT_BASE+20)
+#define ATLASINT_RES21 (ATLASINT_BASE+21)
+#define ATLASINT_RES22 (ATLASINT_BASE+22)
+#define ATLASINT_RES23 (ATLASINT_BASE+23)
+#define ATLASINT_RES24 (ATLASINT_BASE+24)
+#define ATLASINT_RES25 (ATLASINT_BASE+25)
+#define ATLASINT_RES26 (ATLASINT_BASE+26)
+#define ATLASINT_RES27 (ATLASINT_BASE+27)
+#define ATLASINT_RES28 (ATLASINT_BASE+28)
+#define ATLASINT_RES29 (ATLASINT_BASE+29)
+#define ATLASINT_RES30 (ATLASINT_BASE+30)
+#define ATLASINT_RES31 (ATLASINT_BASE+31)
+#define ATLASINT_END (ATLASINT_BASE+31)
/*
* Atlas registers are memory mapped on 64-bit aligned boundaries and
* only word access are allowed.
*/
struct atlas_ictrl_regs {
- volatile unsigned long intraw;
- long dummy1;
- volatile unsigned long intseten;
- long dummy2;
- volatile unsigned long intrsten;
- long dummy3;
- volatile unsigned long intenable;
- long dummy4;
- volatile unsigned long intstatus;
- long dummy5;
+ volatile unsigned int intraw;
+ int dummy1;
+ volatile unsigned int intseten;
+ int dummy2;
+ volatile unsigned int intrsten;
+ int dummy3;
+ volatile unsigned int intenable;
+ int dummy4;
+ volatile unsigned int intstatus;
+ int dummy5;
};
extern void atlasint_init(void);
diff -puN include/asm-mips/mips-boards/bonito64.h~mips-megapatch include/asm-mips/mips-boards/bonito64.h
--- 25/include/asm-mips/mips-boards/bonito64.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mips-boards/bonito64.h 2004-02-19 12:53:02.000000000 -0800
@@ -1,28 +1,18 @@
/*
- * bonito.h
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2001 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
+ * Bonito Register Map
*
* This file is the original bonito.h from Algorithmics with minor changes
* to fit into linux.
- */
-
-/*
- * Bonito Register Map
+ *
* Copyright (c) 1999 Algorithmics Ltd
*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2001 MIPS Technologies, Inc. All rights reserved.
+ *
* Algorithmics gives permission for anyone to use and modify this file
* without any obligation or license condition except that you retain
* this copyright message in any source redistribution in whole or part.
*
- * Updated copies of this and other files can be found at
- * ftp://ftp.algor.co.uk/pub/bonito/
- *
- * Users of the Bonito controller are warmly recommended to contribute
- * any useful changes back to Algorithmics (mail to bonito@algor.co.uk).
*/
/* Revision 1.48 autogenerated on 08/17/99 15:20:01 */
@@ -38,9 +28,13 @@
#else /* !__ASSEMBLY__ */
-/* offsets from base pointer, this construct allows optimisation */
-/* static char * const _bonito = PA_TO_KVA1(BONITO_BASE); */
-#define BONITO(x) *(volatile u32 *)(_bonito + (x))
+/*
+ * Algorithmics Bonito64 system controller register base.
+ */
+extern unsigned long _pcictrl_bonito;
+extern unsigned long _pcictrl_bonito_pcicfg;
+
+#define BONITO(x) *(volatile u32 *)(_pcictrl_bonito + (x))
#endif /* __ASSEMBLY__ */
@@ -312,6 +306,11 @@
#define BONITO_PCICACHECTRL_CACHECMDLINE_SHIFT 3
#define BONITO_PCICACHECTRL_CMDEXEC 0x00000020
+#define BONITO_PCICACHECTRL_IOBCCOH_PRES 0x00000100
+#define BONITO_PCICACHECTRL_IOBCCOH_EN 0x00000200
+#define BONITO_PCICACHECTRL_CPUCOH_PRES 0x00000400
+#define BONITO_PCICACHECTRL_CPUCOH_EN 0x00000800
+
#define BONITO_IODEVCFG_BUFFBIT_CS0 0x00000001
#define BONITO_IODEVCFG_SPEEDBIT_CS0 0x00000002
#define BONITO_IODEVCFG_MOREABITS_CS0 0x00000004
diff -puN include/asm-mips/mips-boards/generic.h~mips-megapatch include/asm-mips/mips-boards/generic.h
--- 25/include/asm-mips/mips-boards/generic.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mips-boards/generic.h 2004-02-19 12:53:02.000000000 -0800
@@ -2,28 +2,23 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Defines of the MIPS boards specific address-MAP, registers, etc.
- *
*/
-#ifndef _MIPS_GENERIC_H
-#define _MIPS_GENERIC_H
+#ifndef __ASM_MIPS_BOARDS_GENERIC_H
+#define __ASM_MIPS_BOARDS_GENERIC_H
#include <linux/config.h>
#include <asm/addrspace.h>
@@ -33,79 +28,55 @@
/*
* Display register base.
*/
-#if defined(CONFIG_MIPS_SEAD)
-#define ASCII_DISPLAY_POS_BASE (KSEG1ADDR(0x1f0005c0))
+#ifdef CONFIG_MIPS_SEAD
+#define ASCII_DISPLAY_POS_BASE 0x1f0005c0
#else
-#define ASCII_DISPLAY_WORD_BASE (KSEG1ADDR(0x1f000410))
-#define ASCII_DISPLAY_POS_BASE (KSEG1ADDR(0x1f000418))
+#define ASCII_DISPLAY_WORD_BASE 0x1f000410
+#define ASCII_DISPLAY_POS_BASE 0x1f000418
#endif
/*
* Yamon Prom print address.
*/
-#define YAMON_PROM_PRINT_ADDR (KSEG1ADDR(0x1fc00504))
+#define YAMON_PROM_PRINT_ADDR 0x1fc00504
/*
* Reset register.
*/
-#if defined(CONFIG_MIPS_SEAD)
-#define SOFTRES_REG (KSEG1ADDR(0x1e800050))
+#ifdef CONFIG_MIPS_SEAD
+#define SOFTRES_REG 0x1e800050
#define GORESET 0x4d
#else
-#define SOFTRES_REG (KSEG1ADDR(0x1f000500))
+#define SOFTRES_REG 0x1f000500
#define GORESET 0x42
#endif
/*
* Revision register.
*/
-#define MIPS_REVISION_REG (KSEG1ADDR(0x1fc00010))
+#define MIPS_REVISION_REG 0x1fc00010
#define MIPS_REVISION_CORID_QED_RM5261 0
#define MIPS_REVISION_CORID_CORE_LV 1
#define MIPS_REVISION_CORID_BONITO64 2
#define MIPS_REVISION_CORID_CORE_20K 3
#define MIPS_REVISION_CORID_CORE_FPGA 4
#define MIPS_REVISION_CORID_CORE_MSC 5
+#define MIPS_REVISION_CORID_CORE_EMUL 6
+#define MIPS_REVISION_CORID_CORE_FPGA2 7
+#define MIPS_REVISION_CORID_CORE_FPGAR2 8
-#define MIPS_REVISION_CORID (((*(volatile u32 *)(MIPS_REVISION_REG)) >> 10) & 0x3f)
-
-extern unsigned int mips_revision_corid;
-
-
+/**** Artificial corid defines ****/
/*
- * Galileo GT64120 system controller register base.
+ * CoreEMUL with Bonito System Controller is treated like a Core20K
+ * CoreEMUL with SOC-it 101 System Controller is treated like a CoreMSC
*/
-#define MIPS_GT_BASE (KSEG1ADDR(0x1be00000))
+#define MIPS_REVISION_CORID_CORE_EMUL_BON 0x63
+#define MIPS_REVISION_CORID_CORE_EMUL_MSC 0x65
-/*
- * Because of the way the internal register works on the Galileo chip,
- * we need to swap the bytes when running bigendian.
- */
-#define GT_WRITE(ofs, data) \
- *(volatile u32 *)(MIPS_GT_BASE+ofs) = cpu_to_le32(data)
-#define GT_READ(ofs, data) \
- data = le32_to_cpu(*(volatile u32 *)(MIPS_GT_BASE+ofs))
-
-#define GT_PCI_WRITE(ofs, data) \
- *(volatile u32 *)(MIPS_GT_BASE+ofs) = data
-#define GT_PCI_READ(ofs, data) \
- data = *(volatile u32 *)(MIPS_GT_BASE+ofs)
-
-/*
- * Algorithmics Bonito64 system controller register base.
- */
-static char * const _bonito = (char *)KSEG1ADDR(BONITO_REG_BASE);
+#define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f)
-/*
- * MIPS System controller PCI register base.
- */
-#define MSC01_PCI_REG_BASE (KSEG1ADDR(0x1bd00000))
-
-#define MSC_WRITE(reg, data) \
- *(volatile u32 *)(reg) = data
-#define MSC_READ(reg, data) \
- data = *(volatile u32 *)(reg)
+extern unsigned int mips_revision_corid;
-#endif /* !(_MIPS_GENERIC_H) */
+#endif /* __ASM_MIPS_BOARDS_GENERIC_H */
diff -puN include/asm-mips/mips-boards/malta.h~mips-megapatch include/asm-mips/mips-boards/malta.h
--- 25/include/asm-mips/mips-boards/malta.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mips-boards/malta.h 2004-02-19 12:53:02.000000000 -0800
@@ -17,33 +17,34 @@
*
* Defines of the Malta board specific address-MAP, registers, etc.
*/
-#ifndef __ASM_MIPS_MALTA_H
-#define __ASM_MIPS_MALTA_H
+#ifndef __ASM_MIPS_BOARDS_MALTA_H
+#define __ASM_MIPS_BOARDS_MALTA_H
#include <asm/addrspace.h>
-#include <asm/gt64120/gt64120.h>
#include <asm/io.h>
+#include <asm/mips-boards/msc01_pci.h>
+#include <asm/gt64120.h>
/*
* Malta I/O ports base address for the Galileo GT64120 and Algorithmics
* Bonito system controllers.
*/
#define MALTA_GT_PORT_BASE get_gt_port_base(GT_PCI0IOLD_OFS)
-#define MALTA_BONITO_PORT_BASE (KSEG1ADDR(0x1fd00000))
+#define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
#define MALTA_MSC_PORT_BASE get_msc_port_base(MSC01_PCI_SC2PIOBASL)
static inline unsigned long get_gt_port_base(unsigned long reg)
{
unsigned long addr;
- GT_READ(reg, addr);
- return KSEG1ADDR((addr & 0xffff) << 21);
+ addr = GT_READ(reg);
+ return (unsigned long) ioremap (((addr & 0xffff) << 21), 0x10000);
}
static inline unsigned long get_msc_port_base(unsigned long reg)
{
unsigned long addr;
MSC_READ(reg, addr);
- return KSEG1ADDR(addr);
+ return (unsigned long) ioremap(addr, 0x10000);
}
/*
@@ -69,6 +70,6 @@ static inline unsigned long get_msc_port
#define SMSC_WRITE(x,a) outb(x,a)
-#define MALTA_JMPRS_REG (KSEG1ADDR(0x1f000210))
+#define MALTA_JMPRS_REG 0x1f000210
-#endif /* __ASM_MIPS_MALTA_H */
+#endif /* __ASM_MIPS_BOARDS_MALTA_H */
diff -puN include/asm-mips/mips-boards/msc01_pci.h~mips-megapatch include/asm-mips/mips-boards/msc01_pci.h
--- 25/include/asm-mips/mips-boards/msc01_pci.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mips-boards/msc01_pci.h 2004-02-19 12:53:02.000000000 -0800
@@ -1,19 +1,19 @@
/*
- * mcs01_pci.h
+ * PCI Register definitions for the MIPS System Controller.
*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
*
- * ########################################################################
- *
- * PCI Register definitions for the MIPS System Controller.
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
*/
-#ifndef MSC01_PCI_H
-#define MSC01_PCI_H
+#ifndef __ASM_MIPS_BOARDS_MSC01_PCI_H
+#define __ASM_MIPS_BOARDS_MSC01_PCI_H
-/*****************************************************************************
+/*
* Register offset addresses
- ****************************************************************************/
+ */
#define MSC01_PCI_ID_OFS 0x0000
#define MSC01_PCI_SC2PMBASL_OFS 0x0208
@@ -200,9 +200,24 @@
#define MSC01_PCI_SWAP_NOSWAP 0
#define MSC01_PCI_SWAP_BYTESWAP 1
-/*****************************************************************************
+/*
+ * MIPS System controller PCI register base.
+ *
+ * FIXME - are these macros specific to Malta and co or to the MSC? If the
+ * latter, they should be moved elsewhere.
+ */
+#define MIPS_MSC01_PCI_REG_BASE 0x1bd00000
+
+extern unsigned long _pcictrl_msc;
+
+#define MSC01_PCI_REG_BASE _pcictrl_msc
+
+#define MSC_WRITE(reg, data) do { *(volatile u32 *)(reg) = data; } while (0)
+#define MSC_READ(reg, data) do { data = *(volatile u32 *)(reg); } while (0)
+
+/*
* Registers absolute addresses
- ****************************************************************************/
+ */
#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS)
#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS)
@@ -238,7 +253,4 @@
#define MSC01_PCI_CFG (MSC01_PCI_REG_BASE + MSC01_PCI_CFG_OFS)
#define MSC01_PCI_SWAP (MSC01_PCI_REG_BASE + MSC01_PCI_SWAP_OFS)
-#endif
-/*****************************************************************************
- * End of msc01_pci.h
- *****************************************************************************/
+#endif /* __ASM_MIPS_BOARDS_MSC01_PCI_H */
diff -puN include/asm-mips/mips-boards/piix4.h~mips-megapatch include/asm-mips/mips-boards/piix4.h
--- 25/include/asm-mips/mips-boards/piix4.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mips-boards/piix4.h 2004-02-19 12:53:02.000000000 -0800
@@ -2,8 +2,6 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*
- * ########################################################################
- *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -17,14 +15,10 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
- * ########################################################################
- *
* Register definitions for Intel PIIX4 South Bridge Device.
- *
*/
-
-#ifndef PIIX4_H
-#define PIIX4_H
+#ifndef __ASM_MIPS_BOARDS_PIIX4_H
+#define __ASM_MIPS_BOARDS_PIIX4_H
/************************************************************************
* IO register offsets
@@ -83,4 +77,4 @@
#define PIIX4_OCW3_IRR 0x2
#define PIIX4_OCW3_ISR 0x3
-#endif /* !(PIIX4_H) */
+#endif /* __ASM_MIPS_BOARDS_PIIX4_H */
diff -puN include/asm-mips/mips-boards/prom.h~mips-megapatch include/asm-mips/mips-boards/prom.h
--- 25/include/asm-mips/mips-boards/prom.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mips-boards/prom.h 2004-02-19 12:53:02.000000000 -0800
@@ -2,6 +2,8 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*
+ * ########################################################################
+ *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -15,10 +17,14 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
+ * ########################################################################
+ *
* MIPS boards bootprom interface for the Linux kernel.
+ *
*/
-#ifndef _ASM_MIPS_BOARDS_PROM_H
-#define _ASM_MIPS_BOARDS_PROM_H
+
+#ifndef _MIPS_PROM_H
+#define _MIPS_PROM_H
extern char *prom_getcmdline(void);
extern char *prom_getenv(char *name);
@@ -27,7 +33,7 @@ extern void prom_printf(char *fmt, ...);
extern void prom_init_cmdline(void);
extern void prom_meminit(void);
extern void prom_fixup_mem_map(unsigned long start_mem, unsigned long end_mem);
-extern void prom_free_prom_memory (void);
+extern unsigned long prom_free_prom_memory (void);
extern void mips_display_message(const char *str);
extern void mips_display_word(unsigned int num);
extern int get_ethernet_addr(char *ethernet_addr);
@@ -35,9 +41,9 @@ extern int get_ethernet_addr(char *ether
/* Memory descriptor management. */
#define PROM_MAX_PMEMBLOCKS 32
struct prom_pmemblock {
- unsigned long base; /* Phys addr. */
+ unsigned long base; /* Within KSEG0. */
unsigned int size; /* In bytes. */
unsigned int type; /* free or prom memory */
};
-#endif /* _ASM_MIPS_BOARDS_PROM_H */
+#endif /* !(_MIPS_PROM_H) */
diff -puN include/asm-mips/mips-boards/seadint.h~mips-megapatch include/asm-mips/mips-boards/seadint.h
--- 25/include/asm-mips/mips-boards/seadint.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mips-boards/seadint.h 2004-02-19 12:53:02.000000000 -0800
@@ -2,8 +2,6 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
*
- * ########################################################################
- *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
@@ -17,18 +15,13 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
- * ########################################################################
- *
* Defines for the SEAD interrupt controller.
- *
*/
#ifndef _MIPS_SEADINT_H
#define _MIPS_SEADINT_H
-/* Number of IRQ supported */
-#define SEADINT_UART0 0
-#define SEADINT_UART1 1
-#define SEADINT_END 2
+#define SEADINT_UART0 2
+#define SEADINT_UART1 3
extern void seadint_init(void);
diff -puN include/asm-mips/mipsregs.h~mips-megapatch include/asm-mips/mipsregs.h
--- 25/include/asm-mips/mipsregs.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mipsregs.h 2004-02-19 12:53:02.000000000 -0800
@@ -15,6 +15,7 @@
#include <linux/config.h>
#include <linux/linkage.h>
+#include <asm/hazards.h>
/*
* The following macros are especially useful for __asm__
@@ -185,6 +186,20 @@
#endif
/*
+ * Default page size for a given kernel configuration
+ */
+#ifdef CONFIG_PAGE_SIZE_4KB
+#define PM_DEFAULT_MASK PM_4K
+#elif defined(CONFIG_PAGE_SIZE_16KB)
+#define PM_DEFAULT_MASK PM_16K
+#elif defined(CONFIG_PAGE_SIZE_64KB)
+#define PM_DEFAULT_MASK PM_64K
+#else
+#error Bad page size configuration!
+#endif
+
+
+/*
* Values used for computation of new tlb entries
*/
#define PL_4K 12
@@ -578,13 +593,13 @@ do { \
if (sel == 0) \
__asm__ __volatile__( \
"mtc0\t%z0, " #register "\n\t" \
- : : "Jr" (value)); \
+ : : "Jr" ((unsigned int)value)); \
else \
__asm__ __volatile__( \
".set\tmips32\n\t" \
"mtc0\t%z0, " #register ", " #sel "\n\t" \
".set\tmips0" \
- : : "Jr" (value)); \
+ : : "Jr" ((unsigned int)value)); \
} while (0)
#define __write_64bit_c0_register(register, sel, value) \
@@ -821,37 +836,47 @@ do { \
: "=r" (__res)); \
__res;})
-/* TLB operations. */
+/*
+ * TLB operations.
+ */
static inline void tlb_probe(void)
{
+ rm9000_tlb_hazard();
__asm__ __volatile__(
".set noreorder\n\t"
"tlbp\n\t"
".set reorder");
+ rm9000_tlb_hazard();
}
static inline void tlb_read(void)
{
+ rm9000_tlb_hazard();
__asm__ __volatile__(
".set noreorder\n\t"
"tlbr\n\t"
".set reorder");
+ rm9000_tlb_hazard();
}
static inline void tlb_write_indexed(void)
{
+ rm9000_tlb_hazard();
__asm__ __volatile__(
".set noreorder\n\t"
"tlbwi\n\t"
".set reorder");
+ rm9000_tlb_hazard();
}
static inline void tlb_write_random(void)
{
+ rm9000_tlb_hazard();
__asm__ __volatile__(
".set noreorder\n\t"
"tlbwr\n\t"
".set reorder");
+ rm9000_tlb_hazard();
}
/*
@@ -898,6 +923,7 @@ change_c0_##name(unsigned int change, un
__BUILD_SET_C0(status,CP0_STATUS)
__BUILD_SET_C0(cause,CP0_CAUSE)
__BUILD_SET_C0(config,CP0_CONFIG)
+__BUILD_SET_C0(intcontrol,CP0_CONFIG)
#endif /* !__ASSEMBLY__ */
diff -puN include/asm-mips/mmu_context.h~mips-megapatch include/asm-mips/mmu_context.h
--- 25/include/asm-mips/mmu_context.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mmu_context.h 2004-02-19 12:53:02.000000000 -0800
@@ -30,12 +30,12 @@
pgd_current[smp_processor_id()] = (unsigned long)(pgd)
#ifdef CONFIG_MIPS32
#define TLBMISS_HANDLER_SETUP() \
- write_c0_context((unsigned long) smp_processor_id() << (23 + 3)); \
+ write_c0_context((unsigned long) smp_processor_id() << 23); \
TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
#endif
#ifdef CONFIG_MIPS64
#define TLBMISS_HANDLER_SETUP() \
- write_c0_context((unsigned long) smp_processor_id() << 23); \
+ write_c0_context((unsigned long) &pgd_current[smp_processor_id()] << 23); \
TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
#endif
extern unsigned long pgd_current[];
diff -puN include/asm-mips/mmzone.h~mips-megapatch include/asm-mips/mmzone.h
--- 25/include/asm-mips/mmzone.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mmzone.h 2004-02-19 12:53:02.000000000 -0800
@@ -1,94 +1,42 @@
/*
* Written by Kanoj Sarcar (kanoj@sgi.com) Aug 99
+ * Rewritten for Linux 2.6 by Christoph Hellwig (hch@lst.de) Jan 2004
*/
#ifndef _ASM_MMZONE_H_
#define _ASM_MMZONE_H_
-#include <linux/config.h>
-#include <asm/sn/types.h>
-#include <asm/sn/addrs.h>
-#include <asm/sn/arch.h>
-#include <asm/sn/klkernvars.h>
-
-typedef struct plat_pglist_data {
- pg_data_t gendata;
- kern_vars_t kern_vars;
-} plat_pg_data_t;
+#include <asm/page.h>
+#include <mmzone.h>
-/*
- * Following are macros that are specific to this numa platform.
- */
-
-extern int numa_debug(void);
-extern plat_pg_data_t *plat_node_data[];
-
-#define PHYSADDR_TO_NID(pa) NASID_TO_COMPACT_NODEID(NASID_GET(pa))
-#define PLAT_NODE_DATA(n) (plat_node_data[n])
-#define PLAT_NODE_DATA_SIZE(n) (PLAT_NODE_DATA(n)->gendata.node_spanned_pages)
-#define PLAT_NODE_DATA_LOCALNR(p, n) \
- (((p) >> PAGE_SHIFT) - PLAT_NODE_DATA(n)->gendata.node_start_pfn)
-
-#ifdef CONFIG_DISCONTIGMEM
-
-/*
- * Following are macros that each numa implmentation must define.
- */
-
-/*
- * Given a kernel address, find the home node of the underlying memory.
- */
-#define KVADDR_TO_NID(kaddr) \
- ((NASID_TO_COMPACT_NODEID(NASID_GET(__pa(kaddr))) != -1) ? \
- (NASID_TO_COMPACT_NODEID(NASID_GET(__pa(kaddr)))) : \
- (printk("NUMABUG: %s line %d addr 0x%lx", __FILE__, __LINE__, kaddr), \
- numa_debug(), -1))
-
-/*
- * Return a pointer to the node data for node n.
- */
-#define NODE_DATA(n) (&((PLAT_NODE_DATA(n))->gendata))
+extern struct pglist_data *node_data[];
-/*
- * NODE_MEM_MAP gives the kaddr for the mem_map of the node.
- */
-#define NODE_MEM_MAP(nid) (NODE_DATA(nid)->node_mem_map)
-
-/*
- * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
- * and returns the mem_map of that node.
- */
-#define ADDR_TO_MAPBASE(kaddr) \
- NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr)))
-
-/*
- * Given a kaddr, LOCAL_BASE_ADDR finds the owning node of the memory
- * and returns the kaddr corresponding to first physical page in the
- * node's mem_map.
- */
-#define LOCAL_BASE_ADDR(kaddr) ((unsigned long)(kaddr) & ~(NODE_MAX_MEM_SIZE-1))
-
-#define LOCAL_MAP_NR(kvaddr) \
- (((unsigned long)(kvaddr)-LOCAL_BASE_ADDR((kvaddr))) >> PAGE_SHIFT)
-
-#define MIPS64_NR(kaddr) (((unsigned long)(kaddr) > (unsigned long)high_memory)\
- ? (max_mapnr + 1) : (LOCAL_MAP_NR((kaddr)) + \
- (((unsigned long)ADDR_TO_MAPBASE((kaddr)) - PAGE_OFFSET) / \
- sizeof(struct page))))
+#define NODE_DATA(n) (node_data[(n)])
+#define kvaddr_to_nid(kvaddr) pa_to_nid(__pa(kvaddr))
+#define pfn_to_nid(pfn) pa_to_nid((pfn) << PAGE_SHIFT)
+
+#define pfn_valid(pfn) \
+({ \
+ unsigned long __pfn = (pfn); \
+ int __n = pfn_to_nid(__pfn); \
+ ((__n >= 0) ? (__pfn < NODE_DATA(__n)->node_start_pfn + \
+ NODE_DATA(__n)->node_spanned_pages) : 0);\
+})
+
+#define pfn_to_page(pfn) \
+({ \
+ unsigned long __pfn = (pfn); \
+ pg_data_t *__pg = NODE_DATA(pfn_to_nid(__pfn)); \
+ __pg->node_mem_map + (__pfn - __pg->node_start_pfn); \
+})
+
+#define page_to_pfn(p) \
+({ \
+ struct page *__p = (p); \
+ struct zone *__z = page_zone(__p); \
+ ((__p - __z->zone_mem_map) + __z->zone_start_pfn); \
+})
/* XXX: FIXME -- wli */
#define kern_addr_valid(addr) (0)
-#define pfn_to_page(pfn) (mem_map + (pfn))
-#define page_to_pfn(page) \
- ((((page)-(page)->zone->zone_mem_map) + (page)->zone->zone_start_pfn) \
- << PAGE_SHIFT)
-#define virt_to_page(kaddr) pfn_to_page(MIPS64_NR(kaddr))
-
-#define pfn_valid(pfn) ((pfn) < max_mapnr)
-#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
-#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
-#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-
-#endif /* CONFIG_DISCONTIGMEM */
-
#endif /* _ASM_MMZONE_H_ */
diff -puN include/asm-mips/msgbuf.h~mips-megapatch include/asm-mips/msgbuf.h
--- 25/include/asm-mips/msgbuf.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/msgbuf.h 2004-02-19 12:53:02.000000000 -0800
@@ -1,23 +1,41 @@
#ifndef _ASM_MSGBUF_H
#define _ASM_MSGBUF_H
+#include <linux/config.h>
+
/*
- * The msqid64_ds structure for alpha architecture.
+ * The msqid64_ds structure for the MIPS architecture.
* Note extra padding because this structure is passed back and forth
* between kernel and user space.
*
* Pad space is left for:
- * - 2 miscellaneous 64-bit values
+ * - extension of time_t to 64-bit on 32-bitsystem to solve the y2038 problem
+ * - 2 miscellaneous unsigned long values
*/
struct msqid64_ds {
struct ipc64_perm msg_perm;
+#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
+ unsigned long __unused1;
+#endif
__kernel_time_t msg_stime; /* last msgsnd time */
+#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN)
unsigned long __unused1;
+#endif
+#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
+ unsigned long __unused2;
+#endif
__kernel_time_t msg_rtime; /* last msgrcv time */
+#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN)
unsigned long __unused2;
+#endif
+#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
+ unsigned long __unused3;
+#endif
__kernel_time_t msg_ctime; /* last change time */
+#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN)
unsigned long __unused3;
+#endif
unsigned long msg_cbytes; /* current number of bytes on queue */
unsigned long msg_qnum; /* number of messages in queue */
unsigned long msg_qbytes; /* max number of bytes on queue */
diff -puN include/asm-mips/mv64340.h~mips-megapatch include/asm-mips/mv64340.h
--- 25/include/asm-mips/mv64340.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/mv64340.h 2004-02-19 12:53:02.000000000 -0800
@@ -1,18 +1,17 @@
-/*******************************************************************************
-* mv64340.h - MV-64340 Internal registers definition file.
-*
-* Copyright 2002 Momentum Computer, Inc.
-* Copyright 2002 GALILEO TECHNOLOGY, LTD.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*******************************************************************************/
-
-#ifndef __MV64340_H__
-#define __MV64340_H__
+/*
+ * mv64340.h - MV-64340 Internal registers definition file.
+ *
+ * Copyright 2002 Momentum Computer, Inc.
+ * Copyright 2002 GALILEO TECHNOLOGY, LTD.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+#ifndef __ASM_MV64340_H
+#define __ASM_MV64340_H
#include <asm/mv64340_dep.h>
@@ -1034,4 +1033,9 @@
#define MV64340_SERIAL_INIT_CONTROL 0xf328
#define MV64340_SERIAL_INIT_STATUS 0xf32c
-#endif
+struct pci;
+
+extern mv64340_bus0_pci_ops;
+extern mv64340_bus1_pci_ops;
+
+#endif /* __ASM_MV64340_H */
diff -puN include/asm-mips/namei.h~mips-megapatch include/asm-mips/namei.h
--- 25/include/asm-mips/namei.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/namei.h 2004-02-19 12:53:02.000000000 -0800
@@ -1,27 +1,26 @@
-/*
- * Included from linux/fs/namei.c
- */
#ifndef _ASM_NAMEI_H
#define _ASM_NAMEI_H
-#include <linux/config.h>
+#include <linux/personality.h>
+#include <linux/stddef.h>
-/* Only one at this time. */
-#define IRIX32_EMUL "usr/gnemul/irix/"
-
-#ifdef CONFIG_BINFMT_IRIX
+#define IRIX_EMUL "/usr/gnemul/irix/"
+#define RISCOS_EMUL "/usr/gnemul/riscos/"
static inline char *__emul_prefix(void)
{
- if (current->personality != PER_IRIX32)
- return NULL;
- return IRIX32_EMUL;
-}
+ switch (current->personality) {
+ case PER_IRIX32:
+ case PER_IRIXN32:
+ case PER_IRIX64:
+ return IRIX_EMUL;
-#else /* !defined(CONFIG_BINFMT_IRIX) */
+ case PER_RISCOS:
+ return RISCOS_EMUL;
-#define __emul_prefix() NULL
-
-#endif /* !defined(CONFIG_BINFMT_IRIX) */
+ default:
+ return NULL;
+ }
+}
#endif /* _ASM_NAMEI_H */
diff -puN /dev/null include/asm-mips/numnodes.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/numnodes.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,7 @@
+#ifndef _ASM_MAX_NUMNODES_H
+#define _ASM_MAX_NUMNODES_H
+
+/* Max 128 Nodes */
+#define NODES_SHIFT 7
+
+#endif /* _ASM_MAX_NUMNODES_H */
diff -puN include/asm-mips/page-32.h~mips-megapatch include/asm-mips/page-32.h
--- 25/include/asm-mips/page-32.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/page-32.h 2004-02-19 12:53:02.000000000 -0800
@@ -9,14 +9,11 @@
#ifndef _ASM_PAGE_32_H
#define _ASM_PAGE_32_H
-#include <linux/config.h>
-
/*
* This handles the memory map.
* We handle pages at KSEG0 for kernels with 32 bit address space.
*/
#define PAGE_OFFSET 0x80000000UL
-#define UNCAC_BASE 0xa0000000UL
/*
* Memory above this physical address will be considered highmem.
diff -puN include/asm-mips/page-64.h~mips-megapatch include/asm-mips/page-64.h
--- 25/include/asm-mips/page-64.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/page-64.h 2004-02-19 12:53:02.000000000 -0800
@@ -14,13 +14,12 @@
/*
* This handles the memory map.
*/
-#ifdef CONFIG_NONCOHERENT_IO
+#ifdef CONFIG_DMA_NONCOHERENT
#define PAGE_OFFSET 0x9800000000000000UL
#else
#define PAGE_OFFSET 0xa800000000000000UL
#endif
-
/*
* Memory above this physical address will be considered highmem.
* Fixme: 59 bits is a fictive number and makes assumptions about processors
diff -puN include/asm-mips/page.h~mips-megapatch include/asm-mips/page.h
--- 25/include/asm-mips/page.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/page.h 2004-02-19 12:53:02.000000000 -0800
@@ -18,20 +18,27 @@
#include <asm/page-64.h>
#endif
-/* PAGE_SHIFT determines the page size */
+#ifdef __KERNEL__
+
+/*
+ * PAGE_SHIFT determines the page size
+ */
+#ifdef CONFIG_PAGE_SIZE_4KB
#define PAGE_SHIFT 12
+#endif
+#ifdef CONFIG_PAGE_SIZE_16KB
+#define PAGE_SHIFT 14
+#endif
+#ifdef CONFIG_PAGE_SIZE_64KB
+#define PAGE_SHIFT 16
+#endif
#define PAGE_SIZE (1UL << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1))
-#ifdef __KERNEL__
-
#ifndef __ASSEMBLY__
-extern void (*_clear_page)(void * page);
-extern void (*_copy_page)(void * to, void * from);
-
-#define clear_page(addr) _clear_page((void *)(addr))
-#define copy_page(to, from) _copy_page((void *)(to), (void *)(from))
+extern void clear_page(void * page);
+extern void copy_page(void * to, void * from);
extern unsigned long shm_align_mask;
@@ -114,12 +121,12 @@ static __inline__ int get_order(unsigned
#ifndef CONFIG_DISCONTIGMEM
#define pfn_to_page(pfn) (mem_map + (pfn))
#define page_to_pfn(page) ((unsigned long)((page) - mem_map))
-#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
-
#define pfn_valid(pfn) ((pfn) < max_mapnr)
-#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
#endif
+#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
+#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
+
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
diff -puN include/asm-mips/param.h~mips-megapatch include/asm-mips/param.h
--- 25/include/asm-mips/param.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/param.h 2004-02-19 12:53:02.000000000 -0800
@@ -11,18 +11,7 @@
#ifdef __KERNEL__
-#include <linux/config.h>
-
-#ifdef CONFIG_DECSTATION
- /*
- * log2(HZ), change this here if you want another HZ value. This is also
- * used in dec_time_init. Minimum is 1, Maximum is 15.
- */
-# define LOG_2_HZ 7
-# define HZ (1 << LOG_2_HZ)
-#else
-# define HZ 1000 /* Internal kernel timer frequency */
-#endif
+# include <param.h> /* Internal kernel timer frequency */
# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
#endif
@@ -31,7 +20,7 @@
#define HZ 100
#endif
-#define EXEC_PAGESIZE 4096
+#define EXEC_PAGESIZE 65536
#ifndef NOGROUP
#define NOGROUP (-1)
diff -puN -L include/asm-mips/pb1000.h include/asm-mips/pb1000.h~mips-megapatch /dev/null
--- 25/include/asm-mips/pb1000.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,172 +0,0 @@
-/*
- * Alchemy Semi PB1000 Referrence Board
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- *
- */
-#ifndef __ASM_PB1000_H
-#define __ASM_PB1000_H
-
-/* PCMCIA PB1000 specific defines */
-#define PCMCIA_MAX_SOCK 1
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
-
-#define PB1000_PCR 0xBE000000
- #define PCR_SLOT_0_VPP0 (1<<0)
- #define PCR_SLOT_0_VPP1 (1<<1)
- #define PCR_SLOT_0_VCC0 (1<<2)
- #define PCR_SLOT_0_VCC1 (1<<3)
- #define PCR_SLOT_0_RST (1<<4)
-
- #define PCR_SLOT_1_VPP0 (1<<8)
- #define PCR_SLOT_1_VPP1 (1<<9)
- #define PCR_SLOT_1_VCC0 (1<<10)
- #define PCR_SLOT_1_VCC1 (1<<11)
- #define PCR_SLOT_1_RST (1<<12)
-
-#define PB1000_MDR 0xBE000004
- #define MDR_PI (1<<5) /* pcmcia int latch */
- #define MDR_EPI (1<<14) /* enable pcmcia int */
- #define MDR_CPI (1<<15) /* clear pcmcia int */
-
-#define PB1000_ACR1 0xBE000008
- #define ACR1_SLOT_0_CD1 (1<<0) /* card detect 1 */
- #define ACR1_SLOT_0_CD2 (1<<1) /* card detect 2 */
- #define ACR1_SLOT_0_READY (1<<2) /* ready */
- #define ACR1_SLOT_0_STATUS (1<<3) /* status change */
- #define ACR1_SLOT_0_VS1 (1<<4) /* voltage sense 1 */
- #define ACR1_SLOT_0_VS2 (1<<5) /* voltage sense 2 */
- #define ACR1_SLOT_0_INPACK (1<<6) /* inpack pin status */
- #define ACR1_SLOT_1_CD1 (1<<8) /* card detect 1 */
- #define ACR1_SLOT_1_CD2 (1<<9) /* card detect 2 */
- #define ACR1_SLOT_1_READY (1<<10) /* ready */
- #define ACR1_SLOT_1_STATUS (1<<11) /* status change */
- #define ACR1_SLOT_1_VS1 (1<<12) /* voltage sense 1 */
- #define ACR1_SLOT_1_VS2 (1<<13) /* voltage sense 2 */
- #define ACR1_SLOT_1_INPACK (1<<14) /* inpack pin status */
-
-#define CPLD_AUX0 0xBE00000C
-#define CPLD_AUX1 0xBE000010
-#define CPLD_AUX2 0xBE000014
-
-/* Voltage levels */
-
-/* VPPEN1 - VPPEN0 */
-#define VPP_GND ((0<<1) | (0<<0))
-#define VPP_5V ((1<<1) | (0<<0))
-#define VPP_3V ((0<<1) | (1<<0))
-#define VPP_12V ((0<<1) | (1<<0))
-#define VPP_HIZ ((1<<1) | (1<<0))
-
-/* VCCEN1 - VCCEN0 */
-#define VCC_3V ((0<<1) | (1<<0))
-#define VCC_5V ((1<<1) | (0<<0))
-#define VCC_HIZ ((0<<1) | (0<<0))
-
-/* VPP/VCC */
-#define SET_VCC_VPP(VCC, VPP, SLOT)\
- ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
-
-
-/* PCI PB1000 specific defines */
-/* The reason these defines are here instead of au1000.h is because
- * the Au1000 does not have a PCI bus controller so the PCI implementation
- * on the some of the older Pb1000 boards was very board specific.
- */
-#define PCI_CONFIG_BASE 0xBA020000 /* the only external slot */
-
-#define SDRAM_DEVID 0xBA010000
-#define SDRAM_CMD 0xBA010004
-#define SDRAM_CLASS 0xBA010008
-#define SDRAM_MISC 0xBA01000C
-#define SDRAM_MBAR 0xBA010010
-
-#define PCI_IO_DATA_PORT 0xBA800000
-
-#define PCI_IO_ADDR 0xBE00001C
-#define PCI_INT_ACK 0xBBC00000
-#define PCI_IO_READ 0xBBC00020
-#define PCI_IO_WRITE 0xBBC00030
-
-#define PCI_BRIDGE_CONFIG 0xBE000018
-
-#define PCI_IO_START 0x10000000
-#define PCI_IO_END 0x1000ffff
-#define PCI_MEM_START 0x18000000
-#define PCI_MEM_END 0x18ffffff
-
-#define PCI_FIRST_DEVFN 0
-#define PCI_LAST_DEVFN 1
-
-static inline u8 au_pci_io_readb(u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG);
- return (readl(PCI_IO_DATA_PORT) & 0xff);
-}
-
-static inline u16 au_pci_io_readw(u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG);
- return (readl(PCI_IO_DATA_PORT) & 0xffff);
-}
-
-static inline u32 au_pci_io_readl(u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff), PCI_BRIDGE_CONFIG);
- return readl(PCI_IO_DATA_PORT);
-}
-
-static inline void au_pci_io_writeb(u8 val, u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG);
- writel(val, PCI_IO_DATA_PORT);
-}
-
-static inline void au_pci_io_writew(u16 val, u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG);
- writel(val, PCI_IO_DATA_PORT);
-}
-
-static inline void au_pci_io_writel(u32 val, u32 addr)
-{
- writel(addr, PCI_IO_ADDR);
- writel(readl(PCI_BRIDGE_CONFIG) & 0xffffcfff, PCI_BRIDGE_CONFIG);
- writel(val, PCI_IO_DATA_PORT);
-}
-
-static inline void set_sdram_extbyte(void)
-{
- writel(readl(PCI_BRIDGE_CONFIG) & 0xffffff00, PCI_BRIDGE_CONFIG);
-}
-
-static inline void set_slot_extbyte(void)
-{
- writel((readl(PCI_BRIDGE_CONFIG) & 0xffffbf00) | 0x18, PCI_BRIDGE_CONFIG);
-}
-#endif /* __ASM_PB1000_H */
diff -puN -L include/asm-mips/pb1100.h include/asm-mips/pb1100.h~mips-megapatch /dev/null
--- 25/include/asm-mips/pb1100.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,85 +0,0 @@
-/*
- * Alchemy Semi PB1100 Referrence Board
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- *
- */
-#ifndef __ASM_PB1100_H
-#define __ASM_PB1100_H
-
-#define PB1100_IDENT 0xAE000000
-#define BOARD_STATUS_REG 0xAE000004
- #define PB1100_ROM_SEL (1<<15)
- #define PB1100_ROM_SIZ (1<<14)
- #define PB1100_SWAP_BOOT (1<<13)
- #define PB1100_FLASH_WP (1<<12)
- #define PB1100_ROM_H_STS (1<<11)
- #define PB1100_ROM_L_STS (1<<10)
- #define PB1100_FLASH_H_STS (1<<9)
- #define PB1100_FLASH_L_STS (1<<8)
- #define PB1100_SRAM_SIZ (1<<7)
- #define PB1100_TSC_BUSY (1<<6)
- #define PB1100_PCMCIA_VS_MASK (3<<4)
- #define PB1100_RS232_CD (1<<3)
- #define PB1100_RS232_CTS (1<<2)
- #define PB1100_RS232_DSR (1<<1)
- #define PB1100_RS232_RI (1<<0)
-
-#define PB1100_IRDA_RS232 0xAE00000C
- #define PB1100_IRDA_FULL (0<<14) /* full power */
- #define PB1100_IRDA_SHUTDOWN (1<<14)
- #define PB1100_IRDA_TT (2<<14) /* 2/3 power */
- #define PB1100_IRDA_OT (3<<14) /* 1/3 power */
- #define PB1100_IRDA_FIR (1<<13)
-
-#define PCMCIA_BOARD_REG 0xAE000010
- #define PB1100_SD_WP1_RO (1<<15) /* read only */
- #define PB1100_SD_WP0_RO (1<<14) /* read only */
- #define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */
- #define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */
- #define PB1100_SEL_SD_CONN1 (1<<9)
- #define PB1100_SEL_SD_CONN0 (1<<8)
- #define PC_DEASSERT_RST (1<<7)
- #define PC_DRV_EN (1<<4)
-
-#define PB1100_G_CONTROL 0xAE000014 /* graphics control */
-
-#define PB1100_RST_VDDI 0xAE00001C
- #define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */
- #define PB1100_VDDI_MASK (0x1F)
-
-#define PB1100_LEDS 0xAE000018
-
-/* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED.
- * 7:0 is the LED Display's decimal points.
- */
-#define PB1100_HEX_LED 0xAE000018
-
-/* PCMCIA PB1100 specific defines */
-#define PCMCIA_MAX_SOCK 0
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
-
-/* VPP/VCC */
-#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0))
-
-#endif /* __ASM_PB1100_H */
diff -puN -L include/asm-mips/pb1500.h include/asm-mips/pb1500.h~mips-megapatch /dev/null
--- 25/include/asm-mips/pb1500.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,51 +0,0 @@
-/*
- * Alchemy Semi PB1500 Referrence Board
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ppopov@mvista.com or source@mvista.com
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- *
- */
-#ifndef __ASM_PB1500_H
-#define __ASM_PB1500_H
-
-
-#define IDENT_BOARD_REG 0xAE000000
-#define BOARD_STATUS_REG 0xAE000004
-#define PCI_BOARD_REG 0xAE000010
-#define PCMCIA_BOARD_REG 0xAE000010
- #define PC_DEASSERT_RST 0x80
- #define PC_DRV_EN 0x10
-#define PB1500_G_CONTROL 0xAE000014
-#define PB1500_RST_VDDI 0xAE00001C
-#define PB1500_LEDS 0xAE000018
-
-#define PB1500_HEX_LED 0xAF000004
-#define PB1500_HEX_LED_BLANK 0xAF000008
-
-/* PCMCIA PB1500 specific defines */
-#define PCMCIA_MAX_SOCK 0
-#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
-
-/* VPP/VCC */
-#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0))
-
-#endif /* __ASM_PB1500_H */
diff -puN include/asm-mips/pci/bridge.h~mips-megapatch include/asm-mips/pci/bridge.h
--- 25/include/asm-mips/pci/bridge.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/pci/bridge.h 2004-02-19 12:53:02.000000000 -0800
@@ -13,6 +13,7 @@
#define _ASM_PCI_BRIDGE_H
#include <linux/types.h>
+#include <asm/pci_channel.h>
#include <asm/xtalk/xwidget.h> /* generic widget header */
/* I/O page size */
@@ -388,9 +389,11 @@ typedef struct bridge_err_cmdword_s {
/* Widget part number of bridge */
#define BRIDGE_WIDGET_PART_NUM 0xc002
+#define XBRIDGE_WIDGET_PART_NUM 0xd002
/* Manufacturer of bridge */
#define BRIDGE_WIDGET_MFGR_NUM 0x036
+#define XBRIDGE_WIDGET_MFGR_NUM 0x024
/* Revision numbers for known Bridge revisions */
#define BRIDGE_REV_A 0x1
@@ -827,11 +830,19 @@ typedef union ate_u {
#define BRIDGE_INTERNAL_ATES 128
-/*
- * Linux pci bus mappings to sn physical id's
- */
-extern unsigned char bus_to_wid[]; /* widget id for linux pci bus */
-extern unsigned char bus_to_nid[]; /* nasid for linux pci bus */
-extern unsigned char num_bridges; /* number of bridges in the system */
+
+struct bridge_controller {
+ struct pci_controller pc;
+ struct resource mem;
+ struct resource io;
+ bridge_t *base;
+ nasid_t nasid;
+ unsigned int widget_id;
+ unsigned int irq_cpu;
+ dma64_addr_t baddr;
+};
+
+#define BRIDGE_CONTROLLER(bus) \
+ ((struct bridge_controller *)((bus)->sysdata))
#endif /* _ASM_PCI_BRIDGE_H */
diff -puN include/asm-mips/pci_channel.h~mips-megapatch include/asm-mips/pci_channel.h
--- 25/include/asm-mips/pci_channel.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/pci_channel.h 2004-02-19 12:53:02.000000000 -0800
@@ -15,27 +15,32 @@
* multiple PCI channels may have multiple PCI host controllers or a
* single controller supporting multiple channels.
*/
-struct pci_channel {
+struct pci_controller {
+ struct pci_controller *next;
+ struct pci_bus *bus;
+
struct pci_ops *pci_ops;
- struct resource *io_resource;
struct resource *mem_resource;
- int first_devfn;
- int last_devfn;
+ unsigned long mem_offset;
+ struct resource *io_resource;
+ unsigned long io_offset;
+
+ /* For compatibility with current (as of July 2003) pciutils
+ and XFree86. Eventually will be removed. */
+ unsigned int need_domain_info;
+
+ int iommu;
};
/*
- * each board defines an array of pci_channels, that ends with all NULL entry
+ * Used by boards to register their PCI interfaces before the actual scanning.
*/
-extern struct pci_channel mips_pci_channels[];
+extern struct pci_controller * alloc_pci_controller(void);
+extern void register_pci_controller(struct pci_controller *hose);
/*
* board supplied pci irq fixup routine
*/
-extern void pcibios_fixup_irqs(void);
-
-/*
- * board supplied pci fixup routines
- */
-extern void pcibios_fixup_resources(struct pci_dev *dev);
+extern int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
#endif /* __ASM_PCI_CHANNEL_H */
diff -puN include/asm-mips/pci.h~mips-megapatch include/asm-mips/pci.h
--- 25/include/asm-mips/pci.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/pci.h 2004-02-19 12:53:02.000000000 -0800
@@ -15,20 +15,16 @@
already-configured bus numbers - to be used for buggy BIOSes
or architectures with incomplete PCI setup by the loader */
-#ifdef CONFIG_PCI
extern unsigned int pcibios_assign_all_busses(void);
-#else
-#define pcibios_assign_all_busses() 0
-#endif
+
#define pcibios_scan_all_fns(a, b) 0
-#define PCIBIOS_MIN_IO 0x1000
-#define PCIBIOS_MIN_MEM 0x10000000
+extern unsigned long PCIBIOS_MIN_IO;
+extern unsigned long PCIBIOS_MIN_MEM;
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
- /* No special bus mastering setup handling */
-}
+#define PCIBIOS_MIN_CARDBUS_IO 0x4000
+
+extern void pcibios_set_master(struct pci_dev *dev);
static inline void pcibios_penalize_isa_irq(int irq)
{
@@ -46,21 +42,14 @@ static inline void pcibios_penalize_isa_
#include <linux/string.h>
#include <asm/io.h>
-#if defined(CONFIG_DDB5074) || defined(CONFIG_DDB5476)
-#undef PCIBIOS_MIN_IO
-#undef PCIBIOS_MIN_MEM
-#define PCIBIOS_MIN_IO 0x0100000
-#define PCIBIOS_MIN_MEM 0x1000000
-#endif
-
struct pci_dev;
/*
* The PCI address space does equal the physical memory address space. The
* networking and block device layers use this boolean for bounce buffer
- * decisions.
+ * decisions. This is set if any hose does not have an IOMMU.
*/
-#define PCI_DMA_BUS_IS_PHYS (1)
+extern unsigned int PCI_DMA_BUS_IS_PHYS;
#ifdef CONFIG_MAPPED_DMA_IO
@@ -87,49 +76,22 @@ struct pci_dev;
/* This is always fine. */
#define pci_dac_dma_supported(pci_dev, mask) (1)
-static inline dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
- struct page *page, unsigned long offset, int direction)
-{
- dma64_addr_t addr = page_to_phys(page) + offset;
-
- return (dma64_addr_t) bus_to_baddr(pdev->bus, addr);
-}
-
-static inline struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
- dma64_addr_t dma_addr)
-{
- unsigned long poff = baddr_to_bus(pdev->bus, dma_addr) >> PAGE_SHIFT;
-
- return mem_map + poff;
-}
-
-static inline unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
- dma64_addr_t dma_addr)
-{
- return dma_addr & ~PAGE_MASK;
-}
-
-static inline void pci_dac_dma_sync_single(struct pci_dev *pdev,
- dma64_addr_t dma_addr, size_t len, int direction)
-{
- unsigned long addr;
-
- BUG_ON(direction == PCI_DMA_NONE);
-
- addr = baddr_to_bus(pdev->bus, dma_addr) + PAGE_OFFSET;
- dma_cache_wback_inv(addr, len);
-}
-
-static inline void pcibios_add_platform_entries(struct pci_dev *dev)
-{
-}
+extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
+ struct page *page, unsigned long offset, int direction);
+extern struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
+ dma64_addr_t dma_addr);
+extern unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
+ dma64_addr_t dma_addr);
+extern void pci_dac_dma_sync_single(struct pci_dev *pdev,
+ dma64_addr_t dma_addr, size_t len, int direction);
#endif /* __KERNEL__ */
/* implement the pci_ DMA API in terms of the generic device dma_ one */
#include <asm-generic/pci-dma-compat.h>
-/* generic pci stuff */
-#include <asm-generic/pci.h>
+static inline void pcibios_add_platform_entries(struct pci_dev *dev)
+{
+}
#endif /* _ASM_PCI_H */
diff -puN include/asm-mips/pgalloc.h~mips-megapatch include/asm-mips/pgalloc.h
--- 25/include/asm-mips/pgalloc.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/pgalloc.h 2004-02-19 12:53:02.000000000 -0800
@@ -86,7 +86,6 @@ static inline void pte_free(struct page
}
#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
-#define __pmd_free_tlb(tlb,x) do { } while (0)
#ifdef CONFIG_MIPS32
#define pgd_populate(mm, pmd, pte) BUG()
@@ -97,6 +96,7 @@ static inline void pte_free(struct page
*/
#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
#define pmd_free(x) do { } while (0)
+#define __pmd_free_tlb(tlb,x) do { } while (0)
#endif
#ifdef CONFIG_MIPS64
@@ -118,6 +118,8 @@ static inline void pmd_free(pmd_t *pmd)
free_pages((unsigned long)pmd, PMD_ORDER);
}
+#define __pmd_free_tlb(tlb,x) pmd_free(x)
+
#endif
/*
diff -puN include/asm-mips/pgtable-32.h~mips-megapatch include/asm-mips/pgtable-32.h
--- 25/include/asm-mips/pgtable-32.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/pgtable-32.h 2004-02-19 12:53:02.000000000 -0800
@@ -60,21 +60,19 @@ extern int add_temporary_entry(unsigned
* we don't really have any PMD directory physically.
*/
#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PTRS_PER_PTE 512
-#define PTRS_PER_PMD 1
-#define PTRS_PER_PGD 2048
#define PGD_ORDER 1
#define PMD_ORDER 0
#define PTE_ORDER 0
#else
-#define PTRS_PER_PTE 1024
-#define PTRS_PER_PMD 1
-#define PTRS_PER_PGD 1024
#define PGD_ORDER 0
#define PMD_ORDER 0
#define PTE_ORDER 0
#endif
+#define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
+#define PTRS_PER_PMD 1
+#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
+
#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE)
#define FIRST_USER_PGD_NR 0
@@ -133,8 +131,15 @@ static inline int pgd_present(pgd_t pgd)
static inline void pgd_clear(pgd_t *pgdp) { }
#define pte_page(x) pfn_to_page(pte_pfn(x))
+
+
+#ifdef CONFIG_CPU_VR41XX
+#define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
+#define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
+#else
#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
+#endif
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
@@ -195,9 +200,6 @@ static inline pmd_t *pmd_offset(pgd_t *d
#define pte_unmap(pte) ((void)(pte))
#define pte_unmap_nested(pte) ((void)(pte))
-extern pgd_t swapper_pg_dir[1024];
-extern void paging_init(void);
-
/* Swap entries must have VALID and GLOBAL bits cleared. */
#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
diff -puN include/asm-mips/pgtable-64.h~mips-megapatch include/asm-mips/pgtable-64.h
--- 25/include/asm-mips/pgtable-64.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/pgtable-64.h 2004-02-19 12:53:02.000000000 -0800
@@ -10,13 +10,10 @@
#define _ASM_PGTABLE_64_H
#include <linux/config.h>
+#include <linux/linkage.h>
+
#include <asm/addrspace.h>
#include <asm/page.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/linkage.h>
-#include <linux/mmzone.h>
#include <asm/cachectl.h>
/*
@@ -39,8 +36,6 @@
* vmalloc range translations, which the fault handler looks at.
*/
-#endif /* !__ASSEMBLY__ */
-
/* PMD_SHIFT determines the size of the area a second-level page table can map */
#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3))
#define PMD_SIZE (1UL << PMD_SHIFT)
@@ -51,14 +46,39 @@
#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
#define PGDIR_MASK (~(PGDIR_SIZE-1))
-/* Entries per page directory level: we use two-level, so we don't really
- have any PMD directory physically. */
-#define PTRS_PER_PGD 1024
-#define PTRS_PER_PMD 1024
-#define PTRS_PER_PTE 512
+/*
+ * For 4kB page size we use a 3 level page tree and a 8kB pmd and pgds which
+ * permits us mapping 40 bits of virtual address space.
+ *
+ * We used to implement 41 bits by having an order 1 pmd level but that seemed
+ * rather pointless.
+ *
+ * For 16kB page size we use a 2 level page tree which permit a total of
+ * 36 bits of virtual address space. We could add a third leve. but it seems
+ * like at the moment there's no need for this.
+ *
+ * For 64kB page size we use a 2 level page table tree for a total of 42 bits
+ * of virtual address space.
+ */
+#ifdef CONFIG_PAGE_SIZE_4KB
#define PGD_ORDER 1
#define PMD_ORDER 1
#define PTE_ORDER 0
+#endif
+#ifdef CONFIG_PAGE_SIZE_16KB
+#define PGD_ORDER 0
+#define PMD_ORDER 0
+#define PTE_ORDER 0
+#endif
+#ifdef CONFIG_PAGE_SIZE_64KB
+#define PGD_ORDER 0
+#define PMD_ORDER 0
+#define PTE_ORDER 0
+#endif
+
+#define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
+#define PTRS_PER_PMD ((PAGE_SIZE << PMD_ORDER) / sizeof(pmd_t))
+#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
#define FIRST_USER_PGD_NR 0
@@ -67,8 +87,6 @@
#define VMALLOC_END \
(VMALLOC_START + ((1 << PGD_ORDER) * PTRS_PER_PTE * PAGE_SIZE))
-#ifndef __ASSEMBLY__
-
#define pte_ERROR(e) \
printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
#define pmd_ERROR(e) \
@@ -121,13 +139,11 @@ static inline void pgd_clear(pgd_t *pgdp
pgd_val(*pgdp) = ((unsigned long) invalid_pmd_table);
}
-#ifdef CONFIG_DISCONTIGMEM
-
-#define pte_page(x) (NODE_MEM_MAP(PHYSADDR_TO_NID(pte_val(x))) + \
- PLAT_NODE_DATA_LOCALNR(pte_val(x), PHYSADDR_TO_NID(pte_val(x))))
-
+#define pte_page(x) pfn_to_page((unsigned long)((pte_val(x) >> PAGE_SHIFT)))
+#ifdef CONFIG_CPU_VR41XX
+#define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
+#define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
#else
-#define pte_page(x) (mem_map+(unsigned long)((pte_val(x) >> PAGE_SHIFT)))
#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
#endif
@@ -185,9 +201,6 @@ static inline pmd_t *pmd_offset(pgd_t *
extern void pgd_init(unsigned long page);
extern void pmd_init(unsigned long page, unsigned long pagetable);
-extern pgd_t swapper_pg_dir[1024];
-extern void paging_init(void);
-
/*
* Non-present pages: high 24 bits are offset, next 8 bits type,
* low 32 bits zero.
@@ -203,6 +216,4 @@ static inline pte_t mk_swap_pte(unsigned
typedef pte_t *pte_addr_t;
-#endif /* !__ASSEMBLY__ */
-
#endif /* _ASM_PGTABLE_64_H */
diff -puN include/asm-mips/pgtable-bits.h~mips-megapatch include/asm-mips/pgtable-bits.h
--- 25/include/asm-mips/pgtable-bits.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/pgtable-bits.h 2004-02-19 12:53:02.000000000 -0800
@@ -91,7 +91,7 @@
#ifdef CONFIG_MIPS_UNCACHED
#define PAGE_CACHABLE_DEFAULT _CACHE_UNCACHED
-#elif defined(CONFIG_NONCOHERENT_IO)
+#elif defined(CONFIG_DMA_NONCOHERENT)
#define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_NONCOHERENT
#else
#define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW
diff -puN include/asm-mips/pgtable.h~mips-megapatch include/asm-mips/pgtable.h
--- 25/include/asm-mips/pgtable.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/pgtable.h 2004-02-19 12:53:02.000000000 -0800
@@ -9,7 +9,6 @@
#define _ASM_PGTABLE_H
#include <linux/config.h>
-
#ifdef CONFIG_MIPS32
#include <asm/pgtable-32.h>
#endif
@@ -67,6 +66,8 @@ extern unsigned long zero_page_mask;
#define ZERO_PAGE(vaddr) \
(virt_to_page(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask)))
+extern void paging_init(void);
+
/*
* Conversion functions: convert a page and protection to a page entry,
* and a page entry and page directory to the page they refer to.
@@ -118,6 +119,11 @@ static inline void pte_clear(pte_t *ptep
#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
#define set_pgd(pgdptr, pgdval) do { *(pgdptr) = (pgdval); } while(0)
+#define PGD_T_LOG2 ffz(~sizeof(pgd_t))
+#define PMD_T_LOG2 ffz(~sizeof(pmd_t))
+#define PTE_T_LOG2 ffz(~sizeof(pte_t))
+
+extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
#define PTE_FILE_MAX_BITS 27
diff -puN /dev/null include/asm-mips/prefetch.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/prefetch.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,43 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 by Ralf Baechle
+ */
+#ifndef __ASM_PREFETCH_H
+#define __ASM_PREFETCH_H
+
+/*
+ * R5000 and RM5200 implements pref and prefx instructions but they're nops, so
+ * rather than wasting time we pretend these processors don't support
+ * prefetching at all.
+ *
+ * R5432 implements Load, Store, LoadStreamed, StoreStreamed, LoadRetained,
+ * StoreRetained and WriteBackInvalidate but not Pref_PrepareForStore.
+ *
+ * Hell (and the book on my shelf I can't open ...) know what the R8000 does.
+ *
+ * RM7000 version 1.0 interprets all hints as Pref_Load; version 2.0 implements
+ * Pref_PrepareForStore also.
+ *
+ * RM9000 is MIPS IV but implements prefetching like MIPS32/MIPS64;
+ * it's Pref_WriteBackInvalidate is a nop.
+ *
+ * VR7701 only implements the Load prefetch.
+ *
+ * Finally MIPS32 and MIPS64 implement all of the following hints.
+ */
+
+#define Pref_Load 0
+#define Pref_Store 1
+ /* 2 and 3 are reserved */
+#define Pref_LoadStreamed 4
+#define Pref_StoreStreamed 5
+#define Pref_LoadRetained 6
+#define Pref_StoreRetained 7
+ /* 8 ... 24 are reserved */
+#define Pref_WriteBackInvalidate 25
+#define Pref_PrepareForStore 30
+
+#endif /* __ASM_PREFETCH_H */
diff -puN include/asm-mips/processor.h~mips-megapatch include/asm-mips/processor.h
--- 25/include/asm-mips/processor.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/processor.h 2004-02-19 12:53:02.000000000 -0800
@@ -12,21 +12,15 @@
#define _ASM_PROCESSOR_H
#include <linux/config.h>
-
-/*
- * Return current * instruction pointer ("program counter").
- */
-#define current_text_addr() ({ __label__ _l; _l: &&_l;})
-
-#ifndef __ASSEMBLY__
#include <linux/cache.h>
#include <linux/threads.h>
#include <asm/cachectl.h>
+#include <asm/cpu.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
-#if defined(CONFIG_SGI_IP27)
+#ifdef CONFIG_SGI_IP27
#include <asm/sn/types.h>
#include <asm/sn/intr_public.h>
#endif
@@ -55,11 +49,11 @@ struct cpuinfo_mips {
unsigned long udelay_val;
unsigned long asid_cache;
#if defined(CONFIG_SGI_IP27)
- cpuid_t p_cpuid; /* PROM assigned cpuid */
+// cpuid_t p_cpuid; /* PROM assigned cpuid */
cnodeid_t p_nodeid; /* my node ID in compact-id-space */
nasid_t p_nasid; /* my node ID in numa-as-id-space */
unsigned char p_slice; /* Physical position on node board */
- hub_intmasks_t p_intmasks; /* SN0 per-CPU interrupt masks */
+ struct hub_intmasks_s p_intmasks; /* SN0 per-CPU interrupt masks */
#endif
#if 0
unsigned long loops_per_sec;
@@ -85,40 +79,6 @@ struct cpuinfo_mips {
struct cache_desc tcache; /* Tertiary/split secondary cache */
} __attribute__((aligned(SMP_CACHE_BYTES)));
-/*
- * Assumption: Options of CPU 0 are a superset of all processors.
- * This is true for all known MIPS systems.
- */
-#define cpu_has_tlb (cpu_data[0].options & MIPS_CPU_TLB)
-#define cpu_has_4kex (cpu_data[0].options & MIPS_CPU_4KEX)
-#define cpu_has_4ktlb (cpu_data[0].options & MIPS_CPU_4KTLB)
-#define cpu_has_fpu (cpu_data[0].options & MIPS_CPU_FPU)
-#define cpu_has_32fpr (cpu_data[0].options & MIPS_CPU_32FPR)
-#define cpu_has_counter (cpu_data[0].options & MIPS_CPU_COUNTER)
-#define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH)
-#define cpu_has_mips16 (cpu_data[0].options & MIPS_CPU_MIPS16)
-#define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC)
-#define cpu_has_vce (cpu_data[0].options & MIPS_CPU_VCE)
-#define cpu_has_cache_cdex (cpu_data[0].options & MIPS_CPU_CACHE_CDEX)
-#define cpu_has_mcheck (cpu_data[0].options & MIPS_CPU_MCHECK)
-#define cpu_has_ejtag (cpu_data[0].options & MIPS_CPU_EJTAG)
-/* no FPU exception; never set on 64-bit */
-#ifdef CONFIG_MIPS64
-#define cpu_has_nofpuex 0
-#else
-#define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
-#endif
-#define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC)
-#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
-#define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES)
-#define cpu_has_ic_fills_f_dc (cpu_data[0].dcache.flags & MIPS_CACHE_IC_F_DC)
-#ifdef CONFIG_MIPS64
-#define cpu_has_64bits 1
-#else
-#define cpu_has_64bits (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
-#endif
-#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES)
-
extern struct cpuinfo_mips cpu_data[];
#define current_cpu_data cpu_data[smp_processor_id()]
@@ -126,6 +86,11 @@ extern void cpu_probe(void);
extern void cpu_report(void);
/*
+ * Return current * instruction pointer ("program counter").
+ */
+#define current_text_addr() ({ __label__ _l; _l: &&_l;})
+
+/*
* System setup and hardware flags..
*/
extern void (*cpu_wait)(void);
@@ -244,8 +209,6 @@ struct thread_struct {
#define MF_N32 MF_32BIT_ADDR
#define MF_N64 0
-#endif /* !__ASSEMBLY__ */
-
#define INIT_THREAD { \
/* \
* saved main processor registers \
@@ -271,7 +234,6 @@ struct thread_struct {
}
#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
struct task_struct;
@@ -300,7 +262,6 @@ unsigned long get_wchan(struct task_stru
#define cpu_relax() barrier()
-#endif /* !__ASSEMBLY__ */
#endif /* __KERNEL__ */
/*
@@ -317,4 +278,13 @@ unsigned long get_wchan(struct task_stru
*/
#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
+/*
+ * For now. The 32-bit cycle counter is screwed up so solving this nicely takes a little
+ * brainwork ...
+ */
+static inline unsigned long long sched_clock(void)
+{
+ return 0ULL;
+}
+
#endif /* _ASM_PROCESSOR_H */
diff -puN include/asm-mips/ptrace.h~mips-megapatch include/asm-mips/ptrace.h
--- 25/include/asm-mips/ptrace.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/ptrace.h 2004-02-19 12:53:02.000000000 -0800
@@ -23,8 +23,6 @@
#define FPC_CSR 69
#define FPC_EIR 70
-#ifndef __ASSEMBLY__
-
/*
* This struct defines the way the registers are stored on the stack during a
* system call/exception. As usual the registers k0/k1 aren't being saved.
@@ -38,21 +36,15 @@ struct pt_regs {
/* Saved main processor registers. */
unsigned long regs[32];
- /* Other saved registers. */
+ /* Saved special registers. */
+ unsigned long cp0_status;
unsigned long lo;
unsigned long hi;
-
- /*
- * saved cp0 registers
- */
- unsigned long cp0_epc;
unsigned long cp0_badvaddr;
- unsigned long cp0_status;
unsigned long cp0_cause;
+ unsigned long cp0_epc;
};
-#endif /* !__ASSEMBLY__ */
-
/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
/* #define PTRACE_GETREGS 12 */
/* #define PTRACE_SETREGS 13 */
@@ -66,13 +58,8 @@ struct pt_regs {
#define PTRACE_GET_THREAD_AREA 25
#define PTRACE_SET_THREAD_AREA 26
-#ifdef __ASSEMBLY__
-#include <asm/offset.h>
-#endif
-
#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
/*
* Does the process account for user or for system time?
*/
@@ -81,7 +68,6 @@ struct pt_regs {
#define instruction_pointer(regs) ((regs)->cp0_epc)
extern void show_regs(struct pt_regs *);
-#endif /* !__ASSEMBLY__ */
#endif
diff -puN include/asm-mips/r4kcache.h~mips-megapatch include/asm-mips/r4kcache.h
--- 25/include/asm-mips/r4kcache.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/r4kcache.h 2004-02-19 12:53:02.000000000 -0800
@@ -7,19 +7,33 @@
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
* Copyright (C) 1997 - 2002 Ralf Baechle (ralf@gnu.org)
+ * Copyright (C) 2004 Ralf Baechle (ralf@linux-mips.org)
*/
-#ifndef __ASM_R4KCACHE_H
-#define __ASM_R4KCACHE_H
+#ifndef _ASM_R4KCACHE_H
+#define _ASM_R4KCACHE_H
#include <asm/asm.h>
#include <asm/cacheops.h>
+/*
+ * This macro return a properly sign-extended address suitable as base address
+ * for indexed cache operations. Two issues here:
+ *
+ * - The MIPS32 and MIPS64 specs permit an implementation to directly derive
+ * the index bits from the virtual address. This breaks with tradition
+ * set by the R4000. To keep unpleassant surprises from happening we pick
+ * an address in KSEG0 / CKSEG0.
+ * - We need a properly sign extended address for 64-bit code. To get away
+ * without ifdefs we let the compiler do it by a type cast.
+ */
+#define INDEX_BASE ((int) KSEG0)
+
#define cache_op(op,addr) \
__asm__ __volatile__( \
- " .set noreorder \n" \
- " .set mips3\n\t \n" \
- " cache %0, %1 \n" \
- " .set mips0 \n" \
+ " .set noreorder \n" \
+ " .set mips3\n\t \n" \
+ " cache %0, %1 \n" \
+ " .set mips0 \n" \
" .set reorder" \
: \
: "i" (op), "m" (*(unsigned char *)(addr)))
@@ -111,35 +125,35 @@ static inline void invalidate_tcache_pag
cache_op(Page_Invalidate_T, addr);
}
-#define cache16_unroll32(base,op) \
- __asm__ __volatile__(" \
- .set noreorder; \
- .set mips3; \
- cache %1, 0x000(%0); cache %1, 0x010(%0); \
- cache %1, 0x020(%0); cache %1, 0x030(%0); \
- cache %1, 0x040(%0); cache %1, 0x050(%0); \
- cache %1, 0x060(%0); cache %1, 0x070(%0); \
- cache %1, 0x080(%0); cache %1, 0x090(%0); \
- cache %1, 0x0a0(%0); cache %1, 0x0b0(%0); \
- cache %1, 0x0c0(%0); cache %1, 0x0d0(%0); \
- cache %1, 0x0e0(%0); cache %1, 0x0f0(%0); \
- cache %1, 0x100(%0); cache %1, 0x110(%0); \
- cache %1, 0x120(%0); cache %1, 0x130(%0); \
- cache %1, 0x140(%0); cache %1, 0x150(%0); \
- cache %1, 0x160(%0); cache %1, 0x170(%0); \
- cache %1, 0x180(%0); cache %1, 0x190(%0); \
- cache %1, 0x1a0(%0); cache %1, 0x1b0(%0); \
- cache %1, 0x1c0(%0); cache %1, 0x1d0(%0); \
- cache %1, 0x1e0(%0); cache %1, 0x1f0(%0); \
- .set mips0; \
- .set reorder" \
- : \
- : "r" (base), \
+#define cache16_unroll32(base,op) \
+ __asm__ __volatile__( \
+ " .set noreorder \n" \
+ " .set mips3 \n" \
+ " cache %1, 0x000(%0); cache %1, 0x010(%0) \n" \
+ " cache %1, 0x020(%0); cache %1, 0x030(%0) \n" \
+ " cache %1, 0x040(%0); cache %1, 0x050(%0) \n" \
+ " cache %1, 0x060(%0); cache %1, 0x070(%0) \n" \
+ " cache %1, 0x080(%0); cache %1, 0x090(%0) \n" \
+ " cache %1, 0x0a0(%0); cache %1, 0x0b0(%0) \n" \
+ " cache %1, 0x0c0(%0); cache %1, 0x0d0(%0) \n" \
+ " cache %1, 0x0e0(%0); cache %1, 0x0f0(%0) \n" \
+ " cache %1, 0x100(%0); cache %1, 0x110(%0) \n" \
+ " cache %1, 0x120(%0); cache %1, 0x130(%0) \n" \
+ " cache %1, 0x140(%0); cache %1, 0x150(%0) \n" \
+ " cache %1, 0x160(%0); cache %1, 0x170(%0) \n" \
+ " cache %1, 0x180(%0); cache %1, 0x190(%0) \n" \
+ " cache %1, 0x1a0(%0); cache %1, 0x1b0(%0) \n" \
+ " cache %1, 0x1c0(%0); cache %1, 0x1d0(%0) \n" \
+ " cache %1, 0x1e0(%0); cache %1, 0x1f0(%0) \n" \
+ " .set mips0 \n" \
+ " .set reorder \n" \
+ : \
+ : "r" (base), \
"i" (op));
static inline void blast_dcache16(void)
{
- unsigned long start = KSEG0;
+ unsigned long start = INDEX_BASE;
unsigned long end = start + current_cpu_data.dcache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
unsigned long ws_end = current_cpu_data.dcache.ways <<
@@ -156,10 +170,10 @@ static inline void blast_dcache16_page(u
unsigned long start = page;
unsigned long end = start + PAGE_SIZE;
- while (start < end) {
+ do {
cache16_unroll32(start,Hit_Writeback_Inv_D);
start += 0x200;
- }
+ } while (start < end);
}
static inline void blast_dcache16_page_indexed(unsigned long page)
@@ -178,7 +192,7 @@ static inline void blast_dcache16_page_i
static inline void blast_icache16(void)
{
- unsigned long start = KSEG0;
+ unsigned long start = INDEX_BASE;
unsigned long end = start + current_cpu_data.icache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
unsigned long ws_end = current_cpu_data.icache.ways <<
@@ -195,10 +209,10 @@ static inline void blast_icache16_page(u
unsigned long start = page;
unsigned long end = start + PAGE_SIZE;
- while (start < end) {
+ do {
cache16_unroll32(start,Hit_Invalidate_I);
start += 0x200;
- }
+ } while (start < end);
}
static inline void blast_icache16_page_indexed(unsigned long page)
@@ -217,7 +231,7 @@ static inline void blast_icache16_page_i
static inline void blast_scache16(void)
{
- unsigned long start = KSEG0;
+ unsigned long start = INDEX_BASE;
unsigned long end = start + current_cpu_data.scache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
unsigned long ws_end = current_cpu_data.scache.ways <<
@@ -234,10 +248,10 @@ static inline void blast_scache16_page(u
unsigned long start = page;
unsigned long end = page + PAGE_SIZE;
- while (start < end) {
+ do {
cache16_unroll32(start,Hit_Writeback_Inv_SD);
start += 0x200;
- }
+ } while (start < end);
}
static inline void blast_scache16_page_indexed(unsigned long page)
@@ -254,35 +268,35 @@ static inline void blast_scache16_page_i
cache16_unroll32(addr|ws,Index_Writeback_Inv_SD);
}
-#define cache32_unroll32(base,op) \
- __asm__ __volatile__(" \
- .set noreorder; \
- .set mips3; \
- cache %1, 0x000(%0); cache %1, 0x020(%0); \
- cache %1, 0x040(%0); cache %1, 0x060(%0); \
- cache %1, 0x080(%0); cache %1, 0x0a0(%0); \
- cache %1, 0x0c0(%0); cache %1, 0x0e0(%0); \
- cache %1, 0x100(%0); cache %1, 0x120(%0); \
- cache %1, 0x140(%0); cache %1, 0x160(%0); \
- cache %1, 0x180(%0); cache %1, 0x1a0(%0); \
- cache %1, 0x1c0(%0); cache %1, 0x1e0(%0); \
- cache %1, 0x200(%0); cache %1, 0x220(%0); \
- cache %1, 0x240(%0); cache %1, 0x260(%0); \
- cache %1, 0x280(%0); cache %1, 0x2a0(%0); \
- cache %1, 0x2c0(%0); cache %1, 0x2e0(%0); \
- cache %1, 0x300(%0); cache %1, 0x320(%0); \
- cache %1, 0x340(%0); cache %1, 0x360(%0); \
- cache %1, 0x380(%0); cache %1, 0x3a0(%0); \
- cache %1, 0x3c0(%0); cache %1, 0x3e0(%0); \
- .set mips0; \
- .set reorder" \
- : \
- : "r" (base), \
+#define cache32_unroll32(base,op) \
+ __asm__ __volatile__( \
+ " .set noreorder \n" \
+ " .set mips3 \n" \
+ " cache %1, 0x000(%0); cache %1, 0x020(%0) \n" \
+ " cache %1, 0x040(%0); cache %1, 0x060(%0) \n" \
+ " cache %1, 0x080(%0); cache %1, 0x0a0(%0) \n" \
+ " cache %1, 0x0c0(%0); cache %1, 0x0e0(%0) \n" \
+ " cache %1, 0x100(%0); cache %1, 0x120(%0) \n" \
+ " cache %1, 0x140(%0); cache %1, 0x160(%0) \n" \
+ " cache %1, 0x180(%0); cache %1, 0x1a0(%0) \n" \
+ " cache %1, 0x1c0(%0); cache %1, 0x1e0(%0) \n" \
+ " cache %1, 0x200(%0); cache %1, 0x220(%0) \n" \
+ " cache %1, 0x240(%0); cache %1, 0x260(%0) \n" \
+ " cache %1, 0x280(%0); cache %1, 0x2a0(%0) \n" \
+ " cache %1, 0x2c0(%0); cache %1, 0x2e0(%0) \n" \
+ " cache %1, 0x300(%0); cache %1, 0x320(%0) \n" \
+ " cache %1, 0x340(%0); cache %1, 0x360(%0) \n" \
+ " cache %1, 0x380(%0); cache %1, 0x3a0(%0) \n" \
+ " cache %1, 0x3c0(%0); cache %1, 0x3e0(%0) \n" \
+ " .set mips0 \n" \
+ " .set reorder \n" \
+ : \
+ : "r" (base), \
"i" (op));
static inline void blast_dcache32(void)
{
- unsigned long start = KSEG0;
+ unsigned long start = INDEX_BASE;
unsigned long end = start + current_cpu_data.dcache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
unsigned long ws_end = current_cpu_data.dcache.ways <<
@@ -299,10 +313,10 @@ static inline void blast_dcache32_page(u
unsigned long start = page;
unsigned long end = start + PAGE_SIZE;
- while (start < end) {
+ do {
cache32_unroll32(start,Hit_Writeback_Inv_D);
start += 0x400;
- }
+ } while (start < end);
}
static inline void blast_dcache32_page_indexed(unsigned long page)
@@ -321,7 +335,7 @@ static inline void blast_dcache32_page_i
static inline void blast_icache32(void)
{
- unsigned long start = KSEG0;
+ unsigned long start = INDEX_BASE;
unsigned long end = start + current_cpu_data.icache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
unsigned long ws_end = current_cpu_data.icache.ways <<
@@ -338,10 +352,10 @@ static inline void blast_icache32_page(u
unsigned long start = page;
unsigned long end = start + PAGE_SIZE;
- while (start < end) {
+ do {
cache32_unroll32(start,Hit_Invalidate_I);
start += 0x400;
- }
+ } while (start < end);
}
static inline void blast_icache32_page_indexed(unsigned long page)
@@ -360,7 +374,7 @@ static inline void blast_icache32_page_i
static inline void blast_scache32(void)
{
- unsigned long start = KSEG0;
+ unsigned long start = INDEX_BASE;
unsigned long end = start + current_cpu_data.scache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
unsigned long ws_end = current_cpu_data.scache.ways <<
@@ -377,10 +391,10 @@ static inline void blast_scache32_page(u
unsigned long start = page;
unsigned long end = page + PAGE_SIZE;
- while (start < end) {
+ do {
cache32_unroll32(start,Hit_Writeback_Inv_SD);
start += 0x400;
- }
+ } while (start < end);
}
static inline void blast_scache32_page_indexed(unsigned long page)
@@ -397,35 +411,35 @@ static inline void blast_scache32_page_i
cache32_unroll32(addr|ws,Index_Writeback_Inv_SD);
}
-#define cache64_unroll32(base,op) \
- __asm__ __volatile__(" \
- .set noreorder; \
- .set mips3; \
- cache %1, 0x000(%0); cache %1, 0x040(%0); \
- cache %1, 0x080(%0); cache %1, 0x0c0(%0); \
- cache %1, 0x100(%0); cache %1, 0x140(%0); \
- cache %1, 0x180(%0); cache %1, 0x1c0(%0); \
- cache %1, 0x200(%0); cache %1, 0x240(%0); \
- cache %1, 0x280(%0); cache %1, 0x2c0(%0); \
- cache %1, 0x300(%0); cache %1, 0x340(%0); \
- cache %1, 0x380(%0); cache %1, 0x3c0(%0); \
- cache %1, 0x400(%0); cache %1, 0x440(%0); \
- cache %1, 0x480(%0); cache %1, 0x4c0(%0); \
- cache %1, 0x500(%0); cache %1, 0x540(%0); \
- cache %1, 0x580(%0); cache %1, 0x5c0(%0); \
- cache %1, 0x600(%0); cache %1, 0x640(%0); \
- cache %1, 0x680(%0); cache %1, 0x6c0(%0); \
- cache %1, 0x700(%0); cache %1, 0x740(%0); \
- cache %1, 0x780(%0); cache %1, 0x7c0(%0); \
- .set mips0; \
- .set reorder" \
- : \
- : "r" (base), \
+#define cache64_unroll32(base,op) \
+ __asm__ __volatile__( \
+ " .set noreorder \n" \
+ " .set mips3 \n" \
+ " cache %1, 0x000(%0); cache %1, 0x040(%0) \n" \
+ " cache %1, 0x080(%0); cache %1, 0x0c0(%0) \n" \
+ " cache %1, 0x100(%0); cache %1, 0x140(%0) \n" \
+ " cache %1, 0x180(%0); cache %1, 0x1c0(%0) \n" \
+ " cache %1, 0x200(%0); cache %1, 0x240(%0) \n" \
+ " cache %1, 0x280(%0); cache %1, 0x2c0(%0) \n" \
+ " cache %1, 0x300(%0); cache %1, 0x340(%0) \n" \
+ " cache %1, 0x380(%0); cache %1, 0x3c0(%0) \n" \
+ " cache %1, 0x400(%0); cache %1, 0x440(%0) \n" \
+ " cache %1, 0x480(%0); cache %1, 0x4c0(%0) \n" \
+ " cache %1, 0x500(%0); cache %1, 0x540(%0) \n" \
+ " cache %1, 0x580(%0); cache %1, 0x5c0(%0) \n" \
+ " cache %1, 0x600(%0); cache %1, 0x640(%0) \n" \
+ " cache %1, 0x680(%0); cache %1, 0x6c0(%0) \n" \
+ " cache %1, 0x700(%0); cache %1, 0x740(%0) \n" \
+ " cache %1, 0x780(%0); cache %1, 0x7c0(%0) \n" \
+ " .set mips0 \n" \
+ " .set reorder \n" \
+ : \
+ : "r" (base), \
"i" (op));
static inline void blast_icache64(void)
{
- unsigned long start = KSEG0;
+ unsigned long start = INDEX_BASE;
unsigned long end = start + current_cpu_data.icache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit;
unsigned long ws_end = current_cpu_data.icache.ways <<
@@ -442,10 +456,10 @@ static inline void blast_icache64_page(u
unsigned long start = page;
unsigned long end = start + PAGE_SIZE;
- while (start < end) {
+ do {
cache64_unroll32(start,Hit_Invalidate_I);
start += 0x800;
- }
+ } while (start < end);
}
static inline void blast_icache64_page_indexed(unsigned long page)
@@ -464,7 +478,7 @@ static inline void blast_icache64_page_i
static inline void blast_scache64(void)
{
- unsigned long start = KSEG0;
+ unsigned long start = INDEX_BASE;
unsigned long end = start + current_cpu_data.scache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
unsigned long ws_end = current_cpu_data.scache.ways <<
@@ -481,10 +495,10 @@ static inline void blast_scache64_page(u
unsigned long start = page;
unsigned long end = page + PAGE_SIZE;
- while (start < end) {
+ do {
cache64_unroll32(start,Hit_Writeback_Inv_SD);
start += 0x800;
- }
+ } while (start < end);
}
static inline void blast_scache64_page_indexed(unsigned long page)
@@ -501,35 +515,35 @@ static inline void blast_scache64_page_i
cache64_unroll32(addr|ws,Index_Writeback_Inv_SD);
}
-#define cache128_unroll32(base,op) \
- __asm__ __volatile__(" \
- .set noreorder; \
- .set mips3; \
- cache %1, 0x000(%0); cache %1, 0x080(%0); \
- cache %1, 0x100(%0); cache %1, 0x180(%0); \
- cache %1, 0x200(%0); cache %1, 0x280(%0); \
- cache %1, 0x300(%0); cache %1, 0x380(%0); \
- cache %1, 0x400(%0); cache %1, 0x480(%0); \
- cache %1, 0x500(%0); cache %1, 0x580(%0); \
- cache %1, 0x600(%0); cache %1, 0x680(%0); \
- cache %1, 0x700(%0); cache %1, 0x780(%0); \
- cache %1, 0x800(%0); cache %1, 0x880(%0); \
- cache %1, 0x900(%0); cache %1, 0x980(%0); \
- cache %1, 0xa00(%0); cache %1, 0xa80(%0); \
- cache %1, 0xb00(%0); cache %1, 0xb80(%0); \
- cache %1, 0xc00(%0); cache %1, 0xc80(%0); \
- cache %1, 0xd00(%0); cache %1, 0xd80(%0); \
- cache %1, 0xe00(%0); cache %1, 0xe80(%0); \
- cache %1, 0xf00(%0); cache %1, 0xf80(%0); \
- .set mips0; \
- .set reorder" \
- : \
- : "r" (base), \
+#define cache128_unroll32(base,op) \
+ __asm__ __volatile__( \
+ " .set noreorder \n" \
+ " .set mips3 \n" \
+ " cache %1, 0x000(%0); cache %1, 0x080(%0) \n" \
+ " cache %1, 0x100(%0); cache %1, 0x180(%0) \n" \
+ " cache %1, 0x200(%0); cache %1, 0x280(%0) \n" \
+ " cache %1, 0x300(%0); cache %1, 0x380(%0) \n" \
+ " cache %1, 0x400(%0); cache %1, 0x480(%0) \n" \
+ " cache %1, 0x500(%0); cache %1, 0x580(%0) \n" \
+ " cache %1, 0x600(%0); cache %1, 0x680(%0) \n" \
+ " cache %1, 0x700(%0); cache %1, 0x780(%0) \n" \
+ " cache %1, 0x800(%0); cache %1, 0x880(%0) \n" \
+ " cache %1, 0x900(%0); cache %1, 0x980(%0) \n" \
+ " cache %1, 0xa00(%0); cache %1, 0xa80(%0) \n" \
+ " cache %1, 0xb00(%0); cache %1, 0xb80(%0) \n" \
+ " cache %1, 0xc00(%0); cache %1, 0xc80(%0) \n" \
+ " cache %1, 0xd00(%0); cache %1, 0xd80(%0) \n" \
+ " cache %1, 0xe00(%0); cache %1, 0xe80(%0) \n" \
+ " cache %1, 0xf00(%0); cache %1, 0xf80(%0) \n" \
+ " .set mips0 \n" \
+ " .set reorder \n" \
+ : \
+ : "r" (base), \
"i" (op));
static inline void blast_scache128(void)
{
- unsigned long start = KSEG0;
+ unsigned long start = INDEX_BASE;
unsigned long end = start + current_cpu_data.scache.waysize;
unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
unsigned long ws_end = current_cpu_data.scache.ways <<
@@ -546,10 +560,10 @@ static inline void blast_scache128_page(
unsigned long start = page;
unsigned long end = page + PAGE_SIZE;
- while (start < end) {
+ do {
cache128_unroll32(start,Hit_Writeback_Inv_SD);
start += 0x1000;
- }
+ } while (start < end);
}
static inline void blast_scache128_page_indexed(unsigned long page)
@@ -566,4 +580,4 @@ static inline void blast_scache128_page_
cache128_unroll32(addr|ws,Index_Writeback_Inv_SD);
}
-#endif /* __ASM_R4KCACHE_H */
+#endif /* _ASM_R4KCACHE_H */
diff -puN include/asm-mips/rtc.h~mips-megapatch include/asm-mips/rtc.h
--- 25/include/asm-mips/rtc.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/rtc.h 2004-02-19 12:53:02.000000000 -0800
@@ -1,10 +1,37 @@
-#ifndef _I386_RTC_H
-#define _I386_RTC_H
-
/*
- * x86 uses the default access methods for the RTC.
+ * include/asm-mips/rtc.h
+ *
+ * (Really an interface for drivers/char/genrtc.c)
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * Please read the COPYING file for all license details.
*/
-#include <asm-generic/rtc.h>
+#ifndef _MIPS_RTC_H
+#define _MIPS_RTC_H
+
+#ifdef __KERNEL__
+
+#include <linux/rtc.h>
+
+#define RTC_PIE 0x40 /* periodic interrupt enable */
+#define RTC_AIE 0x20 /* alarm interrupt enable */
+#define RTC_UIE 0x10 /* update-finished interrupt enable */
+/* some dummy definitions */
+#define RTC_BATT_BAD 0x100 /* battery bad */
+#define RTC_SQWE 0x08 /* enable square-wave output */
+#define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
+#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
+#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
+
+unsigned int get_rtc_time(struct rtc_time *time);
+int set_rtc_time(struct rtc_time *time);
+unsigned int get_rtc_ss(void);
+int get_rtc_pll(struct rtc_pll_info *pll);
+int set_rtc_pll(struct rtc_pll_info *pll);
+
+#endif
#endif
diff -puN include/asm-mips/semaphore.h~mips-megapatch include/asm-mips/semaphore.h
--- 25/include/asm-mips/semaphore.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/semaphore.h 2004-02-19 12:53:02.000000000 -0800
@@ -11,12 +11,12 @@
#ifndef _ASM_SEMAPHORE_H
#define _ASM_SEMAPHORE_H
+#include <linux/compiler.h>
#include <linux/config.h>
-#include <asm/system.h>
-#include <asm/atomic.h>
#include <linux/spinlock.h>
#include <linux/wait.h>
#include <linux/rwsem.h>
+#include <asm/atomic.h>
struct semaphore {
#ifdef __MIPSEB__
@@ -33,29 +33,24 @@ struct semaphore {
} __attribute__((aligned(8)));
#if WAITQUEUE_DEBUG
-# define __SEM_DEBUG_INIT(name) \
- , (long)&(name).__magic
+# define __SEM_DEBUG_INIT(name) , .__magic = (long)&(name).__magic
#else
# define __SEM_DEBUG_INIT(name)
#endif
-#ifdef __MIPSEB__
-#define __SEMAPHORE_INITIALIZER(name,count) \
-{ ATOMIC_INIT(count), ATOMIC_INIT(0), __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
- __SEM_DEBUG_INIT(name) }
-#else
-#define __SEMAPHORE_INITIALIZER(name,count) \
-{ ATOMIC_INIT(0), ATOMIC_INIT(count), __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
- __SEM_DEBUG_INIT(name) }
-#endif
+#define __SEMAPHORE_INITIALIZER(name,_count) { \
+ .count = ATOMIC_INIT(_count), \
+ .waking = ATOMIC_INIT(0), \
+ .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
+ __SEM_DEBUG_INIT(name) \
+}
-#define __MUTEX_INITIALIZER(name) \
- __SEMAPHORE_INITIALIZER(name,1)
+#define __MUTEX_INITIALIZER(name) __SEMAPHORE_INITIALIZER(name, 1)
#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
- struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
+ struct semaphore name = __SEMAPHORE_INITIALIZER(name, count)
-#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
+#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1)
#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
static inline void sema_init (struct semaphore *sem, int val)
@@ -78,19 +73,29 @@ static inline void init_MUTEX_LOCKED (st
sema_init(sem, 0);
}
-asmlinkage void __down(struct semaphore * sem);
-asmlinkage int __down_interruptible(struct semaphore * sem);
-asmlinkage int __down_trylock(struct semaphore * sem);
-asmlinkage void __up(struct semaphore * sem);
+#ifndef CONFIG_CPU_HAS_LLDSCD
+/*
+ * On machines without lld/scd we need a spinlock to make the manipulation of
+ * sem->count and sem->waking atomic.
+ */
+extern spinlock_t semaphore_lock;
+#endif
+
+extern void __down_failed(struct semaphore * sem);
+extern int __down_failed_interruptible(struct semaphore * sem);
+extern void __up_wakeup(struct semaphore * sem);
static inline void down(struct semaphore * sem)
{
+ int count;
+
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
#endif
might_sleep();
- if (atomic_dec_return(&sem->count) < 0)
- __down(sem);
+ count = atomic_dec_return(&sem->count);
+ if (unlikely(count < 0))
+ __down_failed(sem);
}
/*
@@ -99,32 +104,20 @@ static inline void down(struct semaphore
*/
static inline int down_interruptible(struct semaphore * sem)
{
- int ret = 0;
+ int count;
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
#endif
might_sleep();
- if (atomic_dec_return(&sem->count) < 0)
- ret = __down_interruptible(sem);
- return ret;
-}
-
-#ifndef CONFIG_CPU_HAS_LLDSCD
+ count = atomic_dec_return(&sem->count);
+ if (unlikely(count < 0))
+ return __down_failed_interruptible(sem);
-/*
- * Non-blockingly attempt to down() a semaphore.
- * Returns zero if we acquired it
- */
-static inline int down_trylock(struct semaphore * sem)
-{
- int ret = 0;
- if (atomic_dec_return(&sem->count) < 0)
- ret = __down_trylock(sem);
- return ret;
+ return 0;
}
-#else
+#ifdef CONFIG_CPU_HAS_LLDSCD
/*
* down_trylock returns 0 on success, 1 if we failed to get the lock.
@@ -156,21 +149,22 @@ static inline int down_trylock(struct se
#endif
__asm__ __volatile__(
- ".set\tmips3\t\t\t# down_trylock\n"
- "0:\tlld\t%1, %4\n\t"
- "dli\t%3, 0x0000000100000000\n\t"
- "dsubu\t%1, %3\n\t"
- "li\t%0, 0\n\t"
- "bgez\t%1, 2f\n\t"
- "sll\t%2, %1, 0\n\t"
- "blez\t%2, 1f\n\t"
- "daddiu\t%1, %1, -1\n\t"
- "b\t2f\n"
- "1:\tdaddu\t%1, %1, %3\n\t"
- "li\t%0, 1\n"
- "2:\tscd\t%1, %4\n\t"
- "beqz\t%1, 0b\n\t"
- ".set\tmips0"
+ " .set mips3 # down_trylock \n"
+ "0: lld %1, %4 \n"
+ " dli %3, 0x0000000100000000 # count -= 1 \n"
+ " dsubu %1, %3 \n"
+ " li %0, 0 # ret = 0 \n"
+ " bgez %1, 2f # if count >= 0 \n"
+ " sll %2, %1, 0 # extract waking \n"
+ " blez %2, 1f # if waking < 0 -> 1f \n"
+ " daddiu %1, %1, -1 # waking -= 1 \n"
+ " b 2f \n"
+ "1: daddu %1, %1, %3 # count += 1 \n"
+ " li %0, 1 # ret = 1 \n"
+ "2: scd %1, %4 \n"
+ " beqz %1, 0b \n"
+ " sync \n"
+ " .set mips0 \n"
: "=&r"(ret), "=&r"(tmp), "=&r"(tmp2), "=&r"(sub)
: "m"(*sem)
: "memory");
@@ -178,7 +172,80 @@ static inline int down_trylock(struct se
return ret;
}
-#endif /* CONFIG_CPU_HAS_LLDSCD */
+/*
+ * Note! This is subtle. We jump to wake people up only if
+ * the semaphore was negative (== somebody was waiting on it).
+ */
+static inline void up(struct semaphore * sem)
+{
+ unsigned long tmp, tmp2;
+ int count;
+
+#if WAITQUEUE_DEBUG
+ CHECK_MAGIC(sem->__magic);
+#endif
+ /*
+ * We must manipulate count and waking simultaneously and atomically.
+ * Otherwise we have races between up and __down_failed_interruptible
+ * waking up on a signal.
+ */
+
+ __asm__ __volatile__(
+ " .set mips3 \n"
+ " sync # up \n"
+ "1: lld %1, %3 \n"
+ " dsra32 %0, %1, 0 # extract count to %0 \n"
+ " daddiu %0, 1 # count += 1 \n"
+ " slti %2, %0, 1 # %3 = (%0 <= 0) \n"
+ " daddu %1, %2 # waking += %3 \n"
+ " dsll32 %1, %1, 0 # zero-extend %1 \n"
+ " dsrl32 %1, %1, 0 \n"
+ " dsll32 %2, %0, 0 # Reassemble union \n"
+ " or %1, %2 # from count and waking \n"
+ " scd %1, %3 \n"
+ " beqz %1, 1b \n"
+ " .set mips0 \n"
+ : "=&r"(count), "=&r"(tmp), "=&r"(tmp2), "+m"(*sem)
+ :
+ : "memory");
+
+ if (unlikely(count <= 0))
+ __up_wakeup(sem);
+}
+
+#else
+
+/*
+ * Non-blockingly attempt to down() a semaphore.
+ * Returns zero if we acquired it
+ */
+static inline int down_trylock(struct semaphore * sem)
+{
+ unsigned long flags;
+ int count, waking;
+ int ret = 0;
+
+#if WAITQUEUE_DEBUG
+ CHECK_MAGIC(sem->__magic);
+#endif
+
+ spin_lock_irqsave(&semaphore_lock, flags);
+ count = atomic_read(&sem->count) - 1;
+ atomic_set(&sem->count, count);
+ if (unlikely(count < 0)) {
+ waking = atomic_read(&sem->waking);
+ if (waking <= 0) {
+ atomic_set(&sem->count, count + 1);
+ ret = 1;
+ } else {
+ atomic_set(&sem->waking, waking - 1);
+ ret = 0;
+ }
+ }
+ spin_unlock_irqrestore(&semaphore_lock, flags);
+
+ return ret;
+}
/*
* Note! This is subtle. We jump to wake people up only if
@@ -186,11 +253,31 @@ static inline int down_trylock(struct se
*/
static inline void up(struct semaphore * sem)
{
+ unsigned long flags;
+ int count, waking;
+
#if WAITQUEUE_DEBUG
CHECK_MAGIC(sem->__magic);
#endif
- if (atomic_inc_return(&sem->count) <= 0)
- __up(sem);
+ /*
+ * We must manipulate count and waking simultaneously and atomically.
+ * Otherwise we have races between up and __down_failed_interruptible
+ * waking up on a signal.
+ */
+
+ spin_lock_irqsave(&semaphore_lock, flags);
+ count = atomic_read(&sem->count) + 1;
+ waking = atomic_read(&sem->waking);
+ if (count <= 0)
+ waking++;
+ atomic_set(&sem->count, count);
+ atomic_set(&sem->waking, waking);
+ spin_unlock_irqrestore(&semaphore_lock, flags);
+
+ if (unlikely(count <= 0))
+ __up_wakeup(sem);
}
+#endif /* CONFIG_CPU_HAS_LLDSCD */
+
#endif /* _ASM_SEMAPHORE_H */
diff -puN -L include/asm-mips/semaphore-helper.h include/asm-mips/semaphore-helper.h~mips-megapatch /dev/null
--- 25/include/asm-mips/semaphore-helper.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,182 +0,0 @@
-/*
- * SMP- and interrupt-safe semaphores helper functions.
- *
- * Copyright (C) 1996 Linus Torvalds
- * Copyright (C) 1999 Andrea Arcangeli
- * Copyright (C) 1999, 2001, 2002 Ralf Baechle
- * Copyright (C) 1999, 2001 Silicon Graphics, Inc.
- * Copyright (C) 2000 MIPS Technologies, Inc.
- */
-#ifndef _ASM_SEMAPHORE_HELPER_H
-#define _ASM_SEMAPHORE_HELPER_H
-
-#include <linux/config.h>
-#include <linux/errno.h>
-
-#define sem_read(a) ((a)->counter)
-#define sem_inc(a) (((a)->counter)++)
-#define sem_dec(a) (((a)->counter)--)
-/*
- * These two _must_ execute atomically wrt each other.
- */
-static inline void wake_one_more(struct semaphore * sem)
-{
- atomic_inc(&sem->waking);
-}
-
-#ifdef CONFIG_CPU_HAS_LLSC
-
-static inline int waking_non_zero(struct semaphore *sem)
-{
- int ret, tmp;
-
- __asm__ __volatile__(
- "1:\tll\t%1, %2\t\t\t# waking_non_zero\n\t"
- "blez\t%1, 2f\n\t"
- "subu\t%0, %1, 1\n\t"
- "sc\t%0, %2\n\t"
- "beqz\t%0, 1b\n"
- "2:"
- : "=r" (ret), "=r" (tmp), "+m" (sem->waking)
- : "0" (0));
-
- return ret;
-}
-
-#else /* !CONFIG_CPU_HAS_LLSC */
-
-/*
- * It doesn't make sense, IMHO, to endlessly turn interrupts off and on again.
- * Do it once and that's it. ll/sc *has* it's advantages. HK
- */
-
-static inline int waking_non_zero(struct semaphore *sem)
-{
- unsigned long flags;
- int ret = 0;
-
- local_irq_save(flags);
- if (sem_read(&sem->waking) > 0) {
- sem_dec(&sem->waking);
- ret = 1;
- }
- local_irq_restore(flags);
- return ret;
-}
-#endif /* !CONFIG_CPU_HAS_LLSC */
-
-#ifdef CONFIG_CPU_HAS_LLDSCD
-
-/*
- * waking_non_zero_interruptible:
- * 1 got the lock
- * 0 go to sleep
- * -EINTR interrupted
- *
- * We must undo the sem->count down_interruptible decrement
- * simultaneously and atomically with the sem->waking adjustment,
- * otherwise we can race with wake_one_more.
- *
- * This is accomplished by doing a 64-bit lld/scd on the 2 32-bit words.
- *
- * This is crazy. Normally it's strictly forbidden to use 64-bit operations
- * in the 32-bit MIPS kernel. In this case it's however ok because if an
- * interrupt has destroyed the upper half of registers sc will fail.
- * Note also that this will not work for MIPS32 CPUs!
- *
- * Pseudocode:
- *
- * If(sem->waking > 0) {
- * Decrement(sem->waking)
- * Return(SUCCESS)
- * } else If(signal_pending(tsk)) {
- * Increment(sem->count)
- * Return(-EINTR)
- * } else {
- * Return(SLEEP)
- * }
- */
-
-static inline int
-waking_non_zero_interruptible(struct semaphore *sem, struct task_struct *tsk)
-{
- long ret, tmp;
-
- __asm__ __volatile__(
- ".set\tpush\t\t\t# waking_non_zero_interruptible\n\t"
- ".set\tmips3\n\t"
- ".set\tnoat\n"
- "0:\tlld\t%1, %2\n\t"
- "li\t%0, 0\n\t"
- "sll\t$1, %1, 0\n\t"
- "blez\t$1, 1f\n\t"
- "daddiu\t%1, %1, -1\n\t"
- "li\t%0, 1\n\t"
- "b\t2f\n"
- "1:\tbeqz\t%3, 2f\n\t"
- "li\t%0, %4\n\t"
- "dli\t$1, 0x0000000100000000\n\t"
- "daddu\t%1, %1, $1\n"
- "2:\tscd\t%1, %2\n\t"
- "beqz\t%1, 0b\n\t"
- ".set\tpop"
- : "=&r" (ret), "=&r" (tmp), "=m" (*sem)
- : "r" (signal_pending(tsk)), "i" (-EINTR));
-
- return ret;
-}
-
-/*
- * waking_non_zero_trylock is unused. we do everything in
- * down_trylock and let non-ll/sc hosts bounce around.
- */
-
-static inline int waking_non_zero_trylock(struct semaphore *sem)
-{
-#if WAITQUEUE_DEBUG
- CHECK_MAGIC(sem->__magic);
-#endif
-
- return 0;
-}
-
-#else /* !CONFIG_CPU_HAS_LLDSCD */
-
-static inline int waking_non_zero_interruptible(struct semaphore *sem,
- struct task_struct *tsk)
-{
- int ret = 0;
- unsigned long flags;
-
- local_irq_save(flags);
- if (sem_read(&sem->waking) > 0) {
- sem_dec(&sem->waking);
- ret = 1;
- } else if (signal_pending(tsk)) {
- sem_inc(&sem->count);
- ret = -EINTR;
- }
- local_irq_restore(flags);
- return ret;
-}
-
-static inline int waking_non_zero_trylock(struct semaphore *sem)
-{
- int ret = 1;
- unsigned long flags;
-
- local_irq_save(flags);
- if (sem_read(&sem->waking) <= 0)
- sem_inc(&sem->count);
- else {
- sem_dec(&sem->waking);
- ret = 0;
- }
- local_irq_restore(flags);
-
- return ret;
-}
-
-#endif /* !CONFIG_CPU_HAS_LLDSCD */
-
-#endif /* _ASM_SEMAPHORE_HELPER_H */
diff -puN include/asm-mips/serial.h~mips-megapatch include/asm-mips/serial.h
--- 25/include/asm-mips/serial.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/serial.h 2004-02-19 12:53:02.000000000 -0800
@@ -10,7 +10,6 @@
#define _ASM_SERIAL_H
#include <linux/config.h>
-#include <asm/jazz.h>
/*
* This assumes you have a 1.8432 MHz clock for your UART.
@@ -21,15 +20,6 @@
*/
#define BASE_BAUD (1843200 / 16)
-#ifndef CONFIG_OLIVETTI_M700
- /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
- exactly which ones ... XXX */
-#define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
-#else
-/* but the M700 isn't such a strange beast */
-#define JAZZ_BASE_BAUD BASE_BAUD
-#endif
-
/* Standard COM flags (except for COM4, because of the 8514 problem) */
#ifdef CONFIG_SERIAL_DETECT_IRQ
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
@@ -66,6 +56,17 @@
#define C_P(card,port) (((card)<<6|(port)<<3) + 1)
#ifdef CONFIG_MIPS_JAZZ
+#include <asm/jazz.h>
+
+#ifndef CONFIG_OLIVETTI_M700
+ /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
+ exactly which ones ... XXX */
+#define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
+#else
+/* but the M700 isn't such a strange beast */
+#define JAZZ_BASE_BAUD BASE_BAUD
+#endif
+
#define _JAZZ_SERIAL_INIT(int, base) \
{ .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
.iomem_base = (u8 *) base, .iomem_reg_shift = 0, \
@@ -77,26 +78,6 @@
#define JAZZ_SERIAL_PORT_DEFNS
#endif
-#ifdef CONFIG_MIPS_ATLAS
-#include <asm/mips-boards/atlas.h>
-#include <asm/mips-boards/atlasint.h>
-#define ATLAS_SERIAL_PORT_DEFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, ATLAS_BASE_BAUD, ATLAS_UART_REGS_BASE, ATLASINT_UART, STD_COM_FLAGS }, /* ttyS0 */
-#else
-#define ATLAS_SERIAL_PORT_DEFNS
-#endif
-
-#ifdef CONFIG_MIPS_SEAD
-#include <asm/mips-boards/sead.h>
-#include <asm/mips-boards/seadint.h>
-#define SEAD_SERIAL_PORT_DEFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, SEAD_BASE_BAUD, SEAD_UART0_REGS_BASE, SEADINT_UART0, STD_COM_FLAGS }, /* ttyS0 */
-#else
-#define SEAD_SERIAL_PORT_DEFNS
-#endif
-
#ifdef CONFIG_MIPS_COBALT
#include <asm/cobalt/cobalt.h>
#define COBALT_BASE_BAUD (18432000 / 16)
@@ -158,35 +139,6 @@
#define IVR_SERIAL_PORT_DEFNS
#endif
-#ifdef CONFIG_LASAT
-/* This dummy definition allocates one element in the SERIAL_PORT_DFNS
- * list below. This element is filled out by the the code in serial_init()
- * in arch/mips/lasat/setup.c which autoselects the configuration based
- * on machine type. */
-#define LASAT_SERIAL_PORT_DEFNS { },
-#else
-#define LASAT_SERIAL_PORT_DEFNS
-#endif
-
-#ifdef CONFIG_SERIAL_AU1X00
-#include <asm/au1000.h>
-#define AU1X00_SERIAL_PORT_DEFNS \
- { .baud_base = 0, .iomem_base = (u8 *)UART0_ADDR, \
- .irq = AU1000_UART0_INT, .flags = STD_COM_FLAGS, \
- .iomem_reg_shift = 2, }, \
- { .baud_base = 0, .iomem_base = (u8 *)UART1_ADDR, \
- .irq = AU1000_UART1_INT, .flags = STD_COM_FLAGS, \
- .iomem_reg_shift = 2 }, \
- { .baud_base = 0, .iomem_base = (u8 *)UART2_ADDR, \
- .irq = AU1000_UART2_INT, .flags = STD_COM_FLAGS, \
- .iomem_reg_shift = 2}, \
- { .baud_base = 0, .iomem_base = (u8 *)UART3_ADDR, \
- .irq = AU1000_UART3_INT, .flags = STD_COM_FLAGS, \
- .iomem_reg_shift = 2},
-#else
-#define AU1X00_SERIAL_PORT_DEFNS
-#endif
-
#ifdef CONFIG_TOSHIBA_JMR3927
#include <asm/jmr3927/jmr3927.h>
#define TXX927_SERIAL_PORT_DEFNS \
@@ -198,6 +150,21 @@
#define TXX927_SERIAL_PORT_DEFNS
#endif
+#ifdef CONFIG_SERIAL_AU1X00
+#include <asm/mach-au1x00/au1000.h>
+#define AU1000_SERIAL_PORT_DEFNS \
+ { .baud_base = 0, .port = UART0_ADDR, .irq = AU1000_UART0_INT, \
+ .flags = STD_COM_FLAGS, .type = 1 }, \
+ { .baud_base = 0, .port = UART1_ADDR, .irq = AU1000_UART1_INT, \
+ .flags = STD_COM_FLAGS, .type = 1 }, \
+ { .baud_base = 0, .port = UART2_ADDR, .irq = AU1000_UART2_INT, \
+ .flags = STD_COM_FLAGS, .type = 1 }, \
+ { .baud_base = 0, .port = UART3_ADDR, .irq = AU1000_UART3_INT, \
+ .flags = STD_COM_FLAGS, .type = 1 },
+#else
+#define AU1000_SERIAL_PORT_DEFNS
+#endif
+
#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
#define STD_SERIAL_PORT_DEFNS \
/* UART CLK PORT IRQ FLAGS */ \
@@ -341,6 +308,24 @@
#define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS
#endif
+#ifdef CONFIG_TITAN_SERIAL
+/* 16552 20 MHz crystal */
+#define TITAN_SERIAL_BASE_BAUD ( 20000000 / 16 )
+#define TITAN_SERIAL_IRQ XXX
+#define TITAN_SERIAL_BASE 0xffffffff
+
+#define _TITAN_SERIAL_INIT(int, base) \
+ { baud_base: TITAN_SERIAL_BASE_BAUD, irq: int, \
+ flags: STD_COM_FLAGS, iomem_base: (u8 *) base, \
+ iomem_reg_shift: 2, io_type: SERIAL_IO_MEM \
+ }
+
+#define TITAN_SERIAL_PORT_DEFNS \
+ _TITAN_SERIAL_INIT(TITAN_SERIAL_IRQ, TITAN_SERIAL_BASE)
+#else
+#define TITAN_SERIAL_PORT_DEFNS
+#endif
+
#ifdef CONFIG_DDB5477
#include <asm/ddb5xxx/ddb5477.h>
#define DDB5477_SERIAL_PORT_DEFNS \
@@ -354,95 +339,33 @@
#define DDB5477_SERIAL_PORT_DEFNS
#endif
-#ifdef CONFIG_SGI_IP27
-
-/*
- * Note about serial ports and consoles:
- * For console output, everyone uses the IOC3 UARTA (offset 0x178)
- * connected to the master node (look in ip27_setup_console() and
- * ip27prom_console_write()).
- *
- * For serial (/dev/ttyS0 etc), we can not have hardcoded serial port
- * addresses on a partitioned machine. Since we currently use the ioc3
- * serial ports, we use dynamic serial port discovery that the serial.c
- * driver uses for pci/pnp ports (there is an entry for the SGI ioc3
- * boards in pci_boards[]). Unfortunately, UARTA's pio address is greater
- * than UARTB's, although UARTA on o200s has traditionally been known as
- * port 0. So, we just use one serial port from each ioc3 (since the
- * serial driver adds addresses to get to higher ports).
- *
- * The first one to do a register_console becomes the preferred console
- * (if there is no kernel command line console= directive). /dev/console
- * (ie 5, 1) is then "aliased" into the device number returned by the
- * "device" routine referred to in this console structure
- * (ip27prom_console_dev).
- *
- * Also look in ip27-pci.c:pci_fixuop_ioc3() for some comments on working
- * around ioc3 oddities in this respect.
- *
- * The IOC3 serials use a 22MHz clock rate with an additional divider by 3.
- * (IOC3_BAUD = (22000000 / (3*16)))
- *
- * At the moment this is only a skeleton definition as we register all serials
- * at runtime.
- */
-
-#define IP27_SERIAL_PORT_DEFNS
-#else
-#define IP27_SERIAL_PORT_DEFNS
-#endif /* CONFIG_SGI_IP27 */
-
#ifdef CONFIG_SGI_IP32
-
-#include <asm/ip32/ip32_ints.h>
-
/*
* The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
+ * They are initialized in ip32_setup
*/
-
-/* Standard COM flags (except for COM4, because of the 8514 problem) */
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
-#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF/* | ASYNC_SKIP_TEST*/)
-#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
-#endif
-
#define IP32_SERIAL_PORT_DEFNS \
- { .baud_base = BASE_BAUD, \
- .irq = MACEISA_SERIAL1_IRQ, \
- .flags = STD_COM_FLAGS, \
- .iomem_base = (u8*)MACE_BASE+MACEISA_SER1_BASE, \
- .iomem_reg_shift = 8, \
- .io_type = SERIAL_IO_MEM}, \
- { .baud_base = BASE_BAUD, \
- .irq = MACEISA_SERIAL2_IRQ, \
- .flags = STD_COM_FLAGS, \
- .iomem_base = (u8*)MACE_BASE+MACEISA_SER2_BASE, \
- .iomem_reg_shift = 8, \
- .io_type = SERIAL_IO_MEM},
+ {},{},
#else
#define IP32_SERIAL_PORT_DEFNS
-#endif /* CONFIG_SGI_IP31 */
+#endif /* CONFIG_SGI_IP32 */
#define SERIAL_PORT_DFNS \
- IVR_SERIAL_PORT_DEFNS \
- ITE_SERIAL_PORT_DEFNS \
- ATLAS_SERIAL_PORT_DEFNS \
- SEAD_SERIAL_PORT_DEFNS \
COBALT_SERIAL_PORT_DEFNS \
- LASAT_SERIAL_PORT_DEFNS \
+ DDB5477_SERIAL_PORT_DEFNS \
EV96100_SERIAL_PORT_DEFNS \
- JAZZ_SERIAL_PORT_DEFNS \
- STD_SERIAL_PORT_DEFNS \
EXTRA_SERIAL_PORT_DEFNS \
HUB6_SERIAL_PORT_DFNS \
- MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
+ IP32_SERIAL_PORT_DEFNS \
+ ITE_SERIAL_PORT_DEFNS \
+ IVR_SERIAL_PORT_DEFNS \
+ JAZZ_SERIAL_PORT_DEFNS \
+ STD_SERIAL_PORT_DEFNS \
MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
- AU1X00_SERIAL_PORT_DEFNS \
- TXX927_SERIAL_PORT_DEFNS \
- DDB5477_SERIAL_PORT_DEFNS
+ MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
+ TITAN_SERIAL_PORT_DEFNS \
+ TXX927_SERIAL_PORT_DEFNS \
+ AU1000_SERIAL_PORT_DEFNS
#endif /* _ASM_SERIAL_H */
diff -puN include/asm-mips/sgialib.h~mips-megapatch include/asm-mips/sgialib.h
--- 25/include/asm-mips/sgialib.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sgialib.h 2004-02-19 12:53:02.000000000 -0800
@@ -24,11 +24,10 @@ extern LONG *_prom_argv, *_prom_envp;
#define prom_argc(index) ((char *) (long) _prom_argc[(index)])
extern int prom_flags;
+
#define PROM_FLAG_ARCS 1
#define PROM_FLAG_USE_AS_CONSOLE 2
-
-/* Init the PROM library and it's internal data structures. */
-extern void prom_init(int argc, char **argv, char **envp, int *prom_vec);
+#define PROM_FLAG_DONT_FREE_TEMP 4
/* Simple char-by-char console I/O. */
extern void prom_putchar(char c);
@@ -123,5 +122,6 @@ extern VOID ArcEnterInteractiveMode(VOID
extern long prom_cfgsave(VOID);
extern struct linux_sysid *prom_getsysid(VOID);
extern VOID ArcFlushAllCaches(VOID);
+extern DISPLAY_STATUS *ArcGetDisplayStatus(ULONG FileID);
#endif /* _ASM_SGIALIB_H */
diff -puN include/asm-mips/sgiarcs.h~mips-megapatch include/asm-mips/sgiarcs.h
--- 25/include/asm-mips/sgiarcs.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sgiarcs.h 2004-02-19 12:53:02.000000000 -0800
@@ -236,6 +236,8 @@ struct linux_romvec {
/* Miscellaneous. */
LONG cache_flush;
+ LONG TestUnicodeCharacter; /* ARC; not sure if ARCS too */
+ LONG GetDisplayStatus;
};
/* The SGI ARCS parameter block is in a fixed location for standalone
diff -puN include/asm-mips/sgi/ioc.h~mips-megapatch include/asm-mips/sgi/ioc.h
--- 25/include/asm-mips/sgi/ioc.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sgi/ioc.h 2004-02-19 12:53:02.000000000 -0800
@@ -14,48 +14,13 @@
#define _SGI_IOC_H
#include <linux/types.h>
+#include <asm/sgi/pi1.h>
/*
* All registers are 8-bit wide alligned on 32-bit boundary. Bad things
* happen if you try word access them. You have been warned.
*/
-struct sgioc_pport_regs {
- u8 _data[3];
- volatile u8 data;
- u8 _ctrl[3];
- volatile u8 ctrl;
-#define SGIOC_PCTRL_STROBE 0x01
-#define SGIOC_PCTRL_AFD 0x02
-#define SGIOC_PCTRL_INIT 0x04
-#define SGIOC_PCTRL_SLIN 0x08
-#define SGIOC_PCTRL_DIRECTION 0x20
-#define SGIOC_PCTRL_SEL 0x40
- u8 _status[3];
- volatile u8 status;
-#define SGIOC_PSTAT_DEVID 0x03
-#define SGIOC_PSTAT_NOINK 0x04
-#define SGIOC_PSTAT_ERROR 0x08
-#define SGIOC_PSTAT_ONLINE 0x10
-#define SGIOC_PSTAT_PE 0x20
-#define SGIOC_PSTAT_ACK 0x40
-#define SGIOC_PSTAT_BUSY 0x80
- u8 _dmactrl[3];
- volatile u8 dmactrl;
- u8 _intrstat[3];
- volatile u8 intrstat;
- u8 _intrmask[3];
- volatile u8 intrmask;
- u8 _timer1[3];
- volatile u8 timer1;
- u8 _timer2[3];
- volatile u8 timer2;
- u8 _timer3[3];
- volatile u8 timer3;
- u8 _timer4[3];
- volatile u8 timer4;
-};
-
struct sgioc_uart_regs {
u8 _ctrl1[3];
volatile u8 ctrl1;
@@ -153,7 +118,7 @@ struct sgint_regs {
extern u8 sgi_ioc_reset, sgi_ioc_write;
struct sgioc_regs {
- struct sgioc_pport_regs pport;
+ struct pi1_regs pport;
u32 _unused0[2];
struct sgioc_uart_regs serport;
struct sgioc_keyb_regs kbdmouse;
diff -puN /dev/null include/asm-mips/sgi/pi1.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/sgi/pi1.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,71 @@
+/*
+ * pi1.h: Definitions for SGI PI1 parallel port
+ */
+
+#ifndef _SGI_PI1_H
+#define _SGI_PI1_H
+
+struct pi1_regs {
+ u8 _data[3];
+ volatile u8 data;
+ u8 _ctrl[3];
+ volatile u8 ctrl;
+#define PI1_CTRL_STROBE_N 0x01
+#define PI1_CTRL_AFD_N 0x02
+#define PI1_CTRL_INIT_N 0x04
+#define PI1_CTRL_SLIN_N 0x08
+#define PI1_CTRL_IRQ_ENA 0x10
+#define PI1_CTRL_DIR 0x20
+#define PI1_CTRL_SEL 0x40
+ u8 _status[3];
+ volatile u8 status;
+#define PI1_STAT_DEVID 0x03 /* bits 0-1 */
+#define PI1_STAT_NOINK 0x04 /* SGI MODE only */
+#define PI1_STAT_ERROR 0x08
+#define PI1_STAT_ONLINE 0x10
+#define PI1_STAT_PE 0x20
+#define PI1_STAT_ACK 0x40
+#define PI1_STAT_BUSY 0x80
+ u8 _dmactrl[3];
+ volatile u8 dmactrl;
+#define PI1_DMACTRL_FIFO_EMPTY 0x01 /* fifo empty R/O */
+#define PI1_DMACTRL_ABORT 0x02 /* reset DMA and internal fifo W/O */
+#define PI1_DMACTRL_STDMODE 0x00 /* bits 2-3 */
+#define PI1_DMACTRL_SGIMODE 0x04 /* bits 2-3 */
+#define PI1_DMACTRL_RICOHMODE 0x08 /* bits 2-3 */
+#define PI1_DMACTRL_HPMODE 0x0c /* bits 2-3 */
+#define PI1_DMACTRL_BLKMODE 0x10 /* block mode */
+#define PI1_DMACTRL_FIFO_CLEAR 0x20 /* clear fifo W/O */
+#define PI1_DMACTRL_READ 0x40 /* read */
+#define PI1_DMACTRL_RUN 0x80 /* pedal to the metal */
+ u8 _intstat[3];
+ volatile u8 intstat;
+#define PI1_INTSTAT_ACK 0x04
+#define PI1_INTSTAT_FEMPTY 0x08
+#define PI1_INTSTAT_NOINK 0x10
+#define PI1_INTSTAT_ONLINE 0x20
+#define PI1_INTSTAT_ERR 0x40
+#define PI1_INTSTAT_PE 0x80
+ u8 _intmask[3];
+ volatile u8 intmask; /* enabled low, reset high*/
+#define PI1_INTMASK_ACK 0x04
+#define PI1_INTMASK_FIFO_EMPTY 0x08
+#define PI1_INTMASK_NOINK 0x10
+#define PI1_INTMASK_ONLINE 0x20
+#define PI1_INTMASK_ERR 0x40
+#define PI1_INTMASK_PE 0x80
+ u8 _timer1[3];
+ volatile u8 timer1;
+#define PI1_TIME1 0x27
+ u8 _timer2[3];
+ volatile u8 timer2;
+#define PI1_TIME2 0x13
+ u8 _timer3[3];
+ volatile u8 timer3;
+#define PI1_TIME3 0x10
+ u8 _timer4[3];
+ volatile u8 timer4;
+#define PI1_TIME4 0x00
+};
+
+#endif
diff -puN include/asm-mips/sibyte/board.h~mips-megapatch include/asm-mips/sibyte/board.h
--- 25/include/asm-mips/sibyte/board.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sibyte/board.h 2004-02-19 12:53:02.000000000 -0800
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
+ * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -19,10 +19,13 @@
#ifndef _SIBYTE_BOARD_H
#define _SIBYTE_BOARD_H
+#include <linux/config.h>
+
#ifdef CONFIG_SIBYTE_BOARD
#if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM) || \
- defined(CONFIG_SIBYTE_CRHONE) || defined(CONFIG_SIBYTE_CRHINE)
+ defined(CONFIG_SIBYTE_CRHONE) || defined(CONFIG_SIBYTE_CRHINE) || \
+ defined(CONFIG_SIBYTE_LITTLESUR)
#include <asm/sibyte/swarm.h>
#endif
diff -puN include/asm-mips/sibyte/carmel.h~mips-megapatch include/asm-mips/sibyte/carmel.h
--- 25/include/asm-mips/sibyte/carmel.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sibyte/carmel.h 2004-02-19 12:53:02.000000000 -0800
@@ -18,6 +18,8 @@
#ifndef __ASM_SIBYTE_CARMEL_H
#define __ASM_SIBYTE_CARMEL_H
+#include <linux/config.h>
+
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_int.h>
diff -puN include/asm-mips/sibyte/sb1250.h~mips-megapatch include/asm-mips/sibyte/sb1250.h
--- 25/include/asm-mips/sibyte/sb1250.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sibyte/sb1250.h 2004-02-19 12:53:02.000000000 -0800
@@ -58,6 +58,6 @@ extern void prom_printf(char *fmt, ...);
#endif
-#define IO_SPACE_BASE KSEG1
+#define IOADDR(a) (UNCAC_BASE + (a))
#endif
diff -puN include/asm-mips/sibyte/sentosa.h~mips-megapatch include/asm-mips/sibyte/sentosa.h
--- 25/include/asm-mips/sibyte/sentosa.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sibyte/sentosa.h 2004-02-19 12:53:02.000000000 -0800
@@ -18,6 +18,7 @@
#ifndef __ASM_SIBYTE_SENTOSA_H
#define __ASM_SIBYTE_SENTOSA_H
+#include <linux/config.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_int.h>
diff -puN include/asm-mips/sibyte/swarm.h~mips-megapatch include/asm-mips/sibyte/swarm.h
--- 25/include/asm-mips/sibyte/swarm.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sibyte/swarm.h 2004-02-19 12:53:02.000000000 -0800
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2000, 2001 Broadcom Corporation
+ * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -18,36 +18,52 @@
#ifndef __ASM_SIBYTE_SWARM_H
#define __ASM_SIBYTE_SWARM_H
+#include <linux/config.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_int.h>
#ifdef CONFIG_SIBYTE_SWARM
#define SIBYTE_BOARD_NAME "BCM91250A (SWARM)"
+#define SIBYTE_HAVE_PCMCIA 1
+#define SIBYTE_HAVE_IDE 1
#endif
#ifdef CONFIG_SIBYTE_PTSWARM
#define SIBYTE_BOARD_NAME "PTSWARM"
+#define SIBYTE_HAVE_PCMCIA 1
+#define SIBYTE_HAVE_IDE 1
+#define SIBYTE_DEFAULT_CONSOLE "ttyS0,115200"
+#endif
+#ifdef CONFIG_SIBYTE_LITTLESUR
+#define SIBYTE_BOARD_NAME "BCM1250C2 (LittleSur)"
+#define SIBYTE_HAVE_PCMCIA 0
+#define SIBYTE_HAVE_IDE 1
+#define SIBYTE_DEFAULT_CONSOLE "cfe0"
#endif
#ifdef CONFIG_SIBYTE_CRHONE
#define SIBYTE_BOARD_NAME "BCM91125C (CRhone)"
+#define SIBYTE_HAVE_PCMCIA 0
+#define SIBYTE_HAVE_IDE 0
#endif
#ifdef CONFIG_SIBYTE_CRHINE
#define SIBYTE_BOARD_NAME "BCM91120C (CRhine)"
+#define SIBYTE_HAVE_PCMCIA 0
+#define SIBYTE_HAVE_IDE 0
#endif
/* Generic bus chip selects */
#define LEDS_CS 3
#define LEDS_PHYS 0x100a0000
-#if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM)
+
+#ifdef SIBYTE_HAVE_IDE
#define IDE_CS 4
#define IDE_PHYS 0x100b0000
-#define PCMCIA_CS 6
-#define PCMCIA_PHYS 0x11000000
-#endif
-
-/* GPIOs */
-#if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_PTSWARM)
#define K_GPIO_GB_IDE 4
#define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE)
+#endif
+
+#ifdef SIBYTE_HAVE_PCMCIA
+#define PCMCIA_CS 6
+#define PCMCIA_PHYS 0x11000000
#define K_GPIO_PC_READY 9
#define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY)
#endif
diff -puN include/asm-mips/sibyte/trace_prof.h~mips-megapatch include/asm-mips/sibyte/trace_prof.h
--- 25/include/asm-mips/sibyte/trace_prof.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sibyte/trace_prof.h 2004-02-19 12:53:02.000000000 -0800
@@ -19,6 +19,7 @@
#ifndef __ASM_SIBYTE_TRACE_PROF_H
#define __ASM_SIBYTE_TRACE_PROF_H
+#undef DBG
#if SBPROF_TB_DEBUG
#define DBG(a) a
#else
@@ -62,10 +63,10 @@ struct sbprof_tb {
saturate 40 bits. No subsequent use of SCD performance counters
or trace buffer.
Effect: Starts gathering random ZBbus profiles using trace buffer. */
-static int sbprof_zbprof_start(struct file *filp);
+extern int sbprof_zbprof_start(struct file *filp);
/* Effect: Stops collection of ZBbus profiles */
-static int sbprof_zbprof_stop(void);
+extern int sbprof_zbprof_stop(void);
/***************************************************************************
diff -puN include/asm-mips/sigcontext.h~mips-megapatch include/asm-mips/sigcontext.h
--- 25/include/asm-mips/sigcontext.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sigcontext.h 2004-02-19 12:53:02.000000000 -0800
@@ -65,6 +65,7 @@ struct sigcontext {
unsigned int sc_cause;
};
+#ifdef __KERNEL__
struct sigcontext32 {
__u32 sc_regmask; /* Unused */
__u32 sc_status;
@@ -84,6 +85,7 @@ struct sigcontext32 {
__u32 sc_sigset[4]; /* kernel's sigset_t */
};
+#endif /* __KERNEL__ */
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
diff -puN include/asm-mips/siginfo.h~mips-megapatch include/asm-mips/siginfo.h
--- 25/include/asm-mips/siginfo.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/siginfo.h 2004-02-19 12:53:02.000000000 -0800
@@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1998, 1999, 2001 Ralf Baechle
+ * Copyright (C) 1998, 1999, 2001, 2003 Ralf Baechle
* Copyright (C) 2000, 2001 Silicon Graphics, Inc.
*/
#ifndef _ASM_SIGINFO_H
@@ -11,11 +11,11 @@
#include <linux/config.h>
-#define SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE/sizeof(int)) - 4)
+#define SIGEV_HEAD_SIZE (sizeof(long) + 2*sizeof(int))
+#define SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE-SIGEV_HEAD_SIZE) / sizeof(int))
#define SI_PAD_SIZE ((SI_MAX_SIZE/sizeof(int)) - 4)
#define HAVE_ARCH_SIGINFO_T
-#define HAVE_ARCH_SIGEVENT_T
/*
* We duplicate the generic versions - <asm-generic/siginfo.h> is just borked
@@ -177,38 +177,6 @@ typedef struct siginfo32 {
#define SI_TIMER __SI_CODE(__SI_TIMER,-3) /* sent by timer expiration */
#define SI_MESGQ -4 /* sent by real time mesq state change */
-/*
- * sigevent definitions
- *
- * It seems likely that SIGEV_THREAD will have to be handled from
- * userspace, libpthread transmuting it to SIGEV_SIGNAL, which the
- * thread manager then catches and does the appropriate nonsense.
- * However, everything is written out here so as to not get lost.
- */
-#undef SIGEV_NONE
-#undef SIGEV_SIGNAL
-#undef SIGEV_THREAD
-#define SIGEV_NONE 128 /* other notification: meaningless */
-#define SIGEV_SIGNAL 129 /* notify via signal */
-#define SIGEV_CALLBACK 130 /* ??? */
-#define SIGEV_THREAD 131 /* deliver via thread creation */
-
-/* XXX This one isn't yet IRIX / ABI compatible. */
-typedef struct sigevent {
- int sigev_notify;
- sigval_t sigev_value;
- int sigev_signo;
- union {
- int _pad[SIGEV_PAD_SIZE];
- int _tid;
-
- struct {
- void (*_function)(sigval_t);
- void *_attribute; /* really pthread_attr_t */
- } _sigev_thread;
- } _sigev_un;
-} sigevent_t;
-
#ifdef __KERNEL__
/*
diff -puN include/asm-mips/sim.h~mips-megapatch include/asm-mips/sim.h
--- 25/include/asm-mips/sim.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sim.h 2004-02-19 12:53:02.000000000 -0800
@@ -13,14 +13,14 @@
#include <asm/offset.h>
-#ifdef CONFIG_MIPS32
-
/* Used in declaration of save_static functions. */
#define static_unused static __attribute__((unused))
#define __str2(x) #x
#define __str(x) __str2(x)
+#ifdef CONFIG_MIPS32
+
#define save_static_function(symbol) \
__asm__ ( \
".text\n\t" \
@@ -42,20 +42,12 @@ __asm__ ( \
".end\t" #symbol "\n\t" \
".size\t" #symbol",. - " #symbol)
-#define save_static(frame) do { } while (0)
-
#define nabi_no_regargs
#endif /* CONFIG_MIPS32 */
#ifdef CONFIG_MIPS64
-/* Used in declaration of save_static functions. */
-#define static_unused static __attribute__((unused))
-
-#define __str2(x) #x
-#define __str(x) __str2(x)
-
#define save_static_function(symbol) \
__asm__ ( \
".text\n\t" \
@@ -65,23 +57,18 @@ __asm__ ( \
".ent\t" #symbol ", 0\n" \
#symbol":\n\t" \
".frame\t$29, 0, $31\n\t" \
+ "sd\t$16,"__str(PT_R16)"($29)\t\t\t# save_static_function\n\t" \
+ "sd\t$17,"__str(PT_R17)"($29)\n\t" \
+ "sd\t$18,"__str(PT_R18)"($29)\n\t" \
+ "sd\t$19,"__str(PT_R19)"($29)\n\t" \
+ "sd\t$20,"__str(PT_R20)"($29)\n\t" \
+ "sd\t$21,"__str(PT_R21)"($29)\n\t" \
+ "sd\t$22,"__str(PT_R22)"($29)\n\t" \
+ "sd\t$23,"__str(PT_R23)"($29)\n\t" \
+ "sd\t$30,"__str(PT_R30)"($29)\n\t" \
".end\t" #symbol "\n\t" \
".size\t" #symbol",. - " #symbol)
-#define save_static(frame) \
- __asm__ __volatile__( \
- "sd\t$16,"__str(PT_R16)"(%0)\n\t" \
- "sd\t$17,"__str(PT_R17)"(%0)\n\t" \
- "sd\t$18,"__str(PT_R18)"(%0)\n\t" \
- "sd\t$19,"__str(PT_R19)"(%0)\n\t" \
- "sd\t$20,"__str(PT_R20)"(%0)\n\t" \
- "sd\t$21,"__str(PT_R21)"(%0)\n\t" \
- "sd\t$22,"__str(PT_R22)"(%0)\n\t" \
- "sd\t$23,"__str(PT_R23)"(%0)\n\t" \
- "sd\t$30,"__str(PT_R30)"(%0)\n\t" \
- : /* No outputs */ \
- : "r" (frame))
-
#define nabi_no_regargs \
unsigned long __dummy0, \
unsigned long __dummy1, \
diff -puN include/asm-mips/smp.h~mips-megapatch include/asm-mips/smp.h
--- 25/include/asm-mips/smp.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/smp.h 2004-02-19 12:53:02.000000000 -0800
@@ -16,6 +16,7 @@
#ifdef CONFIG_SMP
#include <linux/bitops.h>
+#include <linux/linkage.h>
#include <linux/threads.h>
#include <linux/cpumask.h>
#include <asm/atomic.h>
@@ -52,11 +53,6 @@ extern cpumask_t cpu_online_map;
#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map)
-static inline unsigned int num_online_cpus(void)
-{
- return cpus_weight(cpu_online_map);
-}
-
extern cpumask_t cpu_callout_map;
/* We don't mark CPUs online until __cpu_up(), so we need another measure */
static inline int num_booting_cpus(void)
@@ -64,6 +60,63 @@ static inline int num_booting_cpus(void)
return cpus_weight(cpu_callout_map);
}
+/* These are defined by the board-specific code. */
+
+/*
+ * Cause the function described by call_data to be executed on the passed
+ * cpu. When the function has finished, increment the finished field of
+ * call_data.
+ */
+extern void core_send_ipi(int cpu, unsigned int action);
+
+/*
+ * Detect available CPUs, populate phys_cpu_present_map
+ */
+extern void prom_build_cpu_map(void);
+
+/*
+ * Firmware CPU startup hook
+ */
+extern void prom_boot_secondary(int cpu, struct task_struct *idle);
+
+/*
+ * After we've done initial boot, this function is called to allow the
+ * board code to clean up state, if needed
+ */
+extern void prom_init_secondary(void);
+
+/*
+ * Callout to firmware before smp_init
+ */
+extern void prom_prepare_cpus(unsigned int max_cpus);
+
+/*
+ * Do whatever setup needs to be done for SMP at the board level. Return
+ * the number of cpus in the system, including this one
+ */
+extern int prom_setup_smp(void);
+
+/*
+ * Last chance for the board code to finish SMP initialization before
+ * the CPU is "online".
+ */
+extern void prom_smp_finish(void);
+
+/* Hook for after all CPUs are online */
+extern void prom_cpus_done(void);
+
+extern void asmlinkage smp_bootstrap(void);
+
+/*
+ * this function sends a 'reschedule' IPI to another CPU.
+ * it goes straight through and wastes no time serializing
+ * anything. Worst case is that we lose a reschedule ...
+ */
+static inline void smp_send_reschedule(int cpu)
+{
+ core_send_ipi(cpu, SMP_RESCHEDULE_YOURSELF);
+}
+
#endif /* CONFIG_SMP */
#endif /* __ASM_SMP_H */
diff -puN -L include/asm-mips/smplock.h include/asm-mips/smplock.h~mips-megapatch /dev/null
--- 25/include/asm-mips/smplock.h
+++ /dev/null 2002-08-30 16:31:37.000000000 -0700
@@ -1,67 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Default SMP lock implementation
- */
-#include <linux/config.h>
-#include <linux/interrupt.h>
-#include <linux/spinlock.h>
-
-extern spinlock_t kernel_flag;
-
-#ifdef CONFIG_SMP
-#define kernel_locked() spin_is_locked(&kernel_flag)
-#else
-#ifdef CONFIG_PREEMPT
-#define kernel_locked() preempt_count()
-#else
-#define kernel_locked() 1
-#endif
-#endif
-
-/*
- * Release global kernel lock and global interrupt lock
- */
-#define release_kernel_lock(task) \
-do { \
- if (unlikely(task->lock_depth >= 0)) \
- spin_unlock(&kernel_flag); \
-} while (0)
-
-/*
- * Re-acquire the kernel lock
- */
-#define reacquire_kernel_lock(task) \
-do { \
- if (unlikely(task->lock_depth >= 0)) \
- spin_lock(&kernel_flag); \
-} while (0)
-
-
-/*
- * Getting the big kernel lock.
- *
- * This cannot happen asynchronously,
- * so we only need to worry about other
- * CPU's.
- */
-static __inline__ void lock_kernel(void)
-{
-#ifdef CONFIG_PREEMPT
- if (current->lock_depth == -1)
- spin_lock(&kernel_flag);
- ++current->lock_depth;
-#else
-
- if (!++current->lock_depth)
- spin_lock(&kernel_flag);
-#endif
-}
-
-static __inline__ void unlock_kernel(void)
-{
- if (--current->lock_depth < 0)
- spin_unlock(&kernel_flag);
-}
diff -puN include/asm-mips/sn/addrs.h~mips-megapatch include/asm-mips/sn/addrs.h
--- 25/include/asm-mips/sn/addrs.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sn/addrs.h 2004-02-19 12:53:02.000000000 -0800
@@ -16,7 +16,6 @@
#endif /* !__ASSEMBLY__ */
#include <asm/addrspace.h>
-#include <asm/reg.h>
#include <asm/sn/kldir.h>
#if defined(CONFIG_SGI_IP27)
@@ -439,9 +438,9 @@
#define PI_ERROR_SIZE(nasid) KLD_PI_ERROR(nasid)->size
#define NODE_OFFSET_TO_K0(_nasid, _off) \
- PHYS_TO_K0((NODE_OFFSET(_nasid) + (_off)) | K0BASE)
+ PHYS_TO_K0((NODE_OFFSET(_nasid) + (_off)) | CAC_BASE)
#define NODE_OFFSET_TO_K1(_nasid, _off) \
- TO_UNCAC((NODE_OFFSET(_nasid) + (_off)) | K1BASE)
+ TO_UNCAC((NODE_OFFSET(_nasid) + (_off)) | UNCAC_BASE)
#define K0_TO_NODE_OFFSET(_k0addr) \
((__psunsigned_t)(_k0addr) & NODE_ADDRSPACE_MASK)
diff -puN include/asm-mips/sn/arch.h~mips-megapatch include/asm-mips/sn/arch.h
--- 25/include/asm-mips/sn/arch.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sn/arch.h 2004-02-19 12:53:02.000000000 -0800
@@ -35,12 +35,9 @@ typedef u64 nic_t;
#define CNODE_NUM_CPUS(_cnode) (NODEPDA(_cnode)->node_num_cpus)
#define CNODE_TO_CPU_BASE(_cnode) (NODEPDA(_cnode)->node_first_cpu)
-#define cputocnode(cpu) \
- (cpu_data[(cpu)].p_nodeid)
-#define cputonasid(cpu) \
- (cpu_data[(cpu)].p_nasid)
-#define cputoslice(cpu) \
- (cpu_data[(cpu)].p_slice)
+#define cputocnode(cpu) (cpu_data[(cpu)].p_nodeid)
+#define cputonasid(cpu) (cpu_data[(cpu)].p_nasid)
+#define cputoslice(cpu) (cpu_data[(cpu)].p_slice)
#define makespnum(_nasid, _slice) \
(((_nasid) << CPUS_PER_NODE_SHFT) | (_slice))
@@ -100,8 +97,6 @@ nasid_t compact_to_nasid_nodeid(cnodeid_
#define CPUID_TO_COMPACT_NODEID(cpu) (cpuid_to_compact_node[(cpu)])
#endif
-extern int node_getlastslot(cnodeid_t);
-
#endif /* !__ASSEMBLY__ */
#define SLOT_BITMASK (MAX_MEM_SLOTS - 1)
diff -puN /dev/null include/asm-mips/sn/hub.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/sn/hub.h 2004-02-19 12:53:02.000000000 -0800
@@ -0,0 +1,15 @@
+#ifndef __ASM_SN_HUB_H
+#define __ASM_SN_HUB_H
+
+#include <asm/sn/types.h>
+#include <asm/sn/io.h>
+#include <asm/sn/klkernvars.h>
+
+struct hub_data {
+ kern_vars_t kern_vars;
+};
+
+extern struct hub_data *hub_data[];
+#define HUB_DATA(n) (hub_data[(n)])
+
+#endif /* __ASM_SN_HUB_H */
diff -puN include/asm-mips/sni.h~mips-megapatch include/asm-mips/sni.h
--- 25/include/asm-mips/sni.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sni.h 2004-02-19 12:53:02.000000000 -0800
@@ -78,9 +78,12 @@
/*
* Interrupt 0-16 are EISA interrupts. Interrupts from 16 on are assigned
* to the other interrupts generated by ASIC PCI.
+ *
+ * INT2 is a wired-or of the push button interrupt, high temperature interrupt
+ * ASIC PCI interrupt.
*/
#define PCIMT_KEYBOARD_IRQ 1
-#define PCIMT_IRQ_INT2 16 /* What is that? */
+#define PCIMT_IRQ_INT2 16
#define PCIMT_IRQ_INTD 17
#define PCIMT_IRQ_INTC 18
#define PCIMT_IRQ_INTB 19
diff -puN include/asm-mips/sn/intr.h~mips-megapatch include/asm-mips/sn/intr.h
--- 25/include/asm-mips/sn/intr.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sn/intr.h 2004-02-19 12:53:02.000000000 -0800
@@ -17,18 +17,14 @@
#define N_INTPENDJUNK_BITS 8
#define INTPENDJUNK_CLRBIT 0x80
-#include <asm/sn/intr_public.h>
-
-#ifndef __ASSEMBLY__
-
/*
* Macros to manipulate the interrupt register on the calling hub chip.
*/
-#define LOCAL_HUB_SEND_INTR(_level) LOCAL_HUB_S(PI_INT_PEND_MOD, \
- (0x100|(_level)))
-#define REMOTE_HUB_SEND_INTR(_hub, _level) \
- REMOTE_HUB_S((_hub), PI_INT_PEND_MOD, (0x100|(_level)))
+#define LOCAL_HUB_SEND_INTR(level) \
+ LOCAL_HUB_S(PI_INT_PEND_MOD, (0x100 | (level)))
+#define REMOTE_HUB_SEND_INTR(hub, level) \
+ REMOTE_HUB_S((hub), PI_INT_PEND_MOD, (0x100 | (level)))
/*
* When clearing the interrupt, make sure this clear does make it
@@ -36,16 +32,19 @@
* We do an uncached load of the int_pend0 register to ensure this.
*/
-#define LOCAL_HUB_CLR_INTR(_level) \
- LOCAL_HUB_S(PI_INT_PEND_MOD, (_level)), \
- LOCAL_HUB_L(PI_INT_PEND0)
-#define REMOTE_HUB_CLR_INTR(_hub, _level) \
- REMOTE_HUB_S((_hub), PI_INT_PEND_MOD, (_level)), \
- REMOTE_HUB_L((_hub), PI_INT_PEND0)
-
-#else /* __ASSEMBLY__ */
-
-#endif /* __ASSEMBLY__ */
+#define LOCAL_HUB_CLR_INTR(level) \
+do { \
+ LOCAL_HUB_S(PI_INT_PEND_MOD, (level)); \
+ LOCAL_HUB_L(PI_INT_PEND0); \
+} while (0);
+
+#define REMOTE_HUB_CLR_INTR(hub, level) \
+do { \
+ nasid_t __hub = (hub); \
+ \
+ REMOTE_HUB_S(__hub, PI_INT_PEND_MOD, (level)); \
+ REMOTE_HUB_L(__hub, PI_INT_PEND0); \
+} while (0);
/*
* Hard-coded interrupt levels:
@@ -63,60 +62,68 @@
*/
-/* INT_PEND0 hard-coded bits. */
-#ifdef SABLE
-#define SDISK_INTR 63
-#endif
-#ifdef DEBUG_INTR_TSTAMP
-/* hard coded interrupt level for interrupt latency test interrupt */
-#define CPU_INTRLAT_B 62
-#define CPU_INTRLAT_A 61
-#endif
-
-/* Hardcoded bits required by software. */
-#define MSC_MESG_INTR 13
-#define CPU_ACTION_B 11
-#define CPU_ACTION_A 10
-
-/* These are determined by hardware: */
-#define CC_PEND_B 6
-#define CC_PEND_A 5
-#define UART_INTR 4
-#define PG_MIG_INTR 3
-#define GFX_INTR_B 2
-#define GFX_INTR_A 1
-#define RESERVED_INTR 0
-
-/* INT_PEND1 hard-coded bits: */
-#define MSC_PANIC_INTR 63
-#define NI_ERROR_INTR 62
-#define MD_COR_ERR_INTR 61
-#define COR_ERR_INTR_B 60
-#define COR_ERR_INTR_A 59
-#define CLK_ERR_INTR 58
-#define IO_ERROR_INTR 57 /* set up by prom */
-
-#define DEBUG_INTR_B 55 /* used by symmon to stop all cpus */
-#define DEBUG_INTR_A 54
-
-#define BRIDGE_ERROR_INTR 53 /* Setup by PROM to catch Bridge Errors */
-
-#define IP27_INTR_0 52 /* Reserved for PROM use */
-#define IP27_INTR_1 51 /* (do not use in Kernel) */
-#define IP27_INTR_2 50
-#define IP27_INTR_3 49
-#define IP27_INTR_4 48
-#define IP27_INTR_5 47
-#define IP27_INTR_6 46
-#define IP27_INTR_7 45
+/*
+ * INT_PEND0 hard-coded bits.
+ */
+
+/*
+ * INT_PEND0 bits determined by hardware:
+ */
+#define RESERVED_INTR 0 /* What is this bit? */
+#define GFX_INTR_A 1
+#define GFX_INTR_B 2
+#define PG_MIG_INTR 3
+#define UART_INTR 4
+#define CC_PEND_A 5
+#define CC_PEND_B 6
+
+/*
+ * INT_PEND0 used by the kernel for itself ...
+ */
+#define CPU_RESCHED_A_IRQ 7
+#define CPU_RESCHED_B_IRQ 8
+#define CPU_CALL_A_IRQ 9
+#define CPU_CALL_B_IRQ 10
+#define MSC_MESG_INTR 11
+#define BASE_PCI_IRQ 12
+
+/*
+ * INT_PEND0 again, bits determined by hardware / hardcoded:
+ */
+#define SDISK_INTR 63 /* SABLE name */
+#define IP_PEND0_6_63 63 /* What is this bit? */
+
+/*
+ * INT_PEND1 hard-coded bits:
+ */
+#define NI_BRDCAST_ERR_A 39
+#define NI_BRDCAST_ERR_B 40
-#define TLB_INTR_B 44 /* used for tlb flush random */
-#define TLB_INTR_A 43
+#define LLP_PFAIL_INTR_A 41 /* see ml/SN/SN0/sysctlr.c */
+#define LLP_PFAIL_INTR_B 42
-#define LLP_PFAIL_INTR_B 42 /* see ml/SN/SN0/sysctlr.c */
-#define LLP_PFAIL_INTR_A 41
+#define TLB_INTR_A 43 /* used for tlb flush random */
+#define TLB_INTR_B 44
-#define NI_BRDCAST_ERR_B 40
-#define NI_BRDCAST_ERR_A 39
+#define IP27_INTR_0 45 /* Reserved for PROM use */
+#define IP27_INTR_1 46 /* do not use in Kernel */
+#define IP27_INTR_2 47
+#define IP27_INTR_3 48
+#define IP27_INTR_4 49
+#define IP27_INTR_5 50
+#define IP27_INTR_6 51
+#define IP27_INTR_7 52
+
+#define BRIDGE_ERROR_INTR 53 /* Setup by PROM to catch */
+ /* Bridge Errors */
+#define DEBUG_INTR_A 54
+#define DEBUG_INTR_B 55 /* Used by symmon to stop all cpus */
+#define IO_ERROR_INTR 57 /* Setup by PROM */
+#define CLK_ERR_INTR 58
+#define COR_ERR_INTR_A 59
+#define COR_ERR_INTR_B 60
+#define MD_COR_ERR_INTR 61
+#define NI_ERROR_INTR 62
+#define MSC_PANIC_INTR 63
#endif /* __ASM_SN_INTR_H */
diff -puN include/asm-mips/sn/intr_public.h~mips-megapatch include/asm-mips/sn/intr_public.h
--- 25/include/asm-mips/sn/intr_public.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sn/intr_public.h 2004-02-19 12:53:02.000000000 -0800
@@ -8,46 +8,24 @@
#ifndef __ASM_SN_INTR_PUBLIC_H
#define __ASM_SN_INTR_PUBLIC_H
-
-/* REMEMBER: If you change these, the whole world needs to be recompiled.
- * It would also require changing the hubspl.s code and SN0/intr.c
- * Currently, the spl code has no support for multiple INTPEND1 masks.
- */
-
-#define N_INTPEND0_MASKS 1
-#define N_INTPEND1_MASKS 1
-
-#define INTPEND0_MAXMASK (N_INTPEND0_MASKS - 1)
-#define INTPEND1_MAXMASK (N_INTPEND1_MASKS - 1)
-
-#ifndef __ASSEMBLY__
#include <asm/sn/arch.h>
-struct intr_vecblk_s; /* defined in asm/sn/intr.h */
-
/*
- * The following are necessary to create the illusion of a CEL
- * on the SN0 hub. We'll add more priority levels soon, but for
- * now, any interrupt in a particular band effectively does an spl.
- * These must be in the PDA since they're different for each processor.
- * Users of this structure must hold the vector_lock in the appropriate vector
- * block before modifying the mask arrays. There's only one vector block
- * for each Hub so a lock in the PDA wouldn't be adequate.
+ * The following are necessary to create the illusion of a CEL on the SN0 hub.
+ * We'll add more priority levels soon, but for now, any interrupt in a
+ * particular band effectively does an spl. These must be in the PDA since
+ * they're different for each processor. Users of this structure must hold the
+ * vector_lock in the appropriate vector block before modifying the mask arrays.
+ * There's only one vector block for each Hub so a lock in the PDA wouldn't be
+ * adequate.
*/
-typedef struct hub_intmasks_s {
+struct hub_intmasks_s {
/*
* The masks are stored with the lowest-priority (most inclusive)
* in the lowest-numbered masks (i.e., 0, 1, 2...).
*/
- /* INT_PEND0: */
- hubreg_t intpend0_masks[N_INTPEND0_MASKS];
- /* INT_PEND1: */
- hubreg_t intpend1_masks[N_INTPEND1_MASKS];
- /* INT_PEND0: */
- struct intr_vecblk_s *dispatch0;
- /* INT_PEND1: */
- struct intr_vecblk_s *dispatch1;
-} hub_intmasks_t;
+ hubreg_t intpend0_masks; /* INT_PEND0 */
+ hubreg_t intpend1_masks; /* INT_PEND1 */
+};
-#endif /* !__ASSEMBLY__ */
#endif /* __ASM_SN_INTR_PUBLIC_H */
diff -puN include/asm-mips/sn/klconfig.h~mips-megapatch include/asm-mips/sn/klconfig.h
--- 25/include/asm-mips/sn/klconfig.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sn/klconfig.h 2004-02-19 12:53:02.000000000 -0800
@@ -30,7 +30,9 @@
#include <linux/config.h>
#include <linux/types.h>
#include <asm/sn/types.h>
+
#if defined(CONFIG_SGI_IP27)
+
#include <asm/sn/sn0/addrs.h>
//#include <sys/SN/router.h>
// XXX Stolen from <sys/SN/router.h>:
@@ -38,12 +40,16 @@
#include <asm/sn/sn0/sn0_fru.h>
//#include <sys/graph.h>
//#include <sys/xtalk/xbow.h>
+
#elif defined(CONFIG_SGI_IP35)
+
#include <asm/sn/sn1/addrs.h>
#include <sys/sn/router.h>
#include <sys/graph.h>
#include <asm/xtalk/xbow.h>
+
#endif /* !CONFIG_SGI_IP27 && !CONFIG_SGI_IP35 */
+
#if defined(CONFIG_SGI_IP27) || defined(CONFIG_SGI_IP35)
#include <asm/sn/agent.h>
#include <asm/arc/types.h>
diff -puN include/asm-mips/sn/sn0/addrs.h~mips-megapatch include/asm-mips/sn/sn0/addrs.h
--- 25/include/asm-mips/sn/sn0/addrs.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sn/sn0/addrs.h 2004-02-19 12:53:02.000000000 -0800
@@ -40,20 +40,6 @@
* use some new ANSI preprocessor stuff to paste these on where needed.
*/
-#define CAC_BASE 0xa800000000000000
-
-#define HSPEC_BASE 0x9000000000000000
-#define IO_BASE 0x9200000000000000
-#define MSPEC_BASE 0x9400000000000000
-#define UNCAC_BASE 0x9600000000000000
-
-#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
-#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_MSPEC(x) (MSPEC_BASE | ((x) & TO_PHYS_MASK))
-#define TO_HSPEC(x) (HSPEC_BASE | ((x) & TO_PHYS_MASK))
-
-
/*
* The following couple of definitions will eventually need to be variables,
* since the amount of address space assigned to each node depends on
@@ -192,7 +178,7 @@
#define IP27PROM_DECOMP_SIZE 0xfff00
#define IP27PROM_BASE PHYS_TO_K0(0x01a00000)
-#define IP27PROM_BASE_MAPPED (K2BASE | 0x1fc00000)
+#define IP27PROM_BASE_MAPPED (UNCAC_BASE | 0x1fc00000)
#define IP27PROM_SIZE_MAX 0x100000
#define IP27PROM_PCFG PHYS_TO_K0(0x01b00000)
@@ -223,7 +209,7 @@
#define IO6PROM_BASE PHYS_TO_K0(0x01c00000)
#define IO6PROM_SIZE 0x400000
-#define IO6PROM_BASE_MAPPED (K2BASE | 0x11c00000)
+#define IO6PROM_BASE_MAPPED (UNCAC_BASE | 0x11c00000)
#define IO6DPROM_BASE PHYS_TO_K0(0x01c00000)
#define IO6DPROM_SIZE 0x200000
diff -puN include/asm-mips/sn/sn0/ip27.h~mips-megapatch include/asm-mips/sn/sn0/ip27.h
--- 25/include/asm-mips/sn/sn0/ip27.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sn/sn0/ip27.h 2004-02-19 12:53:02.000000000 -0800
@@ -84,14 +84,9 @@
/* Sanity hazzard ... Below all the Origin hacks are following. */
-#define CPU_RESCHED_A_IRQ 0
-#define CPU_RESCHED_B_IRQ 1
-#define CPU_CALL_A_IRQ 2
-#define CPU_CALL_B_IRQ 3
-#define BASE_PCI_IRQ 4
-
#define SN00_BRIDGE 0x9200000008000000
#define SN00I_BRIDGE0 0x920000000b000000
#define SN00I_BRIDGE1 0x920000000e000000
#define SN00I_BRIDGE2 0x920000000f000000
+
#endif /* _ASM_SN_SN0_IP27_H */
diff -puN include/asm-mips/sn/sn_private.h~mips-megapatch include/asm-mips/sn/sn_private.h
--- 25/include/asm-mips/sn/sn_private.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/sn/sn_private.h 2004-02-19 12:53:03.000000000 -0800
@@ -1,11 +1,20 @@
+#ifndef __ASM_SN_SN_PRIVATE_H
+#define __ASM_SN_SN_PRIVATE_H
+
+#include <asm/sn/types.h>
+
extern nasid_t master_nasid;
+extern void cpu_node_probe(void);
extern cnodeid_t get_compact_nodeid(void);
extern void hub_rtc_init(cnodeid_t);
extern void cpu_time_init(void);
extern void per_cpu_init(void);
-extern void install_cpuintr(int cpu);
-extern void install_tlbintr(int cpu);
+extern void per_hub_init(cnodeid_t cnode);
+extern void install_cpu_nmi_handler(int slice);
+extern void install_ipi(void);
extern void setup_replication_mask(int);
extern void replicate_kernel_text(int);
extern pfn_t node_getfirstfree(cnodeid_t);
+
+#endif /* __ASM_SN_SN_PRIVATE_H */
diff -puN include/asm-mips/socket.h~mips-megapatch include/asm-mips/socket.h
--- 25/include/asm-mips/socket.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/socket.h 2004-02-19 12:53:03.000000000 -0800
@@ -66,7 +66,7 @@ To add: #define SO_REUSEPORT 0x0200 /* A
#define SO_TIMESTAMP 29
#define SCM_TIMESTAMP SO_TIMESTAMP
-#define SO_PEERSEC 30
+#define SO_PEERSEC 30
/* Nast libc5 fixup - bletch */
#if defined(__KERNEL__)
diff -puN include/asm-mips/spinlock.h~mips-megapatch include/asm-mips/spinlock.h
--- 25/include/asm-mips/spinlock.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/spinlock.h 2004-02-19 12:53:03.000000000 -0800
@@ -36,7 +36,7 @@ static inline void _raw_spin_lock(spinlo
unsigned int tmp;
__asm__ __volatile__(
- ".set\tnoreorder\t\t\t# spin_lock\n"
+ ".set\tnoreorder\t\t\t# _raw_spin_lock\n"
"1:\tll\t%1, %2\n\t"
"bnez\t%1, 1b\n\t"
" li\t%1, 1\n\t"
@@ -52,7 +52,7 @@ static inline void _raw_spin_lock(spinlo
static inline void _raw_spin_unlock(spinlock_t *lock)
{
__asm__ __volatile__(
- ".set\tnoreorder\t\t\t# spin_unlock\n\t"
+ ".set\tnoreorder\t\t\t# _raw_spin_unlock\n\t"
"sync\n\t"
"sw\t$0, %0\n\t"
".set\treorder"
@@ -66,7 +66,7 @@ static inline unsigned int _raw_spin_try
unsigned int temp, res;
__asm__ __volatile__(
- ".set\tnoreorder\t\t\t# spin_trylock\n\t"
+ ".set\tnoreorder\t\t\t# _raw_spin_trylock\n\t"
"1:\tll\t%0, %3\n\t"
"ori\t%2, %0, 1\n\t"
"sc\t%2, %1\n\t"
@@ -104,7 +104,7 @@ static inline void _raw_read_lock(rwlock
unsigned int tmp;
__asm__ __volatile__(
- ".set\tnoreorder\t\t\t# read_lock\n"
+ ".set\tnoreorder\t\t\t# _raw_read_lock\n"
"1:\tll\t%1, %2\n\t"
"bltz\t%1, 1b\n\t"
" addu\t%1, 1\n\t"
@@ -125,7 +125,7 @@ static inline void _raw_read_unlock(rwlo
unsigned int tmp;
__asm__ __volatile__(
- ".set\tnoreorder\t\t\t# read_unlock\n"
+ ".set\tnoreorder\t\t\t# _raw_read_unlock\n"
"1:\tll\t%1, %2\n\t"
"sub\t%1, 1\n\t"
"sc\t%1, %0\n\t"
@@ -142,7 +142,7 @@ static inline void _raw_write_lock(rwloc
unsigned int tmp;
__asm__ __volatile__(
- ".set\tnoreorder\t\t\t# write_lock\n"
+ ".set\tnoreorder\t\t\t# _raw_write_lock\n"
"1:\tll\t%1, %2\n\t"
"bnez\t%1, 1b\n\t"
" lui\t%1, 0x8000\n\t"
@@ -158,7 +158,7 @@ static inline void _raw_write_lock(rwloc
static inline void _raw_write_unlock(rwlock_t *rw)
{
__asm__ __volatile__(
- ".set\tnoreorder\t\t\t# write_unlock\n\t"
+ ".set\tnoreorder\t\t\t# _raw_write_unlock\n\t"
"sync\n\t"
"sw\t$0, %0\n\t"
".set\treorder"
diff -puN include/asm-mips/stackframe.h~mips-megapatch include/asm-mips/stackframe.h
--- 25/include/asm-mips/stackframe.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/stackframe.h 2004-02-19 12:53:03.000000000 -0800
@@ -26,8 +26,10 @@
.macro SAVE_TEMP
mfhi v1
+#ifdef CONFIG_MIPS32
LONG_S $8, PT_R8(sp)
LONG_S $9, PT_R9(sp)
+#endif
LONG_S v1, PT_HI(sp)
mflo v1
LONG_S $10, PT_R10(sp)
@@ -79,7 +81,7 @@
mfc0 \temp, CP0_CONTEXT
srl \temp, 23
sll \temp, 2
- LONG_S \stackp, kernelsp(temp)
+ LONG_S \stackp, kernelsp(\temp)
#endif
#ifdef CONFIG_MIPS64
lw \temp, TI_CPU(gp)
@@ -137,6 +139,10 @@
LONG_S $6, PT_R6(sp)
MFC0 v1, CP0_EPC
LONG_S $7, PT_R7(sp)
+#ifdef CONFIG_MIPS64
+ LONG_S $8, PT_R8(sp)
+ LONG_S $9, PT_R9(sp)
+#endif
LONG_S v1, PT_EPC(sp)
LONG_S $25, PT_R25(sp)
LONG_S $28, PT_R28(sp)
@@ -163,8 +169,10 @@
.macro RESTORE_TEMP
LONG_L $24, PT_LO(sp)
+#ifdef CONFIG_MIPS32
LONG_L $8, PT_R8(sp)
LONG_L $9, PT_R9(sp)
+#endif
mtlo $24
LONG_L $24, PT_HI(sp)
LONG_L $10, PT_R10(sp)
@@ -194,27 +202,32 @@
.macro RESTORE_SOME
.set push
.set reorder
- mfc0 t0, CP0_STATUS
- .set pop
- ori t0, 0x1f
- xori t0, 0x1f
- mtc0 t0, CP0_STATUS
+ .set noat
+ mfc0 a0, CP0_STATUS
+ ori a0, 0x1f
+ xori a0, 0x1f
+ mtc0 a0, CP0_STATUS
li v1, 0xff00
- and t0, v1
+ and a0, v1
LONG_L v0, PT_STATUS(sp)
nor v1, $0, v1
and v0, v1
- or v0, t0
+ or v0, a0
mtc0 v0, CP0_STATUS
LONG_L $31, PT_R31(sp)
LONG_L $28, PT_R28(sp)
LONG_L $25, PT_R25(sp)
+#ifdef CONFIG_MIPS64
+ LONG_L $8, PT_R8(sp)
+ LONG_L $9, PT_R9(sp)
+#endif
LONG_L $7, PT_R7(sp)
LONG_L $6, PT_R6(sp)
LONG_L $5, PT_R5(sp)
LONG_L $4, PT_R4(sp)
LONG_L $3, PT_R3(sp)
LONG_L $2, PT_R2(sp)
+ .set pop
.endm
.macro RESTORE_SP_AND_RET
@@ -232,29 +245,34 @@
.macro RESTORE_SOME
.set push
.set reorder
- mfc0 t0, CP0_STATUS
- .set pop
- ori t0, 0x1f
- xori t0, 0x1f
- mtc0 t0, CP0_STATUS
+ .set noat
+ mfc0 a0, CP0_STATUS
+ ori a0, 0x1f
+ xori a0, 0x1f
+ mtc0 a0, CP0_STATUS
li v1, 0xff00
- and t0, v1
+ and a0, v1
LONG_L v0, PT_STATUS(sp)
nor v1, $0, v1
and v0, v1
- or v0, t0
+ or v0, a0
mtc0 v0, CP0_STATUS
LONG_L v1, PT_EPC(sp)
MTC0 v1, CP0_EPC
LONG_L $31, PT_R31(sp)
LONG_L $28, PT_R28(sp)
LONG_L $25, PT_R25(sp)
+#ifdef CONFIG_MIPS64
+ LONG_L $8, PT_R8(sp)
+ LONG_L $9, PT_R9(sp)
+#endif
LONG_L $7, PT_R7(sp)
LONG_L $6, PT_R6(sp)
LONG_L $5, PT_R5(sp)
LONG_L $4, PT_R4(sp)
LONG_L $3, PT_R3(sp)
LONG_L $2, PT_R2(sp)
+ .set pop
.endm
.macro RESTORE_SP_AND_RET
@@ -271,18 +289,18 @@
.endm
.macro RESTORE_ALL
- RESTORE_SOME
- RESTORE_AT
RESTORE_TEMP
+ RESTORE_AT
RESTORE_STATIC
+ RESTORE_SOME
RESTORE_SP
.endm
.macro RESTORE_ALL_AND_RET
- RESTORE_SOME
- RESTORE_AT
RESTORE_TEMP
+ RESTORE_AT
RESTORE_STATIC
+ RESTORE_SOME
RESTORE_SP_AND_RET
.endm
diff -puN include/asm-mips/system.h~mips-megapatch include/asm-mips/system.h
--- 25/include/asm-mips/system.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/system.h 2004-02-19 12:53:03.000000000 -0800
@@ -219,7 +219,7 @@ do { \
"nop\n\t" \
".set pop" \
: /* no output */ \
- : "m" (*(int *)KSEG1) \
+ : "m" (*(int *)CKSEG1) \
: "memory")
#define fast_wmb() __sync()
@@ -237,8 +237,8 @@ do { \
#define wmb() fast_wmb()
#define rmb() fast_rmb()
-#define mb() wbflush();
-#define iob() wbflush();
+#define mb() wbflush()
+#define iob() wbflush()
#else /* !CONFIG_CPU_HAS_WB */
@@ -280,7 +280,7 @@ do { \
(last) = resume(prev, next, next->thread_info); \
} while(0)
-static inline unsigned long xchg_u32(volatile int * m, unsigned int val)
+static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
{
__u32 retval;
@@ -296,7 +296,9 @@ static inline unsigned long xchg_u32(vol
"sc\t%2, %1\n\t"
"beqzl\t%2, 1b\n\t"
" ll\t%0, %3\n\t"
+#ifdef CONFIG_SMP
"sync\n\t"
+#endif
".set\tpop"
: "=&r" (retval), "=m" (*m), "=&r" (dummy)
: "R" (*m), "Jr" (val)
@@ -314,7 +316,7 @@ static inline unsigned long xchg_u32(vol
}
#ifdef CONFIG_MIPS64
-static inline __u64 xchg_u64(volatile __u64 * m, __u64 long val)
+static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
{
__u64 retval;
@@ -330,7 +332,9 @@ static inline __u64 xchg_u64(volatile __
"scd\t%2, %1\n\t"
"beqzl\t%2, 1b\n\t"
" lld\t%0, %3\n\t"
+#ifdef CONFIG_SMP
"sync\n\t"
+#endif
".set\tpop"
: "=&r" (retval), "=m" (*m), "=&r" (dummy)
: "R" (*m), "Jr" (val)
@@ -348,28 +352,128 @@ static inline __u64 xchg_u64(volatile __
}
#else
extern __u64 __xchg_u64_unsupported_on_32bit_kernels(volatile __u64 * m, __u64 val);
-#define xchg_u64 __xchg_u64_unsupported_on_32bit_kernels
+#define __xchg_u64 __xchg_u64_unsupported_on_32bit_kernels
#endif
-#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-#define tas(ptr) (xchg((ptr),1))
+/* This function doesn't exist, so you'll get a linker error
+ if something tries to do an invalid xchg(). */
+extern void __xchg_called_with_bad_pointer(void);
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
{
switch (size) {
case 4:
- return xchg_u32(ptr, x);
+ return __xchg_u32(ptr, x);
case 8:
- return xchg_u64(ptr, x);
+ return __xchg_u64(ptr, x);
}
+ __xchg_called_with_bad_pointer();
return x;
}
+#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+#define tas(ptr) (xchg((ptr),1))
+
+#define __HAVE_ARCH_CMPXCHG 1
+
+static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
+ unsigned long new)
+{
+ __u32 retval;
+
+#ifdef CONFIG_CPU_HAS_LLSC
+ __asm__ __volatile__(
+ " .set noat \n"
+ "1: ll %0, %2 # __cmpxchg_u32 \n"
+ " bne %0, %z3, 2f \n"
+ " move $1, %z4 \n"
+ " sc $1, %1 \n"
+ " beqz $1, 1b \n"
+#ifdef CONFIG_SMP
+ " sync \n"
+#endif
+ "2: \n"
+ " .set at \n"
+ : "=&r" (retval), "=m" (*m)
+ : "R" (*m), "Jr" (old), "Jr" (new)
+ : "memory");
+#else
+ unsigned long flags;
+
+ local_irq_save(flags);
+ retval = *m;
+ if (retval == old)
+ *m = new;
+ local_irq_restore(flags); /* implies memory barrier */
+#endif
+
+ return retval;
+}
+
+#ifdef CONFIG_MIPS64
+static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old,
+ unsigned long new)
+{
+ __u64 retval;
+
+#ifdef CONFIG_CPU_HAS_LLDSCD
+ __asm__ __volatile__(
+ " .set noat \n"
+ "1: lld %0, %2 # __cmpxchg_u64 \n"
+ " bne %0, %z3, 2f \n"
+ " move $1, %z4 \n"
+ " scd $1, %1 \n"
+ " beqz $1, 1b \n"
+#ifdef CONFIG_SMP
+ " sync \n"
+#endif
+ "2: \n"
+ " .set at \n"
+ : "=&r" (retval), "=m" (*m)
+ : "R" (*m), "Jr" (old), "Jr" (new)
+ : "memory");
+#else
+ unsigned long flags;
+
+ local_irq_save(flags);
+ retval = *m;
+ if (retval == old)
+ *m = new;
+ local_irq_restore(flags); /* implies memory barrier */
+#endif
+
+ return retval;
+}
+#else
+extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels(
+ volatile int * m, unsigned long old, unsigned long new);
+#define __cmpxchg_u64 __cmpxchg_u64_unsupported_on_32bit_kernels
+#endif
+
+/* This function doesn't exist, so you'll get a linker error
+ if something tries to do an invalid cmpxchg(). */
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
+ unsigned long new, int size)
+{
+ switch (size) {
+ case 4:
+ return __cmpxchg_u32(ptr, old, new);
+ case 8:
+ return __cmpxchg_u64(ptr, old, new);
+ }
+ __cmpxchg_called_with_bad_pointer();
+ return old;
+}
+
+#define cmpxchg(ptr,old,new) ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), (unsigned long)(new),sizeof(*(ptr))))
+
extern void *set_except_vector(int n, void *addr);
extern void per_cpu_trap_init(void);
-extern void __die(const char *, struct pt_regs *, const char *file,
- const char *func, unsigned long line) __attribute__((noreturn));
+extern NORET_TYPE void __die(const char *, struct pt_regs *, const char *file,
+ const char *func, unsigned long line);
extern void __die_if_kernel(const char *, struct pt_regs *, const char *file,
const char *func, unsigned long line);
@@ -386,4 +490,16 @@ static __inline__ int con_is_present(voi
return serial_console ? 0 : 1;
}
+/*
+ * Taken from include/asm-ia64/system.h; prevents deadlock on SMP
+ * systems.
+ */
+#define prepare_arch_switch(rq, next) \
+do { \
+ spin_lock(&(next)->switch_lock); \
+ spin_unlock(&(rq)->lock); \
+} while (0)
+#define finish_arch_switch(rq, prev) spin_unlock_irq(&(prev)->switch_lock)
+#define task_running(rq, p) ((rq)->curr == (p) || spin_is_locked(&(p)->switch_lock))
+
#endif /* _ASM_SYSTEM_H */
diff -puN include/asm-mips/termios.h~mips-megapatch include/asm-mips/termios.h
--- 25/include/asm-mips/termios.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/termios.h 2004-02-19 12:53:03.000000000 -0800
@@ -59,6 +59,8 @@ struct termio {
};
#ifdef __KERNEL__
+#include <linux/module.h>
+
/*
* intr=^C quit=^\ erase=del kill=^U
* vmin=\1 vtime=\0 eol2=\0 swtc=\0
diff -puN include/asm-mips/thread_info.h~mips-megapatch include/asm-mips/thread_info.h
--- 25/include/asm-mips/thread_info.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/thread_info.h 2004-02-19 12:53:03.000000000 -0800
@@ -36,8 +36,6 @@ struct thread_info {
struct restart_block restart_block;
};
-#define PREEMPT_ACTIVE 0x4000000
-
/*
* macros/functions for gaining access to the thread information structure
*
@@ -64,22 +62,44 @@ register struct thread_info *__current_t
#define current_thread_info() __current_thread_info
/* thread information allocation */
-#ifdef CONFIG_MIPS32
+#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS32)
#define THREAD_SIZE_ORDER (1)
#endif
-#ifdef CONFIG_MIPS64
-#define THREAD_SIZE_ORDER (1)
+#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS64)
+#define THREAD_SIZE_ORDER (2)
#endif
+#ifdef CONFIG_PAGE_SIZE_16KB
+#define THREAD_SIZE_ORDER (0)
+#endif
+#ifdef CONFIG_PAGE_SIZE_64KB
+#define THREAD_SIZE_ORDER (0)
+#endif
+
#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
#define THREAD_MASK (THREAD_SIZE - 1UL)
-#define alloc_thread_info(task) \
- ((struct thread_info *)kmalloc(THREAD_SIZE, GFP_KERNEL))
+
+#ifdef CONFIG_DEBUG_STACK_USAGE
+#define alloc_thread_info(tsk) \
+({ \
+ struct thread_info *ret; \
+ \
+ ret = kmalloc(THREAD_SIZE, GFP_KERNEL); \
+ if (ret) \
+ memset(ret, 0, THREAD_SIZE); \
+ ret; \
+})
+#else
+#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
+#endif
+
#define free_thread_info(info) kfree(info)
#define get_thread_info(ti) get_task_struct((ti)->task)
#define put_thread_info(ti) put_task_struct((ti)->task)
#endif /* !__ASSEMBLY__ */
+#define PREEMPT_ACTIVE 0x4000000
+
/*
* thread information flags
* - these are process state flags that various assembly files may need to
diff -puN include/asm-mips/time.h~mips-megapatch include/asm-mips/time.h
--- 25/include/asm-mips/time.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/time.h 2004-02-19 12:53:03.000000000 -0800
@@ -33,6 +33,21 @@ extern int (*rtc_set_time)(unsigned long
extern int (*rtc_set_mmss)(unsigned long);
/*
+ * Timer interrupt functions.
+ * mips_timer_state is needed for high precision timer calibration.
+ * mips_timer_ack may be NULL if the interrupt is self-recoverable.
+ */
+extern int (*mips_timer_state)(void);
+extern void (*mips_timer_ack)(void);
+
+/*
+ * High precision timer functions.
+ * If mips_hpt_read is NULL, an R4k-compatible timer setup is attempted.
+ */
+extern unsigned int (*mips_hpt_read)(void);
+extern void (*mips_hpt_init)(unsigned int);
+
+/*
* to_tm() converts system time back to (year, mon, day, hour, min, sec).
* It is intended to help implement rtc_set_time() functions.
* Copied from PPC implementation.
@@ -46,11 +61,6 @@ extern void to_tm(unsigned long tim, str
*/
extern unsigned long (*do_gettimeoffset)(void);
-extern unsigned long null_gettimeoffset(void);
-extern unsigned long fixed_rate_gettimeoffset(void);
-extern unsigned long calibrate_div32_gettimeoffset(void);
-extern unsigned long calibrate_div64_gettimeoffset(void);
-
/*
* high-level timer interrupt routines.
*/
@@ -77,9 +87,10 @@ extern void (*board_time_init)(void);
extern void (*board_timer_setup)(struct irqaction *irq);
/*
- * mips_counter_frequency - must be set if you intend to use
- * counter as timer interrupt source or use fixed_rate_gettimeoffset.
+ * mips_hpt_frequency - must be set if you intend to use an R4k-compatible
+ * counter as a timer interrupt source; otherwise it can be set up
+ * automagically with an aid of mips_timer_state.
*/
-extern unsigned int mips_counter_frequency;
+extern unsigned int mips_hpt_frequency;
#endif /* _ASM_TIME_H */
diff -puN include/asm-mips/timex.h~mips-megapatch include/asm-mips/timex.h
--- 25/include/asm-mips/timex.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/timex.h 2004-02-19 12:53:03.000000000 -0800
@@ -8,7 +8,6 @@
#ifndef _ASM_TIMEX_H
#define _ASM_TIMEX_H
-#include <linux/config.h>
#include <asm/mipsregs.h>
/*
@@ -16,25 +15,23 @@
* The value should be defined as accurate as possible or under certain
* circumstances Linux timekeeping might become inaccurate or fail.
*
- * For IP22 we cheat and pretend to have a 1MHz timer whic isn't strictly
- * true - we only use the 8259 timer to calibrate the actual interrupt
- * timer, so after all it's the master clock source of the system.
+ * For many system the exact clockrate of the timer isn't known but due to
+ * the way this value is used we can get away with a wrong value as long
+ * as this value is:
+ *
+ * - a multiple of HZ
+ * - a divisor of the actual rate
+ *
+ * 500000 is a good such cheat value.
*
* The obscure number 1193182 is the same as used by the original i8254
* time in legacy PC hardware; the chip unfortunately also found in a
- * bunch of MIPS systems.
+ * bunch of MIPS systems. The last remaining user of the i8254 for the
+ * timer interrupt is the RM200; it's a very standard system so there is
+ * no reason to make this a separate architecture.
*/
-#ifdef CONFIG_ACER_PICA_61
-#define CLOCK_TICK_RATE 1193182
-#elif defined(CONFIG_MIPS_MAGNUM_4000)
-#define CLOCK_TICK_RATE 1193182
-#elif defined(CONFIG_OLIVETTI_M700)
-#define CLOCK_TICK_RATE 1193182
-#elif defined(CONFIG_SGI_IP22)
-#define CLOCK_TICK_RATE 1000000
-#elif defined(CONFIG_SNI_RM200_PCI)
-#define CLOCK_TICK_RATE 1193182
-#endif
+
+#include <timex.h>
/*
* Standard way to access the cycle counter.
diff -puN /dev/null include/asm-mips/titan_dep.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/titan_dep.h 2004-02-19 12:53:03.000000000 -0800
@@ -0,0 +1,68 @@
+/*
+ * Copyright 2003 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * Board specific definititions for the PMC-Sierra Yosemite
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __TITAN_DEP_H__
+#define __TITAN_DEP_H__
+
+#include <asm/addrspace.h> /* for KSEG1ADDR() */
+#include <asm/byteorder.h> /* for cpu_to_le32() */
+
+/* Turn on serial */
+#define CONFIG_TITAN_SERIAL
+
+/* PCI */
+#define TITAN_PCI_BASE 0xbb000000
+
+#define TITAN_WRITE(ofs, data) \
+ *(volatile u32 *)(TITAN_PCI_BASE+(ofs)) = cpu_to_le32(data)
+#define TITAN_READ(ofs, data) \
+ *(data) = le32_to_cpu(*(volatile u32 *)(TITAN_PCI_BASE+(ofs)))
+#define TITAN_READ_DATA(ofs) \
+ le32_to_cpu(*(volatile u32 *)(TITAN_PCI_BASE+(ofs)))
+
+#define TITAN_WRITE_16(ofs, data) \
+ *(volatile u16 *)(TITAN_PCI_BASE+(ofs)) = cpu_to_le16(data)
+#define TITAN_READ_16(ofs, data) \
+ *(data) = le16_to_cpu(*(volatile u16 *)(TITAN_PCI_BASE+(ofs)))
+
+#define TITAN_WRITE_8(ofs, data) \
+ *(volatile u8 *)(TITAN_PCI_BASE+(ofs)) = data
+#define TITAN_READ_8(ofs, data) \
+ *(data) = *(volatile u8 *)(TITAN_PCI_BASE+(ofs))
+
+/*
+ * PCI specific defines
+ */
+#define TITAN_PCI_0_CONFIG_ADDRESS 0x780
+#define TITAN_PCI_0_CONFIG_DATA 0x784
+
+/*
+ * HT specific defines
+ */
+#define RM9000x2_HTLINK_REG 0xbb000644
+#define RM9000x2_BASE_ADDR 0xbb000000
+#define RM9000x2_OCD_HTCFGA 0x06f8
+#define RM9000x2_OCD_HTCFGD 0x06fc
+
+/*
+ * Hypertransport specific macros
+ */
+#define RM9K_WRITE(ofs, data) *(volatile u_int32_t *)(RM9000x2_BASE_ADDR+ofs) = data
+#define RM9K_WRITE_8(ofs, data) *(volatile u8 *)(RM9000x2_BASE_ADDR+ofs) = data
+#define RM9K_WRITE_16(ofs, data) *(volatile u16 *)(RM9000x2_BASE_ADDR+ofs) = data
+
+#define RM9K_READ(ofs, val) *(val) = *(volatile u_int32_t *)(RM9000x2_BASE_ADDR+ofs)
+#define RM9K_READ_8(ofs, val) *(val) = *(volatile u8 *)(RM9000x2_BASE_ADDR+ofs)
+#define RM9K_READ_16(ofs, val) *(val) = *(volatile u16 *)(RM9000x2_BASE_ADDR+ofs)
+
+#endif
+
diff -puN include/asm-mips/tlb.h~mips-megapatch include/asm-mips/tlb.h
--- 25/include/asm-mips/tlb.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/tlb.h 2004-02-19 12:53:03.000000000 -0800
@@ -2,9 +2,14 @@
#define __ASM_TLB_H
/*
- * MIPS doesn't need any special per-pte or per-vma handling..
+ * MIPS doesn't need any special per-pte or per-vma handling, except
+ * we need to flush cache for area to be unmapped.
*/
-#define tlb_start_vma(tlb, vma) do { } while (0)
+#define tlb_start_vma(tlb, vma) \
+ do { \
+ if (!tlb->fullmm) \
+ flush_cache_range(vma, vma->vm_start, vma->vm_end); \
+ } while (0)
#define tlb_end_vma(tlb, vma) do { } while (0)
#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
diff -puN include/asm-mips/topology.h~mips-megapatch include/asm-mips/topology.h
--- 25/include/asm-mips/topology.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/topology.h 2004-02-19 12:53:03.000000000 -0800
@@ -1,6 +1,8 @@
#ifndef __ASM_TOPOLOGY_H
#define __ASM_TOPOLOGY_H
+#include <linux/config.h>
+
#ifdef CONFIG_SGI_IP27
#include <asm/mmzone.h>
diff -puN include/asm-mips/tx4927/toshiba_rbtx4927.h~mips-megapatch include/asm-mips/tx4927/toshiba_rbtx4927.h
--- 25/include/asm-mips/tx4927/toshiba_rbtx4927.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/tx4927/toshiba_rbtx4927.h 2004-02-19 12:53:03.000000000 -0800
@@ -27,6 +27,7 @@
#ifndef __ASM_TX4927_TOSHIBA_RBTX4927_H
#define __ASM_TX4927_TOSHIBA_RBTX4927_H
+#include <linux/config.h>
#include <asm/tx4927/tx4927.h>
#include <asm/tx4927/tx4927_mips.h>
#ifdef CONFIG_PCI
diff -puN include/asm-mips/tx4927/tx4927_pci.h~mips-megapatch include/asm-mips/tx4927/tx4927_pci.h
--- 25/include/asm-mips/tx4927/tx4927_pci.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/tx4927/tx4927_pci.h 2004-02-19 12:53:03.000000000 -0800
@@ -21,7 +21,7 @@
#define TX4927_CCFG_REG 0xff1fe000
#define TX4927_IRC_REG 0xff1ff600
#define TX4927_CE3 0x17f00000 /* 1M */
-#define TX4927_PCIRESET_ADDR 0x1c00f006
+#define TX4927_PCIRESET_ADDR 0xbc00f006
#define TX4927_PCI_CLK_ADDR (KSEG1 + TX4927_CE3 + 0x00040020)
#define TX4927_IMSTAT_ADDR(n) (KSEG1 + TX4927_CE3 + 0x0004001a + (n))
diff -puN include/asm-mips/types.h~mips-megapatch include/asm-mips/types.h
--- 25/include/asm-mips/types.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/types.h 2004-02-19 12:53:03.000000000 -0800
@@ -9,16 +9,9 @@
#ifndef _ASM_TYPES_H
#define _ASM_TYPES_H
-#include <linux/config.h>
-
#ifndef __ASSEMBLY__
-#ifdef CONFIG_MIPS32
typedef unsigned short umode_t;
-#endif
-#ifdef CONFIG_MIPS64
-typedef unsigned int umode_t;
-#endif
/*
* __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
@@ -59,6 +52,8 @@ typedef unsigned long long __u64;
#ifndef __ASSEMBLY__
+#include <linux/config.h>
+
typedef __signed char s8;
typedef unsigned char u8;
diff -puN include/asm-mips/uaccess.h~mips-megapatch include/asm-mips/uaccess.h
--- 25/include/asm-mips/uaccess.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/uaccess.h 2004-02-19 12:53:03.000000000 -0800
@@ -3,12 +3,14 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996, 1997, 1998, 1999, 2000 by Ralf Baechle
+ * Copyright (C) 1996, 1997, 1998, 1999, 2000, 03, 04 by Ralf Baechle
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#ifndef _ASM_UACCESS_H
#define _ASM_UACCESS_H
+#include <linux/config.h>
+#include <linux/compiler.h>
#include <linux/errno.h>
#include <linux/thread_info.h>
@@ -20,47 +22,43 @@
* For historical reasons, these macros are grossly misnamed.
*/
#ifdef CONFIG_MIPS32
+
+#define __UA_LIMIT 0x80000000UL
+
#define __UA_ADDR ".word"
#define __UA_LA "la"
#define __UA_ADDU "addu"
-
-#define KERNEL_DS ((mm_segment_t) { (unsigned long) 0L })
-#define USER_DS ((mm_segment_t) { (unsigned long) -1L })
-
-#define VERIFY_READ 0
-#define VERIFY_WRITE 1
-
-#define __access_ok(addr, size, mask) \
- (((signed long)((mask)&(addr | ((addr) + (size)) | __ua_size(size)))) >= 0)
-
-#define __access_mask ((long)(get_fs().seg))
-
-#define access_ok(type, addr, size) \
- __access_ok(((unsigned long)(addr)),(size),__access_mask)
+#define __UA_t0 "$8"
+#define __UA_t1 "$9"
#endif /* CONFIG_MIPS32 */
#ifdef CONFIG_MIPS64
+
+#define __UA_LIMIT (- TASK_SIZE)
+
#define __UA_ADDR ".dword"
#define __UA_LA "dla"
#define __UA_ADDU "daddu"
+#define __UA_t0 "$12"
+#define __UA_t1 "$13"
+
+#endif /* CONFIG_MIPS64 */
+
+/*
+ * USER_DS is a bitmask that has the bits set that may not be set in a valid
+ * userspace address. Note that we limit 32-bit userspace to 0x7fff8000 but
+ * the arithmetic we're doing only works if the limit is a power of two, so
+ * we use 0x80000000 here on 32-bit kernels. If a process passes an invalid
+ * address in this range it's the process's problem, not ours :-)
+ */
#define KERNEL_DS ((mm_segment_t) { 0UL })
-#define USER_DS ((mm_segment_t) { -TASK_SIZE })
+#define USER_DS ((mm_segment_t) { __UA_LIMIT })
#define VERIFY_READ 0
#define VERIFY_WRITE 1
-#define __access_ok(addr, size, mask) \
- (((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0)
-
-#define __access_mask get_fs().seg
-
-#define access_ok(type, addr, size) \
- __access_ok((unsigned long)(addr), (size), __access_mask)
-
-#endif /* CONFIG_MIPS64 */
-
#define get_ds() (KERNEL_DS)
#define get_fs() (current_thread_info()->addr_limit)
#define set_fs(x) (current_thread_info()->addr_limit = (x))
@@ -84,35 +82,137 @@
#define __ua_size(size) \
((__builtin_constant_p(size) && (signed long) (size) > 0) ? 0 : (size))
+/*
+ * access_ok: - Checks if a user space pointer is valid
+ * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE. Note that
+ * %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe
+ * to write to a block, it is always safe to read from it.
+ * @addr: User space pointer to start of block to check
+ * @size: Size of block to check
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * Checks if a pointer to a block of memory in user space is valid.
+ *
+ * Returns true (nonzero) if the memory block may be valid, false (zero)
+ * if it is definitely invalid.
+ *
+ * Note that, depending on architecture, this function probably just
+ * checks that the pointer is in the user space range - after calling
+ * this function, memory access functions may still return -EFAULT.
+ */
+
+#define __access_mask get_fs().seg
+
+#define __access_ok(addr, size, mask) \
+ (((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0)
+
+#define access_ok(type, addr, size) \
+ likely(__access_ok((unsigned long)(addr), (size),__access_mask))
+
+/*
+ * verify_area: - Obsolete, use access_ok()
+ * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE
+ * @addr: User space pointer to start of block to check
+ * @size: Size of block to check
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * This function has been replaced by access_ok().
+ *
+ * Checks if a pointer to a block of memory in user space is valid.
+ *
+ * Returns zero if the memory block may be valid, -EFAULT
+ * if it is definitely invalid.
+ *
+ * See access_ok() for more details.
+ */
static inline int verify_area(int type, const void * addr, unsigned long size)
{
return access_ok(type, addr, size) ? 0 : -EFAULT;
}
/*
- * Uh, these should become the main single-value transfer routines ...
- * They automatically use the right size if we just have the right
- * pointer type ...
- *
- * As MIPS uses the same address space for kernel and user data, we
- * can just do these as direct assignments.
- *
- * Careful to not
- * (a) re-use the arguments for side effects (sizeof is ok)
- * (b) require any knowledge of processes at this stage
+ * put_user: - Write a simple value into user space.
+ * @x: Value to copy to user space.
+ * @ptr: Destination address, in user space.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * This macro copies a single simple value from kernel space to user
+ * space. It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and @x must be assignable
+ * to the result of dereferencing @ptr.
+ *
+ * Returns zero on success, or -EFAULT on error.
*/
#define put_user(x,ptr) \
__put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
+
+/*
+ * get_user: - Get a simple variable from user space.
+ * @x: Variable to store result.
+ * @ptr: Source address, in user space.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * This macro copies a single simple variable from user space to kernel
+ * space. It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and the result of
+ * dereferencing @ptr must be assignable to @x without a cast.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ * On error, the variable @x is set to zero.
+ */
#define get_user(x,ptr) \
__get_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
/*
- * The "__xxx" versions do not do address space checking, useful when
- * doing multiple accesses to the same area (the user has to do the
- * checks by hand with "access_ok()")
+ * __put_user: - Write a simple value into user space, with less checking.
+ * @x: Value to copy to user space.
+ * @ptr: Destination address, in user space.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * This macro copies a single simple value from kernel space to user
+ * space. It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and @x must be assignable
+ * to the result of dereferencing @ptr.
+ *
+ * Caller must check the pointer with access_ok() before calling this
+ * function.
+ *
+ * Returns zero on success, or -EFAULT on error.
*/
#define __put_user(x,ptr) \
__put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
+
+/*
+ * __get_user: - Get a simple variable from user space, with less checking.
+ * @x: Variable to store result.
+ * @ptr: Source address, in user space.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * This macro copies a single simple variable from user space to kernel
+ * space. It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and the result of
+ * dereferencing @ptr must be assignable to @x without a cast.
+ *
+ * Caller must check the pointer with access_ok() before calling this
+ * function.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ * On error, the variable @x is set to zero.
+ */
#define __get_user(x,ptr) \
__get_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
@@ -134,6 +234,7 @@ struct __large_struct { unsigned long bu
long __gu_err; \
__typeof(*(ptr)) __gu_val; \
long __gu_addr; \
+ might_sleep(); \
__asm__("":"=r" (__gu_val)); \
__gu_addr = (long) (ptr); \
__asm__("":"=r" (__gu_err)); \
@@ -146,65 +247,66 @@ struct __large_struct { unsigned long bu
} x = (__typeof__(*(ptr))) __gu_val; __gu_err; \
})
-#define __get_user_check(x,ptr,size) \
-({ \
- long __gu_err; \
- __typeof__(*(ptr)) __gu_val; \
- long __gu_addr; \
- __asm__("":"=r" (__gu_val)); \
- __gu_addr = (long) (ptr); \
- __asm__("":"=r" (__gu_err)); \
- if (__access_ok(__gu_addr,size,__access_mask)) { \
- switch (size) { \
- case 1: __get_user_asm("lb"); break; \
- case 2: __get_user_asm("lh"); break; \
- case 4: __get_user_asm("lw"); break; \
- case 8: __GET_USER_DW; break; \
- default: __get_user_unknown(); break; \
- } \
- } x = (__typeof__(*(ptr))) __gu_val; __gu_err; \
+#define __get_user_check(x,ptr,size) \
+({ \
+ long __gu_err; \
+ __typeof__(*(ptr)) __gu_val; \
+ long __gu_addr; \
+ might_sleep(); \
+ __asm__("":"=r" (__gu_val)); \
+ __gu_addr = (long) (ptr); \
+ __asm__("":"=r" (__gu_err)); \
+ if (access_ok(VERIFY_READ,__gu_addr,size)) { \
+ switch (size) { \
+ case 1: __get_user_asm("lb"); break; \
+ case 2: __get_user_asm("lh"); break; \
+ case 4: __get_user_asm("lw"); break; \
+ case 8: __GET_USER_DW; break; \
+ default: __get_user_unknown(); break; \
+ } \
+ } x = (__typeof__(*(ptr))) __gu_val; __gu_err; \
})
-#define __get_user_asm(insn) \
-({ \
- __asm__ __volatile__( \
- "1:\t" insn "\t%1,%2\n\t" \
- "move\t%0,$0\n" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "move\t%1,$0\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- __UA_ADDR "\t1b,3b\n\t" \
- ".previous" \
- :"=r" (__gu_err), "=r" (__gu_val) \
- :"o" (__m(__gu_addr)), "i" (-EFAULT)); \
+#define __get_user_asm(insn) \
+({ \
+ __asm__ __volatile__( \
+ "1:\t" insn "\t%1,%2\n\t" \
+ "move\t%0,$0\n" \
+ "2:\n\t" \
+ ".section\t.fixup,\"ax\"\n" \
+ "3:\tli\t%0,%3\n\t" \
+ "move\t%1,$0\n\t" \
+ "j\t2b\n\t" \
+ ".previous\n\t" \
+ ".section\t__ex_table,\"a\"\n\t" \
+ __UA_ADDR "\t1b,3b\n\t" \
+ ".previous" \
+ :"=r" (__gu_err), "=r" (__gu_val) \
+ :"o" (__m(__gu_addr)), "i" (-EFAULT)); \
})
/*
* Get a long long 64 using 32 bit registers.
*/
-#define __get_user_asm_ll32 \
-({ \
- __asm__ __volatile__( \
- "1:\tlw\t%1,%2\n" \
- "2:\tlw\t%D1,%3\n\t" \
- "move\t%0,$0\n" \
- "3:\t.section\t.fixup,\"ax\"\n" \
- "4:\tli\t%0,%4\n\t" \
- "move\t%1,$0\n\t" \
- "move\t%D1,$0\n\t" \
- "j\t3b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- __UA_ADDR "\t1b,4b\n\t" \
- __UA_ADDR "\t2b,4b\n\t" \
- ".previous" \
- :"=r" (__gu_err), "=&r" (__gu_val) \
- :"o" (__m(__gu_addr)), "o" (__m(__gu_addr + 4)), \
- "i" (-EFAULT)); \
+#define __get_user_asm_ll32 \
+({ \
+ __asm__ __volatile__( \
+ "1:\tlw\t%1,%2\n" \
+ "2:\tlw\t%D1,%3\n\t" \
+ "move\t%0,$0\n" \
+ "3:\t.section\t.fixup,\"ax\"\n" \
+ "4:\tli\t%0,%4\n\t" \
+ "move\t%1,$0\n\t" \
+ "move\t%D1,$0\n\t" \
+ "j\t3b\n\t" \
+ ".previous\n\t" \
+ ".section\t__ex_table,\"a\"\n\t" \
+ __UA_ADDR "\t1b,4b\n\t" \
+ __UA_ADDR "\t2b,4b\n\t" \
+ ".previous" \
+ :"=r" (__gu_err), "=&r" (__gu_val) \
+ :"o" (__m(__gu_addr)), "o" (__m(__gu_addr + 4)), \
+ "i" (-EFAULT)); \
})
extern void __get_user_unknown(void);
@@ -219,59 +321,61 @@ extern void __get_user_unknown(void);
#define __PUT_USER_DW __put_user_asm_ll32
#endif
-#define __put_user_nocheck(x,ptr,size) \
-({ \
- long __pu_err; \
- __typeof__(*(ptr)) __pu_val; \
- long __pu_addr; \
- __pu_val = (x); \
- __pu_addr = (long) (ptr); \
- __asm__("":"=r" (__pu_err)); \
- switch (size) { \
- case 1: __put_user_asm("sb"); break; \
- case 2: __put_user_asm("sh"); break; \
- case 4: __put_user_asm("sw"); break; \
- case 8: __PUT_USER_DW; break; \
- default: __put_user_unknown(); break; \
- } \
- __pu_err; \
+#define __put_user_nocheck(x,ptr,size) \
+({ \
+ long __pu_err; \
+ __typeof__(*(ptr)) __pu_val; \
+ long __pu_addr; \
+ might_sleep(); \
+ __pu_val = (x); \
+ __pu_addr = (long) (ptr); \
+ __asm__("":"=r" (__pu_err)); \
+ switch (size) { \
+ case 1: __put_user_asm("sb"); break; \
+ case 2: __put_user_asm("sh"); break; \
+ case 4: __put_user_asm("sw"); break; \
+ case 8: __PUT_USER_DW; break; \
+ default: __put_user_unknown(); break; \
+ } \
+ __pu_err; \
})
-#define __put_user_check(x,ptr,size) \
-({ \
- long __pu_err; \
- __typeof__(*(ptr)) __pu_val; \
- long __pu_addr; \
- __pu_val = (x); \
- __pu_addr = (long) (ptr); \
- __asm__("":"=r" (__pu_err)); \
- if (__access_ok(__pu_addr,size,__access_mask)) { \
- switch (size) { \
- case 1: __put_user_asm("sb"); break; \
- case 2: __put_user_asm("sh"); break; \
- case 4: __put_user_asm("sw"); break; \
- case 8: __PUT_USER_DW; break; \
- default: __put_user_unknown(); break; \
- } \
- } \
- __pu_err; \
+#define __put_user_check(x,ptr,size) \
+({ \
+ long __pu_err; \
+ __typeof__(*(ptr)) __pu_val; \
+ long __pu_addr; \
+ might_sleep(); \
+ __pu_val = (x); \
+ __pu_addr = (long) (ptr); \
+ __asm__("":"=r" (__pu_err)); \
+ if (access_ok(VERIFY_WRITE, __pu_addr, size)) { \
+ switch (size) { \
+ case 1: __put_user_asm("sb"); break; \
+ case 2: __put_user_asm("sh"); break; \
+ case 4: __put_user_asm("sw"); break; \
+ case 8: __PUT_USER_DW; break; \
+ default: __put_user_unknown(); break; \
+ } \
+ } \
+ __pu_err; \
})
-#define __put_user_asm(insn) \
-({ \
- __asm__ __volatile__( \
- "1:\t" insn "\t%z1, %2\t\t\t# __put_user_asm\n\t" \
- "move\t%0, $0\n" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- __UA_ADDR "\t1b,3b\n\t" \
- ".previous" \
- :"=r" (__pu_err) \
- :"Jr" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT)); \
+#define __put_user_asm(insn) \
+({ \
+ __asm__ __volatile__( \
+ "1:\t" insn "\t%z1, %2\t\t\t# __put_user_asm\n\t" \
+ "move\t%0, $0\n" \
+ "2:\n\t" \
+ ".section\t.fixup,\"ax\"\n" \
+ "3:\tli\t%0,%3\n\t" \
+ "j\t2b\n\t" \
+ ".previous\n\t" \
+ ".section\t__ex_table,\"a\"\n\t" \
+ __UA_ADDR "\t1b,3b\n\t" \
+ ".previous" \
+ :"=r" (__pu_err) \
+ :"Jr" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT)); \
})
#define __put_user_asm_ll32 \
@@ -331,12 +435,27 @@ extern size_t __copy_user(void *__to, co
__cu_len_r; \
})
+/*
+ * __copy_to_user: - Copy a block of data into user space, with less checking.
+ * @to: Destination address, in user space.
+ * @from: Source address, in kernel space.
+ * @n: Number of bytes to copy.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * Copy data from kernel space to user space. Caller must check
+ * the specified block with access_ok() before calling this function.
+ *
+ * Returns number of bytes that could not be copied.
+ * On success, this will be zero.
+ */
#define __copy_to_user(to,from,n) \
({ \
void *__cu_to; \
const void *__cu_from; \
long __cu_len; \
\
+ might_sleep(); \
__cu_to = (to); \
__cu_from = (from); \
__cu_len = (n); \
@@ -344,12 +463,26 @@ extern size_t __copy_user(void *__to, co
__cu_len; \
})
+/*
+ * copy_to_user: - Copy a block of data into user space.
+ * @to: Destination address, in user space.
+ * @from: Source address, in kernel space.
+ * @n: Number of bytes to copy.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * Copy data from kernel space to user space.
+ *
+ * Returns number of bytes that could not be copied.
+ * On success, this will be zero.
+ */
#define copy_to_user(to,from,n) \
({ \
void *__cu_to; \
const void *__cu_from; \
long __cu_len; \
\
+ might_sleep(); \
__cu_to = (to); \
__cu_from = (from); \
__cu_len = (n); \
@@ -383,12 +516,29 @@ extern size_t __copy_user(void *__to, co
__cu_len_r; \
})
+/*
+ * __copy_from_user: - Copy a block of data from user space, with less checking. * @to: Destination address, in kernel space.
+ * @from: Source address, in user space.
+ * @n: Number of bytes to copy.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * Copy data from user space to kernel space. Caller must check
+ * the specified block with access_ok() before calling this function.
+ *
+ * Returns number of bytes that could not be copied.
+ * On success, this will be zero.
+ *
+ * If some data could not be copied, this function will pad the copied
+ * data to the requested size using zero bytes.
+ */
#define __copy_from_user(to,from,n) \
({ \
void *__cu_to; \
const void *__cu_from; \
long __cu_len; \
\
+ might_sleep(); \
__cu_to = (to); \
__cu_from = (from); \
__cu_len = (n); \
@@ -397,12 +547,29 @@ extern size_t __copy_user(void *__to, co
__cu_len; \
})
+/*
+ * copy_from_user: - Copy a block of data from user space.
+ * @to: Destination address, in kernel space.
+ * @from: Source address, in user space.
+ * @n: Number of bytes to copy.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * Copy data from user space to kernel space.
+ *
+ * Returns number of bytes that could not be copied.
+ * On success, this will be zero.
+ *
+ * If some data could not be copied, this function will pad the copied
+ * data to the requested size using zero bytes.
+ */
#define copy_from_user(to,from,n) \
({ \
void *__cu_to; \
const void *__cu_from; \
long __cu_len; \
\
+ might_sleep(); \
__cu_to = (to); \
__cu_from = (from); \
__cu_len = (n); \
@@ -412,11 +579,25 @@ extern size_t __copy_user(void *__to, co
__cu_len; \
})
+#define __copy_in_user(to, from, n) __copy_from_user(to, from, n)
+
+/*
+ * __clear_user: - Zero a block of memory in user space, with less checking.
+ * @to: Destination address, in user space.
+ * @n: Number of bytes to zero.
+ *
+ * Zero a block of memory in user space. Caller must check
+ * the specified block with access_ok() before calling this function.
+ *
+ * Returns number of bytes that could not be cleared.
+ * On success, this will be zero.
+ */
static inline __kernel_size_t
__clear_user(void *addr, __kernel_size_t size)
{
__kernel_size_t res;
+ might_sleep();
__asm__ __volatile__(
"move\t$4, %1\n\t"
"move\t$5, $0\n\t"
@@ -425,30 +606,47 @@ __clear_user(void *addr, __kernel_size_t
"move\t%0, $6"
: "=r" (res)
: "r" (addr), "r" (size)
- : "$4", "$5", "$6", "$8", "$9", "$31");
+ : "$4", "$5", "$6", __UA_t0, __UA_t1, "$31");
return res;
}
-#define clear_user(addr,n) \
-({ \
- void * __cl_addr = (addr); \
- unsigned long __cl_size = (n); \
- if (__cl_size && access_ok(VERIFY_WRITE, \
- ((unsigned long)(__cl_addr)), __cl_size)) \
- __cl_size = __clear_user(__cl_addr, __cl_size); \
- __cl_size; \
+#define clear_user(addr,n) \
+({ \
+ void * __cl_addr = (addr); \
+ unsigned long __cl_size = (n); \
+ if (__cl_size && access_ok(VERIFY_WRITE, \
+ ((unsigned long)(__cl_addr)), __cl_size)) \
+ __cl_size = __clear_user(__cl_addr, __cl_size); \
+ __cl_size; \
})
/*
- * Returns: -EFAULT if exception before terminator, N if the entire
- * buffer filled, else strlen.
+ * __strncpy_from_user: - Copy a NUL terminated string from userspace, with less checking.
+ * @dst: Destination address, in kernel space. This buffer must be at
+ * least @count bytes long.
+ * @src: Source address, in user space.
+ * @count: Maximum number of bytes to copy, including the trailing NUL.
+ *
+ * Copies a NUL-terminated string from userspace to kernel space.
+ * Caller must check the specified block with access_ok() before calling
+ * this function.
+ *
+ * On success, returns the length of the string (not including the trailing
+ * NUL).
+ *
+ * If access to userspace fails, returns -EFAULT (some data may have been
+ * copied).
+ *
+ * If @count is smaller than the length of the string, copies @count bytes
+ * and returns @count.
*/
static inline long
__strncpy_from_user(char *__to, const char *__from, long __len)
{
long res;
+ might_sleep();
__asm__ __volatile__(
"move\t$4, %1\n\t"
"move\t$5, %2\n\t"
@@ -457,16 +655,35 @@ __strncpy_from_user(char *__to, const ch
"move\t%0, $2"
: "=r" (res)
: "r" (__to), "r" (__from), "r" (__len)
- : "$2", "$3", "$4", "$5", "$6", "$8", "$31", "memory");
+ : "$2", "$3", "$4", "$5", "$6", __UA_t0, "$31", "memory");
return res;
}
+/*
+ * strncpy_from_user: - Copy a NUL terminated string from userspace.
+ * @dst: Destination address, in kernel space. This buffer must be at
+ * least @count bytes long.
+ * @src: Source address, in user space.
+ * @count: Maximum number of bytes to copy, including the trailing NUL.
+ *
+ * Copies a NUL-terminated string from userspace to kernel space.
+ *
+ * On success, returns the length of the string (not including the trailing
+ * NUL).
+ *
+ * If access to userspace fails, returns -EFAULT (some data may have been
+ * copied).
+ *
+ * If @count is smaller than the length of the string, copies @count bytes
+ * and returns @count.
+ */
static inline long
strncpy_from_user(char *__to, const char *__from, long __len)
{
long res;
+ might_sleep();
__asm__ __volatile__(
"move\t$4, %1\n\t"
"move\t$5, %2\n\t"
@@ -475,7 +692,7 @@ strncpy_from_user(char *__to, const char
"move\t%0, $2"
: "=r" (res)
: "r" (__to), "r" (__from), "r" (__len)
- : "$2", "$3", "$4", "$5", "$6", "$8", "$31", "memory");
+ : "$2", "$3", "$4", "$5", "$6", __UA_t0, "$31", "memory");
return res;
}
@@ -485,28 +702,44 @@ static inline long __strlen_user(const c
{
long res;
+ might_sleep();
__asm__ __volatile__(
"move\t$4, %1\n\t"
__MODULE_JAL(__strlen_user_nocheck_asm)
"move\t%0, $2"
: "=r" (res)
: "r" (s)
- : "$2", "$4", "$8", "$31");
+ : "$2", "$4", __UA_t0, "$31");
return res;
}
+/*
+ * strlen_user: - Get the size of a string in user space.
+ * @str: The string to measure.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * Get the size of a NUL-terminated string in user space.
+ *
+ * Returns the size of the string INCLUDING the terminating NUL.
+ * On exception, returns 0.
+ *
+ * If there is a limit on the length of a valid string, you may wish to
+ * consider using strnlen_user() instead.
+ */
static inline long strlen_user(const char *s)
{
long res;
+ might_sleep();
__asm__ __volatile__(
"move\t$4, %1\n\t"
__MODULE_JAL(__strlen_user_asm)
"move\t%0, $2"
: "=r" (res)
: "r" (s)
- : "$2", "$4", "$8", "$31");
+ : "$2", "$4", __UA_t0, "$31");
return res;
}
@@ -516,6 +749,7 @@ static inline long __strnlen_user(const
{
long res;
+ might_sleep();
__asm__ __volatile__(
"move\t$4, %1\n\t"
"move\t$5, %2\n\t"
@@ -523,15 +757,30 @@ static inline long __strnlen_user(const
"move\t%0, $2"
: "=r" (res)
: "r" (s), "r" (n)
- : "$2", "$4", "$5", "$8", "$31");
+ : "$2", "$4", "$5", __UA_t0, "$31");
return res;
}
+/*
+ * strlen_user: - Get the size of a string in user space.
+ * @str: The string to measure.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * Get the size of a NUL-terminated string in user space.
+ *
+ * Returns the size of the string INCLUDING the terminating NUL.
+ * On exception, returns 0.
+ *
+ * If there is a limit on the length of a valid string, you may wish to
+ * consider using strnlen_user() instead.
+ */
static inline long strnlen_user(const char *s, long n)
{
long res;
+ might_sleep();
__asm__ __volatile__(
"move\t$4, %1\n\t"
"move\t$5, %2\n\t"
@@ -539,7 +788,7 @@ static inline long strnlen_user(const ch
"move\t%0, $2"
: "=r" (res)
: "r" (s), "r" (n)
- : "$2", "$4", "$5", "$8", "$31");
+ : "$2", "$4", "$5", __UA_t0, "$31");
return res;
}
@@ -550,4 +799,6 @@ struct exception_table_entry
unsigned long nextinsn;
};
+extern int fixup_exception(struct pt_regs *regs);
+
#endif /* _ASM_UACCESS_H */
diff -puN include/asm-mips/unaligned.h~mips-megapatch include/asm-mips/unaligned.h
--- 25/include/asm-mips/unaligned.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/unaligned.h 2004-02-19 12:53:03.000000000 -0800
@@ -58,19 +58,19 @@ struct __una_u16 { __u16 x __attribute__
* Elemental unaligned loads
*/
-extern inline __u64 __uldq(const __u64 * r11)
+static inline __u64 __uldq(const __u64 * r11)
{
const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
return ptr->x;
}
-extern inline __u32 __uldl(const __u32 * r11)
+static inline __u32 __uldl(const __u32 * r11)
{
const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
return ptr->x;
}
-extern inline __u16 __uldw(const __u16 * r11)
+static inline __u16 __uldw(const __u16 * r11)
{
const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
return ptr->x;
@@ -80,25 +80,25 @@ extern inline __u16 __uldw(const __u16 *
* Elemental unaligned stores
*/
-extern inline void __ustq(__u64 r5, __u64 * r11)
+static inline void __ustq(__u64 r5, __u64 * r11)
{
struct __una_u64 *ptr = (struct __una_u64 *) r11;
ptr->x = r5;
}
-extern inline void __ustl(__u32 r5, __u32 * r11)
+static inline void __ustl(__u32 r5, __u32 * r11)
{
struct __una_u32 *ptr = (struct __una_u32 *) r11;
ptr->x = r5;
}
-extern inline void __ustw(__u16 r5, __u16 * r11)
+static inline void __ustw(__u16 r5, __u16 * r11)
{
struct __una_u16 *ptr = (struct __una_u16 *) r11;
ptr->x = r5;
}
-extern inline __u64 __get_unaligned(const void *ptr, size_t size)
+static inline __u64 __get_unaligned(const void *ptr, size_t size)
{
__u64 val;
@@ -121,7 +121,7 @@ extern inline __u64 __get_unaligned(cons
return val;
}
-extern inline void __put_unaligned(__u64 val, void *ptr, size_t size)
+static inline void __put_unaligned(__u64 val, void *ptr, size_t size)
{
switch (size) {
case 1:
diff -puN include/asm-mips/unistd.h~mips-megapatch include/asm-mips/unistd.h
--- 25/include/asm-mips/unistd.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/unistd.h 2004-02-19 12:53:03.000000000 -0800
@@ -498,7 +498,7 @@
#define __NR_lremovexattr (__NR_Linux + 190)
#define __NR_fremovexattr (__NR_Linux + 191)
#define __NR_tkill (__NR_Linux + 192)
-#define __NR_time (__NR_Linux + 193)
+#define __NR_reserved193 (__NR_Linux + 193)
#define __NR_futex (__NR_Linux + 194)
#define __NR_sched_setaffinity (__NR_Linux + 195)
#define __NR_sched_getaffinity (__NR_Linux + 196)
@@ -742,7 +742,7 @@
#define __NR_lremovexattr (__NR_Linux + 190)
#define __NR_fremovexattr (__NR_Linux + 191)
#define __NR_tkill (__NR_Linux + 192)
-#define __NR_time (__NR_Linux + 193)
+#define __NR_reserved193 (__NR_Linux + 193)
#define __NR_futex (__NR_Linux + 194)
#define __NR_sched_setaffinity (__NR_Linux + 195)
#define __NR_sched_getaffinity (__NR_Linux + 196)
@@ -769,27 +769,27 @@
#define __NR_statfs64 (__NR_Linux + 217)
#define __NR_fstatfs64 (__NR_Linux + 218)
#define __NR_sendfile64 (__NR_Linux + 219)
-#define __NR_timer_create (__NR_Linux + 221)
-#define __NR_timer_settime (__NR_Linux + 222)
-#define __NR_timer_gettime (__NR_Linux + 223)
-#define __NR_timer_getoverrun (__NR_Linux + 224)
-#define __NR_timer_delete (__NR_Linux + 225)
-#define __NR_clock_settime (__NR_Linux + 226)
-#define __NR_clock_gettime (__NR_Linux + 227)
-#define __NR_clock_getres (__NR_Linux + 228)
-#define __NR_clock_nanosleep (__NR_Linux + 229)
-#define __NR_tgkill (__NR_Linux + 230)
-#define __NR_utimes (__NR_Linux + 231)
+#define __NR_timer_create (__NR_Linux + 220)
+#define __NR_timer_settime (__NR_Linux + 221)
+#define __NR_timer_gettime (__NR_Linux + 222)
+#define __NR_timer_getoverrun (__NR_Linux + 223)
+#define __NR_timer_delete (__NR_Linux + 224)
+#define __NR_clock_settime (__NR_Linux + 225)
+#define __NR_clock_gettime (__NR_Linux + 226)
+#define __NR_clock_getres (__NR_Linux + 227)
+#define __NR_clock_nanosleep (__NR_Linux + 228)
+#define __NR_tgkill (__NR_Linux + 229)
+#define __NR_utimes (__NR_Linux + 230)
/*
* Offset of the last N32 flavoured syscall
*/
-#define __NR_Linux_syscalls 231
+#define __NR_Linux_syscalls 230
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
#define __NR_N32_Linux 6000
-#define __NR_N32_Linux_syscalls 231
+#define __NR_N32_Linux_syscalls 230
#ifndef __ASSEMBLY__
@@ -1059,7 +1059,6 @@ type name (atype a,btype b,ctype c,dtype
* won't be any messing with the stack from main(), but we define
* some others too.
*/
-#define __NR__exit __NR_exit
static inline _syscall0(pid_t,setsid)
static inline _syscall3(int,write,int,fd,const char *,buf,off_t,count)
static inline _syscall3(int,read,int,fd,char *,buf,off_t,count)
@@ -1068,7 +1067,6 @@ static inline _syscall1(int,dup,int,fd)
static inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp)
static inline _syscall3(int,open,const char *,file,int,flag,int,mode)
static inline _syscall1(int,close,int,fd)
-static inline _syscall1(int,_exit,int,exitcode)
struct rusage;
static inline _syscall4(pid_t,wait4,pid_t,pid,int *,stat_addr,int,options,struct rusage *,ru)
diff -puN include/asm-mips/vr41xx/mpc30x.h~mips-megapatch include/asm-mips/vr41xx/mpc30x.h
--- 25/include/asm-mips/vr41xx/mpc30x.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/vr41xx/mpc30x.h 2004-02-19 12:53:03.000000000 -0800
@@ -16,8 +16,6 @@
#ifndef __VICTOR_MPC30X_H
#define __VICTOR_MPC30X_H
-#include <linux/config.h>
-
#include <asm/addrspace.h>
#include <asm/vr41xx/vr41xx.h>
diff -puN include/asm-mips/vr41xx/vr41xx.h~mips-megapatch include/asm-mips/vr41xx/vr41xx.h
--- 25/include/asm-mips/vr41xx/vr41xx.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/vr41xx/vr41xx.h 2004-02-19 12:53:03.000000000 -0800
@@ -7,6 +7,7 @@
* Copyright (C) 2001, 2002 Paul Mundt
* Copyright (C) 2002 MontaVista Software, Inc.
* Copyright (C) 2002 TimeSys Corp.
+ * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -32,23 +33,44 @@
#define PRID_VR4181A_REV1_0 0x00000c73
#define PRID_VR4181A_REV1_1 0x00000c74
-/* VR4131 0x00000c80-0x00000c8f */
+/* VR4131 0x00000c80-0x00000c83 */
#define PRID_VR4131_REV1_2 0x00000c80
#define PRID_VR4131_REV2_0 0x00000c81
#define PRID_VR4131_REV2_1 0x00000c82
#define PRID_VR4131_REV2_2 0x00000c83
+/* VR4133 0x00000c84- */
+#define PRID_VR4133 0x00000c84
+
/*
* Bus Control Uint
*/
extern void vr41xx_bcu_init(void);
+extern unsigned long vr41xx_get_vtclock_frequency(void);
+extern unsigned long vr41xx_get_tclock_frequency(void);
/*
* Clock Mask Unit
*/
-extern void vr41xx_cmu_init(u16 mask);
-extern void vr41xx_clock_supply(u16 mask);
-extern void vr41xx_clock_mask(u16 mask);
+extern void vr41xx_cmu_init(void);
+extern void vr41xx_clock_supply(unsigned int clock);
+extern void vr41xx_clock_mask(unsigned int clock);
+
+enum {
+ PIU_CLOCK,
+ SIU_CLOCK,
+ AIU_CLOCK,
+ KIU_CLOCK,
+ FIR_CLOCK,
+ DSIU_CLOCK,
+ CSI_CLOCK,
+ PCIU_CLOCK,
+ HSP_CLOCK,
+ PCI_CLOCK,
+ CEU_CLOCK,
+ ETHER0_CLOCK,
+ ETHER1_CLOCK
+};
/*
* Interrupt Control Unit
@@ -58,59 +80,84 @@ extern void vr41xx_clock_mask(u16 mask);
#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
-#define ICU_CASCADE_IRQ MIPS_CPU_IRQ(2)
-#define RTC_LONG1_IRQ MIPS_CPU_IRQ(3)
-#define RTC_LONG2_IRQ MIPS_CPU_IRQ(4)
-/* RFU */
-#define BATTERY_IRQ MIPS_CPU_IRQ(6)
+#define INT0_CASCADE_IRQ MIPS_CPU_IRQ(2)
+#define INT1_CASCADE_IRQ MIPS_CPU_IRQ(3)
+#define INT2_CASCADE_IRQ MIPS_CPU_IRQ(4)
+#define INT3_CASCADE_IRQ MIPS_CPU_IRQ(5)
+#define INT4_CASCADE_IRQ MIPS_CPU_IRQ(6)
#define MIPS_COUNTER_IRQ MIPS_CPU_IRQ(7)
/* SYINT1 Interrupt Numbers */
#define SYSINT1_IRQ_BASE 8
#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x))
-/* RFU */
+#define BATTRY_IRQ SYSINT1_IRQ(0)
#define POWER_IRQ SYSINT1_IRQ(1)
+#define RTCLONG1_IRQ SYSINT1_IRQ(2)
+#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3)
/* RFU */
+#define PIU_IRQ SYSINT1_IRQ(5)
+#define AIU_IRQ SYSINT1_IRQ(6)
+#define KIU_IRQ SYSINT1_IRQ(7)
#define GIUINT_CASCADE_IRQ SYSINT1_IRQ(8)
#define SIU_IRQ SYSINT1_IRQ(9)
-/* RFU */
+#define BUSERR_IRQ SYSINT1_IRQ(10)
#define SOFTINT_IRQ SYSINT1_IRQ(11)
#define CLKRUN_IRQ SYSINT1_IRQ(12)
-#define SYSINT1_IRQ_LAST CLKRUN_IRQ
+#define DOZEPIU_IRQ SYSINT1_IRQ(13)
+#define SYSINT1_IRQ_LAST DOZEPIU_IRQ
/* SYSINT2 Interrupt Numbers */
#define SYSINT2_IRQ_BASE 24
#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x))
-/* RFU */
+#define RTCLONG2_IRQ SYSINT2_IRQ(0)
#define LED_IRQ SYSINT2_IRQ(1)
-/* RFU */
-#define VTCLOCK_IRQ SYSINT2_IRQ(3)
+#define HSP_IRQ SYSINT2_IRQ(2)
+#define TCLOCK_IRQ SYSINT2_IRQ(3)
#define FIR_IRQ SYSINT2_IRQ(4)
+#define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */
#define DSIU_IRQ SYSINT2_IRQ(5)
#define PCI_IRQ SYSINT2_IRQ(6)
#define SCU_IRQ SYSINT2_IRQ(7)
#define CSI_IRQ SYSINT2_IRQ(8)
#define BCU_IRQ SYSINT2_IRQ(9)
-#define SYSINT2_IRQ_LAST BCU_IRQ
+#define ETHERNET_IRQ SYSINT2_IRQ(10)
+#define SYSINT2_IRQ_LAST ETHERNET_IRQ
/* GIU Interrupt Numbers */
#define GIU_IRQ_BASE 40
#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */
#define GIU_IRQ_LAST GIU_IRQ(31)
+#define GIU_IRQ_TO_PIN(x) ((x) - GIU_IRQ_BASE) /* Pin 0-31 */
extern void (*board_irq_init)(void);
+extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq));
/*
- * Gegeral-Purpose I/O Unit
+ * Power Management Unit
*/
-extern void vr41xx_enable_giuint(int pin);
-extern void vr41xx_disable_giuint(int pin);
-extern void vr41xx_clear_giuint(int pin);
+extern void vr41xx_pmu_init(void);
+/*
+ * RTC
+ */
+extern void vr41xx_set_rtclong1_cycle(uint32_t cycles);
+extern uint32_t vr41xx_read_rtclong1_counter(void);
+
+extern void vr41xx_set_rtclong2_cycle(uint32_t cycles);
+extern uint32_t vr41xx_read_rtclong2_counter(void);
+
+extern void vr41xx_set_tclock_cycle(uint32_t cycles);
+extern uint32_t vr41xx_read_tclock_counter(void);
+
+/*
+ * General-Purpose I/O Unit
+ */
enum {
TRIGGER_LEVEL,
- TRIGGER_EDGE
+ TRIGGER_EDGE,
+ TRIGGER_EDGE_FALLING,
+ TRIGGER_EDGE_RISING
};
enum {
@@ -185,8 +232,4 @@ extern void vr41xx_pciu_init(struct vr41
extern void vr41xx_time_init(void);
extern void vr41xx_timer_setup(struct irqaction *irq);
-extern void vr41xx_restart(char *command);
-extern void vr41xx_halt(void);
-extern void vr41xx_power_off(void);
-
#endif /* __NEC_VR41XX_H */
diff -puN /dev/null include/asm-mips/vr41xx/vrc4171.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/vr41xx/vrc4171.h 2004-02-19 12:53:03.000000000 -0800
@@ -0,0 +1,43 @@
+/*
+ * vrc4171.h, Include file for NEC VRC4171.
+ *
+ * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __NEC_VRC4171_H
+#define __NEC_VRC4171_H
+
+/*
+ * Configuration 1
+ */
+enum {
+ SLOTB_IS_NONE,
+ SLOTB_IS_PCCARD,
+ SLOTB_IS_CF,
+ SLOTB_IS_FLASHROM
+};
+
+extern void vrc4171_set_multifunction_pin(int config);
+
+/*
+ * Interrupt Status Mask
+ */
+#define IRQ_A 0x02
+#define IRQ_B 0x04
+
+extern uint16_t vrc4171_get_irq_status(void);
+
+#endif /* __NEC_VRC4171_H */
diff -puN include/asm-mips/vr41xx/vrc4173.h~mips-megapatch include/asm-mips/vr41xx/vrc4173.h
--- 25/include/asm-mips/vr41xx/vrc4173.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/vr41xx/vrc4173.h 2004-02-19 12:53:03.000000000 -0800
@@ -72,6 +72,19 @@ extern unsigned long vrc4173_io_offset;
/*
* Clock Mask Unit
*/
+#define VRC4173_PIU_CLOCK 0x0001
+#define VRC4173_KIU_CLOCK 0x0002
+#define VRC4173_AIU_CLOCK 0x0004
+#define VRC4173_PS2CH1_CLOCK 0x0008
+#define VRC4173_PS2CH2_CLOCK 0x0010
+#define VRC4173_USBU_PCI_CLOCK 0x0020
+#define VRC4173_CARDU1_PCI_CLOCK 0x0040
+#define VRC4173_CARDU2_PCI_CLOCK 0x0080
+#define VRC4173_AC97U_PCI_CLOCK 0x0100
+#define VRC4173_USBU_48MHz_CLOCK 0x0400
+#define VRC4173_EXT_48MHz_CLOCK 0x0800
+#define VRC4173_48MHz_CLOCK 0x1000
+
extern void vrc4173_clock_supply(u16 mask);
extern void vrc4173_clock_mask(u16 mask);
diff -puN include/asm-mips/vr41xx/workpad.h~mips-megapatch include/asm-mips/vr41xx/workpad.h
--- 25/include/asm-mips/vr41xx/workpad.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/vr41xx/workpad.h 2004-02-19 12:53:03.000000000 -0800
@@ -22,7 +22,7 @@
/*
* Board specific address mapping
*/
-#define VR41XX_ISA_MEM_BASE 0x100000000
+#define VR41XX_ISA_MEM_BASE 0x10000000
#define VR41XX_ISA_MEM_SIZE 0x04000000
/* VR41XX_ISA_IO_BASE includes offset from real base. */
diff -puN include/asm-mips/war.h~mips-megapatch include/asm-mips/war.h
--- 25/include/asm-mips/war.h~mips-megapatch 2004-02-19 12:53:00.000000000 -0800
+++ 25-akpm/include/asm-mips/war.h 2004-02-19 12:53:03.000000000 -0800
@@ -3,7 +3,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 2002 by Ralf Baechle
+ * Copyright (C) 2002, 2004 by Ralf Baechle
*/
#ifndef _ASM_WAR_H
#define _ASM_WAR_H
@@ -11,7 +11,16 @@
#include <linux/config.h>
/*
- * Pleassures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
+ * Another R4600 erratum. Due to the lack of errata information the exact
+ * technical details aren't known. I've experimentally found that disabling
+ * interrupts during indexed I-cache flushes seems to be sufficient to deal
+ * with the issue.
+ *
+ * #define R4600_V1_INDEX_ICACHEOP_WAR 1
+ */
+
+/*
+ * Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
*
* 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
* Hit_Invalidate_D and Create_Dirty_Excl_D should only be
@@ -59,6 +68,7 @@
*/
#ifdef CONFIG_SGI_IP22
+#define R4600_V1_INDEX_ICACHEOP_WAR 1
#define R4600_V1_HIT_CACHEOP_WAR 1
#define R4600_V2_HIT_CACHEOP_WAR 1
@@ -111,8 +121,59 @@
#endif
/*
+ * Fill buffers not flushed on CACHE instructions
+ *
+ * Hit_Invalidate_I cacheops invalidate an icache line but the refill
+ * for that line can get stale data from the fill buffer instead of
+ * accessing memory if the previous icache miss was also to that line.
+ *
+ * Workaround: generate an icache refill from a different line
+ *
+ * Affects:
+ * MIPS 4K RTL revision <3.0, PRID revision <4
+ */
+#if defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MIPS_ATLAS) || \
+ defined(CONFIG_MIPS_SEAD)
+#define MIPS4K_ICACHE_REFILL_WAR 1
+#endif
+
+/*
+ * Missing implicit forced flush of evictions caused by CACHE
+ * instruction
+ *
+ * Evictions caused by a CACHE instructions are not forced on to the
+ * bus. The BIU gives higher priority to fetches than to the data from
+ * the eviction buffer and no collision detection is performed between
+ * fetches and pending data from the eviction buffer.
+ *
+ * Workaround: Execute a SYNC instruction after the cache instruction
+ *
+ * Affects:
+ * MIPS 5Kc,5Kf RTL revision <2.3, PRID revision <8
+ * MIPS 20Kc RTL revision <4.0, PRID revision <?
+ */
+#if defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MIPS_ATLAS) || \
+ defined(CONFIG_MIPS_SEAD)
+#define MIPS_CACHE_SYNC_WAR 1
+#endif
+
+/*
+ * From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
+ * the line which this instruction itself exists, the following
+ * operation is not guaranteed."
+ *
+ * Workaround: do two phase flushing for Index_Invalidate_I
+ */
+#ifdef CONFIG_CPU_TX49XX
+#define TX49XX_ICACHE_INDEX_INV_WAR 1
+#endif
+
+/*
* Workarounds default to off
*/
+#ifndef R4600_V1_INDEX_ICACHEOP_WAR
+#define R4600_V1_INDEX_ICACHEOP_WAR 0
+#endif
#ifndef R4600_V1_HIT_CACHEOP_WAR
#define R4600_V1_HIT_CACHEOP_WAR 0
#endif
@@ -128,5 +189,14 @@
#ifndef SIBYTE_1956_WAR
#define SIBYTE_1956_WAR 0
#endif
+#ifndef MIPS4K_ICACHE_REFILL_WAR
+#define MIPS4K_ICACHE_REFILL_WAR 0
+#endif
+#ifndef MIPS_CACHE_SYNC_WAR
+#define MIPS_CACHE_SYNC_WAR 0
+#endif
+#ifndef TX49XX_ICACHE_INDEX_INV_WAR
+#define TX49XX_ICACHE_INDEX_INV_WAR 0
+#endif
#endif /* _ASM_WAR_H */
diff -puN /dev/null include/asm-mips/xxs1500.h
--- /dev/null 2002-08-30 16:31:37.000000000 -0700
+++ 25-akpm/include/asm-mips/xxs1500.h 2004-02-19 12:53:03.000000000 -0800
@@ -0,0 +1,35 @@
+/*
+ * MyCable XXS1500 Referrence Board
+ *
+ * Copyright 2003 MontaVista Software Inc.
+ * Author: Pete Popov, MontaVista Software, Inc.
+ * ppopov@mvista.com or source@mvista.com
+ *
+ * ########################################################################
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ *
+ */
+#ifndef __ASM_XXS1500_H
+#define __ASM_XXS1500_H
+
+/* PCMCIA XXS1500 specific defines */
+#define PCMCIA_MAX_SOCK 0
+#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
+#define PCMCIA_IRQ AU1000_GPIO_4
+
+#endif /* __ASM_XXS1500_ */
_