From: Shaohua Li <shaohua.li@intel.com>

It's widely seen a MCE non-fatal error reported after resume.  It seems MCE
resume is lacked under ia32.  This patch tries to fix the gap.

Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
---

 arch/i386/kernel/cpu/common.c         |    5 +----
 arch/i386/kernel/cpu/mcheck/k7.c      |    2 +-
 arch/i386/kernel/cpu/mcheck/mce.c     |    4 ++--
 arch/i386/kernel/cpu/mcheck/p4.c      |    4 ++--
 arch/i386/kernel/cpu/mcheck/p5.c      |    2 +-
 arch/i386/kernel/cpu/mcheck/p6.c      |    2 +-
 arch/i386/kernel/cpu/mcheck/winchip.c |    2 +-
 arch/i386/power/cpu.c                 |    1 +
 include/asm-i386/processor.h          |    6 ++++++
 9 files changed, 16 insertions(+), 12 deletions(-)

diff -puN arch/i386/kernel/cpu/common.c~x86-add-mce-resume arch/i386/kernel/cpu/common.c
--- 25/arch/i386/kernel/cpu/common.c~x86-add-mce-resume	Mon Aug 29 13:51:30 2005
+++ 25-akpm/arch/i386/kernel/cpu/common.c	Mon Aug 29 13:51:30 2005
@@ -30,8 +30,6 @@ static int disable_x86_serial_nr __devin
 
 struct cpu_dev * cpu_devs[X86_VENDOR_NUM] = {};
 
-extern void mcheck_init(struct cpuinfo_x86 *c);
-
 extern int disable_pse;
 
 static void default_init(struct cpuinfo_x86 * c)
@@ -429,9 +427,8 @@ void __devinit identify_cpu(struct cpuin
 	}
 
 	/* Init Machine Check Exception if available. */
-#ifdef CONFIG_X86_MCE
 	mcheck_init(c);
-#endif
+
 	if (c == &boot_cpu_data)
 		sysenter_setup();
 	enable_sep_cpu();
diff -puN arch/i386/kernel/cpu/mcheck/k7.c~x86-add-mce-resume arch/i386/kernel/cpu/mcheck/k7.c
--- 25/arch/i386/kernel/cpu/mcheck/k7.c~x86-add-mce-resume	Mon Aug 29 13:51:30 2005
+++ 25-akpm/arch/i386/kernel/cpu/mcheck/k7.c	Mon Aug 29 13:51:30 2005
@@ -69,7 +69,7 @@ static fastcall void k7_machine_check(st
 
 
 /* AMD K7 machine check is Intel like */
-void __devinit amd_mcheck_init(struct cpuinfo_x86 *c)
+void amd_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	int i;
diff -puN arch/i386/kernel/cpu/mcheck/mce.c~x86-add-mce-resume arch/i386/kernel/cpu/mcheck/mce.c
--- 25/arch/i386/kernel/cpu/mcheck/mce.c~x86-add-mce-resume	Mon Aug 29 13:51:30 2005
+++ 25-akpm/arch/i386/kernel/cpu/mcheck/mce.c	Mon Aug 29 13:51:30 2005
@@ -16,7 +16,7 @@
 
 #include "mce.h"
 
-int mce_disabled __devinitdata = 0;
+int mce_disabled = 0;
 int nr_mce_banks;
 
 EXPORT_SYMBOL_GPL(nr_mce_banks);	/* non-fatal.o */
@@ -31,7 +31,7 @@ static fastcall void unexpected_machine_
 void fastcall (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check;
 
 /* This has to be run for each processor */
-void __devinit mcheck_init(struct cpuinfo_x86 *c)
+void mcheck_init(struct cpuinfo_x86 *c)
 {
 	if (mce_disabled==1)
 		return;
diff -puN arch/i386/kernel/cpu/mcheck/p4.c~x86-add-mce-resume arch/i386/kernel/cpu/mcheck/p4.c
--- 25/arch/i386/kernel/cpu/mcheck/p4.c~x86-add-mce-resume	Mon Aug 29 13:51:30 2005
+++ 25-akpm/arch/i386/kernel/cpu/mcheck/p4.c	Mon Aug 29 13:51:30 2005
@@ -78,7 +78,7 @@ fastcall void smp_thermal_interrupt(stru
 }
 
 /* P4/Xeon Thermal regulation detect and init */
-static void __devinit intel_init_thermal(struct cpuinfo_x86 *c)
+static void intel_init_thermal(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	unsigned int cpu = smp_processor_id();
@@ -232,7 +232,7 @@ static fastcall void intel_machine_check
 }
 
 
-void __devinit intel_p4_mcheck_init(struct cpuinfo_x86 *c)
+void intel_p4_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	int i;
diff -puN arch/i386/kernel/cpu/mcheck/p5.c~x86-add-mce-resume arch/i386/kernel/cpu/mcheck/p5.c
--- 25/arch/i386/kernel/cpu/mcheck/p5.c~x86-add-mce-resume	Mon Aug 29 13:51:30 2005
+++ 25-akpm/arch/i386/kernel/cpu/mcheck/p5.c	Mon Aug 29 13:51:30 2005
@@ -29,7 +29,7 @@ static fastcall void pentium_machine_che
 }
 
 /* Set up machine check reporting for processors with Intel style MCE */
-void __devinit intel_p5_mcheck_init(struct cpuinfo_x86 *c)
+void intel_p5_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	
diff -puN arch/i386/kernel/cpu/mcheck/p6.c~x86-add-mce-resume arch/i386/kernel/cpu/mcheck/p6.c
--- 25/arch/i386/kernel/cpu/mcheck/p6.c~x86-add-mce-resume	Mon Aug 29 13:51:30 2005
+++ 25-akpm/arch/i386/kernel/cpu/mcheck/p6.c	Mon Aug 29 13:51:30 2005
@@ -80,7 +80,7 @@ static fastcall void intel_machine_check
 }
 
 /* Set up machine check reporting for processors with Intel style MCE */
-void __devinit intel_p6_mcheck_init(struct cpuinfo_x86 *c)
+void intel_p6_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 l, h;
 	int i;
diff -puN arch/i386/kernel/cpu/mcheck/winchip.c~x86-add-mce-resume arch/i386/kernel/cpu/mcheck/winchip.c
--- 25/arch/i386/kernel/cpu/mcheck/winchip.c~x86-add-mce-resume	Mon Aug 29 13:51:30 2005
+++ 25-akpm/arch/i386/kernel/cpu/mcheck/winchip.c	Mon Aug 29 13:51:30 2005
@@ -23,7 +23,7 @@ static fastcall void winchip_machine_che
 }
 
 /* Set up machine check reporting on the Winchip C6 series */
-void __devinit winchip_mcheck_init(struct cpuinfo_x86 *c)
+void winchip_mcheck_init(struct cpuinfo_x86 *c)
 {
 	u32 lo, hi;
 	machine_check_vector = winchip_machine_check;
diff -puN arch/i386/power/cpu.c~x86-add-mce-resume arch/i386/power/cpu.c
--- 25/arch/i386/power/cpu.c~x86-add-mce-resume	Mon Aug 29 13:51:30 2005
+++ 25-akpm/arch/i386/power/cpu.c	Mon Aug 29 13:51:30 2005
@@ -137,6 +137,7 @@ void __restore_processor_state(struct sa
 	fix_processor_context();
 	do_fpu_end();
 	mtrr_ap_init();
+	mcheck_init(&boot_cpu_data);
 }
 
 void restore_processor_state(void)
diff -puN include/asm-i386/processor.h~x86-add-mce-resume include/asm-i386/processor.h
--- 25/include/asm-i386/processor.h~x86-add-mce-resume	Mon Aug 29 13:51:30 2005
+++ 25-akpm/include/asm-i386/processor.h	Mon Aug 29 13:51:30 2005
@@ -613,4 +613,10 @@ extern void mtrr_bp_init(void);
 #define mtrr_bp_init() do {} while (0)
 #endif
 
+#ifdef CONFIG_X86_MCE
+extern void mcheck_init(struct cpuinfo_x86 *c);
+#else
+#define mcheck_init(c) do {} while(0)
+#endif
+
 #endif /* __ASM_I386_PROCESSOR_H */
_