From: David Gibson <david@gibson.dropbear.id.au>

The {BEGIN,END}_FTR_SECTION asm macros used in ppc64 to nop out sections of
code at runtime cannot be nested.  However, we do nest them in hash_low.S. 
We get away with it there, because there is nothing between the BEGIN
markers for each section.  However, that's confusing to someone reading the
code.

This patch removes the nested ifset and ifclr feature sections, replacing
them with a single feature section in the full mask/value form.

Signed-off-by: David Gibson <dwg@au1.ibm.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Anton Blanchard <anton@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
---

 arch/ppc64/mm/hash_low.S |    4 +---
 1 files changed, 1 insertion(+), 3 deletions(-)

diff -puN arch/ppc64/mm/hash_low.S~ppc64-remove-nested-feature-sections arch/ppc64/mm/hash_low.S
--- devel/arch/ppc64/mm/hash_low.S~ppc64-remove-nested-feature-sections	2005-07-27 12:17:10.000000000 -0700
+++ devel-akpm/arch/ppc64/mm/hash_low.S	2005-07-27 12:17:10.000000000 -0700
@@ -129,12 +129,10 @@ _GLOBAL(__hash_page)
 	 * code rather than call a C function...) 
 	 */
 BEGIN_FTR_SECTION
-BEGIN_FTR_SECTION
 	mr	r4,r30
 	mr	r5,r7
 	bl	.hash_page_do_lazy_icache
-END_FTR_SECTION_IFSET(CPU_FTR_NOEXECUTE)
-END_FTR_SECTION_IFCLR(CPU_FTR_COHERENT_ICACHE)
+END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
 
 	/* At this point, r3 contains new PP bits, save them in
 	 * place of "access" in the param area (sic)
_