From: Natalie.Protasevich@unisys.com
The patch adds boundary check for the MAX_GSI_NUM. Same as the update for
i386, the patch addresses a problem with ACPI SCI IRQ. The patch corrects
the code such that SCI IRQ is skipped and duplicate entry is avoided. The
VIA chipset uses 4-bit IRQ register for internal interrupt routing, and
therefore cannot handle IRQ numbers assigned to its devices. The patch
corrects this problem by allowing PCI IRQs below 16.
Signed-off-by: Natalie Protasevich <Natalie.Protasevich@unisys.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
---
arch/x86_64/kernel/mpparse.c | 17 +++++++++++++++--
1 files changed, 15 insertions(+), 2 deletions(-)
diff -puN arch/x86_64/kernel/mpparse.c~x86_64-avoid-wasting-irqs-patch-update arch/x86_64/kernel/mpparse.c
--- 25/arch/x86_64/kernel/mpparse.c~x86_64-avoid-wasting-irqs-patch-update Mon Jul 11 15:20:20 2005
+++ 25-akpm/arch/x86_64/kernel/mpparse.c Mon Jul 11 15:20:20 2005
@@ -965,8 +965,21 @@ int mp_register_gsi(u32 gsi, int edge_le
* due to unused I/O APIC pins.
*/
int irq = gsi;
- gsi = pci_irq++;
- gsi_to_irq[irq] = gsi;
+ if (gsi < MAX_GSI_NUM) {
+ if (gsi > 15)
+ gsi = pci_irq++;
+#ifdef CONFIG_ACPI_BUS
+ /*
+ * Don't assign IRQ used by ACPI SCI
+ */
+ if (gsi == acpi_fadt.sci_int)
+ gsi = pci_irq++;
+#endif
+ gsi_to_irq[irq] = gsi;
+ } else {
+ printk(KERN_ERR "GSI %u is too high\n", gsi);
+ return gsi;
+ }
}
io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
_