From: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
This patch adds spare timer initialization for NEC VR41xx.
Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Signed-off-by: Andrew Morton <akpm@osdl.org>
---
25-akpm/arch/mips/vr41xx/common/init.c | 27 +++++++++++++++++++++++++++
25-akpm/include/asm-mips/vr41xx/vr41xx.h | 2 +-
2 files changed, 28 insertions(+), 1 deletion(-)
diff -puN arch/mips/vr41xx/common/init.c~mips-add-spare-timer-init arch/mips/vr41xx/common/init.c
--- 25/arch/mips/vr41xx/common/init.c~mips-add-spare-timer-init 2005-03-07 20:41:26.000000000 -0800
+++ 25-akpm/arch/mips/vr41xx/common/init.c 2005-03-07 20:41:26.000000000 -0800
@@ -19,9 +19,11 @@
*/
#include <linux/init.h>
#include <linux/ioport.h>
+#include <linux/irq.h>
#include <linux/string.h>
#include <asm/bootinfo.h>
+#include <asm/time.h>
#include <asm/vr41xx/vr41xx.h>
#define IO_MEM_RESOURCE_START 0UL
@@ -33,6 +35,29 @@ static void __init iomem_resource_init(v
iomem_resource.end = IO_MEM_RESOURCE_END;
}
+static void __init setup_timer_frequency(void)
+{
+ unsigned long tclock;
+
+ tclock = vr41xx_get_tclock_frequency();
+ if (current_cpu_data.processor_id == PRID_VR4131_REV2_0 ||
+ current_cpu_data.processor_id == PRID_VR4131_REV2_1)
+ mips_hpt_frequency = tclock / 2;
+ else
+ mips_hpt_frequency = tclock / 4;
+}
+
+static void __init setup_timer_irq(struct irqaction *irq)
+{
+ setup_irq(TIMER_IRQ, irq);
+}
+
+static void __init timer_init(void)
+{
+ board_time_init = setup_timer_frequency;
+ board_timer_setup = setup_timer_irq;
+}
+
void __init prom_init(void)
{
int argc, i;
@@ -49,6 +74,8 @@ void __init prom_init(void)
vr41xx_calculate_clock_frequency();
+ timer_init();
+
iomem_resource_init();
}
diff -puN include/asm-mips/vr41xx/vr41xx.h~mips-add-spare-timer-init include/asm-mips/vr41xx/vr41xx.h
--- 25/include/asm-mips/vr41xx/vr41xx.h~mips-add-spare-timer-init 2005-03-07 20:41:26.000000000 -0800
+++ 25-akpm/include/asm-mips/vr41xx/vr41xx.h 2005-03-07 21:14:35.000000000 -0800
@@ -84,7 +84,7 @@ extern void vr41xx_mask_clock(vr41xx_clo
#define INT2_CASCADE_IRQ MIPS_CPU_IRQ(4)
#define INT3_CASCADE_IRQ MIPS_CPU_IRQ(5)
#define INT4_CASCADE_IRQ MIPS_CPU_IRQ(6)
-#define MIPS_COUNTER_IRQ MIPS_CPU_IRQ(7)
+#define TIMER_IRQ MIPS_CPU_IRQ(7)
/* SYINT1 Interrupt Numbers */
#define SYSINT1_IRQ_BASE 8
_