From: Roland Dreier <roland@topspin.com> MTHCA_RESET_VALUE must always be swapped, since the HCA expects to see it in big-endian order and we write it with writel. This means on little-endian systems we have to swap it to big-endian order before writing, and on big-endian systems we need to swap it to make up for the additional swap that writel will do. This fixes resetting the HCA on big-endian machines. Signed-off-by: Roland Dreier <roland@topspin.com> Signed-off-by: Andrew Morton <akpm@osdl.org> --- 25-akpm/drivers/infiniband/hw/mthca/mthca_reset.c | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) diff -puN drivers/infiniband/hw/mthca/mthca_reset.c~ib-mthca-fix-reset-value-endianness drivers/infiniband/hw/mthca/mthca_reset.c --- 25/drivers/infiniband/hw/mthca/mthca_reset.c~ib-mthca-fix-reset-value-endianness 2005-03-02 21:50:37.000000000 -0800 +++ 25-akpm/drivers/infiniband/hw/mthca/mthca_reset.c 2005-03-02 21:50:37.000000000 -0800 @@ -50,7 +50,7 @@ int mthca_reset(struct mthca_dev *mdev) struct pci_dev *bridge = NULL; #define MTHCA_RESET_OFFSET 0xf0010 -#define MTHCA_RESET_VALUE cpu_to_be32(1) +#define MTHCA_RESET_VALUE swab32(1) /* * Reset the chip. This is somewhat ugly because we have to _